iwl4965-base.c 258 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/etherdevice.h>
  50. #include <linux/if_arp.h>
  51. #include <net/ieee80211_radiotap.h>
  52. #include <net/mac80211.h>
  53. #include <asm/div64.h>
  54. #define IWL 4965
  55. #include "iwlwifi.h"
  56. #include "iwl-4965.h"
  57. #include "iwl-helpers.h"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. u32 iwl_debug_level;
  60. #endif
  61. /******************************************************************************
  62. *
  63. * module boiler plate
  64. *
  65. ******************************************************************************/
  66. /* module parameters */
  67. int iwl_param_disable_hw_scan;
  68. int iwl_param_debug;
  69. int iwl_param_disable; /* def: enable radio */
  70. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  71. int iwl_param_hwcrypto; /* def: using software encryption */
  72. int iwl_param_qos_enable = 1;
  73. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  74. /*
  75. * module name, copyright, version, etc.
  76. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  77. */
  78. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  79. #ifdef CONFIG_IWLWIFI_DEBUG
  80. #define VD "d"
  81. #else
  82. #define VD
  83. #endif
  84. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  85. #define VS "s"
  86. #else
  87. #define VS
  88. #endif
  89. #define IWLWIFI_VERSION "1.1.17k" VD VS
  90. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  91. #define DRV_VERSION IWLWIFI_VERSION
  92. /* Change firmware file name, using "-" and incrementing number,
  93. * *only* when uCode interface or architecture changes so that it
  94. * is not compatible with earlier drivers.
  95. * This number will also appear in << 8 position of 1st dword of uCode file */
  96. #define IWL4965_UCODE_API "-1"
  97. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  98. MODULE_VERSION(DRV_VERSION);
  99. MODULE_AUTHOR(DRV_COPYRIGHT);
  100. MODULE_LICENSE("GPL");
  101. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  102. {
  103. u16 fc = le16_to_cpu(hdr->frame_control);
  104. int hdr_len = ieee80211_get_hdrlen(fc);
  105. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  106. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  107. return NULL;
  108. }
  109. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  110. struct iwl_priv *priv, int mode)
  111. {
  112. int i;
  113. for (i = 0; i < 3; i++)
  114. if (priv->modes[i].mode == mode)
  115. return &priv->modes[i];
  116. return NULL;
  117. }
  118. static int iwl_is_empty_essid(const char *essid, int essid_len)
  119. {
  120. /* Single white space is for Linksys APs */
  121. if (essid_len == 1 && essid[0] == ' ')
  122. return 1;
  123. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  124. while (essid_len) {
  125. essid_len--;
  126. if (essid[essid_len] != '\0')
  127. return 0;
  128. }
  129. return 1;
  130. }
  131. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  132. {
  133. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  134. const char *s = essid;
  135. char *d = escaped;
  136. if (iwl_is_empty_essid(essid, essid_len)) {
  137. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  138. return escaped;
  139. }
  140. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  141. while (essid_len--) {
  142. if (*s == '\0') {
  143. *d++ = '\\';
  144. *d++ = '0';
  145. s++;
  146. } else
  147. *d++ = *s++;
  148. }
  149. *d = '\0';
  150. return escaped;
  151. }
  152. static void iwl_print_hex_dump(int level, void *p, u32 len)
  153. {
  154. #ifdef CONFIG_IWLWIFI_DEBUG
  155. if (!(iwl_debug_level & level))
  156. return;
  157. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  158. p, len, 1);
  159. #endif
  160. }
  161. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  162. * DMA services
  163. *
  164. * Theory of operation
  165. *
  166. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  167. * 2 empty entries always kept in the buffer to protect from overflow.
  168. *
  169. * For Tx queue, there are low mark and high mark limits. If, after queuing
  170. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  171. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  172. * Tx queue resumed.
  173. *
  174. * The IWL operates with six queues, one receive queue in the device's
  175. * sram, one transmit queue for sending commands to the device firmware,
  176. * and four transmit queues for data.
  177. ***************************************************/
  178. static int iwl_queue_space(const struct iwl_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /* XXX: n_bd must be power-of-two size */
  192. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  193. {
  194. return ++index & (n_bd - 1);
  195. }
  196. /* XXX: n_bd must be power-of-two size */
  197. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  198. {
  199. return --index & (n_bd - 1);
  200. }
  201. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  202. {
  203. return q->write_ptr > q->read_ptr ?
  204. (i >= q->read_ptr && i < q->write_ptr) :
  205. !(i < q->read_ptr && i >= q->write_ptr);
  206. }
  207. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  208. {
  209. if (is_huge)
  210. return q->n_window;
  211. return index & (q->n_window - 1);
  212. }
  213. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  214. int count, int slots_num, u32 id)
  215. {
  216. q->n_bd = count;
  217. q->n_window = slots_num;
  218. q->id = id;
  219. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  220. * and iwl_queue_dec_wrap are broken. */
  221. BUG_ON(!is_power_of_2(count));
  222. /* slots_num must be power-of-two size, otherwise
  223. * get_cmd_index is broken. */
  224. BUG_ON(!is_power_of_2(slots_num));
  225. q->low_mark = q->n_window / 4;
  226. if (q->low_mark < 4)
  227. q->low_mark = 4;
  228. q->high_mark = q->n_window / 8;
  229. if (q->high_mark < 2)
  230. q->high_mark = 2;
  231. q->write_ptr = q->read_ptr = 0;
  232. return 0;
  233. }
  234. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  235. struct iwl_tx_queue *txq, u32 id)
  236. {
  237. struct pci_dev *dev = priv->pci_dev;
  238. if (id != IWL_CMD_QUEUE_NUM) {
  239. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  240. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  241. if (!txq->txb) {
  242. IWL_ERROR("kmalloc for auxiliary BD "
  243. "structures failed\n");
  244. goto error;
  245. }
  246. } else
  247. txq->txb = NULL;
  248. txq->bd = pci_alloc_consistent(dev,
  249. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  250. &txq->q.dma_addr);
  251. if (!txq->bd) {
  252. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  253. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  254. goto error;
  255. }
  256. txq->q.id = id;
  257. return 0;
  258. error:
  259. if (txq->txb) {
  260. kfree(txq->txb);
  261. txq->txb = NULL;
  262. }
  263. return -ENOMEM;
  264. }
  265. int iwl_tx_queue_init(struct iwl_priv *priv,
  266. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  267. {
  268. struct pci_dev *dev = priv->pci_dev;
  269. int len;
  270. int rc = 0;
  271. /* allocate command space + one big command for scan since scan
  272. * command is very huge the system will not have two scan at the
  273. * same time */
  274. len = sizeof(struct iwl_cmd) * slots_num;
  275. if (txq_id == IWL_CMD_QUEUE_NUM)
  276. len += IWL_MAX_SCAN_SIZE;
  277. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  278. if (!txq->cmd)
  279. return -ENOMEM;
  280. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  281. if (rc) {
  282. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  283. return -ENOMEM;
  284. }
  285. txq->need_update = 0;
  286. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  287. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  288. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  289. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  290. iwl_hw_tx_queue_init(priv, txq);
  291. return 0;
  292. }
  293. /**
  294. * iwl_tx_queue_free - Deallocate DMA queue.
  295. * @txq: Transmit queue to deallocate.
  296. *
  297. * Empty queue by removing and destroying all BD's.
  298. * Free all buffers. txq itself is not freed.
  299. *
  300. */
  301. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  302. {
  303. struct iwl_queue *q = &txq->q;
  304. struct pci_dev *dev = priv->pci_dev;
  305. int len;
  306. if (q->n_bd == 0)
  307. return;
  308. /* first, empty all BD's */
  309. for (; q->write_ptr != q->read_ptr;
  310. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  311. iwl_hw_txq_free_tfd(priv, txq);
  312. len = sizeof(struct iwl_cmd) * q->n_window;
  313. if (q->id == IWL_CMD_QUEUE_NUM)
  314. len += IWL_MAX_SCAN_SIZE;
  315. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  316. /* free buffers belonging to queue itself */
  317. if (txq->q.n_bd)
  318. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  319. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  320. if (txq->txb) {
  321. kfree(txq->txb);
  322. txq->txb = NULL;
  323. }
  324. /* 0 fill whole structure */
  325. memset(txq, 0, sizeof(*txq));
  326. }
  327. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  328. /*************** STATION TABLE MANAGEMENT ****
  329. *
  330. * NOTE: This needs to be overhauled to better synchronize between
  331. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  332. *
  333. * mac80211 should also be examined to determine if sta_info is duplicating
  334. * the functionality provided here
  335. */
  336. /**************************************************************/
  337. #if 0 /* temporary disable till we add real remove station */
  338. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  339. {
  340. int index = IWL_INVALID_STATION;
  341. int i;
  342. unsigned long flags;
  343. spin_lock_irqsave(&priv->sta_lock, flags);
  344. if (is_ap)
  345. index = IWL_AP_ID;
  346. else if (is_broadcast_ether_addr(addr))
  347. index = priv->hw_setting.bcast_sta_id;
  348. else
  349. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  350. if (priv->stations[i].used &&
  351. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  352. addr)) {
  353. index = i;
  354. break;
  355. }
  356. if (unlikely(index == IWL_INVALID_STATION))
  357. goto out;
  358. if (priv->stations[index].used) {
  359. priv->stations[index].used = 0;
  360. priv->num_stations--;
  361. }
  362. BUG_ON(priv->num_stations < 0);
  363. out:
  364. spin_unlock_irqrestore(&priv->sta_lock, flags);
  365. return 0;
  366. }
  367. #endif
  368. static void iwl_clear_stations_table(struct iwl_priv *priv)
  369. {
  370. unsigned long flags;
  371. spin_lock_irqsave(&priv->sta_lock, flags);
  372. priv->num_stations = 0;
  373. memset(priv->stations, 0, sizeof(priv->stations));
  374. spin_unlock_irqrestore(&priv->sta_lock, flags);
  375. }
  376. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  377. {
  378. int i;
  379. int index = IWL_INVALID_STATION;
  380. struct iwl_station_entry *station;
  381. unsigned long flags_spin;
  382. DECLARE_MAC_BUF(mac);
  383. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  384. if (is_ap)
  385. index = IWL_AP_ID;
  386. else if (is_broadcast_ether_addr(addr))
  387. index = priv->hw_setting.bcast_sta_id;
  388. else
  389. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  390. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  391. addr)) {
  392. index = i;
  393. break;
  394. }
  395. if (!priv->stations[i].used &&
  396. index == IWL_INVALID_STATION)
  397. index = i;
  398. }
  399. /* These two conditions has the same outcome but keep them separate
  400. since they have different meaning */
  401. if (unlikely(index == IWL_INVALID_STATION)) {
  402. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  403. return index;
  404. }
  405. if (priv->stations[index].used &&
  406. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  407. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  408. return index;
  409. }
  410. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  411. station = &priv->stations[index];
  412. station->used = 1;
  413. priv->num_stations++;
  414. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  415. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  416. station->sta.mode = 0;
  417. station->sta.sta.sta_id = index;
  418. station->sta.station_flags = 0;
  419. #ifdef CONFIG_IWLWIFI_HT
  420. /* BCAST station and IBSS stations do not work in HT mode */
  421. if (index != priv->hw_setting.bcast_sta_id &&
  422. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  423. iwl4965_set_ht_add_station(priv, index);
  424. #endif /*CONFIG_IWLWIFI_HT*/
  425. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  426. iwl_send_add_station(priv, &station->sta, flags);
  427. return index;
  428. }
  429. /*************** DRIVER STATUS FUNCTIONS *****/
  430. static inline int iwl_is_ready(struct iwl_priv *priv)
  431. {
  432. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  433. * set but EXIT_PENDING is not */
  434. return test_bit(STATUS_READY, &priv->status) &&
  435. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  436. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  437. }
  438. static inline int iwl_is_alive(struct iwl_priv *priv)
  439. {
  440. return test_bit(STATUS_ALIVE, &priv->status);
  441. }
  442. static inline int iwl_is_init(struct iwl_priv *priv)
  443. {
  444. return test_bit(STATUS_INIT, &priv->status);
  445. }
  446. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  447. {
  448. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  449. test_bit(STATUS_RF_KILL_SW, &priv->status);
  450. }
  451. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  452. {
  453. if (iwl_is_rfkill(priv))
  454. return 0;
  455. return iwl_is_ready(priv);
  456. }
  457. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  458. #define IWL_CMD(x) case x : return #x
  459. static const char *get_cmd_string(u8 cmd)
  460. {
  461. switch (cmd) {
  462. IWL_CMD(REPLY_ALIVE);
  463. IWL_CMD(REPLY_ERROR);
  464. IWL_CMD(REPLY_RXON);
  465. IWL_CMD(REPLY_RXON_ASSOC);
  466. IWL_CMD(REPLY_QOS_PARAM);
  467. IWL_CMD(REPLY_RXON_TIMING);
  468. IWL_CMD(REPLY_ADD_STA);
  469. IWL_CMD(REPLY_REMOVE_STA);
  470. IWL_CMD(REPLY_REMOVE_ALL_STA);
  471. IWL_CMD(REPLY_TX);
  472. IWL_CMD(REPLY_RATE_SCALE);
  473. IWL_CMD(REPLY_LEDS_CMD);
  474. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  475. IWL_CMD(RADAR_NOTIFICATION);
  476. IWL_CMD(REPLY_QUIET_CMD);
  477. IWL_CMD(REPLY_CHANNEL_SWITCH);
  478. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  479. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  480. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  481. IWL_CMD(POWER_TABLE_CMD);
  482. IWL_CMD(PM_SLEEP_NOTIFICATION);
  483. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  484. IWL_CMD(REPLY_SCAN_CMD);
  485. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  486. IWL_CMD(SCAN_START_NOTIFICATION);
  487. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  488. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  489. IWL_CMD(BEACON_NOTIFICATION);
  490. IWL_CMD(REPLY_TX_BEACON);
  491. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  492. IWL_CMD(QUIET_NOTIFICATION);
  493. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  494. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  495. IWL_CMD(REPLY_BT_CONFIG);
  496. IWL_CMD(REPLY_STATISTICS_CMD);
  497. IWL_CMD(STATISTICS_NOTIFICATION);
  498. IWL_CMD(REPLY_CARD_STATE_CMD);
  499. IWL_CMD(CARD_STATE_NOTIFICATION);
  500. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  501. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  502. IWL_CMD(SENSITIVITY_CMD);
  503. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  504. IWL_CMD(REPLY_RX_PHY_CMD);
  505. IWL_CMD(REPLY_RX_MPDU_CMD);
  506. IWL_CMD(REPLY_4965_RX);
  507. IWL_CMD(REPLY_COMPRESSED_BA);
  508. default:
  509. return "UNKNOWN";
  510. }
  511. }
  512. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  513. /**
  514. * iwl_enqueue_hcmd - enqueue a uCode command
  515. * @priv: device private data point
  516. * @cmd: a point to the ucode command structure
  517. *
  518. * The function returns < 0 values to indicate the operation is
  519. * failed. On success, it turns the index (> 0) of command in the
  520. * command queue.
  521. */
  522. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  523. {
  524. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  525. struct iwl_queue *q = &txq->q;
  526. struct iwl_tfd_frame *tfd;
  527. u32 *control_flags;
  528. struct iwl_cmd *out_cmd;
  529. u32 idx;
  530. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  531. dma_addr_t phys_addr;
  532. int ret;
  533. unsigned long flags;
  534. /* If any of the command structures end up being larger than
  535. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  536. * we will need to increase the size of the TFD entries */
  537. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  538. !(cmd->meta.flags & CMD_SIZE_HUGE));
  539. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  540. IWL_ERROR("No space for Tx\n");
  541. return -ENOSPC;
  542. }
  543. spin_lock_irqsave(&priv->hcmd_lock, flags);
  544. tfd = &txq->bd[q->write_ptr];
  545. memset(tfd, 0, sizeof(*tfd));
  546. control_flags = (u32 *) tfd;
  547. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  548. out_cmd = &txq->cmd[idx];
  549. out_cmd->hdr.cmd = cmd->id;
  550. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  551. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  552. /* At this point, the out_cmd now has all of the incoming cmd
  553. * information */
  554. out_cmd->hdr.flags = 0;
  555. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  556. INDEX_TO_SEQ(q->write_ptr));
  557. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  558. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  559. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  560. offsetof(struct iwl_cmd, hdr);
  561. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  562. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  563. "%d bytes at %d[%d]:%d\n",
  564. get_cmd_string(out_cmd->hdr.cmd),
  565. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  566. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  567. txq->need_update = 1;
  568. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  569. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  570. iwl_tx_queue_update_write_ptr(priv, txq);
  571. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  572. return ret ? ret : idx;
  573. }
  574. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  575. {
  576. int ret;
  577. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  578. /* An asynchronous command can not expect an SKB to be set. */
  579. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  580. /* An asynchronous command MUST have a callback. */
  581. BUG_ON(!cmd->meta.u.callback);
  582. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  583. return -EBUSY;
  584. ret = iwl_enqueue_hcmd(priv, cmd);
  585. if (ret < 0) {
  586. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  587. get_cmd_string(cmd->id), ret);
  588. return ret;
  589. }
  590. return 0;
  591. }
  592. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  593. {
  594. int cmd_idx;
  595. int ret;
  596. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  597. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  598. /* A synchronous command can not have a callback set. */
  599. BUG_ON(cmd->meta.u.callback != NULL);
  600. if (atomic_xchg(&entry, 1)) {
  601. IWL_ERROR("Error sending %s: Already sending a host command\n",
  602. get_cmd_string(cmd->id));
  603. return -EBUSY;
  604. }
  605. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  606. if (cmd->meta.flags & CMD_WANT_SKB)
  607. cmd->meta.source = &cmd->meta;
  608. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  609. if (cmd_idx < 0) {
  610. ret = cmd_idx;
  611. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  612. get_cmd_string(cmd->id), ret);
  613. goto out;
  614. }
  615. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  616. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  617. HOST_COMPLETE_TIMEOUT);
  618. if (!ret) {
  619. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  620. IWL_ERROR("Error sending %s: time out after %dms.\n",
  621. get_cmd_string(cmd->id),
  622. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  623. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  624. ret = -ETIMEDOUT;
  625. goto cancel;
  626. }
  627. }
  628. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  629. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  630. get_cmd_string(cmd->id));
  631. ret = -ECANCELED;
  632. goto fail;
  633. }
  634. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  635. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  636. get_cmd_string(cmd->id));
  637. ret = -EIO;
  638. goto fail;
  639. }
  640. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  641. IWL_ERROR("Error: Response NULL in '%s'\n",
  642. get_cmd_string(cmd->id));
  643. ret = -EIO;
  644. goto out;
  645. }
  646. ret = 0;
  647. goto out;
  648. cancel:
  649. if (cmd->meta.flags & CMD_WANT_SKB) {
  650. struct iwl_cmd *qcmd;
  651. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  652. * TX cmd queue. Otherwise in case the cmd comes
  653. * in later, it will possibly set an invalid
  654. * address (cmd->meta.source). */
  655. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  656. qcmd->meta.flags &= ~CMD_WANT_SKB;
  657. }
  658. fail:
  659. if (cmd->meta.u.skb) {
  660. dev_kfree_skb_any(cmd->meta.u.skb);
  661. cmd->meta.u.skb = NULL;
  662. }
  663. out:
  664. atomic_set(&entry, 0);
  665. return ret;
  666. }
  667. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  668. {
  669. /* A command can not be asynchronous AND expect an SKB to be set. */
  670. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  671. (cmd->meta.flags & CMD_WANT_SKB));
  672. if (cmd->meta.flags & CMD_ASYNC)
  673. return iwl_send_cmd_async(priv, cmd);
  674. return iwl_send_cmd_sync(priv, cmd);
  675. }
  676. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  677. {
  678. struct iwl_host_cmd cmd = {
  679. .id = id,
  680. .len = len,
  681. .data = data,
  682. };
  683. return iwl_send_cmd_sync(priv, &cmd);
  684. }
  685. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  686. {
  687. struct iwl_host_cmd cmd = {
  688. .id = id,
  689. .len = sizeof(val),
  690. .data = &val,
  691. };
  692. return iwl_send_cmd_sync(priv, &cmd);
  693. }
  694. int iwl_send_statistics_request(struct iwl_priv *priv)
  695. {
  696. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  697. }
  698. /**
  699. * iwl_rxon_add_station - add station into station table.
  700. *
  701. * there is only one AP station with id= IWL_AP_ID
  702. * NOTE: mutex must be held before calling the this fnction
  703. */
  704. static int iwl_rxon_add_station(struct iwl_priv *priv,
  705. const u8 *addr, int is_ap)
  706. {
  707. u8 sta_id;
  708. sta_id = iwl_add_station(priv, addr, is_ap, 0);
  709. iwl4965_add_station(priv, addr, is_ap);
  710. return sta_id;
  711. }
  712. /**
  713. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  714. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  715. * @channel: Any channel valid for the requested phymode
  716. * In addition to setting the staging RXON, priv->phymode is also set.
  717. *
  718. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  719. * in the staging RXON flag structure based on the phymode
  720. */
  721. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  722. {
  723. if (!iwl_get_channel_info(priv, phymode, channel)) {
  724. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  725. channel, phymode);
  726. return -EINVAL;
  727. }
  728. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  729. (priv->phymode == phymode))
  730. return 0;
  731. priv->staging_rxon.channel = cpu_to_le16(channel);
  732. if (phymode == MODE_IEEE80211A)
  733. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  734. else
  735. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  736. priv->phymode = phymode;
  737. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  738. return 0;
  739. }
  740. /**
  741. * iwl_check_rxon_cmd - validate RXON structure is valid
  742. *
  743. * NOTE: This is really only useful during development and can eventually
  744. * be #ifdef'd out once the driver is stable and folks aren't actively
  745. * making changes
  746. */
  747. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  748. {
  749. int error = 0;
  750. int counter = 1;
  751. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  752. error |= le32_to_cpu(rxon->flags &
  753. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  754. RXON_FLG_RADAR_DETECT_MSK));
  755. if (error)
  756. IWL_WARNING("check 24G fields %d | %d\n",
  757. counter++, error);
  758. } else {
  759. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  760. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  761. if (error)
  762. IWL_WARNING("check 52 fields %d | %d\n",
  763. counter++, error);
  764. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  765. if (error)
  766. IWL_WARNING("check 52 CCK %d | %d\n",
  767. counter++, error);
  768. }
  769. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  770. if (error)
  771. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  772. /* make sure basic rates 6Mbps and 1Mbps are supported */
  773. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  774. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  775. if (error)
  776. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  777. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  778. if (error)
  779. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  780. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  781. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  782. if (error)
  783. IWL_WARNING("check CCK and short slot %d | %d\n",
  784. counter++, error);
  785. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  786. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  787. if (error)
  788. IWL_WARNING("check CCK & auto detect %d | %d\n",
  789. counter++, error);
  790. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  791. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  792. if (error)
  793. IWL_WARNING("check TGG and auto detect %d | %d\n",
  794. counter++, error);
  795. if (error)
  796. IWL_WARNING("Tuning to channel %d\n",
  797. le16_to_cpu(rxon->channel));
  798. if (error) {
  799. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  800. return -1;
  801. }
  802. return 0;
  803. }
  804. /**
  805. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  806. * @priv: staging_rxon is compared to active_rxon
  807. *
  808. * If the RXON structure is changing sufficient to require a new
  809. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  810. * to indicate a new tune is required.
  811. */
  812. static int iwl_full_rxon_required(struct iwl_priv *priv)
  813. {
  814. /* These items are only settable from the full RXON command */
  815. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  816. compare_ether_addr(priv->staging_rxon.bssid_addr,
  817. priv->active_rxon.bssid_addr) ||
  818. compare_ether_addr(priv->staging_rxon.node_addr,
  819. priv->active_rxon.node_addr) ||
  820. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  821. priv->active_rxon.wlap_bssid_addr) ||
  822. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  823. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  824. (priv->staging_rxon.air_propagation !=
  825. priv->active_rxon.air_propagation) ||
  826. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  827. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  828. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  829. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  830. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  831. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  832. return 1;
  833. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  834. * be updated with the RXON_ASSOC command -- however only some
  835. * flag transitions are allowed using RXON_ASSOC */
  836. /* Check if we are not switching bands */
  837. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  838. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  839. return 1;
  840. /* Check if we are switching association toggle */
  841. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  842. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  843. return 1;
  844. return 0;
  845. }
  846. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  847. {
  848. int rc = 0;
  849. struct iwl_rx_packet *res = NULL;
  850. struct iwl_rxon_assoc_cmd rxon_assoc;
  851. struct iwl_host_cmd cmd = {
  852. .id = REPLY_RXON_ASSOC,
  853. .len = sizeof(rxon_assoc),
  854. .meta.flags = CMD_WANT_SKB,
  855. .data = &rxon_assoc,
  856. };
  857. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  858. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  859. if ((rxon1->flags == rxon2->flags) &&
  860. (rxon1->filter_flags == rxon2->filter_flags) &&
  861. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  862. (rxon1->ofdm_ht_single_stream_basic_rates ==
  863. rxon2->ofdm_ht_single_stream_basic_rates) &&
  864. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  865. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  866. (rxon1->rx_chain == rxon2->rx_chain) &&
  867. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  868. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  869. return 0;
  870. }
  871. rxon_assoc.flags = priv->staging_rxon.flags;
  872. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  873. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  874. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  875. rxon_assoc.reserved = 0;
  876. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  877. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  878. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  879. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  880. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  881. rc = iwl_send_cmd_sync(priv, &cmd);
  882. if (rc)
  883. return rc;
  884. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  885. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  886. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  887. rc = -EIO;
  888. }
  889. priv->alloc_rxb_skb--;
  890. dev_kfree_skb_any(cmd.meta.u.skb);
  891. return rc;
  892. }
  893. /**
  894. * iwl_commit_rxon - commit staging_rxon to hardware
  895. *
  896. * The RXON command in staging_rxon is committed to the hardware and
  897. * the active_rxon structure is updated with the new data. This
  898. * function correctly transitions out of the RXON_ASSOC_MSK state if
  899. * a HW tune is required based on the RXON structure changes.
  900. */
  901. static int iwl_commit_rxon(struct iwl_priv *priv)
  902. {
  903. /* cast away the const for active_rxon in this function */
  904. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  905. DECLARE_MAC_BUF(mac);
  906. int rc = 0;
  907. if (!iwl_is_alive(priv))
  908. return -1;
  909. /* always get timestamp with Rx frame */
  910. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  911. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  912. if (rc) {
  913. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  914. return -EINVAL;
  915. }
  916. /* If we don't need to send a full RXON, we can use
  917. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  918. * and other flags for the current radio configuration. */
  919. if (!iwl_full_rxon_required(priv)) {
  920. rc = iwl_send_rxon_assoc(priv);
  921. if (rc) {
  922. IWL_ERROR("Error setting RXON_ASSOC "
  923. "configuration (%d).\n", rc);
  924. return rc;
  925. }
  926. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  927. return 0;
  928. }
  929. /* station table will be cleared */
  930. priv->assoc_station_added = 0;
  931. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  932. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  933. if (!priv->error_recovering)
  934. priv->start_calib = 0;
  935. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  936. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  937. /* If we are currently associated and the new config requires
  938. * an RXON_ASSOC and the new config wants the associated mask enabled,
  939. * we must clear the associated from the active configuration
  940. * before we apply the new config */
  941. if (iwl_is_associated(priv) &&
  942. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  943. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  944. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  945. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  946. sizeof(struct iwl_rxon_cmd),
  947. &priv->active_rxon);
  948. /* If the mask clearing failed then we set
  949. * active_rxon back to what it was previously */
  950. if (rc) {
  951. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  952. IWL_ERROR("Error clearing ASSOC_MSK on current "
  953. "configuration (%d).\n", rc);
  954. return rc;
  955. }
  956. }
  957. IWL_DEBUG_INFO("Sending RXON\n"
  958. "* with%s RXON_FILTER_ASSOC_MSK\n"
  959. "* channel = %d\n"
  960. "* bssid = %s\n",
  961. ((priv->staging_rxon.filter_flags &
  962. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  963. le16_to_cpu(priv->staging_rxon.channel),
  964. print_mac(mac, priv->staging_rxon.bssid_addr));
  965. /* Apply the new configuration */
  966. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  967. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  968. if (rc) {
  969. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  970. return rc;
  971. }
  972. iwl_clear_stations_table(priv);
  973. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  974. if (!priv->error_recovering)
  975. priv->start_calib = 0;
  976. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  977. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  978. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  979. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  980. /* If we issue a new RXON command which required a tune then we must
  981. * send a new TXPOWER command or we won't be able to Tx any frames */
  982. rc = iwl_hw_reg_send_txpower(priv);
  983. if (rc) {
  984. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  985. return rc;
  986. }
  987. /* Add the broadcast address so we can send broadcast frames */
  988. if (iwl_rxon_add_station(priv, BROADCAST_ADDR, 0) ==
  989. IWL_INVALID_STATION) {
  990. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  991. return -EIO;
  992. }
  993. /* If we have set the ASSOC_MSK and we are in BSS mode then
  994. * add the IWL_AP_ID to the station rate table */
  995. if (iwl_is_associated(priv) &&
  996. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  997. if (iwl_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  998. == IWL_INVALID_STATION) {
  999. IWL_ERROR("Error adding AP address for transmit.\n");
  1000. return -EIO;
  1001. }
  1002. priv->assoc_station_added = 1;
  1003. }
  1004. return 0;
  1005. }
  1006. static int iwl_send_bt_config(struct iwl_priv *priv)
  1007. {
  1008. struct iwl_bt_cmd bt_cmd = {
  1009. .flags = 3,
  1010. .lead_time = 0xAA,
  1011. .max_kill = 1,
  1012. .kill_ack_mask = 0,
  1013. .kill_cts_mask = 0,
  1014. };
  1015. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1016. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1017. }
  1018. static int iwl_send_scan_abort(struct iwl_priv *priv)
  1019. {
  1020. int rc = 0;
  1021. struct iwl_rx_packet *res;
  1022. struct iwl_host_cmd cmd = {
  1023. .id = REPLY_SCAN_ABORT_CMD,
  1024. .meta.flags = CMD_WANT_SKB,
  1025. };
  1026. /* If there isn't a scan actively going on in the hardware
  1027. * then we are in between scan bands and not actually
  1028. * actively scanning, so don't send the abort command */
  1029. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1030. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1031. return 0;
  1032. }
  1033. rc = iwl_send_cmd_sync(priv, &cmd);
  1034. if (rc) {
  1035. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1036. return rc;
  1037. }
  1038. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1039. if (res->u.status != CAN_ABORT_STATUS) {
  1040. /* The scan abort will return 1 for success or
  1041. * 2 for "failure". A failure condition can be
  1042. * due to simply not being in an active scan which
  1043. * can occur if we send the scan abort before we
  1044. * the microcode has notified us that a scan is
  1045. * completed. */
  1046. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1047. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1048. clear_bit(STATUS_SCAN_HW, &priv->status);
  1049. }
  1050. dev_kfree_skb_any(cmd.meta.u.skb);
  1051. return rc;
  1052. }
  1053. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1054. struct iwl_cmd *cmd,
  1055. struct sk_buff *skb)
  1056. {
  1057. return 1;
  1058. }
  1059. /*
  1060. * CARD_STATE_CMD
  1061. *
  1062. * Use: Sets the internal card state to enable, disable, or halt
  1063. *
  1064. * When in the 'enable' state the card operates as normal.
  1065. * When in the 'disable' state, the card enters into a low power mode.
  1066. * When in the 'halt' state, the card is shut down and must be fully
  1067. * restarted to come back on.
  1068. */
  1069. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1070. {
  1071. struct iwl_host_cmd cmd = {
  1072. .id = REPLY_CARD_STATE_CMD,
  1073. .len = sizeof(u32),
  1074. .data = &flags,
  1075. .meta.flags = meta_flag,
  1076. };
  1077. if (meta_flag & CMD_ASYNC)
  1078. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1079. return iwl_send_cmd(priv, &cmd);
  1080. }
  1081. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1082. struct iwl_cmd *cmd, struct sk_buff *skb)
  1083. {
  1084. struct iwl_rx_packet *res = NULL;
  1085. if (!skb) {
  1086. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1087. return 1;
  1088. }
  1089. res = (struct iwl_rx_packet *)skb->data;
  1090. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1091. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1092. res->hdr.flags);
  1093. return 1;
  1094. }
  1095. switch (res->u.add_sta.status) {
  1096. case ADD_STA_SUCCESS_MSK:
  1097. break;
  1098. default:
  1099. break;
  1100. }
  1101. /* We didn't cache the SKB; let the caller free it */
  1102. return 1;
  1103. }
  1104. int iwl_send_add_station(struct iwl_priv *priv,
  1105. struct iwl_addsta_cmd *sta, u8 flags)
  1106. {
  1107. struct iwl_rx_packet *res = NULL;
  1108. int rc = 0;
  1109. struct iwl_host_cmd cmd = {
  1110. .id = REPLY_ADD_STA,
  1111. .len = sizeof(struct iwl_addsta_cmd),
  1112. .meta.flags = flags,
  1113. .data = sta,
  1114. };
  1115. if (flags & CMD_ASYNC)
  1116. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1117. else
  1118. cmd.meta.flags |= CMD_WANT_SKB;
  1119. rc = iwl_send_cmd(priv, &cmd);
  1120. if (rc || (flags & CMD_ASYNC))
  1121. return rc;
  1122. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1123. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1124. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1125. res->hdr.flags);
  1126. rc = -EIO;
  1127. }
  1128. if (rc == 0) {
  1129. switch (res->u.add_sta.status) {
  1130. case ADD_STA_SUCCESS_MSK:
  1131. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1132. break;
  1133. default:
  1134. rc = -EIO;
  1135. IWL_WARNING("REPLY_ADD_STA failed\n");
  1136. break;
  1137. }
  1138. }
  1139. priv->alloc_rxb_skb--;
  1140. dev_kfree_skb_any(cmd.meta.u.skb);
  1141. return rc;
  1142. }
  1143. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1144. struct ieee80211_key_conf *keyconf,
  1145. u8 sta_id)
  1146. {
  1147. unsigned long flags;
  1148. __le16 key_flags = 0;
  1149. switch (keyconf->alg) {
  1150. case ALG_CCMP:
  1151. key_flags |= STA_KEY_FLG_CCMP;
  1152. key_flags |= cpu_to_le16(
  1153. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1154. key_flags &= ~STA_KEY_FLG_INVALID;
  1155. break;
  1156. case ALG_TKIP:
  1157. case ALG_WEP:
  1158. default:
  1159. return -EINVAL;
  1160. }
  1161. spin_lock_irqsave(&priv->sta_lock, flags);
  1162. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1163. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1164. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1165. keyconf->keylen);
  1166. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1167. keyconf->keylen);
  1168. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1169. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1170. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1171. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1172. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1173. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1174. return 0;
  1175. }
  1176. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1177. {
  1178. unsigned long flags;
  1179. spin_lock_irqsave(&priv->sta_lock, flags);
  1180. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1181. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1182. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1183. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1184. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1185. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1186. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1187. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1188. return 0;
  1189. }
  1190. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1191. {
  1192. struct list_head *element;
  1193. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1194. priv->frames_count);
  1195. while (!list_empty(&priv->free_frames)) {
  1196. element = priv->free_frames.next;
  1197. list_del(element);
  1198. kfree(list_entry(element, struct iwl_frame, list));
  1199. priv->frames_count--;
  1200. }
  1201. if (priv->frames_count) {
  1202. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1203. priv->frames_count);
  1204. priv->frames_count = 0;
  1205. }
  1206. }
  1207. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1208. {
  1209. struct iwl_frame *frame;
  1210. struct list_head *element;
  1211. if (list_empty(&priv->free_frames)) {
  1212. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1213. if (!frame) {
  1214. IWL_ERROR("Could not allocate frame!\n");
  1215. return NULL;
  1216. }
  1217. priv->frames_count++;
  1218. return frame;
  1219. }
  1220. element = priv->free_frames.next;
  1221. list_del(element);
  1222. return list_entry(element, struct iwl_frame, list);
  1223. }
  1224. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1225. {
  1226. memset(frame, 0, sizeof(*frame));
  1227. list_add(&frame->list, &priv->free_frames);
  1228. }
  1229. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1230. struct ieee80211_hdr *hdr,
  1231. const u8 *dest, int left)
  1232. {
  1233. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1234. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1235. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1236. return 0;
  1237. if (priv->ibss_beacon->len > left)
  1238. return 0;
  1239. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1240. return priv->ibss_beacon->len;
  1241. }
  1242. int iwl_rate_index_from_plcp(int plcp)
  1243. {
  1244. int i = 0;
  1245. if (plcp & RATE_MCS_HT_MSK) {
  1246. i = (plcp & 0xff);
  1247. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1248. i = i - IWL_RATE_MIMO_6M_PLCP;
  1249. i += IWL_FIRST_OFDM_RATE;
  1250. /* skip 9M not supported in ht*/
  1251. if (i >= IWL_RATE_9M_INDEX)
  1252. i += 1;
  1253. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1254. (i <= IWL_LAST_OFDM_RATE))
  1255. return i;
  1256. } else {
  1257. for (i = 0; i < ARRAY_SIZE(iwl_rates); i++)
  1258. if (iwl_rates[i].plcp == (plcp &0xFF))
  1259. return i;
  1260. }
  1261. return -1;
  1262. }
  1263. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1264. {
  1265. u8 i;
  1266. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1267. i = iwl_rates[i].next_ieee) {
  1268. if (rate_mask & (1 << i))
  1269. return iwl_rates[i].plcp;
  1270. }
  1271. return IWL_RATE_INVALID;
  1272. }
  1273. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1274. {
  1275. struct iwl_frame *frame;
  1276. unsigned int frame_size;
  1277. int rc;
  1278. u8 rate;
  1279. frame = iwl_get_free_frame(priv);
  1280. if (!frame) {
  1281. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1282. "command.\n");
  1283. return -ENOMEM;
  1284. }
  1285. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1286. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1287. 0xFF0);
  1288. if (rate == IWL_INVALID_RATE)
  1289. rate = IWL_RATE_6M_PLCP;
  1290. } else {
  1291. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1292. if (rate == IWL_INVALID_RATE)
  1293. rate = IWL_RATE_1M_PLCP;
  1294. }
  1295. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1296. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1297. &frame->u.cmd[0]);
  1298. iwl_free_frame(priv, frame);
  1299. return rc;
  1300. }
  1301. /******************************************************************************
  1302. *
  1303. * EEPROM related functions
  1304. *
  1305. ******************************************************************************/
  1306. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1307. {
  1308. memcpy(mac, priv->eeprom.mac_address, 6);
  1309. }
  1310. /**
  1311. * iwl_eeprom_init - read EEPROM contents
  1312. *
  1313. * Load the EEPROM from adapter into priv->eeprom
  1314. *
  1315. * NOTE: This routine uses the non-debug IO access functions.
  1316. */
  1317. int iwl_eeprom_init(struct iwl_priv *priv)
  1318. {
  1319. u16 *e = (u16 *)&priv->eeprom;
  1320. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1321. u32 r;
  1322. int sz = sizeof(priv->eeprom);
  1323. int rc;
  1324. int i;
  1325. u16 addr;
  1326. /* The EEPROM structure has several padding buffers within it
  1327. * and when adding new EEPROM maps is subject to programmer errors
  1328. * which may be very difficult to identify without explicitly
  1329. * checking the resulting size of the eeprom map. */
  1330. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1331. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1332. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1333. return -ENOENT;
  1334. }
  1335. rc = iwl_eeprom_acquire_semaphore(priv);
  1336. if (rc < 0) {
  1337. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1338. return -ENOENT;
  1339. }
  1340. /* eeprom is an array of 16bit values */
  1341. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1342. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1343. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1344. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1345. i += IWL_EEPROM_ACCESS_DELAY) {
  1346. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1347. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1348. break;
  1349. udelay(IWL_EEPROM_ACCESS_DELAY);
  1350. }
  1351. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1352. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1353. rc = -ETIMEDOUT;
  1354. goto done;
  1355. }
  1356. e[addr / 2] = le16_to_cpu(r >> 16);
  1357. }
  1358. rc = 0;
  1359. done:
  1360. iwl_eeprom_release_semaphore(priv);
  1361. return rc;
  1362. }
  1363. /******************************************************************************
  1364. *
  1365. * Misc. internal state and helper functions
  1366. *
  1367. ******************************************************************************/
  1368. #ifdef CONFIG_IWLWIFI_DEBUG
  1369. /**
  1370. * iwl_report_frame - dump frame to syslog during debug sessions
  1371. *
  1372. * hack this function to show different aspects of received frames,
  1373. * including selective frame dumps.
  1374. * group100 parameter selects whether to show 1 out of 100 good frames.
  1375. *
  1376. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1377. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1378. * is 3945-specific and gives bad output for 4965. Need to split the
  1379. * functionality, keep common stuff here.
  1380. */
  1381. void iwl_report_frame(struct iwl_priv *priv,
  1382. struct iwl_rx_packet *pkt,
  1383. struct ieee80211_hdr *header, int group100)
  1384. {
  1385. u32 to_us;
  1386. u32 print_summary = 0;
  1387. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1388. u32 hundred = 0;
  1389. u32 dataframe = 0;
  1390. u16 fc;
  1391. u16 seq_ctl;
  1392. u16 channel;
  1393. u16 phy_flags;
  1394. int rate_sym;
  1395. u16 length;
  1396. u16 status;
  1397. u16 bcn_tmr;
  1398. u32 tsf_low;
  1399. u64 tsf;
  1400. u8 rssi;
  1401. u8 agc;
  1402. u16 sig_avg;
  1403. u16 noise_diff;
  1404. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1405. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1406. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1407. u8 *data = IWL_RX_DATA(pkt);
  1408. /* MAC header */
  1409. fc = le16_to_cpu(header->frame_control);
  1410. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1411. /* metadata */
  1412. channel = le16_to_cpu(rx_hdr->channel);
  1413. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1414. rate_sym = rx_hdr->rate;
  1415. length = le16_to_cpu(rx_hdr->len);
  1416. /* end-of-frame status and timestamp */
  1417. status = le32_to_cpu(rx_end->status);
  1418. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1419. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1420. tsf = le64_to_cpu(rx_end->timestamp);
  1421. /* signal statistics */
  1422. rssi = rx_stats->rssi;
  1423. agc = rx_stats->agc;
  1424. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1425. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1426. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1427. /* if data frame is to us and all is good,
  1428. * (optionally) print summary for only 1 out of every 100 */
  1429. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1430. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1431. dataframe = 1;
  1432. if (!group100)
  1433. print_summary = 1; /* print each frame */
  1434. else if (priv->framecnt_to_us < 100) {
  1435. priv->framecnt_to_us++;
  1436. print_summary = 0;
  1437. } else {
  1438. priv->framecnt_to_us = 0;
  1439. print_summary = 1;
  1440. hundred = 1;
  1441. }
  1442. } else {
  1443. /* print summary for all other frames */
  1444. print_summary = 1;
  1445. }
  1446. if (print_summary) {
  1447. char *title;
  1448. u32 rate;
  1449. if (hundred)
  1450. title = "100Frames";
  1451. else if (fc & IEEE80211_FCTL_RETRY)
  1452. title = "Retry";
  1453. else if (ieee80211_is_assoc_response(fc))
  1454. title = "AscRsp";
  1455. else if (ieee80211_is_reassoc_response(fc))
  1456. title = "RasRsp";
  1457. else if (ieee80211_is_probe_response(fc)) {
  1458. title = "PrbRsp";
  1459. print_dump = 1; /* dump frame contents */
  1460. } else if (ieee80211_is_beacon(fc)) {
  1461. title = "Beacon";
  1462. print_dump = 1; /* dump frame contents */
  1463. } else if (ieee80211_is_atim(fc))
  1464. title = "ATIM";
  1465. else if (ieee80211_is_auth(fc))
  1466. title = "Auth";
  1467. else if (ieee80211_is_deauth(fc))
  1468. title = "DeAuth";
  1469. else if (ieee80211_is_disassoc(fc))
  1470. title = "DisAssoc";
  1471. else
  1472. title = "Frame";
  1473. rate = iwl_rate_index_from_plcp(rate_sym);
  1474. if (rate == -1)
  1475. rate = 0;
  1476. else
  1477. rate = iwl_rates[rate].ieee / 2;
  1478. /* print frame summary.
  1479. * MAC addresses show just the last byte (for brevity),
  1480. * but you can hack it to show more, if you'd like to. */
  1481. if (dataframe)
  1482. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1483. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1484. title, fc, header->addr1[5],
  1485. length, rssi, channel, rate);
  1486. else {
  1487. /* src/dst addresses assume managed mode */
  1488. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1489. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1490. "phy=0x%02x, chnl=%d\n",
  1491. title, fc, header->addr1[5],
  1492. header->addr3[5], rssi,
  1493. tsf_low - priv->scan_start_tsf,
  1494. phy_flags, channel);
  1495. }
  1496. }
  1497. if (print_dump)
  1498. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1499. }
  1500. #endif
  1501. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1502. {
  1503. if (priv->hw_setting.shared_virt)
  1504. pci_free_consistent(priv->pci_dev,
  1505. sizeof(struct iwl_shared),
  1506. priv->hw_setting.shared_virt,
  1507. priv->hw_setting.shared_phys);
  1508. }
  1509. /**
  1510. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1511. *
  1512. * return : set the bit for each supported rate insert in ie
  1513. */
  1514. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1515. u16 basic_rate, int *left)
  1516. {
  1517. u16 ret_rates = 0, bit;
  1518. int i;
  1519. u8 *cnt = ie;
  1520. u8 *rates = ie + 1;
  1521. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1522. if (bit & supported_rate) {
  1523. ret_rates |= bit;
  1524. rates[*cnt] = iwl_rates[i].ieee |
  1525. ((bit & basic_rate) ? 0x80 : 0x00);
  1526. (*cnt)++;
  1527. (*left)--;
  1528. if ((*left <= 0) ||
  1529. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1530. break;
  1531. }
  1532. }
  1533. return ret_rates;
  1534. }
  1535. #ifdef CONFIG_IWLWIFI_HT
  1536. void static iwl_set_ht_capab(struct ieee80211_hw *hw,
  1537. struct ieee80211_ht_capability *ht_cap,
  1538. u8 use_wide_chan);
  1539. #endif
  1540. /**
  1541. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1542. */
  1543. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1544. struct ieee80211_mgmt *frame,
  1545. int left, int is_direct)
  1546. {
  1547. int len = 0;
  1548. u8 *pos = NULL;
  1549. u16 active_rates, ret_rates, cck_rates;
  1550. /* Make sure there is enough space for the probe request,
  1551. * two mandatory IEs and the data */
  1552. left -= 24;
  1553. if (left < 0)
  1554. return 0;
  1555. len += 24;
  1556. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1557. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1558. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1559. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1560. frame->seq_ctrl = 0;
  1561. /* fill in our indirect SSID IE */
  1562. /* ...next IE... */
  1563. left -= 2;
  1564. if (left < 0)
  1565. return 0;
  1566. len += 2;
  1567. pos = &(frame->u.probe_req.variable[0]);
  1568. *pos++ = WLAN_EID_SSID;
  1569. *pos++ = 0;
  1570. /* fill in our direct SSID IE... */
  1571. if (is_direct) {
  1572. /* ...next IE... */
  1573. left -= 2 + priv->essid_len;
  1574. if (left < 0)
  1575. return 0;
  1576. /* ... fill it in... */
  1577. *pos++ = WLAN_EID_SSID;
  1578. *pos++ = priv->essid_len;
  1579. memcpy(pos, priv->essid, priv->essid_len);
  1580. pos += priv->essid_len;
  1581. len += 2 + priv->essid_len;
  1582. }
  1583. /* fill in supported rate */
  1584. /* ...next IE... */
  1585. left -= 2;
  1586. if (left < 0)
  1587. return 0;
  1588. /* ... fill it in... */
  1589. *pos++ = WLAN_EID_SUPP_RATES;
  1590. *pos = 0;
  1591. priv->active_rate = priv->rates_mask;
  1592. active_rates = priv->active_rate;
  1593. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1594. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1595. ret_rates = iwl_supported_rate_to_ie(pos, cck_rates,
  1596. priv->active_rate_basic, &left);
  1597. active_rates &= ~ret_rates;
  1598. ret_rates = iwl_supported_rate_to_ie(pos, active_rates,
  1599. priv->active_rate_basic, &left);
  1600. active_rates &= ~ret_rates;
  1601. len += 2 + *pos;
  1602. pos += (*pos) + 1;
  1603. if (active_rates == 0)
  1604. goto fill_end;
  1605. /* fill in supported extended rate */
  1606. /* ...next IE... */
  1607. left -= 2;
  1608. if (left < 0)
  1609. return 0;
  1610. /* ... fill it in... */
  1611. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1612. *pos = 0;
  1613. iwl_supported_rate_to_ie(pos, active_rates,
  1614. priv->active_rate_basic, &left);
  1615. if (*pos > 0)
  1616. len += 2 + *pos;
  1617. #ifdef CONFIG_IWLWIFI_HT
  1618. if (is_direct && priv->is_ht_enabled) {
  1619. u8 use_wide_chan = 1;
  1620. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  1621. use_wide_chan = 0;
  1622. pos += (*pos) + 1;
  1623. *pos++ = WLAN_EID_HT_CAPABILITY;
  1624. *pos++ = sizeof(struct ieee80211_ht_capability);
  1625. iwl_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos,
  1626. use_wide_chan);
  1627. len += 2 + sizeof(struct ieee80211_ht_capability);
  1628. }
  1629. #endif /*CONFIG_IWLWIFI_HT */
  1630. fill_end:
  1631. return (u16)len;
  1632. }
  1633. /*
  1634. * QoS support
  1635. */
  1636. #ifdef CONFIG_IWLWIFI_QOS
  1637. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1638. struct iwl_qosparam_cmd *qos)
  1639. {
  1640. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1641. sizeof(struct iwl_qosparam_cmd), qos);
  1642. }
  1643. static void iwl_reset_qos(struct iwl_priv *priv)
  1644. {
  1645. u16 cw_min = 15;
  1646. u16 cw_max = 1023;
  1647. u8 aifs = 2;
  1648. u8 is_legacy = 0;
  1649. unsigned long flags;
  1650. int i;
  1651. spin_lock_irqsave(&priv->lock, flags);
  1652. priv->qos_data.qos_active = 0;
  1653. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1654. if (priv->qos_data.qos_enable)
  1655. priv->qos_data.qos_active = 1;
  1656. if (!(priv->active_rate & 0xfff0)) {
  1657. cw_min = 31;
  1658. is_legacy = 1;
  1659. }
  1660. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1661. if (priv->qos_data.qos_enable)
  1662. priv->qos_data.qos_active = 1;
  1663. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1664. cw_min = 31;
  1665. is_legacy = 1;
  1666. }
  1667. if (priv->qos_data.qos_active)
  1668. aifs = 3;
  1669. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1670. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1671. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1672. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1673. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1674. if (priv->qos_data.qos_active) {
  1675. i = 1;
  1676. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1677. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1678. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1679. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1680. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1681. i = 2;
  1682. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1683. cpu_to_le16((cw_min + 1) / 2 - 1);
  1684. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1685. cpu_to_le16(cw_max);
  1686. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1687. if (is_legacy)
  1688. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1689. cpu_to_le16(6016);
  1690. else
  1691. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1692. cpu_to_le16(3008);
  1693. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1694. i = 3;
  1695. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1696. cpu_to_le16((cw_min + 1) / 4 - 1);
  1697. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1698. cpu_to_le16((cw_max + 1) / 2 - 1);
  1699. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1700. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1701. if (is_legacy)
  1702. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1703. cpu_to_le16(3264);
  1704. else
  1705. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1706. cpu_to_le16(1504);
  1707. } else {
  1708. for (i = 1; i < 4; i++) {
  1709. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1710. cpu_to_le16(cw_min);
  1711. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1712. cpu_to_le16(cw_max);
  1713. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1714. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1715. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1716. }
  1717. }
  1718. IWL_DEBUG_QOS("set QoS to default \n");
  1719. spin_unlock_irqrestore(&priv->lock, flags);
  1720. }
  1721. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1722. {
  1723. unsigned long flags;
  1724. if (priv == NULL)
  1725. return;
  1726. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1727. return;
  1728. if (!priv->qos_data.qos_enable)
  1729. return;
  1730. spin_lock_irqsave(&priv->lock, flags);
  1731. priv->qos_data.def_qos_parm.qos_flags = 0;
  1732. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1733. !priv->qos_data.qos_cap.q_AP.txop_request)
  1734. priv->qos_data.def_qos_parm.qos_flags |=
  1735. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1736. if (priv->qos_data.qos_active)
  1737. priv->qos_data.def_qos_parm.qos_flags |=
  1738. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1739. #ifdef CONFIG_IWLWIFI_HT
  1740. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  1741. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1742. #endif /* CONFIG_IWLWIFI_HT */
  1743. spin_unlock_irqrestore(&priv->lock, flags);
  1744. if (force || iwl_is_associated(priv)) {
  1745. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1746. priv->qos_data.qos_active,
  1747. priv->qos_data.def_qos_parm.qos_flags);
  1748. iwl_send_qos_params_command(priv,
  1749. &(priv->qos_data.def_qos_parm));
  1750. }
  1751. }
  1752. #endif /* CONFIG_IWLWIFI_QOS */
  1753. /*
  1754. * Power management (not Tx power!) functions
  1755. */
  1756. #define MSEC_TO_USEC 1024
  1757. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1758. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1759. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1760. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1761. __constant_cpu_to_le32(X1), \
  1762. __constant_cpu_to_le32(X2), \
  1763. __constant_cpu_to_le32(X3), \
  1764. __constant_cpu_to_le32(X4)}
  1765. /* default power management (not Tx power) table values */
  1766. /* for tim 0-10 */
  1767. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1768. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1769. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1770. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1771. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1772. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1773. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1774. };
  1775. /* for tim > 10 */
  1776. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1777. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1778. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1779. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1780. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1781. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1782. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1783. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1784. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1785. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1786. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1787. };
  1788. int iwl_power_init_handle(struct iwl_priv *priv)
  1789. {
  1790. int rc = 0, i;
  1791. struct iwl_power_mgr *pow_data;
  1792. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1793. u16 pci_pm;
  1794. IWL_DEBUG_POWER("Initialize power \n");
  1795. pow_data = &(priv->power_data);
  1796. memset(pow_data, 0, sizeof(*pow_data));
  1797. pow_data->active_index = IWL_POWER_RANGE_0;
  1798. pow_data->dtim_val = 0xffff;
  1799. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1800. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1801. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1802. if (rc != 0)
  1803. return 0;
  1804. else {
  1805. struct iwl_powertable_cmd *cmd;
  1806. IWL_DEBUG_POWER("adjust power command flags\n");
  1807. for (i = 0; i < IWL_POWER_AC; i++) {
  1808. cmd = &pow_data->pwr_range_0[i].cmd;
  1809. if (pci_pm & 0x1)
  1810. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1811. else
  1812. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1813. }
  1814. }
  1815. return rc;
  1816. }
  1817. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1818. struct iwl_powertable_cmd *cmd, u32 mode)
  1819. {
  1820. int rc = 0, i;
  1821. u8 skip;
  1822. u32 max_sleep = 0;
  1823. struct iwl_power_vec_entry *range;
  1824. u8 period = 0;
  1825. struct iwl_power_mgr *pow_data;
  1826. if (mode > IWL_POWER_INDEX_5) {
  1827. IWL_DEBUG_POWER("Error invalid power mode \n");
  1828. return -1;
  1829. }
  1830. pow_data = &(priv->power_data);
  1831. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1832. range = &pow_data->pwr_range_0[0];
  1833. else
  1834. range = &pow_data->pwr_range_1[1];
  1835. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1836. #ifdef IWL_MAC80211_DISABLE
  1837. if (priv->assoc_network != NULL) {
  1838. unsigned long flags;
  1839. period = priv->assoc_network->tim.tim_period;
  1840. }
  1841. #endif /*IWL_MAC80211_DISABLE */
  1842. skip = range[mode].no_dtim;
  1843. if (period == 0) {
  1844. period = 1;
  1845. skip = 0;
  1846. }
  1847. if (skip == 0) {
  1848. max_sleep = period;
  1849. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1850. } else {
  1851. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1852. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1853. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1854. }
  1855. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1856. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1857. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1858. }
  1859. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1860. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1861. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1862. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1863. le32_to_cpu(cmd->sleep_interval[0]),
  1864. le32_to_cpu(cmd->sleep_interval[1]),
  1865. le32_to_cpu(cmd->sleep_interval[2]),
  1866. le32_to_cpu(cmd->sleep_interval[3]),
  1867. le32_to_cpu(cmd->sleep_interval[4]));
  1868. return rc;
  1869. }
  1870. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1871. {
  1872. u32 final_mode = mode;
  1873. int rc;
  1874. struct iwl_powertable_cmd cmd;
  1875. /* If on battery, set to 3,
  1876. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1877. * else user level */
  1878. switch (mode) {
  1879. case IWL_POWER_BATTERY:
  1880. final_mode = IWL_POWER_INDEX_3;
  1881. break;
  1882. case IWL_POWER_AC:
  1883. final_mode = IWL_POWER_MODE_CAM;
  1884. break;
  1885. default:
  1886. final_mode = mode;
  1887. break;
  1888. }
  1889. cmd.keep_alive_beacons = 0;
  1890. iwl_update_power_cmd(priv, &cmd, final_mode);
  1891. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1892. if (final_mode == IWL_POWER_MODE_CAM)
  1893. clear_bit(STATUS_POWER_PMI, &priv->status);
  1894. else
  1895. set_bit(STATUS_POWER_PMI, &priv->status);
  1896. return rc;
  1897. }
  1898. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1899. {
  1900. /* Filter incoming packets to determine if they are targeted toward
  1901. * this network, discarding packets coming from ourselves */
  1902. switch (priv->iw_mode) {
  1903. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1904. /* packets from our adapter are dropped (echo) */
  1905. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1906. return 0;
  1907. /* {broad,multi}cast packets to our IBSS go through */
  1908. if (is_multicast_ether_addr(header->addr1))
  1909. return !compare_ether_addr(header->addr3, priv->bssid);
  1910. /* packets to our adapter go through */
  1911. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1912. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1913. /* packets from our adapter are dropped (echo) */
  1914. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1915. return 0;
  1916. /* {broad,multi}cast packets to our BSS go through */
  1917. if (is_multicast_ether_addr(header->addr1))
  1918. return !compare_ether_addr(header->addr2, priv->bssid);
  1919. /* packets to our adapter go through */
  1920. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1921. }
  1922. return 1;
  1923. }
  1924. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1925. const char *iwl_get_tx_fail_reason(u32 status)
  1926. {
  1927. switch (status & TX_STATUS_MSK) {
  1928. case TX_STATUS_SUCCESS:
  1929. return "SUCCESS";
  1930. TX_STATUS_ENTRY(SHORT_LIMIT);
  1931. TX_STATUS_ENTRY(LONG_LIMIT);
  1932. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1933. TX_STATUS_ENTRY(MGMNT_ABORT);
  1934. TX_STATUS_ENTRY(NEXT_FRAG);
  1935. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1936. TX_STATUS_ENTRY(DEST_PS);
  1937. TX_STATUS_ENTRY(ABORTED);
  1938. TX_STATUS_ENTRY(BT_RETRY);
  1939. TX_STATUS_ENTRY(STA_INVALID);
  1940. TX_STATUS_ENTRY(FRAG_DROPPED);
  1941. TX_STATUS_ENTRY(TID_DISABLE);
  1942. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1943. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1944. TX_STATUS_ENTRY(TX_LOCKED);
  1945. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1946. }
  1947. return "UNKNOWN";
  1948. }
  1949. /**
  1950. * iwl_scan_cancel - Cancel any currently executing HW scan
  1951. *
  1952. * NOTE: priv->mutex is not required before calling this function
  1953. */
  1954. static int iwl_scan_cancel(struct iwl_priv *priv)
  1955. {
  1956. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1957. clear_bit(STATUS_SCANNING, &priv->status);
  1958. return 0;
  1959. }
  1960. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1961. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1962. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1963. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1964. queue_work(priv->workqueue, &priv->abort_scan);
  1965. } else
  1966. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1967. return test_bit(STATUS_SCANNING, &priv->status);
  1968. }
  1969. return 0;
  1970. }
  1971. /**
  1972. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1973. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1974. *
  1975. * NOTE: priv->mutex must be held before calling this function
  1976. */
  1977. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1978. {
  1979. unsigned long now = jiffies;
  1980. int ret;
  1981. ret = iwl_scan_cancel(priv);
  1982. if (ret && ms) {
  1983. mutex_unlock(&priv->mutex);
  1984. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1985. test_bit(STATUS_SCANNING, &priv->status))
  1986. msleep(1);
  1987. mutex_lock(&priv->mutex);
  1988. return test_bit(STATUS_SCANNING, &priv->status);
  1989. }
  1990. return ret;
  1991. }
  1992. static void iwl_sequence_reset(struct iwl_priv *priv)
  1993. {
  1994. /* Reset ieee stats */
  1995. /* We don't reset the net_device_stats (ieee->stats) on
  1996. * re-association */
  1997. priv->last_seq_num = -1;
  1998. priv->last_frag_num = -1;
  1999. priv->last_packet_time = 0;
  2000. iwl_scan_cancel(priv);
  2001. }
  2002. #define MAX_UCODE_BEACON_INTERVAL 4096
  2003. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2004. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  2005. {
  2006. u16 new_val = 0;
  2007. u16 beacon_factor = 0;
  2008. beacon_factor =
  2009. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2010. / MAX_UCODE_BEACON_INTERVAL;
  2011. new_val = beacon_val / beacon_factor;
  2012. return cpu_to_le16(new_val);
  2013. }
  2014. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  2015. {
  2016. u64 interval_tm_unit;
  2017. u64 tsf, result;
  2018. unsigned long flags;
  2019. struct ieee80211_conf *conf = NULL;
  2020. u16 beacon_int = 0;
  2021. conf = ieee80211_get_hw_conf(priv->hw);
  2022. spin_lock_irqsave(&priv->lock, flags);
  2023. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2024. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2025. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2026. tsf = priv->timestamp1;
  2027. tsf = ((tsf << 32) | priv->timestamp0);
  2028. beacon_int = priv->beacon_int;
  2029. spin_unlock_irqrestore(&priv->lock, flags);
  2030. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2031. if (beacon_int == 0) {
  2032. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2033. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2034. } else {
  2035. priv->rxon_timing.beacon_interval =
  2036. cpu_to_le16(beacon_int);
  2037. priv->rxon_timing.beacon_interval =
  2038. iwl_adjust_beacon_interval(
  2039. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2040. }
  2041. priv->rxon_timing.atim_window = 0;
  2042. } else {
  2043. priv->rxon_timing.beacon_interval =
  2044. iwl_adjust_beacon_interval(conf->beacon_int);
  2045. /* TODO: we need to get atim_window from upper stack
  2046. * for now we set to 0 */
  2047. priv->rxon_timing.atim_window = 0;
  2048. }
  2049. interval_tm_unit =
  2050. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2051. result = do_div(tsf, interval_tm_unit);
  2052. priv->rxon_timing.beacon_init_val =
  2053. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2054. IWL_DEBUG_ASSOC
  2055. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2056. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2057. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2058. le16_to_cpu(priv->rxon_timing.atim_window));
  2059. }
  2060. static int iwl_scan_initiate(struct iwl_priv *priv)
  2061. {
  2062. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2063. IWL_ERROR("APs don't scan.\n");
  2064. return 0;
  2065. }
  2066. if (!iwl_is_ready_rf(priv)) {
  2067. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2068. return -EIO;
  2069. }
  2070. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2071. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2072. return -EAGAIN;
  2073. }
  2074. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2075. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2076. "Queuing.\n");
  2077. return -EAGAIN;
  2078. }
  2079. IWL_DEBUG_INFO("Starting scan...\n");
  2080. priv->scan_bands = 2;
  2081. set_bit(STATUS_SCANNING, &priv->status);
  2082. priv->scan_start = jiffies;
  2083. priv->scan_pass_start = priv->scan_start;
  2084. queue_work(priv->workqueue, &priv->request_scan);
  2085. return 0;
  2086. }
  2087. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2088. {
  2089. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2090. if (hw_decrypt)
  2091. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2092. else
  2093. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2094. return 0;
  2095. }
  2096. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2097. {
  2098. if (phymode == MODE_IEEE80211A) {
  2099. priv->staging_rxon.flags &=
  2100. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2101. | RXON_FLG_CCK_MSK);
  2102. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2103. } else {
  2104. /* Copied from iwl_bg_post_associate() */
  2105. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2106. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2107. else
  2108. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2109. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2110. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2111. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2112. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2113. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2114. }
  2115. }
  2116. /*
  2117. * initialize rxon structure with default values from eeprom
  2118. */
  2119. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2120. {
  2121. const struct iwl_channel_info *ch_info;
  2122. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2123. switch (priv->iw_mode) {
  2124. case IEEE80211_IF_TYPE_AP:
  2125. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2126. break;
  2127. case IEEE80211_IF_TYPE_STA:
  2128. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2129. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2130. break;
  2131. case IEEE80211_IF_TYPE_IBSS:
  2132. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2133. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2134. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2135. RXON_FILTER_ACCEPT_GRP_MSK;
  2136. break;
  2137. case IEEE80211_IF_TYPE_MNTR:
  2138. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2139. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2140. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2141. break;
  2142. }
  2143. #if 0
  2144. /* TODO: Figure out when short_preamble would be set and cache from
  2145. * that */
  2146. if (!hw_to_local(priv->hw)->short_preamble)
  2147. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2148. else
  2149. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2150. #endif
  2151. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2152. le16_to_cpu(priv->staging_rxon.channel));
  2153. if (!ch_info)
  2154. ch_info = &priv->channel_info[0];
  2155. /*
  2156. * in some case A channels are all non IBSS
  2157. * in this case force B/G channel
  2158. */
  2159. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2160. !(is_channel_ibss(ch_info)))
  2161. ch_info = &priv->channel_info[0];
  2162. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2163. if (is_channel_a_band(ch_info))
  2164. priv->phymode = MODE_IEEE80211A;
  2165. else
  2166. priv->phymode = MODE_IEEE80211G;
  2167. iwl_set_flags_for_phymode(priv, priv->phymode);
  2168. priv->staging_rxon.ofdm_basic_rates =
  2169. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2170. priv->staging_rxon.cck_basic_rates =
  2171. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2172. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2173. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2174. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2175. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2176. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2177. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2178. iwl4965_set_rxon_chain(priv);
  2179. }
  2180. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2181. {
  2182. if (!iwl_is_ready_rf(priv))
  2183. return -EAGAIN;
  2184. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2185. const struct iwl_channel_info *ch_info;
  2186. ch_info = iwl_get_channel_info(priv,
  2187. priv->phymode,
  2188. le16_to_cpu(priv->staging_rxon.channel));
  2189. if (!ch_info || !is_channel_ibss(ch_info)) {
  2190. IWL_ERROR("channel %d not IBSS channel\n",
  2191. le16_to_cpu(priv->staging_rxon.channel));
  2192. return -EINVAL;
  2193. }
  2194. }
  2195. cancel_delayed_work(&priv->scan_check);
  2196. if (iwl_scan_cancel_timeout(priv, 100)) {
  2197. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2198. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2199. return -EAGAIN;
  2200. }
  2201. priv->iw_mode = mode;
  2202. iwl_connection_init_rx_config(priv);
  2203. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2204. iwl_clear_stations_table(priv);
  2205. iwl_commit_rxon(priv);
  2206. return 0;
  2207. }
  2208. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2209. struct ieee80211_tx_control *ctl,
  2210. struct iwl_cmd *cmd,
  2211. struct sk_buff *skb_frag,
  2212. int last_frag)
  2213. {
  2214. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2215. switch (keyinfo->alg) {
  2216. case ALG_CCMP:
  2217. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2218. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2219. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2220. break;
  2221. case ALG_TKIP:
  2222. #if 0
  2223. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2224. if (last_frag)
  2225. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2226. 8);
  2227. else
  2228. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2229. #endif
  2230. break;
  2231. case ALG_WEP:
  2232. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2233. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2234. if (keyinfo->keylen == 13)
  2235. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2236. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2237. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2238. "with key %d\n", ctl->key_idx);
  2239. break;
  2240. default:
  2241. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2242. break;
  2243. }
  2244. }
  2245. /*
  2246. * handle build REPLY_TX command notification.
  2247. */
  2248. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2249. struct iwl_cmd *cmd,
  2250. struct ieee80211_tx_control *ctrl,
  2251. struct ieee80211_hdr *hdr,
  2252. int is_unicast, u8 std_id)
  2253. {
  2254. __le16 *qc;
  2255. u16 fc = le16_to_cpu(hdr->frame_control);
  2256. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2257. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2258. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2259. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2260. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2261. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2262. if (ieee80211_is_probe_response(fc) &&
  2263. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2264. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2265. } else {
  2266. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2267. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2268. }
  2269. cmd->cmd.tx.sta_id = std_id;
  2270. if (ieee80211_get_morefrag(hdr))
  2271. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2272. qc = ieee80211_get_qos_ctrl(hdr);
  2273. if (qc) {
  2274. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2275. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2276. } else
  2277. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2278. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2279. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2280. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2281. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2282. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2283. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2284. }
  2285. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2286. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2287. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2288. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2289. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2290. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2291. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2292. else
  2293. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2294. } else
  2295. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2296. cmd->cmd.tx.driver_txop = 0;
  2297. cmd->cmd.tx.tx_flags = tx_flags;
  2298. cmd->cmd.tx.next_frame_len = 0;
  2299. }
  2300. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2301. {
  2302. int sta_id;
  2303. u16 fc = le16_to_cpu(hdr->frame_control);
  2304. DECLARE_MAC_BUF(mac);
  2305. /* If this frame is broadcast or not data then use the broadcast
  2306. * station id */
  2307. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2308. is_multicast_ether_addr(hdr->addr1))
  2309. return priv->hw_setting.bcast_sta_id;
  2310. switch (priv->iw_mode) {
  2311. /* If this frame is part of a BSS network (we're a station), then
  2312. * we use the AP's station id */
  2313. case IEEE80211_IF_TYPE_STA:
  2314. return IWL_AP_ID;
  2315. /* If we are an AP, then find the station, or use BCAST */
  2316. case IEEE80211_IF_TYPE_AP:
  2317. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2318. if (sta_id != IWL_INVALID_STATION)
  2319. return sta_id;
  2320. return priv->hw_setting.bcast_sta_id;
  2321. /* If this frame is part of a IBSS network, then we use the
  2322. * target specific station id */
  2323. case IEEE80211_IF_TYPE_IBSS:
  2324. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2325. if (sta_id != IWL_INVALID_STATION)
  2326. return sta_id;
  2327. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2328. if (sta_id != IWL_INVALID_STATION)
  2329. return sta_id;
  2330. IWL_DEBUG_DROP("Station %s not in station map. "
  2331. "Defaulting to broadcast...\n",
  2332. print_mac(mac, hdr->addr1));
  2333. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2334. return priv->hw_setting.bcast_sta_id;
  2335. default:
  2336. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2337. return priv->hw_setting.bcast_sta_id;
  2338. }
  2339. }
  2340. /*
  2341. * start REPLY_TX command process
  2342. */
  2343. static int iwl_tx_skb(struct iwl_priv *priv,
  2344. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2345. {
  2346. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2347. struct iwl_tfd_frame *tfd;
  2348. u32 *control_flags;
  2349. int txq_id = ctl->queue;
  2350. struct iwl_tx_queue *txq = NULL;
  2351. struct iwl_queue *q = NULL;
  2352. dma_addr_t phys_addr;
  2353. dma_addr_t txcmd_phys;
  2354. struct iwl_cmd *out_cmd = NULL;
  2355. u16 len, idx, len_org;
  2356. u8 id, hdr_len, unicast;
  2357. u8 sta_id;
  2358. u16 seq_number = 0;
  2359. u16 fc;
  2360. __le16 *qc;
  2361. u8 wait_write_ptr = 0;
  2362. unsigned long flags;
  2363. int rc;
  2364. spin_lock_irqsave(&priv->lock, flags);
  2365. if (iwl_is_rfkill(priv)) {
  2366. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2367. goto drop_unlock;
  2368. }
  2369. if (!priv->interface_id) {
  2370. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2371. goto drop_unlock;
  2372. }
  2373. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2374. IWL_ERROR("ERROR: No TX rate available.\n");
  2375. goto drop_unlock;
  2376. }
  2377. unicast = !is_multicast_ether_addr(hdr->addr1);
  2378. id = 0;
  2379. fc = le16_to_cpu(hdr->frame_control);
  2380. #ifdef CONFIG_IWLWIFI_DEBUG
  2381. if (ieee80211_is_auth(fc))
  2382. IWL_DEBUG_TX("Sending AUTH frame\n");
  2383. else if (ieee80211_is_assoc_request(fc))
  2384. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2385. else if (ieee80211_is_reassoc_request(fc))
  2386. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2387. #endif
  2388. if (!iwl_is_associated(priv) &&
  2389. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2390. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2391. goto drop_unlock;
  2392. }
  2393. spin_unlock_irqrestore(&priv->lock, flags);
  2394. hdr_len = ieee80211_get_hdrlen(fc);
  2395. sta_id = iwl_get_sta_id(priv, hdr);
  2396. if (sta_id == IWL_INVALID_STATION) {
  2397. DECLARE_MAC_BUF(mac);
  2398. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2399. print_mac(mac, hdr->addr1));
  2400. goto drop;
  2401. }
  2402. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2403. qc = ieee80211_get_qos_ctrl(hdr);
  2404. if (qc) {
  2405. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2406. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2407. IEEE80211_SCTL_SEQ;
  2408. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2409. (hdr->seq_ctrl &
  2410. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2411. seq_number += 0x10;
  2412. #ifdef CONFIG_IWLWIFI_HT
  2413. #ifdef CONFIG_IWLWIFI_HT_AGG
  2414. /* aggregation is on for this <sta,tid> */
  2415. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2416. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2417. #endif /* CONFIG_IWLWIFI_HT_AGG */
  2418. #endif /* CONFIG_IWLWIFI_HT */
  2419. }
  2420. txq = &priv->txq[txq_id];
  2421. q = &txq->q;
  2422. spin_lock_irqsave(&priv->lock, flags);
  2423. tfd = &txq->bd[q->write_ptr];
  2424. memset(tfd, 0, sizeof(*tfd));
  2425. control_flags = (u32 *) tfd;
  2426. idx = get_cmd_index(q, q->write_ptr, 0);
  2427. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  2428. txq->txb[q->write_ptr].skb[0] = skb;
  2429. memcpy(&(txq->txb[q->write_ptr].status.control),
  2430. ctl, sizeof(struct ieee80211_tx_control));
  2431. out_cmd = &txq->cmd[idx];
  2432. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2433. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2434. out_cmd->hdr.cmd = REPLY_TX;
  2435. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2436. INDEX_TO_SEQ(q->write_ptr)));
  2437. /* copy frags header */
  2438. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2439. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2440. len = priv->hw_setting.tx_cmd_len +
  2441. sizeof(struct iwl_cmd_header) + hdr_len;
  2442. len_org = len;
  2443. len = (len + 3) & ~3;
  2444. if (len_org != len)
  2445. len_org = 1;
  2446. else
  2447. len_org = 0;
  2448. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2449. offsetof(struct iwl_cmd, hdr);
  2450. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2451. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2452. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2453. /* 802.11 null functions have no payload... */
  2454. len = skb->len - hdr_len;
  2455. if (len) {
  2456. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2457. len, PCI_DMA_TODEVICE);
  2458. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2459. }
  2460. if (len_org)
  2461. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2462. len = (u16)skb->len;
  2463. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2464. /* TODO need this for burst mode later on */
  2465. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2466. /* set is_hcca to 0; it probably will never be implemented */
  2467. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2468. iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
  2469. hdr, hdr_len, ctl, NULL);
  2470. if (!ieee80211_get_morefrag(hdr)) {
  2471. txq->need_update = 1;
  2472. if (qc) {
  2473. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2474. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2475. }
  2476. } else {
  2477. wait_write_ptr = 1;
  2478. txq->need_update = 0;
  2479. }
  2480. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2481. sizeof(out_cmd->cmd.tx));
  2482. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2483. ieee80211_get_hdrlen(fc));
  2484. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2485. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2486. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2487. spin_unlock_irqrestore(&priv->lock, flags);
  2488. if (rc)
  2489. return rc;
  2490. if ((iwl_queue_space(q) < q->high_mark)
  2491. && priv->mac80211_registered) {
  2492. if (wait_write_ptr) {
  2493. spin_lock_irqsave(&priv->lock, flags);
  2494. txq->need_update = 1;
  2495. iwl_tx_queue_update_write_ptr(priv, txq);
  2496. spin_unlock_irqrestore(&priv->lock, flags);
  2497. }
  2498. ieee80211_stop_queue(priv->hw, ctl->queue);
  2499. }
  2500. return 0;
  2501. drop_unlock:
  2502. spin_unlock_irqrestore(&priv->lock, flags);
  2503. drop:
  2504. return -1;
  2505. }
  2506. static void iwl_set_rate(struct iwl_priv *priv)
  2507. {
  2508. const struct ieee80211_hw_mode *hw = NULL;
  2509. struct ieee80211_rate *rate;
  2510. int i;
  2511. hw = iwl_get_hw_mode(priv, priv->phymode);
  2512. if (!hw) {
  2513. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2514. return;
  2515. }
  2516. priv->active_rate = 0;
  2517. priv->active_rate_basic = 0;
  2518. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2519. hw->mode == MODE_IEEE80211A ?
  2520. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2521. for (i = 0; i < hw->num_rates; i++) {
  2522. rate = &(hw->rates[i]);
  2523. if ((rate->val < IWL_RATE_COUNT) &&
  2524. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2525. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2526. rate->val, iwl_rates[rate->val].plcp,
  2527. (rate->flags & IEEE80211_RATE_BASIC) ?
  2528. "*" : "");
  2529. priv->active_rate |= (1 << rate->val);
  2530. if (rate->flags & IEEE80211_RATE_BASIC)
  2531. priv->active_rate_basic |= (1 << rate->val);
  2532. } else
  2533. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2534. rate->val, iwl_rates[rate->val].plcp);
  2535. }
  2536. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2537. priv->active_rate, priv->active_rate_basic);
  2538. /*
  2539. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2540. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2541. * OFDM
  2542. */
  2543. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2544. priv->staging_rxon.cck_basic_rates =
  2545. ((priv->active_rate_basic &
  2546. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2547. else
  2548. priv->staging_rxon.cck_basic_rates =
  2549. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2550. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2551. priv->staging_rxon.ofdm_basic_rates =
  2552. ((priv->active_rate_basic &
  2553. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2554. IWL_FIRST_OFDM_RATE) & 0xFF;
  2555. else
  2556. priv->staging_rxon.ofdm_basic_rates =
  2557. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2558. }
  2559. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2560. {
  2561. unsigned long flags;
  2562. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2563. return;
  2564. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2565. disable_radio ? "OFF" : "ON");
  2566. if (disable_radio) {
  2567. iwl_scan_cancel(priv);
  2568. /* FIXME: This is a workaround for AP */
  2569. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2570. spin_lock_irqsave(&priv->lock, flags);
  2571. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2572. CSR_UCODE_SW_BIT_RFKILL);
  2573. spin_unlock_irqrestore(&priv->lock, flags);
  2574. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2575. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2576. }
  2577. return;
  2578. }
  2579. spin_lock_irqsave(&priv->lock, flags);
  2580. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2581. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2582. spin_unlock_irqrestore(&priv->lock, flags);
  2583. /* wake up ucode */
  2584. msleep(10);
  2585. spin_lock_irqsave(&priv->lock, flags);
  2586. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2587. if (!iwl_grab_restricted_access(priv))
  2588. iwl_release_restricted_access(priv);
  2589. spin_unlock_irqrestore(&priv->lock, flags);
  2590. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2591. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2592. "disabled by HW switch\n");
  2593. return;
  2594. }
  2595. queue_work(priv->workqueue, &priv->restart);
  2596. return;
  2597. }
  2598. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2599. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2600. {
  2601. u16 fc =
  2602. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2603. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2604. return;
  2605. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2606. return;
  2607. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2608. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2609. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2610. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2611. RX_RES_STATUS_BAD_ICV_MIC)
  2612. stats->flag |= RX_FLAG_MMIC_ERROR;
  2613. case RX_RES_STATUS_SEC_TYPE_WEP:
  2614. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2615. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2616. RX_RES_STATUS_DECRYPT_OK) {
  2617. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2618. stats->flag |= RX_FLAG_DECRYPTED;
  2619. }
  2620. break;
  2621. default:
  2622. break;
  2623. }
  2624. }
  2625. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2626. struct iwl_rx_mem_buffer *rxb,
  2627. void *data, short len,
  2628. struct ieee80211_rx_status *stats,
  2629. u16 phy_flags)
  2630. {
  2631. struct iwl_rt_rx_hdr *iwl_rt;
  2632. /* First cache any information we need before we overwrite
  2633. * the information provided in the skb from the hardware */
  2634. s8 signal = stats->ssi;
  2635. s8 noise = 0;
  2636. int rate = stats->rate;
  2637. u64 tsf = stats->mactime;
  2638. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2639. /* We received data from the HW, so stop the watchdog */
  2640. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2641. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2642. return;
  2643. }
  2644. /* copy the frame data to write after where the radiotap header goes */
  2645. iwl_rt = (void *)rxb->skb->data;
  2646. memmove(iwl_rt->payload, data, len);
  2647. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2648. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2649. /* total header + data */
  2650. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2651. /* Set the size of the skb to the size of the frame */
  2652. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2653. /* Big bitfield of all the fields we provide in radiotap */
  2654. iwl_rt->rt_hdr.it_present =
  2655. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2656. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2657. (1 << IEEE80211_RADIOTAP_RATE) |
  2658. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2659. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2660. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2661. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2662. /* Zero the flags, we'll add to them as we go */
  2663. iwl_rt->rt_flags = 0;
  2664. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2665. /* Convert to dBm */
  2666. iwl_rt->rt_dbmsignal = signal;
  2667. iwl_rt->rt_dbmnoise = noise;
  2668. /* Convert the channel frequency and set the flags */
  2669. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2670. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2671. iwl_rt->rt_chbitmask =
  2672. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2673. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2674. iwl_rt->rt_chbitmask =
  2675. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2676. else /* 802.11g */
  2677. iwl_rt->rt_chbitmask =
  2678. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2679. rate = iwl_rate_index_from_plcp(rate);
  2680. if (rate == -1)
  2681. iwl_rt->rt_rate = 0;
  2682. else
  2683. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2684. /* antenna number */
  2685. iwl_rt->rt_antenna =
  2686. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2687. /* set the preamble flag if we have it */
  2688. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2689. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2690. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2691. stats->flag |= RX_FLAG_RADIOTAP;
  2692. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2693. rxb->skb = NULL;
  2694. }
  2695. #define IWL_PACKET_RETRY_TIME HZ
  2696. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2697. {
  2698. u16 sc = le16_to_cpu(header->seq_ctrl);
  2699. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2700. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2701. u16 *last_seq, *last_frag;
  2702. unsigned long *last_time;
  2703. switch (priv->iw_mode) {
  2704. case IEEE80211_IF_TYPE_IBSS:{
  2705. struct list_head *p;
  2706. struct iwl_ibss_seq *entry = NULL;
  2707. u8 *mac = header->addr2;
  2708. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2709. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2710. entry = list_entry(p, struct iwl_ibss_seq, list);
  2711. if (!compare_ether_addr(entry->mac, mac))
  2712. break;
  2713. }
  2714. if (p == &priv->ibss_mac_hash[index]) {
  2715. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2716. if (!entry) {
  2717. IWL_ERROR("Cannot malloc new mac entry\n");
  2718. return 0;
  2719. }
  2720. memcpy(entry->mac, mac, ETH_ALEN);
  2721. entry->seq_num = seq;
  2722. entry->frag_num = frag;
  2723. entry->packet_time = jiffies;
  2724. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2725. return 0;
  2726. }
  2727. last_seq = &entry->seq_num;
  2728. last_frag = &entry->frag_num;
  2729. last_time = &entry->packet_time;
  2730. break;
  2731. }
  2732. case IEEE80211_IF_TYPE_STA:
  2733. last_seq = &priv->last_seq_num;
  2734. last_frag = &priv->last_frag_num;
  2735. last_time = &priv->last_packet_time;
  2736. break;
  2737. default:
  2738. return 0;
  2739. }
  2740. if ((*last_seq == seq) &&
  2741. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2742. if (*last_frag == frag)
  2743. goto drop;
  2744. if (*last_frag + 1 != frag)
  2745. /* out-of-order fragment */
  2746. goto drop;
  2747. } else
  2748. *last_seq = seq;
  2749. *last_frag = frag;
  2750. *last_time = jiffies;
  2751. return 0;
  2752. drop:
  2753. return 1;
  2754. }
  2755. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2756. #include "iwl-spectrum.h"
  2757. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2758. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2759. #define TIME_UNIT 1024
  2760. /*
  2761. * extended beacon time format
  2762. * time in usec will be changed into a 32-bit value in 8:24 format
  2763. * the high 1 byte is the beacon counts
  2764. * the lower 3 bytes is the time in usec within one beacon interval
  2765. */
  2766. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2767. {
  2768. u32 quot;
  2769. u32 rem;
  2770. u32 interval = beacon_interval * 1024;
  2771. if (!interval || !usec)
  2772. return 0;
  2773. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2774. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2775. return (quot << 24) + rem;
  2776. }
  2777. /* base is usually what we get from ucode with each received frame,
  2778. * the same as HW timer counter counting down
  2779. */
  2780. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2781. {
  2782. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2783. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2784. u32 interval = beacon_interval * TIME_UNIT;
  2785. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2786. (addon & BEACON_TIME_MASK_HIGH);
  2787. if (base_low > addon_low)
  2788. res += base_low - addon_low;
  2789. else if (base_low < addon_low) {
  2790. res += interval + base_low - addon_low;
  2791. res += (1 << 24);
  2792. } else
  2793. res += (1 << 24);
  2794. return cpu_to_le32(res);
  2795. }
  2796. static int iwl_get_measurement(struct iwl_priv *priv,
  2797. struct ieee80211_measurement_params *params,
  2798. u8 type)
  2799. {
  2800. struct iwl_spectrum_cmd spectrum;
  2801. struct iwl_rx_packet *res;
  2802. struct iwl_host_cmd cmd = {
  2803. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2804. .data = (void *)&spectrum,
  2805. .meta.flags = CMD_WANT_SKB,
  2806. };
  2807. u32 add_time = le64_to_cpu(params->start_time);
  2808. int rc;
  2809. int spectrum_resp_status;
  2810. int duration = le16_to_cpu(params->duration);
  2811. if (iwl_is_associated(priv))
  2812. add_time =
  2813. iwl_usecs_to_beacons(
  2814. le64_to_cpu(params->start_time) - priv->last_tsf,
  2815. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2816. memset(&spectrum, 0, sizeof(spectrum));
  2817. spectrum.channel_count = cpu_to_le16(1);
  2818. spectrum.flags =
  2819. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2820. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2821. cmd.len = sizeof(spectrum);
  2822. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2823. if (iwl_is_associated(priv))
  2824. spectrum.start_time =
  2825. iwl_add_beacon_time(priv->last_beacon_time,
  2826. add_time,
  2827. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2828. else
  2829. spectrum.start_time = 0;
  2830. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2831. spectrum.channels[0].channel = params->channel;
  2832. spectrum.channels[0].type = type;
  2833. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2834. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2835. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2836. rc = iwl_send_cmd_sync(priv, &cmd);
  2837. if (rc)
  2838. return rc;
  2839. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2840. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2841. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2842. rc = -EIO;
  2843. }
  2844. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2845. switch (spectrum_resp_status) {
  2846. case 0: /* Command will be handled */
  2847. if (res->u.spectrum.id != 0xff) {
  2848. IWL_DEBUG_INFO
  2849. ("Replaced existing measurement: %d\n",
  2850. res->u.spectrum.id);
  2851. priv->measurement_status &= ~MEASUREMENT_READY;
  2852. }
  2853. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2854. rc = 0;
  2855. break;
  2856. case 1: /* Command will not be handled */
  2857. rc = -EAGAIN;
  2858. break;
  2859. }
  2860. dev_kfree_skb_any(cmd.meta.u.skb);
  2861. return rc;
  2862. }
  2863. #endif
  2864. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2865. struct iwl_tx_info *tx_sta)
  2866. {
  2867. tx_sta->status.ack_signal = 0;
  2868. tx_sta->status.excessive_retries = 0;
  2869. tx_sta->status.queue_length = 0;
  2870. tx_sta->status.queue_number = 0;
  2871. if (in_interrupt())
  2872. ieee80211_tx_status_irqsafe(priv->hw,
  2873. tx_sta->skb[0], &(tx_sta->status));
  2874. else
  2875. ieee80211_tx_status(priv->hw,
  2876. tx_sta->skb[0], &(tx_sta->status));
  2877. tx_sta->skb[0] = NULL;
  2878. }
  2879. /**
  2880. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2881. *
  2882. * When FW advances 'R' index, all entries between old and
  2883. * new 'R' index need to be reclaimed. As result, some free space
  2884. * forms. If there is enough free space (> low mark), wake Tx queue.
  2885. */
  2886. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2887. {
  2888. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2889. struct iwl_queue *q = &txq->q;
  2890. int nfreed = 0;
  2891. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2892. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2893. "is out of range [0-%d] %d %d.\n", txq_id,
  2894. index, q->n_bd, q->write_ptr, q->read_ptr);
  2895. return 0;
  2896. }
  2897. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2898. q->read_ptr != index;
  2899. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2900. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2901. iwl_txstatus_to_ieee(priv,
  2902. &(txq->txb[txq->q.read_ptr]));
  2903. iwl_hw_txq_free_tfd(priv, txq);
  2904. } else if (nfreed > 1) {
  2905. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2906. q->write_ptr, q->read_ptr);
  2907. queue_work(priv->workqueue, &priv->restart);
  2908. }
  2909. nfreed++;
  2910. }
  2911. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2912. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2913. priv->mac80211_registered)
  2914. ieee80211_wake_queue(priv->hw, txq_id);
  2915. return nfreed;
  2916. }
  2917. static int iwl_is_tx_success(u32 status)
  2918. {
  2919. status &= TX_STATUS_MSK;
  2920. return (status == TX_STATUS_SUCCESS)
  2921. || (status == TX_STATUS_DIRECT_DONE);
  2922. }
  2923. /******************************************************************************
  2924. *
  2925. * Generic RX handler implementations
  2926. *
  2927. ******************************************************************************/
  2928. #ifdef CONFIG_IWLWIFI_HT
  2929. #ifdef CONFIG_IWLWIFI_HT_AGG
  2930. static inline int iwl_get_ra_sta_id(struct iwl_priv *priv,
  2931. struct ieee80211_hdr *hdr)
  2932. {
  2933. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2934. return IWL_AP_ID;
  2935. else {
  2936. u8 *da = ieee80211_get_DA(hdr);
  2937. return iwl_hw_find_station(priv, da);
  2938. }
  2939. }
  2940. static struct ieee80211_hdr *iwl_tx_queue_get_hdr(
  2941. struct iwl_priv *priv, int txq_id, int idx)
  2942. {
  2943. if (priv->txq[txq_id].txb[idx].skb[0])
  2944. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2945. txb[idx].skb[0]->data;
  2946. return NULL;
  2947. }
  2948. static inline u32 iwl_get_scd_ssn(struct iwl_tx_resp *tx_resp)
  2949. {
  2950. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2951. tx_resp->frame_count);
  2952. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2953. }
  2954. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2955. struct iwl_ht_agg *agg,
  2956. struct iwl_tx_resp *tx_resp,
  2957. u16 start_idx)
  2958. {
  2959. u32 status;
  2960. __le32 *frame_status = &tx_resp->status;
  2961. struct ieee80211_tx_status *tx_status = NULL;
  2962. struct ieee80211_hdr *hdr = NULL;
  2963. int i, sh;
  2964. int txq_id, idx;
  2965. u16 seq;
  2966. if (agg->wait_for_ba)
  2967. IWL_DEBUG_TX_REPLY("got tx repsons w/o back\n");
  2968. agg->frame_count = tx_resp->frame_count;
  2969. agg->start_idx = start_idx;
  2970. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2971. agg->bitmap0 = agg->bitmap1 = 0;
  2972. if (agg->frame_count == 1) {
  2973. struct iwl_tx_queue *txq ;
  2974. status = le32_to_cpu(frame_status[0]);
  2975. txq_id = agg->txq_id;
  2976. txq = &priv->txq[txq_id];
  2977. /* FIXME: code repetition */
  2978. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  2979. agg->frame_count, agg->start_idx);
  2980. tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
  2981. tx_status->retry_count = tx_resp->failure_frame;
  2982. tx_status->queue_number = status & 0xff;
  2983. tx_status->queue_length = tx_resp->bt_kill_count;
  2984. tx_status->queue_length |= tx_resp->failure_rts;
  2985. tx_status->flags = iwl_is_tx_success(status)?
  2986. IEEE80211_TX_STATUS_ACK : 0;
  2987. tx_status->control.tx_rate =
  2988. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  2989. /* FIXME: code repetition end */
  2990. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2991. status & 0xff, tx_resp->failure_frame);
  2992. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2993. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2994. agg->wait_for_ba = 0;
  2995. } else {
  2996. u64 bitmap = 0;
  2997. int start = agg->start_idx;
  2998. for (i = 0; i < agg->frame_count; i++) {
  2999. u16 sc;
  3000. status = le32_to_cpu(frame_status[i]);
  3001. seq = status >> 16;
  3002. idx = SEQ_TO_INDEX(seq);
  3003. txq_id = SEQ_TO_QUEUE(seq);
  3004. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3005. AGG_TX_STATE_ABORT_MSK))
  3006. continue;
  3007. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3008. agg->frame_count, txq_id, idx);
  3009. hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
  3010. sc = le16_to_cpu(hdr->seq_ctrl);
  3011. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3012. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3013. " idx=%d, seq_idx=%d, seq=%d\n",
  3014. idx, SEQ_TO_SN(sc),
  3015. hdr->seq_ctrl);
  3016. return -1;
  3017. }
  3018. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3019. i, idx, SEQ_TO_SN(sc));
  3020. sh = idx - start;
  3021. if (sh > 64) {
  3022. sh = (start - idx) + 0xff;
  3023. bitmap = bitmap << sh;
  3024. sh = 0;
  3025. start = idx;
  3026. } else if (sh < -64)
  3027. sh = 0xff - (start - idx);
  3028. else if (sh < 0) {
  3029. sh = start - idx;
  3030. start = idx;
  3031. bitmap = bitmap << sh;
  3032. sh = 0;
  3033. }
  3034. bitmap |= (1 << sh);
  3035. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3036. start, (u32)(bitmap & 0xFFFFFFFF));
  3037. }
  3038. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3039. agg->bitmap1 = bitmap >> 32;
  3040. agg->start_idx = start;
  3041. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3042. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3043. agg->frame_count, agg->start_idx,
  3044. agg->bitmap0);
  3045. if (bitmap)
  3046. agg->wait_for_ba = 1;
  3047. }
  3048. return 0;
  3049. }
  3050. #endif
  3051. #endif
  3052. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  3053. struct iwl_rx_mem_buffer *rxb)
  3054. {
  3055. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3056. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3057. int txq_id = SEQ_TO_QUEUE(sequence);
  3058. int index = SEQ_TO_INDEX(sequence);
  3059. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  3060. struct ieee80211_tx_status *tx_status;
  3061. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3062. u32 status = le32_to_cpu(tx_resp->status);
  3063. #ifdef CONFIG_IWLWIFI_HT
  3064. #ifdef CONFIG_IWLWIFI_HT_AGG
  3065. int tid, sta_id;
  3066. #endif
  3067. #endif
  3068. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3069. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3070. "is out of range [0-%d] %d %d\n", txq_id,
  3071. index, txq->q.n_bd, txq->q.write_ptr,
  3072. txq->q.read_ptr);
  3073. return;
  3074. }
  3075. #ifdef CONFIG_IWLWIFI_HT
  3076. #ifdef CONFIG_IWLWIFI_HT_AGG
  3077. if (txq->sched_retry) {
  3078. const u32 scd_ssn = iwl_get_scd_ssn(tx_resp);
  3079. struct ieee80211_hdr *hdr =
  3080. iwl_tx_queue_get_hdr(priv, txq_id, index);
  3081. struct iwl_ht_agg *agg = NULL;
  3082. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3083. if (qc == NULL) {
  3084. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3085. return;
  3086. }
  3087. tid = le16_to_cpu(*qc) & 0xf;
  3088. sta_id = iwl_get_ra_sta_id(priv, hdr);
  3089. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3090. IWL_ERROR("Station not known for\n");
  3091. return;
  3092. }
  3093. agg = &priv->stations[sta_id].tid[tid].agg;
  3094. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3095. if ((tx_resp->frame_count == 1) &&
  3096. !iwl_is_tx_success(status)) {
  3097. /* TODO: send BAR */
  3098. }
  3099. if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
  3100. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3101. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3102. "%d index %d\n", scd_ssn , index);
  3103. iwl_tx_queue_reclaim(priv, txq_id, index);
  3104. }
  3105. } else {
  3106. #endif /* CONFIG_IWLWIFI_HT_AGG */
  3107. #endif /* CONFIG_IWLWIFI_HT */
  3108. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3109. tx_status->retry_count = tx_resp->failure_frame;
  3110. tx_status->queue_number = status;
  3111. tx_status->queue_length = tx_resp->bt_kill_count;
  3112. tx_status->queue_length |= tx_resp->failure_rts;
  3113. tx_status->flags =
  3114. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3115. tx_status->control.tx_rate =
  3116. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3117. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3118. "retries %d\n", txq_id, iwl_get_tx_fail_reason(status),
  3119. status, le32_to_cpu(tx_resp->rate_n_flags),
  3120. tx_resp->failure_frame);
  3121. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3122. if (index != -1)
  3123. iwl_tx_queue_reclaim(priv, txq_id, index);
  3124. #ifdef CONFIG_IWLWIFI_HT
  3125. #ifdef CONFIG_IWLWIFI_HT_AGG
  3126. }
  3127. #endif /* CONFIG_IWLWIFI_HT_AGG */
  3128. #endif /* CONFIG_IWLWIFI_HT */
  3129. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3130. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3131. }
  3132. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  3133. struct iwl_rx_mem_buffer *rxb)
  3134. {
  3135. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3136. struct iwl_alive_resp *palive;
  3137. struct delayed_work *pwork;
  3138. palive = &pkt->u.alive_frame;
  3139. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3140. "0x%01X 0x%01X\n",
  3141. palive->is_valid, palive->ver_type,
  3142. palive->ver_subtype);
  3143. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3144. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3145. memcpy(&priv->card_alive_init,
  3146. &pkt->u.alive_frame,
  3147. sizeof(struct iwl_init_alive_resp));
  3148. pwork = &priv->init_alive_start;
  3149. } else {
  3150. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3151. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3152. sizeof(struct iwl_alive_resp));
  3153. pwork = &priv->alive_start;
  3154. }
  3155. /* We delay the ALIVE response by 5ms to
  3156. * give the HW RF Kill time to activate... */
  3157. if (palive->is_valid == UCODE_VALID_OK)
  3158. queue_delayed_work(priv->workqueue, pwork,
  3159. msecs_to_jiffies(5));
  3160. else
  3161. IWL_WARNING("uCode did not respond OK.\n");
  3162. }
  3163. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  3164. struct iwl_rx_mem_buffer *rxb)
  3165. {
  3166. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3167. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3168. return;
  3169. }
  3170. static void iwl_rx_reply_error(struct iwl_priv *priv,
  3171. struct iwl_rx_mem_buffer *rxb)
  3172. {
  3173. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3174. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3175. "seq 0x%04X ser 0x%08X\n",
  3176. le32_to_cpu(pkt->u.err_resp.error_type),
  3177. get_cmd_string(pkt->u.err_resp.cmd_id),
  3178. pkt->u.err_resp.cmd_id,
  3179. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3180. le32_to_cpu(pkt->u.err_resp.error_info));
  3181. }
  3182. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3183. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  3184. {
  3185. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3186. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3187. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  3188. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3189. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3190. rxon->channel = csa->channel;
  3191. priv->staging_rxon.channel = csa->channel;
  3192. }
  3193. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  3194. struct iwl_rx_mem_buffer *rxb)
  3195. {
  3196. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  3197. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3198. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3199. if (!report->state) {
  3200. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3201. "Spectrum Measure Notification: Start\n");
  3202. return;
  3203. }
  3204. memcpy(&priv->measure_report, report, sizeof(*report));
  3205. priv->measurement_status |= MEASUREMENT_READY;
  3206. #endif
  3207. }
  3208. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  3209. struct iwl_rx_mem_buffer *rxb)
  3210. {
  3211. #ifdef CONFIG_IWLWIFI_DEBUG
  3212. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3213. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3214. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3215. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3216. #endif
  3217. }
  3218. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  3219. struct iwl_rx_mem_buffer *rxb)
  3220. {
  3221. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3222. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3223. "notification for %s:\n",
  3224. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3225. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3226. }
  3227. static void iwl_bg_beacon_update(struct work_struct *work)
  3228. {
  3229. struct iwl_priv *priv =
  3230. container_of(work, struct iwl_priv, beacon_update);
  3231. struct sk_buff *beacon;
  3232. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3233. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  3234. if (!beacon) {
  3235. IWL_ERROR("update beacon failed\n");
  3236. return;
  3237. }
  3238. mutex_lock(&priv->mutex);
  3239. /* new beacon skb is allocated every time; dispose previous.*/
  3240. if (priv->ibss_beacon)
  3241. dev_kfree_skb(priv->ibss_beacon);
  3242. priv->ibss_beacon = beacon;
  3243. mutex_unlock(&priv->mutex);
  3244. iwl_send_beacon_cmd(priv);
  3245. }
  3246. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  3247. struct iwl_rx_mem_buffer *rxb)
  3248. {
  3249. #ifdef CONFIG_IWLWIFI_DEBUG
  3250. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3251. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  3252. u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3253. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3254. "tsf %d %d rate %d\n",
  3255. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3256. beacon->beacon_notify_hdr.failure_frame,
  3257. le32_to_cpu(beacon->ibss_mgr_status),
  3258. le32_to_cpu(beacon->high_tsf),
  3259. le32_to_cpu(beacon->low_tsf), rate);
  3260. #endif
  3261. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3262. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3263. queue_work(priv->workqueue, &priv->beacon_update);
  3264. }
  3265. /* Service response to REPLY_SCAN_CMD (0x80) */
  3266. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3267. struct iwl_rx_mem_buffer *rxb)
  3268. {
  3269. #ifdef CONFIG_IWLWIFI_DEBUG
  3270. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3271. struct iwl_scanreq_notification *notif =
  3272. (struct iwl_scanreq_notification *)pkt->u.raw;
  3273. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3274. #endif
  3275. }
  3276. /* Service SCAN_START_NOTIFICATION (0x82) */
  3277. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3278. struct iwl_rx_mem_buffer *rxb)
  3279. {
  3280. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3281. struct iwl_scanstart_notification *notif =
  3282. (struct iwl_scanstart_notification *)pkt->u.raw;
  3283. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3284. IWL_DEBUG_SCAN("Scan start: "
  3285. "%d [802.11%s] "
  3286. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3287. notif->channel,
  3288. notif->band ? "bg" : "a",
  3289. notif->tsf_high,
  3290. notif->tsf_low, notif->status, notif->beacon_timer);
  3291. }
  3292. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3293. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3294. struct iwl_rx_mem_buffer *rxb)
  3295. {
  3296. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3297. struct iwl_scanresults_notification *notif =
  3298. (struct iwl_scanresults_notification *)pkt->u.raw;
  3299. IWL_DEBUG_SCAN("Scan ch.res: "
  3300. "%d [802.11%s] "
  3301. "(TSF: 0x%08X:%08X) - %d "
  3302. "elapsed=%lu usec (%dms since last)\n",
  3303. notif->channel,
  3304. notif->band ? "bg" : "a",
  3305. le32_to_cpu(notif->tsf_high),
  3306. le32_to_cpu(notif->tsf_low),
  3307. le32_to_cpu(notif->statistics[0]),
  3308. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3309. jiffies_to_msecs(elapsed_jiffies
  3310. (priv->last_scan_jiffies, jiffies)));
  3311. priv->last_scan_jiffies = jiffies;
  3312. }
  3313. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3314. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3315. struct iwl_rx_mem_buffer *rxb)
  3316. {
  3317. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3318. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3319. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3320. scan_notif->scanned_channels,
  3321. scan_notif->tsf_low,
  3322. scan_notif->tsf_high, scan_notif->status);
  3323. /* The HW is no longer scanning */
  3324. clear_bit(STATUS_SCAN_HW, &priv->status);
  3325. /* The scan completion notification came in, so kill that timer... */
  3326. cancel_delayed_work(&priv->scan_check);
  3327. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3328. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3329. jiffies_to_msecs(elapsed_jiffies
  3330. (priv->scan_pass_start, jiffies)));
  3331. /* Remove this scanned band from the list
  3332. * of pending bands to scan */
  3333. priv->scan_bands--;
  3334. /* If a request to abort was given, or the scan did not succeed
  3335. * then we reset the scan state machine and terminate,
  3336. * re-queuing another scan if one has been requested */
  3337. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3338. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3339. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3340. } else {
  3341. /* If there are more bands on this scan pass reschedule */
  3342. if (priv->scan_bands > 0)
  3343. goto reschedule;
  3344. }
  3345. priv->last_scan_jiffies = jiffies;
  3346. IWL_DEBUG_INFO("Setting scan to off\n");
  3347. clear_bit(STATUS_SCANNING, &priv->status);
  3348. IWL_DEBUG_INFO("Scan took %dms\n",
  3349. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3350. queue_work(priv->workqueue, &priv->scan_completed);
  3351. return;
  3352. reschedule:
  3353. priv->scan_pass_start = jiffies;
  3354. queue_work(priv->workqueue, &priv->request_scan);
  3355. }
  3356. /* Handle notification from uCode that card's power state is changing
  3357. * due to software, hardware, or critical temperature RFKILL */
  3358. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3359. struct iwl_rx_mem_buffer *rxb)
  3360. {
  3361. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3362. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3363. unsigned long status = priv->status;
  3364. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3365. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3366. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3367. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3368. RF_CARD_DISABLED)) {
  3369. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3370. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3371. if (!iwl_grab_restricted_access(priv)) {
  3372. iwl_write_restricted(
  3373. priv, HBUS_TARG_MBX_C,
  3374. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3375. iwl_release_restricted_access(priv);
  3376. }
  3377. if (!(flags & RXON_CARD_DISABLED)) {
  3378. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3379. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3380. if (!iwl_grab_restricted_access(priv)) {
  3381. iwl_write_restricted(
  3382. priv, HBUS_TARG_MBX_C,
  3383. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3384. iwl_release_restricted_access(priv);
  3385. }
  3386. }
  3387. if (flags & RF_CARD_DISABLED) {
  3388. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3389. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3390. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3391. if (!iwl_grab_restricted_access(priv))
  3392. iwl_release_restricted_access(priv);
  3393. }
  3394. }
  3395. if (flags & HW_CARD_DISABLED)
  3396. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3397. else
  3398. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3399. if (flags & SW_CARD_DISABLED)
  3400. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3401. else
  3402. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3403. if (!(flags & RXON_CARD_DISABLED))
  3404. iwl_scan_cancel(priv);
  3405. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3406. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3407. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3408. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3409. queue_work(priv->workqueue, &priv->rf_kill);
  3410. else
  3411. wake_up_interruptible(&priv->wait_command_queue);
  3412. }
  3413. /**
  3414. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3415. *
  3416. * Setup the RX handlers for each of the reply types sent from the uCode
  3417. * to the host.
  3418. *
  3419. * This function chains into the hardware specific files for them to setup
  3420. * any hardware specific handlers as well.
  3421. */
  3422. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3423. {
  3424. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3425. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3426. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3427. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3428. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3429. iwl_rx_spectrum_measure_notif;
  3430. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3431. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3432. iwl_rx_pm_debug_statistics_notif;
  3433. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3434. /* NOTE: iwl_rx_statistics is different based on whether
  3435. * the build is for the 3945 or the 4965. See the
  3436. * corresponding implementation in iwl-XXXX.c
  3437. *
  3438. * The same handler is used for both the REPLY to a
  3439. * discrete statistics request from the host as well as
  3440. * for the periodic statistics notification from the uCode
  3441. */
  3442. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3443. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3444. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3445. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3446. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3447. iwl_rx_scan_results_notif;
  3448. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3449. iwl_rx_scan_complete_notif;
  3450. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3451. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3452. /* Setup hardware specific Rx handlers */
  3453. iwl_hw_rx_handler_setup(priv);
  3454. }
  3455. /**
  3456. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3457. * @rxb: Rx buffer to reclaim
  3458. *
  3459. * If an Rx buffer has an async callback associated with it the callback
  3460. * will be executed. The attached skb (if present) will only be freed
  3461. * if the callback returns 1
  3462. */
  3463. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3464. struct iwl_rx_mem_buffer *rxb)
  3465. {
  3466. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3467. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3468. int txq_id = SEQ_TO_QUEUE(sequence);
  3469. int index = SEQ_TO_INDEX(sequence);
  3470. int huge = sequence & SEQ_HUGE_FRAME;
  3471. int cmd_index;
  3472. struct iwl_cmd *cmd;
  3473. /* If a Tx command is being handled and it isn't in the actual
  3474. * command queue then there a command routing bug has been introduced
  3475. * in the queue management code. */
  3476. if (txq_id != IWL_CMD_QUEUE_NUM)
  3477. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3478. txq_id, pkt->hdr.cmd);
  3479. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3480. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3481. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3482. /* Input error checking is done when commands are added to queue. */
  3483. if (cmd->meta.flags & CMD_WANT_SKB) {
  3484. cmd->meta.source->u.skb = rxb->skb;
  3485. rxb->skb = NULL;
  3486. } else if (cmd->meta.u.callback &&
  3487. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3488. rxb->skb = NULL;
  3489. iwl_tx_queue_reclaim(priv, txq_id, index);
  3490. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3491. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3492. wake_up_interruptible(&priv->wait_command_queue);
  3493. }
  3494. }
  3495. /************************** RX-FUNCTIONS ****************************/
  3496. /*
  3497. * Rx theory of operation
  3498. *
  3499. * The host allocates 32 DMA target addresses and passes the host address
  3500. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3501. * 0 to 31
  3502. *
  3503. * Rx Queue Indexes
  3504. * The host/firmware share two index registers for managing the Rx buffers.
  3505. *
  3506. * The READ index maps to the first position that the firmware may be writing
  3507. * to -- the driver can read up to (but not including) this position and get
  3508. * good data.
  3509. * The READ index is managed by the firmware once the card is enabled.
  3510. *
  3511. * The WRITE index maps to the last position the driver has read from -- the
  3512. * position preceding WRITE is the last slot the firmware can place a packet.
  3513. *
  3514. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3515. * WRITE = READ.
  3516. *
  3517. * During initialization the host sets up the READ queue position to the first
  3518. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3519. *
  3520. * When the firmware places a packet in a buffer it will advance the READ index
  3521. * and fire the RX interrupt. The driver can then query the READ index and
  3522. * process as many packets as possible, moving the WRITE index forward as it
  3523. * resets the Rx queue buffers with new memory.
  3524. *
  3525. * The management in the driver is as follows:
  3526. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3527. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3528. * to replenish the iwl->rxq->rx_free.
  3529. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3530. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3531. * 'processed' and 'read' driver indexes as well)
  3532. * + A received packet is processed and handed to the kernel network stack,
  3533. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3534. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3535. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3536. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3537. * were enough free buffers and RX_STALLED is set it is cleared.
  3538. *
  3539. *
  3540. * Driver sequence:
  3541. *
  3542. * iwl_rx_queue_alloc() Allocates rx_free
  3543. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3544. * iwl_rx_queue_restock
  3545. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3546. * queue, updates firmware pointers, and updates
  3547. * the WRITE index. If insufficient rx_free buffers
  3548. * are available, schedules iwl_rx_replenish
  3549. *
  3550. * -- enable interrupts --
  3551. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3552. * READ INDEX, detaching the SKB from the pool.
  3553. * Moves the packet buffer from queue to rx_used.
  3554. * Calls iwl_rx_queue_restock to refill any empty
  3555. * slots.
  3556. * ...
  3557. *
  3558. */
  3559. /**
  3560. * iwl_rx_queue_space - Return number of free slots available in queue.
  3561. */
  3562. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3563. {
  3564. int s = q->read - q->write;
  3565. if (s <= 0)
  3566. s += RX_QUEUE_SIZE;
  3567. /* keep some buffer to not confuse full and empty queue */
  3568. s -= 2;
  3569. if (s < 0)
  3570. s = 0;
  3571. return s;
  3572. }
  3573. /**
  3574. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3575. *
  3576. * NOTE: This function has 3945 and 4965 specific code sections
  3577. * but is declared in base due to the majority of the
  3578. * implementation being the same (only a numeric constant is
  3579. * different)
  3580. *
  3581. */
  3582. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3583. {
  3584. u32 reg = 0;
  3585. int rc = 0;
  3586. unsigned long flags;
  3587. spin_lock_irqsave(&q->lock, flags);
  3588. if (q->need_update == 0)
  3589. goto exit_unlock;
  3590. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3591. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3592. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3593. iwl_set_bit(priv, CSR_GP_CNTRL,
  3594. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3595. goto exit_unlock;
  3596. }
  3597. rc = iwl_grab_restricted_access(priv);
  3598. if (rc)
  3599. goto exit_unlock;
  3600. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3601. q->write & ~0x7);
  3602. iwl_release_restricted_access(priv);
  3603. } else
  3604. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3605. q->need_update = 0;
  3606. exit_unlock:
  3607. spin_unlock_irqrestore(&q->lock, flags);
  3608. return rc;
  3609. }
  3610. /**
  3611. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3612. *
  3613. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3614. */
  3615. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3616. dma_addr_t dma_addr)
  3617. {
  3618. return cpu_to_le32((u32)(dma_addr >> 8));
  3619. }
  3620. /**
  3621. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3622. *
  3623. * If there are slots in the RX queue that need to be restocked,
  3624. * and we have free pre-allocated buffers, fill the ranks as much
  3625. * as we can pulling from rx_free.
  3626. *
  3627. * This moves the 'write' index forward to catch up with 'processed', and
  3628. * also updates the memory address in the firmware to reference the new
  3629. * target buffer.
  3630. */
  3631. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3632. {
  3633. struct iwl_rx_queue *rxq = &priv->rxq;
  3634. struct list_head *element;
  3635. struct iwl_rx_mem_buffer *rxb;
  3636. unsigned long flags;
  3637. int write, rc;
  3638. spin_lock_irqsave(&rxq->lock, flags);
  3639. write = rxq->write & ~0x7;
  3640. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3641. element = rxq->rx_free.next;
  3642. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3643. list_del(element);
  3644. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3645. rxq->queue[rxq->write] = rxb;
  3646. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3647. rxq->free_count--;
  3648. }
  3649. spin_unlock_irqrestore(&rxq->lock, flags);
  3650. /* If the pre-allocated buffer pool is dropping low, schedule to
  3651. * refill it */
  3652. if (rxq->free_count <= RX_LOW_WATERMARK)
  3653. queue_work(priv->workqueue, &priv->rx_replenish);
  3654. /* If we've added more space for the firmware to place data, tell it */
  3655. if ((write != (rxq->write & ~0x7))
  3656. || (abs(rxq->write - rxq->read) > 7)) {
  3657. spin_lock_irqsave(&rxq->lock, flags);
  3658. rxq->need_update = 1;
  3659. spin_unlock_irqrestore(&rxq->lock, flags);
  3660. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3661. if (rc)
  3662. return rc;
  3663. }
  3664. return 0;
  3665. }
  3666. /**
  3667. * iwl_rx_replenish - Move all used packet from rx_used to rx_free
  3668. *
  3669. * When moving to rx_free an SKB is allocated for the slot.
  3670. *
  3671. * Also restock the Rx queue via iwl_rx_queue_restock.
  3672. * This is called as a scheduled work item (except for during initialization)
  3673. */
  3674. void iwl_rx_replenish(void *data)
  3675. {
  3676. struct iwl_priv *priv = data;
  3677. struct iwl_rx_queue *rxq = &priv->rxq;
  3678. struct list_head *element;
  3679. struct iwl_rx_mem_buffer *rxb;
  3680. unsigned long flags;
  3681. spin_lock_irqsave(&rxq->lock, flags);
  3682. while (!list_empty(&rxq->rx_used)) {
  3683. element = rxq->rx_used.next;
  3684. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3685. rxb->skb =
  3686. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3687. if (!rxb->skb) {
  3688. if (net_ratelimit())
  3689. printk(KERN_CRIT DRV_NAME
  3690. ": Can not allocate SKB buffers\n");
  3691. /* We don't reschedule replenish work here -- we will
  3692. * call the restock method and if it still needs
  3693. * more buffers it will schedule replenish */
  3694. break;
  3695. }
  3696. priv->alloc_rxb_skb++;
  3697. list_del(element);
  3698. rxb->dma_addr =
  3699. pci_map_single(priv->pci_dev, rxb->skb->data,
  3700. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3701. list_add_tail(&rxb->list, &rxq->rx_free);
  3702. rxq->free_count++;
  3703. }
  3704. spin_unlock_irqrestore(&rxq->lock, flags);
  3705. spin_lock_irqsave(&priv->lock, flags);
  3706. iwl_rx_queue_restock(priv);
  3707. spin_unlock_irqrestore(&priv->lock, flags);
  3708. }
  3709. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3710. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3711. * This free routine walks the list of POOL entries and if SKB is set to
  3712. * non NULL it is unmapped and freed
  3713. */
  3714. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3715. {
  3716. int i;
  3717. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3718. if (rxq->pool[i].skb != NULL) {
  3719. pci_unmap_single(priv->pci_dev,
  3720. rxq->pool[i].dma_addr,
  3721. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3722. dev_kfree_skb(rxq->pool[i].skb);
  3723. }
  3724. }
  3725. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3726. rxq->dma_addr);
  3727. rxq->bd = NULL;
  3728. }
  3729. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3730. {
  3731. struct iwl_rx_queue *rxq = &priv->rxq;
  3732. struct pci_dev *dev = priv->pci_dev;
  3733. int i;
  3734. spin_lock_init(&rxq->lock);
  3735. INIT_LIST_HEAD(&rxq->rx_free);
  3736. INIT_LIST_HEAD(&rxq->rx_used);
  3737. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3738. if (!rxq->bd)
  3739. return -ENOMEM;
  3740. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3741. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3742. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3743. /* Set us so that we have processed and used all buffers, but have
  3744. * not restocked the Rx queue with fresh buffers */
  3745. rxq->read = rxq->write = 0;
  3746. rxq->free_count = 0;
  3747. rxq->need_update = 0;
  3748. return 0;
  3749. }
  3750. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3751. {
  3752. unsigned long flags;
  3753. int i;
  3754. spin_lock_irqsave(&rxq->lock, flags);
  3755. INIT_LIST_HEAD(&rxq->rx_free);
  3756. INIT_LIST_HEAD(&rxq->rx_used);
  3757. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3758. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3759. /* In the reset function, these buffers may have been allocated
  3760. * to an SKB, so we need to unmap and free potential storage */
  3761. if (rxq->pool[i].skb != NULL) {
  3762. pci_unmap_single(priv->pci_dev,
  3763. rxq->pool[i].dma_addr,
  3764. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3765. priv->alloc_rxb_skb--;
  3766. dev_kfree_skb(rxq->pool[i].skb);
  3767. rxq->pool[i].skb = NULL;
  3768. }
  3769. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3770. }
  3771. /* Set us so that we have processed and used all buffers, but have
  3772. * not restocked the Rx queue with fresh buffers */
  3773. rxq->read = rxq->write = 0;
  3774. rxq->free_count = 0;
  3775. spin_unlock_irqrestore(&rxq->lock, flags);
  3776. }
  3777. /* Convert linear signal-to-noise ratio into dB */
  3778. static u8 ratio2dB[100] = {
  3779. /* 0 1 2 3 4 5 6 7 8 9 */
  3780. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3781. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3782. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3783. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3784. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3785. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3786. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3787. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3788. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3789. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3790. };
  3791. /* Calculates a relative dB value from a ratio of linear
  3792. * (i.e. not dB) signal levels.
  3793. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3794. int iwl_calc_db_from_ratio(int sig_ratio)
  3795. {
  3796. /* 1000:1 or higher just report as 60 dB */
  3797. if (sig_ratio >= 1000)
  3798. return 60;
  3799. /* 100:1 or higher, divide by 10 and use table,
  3800. * add 20 dB to make up for divide by 10 */
  3801. if (sig_ratio >= 100)
  3802. return (20 + (int)ratio2dB[sig_ratio/10]);
  3803. /* We shouldn't see this */
  3804. if (sig_ratio < 1)
  3805. return 0;
  3806. /* Use table for ratios 1:1 - 99:1 */
  3807. return (int)ratio2dB[sig_ratio];
  3808. }
  3809. #define PERFECT_RSSI (-20) /* dBm */
  3810. #define WORST_RSSI (-95) /* dBm */
  3811. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3812. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3813. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3814. * about formulas used below. */
  3815. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3816. {
  3817. int sig_qual;
  3818. int degradation = PERFECT_RSSI - rssi_dbm;
  3819. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3820. * as indicator; formula is (signal dbm - noise dbm).
  3821. * SNR at or above 40 is a great signal (100%).
  3822. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3823. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3824. if (noise_dbm) {
  3825. if (rssi_dbm - noise_dbm >= 40)
  3826. return 100;
  3827. else if (rssi_dbm < noise_dbm)
  3828. return 0;
  3829. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3830. /* Else use just the signal level.
  3831. * This formula is a least squares fit of data points collected and
  3832. * compared with a reference system that had a percentage (%) display
  3833. * for signal quality. */
  3834. } else
  3835. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3836. (15 * RSSI_RANGE + 62 * degradation)) /
  3837. (RSSI_RANGE * RSSI_RANGE);
  3838. if (sig_qual > 100)
  3839. sig_qual = 100;
  3840. else if (sig_qual < 1)
  3841. sig_qual = 0;
  3842. return sig_qual;
  3843. }
  3844. /**
  3845. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3846. *
  3847. * Uses the priv->rx_handlers callback function array to invoke
  3848. * the appropriate handlers, including command responses,
  3849. * frame-received notifications, and other notifications.
  3850. */
  3851. static void iwl_rx_handle(struct iwl_priv *priv)
  3852. {
  3853. struct iwl_rx_mem_buffer *rxb;
  3854. struct iwl_rx_packet *pkt;
  3855. struct iwl_rx_queue *rxq = &priv->rxq;
  3856. u32 r, i;
  3857. int reclaim;
  3858. unsigned long flags;
  3859. r = iwl_hw_get_rx_read(priv);
  3860. i = rxq->read;
  3861. /* Rx interrupt, but nothing sent from uCode */
  3862. if (i == r)
  3863. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3864. while (i != r) {
  3865. rxb = rxq->queue[i];
  3866. /* If an RXB doesn't have a queue slot associated with it
  3867. * then a bug has been introduced in the queue refilling
  3868. * routines -- catch it here */
  3869. BUG_ON(rxb == NULL);
  3870. rxq->queue[i] = NULL;
  3871. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3872. IWL_RX_BUF_SIZE,
  3873. PCI_DMA_FROMDEVICE);
  3874. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3875. /* Reclaim a command buffer only if this packet is a response
  3876. * to a (driver-originated) command.
  3877. * If the packet (e.g. Rx frame) originated from uCode,
  3878. * there is no command buffer to reclaim.
  3879. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3880. * but apparently a few don't get set; catch them here. */
  3881. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3882. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3883. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3884. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3885. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3886. (pkt->hdr.cmd != REPLY_TX);
  3887. /* Based on type of command response or notification,
  3888. * handle those that need handling via function in
  3889. * rx_handlers table. See iwl_setup_rx_handlers() */
  3890. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3891. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3892. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3893. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3894. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3895. } else {
  3896. /* No handling needed */
  3897. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3898. "r %d i %d No handler needed for %s, 0x%02x\n",
  3899. r, i, get_cmd_string(pkt->hdr.cmd),
  3900. pkt->hdr.cmd);
  3901. }
  3902. if (reclaim) {
  3903. /* Invoke any callbacks, transfer the skb to caller,
  3904. * and fire off the (possibly) blocking iwl_send_cmd()
  3905. * as we reclaim the driver command queue */
  3906. if (rxb && rxb->skb)
  3907. iwl_tx_cmd_complete(priv, rxb);
  3908. else
  3909. IWL_WARNING("Claim null rxb?\n");
  3910. }
  3911. /* For now we just don't re-use anything. We can tweak this
  3912. * later to try and re-use notification packets and SKBs that
  3913. * fail to Rx correctly */
  3914. if (rxb->skb != NULL) {
  3915. priv->alloc_rxb_skb--;
  3916. dev_kfree_skb_any(rxb->skb);
  3917. rxb->skb = NULL;
  3918. }
  3919. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3920. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3921. spin_lock_irqsave(&rxq->lock, flags);
  3922. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3923. spin_unlock_irqrestore(&rxq->lock, flags);
  3924. i = (i + 1) & RX_QUEUE_MASK;
  3925. }
  3926. /* Backtrack one entry */
  3927. priv->rxq.read = i;
  3928. iwl_rx_queue_restock(priv);
  3929. }
  3930. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3931. struct iwl_tx_queue *txq)
  3932. {
  3933. u32 reg = 0;
  3934. int rc = 0;
  3935. int txq_id = txq->q.id;
  3936. if (txq->need_update == 0)
  3937. return rc;
  3938. /* if we're trying to save power */
  3939. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3940. /* wake up nic if it's powered down ...
  3941. * uCode will wake up, and interrupt us again, so next
  3942. * time we'll skip this part. */
  3943. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3944. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3945. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3946. iwl_set_bit(priv, CSR_GP_CNTRL,
  3947. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3948. return rc;
  3949. }
  3950. /* restore this queue's parameters in nic hardware. */
  3951. rc = iwl_grab_restricted_access(priv);
  3952. if (rc)
  3953. return rc;
  3954. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3955. txq->q.write_ptr | (txq_id << 8));
  3956. iwl_release_restricted_access(priv);
  3957. /* else not in power-save mode, uCode will never sleep when we're
  3958. * trying to tx (during RFKILL, we're not trying to tx). */
  3959. } else
  3960. iwl_write32(priv, HBUS_TARG_WRPTR,
  3961. txq->q.write_ptr | (txq_id << 8));
  3962. txq->need_update = 0;
  3963. return rc;
  3964. }
  3965. #ifdef CONFIG_IWLWIFI_DEBUG
  3966. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3967. {
  3968. DECLARE_MAC_BUF(mac);
  3969. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3970. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3971. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3972. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3973. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3974. le32_to_cpu(rxon->filter_flags));
  3975. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3976. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3977. rxon->ofdm_basic_rates);
  3978. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3979. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3980. print_mac(mac, rxon->node_addr));
  3981. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3982. print_mac(mac, rxon->bssid_addr));
  3983. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3984. }
  3985. #endif
  3986. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3987. {
  3988. IWL_DEBUG_ISR("Enabling interrupts\n");
  3989. set_bit(STATUS_INT_ENABLED, &priv->status);
  3990. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3991. }
  3992. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3993. {
  3994. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3995. /* disable interrupts from uCode/NIC to host */
  3996. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3997. /* acknowledge/clear/reset any interrupts still pending
  3998. * from uCode or flow handler (Rx/Tx DMA) */
  3999. iwl_write32(priv, CSR_INT, 0xffffffff);
  4000. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4001. IWL_DEBUG_ISR("Disabled interrupts\n");
  4002. }
  4003. static const char *desc_lookup(int i)
  4004. {
  4005. switch (i) {
  4006. case 1:
  4007. return "FAIL";
  4008. case 2:
  4009. return "BAD_PARAM";
  4010. case 3:
  4011. return "BAD_CHECKSUM";
  4012. case 4:
  4013. return "NMI_INTERRUPT";
  4014. case 5:
  4015. return "SYSASSERT";
  4016. case 6:
  4017. return "FATAL_ERROR";
  4018. }
  4019. return "UNKNOWN";
  4020. }
  4021. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4022. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4023. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  4024. {
  4025. u32 data2, line;
  4026. u32 desc, time, count, base, data1;
  4027. u32 blink1, blink2, ilink1, ilink2;
  4028. int rc;
  4029. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4030. if (!iwl_hw_valid_rtc_data_addr(base)) {
  4031. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4032. return;
  4033. }
  4034. rc = iwl_grab_restricted_access(priv);
  4035. if (rc) {
  4036. IWL_WARNING("Can not read from adapter at this time.\n");
  4037. return;
  4038. }
  4039. count = iwl_read_restricted_mem(priv, base);
  4040. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4041. IWL_ERROR("Start IWL Error Log Dump:\n");
  4042. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4043. priv->status, priv->config, count);
  4044. }
  4045. desc = iwl_read_restricted_mem(priv, base + 1 * sizeof(u32));
  4046. blink1 = iwl_read_restricted_mem(priv, base + 3 * sizeof(u32));
  4047. blink2 = iwl_read_restricted_mem(priv, base + 4 * sizeof(u32));
  4048. ilink1 = iwl_read_restricted_mem(priv, base + 5 * sizeof(u32));
  4049. ilink2 = iwl_read_restricted_mem(priv, base + 6 * sizeof(u32));
  4050. data1 = iwl_read_restricted_mem(priv, base + 7 * sizeof(u32));
  4051. data2 = iwl_read_restricted_mem(priv, base + 8 * sizeof(u32));
  4052. line = iwl_read_restricted_mem(priv, base + 9 * sizeof(u32));
  4053. time = iwl_read_restricted_mem(priv, base + 11 * sizeof(u32));
  4054. IWL_ERROR("Desc Time "
  4055. "data1 data2 line\n");
  4056. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4057. desc_lookup(desc), desc, time, data1, data2, line);
  4058. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4059. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4060. ilink1, ilink2);
  4061. iwl_release_restricted_access(priv);
  4062. }
  4063. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4064. /**
  4065. * iwl_print_event_log - Dump error event log to syslog
  4066. *
  4067. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  4068. */
  4069. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  4070. u32 num_events, u32 mode)
  4071. {
  4072. u32 i;
  4073. u32 base; /* SRAM byte address of event log header */
  4074. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4075. u32 ptr; /* SRAM byte address of log data */
  4076. u32 ev, time, data; /* event log data */
  4077. if (num_events == 0)
  4078. return;
  4079. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4080. if (mode == 0)
  4081. event_size = 2 * sizeof(u32);
  4082. else
  4083. event_size = 3 * sizeof(u32);
  4084. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4085. /* "time" is actually "data" for mode 0 (no timestamp).
  4086. * place event id # at far right for easier visual parsing. */
  4087. for (i = 0; i < num_events; i++) {
  4088. ev = iwl_read_restricted_mem(priv, ptr);
  4089. ptr += sizeof(u32);
  4090. time = iwl_read_restricted_mem(priv, ptr);
  4091. ptr += sizeof(u32);
  4092. if (mode == 0)
  4093. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4094. else {
  4095. data = iwl_read_restricted_mem(priv, ptr);
  4096. ptr += sizeof(u32);
  4097. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4098. }
  4099. }
  4100. }
  4101. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  4102. {
  4103. int rc;
  4104. u32 base; /* SRAM byte address of event log header */
  4105. u32 capacity; /* event log capacity in # entries */
  4106. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4107. u32 num_wraps; /* # times uCode wrapped to top of log */
  4108. u32 next_entry; /* index of next entry to be written by uCode */
  4109. u32 size; /* # entries that we'll print */
  4110. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4111. if (!iwl_hw_valid_rtc_data_addr(base)) {
  4112. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4113. return;
  4114. }
  4115. rc = iwl_grab_restricted_access(priv);
  4116. if (rc) {
  4117. IWL_WARNING("Can not read from adapter at this time.\n");
  4118. return;
  4119. }
  4120. /* event log header */
  4121. capacity = iwl_read_restricted_mem(priv, base);
  4122. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  4123. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  4124. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  4125. size = num_wraps ? capacity : next_entry;
  4126. /* bail out if nothing in log */
  4127. if (size == 0) {
  4128. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4129. iwl_release_restricted_access(priv);
  4130. return;
  4131. }
  4132. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4133. size, num_wraps);
  4134. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4135. * i.e the next one that uCode would fill. */
  4136. if (num_wraps)
  4137. iwl_print_event_log(priv, next_entry,
  4138. capacity - next_entry, mode);
  4139. /* (then/else) start at top of log */
  4140. iwl_print_event_log(priv, 0, next_entry, mode);
  4141. iwl_release_restricted_access(priv);
  4142. }
  4143. /**
  4144. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  4145. */
  4146. static void iwl_irq_handle_error(struct iwl_priv *priv)
  4147. {
  4148. /* Set the FW error flag -- cleared on iwl_down */
  4149. set_bit(STATUS_FW_ERROR, &priv->status);
  4150. /* Cancel currently queued command. */
  4151. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4152. #ifdef CONFIG_IWLWIFI_DEBUG
  4153. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  4154. iwl_dump_nic_error_log(priv);
  4155. iwl_dump_nic_event_log(priv);
  4156. iwl_print_rx_config_cmd(&priv->staging_rxon);
  4157. }
  4158. #endif
  4159. wake_up_interruptible(&priv->wait_command_queue);
  4160. /* Keep the restart process from trying to send host
  4161. * commands by clearing the INIT status bit */
  4162. clear_bit(STATUS_READY, &priv->status);
  4163. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4164. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4165. "Restarting adapter due to uCode error.\n");
  4166. if (iwl_is_associated(priv)) {
  4167. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4168. sizeof(priv->recovery_rxon));
  4169. priv->error_recovering = 1;
  4170. }
  4171. queue_work(priv->workqueue, &priv->restart);
  4172. }
  4173. }
  4174. static void iwl_error_recovery(struct iwl_priv *priv)
  4175. {
  4176. unsigned long flags;
  4177. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4178. sizeof(priv->staging_rxon));
  4179. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4180. iwl_commit_rxon(priv);
  4181. iwl_rxon_add_station(priv, priv->bssid, 1);
  4182. spin_lock_irqsave(&priv->lock, flags);
  4183. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4184. priv->error_recovering = 0;
  4185. spin_unlock_irqrestore(&priv->lock, flags);
  4186. }
  4187. static void iwl_irq_tasklet(struct iwl_priv *priv)
  4188. {
  4189. u32 inta, handled = 0;
  4190. u32 inta_fh;
  4191. unsigned long flags;
  4192. #ifdef CONFIG_IWLWIFI_DEBUG
  4193. u32 inta_mask;
  4194. #endif
  4195. spin_lock_irqsave(&priv->lock, flags);
  4196. /* Ack/clear/reset pending uCode interrupts.
  4197. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4198. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4199. inta = iwl_read32(priv, CSR_INT);
  4200. iwl_write32(priv, CSR_INT, inta);
  4201. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4202. * Any new interrupts that happen after this, either while we're
  4203. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4204. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4205. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4206. #ifdef CONFIG_IWLWIFI_DEBUG
  4207. if (iwl_debug_level & IWL_DL_ISR) {
  4208. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4209. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4210. inta, inta_mask, inta_fh);
  4211. }
  4212. #endif
  4213. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4214. * atomic, make sure that inta covers all the interrupts that
  4215. * we've discovered, even if FH interrupt came in just after
  4216. * reading CSR_INT. */
  4217. if (inta_fh & CSR_FH_INT_RX_MASK)
  4218. inta |= CSR_INT_BIT_FH_RX;
  4219. if (inta_fh & CSR_FH_INT_TX_MASK)
  4220. inta |= CSR_INT_BIT_FH_TX;
  4221. /* Now service all interrupt bits discovered above. */
  4222. if (inta & CSR_INT_BIT_HW_ERR) {
  4223. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4224. /* Tell the device to stop sending interrupts */
  4225. iwl_disable_interrupts(priv);
  4226. iwl_irq_handle_error(priv);
  4227. handled |= CSR_INT_BIT_HW_ERR;
  4228. spin_unlock_irqrestore(&priv->lock, flags);
  4229. return;
  4230. }
  4231. #ifdef CONFIG_IWLWIFI_DEBUG
  4232. if (iwl_debug_level & (IWL_DL_ISR)) {
  4233. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4234. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4235. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4236. /* Alive notification via Rx interrupt will do the real work */
  4237. if (inta & CSR_INT_BIT_ALIVE)
  4238. IWL_DEBUG_ISR("Alive interrupt\n");
  4239. }
  4240. #endif
  4241. /* Safely ignore these bits for debug checks below */
  4242. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4243. /* HW RF KILL switch toggled (4965 only) */
  4244. if (inta & CSR_INT_BIT_RF_KILL) {
  4245. int hw_rf_kill = 0;
  4246. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  4247. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4248. hw_rf_kill = 1;
  4249. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4250. "RF_KILL bit toggled to %s.\n",
  4251. hw_rf_kill ? "disable radio":"enable radio");
  4252. /* Queue restart only if RF_KILL switch was set to "kill"
  4253. * when we loaded driver, and is now set to "enable".
  4254. * After we're Alive, RF_KILL gets handled by
  4255. * iwl_rx_card_state_notif() */
  4256. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4257. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4258. queue_work(priv->workqueue, &priv->restart);
  4259. }
  4260. handled |= CSR_INT_BIT_RF_KILL;
  4261. }
  4262. /* Chip got too hot and stopped itself (4965 only) */
  4263. if (inta & CSR_INT_BIT_CT_KILL) {
  4264. IWL_ERROR("Microcode CT kill error detected.\n");
  4265. handled |= CSR_INT_BIT_CT_KILL;
  4266. }
  4267. /* Error detected by uCode */
  4268. if (inta & CSR_INT_BIT_SW_ERR) {
  4269. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4270. inta);
  4271. iwl_irq_handle_error(priv);
  4272. handled |= CSR_INT_BIT_SW_ERR;
  4273. }
  4274. /* uCode wakes up after power-down sleep */
  4275. if (inta & CSR_INT_BIT_WAKEUP) {
  4276. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4277. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  4278. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4279. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4280. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4281. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4282. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4283. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4284. handled |= CSR_INT_BIT_WAKEUP;
  4285. }
  4286. /* All uCode command responses, including Tx command responses,
  4287. * Rx "responses" (frame-received notification), and other
  4288. * notifications from uCode come through here*/
  4289. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4290. iwl_rx_handle(priv);
  4291. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4292. }
  4293. if (inta & CSR_INT_BIT_FH_TX) {
  4294. IWL_DEBUG_ISR("Tx interrupt\n");
  4295. handled |= CSR_INT_BIT_FH_TX;
  4296. }
  4297. if (inta & ~handled)
  4298. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4299. if (inta & ~CSR_INI_SET_MASK) {
  4300. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4301. inta & ~CSR_INI_SET_MASK);
  4302. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4303. }
  4304. /* Re-enable all interrupts */
  4305. iwl_enable_interrupts(priv);
  4306. #ifdef CONFIG_IWLWIFI_DEBUG
  4307. if (iwl_debug_level & (IWL_DL_ISR)) {
  4308. inta = iwl_read32(priv, CSR_INT);
  4309. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4310. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4311. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4312. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4313. }
  4314. #endif
  4315. spin_unlock_irqrestore(&priv->lock, flags);
  4316. }
  4317. static irqreturn_t iwl_isr(int irq, void *data)
  4318. {
  4319. struct iwl_priv *priv = data;
  4320. u32 inta, inta_mask;
  4321. u32 inta_fh;
  4322. if (!priv)
  4323. return IRQ_NONE;
  4324. spin_lock(&priv->lock);
  4325. /* Disable (but don't clear!) interrupts here to avoid
  4326. * back-to-back ISRs and sporadic interrupts from our NIC.
  4327. * If we have something to service, the tasklet will re-enable ints.
  4328. * If we *don't* have something, we'll re-enable before leaving here. */
  4329. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4330. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4331. /* Discover which interrupts are active/pending */
  4332. inta = iwl_read32(priv, CSR_INT);
  4333. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4334. /* Ignore interrupt if there's nothing in NIC to service.
  4335. * This may be due to IRQ shared with another device,
  4336. * or due to sporadic interrupts thrown from our NIC. */
  4337. if (!inta && !inta_fh) {
  4338. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4339. goto none;
  4340. }
  4341. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4342. /* Hardware disappeared. It might have already raised
  4343. * an interrupt */
  4344. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4345. goto unplugged;
  4346. }
  4347. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4348. inta, inta_mask, inta_fh);
  4349. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4350. tasklet_schedule(&priv->irq_tasklet);
  4351. unplugged:
  4352. spin_unlock(&priv->lock);
  4353. return IRQ_HANDLED;
  4354. none:
  4355. /* re-enable interrupts here since we don't have anything to service. */
  4356. iwl_enable_interrupts(priv);
  4357. spin_unlock(&priv->lock);
  4358. return IRQ_NONE;
  4359. }
  4360. /************************** EEPROM BANDS ****************************
  4361. *
  4362. * The iwl_eeprom_band definitions below provide the mapping from the
  4363. * EEPROM contents to the specific channel number supported for each
  4364. * band.
  4365. *
  4366. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4367. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4368. * The specific geography and calibration information for that channel
  4369. * is contained in the eeprom map itself.
  4370. *
  4371. * During init, we copy the eeprom information and channel map
  4372. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4373. *
  4374. * channel_map_24/52 provides the index in the channel_info array for a
  4375. * given channel. We have to have two separate maps as there is channel
  4376. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4377. * band_2
  4378. *
  4379. * A value of 0xff stored in the channel_map indicates that the channel
  4380. * is not supported by the hardware at all.
  4381. *
  4382. * A value of 0xfe in the channel_map indicates that the channel is not
  4383. * valid for Tx with the current hardware. This means that
  4384. * while the system can tune and receive on a given channel, it may not
  4385. * be able to associate or transmit any frames on that
  4386. * channel. There is no corresponding channel information for that
  4387. * entry.
  4388. *
  4389. *********************************************************************/
  4390. /* 2.4 GHz */
  4391. static const u8 iwl_eeprom_band_1[14] = {
  4392. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4393. };
  4394. /* 5.2 GHz bands */
  4395. static const u8 iwl_eeprom_band_2[] = {
  4396. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4397. };
  4398. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4399. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4400. };
  4401. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4402. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4403. };
  4404. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4405. 145, 149, 153, 157, 161, 165
  4406. };
  4407. static u8 iwl_eeprom_band_6[] = { /* 2.4 FAT channel */
  4408. 1, 2, 3, 4, 5, 6, 7
  4409. };
  4410. static u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */
  4411. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4412. };
  4413. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4414. int *eeprom_ch_count,
  4415. const struct iwl_eeprom_channel
  4416. **eeprom_ch_info,
  4417. const u8 **eeprom_ch_index)
  4418. {
  4419. switch (band) {
  4420. case 1: /* 2.4GHz band */
  4421. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4422. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4423. *eeprom_ch_index = iwl_eeprom_band_1;
  4424. break;
  4425. case 2: /* 5.2GHz band */
  4426. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4427. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4428. *eeprom_ch_index = iwl_eeprom_band_2;
  4429. break;
  4430. case 3: /* 5.2GHz band */
  4431. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4432. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4433. *eeprom_ch_index = iwl_eeprom_band_3;
  4434. break;
  4435. case 4: /* 5.2GHz band */
  4436. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4437. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4438. *eeprom_ch_index = iwl_eeprom_band_4;
  4439. break;
  4440. case 5: /* 5.2GHz band */
  4441. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4442. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4443. *eeprom_ch_index = iwl_eeprom_band_5;
  4444. break;
  4445. case 6:
  4446. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
  4447. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4448. *eeprom_ch_index = iwl_eeprom_band_6;
  4449. break;
  4450. case 7:
  4451. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
  4452. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4453. *eeprom_ch_index = iwl_eeprom_band_7;
  4454. break;
  4455. default:
  4456. BUG();
  4457. return;
  4458. }
  4459. }
  4460. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4461. int phymode, u16 channel)
  4462. {
  4463. int i;
  4464. switch (phymode) {
  4465. case MODE_IEEE80211A:
  4466. for (i = 14; i < priv->channel_count; i++) {
  4467. if (priv->channel_info[i].channel == channel)
  4468. return &priv->channel_info[i];
  4469. }
  4470. break;
  4471. case MODE_IEEE80211B:
  4472. case MODE_IEEE80211G:
  4473. if (channel >= 1 && channel <= 14)
  4474. return &priv->channel_info[channel - 1];
  4475. break;
  4476. }
  4477. return NULL;
  4478. }
  4479. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4480. ? # x " " : "")
  4481. static int iwl_init_channel_map(struct iwl_priv *priv)
  4482. {
  4483. int eeprom_ch_count = 0;
  4484. const u8 *eeprom_ch_index = NULL;
  4485. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4486. int band, ch;
  4487. struct iwl_channel_info *ch_info;
  4488. if (priv->channel_count) {
  4489. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4490. return 0;
  4491. }
  4492. if (priv->eeprom.version < 0x2f) {
  4493. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4494. priv->eeprom.version);
  4495. return -EINVAL;
  4496. }
  4497. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4498. priv->channel_count =
  4499. ARRAY_SIZE(iwl_eeprom_band_1) +
  4500. ARRAY_SIZE(iwl_eeprom_band_2) +
  4501. ARRAY_SIZE(iwl_eeprom_band_3) +
  4502. ARRAY_SIZE(iwl_eeprom_band_4) +
  4503. ARRAY_SIZE(iwl_eeprom_band_5);
  4504. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4505. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4506. priv->channel_count, GFP_KERNEL);
  4507. if (!priv->channel_info) {
  4508. IWL_ERROR("Could not allocate channel_info\n");
  4509. priv->channel_count = 0;
  4510. return -ENOMEM;
  4511. }
  4512. ch_info = priv->channel_info;
  4513. /* Loop through the 5 EEPROM bands adding them in order to the
  4514. * channel map we maintain (that contains additional information than
  4515. * what just in the EEPROM) */
  4516. for (band = 1; band <= 5; band++) {
  4517. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4518. &eeprom_ch_info, &eeprom_ch_index);
  4519. /* Loop through each band adding each of the channels */
  4520. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4521. ch_info->channel = eeprom_ch_index[ch];
  4522. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4523. MODE_IEEE80211A;
  4524. /* permanently store EEPROM's channel regulatory flags
  4525. * and max power in channel info database. */
  4526. ch_info->eeprom = eeprom_ch_info[ch];
  4527. /* Copy the run-time flags so they are there even on
  4528. * invalid channels */
  4529. ch_info->flags = eeprom_ch_info[ch].flags;
  4530. if (!(is_channel_valid(ch_info))) {
  4531. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4532. "No traffic\n",
  4533. ch_info->channel,
  4534. ch_info->flags,
  4535. is_channel_a_band(ch_info) ?
  4536. "5.2" : "2.4");
  4537. ch_info++;
  4538. continue;
  4539. }
  4540. /* Initialize regulatory-based run-time data */
  4541. ch_info->max_power_avg = ch_info->curr_txpow =
  4542. eeprom_ch_info[ch].max_power_avg;
  4543. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4544. ch_info->min_power = 0;
  4545. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4546. " %ddBm): Ad-Hoc %ssupported\n",
  4547. ch_info->channel,
  4548. is_channel_a_band(ch_info) ?
  4549. "5.2" : "2.4",
  4550. CHECK_AND_PRINT(IBSS),
  4551. CHECK_AND_PRINT(ACTIVE),
  4552. CHECK_AND_PRINT(RADAR),
  4553. CHECK_AND_PRINT(WIDE),
  4554. CHECK_AND_PRINT(NARROW),
  4555. CHECK_AND_PRINT(DFS),
  4556. eeprom_ch_info[ch].flags,
  4557. eeprom_ch_info[ch].max_power_avg,
  4558. ((eeprom_ch_info[ch].
  4559. flags & EEPROM_CHANNEL_IBSS)
  4560. && !(eeprom_ch_info[ch].
  4561. flags & EEPROM_CHANNEL_RADAR))
  4562. ? "" : "not ");
  4563. /* Set the user_txpower_limit to the highest power
  4564. * supported by any channel */
  4565. if (eeprom_ch_info[ch].max_power_avg >
  4566. priv->user_txpower_limit)
  4567. priv->user_txpower_limit =
  4568. eeprom_ch_info[ch].max_power_avg;
  4569. ch_info++;
  4570. }
  4571. }
  4572. for (band = 6; band <= 7; band++) {
  4573. int phymode;
  4574. u8 fat_extension_chan;
  4575. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4576. &eeprom_ch_info, &eeprom_ch_index);
  4577. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4578. /* Loop through each band adding each of the channels */
  4579. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4580. if ((band == 6) &&
  4581. ((eeprom_ch_index[ch] == 5) ||
  4582. (eeprom_ch_index[ch] == 6) ||
  4583. (eeprom_ch_index[ch] == 7)))
  4584. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4585. else
  4586. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4587. iwl4965_set_fat_chan_info(priv, phymode,
  4588. eeprom_ch_index[ch],
  4589. &(eeprom_ch_info[ch]),
  4590. fat_extension_chan);
  4591. iwl4965_set_fat_chan_info(priv, phymode,
  4592. (eeprom_ch_index[ch] + 4),
  4593. &(eeprom_ch_info[ch]),
  4594. HT_IE_EXT_CHANNEL_BELOW);
  4595. }
  4596. }
  4597. return 0;
  4598. }
  4599. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4600. * sending probe req. This should be set long enough to hear probe responses
  4601. * from more than one AP. */
  4602. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4603. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4604. /* For faster active scanning, scan will move to the next channel if fewer than
  4605. * PLCP_QUIET_THRESH packets are heard on this channel within
  4606. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4607. * time if it's a quiet channel (nothing responded to our probe, and there's
  4608. * no other traffic).
  4609. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4610. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4611. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4612. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4613. * Must be set longer than active dwell time.
  4614. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4615. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4616. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4617. #define IWL_PASSIVE_DWELL_BASE (100)
  4618. #define IWL_CHANNEL_TUNE_TIME 5
  4619. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4620. {
  4621. if (phymode == MODE_IEEE80211A)
  4622. return IWL_ACTIVE_DWELL_TIME_52;
  4623. else
  4624. return IWL_ACTIVE_DWELL_TIME_24;
  4625. }
  4626. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4627. {
  4628. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4629. u16 passive = (phymode != MODE_IEEE80211A) ?
  4630. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4631. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4632. if (iwl_is_associated(priv)) {
  4633. /* If we're associated, we clamp the maximum passive
  4634. * dwell time to be 98% of the beacon interval (minus
  4635. * 2 * channel tune time) */
  4636. passive = priv->beacon_int;
  4637. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4638. passive = IWL_PASSIVE_DWELL_BASE;
  4639. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4640. }
  4641. if (passive <= active)
  4642. passive = active + 1;
  4643. return passive;
  4644. }
  4645. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4646. u8 is_active, u8 direct_mask,
  4647. struct iwl_scan_channel *scan_ch)
  4648. {
  4649. const struct ieee80211_channel *channels = NULL;
  4650. const struct ieee80211_hw_mode *hw_mode;
  4651. const struct iwl_channel_info *ch_info;
  4652. u16 passive_dwell = 0;
  4653. u16 active_dwell = 0;
  4654. int added, i;
  4655. hw_mode = iwl_get_hw_mode(priv, phymode);
  4656. if (!hw_mode)
  4657. return 0;
  4658. channels = hw_mode->channels;
  4659. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4660. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4661. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4662. if (channels[i].chan ==
  4663. le16_to_cpu(priv->active_rxon.channel)) {
  4664. if (iwl_is_associated(priv)) {
  4665. IWL_DEBUG_SCAN
  4666. ("Skipping current channel %d\n",
  4667. le16_to_cpu(priv->active_rxon.channel));
  4668. continue;
  4669. }
  4670. } else if (priv->only_active_channel)
  4671. continue;
  4672. scan_ch->channel = channels[i].chan;
  4673. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4674. if (!is_channel_valid(ch_info)) {
  4675. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4676. scan_ch->channel);
  4677. continue;
  4678. }
  4679. if (!is_active || is_channel_passive(ch_info) ||
  4680. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4681. scan_ch->type = 0; /* passive */
  4682. else
  4683. scan_ch->type = 1; /* active */
  4684. if (scan_ch->type & 1)
  4685. scan_ch->type |= (direct_mask << 1);
  4686. if (is_channel_narrow(ch_info))
  4687. scan_ch->type |= (1 << 7);
  4688. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4689. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4690. /* Set power levels to defaults */
  4691. scan_ch->tpc.dsp_atten = 110;
  4692. /* scan_pwr_info->tpc.dsp_atten; */
  4693. /*scan_pwr_info->tpc.tx_gain; */
  4694. if (phymode == MODE_IEEE80211A)
  4695. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4696. else {
  4697. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4698. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4699. * power level
  4700. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4701. */
  4702. }
  4703. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4704. scan_ch->channel,
  4705. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4706. (scan_ch->type & 1) ?
  4707. active_dwell : passive_dwell);
  4708. scan_ch++;
  4709. added++;
  4710. }
  4711. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4712. return added;
  4713. }
  4714. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4715. {
  4716. int i, j;
  4717. for (i = 0; i < 3; i++) {
  4718. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4719. for (j = 0; j < hw_mode->num_channels; j++)
  4720. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4721. }
  4722. }
  4723. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4724. struct ieee80211_rate *rates)
  4725. {
  4726. int i;
  4727. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4728. rates[i].rate = iwl_rates[i].ieee * 5;
  4729. rates[i].val = i; /* Rate scaling will work on indexes */
  4730. rates[i].val2 = i;
  4731. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4732. /* Only OFDM have the bits-per-symbol set */
  4733. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4734. rates[i].flags |= IEEE80211_RATE_OFDM;
  4735. else {
  4736. /*
  4737. * If CCK 1M then set rate flag to CCK else CCK_2
  4738. * which is CCK | PREAMBLE2
  4739. */
  4740. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4741. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4742. }
  4743. /* Set up which ones are basic rates... */
  4744. if (IWL_BASIC_RATES_MASK & (1 << i))
  4745. rates[i].flags |= IEEE80211_RATE_BASIC;
  4746. }
  4747. iwl4965_init_hw_rates(priv, rates);
  4748. }
  4749. /**
  4750. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4751. */
  4752. static int iwl_init_geos(struct iwl_priv *priv)
  4753. {
  4754. struct iwl_channel_info *ch;
  4755. struct ieee80211_hw_mode *modes;
  4756. struct ieee80211_channel *channels;
  4757. struct ieee80211_channel *geo_ch;
  4758. struct ieee80211_rate *rates;
  4759. int i = 0;
  4760. enum {
  4761. A = 0,
  4762. B = 1,
  4763. G = 2,
  4764. A_11N = 3,
  4765. G_11N = 4,
  4766. };
  4767. int mode_count = 5;
  4768. if (priv->modes) {
  4769. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4770. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4771. return 0;
  4772. }
  4773. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4774. GFP_KERNEL);
  4775. if (!modes)
  4776. return -ENOMEM;
  4777. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4778. priv->channel_count, GFP_KERNEL);
  4779. if (!channels) {
  4780. kfree(modes);
  4781. return -ENOMEM;
  4782. }
  4783. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4784. GFP_KERNEL);
  4785. if (!rates) {
  4786. kfree(modes);
  4787. kfree(channels);
  4788. return -ENOMEM;
  4789. }
  4790. /* 0 = 802.11a
  4791. * 1 = 802.11b
  4792. * 2 = 802.11g
  4793. */
  4794. /* 5.2GHz channels start after the 2.4GHz channels */
  4795. modes[A].mode = MODE_IEEE80211A;
  4796. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4797. modes[A].rates = rates;
  4798. modes[A].num_rates = 8; /* just OFDM */
  4799. modes[A].rates = &rates[4];
  4800. modes[A].num_channels = 0;
  4801. modes[B].mode = MODE_IEEE80211B;
  4802. modes[B].channels = channels;
  4803. modes[B].rates = rates;
  4804. modes[B].num_rates = 4; /* just CCK */
  4805. modes[B].num_channels = 0;
  4806. modes[G].mode = MODE_IEEE80211G;
  4807. modes[G].channels = channels;
  4808. modes[G].rates = rates;
  4809. modes[G].num_rates = 12; /* OFDM & CCK */
  4810. modes[G].num_channels = 0;
  4811. modes[G_11N].mode = MODE_IEEE80211G;
  4812. modes[G_11N].channels = channels;
  4813. modes[G_11N].num_rates = 13; /* OFDM & CCK */
  4814. modes[G_11N].rates = rates;
  4815. modes[G_11N].num_channels = 0;
  4816. modes[A_11N].mode = MODE_IEEE80211A;
  4817. modes[A_11N].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4818. modes[A_11N].rates = &rates[4];
  4819. modes[A_11N].num_rates = 9; /* just OFDM */
  4820. modes[A_11N].num_channels = 0;
  4821. priv->ieee_channels = channels;
  4822. priv->ieee_rates = rates;
  4823. iwl_init_hw_rates(priv, rates);
  4824. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4825. ch = &priv->channel_info[i];
  4826. if (!is_channel_valid(ch)) {
  4827. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4828. "skipping.\n",
  4829. ch->channel, is_channel_a_band(ch) ?
  4830. "5.2" : "2.4");
  4831. continue;
  4832. }
  4833. if (is_channel_a_band(ch)) {
  4834. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4835. modes[A_11N].num_channels++;
  4836. } else {
  4837. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4838. modes[G].num_channels++;
  4839. modes[G_11N].num_channels++;
  4840. }
  4841. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4842. geo_ch->chan = ch->channel;
  4843. geo_ch->power_level = ch->max_power_avg;
  4844. geo_ch->antenna_max = 0xff;
  4845. if (is_channel_valid(ch)) {
  4846. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4847. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4848. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4849. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4850. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4851. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4852. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4853. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4854. priv->max_channel_txpower_limit =
  4855. ch->max_power_avg;
  4856. }
  4857. geo_ch->val = geo_ch->flag;
  4858. }
  4859. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4860. printk(KERN_INFO DRV_NAME
  4861. ": Incorrectly detected BG card as ABG. Please send "
  4862. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4863. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4864. priv->is_abg = 0;
  4865. }
  4866. printk(KERN_INFO DRV_NAME
  4867. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4868. modes[G].num_channels, modes[A].num_channels);
  4869. /*
  4870. * NOTE: We register these in preference of order -- the
  4871. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4872. * a phymode based on rates or AP capabilities but seems to
  4873. * configure it purely on if the channel being configured
  4874. * is supported by a mode -- and the first match is taken
  4875. */
  4876. if (modes[G].num_channels)
  4877. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4878. if (modes[B].num_channels)
  4879. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4880. if (modes[A].num_channels)
  4881. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4882. priv->modes = modes;
  4883. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4884. return 0;
  4885. }
  4886. /******************************************************************************
  4887. *
  4888. * uCode download functions
  4889. *
  4890. ******************************************************************************/
  4891. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4892. {
  4893. if (priv->ucode_code.v_addr != NULL) {
  4894. pci_free_consistent(priv->pci_dev,
  4895. priv->ucode_code.len,
  4896. priv->ucode_code.v_addr,
  4897. priv->ucode_code.p_addr);
  4898. priv->ucode_code.v_addr = NULL;
  4899. }
  4900. if (priv->ucode_data.v_addr != NULL) {
  4901. pci_free_consistent(priv->pci_dev,
  4902. priv->ucode_data.len,
  4903. priv->ucode_data.v_addr,
  4904. priv->ucode_data.p_addr);
  4905. priv->ucode_data.v_addr = NULL;
  4906. }
  4907. if (priv->ucode_data_backup.v_addr != NULL) {
  4908. pci_free_consistent(priv->pci_dev,
  4909. priv->ucode_data_backup.len,
  4910. priv->ucode_data_backup.v_addr,
  4911. priv->ucode_data_backup.p_addr);
  4912. priv->ucode_data_backup.v_addr = NULL;
  4913. }
  4914. if (priv->ucode_init.v_addr != NULL) {
  4915. pci_free_consistent(priv->pci_dev,
  4916. priv->ucode_init.len,
  4917. priv->ucode_init.v_addr,
  4918. priv->ucode_init.p_addr);
  4919. priv->ucode_init.v_addr = NULL;
  4920. }
  4921. if (priv->ucode_init_data.v_addr != NULL) {
  4922. pci_free_consistent(priv->pci_dev,
  4923. priv->ucode_init_data.len,
  4924. priv->ucode_init_data.v_addr,
  4925. priv->ucode_init_data.p_addr);
  4926. priv->ucode_init_data.v_addr = NULL;
  4927. }
  4928. if (priv->ucode_boot.v_addr != NULL) {
  4929. pci_free_consistent(priv->pci_dev,
  4930. priv->ucode_boot.len,
  4931. priv->ucode_boot.v_addr,
  4932. priv->ucode_boot.p_addr);
  4933. priv->ucode_boot.v_addr = NULL;
  4934. }
  4935. }
  4936. /**
  4937. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4938. * looking at all data.
  4939. */
  4940. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4941. {
  4942. u32 val;
  4943. u32 save_len = len;
  4944. int rc = 0;
  4945. u32 errcnt;
  4946. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4947. rc = iwl_grab_restricted_access(priv);
  4948. if (rc)
  4949. return rc;
  4950. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4951. errcnt = 0;
  4952. for (; len > 0; len -= sizeof(u32), image++) {
  4953. /* read data comes through single port, auto-incr addr */
  4954. /* NOTE: Use the debugless read so we don't flood kernel log
  4955. * if IWL_DL_IO is set */
  4956. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4957. if (val != le32_to_cpu(*image)) {
  4958. IWL_ERROR("uCode INST section is invalid at "
  4959. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4960. save_len - len, val, le32_to_cpu(*image));
  4961. rc = -EIO;
  4962. errcnt++;
  4963. if (errcnt >= 20)
  4964. break;
  4965. }
  4966. }
  4967. iwl_release_restricted_access(priv);
  4968. if (!errcnt)
  4969. IWL_DEBUG_INFO
  4970. ("ucode image in INSTRUCTION memory is good\n");
  4971. return rc;
  4972. }
  4973. /**
  4974. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4975. * using sample data 100 bytes apart. If these sample points are good,
  4976. * it's a pretty good bet that everything between them is good, too.
  4977. */
  4978. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4979. {
  4980. u32 val;
  4981. int rc = 0;
  4982. u32 errcnt = 0;
  4983. u32 i;
  4984. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4985. rc = iwl_grab_restricted_access(priv);
  4986. if (rc)
  4987. return rc;
  4988. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4989. /* read data comes through single port, auto-incr addr */
  4990. /* NOTE: Use the debugless read so we don't flood kernel log
  4991. * if IWL_DL_IO is set */
  4992. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4993. i + RTC_INST_LOWER_BOUND);
  4994. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4995. if (val != le32_to_cpu(*image)) {
  4996. #if 0 /* Enable this if you want to see details */
  4997. IWL_ERROR("uCode INST section is invalid at "
  4998. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4999. i, val, *image);
  5000. #endif
  5001. rc = -EIO;
  5002. errcnt++;
  5003. if (errcnt >= 3)
  5004. break;
  5005. }
  5006. }
  5007. iwl_release_restricted_access(priv);
  5008. return rc;
  5009. }
  5010. /**
  5011. * iwl_verify_ucode - determine which instruction image is in SRAM,
  5012. * and verify its contents
  5013. */
  5014. static int iwl_verify_ucode(struct iwl_priv *priv)
  5015. {
  5016. __le32 *image;
  5017. u32 len;
  5018. int rc = 0;
  5019. /* Try bootstrap */
  5020. image = (__le32 *)priv->ucode_boot.v_addr;
  5021. len = priv->ucode_boot.len;
  5022. rc = iwl_verify_inst_sparse(priv, image, len);
  5023. if (rc == 0) {
  5024. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5025. return 0;
  5026. }
  5027. /* Try initialize */
  5028. image = (__le32 *)priv->ucode_init.v_addr;
  5029. len = priv->ucode_init.len;
  5030. rc = iwl_verify_inst_sparse(priv, image, len);
  5031. if (rc == 0) {
  5032. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5033. return 0;
  5034. }
  5035. /* Try runtime/protocol */
  5036. image = (__le32 *)priv->ucode_code.v_addr;
  5037. len = priv->ucode_code.len;
  5038. rc = iwl_verify_inst_sparse(priv, image, len);
  5039. if (rc == 0) {
  5040. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5041. return 0;
  5042. }
  5043. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5044. /* Show first several data entries in instruction SRAM.
  5045. * Selection of bootstrap image is arbitrary. */
  5046. image = (__le32 *)priv->ucode_boot.v_addr;
  5047. len = priv->ucode_boot.len;
  5048. rc = iwl_verify_inst_full(priv, image, len);
  5049. return rc;
  5050. }
  5051. /* check contents of special bootstrap uCode SRAM */
  5052. static int iwl_verify_bsm(struct iwl_priv *priv)
  5053. {
  5054. __le32 *image = priv->ucode_boot.v_addr;
  5055. u32 len = priv->ucode_boot.len;
  5056. u32 reg;
  5057. u32 val;
  5058. IWL_DEBUG_INFO("Begin verify bsm\n");
  5059. /* verify BSM SRAM contents */
  5060. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  5061. for (reg = BSM_SRAM_LOWER_BOUND;
  5062. reg < BSM_SRAM_LOWER_BOUND + len;
  5063. reg += sizeof(u32), image ++) {
  5064. val = iwl_read_restricted_reg(priv, reg);
  5065. if (val != le32_to_cpu(*image)) {
  5066. IWL_ERROR("BSM uCode verification failed at "
  5067. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5068. BSM_SRAM_LOWER_BOUND,
  5069. reg - BSM_SRAM_LOWER_BOUND, len,
  5070. val, le32_to_cpu(*image));
  5071. return -EIO;
  5072. }
  5073. }
  5074. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5075. return 0;
  5076. }
  5077. /**
  5078. * iwl_load_bsm - Load bootstrap instructions
  5079. *
  5080. * BSM operation:
  5081. *
  5082. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5083. * in special SRAM that does not power down during RFKILL. When powering back
  5084. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5085. * the bootstrap program into the on-board processor, and starts it.
  5086. *
  5087. * The bootstrap program loads (via DMA) instructions and data for a new
  5088. * program from host DRAM locations indicated by the host driver in the
  5089. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5090. * automatically.
  5091. *
  5092. * When initializing the NIC, the host driver points the BSM to the
  5093. * "initialize" uCode image. This uCode sets up some internal data, then
  5094. * notifies host via "initialize alive" that it is complete.
  5095. *
  5096. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5097. * normal runtime uCode instructions and a backup uCode data cache buffer
  5098. * (filled initially with starting data values for the on-board processor),
  5099. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5100. * which begins normal operation.
  5101. *
  5102. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5103. * the backup data cache in DRAM before SRAM is powered down.
  5104. *
  5105. * When powering back up, the BSM loads the bootstrap program. This reloads
  5106. * the runtime uCode instructions and the backup data cache into SRAM,
  5107. * and re-launches the runtime uCode from where it left off.
  5108. */
  5109. static int iwl_load_bsm(struct iwl_priv *priv)
  5110. {
  5111. __le32 *image = priv->ucode_boot.v_addr;
  5112. u32 len = priv->ucode_boot.len;
  5113. dma_addr_t pinst;
  5114. dma_addr_t pdata;
  5115. u32 inst_len;
  5116. u32 data_len;
  5117. int rc;
  5118. int i;
  5119. u32 done;
  5120. u32 reg_offset;
  5121. IWL_DEBUG_INFO("Begin load bsm\n");
  5122. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5123. if (len > IWL_MAX_BSM_SIZE)
  5124. return -EINVAL;
  5125. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5126. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  5127. * NOTE: iwl_initialize_alive_start() will replace these values,
  5128. * after the "initialize" uCode has run, to point to
  5129. * runtime/protocol instructions and backup data cache. */
  5130. pinst = priv->ucode_init.p_addr >> 4;
  5131. pdata = priv->ucode_init_data.p_addr >> 4;
  5132. inst_len = priv->ucode_init.len;
  5133. data_len = priv->ucode_init_data.len;
  5134. rc = iwl_grab_restricted_access(priv);
  5135. if (rc)
  5136. return rc;
  5137. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5138. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5139. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5140. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5141. /* Fill BSM memory with bootstrap instructions */
  5142. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5143. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5144. reg_offset += sizeof(u32), image++)
  5145. _iwl_write_restricted_reg(priv, reg_offset,
  5146. le32_to_cpu(*image));
  5147. rc = iwl_verify_bsm(priv);
  5148. if (rc) {
  5149. iwl_release_restricted_access(priv);
  5150. return rc;
  5151. }
  5152. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5153. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5154. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  5155. RTC_INST_LOWER_BOUND);
  5156. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5157. /* Load bootstrap code into instruction SRAM now,
  5158. * to prepare to load "initialize" uCode */
  5159. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  5160. BSM_WR_CTRL_REG_BIT_START);
  5161. /* Wait for load of bootstrap uCode to finish */
  5162. for (i = 0; i < 100; i++) {
  5163. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  5164. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5165. break;
  5166. udelay(10);
  5167. }
  5168. if (i < 100)
  5169. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5170. else {
  5171. IWL_ERROR("BSM write did not complete!\n");
  5172. return -EIO;
  5173. }
  5174. /* Enable future boot loads whenever power management unit triggers it
  5175. * (e.g. when powering back up after power-save shutdown) */
  5176. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  5177. BSM_WR_CTRL_REG_BIT_START_EN);
  5178. iwl_release_restricted_access(priv);
  5179. return 0;
  5180. }
  5181. static void iwl_nic_start(struct iwl_priv *priv)
  5182. {
  5183. /* Remove all resets to allow NIC to operate */
  5184. iwl_write32(priv, CSR_RESET, 0);
  5185. }
  5186. /**
  5187. * iwl_read_ucode - Read uCode images from disk file.
  5188. *
  5189. * Copy into buffers for card to fetch via bus-mastering
  5190. */
  5191. static int iwl_read_ucode(struct iwl_priv *priv)
  5192. {
  5193. struct iwl_ucode *ucode;
  5194. int rc = 0;
  5195. const struct firmware *ucode_raw;
  5196. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5197. u8 *src;
  5198. size_t len;
  5199. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5200. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5201. * request_firmware() is synchronous, file is in memory on return. */
  5202. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5203. if (rc < 0) {
  5204. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  5205. goto error;
  5206. }
  5207. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5208. name, ucode_raw->size);
  5209. /* Make sure that we got at least our header! */
  5210. if (ucode_raw->size < sizeof(*ucode)) {
  5211. IWL_ERROR("File size way too small!\n");
  5212. rc = -EINVAL;
  5213. goto err_release;
  5214. }
  5215. /* Data from ucode file: header followed by uCode images */
  5216. ucode = (void *)ucode_raw->data;
  5217. ver = le32_to_cpu(ucode->ver);
  5218. inst_size = le32_to_cpu(ucode->inst_size);
  5219. data_size = le32_to_cpu(ucode->data_size);
  5220. init_size = le32_to_cpu(ucode->init_size);
  5221. init_data_size = le32_to_cpu(ucode->init_data_size);
  5222. boot_size = le32_to_cpu(ucode->boot_size);
  5223. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5224. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5225. inst_size);
  5226. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5227. data_size);
  5228. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5229. init_size);
  5230. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5231. init_data_size);
  5232. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5233. boot_size);
  5234. /* Verify size of file vs. image size info in file's header */
  5235. if (ucode_raw->size < sizeof(*ucode) +
  5236. inst_size + data_size + init_size +
  5237. init_data_size + boot_size) {
  5238. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5239. (int)ucode_raw->size);
  5240. rc = -EINVAL;
  5241. goto err_release;
  5242. }
  5243. /* Verify that uCode images will fit in card's SRAM */
  5244. if (inst_size > IWL_MAX_INST_SIZE) {
  5245. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  5246. (int)inst_size);
  5247. rc = -EINVAL;
  5248. goto err_release;
  5249. }
  5250. if (data_size > IWL_MAX_DATA_SIZE) {
  5251. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  5252. (int)data_size);
  5253. rc = -EINVAL;
  5254. goto err_release;
  5255. }
  5256. if (init_size > IWL_MAX_INST_SIZE) {
  5257. IWL_DEBUG_INFO
  5258. ("uCode init instr len %d too large to fit in card\n",
  5259. (int)init_size);
  5260. rc = -EINVAL;
  5261. goto err_release;
  5262. }
  5263. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5264. IWL_DEBUG_INFO
  5265. ("uCode init data len %d too large to fit in card\n",
  5266. (int)init_data_size);
  5267. rc = -EINVAL;
  5268. goto err_release;
  5269. }
  5270. if (boot_size > IWL_MAX_BSM_SIZE) {
  5271. IWL_DEBUG_INFO
  5272. ("uCode boot instr len %d too large to fit in bsm\n",
  5273. (int)boot_size);
  5274. rc = -EINVAL;
  5275. goto err_release;
  5276. }
  5277. /* Allocate ucode buffers for card's bus-master loading ... */
  5278. /* Runtime instructions and 2 copies of data:
  5279. * 1) unmodified from disk
  5280. * 2) backup cache for save/restore during power-downs */
  5281. priv->ucode_code.len = inst_size;
  5282. priv->ucode_code.v_addr =
  5283. pci_alloc_consistent(priv->pci_dev,
  5284. priv->ucode_code.len,
  5285. &(priv->ucode_code.p_addr));
  5286. priv->ucode_data.len = data_size;
  5287. priv->ucode_data.v_addr =
  5288. pci_alloc_consistent(priv->pci_dev,
  5289. priv->ucode_data.len,
  5290. &(priv->ucode_data.p_addr));
  5291. priv->ucode_data_backup.len = data_size;
  5292. priv->ucode_data_backup.v_addr =
  5293. pci_alloc_consistent(priv->pci_dev,
  5294. priv->ucode_data_backup.len,
  5295. &(priv->ucode_data_backup.p_addr));
  5296. /* Initialization instructions and data */
  5297. priv->ucode_init.len = init_size;
  5298. priv->ucode_init.v_addr =
  5299. pci_alloc_consistent(priv->pci_dev,
  5300. priv->ucode_init.len,
  5301. &(priv->ucode_init.p_addr));
  5302. priv->ucode_init_data.len = init_data_size;
  5303. priv->ucode_init_data.v_addr =
  5304. pci_alloc_consistent(priv->pci_dev,
  5305. priv->ucode_init_data.len,
  5306. &(priv->ucode_init_data.p_addr));
  5307. /* Bootstrap (instructions only, no data) */
  5308. priv->ucode_boot.len = boot_size;
  5309. priv->ucode_boot.v_addr =
  5310. pci_alloc_consistent(priv->pci_dev,
  5311. priv->ucode_boot.len,
  5312. &(priv->ucode_boot.p_addr));
  5313. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  5314. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  5315. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  5316. goto err_pci_alloc;
  5317. /* Copy images into buffers for card's bus-master reads ... */
  5318. /* Runtime instructions (first block of data in file) */
  5319. src = &ucode->data[0];
  5320. len = priv->ucode_code.len;
  5321. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  5322. (int)len);
  5323. memcpy(priv->ucode_code.v_addr, src, len);
  5324. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5325. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5326. /* Runtime data (2nd block)
  5327. * NOTE: Copy into backup buffer will be done in iwl_up() */
  5328. src = &ucode->data[inst_size];
  5329. len = priv->ucode_data.len;
  5330. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5331. (int)len);
  5332. memcpy(priv->ucode_data.v_addr, src, len);
  5333. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5334. /* Initialization instructions (3rd block) */
  5335. if (init_size) {
  5336. src = &ucode->data[inst_size + data_size];
  5337. len = priv->ucode_init.len;
  5338. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5339. (int)len);
  5340. memcpy(priv->ucode_init.v_addr, src, len);
  5341. }
  5342. /* Initialization data (4th block) */
  5343. if (init_data_size) {
  5344. src = &ucode->data[inst_size + data_size + init_size];
  5345. len = priv->ucode_init_data.len;
  5346. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5347. (int)len);
  5348. memcpy(priv->ucode_init_data.v_addr, src, len);
  5349. }
  5350. /* Bootstrap instructions (5th block) */
  5351. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5352. len = priv->ucode_boot.len;
  5353. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5354. (int)len);
  5355. memcpy(priv->ucode_boot.v_addr, src, len);
  5356. /* We have our copies now, allow OS release its copies */
  5357. release_firmware(ucode_raw);
  5358. return 0;
  5359. err_pci_alloc:
  5360. IWL_ERROR("failed to allocate pci memory\n");
  5361. rc = -ENOMEM;
  5362. iwl_dealloc_ucode_pci(priv);
  5363. err_release:
  5364. release_firmware(ucode_raw);
  5365. error:
  5366. return rc;
  5367. }
  5368. /**
  5369. * iwl_set_ucode_ptrs - Set uCode address location
  5370. *
  5371. * Tell initialization uCode where to find runtime uCode.
  5372. *
  5373. * BSM registers initially contain pointers to initialization uCode.
  5374. * We need to replace them to load runtime uCode inst and data,
  5375. * and to save runtime data when powering down.
  5376. */
  5377. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5378. {
  5379. dma_addr_t pinst;
  5380. dma_addr_t pdata;
  5381. int rc = 0;
  5382. unsigned long flags;
  5383. /* bits 35:4 for 4965 */
  5384. pinst = priv->ucode_code.p_addr >> 4;
  5385. pdata = priv->ucode_data_backup.p_addr >> 4;
  5386. spin_lock_irqsave(&priv->lock, flags);
  5387. rc = iwl_grab_restricted_access(priv);
  5388. if (rc) {
  5389. spin_unlock_irqrestore(&priv->lock, flags);
  5390. return rc;
  5391. }
  5392. /* Tell bootstrap uCode where to find image to load */
  5393. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5394. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5395. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5396. priv->ucode_data.len);
  5397. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5398. * that all new ptr/size info is in place */
  5399. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5400. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5401. iwl_release_restricted_access(priv);
  5402. spin_unlock_irqrestore(&priv->lock, flags);
  5403. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5404. return rc;
  5405. }
  5406. /**
  5407. * iwl_init_alive_start - Called after REPLY_ALIVE notification received
  5408. *
  5409. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5410. *
  5411. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5412. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5413. * (3945 does not contain this data).
  5414. *
  5415. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5416. */
  5417. static void iwl_init_alive_start(struct iwl_priv *priv)
  5418. {
  5419. /* Check alive response for "valid" sign from uCode */
  5420. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5421. /* We had an error bringing up the hardware, so take it
  5422. * all the way back down so we can try again */
  5423. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5424. goto restart;
  5425. }
  5426. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5427. * This is a paranoid check, because we would not have gotten the
  5428. * "initialize" alive if code weren't properly loaded. */
  5429. if (iwl_verify_ucode(priv)) {
  5430. /* Runtime instruction load was bad;
  5431. * take it all the way back down so we can try again */
  5432. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5433. goto restart;
  5434. }
  5435. /* Calculate temperature */
  5436. priv->temperature = iwl4965_get_temperature(priv);
  5437. /* Send pointers to protocol/runtime uCode image ... init code will
  5438. * load and launch runtime uCode, which will send us another "Alive"
  5439. * notification. */
  5440. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5441. if (iwl_set_ucode_ptrs(priv)) {
  5442. /* Runtime instruction load won't happen;
  5443. * take it all the way back down so we can try again */
  5444. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5445. goto restart;
  5446. }
  5447. return;
  5448. restart:
  5449. queue_work(priv->workqueue, &priv->restart);
  5450. }
  5451. /**
  5452. * iwl_alive_start - called after REPLY_ALIVE notification received
  5453. * from protocol/runtime uCode (initialization uCode's
  5454. * Alive gets handled by iwl_init_alive_start()).
  5455. */
  5456. static void iwl_alive_start(struct iwl_priv *priv)
  5457. {
  5458. int rc = 0;
  5459. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5460. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5461. /* We had an error bringing up the hardware, so take it
  5462. * all the way back down so we can try again */
  5463. IWL_DEBUG_INFO("Alive failed.\n");
  5464. goto restart;
  5465. }
  5466. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5467. * This is a paranoid check, because we would not have gotten the
  5468. * "runtime" alive if code weren't properly loaded. */
  5469. if (iwl_verify_ucode(priv)) {
  5470. /* Runtime instruction load was bad;
  5471. * take it all the way back down so we can try again */
  5472. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5473. goto restart;
  5474. }
  5475. iwl_clear_stations_table(priv);
  5476. rc = iwl4965_alive_notify(priv);
  5477. if (rc) {
  5478. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5479. rc);
  5480. goto restart;
  5481. }
  5482. /* After the ALIVE response, we can process host commands */
  5483. set_bit(STATUS_ALIVE, &priv->status);
  5484. /* Clear out the uCode error bit if it is set */
  5485. clear_bit(STATUS_FW_ERROR, &priv->status);
  5486. rc = iwl_init_channel_map(priv);
  5487. if (rc) {
  5488. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5489. return;
  5490. }
  5491. iwl_init_geos(priv);
  5492. if (iwl_is_rfkill(priv))
  5493. return;
  5494. if (!priv->mac80211_registered) {
  5495. /* Unlock so any user space entry points can call back into
  5496. * the driver without a deadlock... */
  5497. mutex_unlock(&priv->mutex);
  5498. iwl_rate_control_register(priv->hw);
  5499. rc = ieee80211_register_hw(priv->hw);
  5500. priv->hw->conf.beacon_int = 100;
  5501. mutex_lock(&priv->mutex);
  5502. if (rc) {
  5503. iwl_rate_control_unregister(priv->hw);
  5504. IWL_ERROR("Failed to register network "
  5505. "device (error %d)\n", rc);
  5506. return;
  5507. }
  5508. priv->mac80211_registered = 1;
  5509. iwl_reset_channel_flag(priv);
  5510. } else
  5511. ieee80211_start_queues(priv->hw);
  5512. priv->active_rate = priv->rates_mask;
  5513. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5514. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5515. if (iwl_is_associated(priv)) {
  5516. struct iwl_rxon_cmd *active_rxon =
  5517. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5518. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5519. sizeof(priv->staging_rxon));
  5520. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5521. } else {
  5522. /* Initialize our rx_config data */
  5523. iwl_connection_init_rx_config(priv);
  5524. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5525. }
  5526. /* Configure BT coexistence */
  5527. iwl_send_bt_config(priv);
  5528. /* Configure the adapter for unassociated operation */
  5529. iwl_commit_rxon(priv);
  5530. /* At this point, the NIC is initialized and operational */
  5531. priv->notif_missed_beacons = 0;
  5532. set_bit(STATUS_READY, &priv->status);
  5533. iwl4965_rf_kill_ct_config(priv);
  5534. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5535. if (priv->error_recovering)
  5536. iwl_error_recovery(priv);
  5537. return;
  5538. restart:
  5539. queue_work(priv->workqueue, &priv->restart);
  5540. }
  5541. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5542. static void __iwl_down(struct iwl_priv *priv)
  5543. {
  5544. unsigned long flags;
  5545. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5546. struct ieee80211_conf *conf = NULL;
  5547. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5548. conf = ieee80211_get_hw_conf(priv->hw);
  5549. if (!exit_pending)
  5550. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5551. iwl_clear_stations_table(priv);
  5552. /* Unblock any waiting calls */
  5553. wake_up_interruptible_all(&priv->wait_command_queue);
  5554. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5555. * exiting the module */
  5556. if (!exit_pending)
  5557. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5558. /* stop and reset the on-board processor */
  5559. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5560. /* tell the device to stop sending interrupts */
  5561. iwl_disable_interrupts(priv);
  5562. if (priv->mac80211_registered)
  5563. ieee80211_stop_queues(priv->hw);
  5564. /* If we have not previously called iwl_init() then
  5565. * clear all bits but the RF Kill and SUSPEND bits and return */
  5566. if (!iwl_is_init(priv)) {
  5567. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5568. STATUS_RF_KILL_HW |
  5569. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5570. STATUS_RF_KILL_SW |
  5571. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5572. STATUS_IN_SUSPEND;
  5573. goto exit;
  5574. }
  5575. /* ...otherwise clear out all the status bits but the RF Kill and
  5576. * SUSPEND bits and continue taking the NIC down. */
  5577. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5578. STATUS_RF_KILL_HW |
  5579. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5580. STATUS_RF_KILL_SW |
  5581. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5582. STATUS_IN_SUSPEND |
  5583. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5584. STATUS_FW_ERROR;
  5585. spin_lock_irqsave(&priv->lock, flags);
  5586. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5587. spin_unlock_irqrestore(&priv->lock, flags);
  5588. iwl_hw_txq_ctx_stop(priv);
  5589. iwl_hw_rxq_stop(priv);
  5590. spin_lock_irqsave(&priv->lock, flags);
  5591. if (!iwl_grab_restricted_access(priv)) {
  5592. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5593. APMG_CLK_VAL_DMA_CLK_RQT);
  5594. iwl_release_restricted_access(priv);
  5595. }
  5596. spin_unlock_irqrestore(&priv->lock, flags);
  5597. udelay(5);
  5598. iwl_hw_nic_stop_master(priv);
  5599. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5600. iwl_hw_nic_reset(priv);
  5601. exit:
  5602. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5603. if (priv->ibss_beacon)
  5604. dev_kfree_skb(priv->ibss_beacon);
  5605. priv->ibss_beacon = NULL;
  5606. /* clear out any free frames */
  5607. iwl_clear_free_frames(priv);
  5608. }
  5609. static void iwl_down(struct iwl_priv *priv)
  5610. {
  5611. mutex_lock(&priv->mutex);
  5612. __iwl_down(priv);
  5613. mutex_unlock(&priv->mutex);
  5614. iwl_cancel_deferred_work(priv);
  5615. }
  5616. #define MAX_HW_RESTARTS 5
  5617. static int __iwl_up(struct iwl_priv *priv)
  5618. {
  5619. DECLARE_MAC_BUF(mac);
  5620. int rc, i;
  5621. u32 hw_rf_kill = 0;
  5622. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5623. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5624. return -EIO;
  5625. }
  5626. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5627. IWL_WARNING("Radio disabled by SW RF kill (module "
  5628. "parameter)\n");
  5629. return 0;
  5630. }
  5631. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5632. IWL_ERROR("ucode not available for device bringup\n");
  5633. return -EIO;
  5634. }
  5635. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5636. rc = iwl_hw_nic_init(priv);
  5637. if (rc) {
  5638. IWL_ERROR("Unable to int nic\n");
  5639. return rc;
  5640. }
  5641. /* make sure rfkill handshake bits are cleared */
  5642. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5643. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5644. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5645. /* clear (again), then enable host interrupts */
  5646. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5647. iwl_enable_interrupts(priv);
  5648. /* really make sure rfkill handshake bits are cleared */
  5649. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5650. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5651. /* Copy original ucode data image from disk into backup cache.
  5652. * This will be used to initialize the on-board processor's
  5653. * data SRAM for a clean start when the runtime program first loads. */
  5654. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5655. priv->ucode_data.len);
  5656. /* If platform's RF_KILL switch is set to KILL,
  5657. * wait for BIT_INT_RF_KILL interrupt before loading uCode
  5658. * and getting things started */
  5659. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  5660. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  5661. hw_rf_kill = 1;
  5662. if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
  5663. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5664. return 0;
  5665. }
  5666. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5667. iwl_clear_stations_table(priv);
  5668. /* load bootstrap state machine,
  5669. * load bootstrap program into processor's memory,
  5670. * prepare to load the "initialize" uCode */
  5671. rc = iwl_load_bsm(priv);
  5672. if (rc) {
  5673. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5674. continue;
  5675. }
  5676. /* start card; "initialize" will load runtime ucode */
  5677. iwl_nic_start(priv);
  5678. /* MAC Address location in EEPROM same for 3945/4965 */
  5679. get_eeprom_mac(priv, priv->mac_addr);
  5680. IWL_DEBUG_INFO("MAC address: %s\n",
  5681. print_mac(mac, priv->mac_addr));
  5682. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5683. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5684. return 0;
  5685. }
  5686. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5687. __iwl_down(priv);
  5688. /* tried to restart and config the device for as long as our
  5689. * patience could withstand */
  5690. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5691. return -EIO;
  5692. }
  5693. /*****************************************************************************
  5694. *
  5695. * Workqueue callbacks
  5696. *
  5697. *****************************************************************************/
  5698. static void iwl_bg_init_alive_start(struct work_struct *data)
  5699. {
  5700. struct iwl_priv *priv =
  5701. container_of(data, struct iwl_priv, init_alive_start.work);
  5702. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5703. return;
  5704. mutex_lock(&priv->mutex);
  5705. iwl_init_alive_start(priv);
  5706. mutex_unlock(&priv->mutex);
  5707. }
  5708. static void iwl_bg_alive_start(struct work_struct *data)
  5709. {
  5710. struct iwl_priv *priv =
  5711. container_of(data, struct iwl_priv, alive_start.work);
  5712. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5713. return;
  5714. mutex_lock(&priv->mutex);
  5715. iwl_alive_start(priv);
  5716. mutex_unlock(&priv->mutex);
  5717. }
  5718. static void iwl_bg_rf_kill(struct work_struct *work)
  5719. {
  5720. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5721. wake_up_interruptible(&priv->wait_command_queue);
  5722. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5723. return;
  5724. mutex_lock(&priv->mutex);
  5725. if (!iwl_is_rfkill(priv)) {
  5726. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5727. "HW and/or SW RF Kill no longer active, restarting "
  5728. "device\n");
  5729. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5730. queue_work(priv->workqueue, &priv->restart);
  5731. } else {
  5732. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5733. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5734. "disabled by SW switch\n");
  5735. else
  5736. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5737. "Kill switch must be turned off for "
  5738. "wireless networking to work.\n");
  5739. }
  5740. mutex_unlock(&priv->mutex);
  5741. }
  5742. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5743. static void iwl_bg_scan_check(struct work_struct *data)
  5744. {
  5745. struct iwl_priv *priv =
  5746. container_of(data, struct iwl_priv, scan_check.work);
  5747. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5748. return;
  5749. mutex_lock(&priv->mutex);
  5750. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5751. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5752. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5753. "Scan completion watchdog resetting adapter (%dms)\n",
  5754. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5755. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5756. iwl_send_scan_abort(priv);
  5757. }
  5758. mutex_unlock(&priv->mutex);
  5759. }
  5760. static void iwl_bg_request_scan(struct work_struct *data)
  5761. {
  5762. struct iwl_priv *priv =
  5763. container_of(data, struct iwl_priv, request_scan);
  5764. struct iwl_host_cmd cmd = {
  5765. .id = REPLY_SCAN_CMD,
  5766. .len = sizeof(struct iwl_scan_cmd),
  5767. .meta.flags = CMD_SIZE_HUGE,
  5768. };
  5769. int rc = 0;
  5770. struct iwl_scan_cmd *scan;
  5771. struct ieee80211_conf *conf = NULL;
  5772. u8 direct_mask;
  5773. int phymode;
  5774. conf = ieee80211_get_hw_conf(priv->hw);
  5775. mutex_lock(&priv->mutex);
  5776. if (!iwl_is_ready(priv)) {
  5777. IWL_WARNING("request scan called when driver not ready.\n");
  5778. goto done;
  5779. }
  5780. /* Make sure the scan wasn't cancelled before this queued work
  5781. * was given the chance to run... */
  5782. if (!test_bit(STATUS_SCANNING, &priv->status))
  5783. goto done;
  5784. /* This should never be called or scheduled if there is currently
  5785. * a scan active in the hardware. */
  5786. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5787. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5788. "Ignoring second request.\n");
  5789. rc = -EIO;
  5790. goto done;
  5791. }
  5792. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5793. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5794. goto done;
  5795. }
  5796. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5797. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5798. goto done;
  5799. }
  5800. if (iwl_is_rfkill(priv)) {
  5801. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5802. goto done;
  5803. }
  5804. if (!test_bit(STATUS_READY, &priv->status)) {
  5805. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5806. goto done;
  5807. }
  5808. if (!priv->scan_bands) {
  5809. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5810. goto done;
  5811. }
  5812. if (!priv->scan) {
  5813. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5814. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5815. if (!priv->scan) {
  5816. rc = -ENOMEM;
  5817. goto done;
  5818. }
  5819. }
  5820. scan = priv->scan;
  5821. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5822. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5823. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5824. if (iwl_is_associated(priv)) {
  5825. u16 interval = 0;
  5826. u32 extra;
  5827. u32 suspend_time = 100;
  5828. u32 scan_suspend_time = 100;
  5829. unsigned long flags;
  5830. IWL_DEBUG_INFO("Scanning while associated...\n");
  5831. spin_lock_irqsave(&priv->lock, flags);
  5832. interval = priv->beacon_int;
  5833. spin_unlock_irqrestore(&priv->lock, flags);
  5834. scan->suspend_time = 0;
  5835. scan->max_out_time = cpu_to_le32(200 * 1024);
  5836. if (!interval)
  5837. interval = suspend_time;
  5838. extra = (suspend_time / interval) << 22;
  5839. scan_suspend_time = (extra |
  5840. ((suspend_time % interval) * 1024));
  5841. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5842. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5843. scan_suspend_time, interval);
  5844. }
  5845. /* We should add the ability for user to lock to PASSIVE ONLY */
  5846. if (priv->one_direct_scan) {
  5847. IWL_DEBUG_SCAN
  5848. ("Kicking off one direct scan for '%s'\n",
  5849. iwl_escape_essid(priv->direct_ssid,
  5850. priv->direct_ssid_len));
  5851. scan->direct_scan[0].id = WLAN_EID_SSID;
  5852. scan->direct_scan[0].len = priv->direct_ssid_len;
  5853. memcpy(scan->direct_scan[0].ssid,
  5854. priv->direct_ssid, priv->direct_ssid_len);
  5855. direct_mask = 1;
  5856. } else if (!iwl_is_associated(priv) && priv->essid_len) {
  5857. scan->direct_scan[0].id = WLAN_EID_SSID;
  5858. scan->direct_scan[0].len = priv->essid_len;
  5859. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5860. direct_mask = 1;
  5861. } else
  5862. direct_mask = 0;
  5863. /* We don't build a direct scan probe request; the uCode will do
  5864. * that based on the direct_mask added to each channel entry */
  5865. scan->tx_cmd.len = cpu_to_le16(
  5866. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5867. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5868. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5869. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5870. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5871. /* flags + rate selection */
  5872. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5873. switch (priv->scan_bands) {
  5874. case 2:
  5875. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5876. scan->tx_cmd.rate_n_flags =
  5877. iwl_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5878. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5879. scan->good_CRC_th = 0;
  5880. phymode = MODE_IEEE80211G;
  5881. break;
  5882. case 1:
  5883. scan->tx_cmd.rate_n_flags =
  5884. iwl_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5885. RATE_MCS_ANT_B_MSK);
  5886. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5887. phymode = MODE_IEEE80211A;
  5888. break;
  5889. default:
  5890. IWL_WARNING("Invalid scan band count\n");
  5891. goto done;
  5892. }
  5893. /* select Rx chains */
  5894. /* Force use of chains B and C (0x6) for scan Rx.
  5895. * Avoid A (0x1) because of its off-channel reception on A-band.
  5896. * MIMO is not used here, but value is required to make uCode happy. */
  5897. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5898. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5899. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5900. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5901. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5902. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5903. if (direct_mask)
  5904. IWL_DEBUG_SCAN
  5905. ("Initiating direct scan for %s.\n",
  5906. iwl_escape_essid(priv->essid, priv->essid_len));
  5907. else
  5908. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5909. scan->channel_count =
  5910. iwl_get_channels_for_scan(
  5911. priv, phymode, 1, /* active */
  5912. direct_mask,
  5913. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5914. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5915. scan->channel_count * sizeof(struct iwl_scan_channel);
  5916. cmd.data = scan;
  5917. scan->len = cpu_to_le16(cmd.len);
  5918. set_bit(STATUS_SCAN_HW, &priv->status);
  5919. rc = iwl_send_cmd_sync(priv, &cmd);
  5920. if (rc)
  5921. goto done;
  5922. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5923. IWL_SCAN_CHECK_WATCHDOG);
  5924. mutex_unlock(&priv->mutex);
  5925. return;
  5926. done:
  5927. /* inform mac80211 scan aborted */
  5928. queue_work(priv->workqueue, &priv->scan_completed);
  5929. mutex_unlock(&priv->mutex);
  5930. }
  5931. static void iwl_bg_up(struct work_struct *data)
  5932. {
  5933. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5934. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5935. return;
  5936. mutex_lock(&priv->mutex);
  5937. __iwl_up(priv);
  5938. mutex_unlock(&priv->mutex);
  5939. }
  5940. static void iwl_bg_restart(struct work_struct *data)
  5941. {
  5942. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5943. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5944. return;
  5945. iwl_down(priv);
  5946. queue_work(priv->workqueue, &priv->up);
  5947. }
  5948. static void iwl_bg_rx_replenish(struct work_struct *data)
  5949. {
  5950. struct iwl_priv *priv =
  5951. container_of(data, struct iwl_priv, rx_replenish);
  5952. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5953. return;
  5954. mutex_lock(&priv->mutex);
  5955. iwl_rx_replenish(priv);
  5956. mutex_unlock(&priv->mutex);
  5957. }
  5958. static void iwl_bg_post_associate(struct work_struct *data)
  5959. {
  5960. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5961. post_associate.work);
  5962. int rc = 0;
  5963. struct ieee80211_conf *conf = NULL;
  5964. DECLARE_MAC_BUF(mac);
  5965. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5966. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5967. return;
  5968. }
  5969. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5970. priv->assoc_id,
  5971. print_mac(mac, priv->active_rxon.bssid_addr));
  5972. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5973. return;
  5974. mutex_lock(&priv->mutex);
  5975. if (!priv->interface_id || !priv->is_open) {
  5976. mutex_unlock(&priv->mutex);
  5977. return;
  5978. }
  5979. iwl_scan_cancel_timeout(priv, 200);
  5980. conf = ieee80211_get_hw_conf(priv->hw);
  5981. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5982. iwl_commit_rxon(priv);
  5983. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5984. iwl_setup_rxon_timing(priv);
  5985. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5986. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5987. if (rc)
  5988. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5989. "Attempting to continue.\n");
  5990. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5991. #ifdef CONFIG_IWLWIFI_HT
  5992. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  5993. iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht);
  5994. else {
  5995. priv->active_rate_ht[0] = 0;
  5996. priv->active_rate_ht[1] = 0;
  5997. priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
  5998. }
  5999. #endif /* CONFIG_IWLWIFI_HT*/
  6000. iwl4965_set_rxon_chain(priv);
  6001. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6002. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  6003. priv->assoc_id, priv->beacon_int);
  6004. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6005. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6006. else
  6007. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6008. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6009. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6010. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6011. else
  6012. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6013. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6014. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6015. }
  6016. iwl_commit_rxon(priv);
  6017. switch (priv->iw_mode) {
  6018. case IEEE80211_IF_TYPE_STA:
  6019. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  6020. break;
  6021. case IEEE80211_IF_TYPE_IBSS:
  6022. /* clear out the station table */
  6023. iwl_clear_stations_table(priv);
  6024. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  6025. iwl_rxon_add_station(priv, priv->bssid, 0);
  6026. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  6027. iwl_send_beacon_cmd(priv);
  6028. break;
  6029. default:
  6030. IWL_ERROR("%s Should not be called in %d mode\n",
  6031. __FUNCTION__, priv->iw_mode);
  6032. break;
  6033. }
  6034. iwl_sequence_reset(priv);
  6035. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  6036. /* Enable Rx differential gain and sensitivity calibrations */
  6037. iwl4965_chain_noise_reset(priv);
  6038. priv->start_calib = 1;
  6039. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  6040. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6041. priv->assoc_station_added = 1;
  6042. #ifdef CONFIG_IWLWIFI_QOS
  6043. iwl_activate_qos(priv, 0);
  6044. #endif /* CONFIG_IWLWIFI_QOS */
  6045. mutex_unlock(&priv->mutex);
  6046. }
  6047. static void iwl_bg_abort_scan(struct work_struct *work)
  6048. {
  6049. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  6050. if (!iwl_is_ready(priv))
  6051. return;
  6052. mutex_lock(&priv->mutex);
  6053. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6054. iwl_send_scan_abort(priv);
  6055. mutex_unlock(&priv->mutex);
  6056. }
  6057. static void iwl_bg_scan_completed(struct work_struct *work)
  6058. {
  6059. struct iwl_priv *priv =
  6060. container_of(work, struct iwl_priv, scan_completed);
  6061. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6062. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6063. return;
  6064. ieee80211_scan_completed(priv->hw);
  6065. /* Since setting the TXPOWER may have been deferred while
  6066. * performing the scan, fire one off */
  6067. mutex_lock(&priv->mutex);
  6068. iwl_hw_reg_send_txpower(priv);
  6069. mutex_unlock(&priv->mutex);
  6070. }
  6071. /*****************************************************************************
  6072. *
  6073. * mac80211 entry point functions
  6074. *
  6075. *****************************************************************************/
  6076. static int iwl_mac_start(struct ieee80211_hw *hw)
  6077. {
  6078. struct iwl_priv *priv = hw->priv;
  6079. IWL_DEBUG_MAC80211("enter\n");
  6080. /* we should be verifying the device is ready to be opened */
  6081. mutex_lock(&priv->mutex);
  6082. priv->is_open = 1;
  6083. if (!iwl_is_rfkill(priv))
  6084. ieee80211_start_queues(priv->hw);
  6085. mutex_unlock(&priv->mutex);
  6086. IWL_DEBUG_MAC80211("leave\n");
  6087. return 0;
  6088. }
  6089. static void iwl_mac_stop(struct ieee80211_hw *hw)
  6090. {
  6091. struct iwl_priv *priv = hw->priv;
  6092. IWL_DEBUG_MAC80211("enter\n");
  6093. mutex_lock(&priv->mutex);
  6094. /* stop mac, cancel any scan request and clear
  6095. * RXON_FILTER_ASSOC_MSK BIT
  6096. */
  6097. priv->is_open = 0;
  6098. iwl_scan_cancel_timeout(priv, 100);
  6099. cancel_delayed_work(&priv->post_associate);
  6100. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6101. iwl_commit_rxon(priv);
  6102. mutex_unlock(&priv->mutex);
  6103. IWL_DEBUG_MAC80211("leave\n");
  6104. }
  6105. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6106. struct ieee80211_tx_control *ctl)
  6107. {
  6108. struct iwl_priv *priv = hw->priv;
  6109. IWL_DEBUG_MAC80211("enter\n");
  6110. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6111. IWL_DEBUG_MAC80211("leave - monitor\n");
  6112. return -1;
  6113. }
  6114. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6115. ctl->tx_rate);
  6116. if (iwl_tx_skb(priv, skb, ctl))
  6117. dev_kfree_skb_any(skb);
  6118. IWL_DEBUG_MAC80211("leave\n");
  6119. return 0;
  6120. }
  6121. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  6122. struct ieee80211_if_init_conf *conf)
  6123. {
  6124. struct iwl_priv *priv = hw->priv;
  6125. unsigned long flags;
  6126. DECLARE_MAC_BUF(mac);
  6127. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  6128. if (priv->interface_id) {
  6129. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  6130. return 0;
  6131. }
  6132. spin_lock_irqsave(&priv->lock, flags);
  6133. priv->interface_id = conf->if_id;
  6134. spin_unlock_irqrestore(&priv->lock, flags);
  6135. mutex_lock(&priv->mutex);
  6136. if (conf->mac_addr) {
  6137. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6138. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6139. }
  6140. iwl_set_mode(priv, conf->type);
  6141. IWL_DEBUG_MAC80211("leave\n");
  6142. mutex_unlock(&priv->mutex);
  6143. return 0;
  6144. }
  6145. /**
  6146. * iwl_mac_config - mac80211 config callback
  6147. *
  6148. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6149. * be set inappropriately and the driver currently sets the hardware up to
  6150. * use it whenever needed.
  6151. */
  6152. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6153. {
  6154. struct iwl_priv *priv = hw->priv;
  6155. const struct iwl_channel_info *ch_info;
  6156. unsigned long flags;
  6157. mutex_lock(&priv->mutex);
  6158. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6159. if (!iwl_is_ready(priv)) {
  6160. IWL_DEBUG_MAC80211("leave - not ready\n");
  6161. mutex_unlock(&priv->mutex);
  6162. return -EIO;
  6163. }
  6164. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  6165. * what is exposed through include/ declarations */
  6166. if (unlikely(!iwl_param_disable_hw_scan &&
  6167. test_bit(STATUS_SCANNING, &priv->status))) {
  6168. IWL_DEBUG_MAC80211("leave - scanning\n");
  6169. mutex_unlock(&priv->mutex);
  6170. return 0;
  6171. }
  6172. spin_lock_irqsave(&priv->lock, flags);
  6173. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  6174. if (!is_channel_valid(ch_info)) {
  6175. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6176. conf->channel, conf->phymode);
  6177. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6178. spin_unlock_irqrestore(&priv->lock, flags);
  6179. mutex_unlock(&priv->mutex);
  6180. return -EINVAL;
  6181. }
  6182. #ifdef CONFIG_IWLWIFI_HT
  6183. /* if we are switching fron ht to 2.4 clear flags
  6184. * from any ht related info since 2.4 does not
  6185. * support ht */
  6186. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6187. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6188. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6189. #endif
  6190. )
  6191. priv->staging_rxon.flags = 0;
  6192. #endif /* CONFIG_IWLWIFI_HT */
  6193. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  6194. iwl_set_flags_for_phymode(priv, conf->phymode);
  6195. /* The list of supported rates and rate mask can be different
  6196. * for each phymode; since the phymode may have changed, reset
  6197. * the rate mask to what mac80211 lists */
  6198. iwl_set_rate(priv);
  6199. spin_unlock_irqrestore(&priv->lock, flags);
  6200. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6201. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6202. iwl_hw_channel_switch(priv, conf->channel);
  6203. mutex_unlock(&priv->mutex);
  6204. return 0;
  6205. }
  6206. #endif
  6207. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  6208. if (!conf->radio_enabled) {
  6209. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6210. mutex_unlock(&priv->mutex);
  6211. return 0;
  6212. }
  6213. if (iwl_is_rfkill(priv)) {
  6214. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6215. mutex_unlock(&priv->mutex);
  6216. return -EIO;
  6217. }
  6218. iwl_set_rate(priv);
  6219. if (memcmp(&priv->active_rxon,
  6220. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6221. iwl_commit_rxon(priv);
  6222. else
  6223. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6224. IWL_DEBUG_MAC80211("leave\n");
  6225. mutex_unlock(&priv->mutex);
  6226. return 0;
  6227. }
  6228. static void iwl_config_ap(struct iwl_priv *priv)
  6229. {
  6230. int rc = 0;
  6231. if (priv->status & STATUS_EXIT_PENDING)
  6232. return;
  6233. /* The following should be done only at AP bring up */
  6234. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6235. /* RXON - unassoc (to set timing command) */
  6236. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6237. iwl_commit_rxon(priv);
  6238. /* RXON Timing */
  6239. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  6240. iwl_setup_rxon_timing(priv);
  6241. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6242. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6243. if (rc)
  6244. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6245. "Attempting to continue.\n");
  6246. iwl4965_set_rxon_chain(priv);
  6247. /* FIXME: what should be the assoc_id for AP? */
  6248. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6249. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6250. priv->staging_rxon.flags |=
  6251. RXON_FLG_SHORT_PREAMBLE_MSK;
  6252. else
  6253. priv->staging_rxon.flags &=
  6254. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6255. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6256. if (priv->assoc_capability &
  6257. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6258. priv->staging_rxon.flags |=
  6259. RXON_FLG_SHORT_SLOT_MSK;
  6260. else
  6261. priv->staging_rxon.flags &=
  6262. ~RXON_FLG_SHORT_SLOT_MSK;
  6263. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6264. priv->staging_rxon.flags &=
  6265. ~RXON_FLG_SHORT_SLOT_MSK;
  6266. }
  6267. /* restore RXON assoc */
  6268. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6269. iwl_commit_rxon(priv);
  6270. #ifdef CONFIG_IWLWIFI_QOS
  6271. iwl_activate_qos(priv, 1);
  6272. #endif
  6273. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  6274. }
  6275. iwl_send_beacon_cmd(priv);
  6276. /* FIXME - we need to add code here to detect a totally new
  6277. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6278. * clear sta table, add BCAST sta... */
  6279. }
  6280. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  6281. struct ieee80211_if_conf *conf)
  6282. {
  6283. struct iwl_priv *priv = hw->priv;
  6284. DECLARE_MAC_BUF(mac);
  6285. unsigned long flags;
  6286. int rc;
  6287. if (conf == NULL)
  6288. return -EIO;
  6289. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6290. (!conf->beacon || !conf->ssid_len)) {
  6291. IWL_DEBUG_MAC80211
  6292. ("Leaving in AP mode because HostAPD is not ready.\n");
  6293. return 0;
  6294. }
  6295. mutex_lock(&priv->mutex);
  6296. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  6297. if (conf->bssid)
  6298. IWL_DEBUG_MAC80211("bssid: %s\n",
  6299. print_mac(mac, conf->bssid));
  6300. /*
  6301. * very dubious code was here; the probe filtering flag is never set:
  6302. *
  6303. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6304. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6305. */
  6306. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6307. IWL_DEBUG_MAC80211("leave - scanning\n");
  6308. mutex_unlock(&priv->mutex);
  6309. return 0;
  6310. }
  6311. if (priv->interface_id != if_id) {
  6312. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  6313. mutex_unlock(&priv->mutex);
  6314. return 0;
  6315. }
  6316. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6317. if (!conf->bssid) {
  6318. conf->bssid = priv->mac_addr;
  6319. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6320. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6321. print_mac(mac, conf->bssid));
  6322. }
  6323. if (priv->ibss_beacon)
  6324. dev_kfree_skb(priv->ibss_beacon);
  6325. priv->ibss_beacon = conf->beacon;
  6326. }
  6327. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6328. !is_multicast_ether_addr(conf->bssid)) {
  6329. /* If there is currently a HW scan going on in the background
  6330. * then we need to cancel it else the RXON below will fail. */
  6331. if (iwl_scan_cancel_timeout(priv, 100)) {
  6332. IWL_WARNING("Aborted scan still in progress "
  6333. "after 100ms\n");
  6334. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6335. mutex_unlock(&priv->mutex);
  6336. return -EAGAIN;
  6337. }
  6338. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6339. /* TODO: Audit driver for usage of these members and see
  6340. * if mac80211 deprecates them (priv->bssid looks like it
  6341. * shouldn't be there, but I haven't scanned the IBSS code
  6342. * to verify) - jpk */
  6343. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6344. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6345. iwl_config_ap(priv);
  6346. else {
  6347. rc = iwl_commit_rxon(priv);
  6348. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6349. iwl_rxon_add_station(
  6350. priv, priv->active_rxon.bssid_addr, 1);
  6351. }
  6352. } else {
  6353. iwl_scan_cancel_timeout(priv, 100);
  6354. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6355. iwl_commit_rxon(priv);
  6356. }
  6357. spin_lock_irqsave(&priv->lock, flags);
  6358. if (!conf->ssid_len)
  6359. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6360. else
  6361. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6362. priv->essid_len = conf->ssid_len;
  6363. spin_unlock_irqrestore(&priv->lock, flags);
  6364. IWL_DEBUG_MAC80211("leave\n");
  6365. mutex_unlock(&priv->mutex);
  6366. return 0;
  6367. }
  6368. static void iwl_configure_filter(struct ieee80211_hw *hw,
  6369. unsigned int changed_flags,
  6370. unsigned int *total_flags,
  6371. int mc_count, struct dev_addr_list *mc_list)
  6372. {
  6373. /*
  6374. * XXX: dummy
  6375. * see also iwl_connection_init_rx_config
  6376. */
  6377. *total_flags = 0;
  6378. }
  6379. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6380. struct ieee80211_if_init_conf *conf)
  6381. {
  6382. struct iwl_priv *priv = hw->priv;
  6383. IWL_DEBUG_MAC80211("enter\n");
  6384. mutex_lock(&priv->mutex);
  6385. iwl_scan_cancel_timeout(priv, 100);
  6386. cancel_delayed_work(&priv->post_associate);
  6387. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6388. iwl_commit_rxon(priv);
  6389. if (priv->interface_id == conf->if_id) {
  6390. priv->interface_id = 0;
  6391. memset(priv->bssid, 0, ETH_ALEN);
  6392. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6393. priv->essid_len = 0;
  6394. }
  6395. mutex_unlock(&priv->mutex);
  6396. IWL_DEBUG_MAC80211("leave\n");
  6397. }
  6398. static void iwl_mac_erp_ie_changed(struct ieee80211_hw *hw,
  6399. u8 changes, int cts_protection, int preamble)
  6400. {
  6401. struct iwl_priv *priv = hw->priv;
  6402. if (changes & IEEE80211_ERP_CHANGE_PREAMBLE) {
  6403. if (preamble == WLAN_ERP_PREAMBLE_SHORT)
  6404. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6405. else
  6406. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6407. }
  6408. if (changes & IEEE80211_ERP_CHANGE_PROTECTION) {
  6409. if (cts_protection)
  6410. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6411. else
  6412. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6413. }
  6414. if (iwl_is_associated(priv))
  6415. iwl_send_rxon_assoc(priv);
  6416. }
  6417. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6418. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6419. {
  6420. int rc = 0;
  6421. unsigned long flags;
  6422. struct iwl_priv *priv = hw->priv;
  6423. IWL_DEBUG_MAC80211("enter\n");
  6424. mutex_lock(&priv->mutex);
  6425. spin_lock_irqsave(&priv->lock, flags);
  6426. if (!iwl_is_ready_rf(priv)) {
  6427. rc = -EIO;
  6428. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6429. goto out_unlock;
  6430. }
  6431. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6432. rc = -EIO;
  6433. IWL_ERROR("ERROR: APs don't scan\n");
  6434. goto out_unlock;
  6435. }
  6436. /* if we just finished scan ask for delay */
  6437. if (priv->last_scan_jiffies &&
  6438. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6439. jiffies)) {
  6440. rc = -EAGAIN;
  6441. goto out_unlock;
  6442. }
  6443. if (len) {
  6444. IWL_DEBUG_SCAN("direct scan for "
  6445. "%s [%d]\n ",
  6446. iwl_escape_essid(ssid, len), (int)len);
  6447. priv->one_direct_scan = 1;
  6448. priv->direct_ssid_len = (u8)
  6449. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6450. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6451. } else
  6452. priv->one_direct_scan = 0;
  6453. rc = iwl_scan_initiate(priv);
  6454. IWL_DEBUG_MAC80211("leave\n");
  6455. out_unlock:
  6456. spin_unlock_irqrestore(&priv->lock, flags);
  6457. mutex_unlock(&priv->mutex);
  6458. return rc;
  6459. }
  6460. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6461. const u8 *local_addr, const u8 *addr,
  6462. struct ieee80211_key_conf *key)
  6463. {
  6464. struct iwl_priv *priv = hw->priv;
  6465. DECLARE_MAC_BUF(mac);
  6466. int rc = 0;
  6467. u8 sta_id;
  6468. IWL_DEBUG_MAC80211("enter\n");
  6469. if (!iwl_param_hwcrypto) {
  6470. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6471. return -EOPNOTSUPP;
  6472. }
  6473. if (is_zero_ether_addr(addr))
  6474. /* only support pairwise keys */
  6475. return -EOPNOTSUPP;
  6476. sta_id = iwl_hw_find_station(priv, addr);
  6477. if (sta_id == IWL_INVALID_STATION) {
  6478. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6479. print_mac(mac, addr));
  6480. return -EINVAL;
  6481. }
  6482. mutex_lock(&priv->mutex);
  6483. iwl_scan_cancel_timeout(priv, 100);
  6484. switch (cmd) {
  6485. case SET_KEY:
  6486. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6487. if (!rc) {
  6488. iwl_set_rxon_hwcrypto(priv, 1);
  6489. iwl_commit_rxon(priv);
  6490. key->hw_key_idx = sta_id;
  6491. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6492. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6493. }
  6494. break;
  6495. case DISABLE_KEY:
  6496. rc = iwl_clear_sta_key_info(priv, sta_id);
  6497. if (!rc) {
  6498. iwl_set_rxon_hwcrypto(priv, 0);
  6499. iwl_commit_rxon(priv);
  6500. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6501. }
  6502. break;
  6503. default:
  6504. rc = -EINVAL;
  6505. }
  6506. IWL_DEBUG_MAC80211("leave\n");
  6507. mutex_unlock(&priv->mutex);
  6508. return rc;
  6509. }
  6510. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6511. const struct ieee80211_tx_queue_params *params)
  6512. {
  6513. struct iwl_priv *priv = hw->priv;
  6514. #ifdef CONFIG_IWLWIFI_QOS
  6515. unsigned long flags;
  6516. int q;
  6517. #endif /* CONFIG_IWL_QOS */
  6518. IWL_DEBUG_MAC80211("enter\n");
  6519. if (!iwl_is_ready_rf(priv)) {
  6520. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6521. return -EIO;
  6522. }
  6523. if (queue >= AC_NUM) {
  6524. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6525. return 0;
  6526. }
  6527. #ifdef CONFIG_IWLWIFI_QOS
  6528. if (!priv->qos_data.qos_enable) {
  6529. priv->qos_data.qos_active = 0;
  6530. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6531. return 0;
  6532. }
  6533. q = AC_NUM - 1 - queue;
  6534. spin_lock_irqsave(&priv->lock, flags);
  6535. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6536. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6537. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6538. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6539. cpu_to_le16((params->burst_time * 100));
  6540. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6541. priv->qos_data.qos_active = 1;
  6542. spin_unlock_irqrestore(&priv->lock, flags);
  6543. mutex_lock(&priv->mutex);
  6544. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6545. iwl_activate_qos(priv, 1);
  6546. else if (priv->assoc_id && iwl_is_associated(priv))
  6547. iwl_activate_qos(priv, 0);
  6548. mutex_unlock(&priv->mutex);
  6549. #endif /*CONFIG_IWLWIFI_QOS */
  6550. IWL_DEBUG_MAC80211("leave\n");
  6551. return 0;
  6552. }
  6553. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6554. struct ieee80211_tx_queue_stats *stats)
  6555. {
  6556. struct iwl_priv *priv = hw->priv;
  6557. int i, avail;
  6558. struct iwl_tx_queue *txq;
  6559. struct iwl_queue *q;
  6560. unsigned long flags;
  6561. IWL_DEBUG_MAC80211("enter\n");
  6562. if (!iwl_is_ready_rf(priv)) {
  6563. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6564. return -EIO;
  6565. }
  6566. spin_lock_irqsave(&priv->lock, flags);
  6567. for (i = 0; i < AC_NUM; i++) {
  6568. txq = &priv->txq[i];
  6569. q = &txq->q;
  6570. avail = iwl_queue_space(q);
  6571. stats->data[i].len = q->n_window - avail;
  6572. stats->data[i].limit = q->n_window - q->high_mark;
  6573. stats->data[i].count = q->n_window;
  6574. }
  6575. spin_unlock_irqrestore(&priv->lock, flags);
  6576. IWL_DEBUG_MAC80211("leave\n");
  6577. return 0;
  6578. }
  6579. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6580. struct ieee80211_low_level_stats *stats)
  6581. {
  6582. IWL_DEBUG_MAC80211("enter\n");
  6583. IWL_DEBUG_MAC80211("leave\n");
  6584. return 0;
  6585. }
  6586. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6587. {
  6588. IWL_DEBUG_MAC80211("enter\n");
  6589. IWL_DEBUG_MAC80211("leave\n");
  6590. return 0;
  6591. }
  6592. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6593. {
  6594. struct iwl_priv *priv = hw->priv;
  6595. unsigned long flags;
  6596. mutex_lock(&priv->mutex);
  6597. IWL_DEBUG_MAC80211("enter\n");
  6598. priv->lq_mngr.lq_ready = 0;
  6599. #ifdef CONFIG_IWLWIFI_HT
  6600. spin_lock_irqsave(&priv->lock, flags);
  6601. memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info));
  6602. spin_unlock_irqrestore(&priv->lock, flags);
  6603. #ifdef CONFIG_IWLWIFI_HT_AGG
  6604. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6605. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6606. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl_agg_control));
  6607. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6608. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6609. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6610. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6611. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6612. #endif /*CONFIG_IWLWIFI_HT_AGG */
  6613. #endif /* CONFIG_IWLWIFI_HT */
  6614. #ifdef CONFIG_IWLWIFI_QOS
  6615. iwl_reset_qos(priv);
  6616. #endif
  6617. cancel_delayed_work(&priv->post_associate);
  6618. spin_lock_irqsave(&priv->lock, flags);
  6619. priv->assoc_id = 0;
  6620. priv->assoc_capability = 0;
  6621. priv->call_post_assoc_from_beacon = 0;
  6622. priv->assoc_station_added = 0;
  6623. /* new association get rid of ibss beacon skb */
  6624. if (priv->ibss_beacon)
  6625. dev_kfree_skb(priv->ibss_beacon);
  6626. priv->ibss_beacon = NULL;
  6627. priv->beacon_int = priv->hw->conf.beacon_int;
  6628. priv->timestamp1 = 0;
  6629. priv->timestamp0 = 0;
  6630. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6631. priv->beacon_int = 0;
  6632. spin_unlock_irqrestore(&priv->lock, flags);
  6633. /* we are restarting association process
  6634. * clear RXON_FILTER_ASSOC_MSK bit
  6635. */
  6636. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6637. iwl_scan_cancel_timeout(priv, 100);
  6638. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6639. iwl_commit_rxon(priv);
  6640. }
  6641. /* Per mac80211.h: This is only used in IBSS mode... */
  6642. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6643. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6644. mutex_unlock(&priv->mutex);
  6645. return;
  6646. }
  6647. if (!iwl_is_ready_rf(priv)) {
  6648. IWL_DEBUG_MAC80211("leave - not ready\n");
  6649. mutex_unlock(&priv->mutex);
  6650. return;
  6651. }
  6652. priv->only_active_channel = 0;
  6653. iwl_set_rate(priv);
  6654. mutex_unlock(&priv->mutex);
  6655. IWL_DEBUG_MAC80211("leave\n");
  6656. }
  6657. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6658. struct ieee80211_tx_control *control)
  6659. {
  6660. struct iwl_priv *priv = hw->priv;
  6661. unsigned long flags;
  6662. mutex_lock(&priv->mutex);
  6663. IWL_DEBUG_MAC80211("enter\n");
  6664. if (!iwl_is_ready_rf(priv)) {
  6665. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6666. mutex_unlock(&priv->mutex);
  6667. return -EIO;
  6668. }
  6669. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6670. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6671. mutex_unlock(&priv->mutex);
  6672. return -EIO;
  6673. }
  6674. spin_lock_irqsave(&priv->lock, flags);
  6675. if (priv->ibss_beacon)
  6676. dev_kfree_skb(priv->ibss_beacon);
  6677. priv->ibss_beacon = skb;
  6678. priv->assoc_id = 0;
  6679. IWL_DEBUG_MAC80211("leave\n");
  6680. spin_unlock_irqrestore(&priv->lock, flags);
  6681. #ifdef CONFIG_IWLWIFI_QOS
  6682. iwl_reset_qos(priv);
  6683. #endif
  6684. queue_work(priv->workqueue, &priv->post_associate.work);
  6685. mutex_unlock(&priv->mutex);
  6686. return 0;
  6687. }
  6688. #ifdef CONFIG_IWLWIFI_HT
  6689. union ht_cap_info {
  6690. struct {
  6691. u16 advanced_coding_cap :1;
  6692. u16 supported_chan_width_set :1;
  6693. u16 mimo_power_save_mode :2;
  6694. u16 green_field :1;
  6695. u16 short_GI20 :1;
  6696. u16 short_GI40 :1;
  6697. u16 tx_stbc :1;
  6698. u16 rx_stbc :1;
  6699. u16 beam_forming :1;
  6700. u16 delayed_ba :1;
  6701. u16 maximal_amsdu_size :1;
  6702. u16 cck_mode_at_40MHz :1;
  6703. u16 psmp_support :1;
  6704. u16 stbc_ctrl_frame_support :1;
  6705. u16 sig_txop_protection_support :1;
  6706. };
  6707. u16 val;
  6708. } __attribute__ ((packed));
  6709. union ht_param_info{
  6710. struct {
  6711. u8 max_rx_ampdu_factor :2;
  6712. u8 mpdu_density :3;
  6713. u8 reserved :3;
  6714. };
  6715. u8 val;
  6716. } __attribute__ ((packed));
  6717. union ht_exra_param_info {
  6718. struct {
  6719. u8 ext_chan_offset :2;
  6720. u8 tx_chan_width :1;
  6721. u8 rifs_mode :1;
  6722. u8 controlled_access_only :1;
  6723. u8 service_interval_granularity :3;
  6724. };
  6725. u8 val;
  6726. } __attribute__ ((packed));
  6727. union ht_operation_mode{
  6728. struct {
  6729. u16 op_mode :2;
  6730. u16 non_GF :1;
  6731. u16 reserved :13;
  6732. };
  6733. u16 val;
  6734. } __attribute__ ((packed));
  6735. static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap,
  6736. struct ieee80211_ht_additional_info *ht_extra,
  6737. struct sta_ht_info *ht_info_ap,
  6738. struct sta_ht_info *ht_info)
  6739. {
  6740. union ht_cap_info cap;
  6741. union ht_operation_mode op_mode;
  6742. union ht_param_info param_info;
  6743. union ht_exra_param_info extra_param_info;
  6744. IWL_DEBUG_MAC80211("enter: \n");
  6745. if (!ht_info) {
  6746. IWL_DEBUG_MAC80211("leave: ht_info is NULL\n");
  6747. return -1;
  6748. }
  6749. if (ht_cap) {
  6750. cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info);
  6751. param_info.val = ht_cap->mac_ht_params_info;
  6752. ht_info->is_ht = 1;
  6753. if (cap.short_GI20)
  6754. ht_info->sgf |= 0x1;
  6755. if (cap.short_GI40)
  6756. ht_info->sgf |= 0x2;
  6757. ht_info->is_green_field = cap.green_field;
  6758. ht_info->max_amsdu_size = cap.maximal_amsdu_size;
  6759. ht_info->supported_chan_width = cap.supported_chan_width_set;
  6760. ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode;
  6761. memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16);
  6762. ht_info->ampdu_factor = param_info.max_rx_ampdu_factor;
  6763. ht_info->mpdu_density = param_info.mpdu_density;
  6764. IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n",
  6765. ht_cap->supported_mcs_set[0],
  6766. ht_cap->supported_mcs_set[1]);
  6767. if (ht_info_ap) {
  6768. ht_info->control_channel = ht_info_ap->control_channel;
  6769. ht_info->extension_chan_offset =
  6770. ht_info_ap->extension_chan_offset;
  6771. ht_info->tx_chan_width = ht_info_ap->tx_chan_width;
  6772. ht_info->operating_mode = ht_info_ap->operating_mode;
  6773. }
  6774. if (ht_extra) {
  6775. extra_param_info.val = ht_extra->ht_param;
  6776. ht_info->control_channel = ht_extra->control_chan;
  6777. ht_info->extension_chan_offset =
  6778. extra_param_info.ext_chan_offset;
  6779. ht_info->tx_chan_width = extra_param_info.tx_chan_width;
  6780. op_mode.val = (u16)
  6781. le16_to_cpu(ht_extra->operation_mode);
  6782. ht_info->operating_mode = op_mode.op_mode;
  6783. IWL_DEBUG_MAC80211("control channel %d\n",
  6784. ht_extra->control_chan);
  6785. }
  6786. } else
  6787. ht_info->is_ht = 0;
  6788. IWL_DEBUG_MAC80211("leave\n");
  6789. return 0;
  6790. }
  6791. static int iwl_mac_conf_ht(struct ieee80211_hw *hw,
  6792. struct ieee80211_ht_capability *ht_cap,
  6793. struct ieee80211_ht_additional_info *ht_extra)
  6794. {
  6795. struct iwl_priv *priv = hw->priv;
  6796. int rs;
  6797. IWL_DEBUG_MAC80211("enter: \n");
  6798. rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht);
  6799. iwl4965_set_rxon_chain(priv);
  6800. if (priv && priv->assoc_id &&
  6801. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6802. unsigned long flags;
  6803. spin_lock_irqsave(&priv->lock, flags);
  6804. if (priv->beacon_int)
  6805. queue_work(priv->workqueue, &priv->post_associate.work);
  6806. else
  6807. priv->call_post_assoc_from_beacon = 1;
  6808. spin_unlock_irqrestore(&priv->lock, flags);
  6809. }
  6810. IWL_DEBUG_MAC80211("leave: control channel %d\n",
  6811. ht_extra->control_chan);
  6812. return rs;
  6813. }
  6814. static void iwl_set_ht_capab(struct ieee80211_hw *hw,
  6815. struct ieee80211_ht_capability *ht_cap,
  6816. u8 use_wide_chan)
  6817. {
  6818. union ht_cap_info cap;
  6819. union ht_param_info param_info;
  6820. memset(&cap, 0, sizeof(union ht_cap_info));
  6821. memset(&param_info, 0, sizeof(union ht_param_info));
  6822. cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K;
  6823. cap.green_field = 1;
  6824. cap.short_GI20 = 1;
  6825. cap.short_GI40 = 1;
  6826. cap.supported_chan_width_set = use_wide_chan;
  6827. cap.mimo_power_save_mode = 0x3;
  6828. param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  6829. param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF;
  6830. ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val);
  6831. ht_cap->mac_ht_params_info = (u8) param_info.val;
  6832. ht_cap->supported_mcs_set[0] = 0xff;
  6833. ht_cap->supported_mcs_set[1] = 0xff;
  6834. ht_cap->supported_mcs_set[4] =
  6835. (cap.supported_chan_width_set) ? 0x1: 0x0;
  6836. }
  6837. static void iwl_mac_get_ht_capab(struct ieee80211_hw *hw,
  6838. struct ieee80211_ht_capability *ht_cap)
  6839. {
  6840. u8 use_wide_channel = 1;
  6841. struct iwl_priv *priv = hw->priv;
  6842. IWL_DEBUG_MAC80211("enter: \n");
  6843. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  6844. use_wide_channel = 0;
  6845. /* no fat tx allowed on 2.4GHZ */
  6846. if (priv->phymode != MODE_IEEE80211A)
  6847. use_wide_channel = 0;
  6848. iwl_set_ht_capab(hw, ht_cap, use_wide_channel);
  6849. IWL_DEBUG_MAC80211("leave: \n");
  6850. }
  6851. #endif /*CONFIG_IWLWIFI_HT*/
  6852. /*****************************************************************************
  6853. *
  6854. * sysfs attributes
  6855. *
  6856. *****************************************************************************/
  6857. #ifdef CONFIG_IWLWIFI_DEBUG
  6858. /*
  6859. * The following adds a new attribute to the sysfs representation
  6860. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6861. * used for controlling the debug level.
  6862. *
  6863. * See the level definitions in iwl for details.
  6864. */
  6865. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6866. {
  6867. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6868. }
  6869. static ssize_t store_debug_level(struct device_driver *d,
  6870. const char *buf, size_t count)
  6871. {
  6872. char *p = (char *)buf;
  6873. u32 val;
  6874. val = simple_strtoul(p, &p, 0);
  6875. if (p == buf)
  6876. printk(KERN_INFO DRV_NAME
  6877. ": %s is not in hex or decimal form.\n", buf);
  6878. else
  6879. iwl_debug_level = val;
  6880. return strnlen(buf, count);
  6881. }
  6882. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6883. show_debug_level, store_debug_level);
  6884. #endif /* CONFIG_IWLWIFI_DEBUG */
  6885. static ssize_t show_rf_kill(struct device *d,
  6886. struct device_attribute *attr, char *buf)
  6887. {
  6888. /*
  6889. * 0 - RF kill not enabled
  6890. * 1 - SW based RF kill active (sysfs)
  6891. * 2 - HW based RF kill active
  6892. * 3 - Both HW and SW based RF kill active
  6893. */
  6894. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6895. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6896. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6897. return sprintf(buf, "%i\n", val);
  6898. }
  6899. static ssize_t store_rf_kill(struct device *d,
  6900. struct device_attribute *attr,
  6901. const char *buf, size_t count)
  6902. {
  6903. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6904. mutex_lock(&priv->mutex);
  6905. iwl_radio_kill_sw(priv, buf[0] == '1');
  6906. mutex_unlock(&priv->mutex);
  6907. return count;
  6908. }
  6909. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6910. static ssize_t show_temperature(struct device *d,
  6911. struct device_attribute *attr, char *buf)
  6912. {
  6913. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6914. if (!iwl_is_alive(priv))
  6915. return -EAGAIN;
  6916. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6917. }
  6918. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6919. static ssize_t show_rs_window(struct device *d,
  6920. struct device_attribute *attr,
  6921. char *buf)
  6922. {
  6923. struct iwl_priv *priv = d->driver_data;
  6924. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6925. }
  6926. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6927. static ssize_t show_tx_power(struct device *d,
  6928. struct device_attribute *attr, char *buf)
  6929. {
  6930. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6931. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6932. }
  6933. static ssize_t store_tx_power(struct device *d,
  6934. struct device_attribute *attr,
  6935. const char *buf, size_t count)
  6936. {
  6937. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6938. char *p = (char *)buf;
  6939. u32 val;
  6940. val = simple_strtoul(p, &p, 10);
  6941. if (p == buf)
  6942. printk(KERN_INFO DRV_NAME
  6943. ": %s is not in decimal form.\n", buf);
  6944. else
  6945. iwl_hw_reg_set_txpower(priv, val);
  6946. return count;
  6947. }
  6948. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6949. static ssize_t show_flags(struct device *d,
  6950. struct device_attribute *attr, char *buf)
  6951. {
  6952. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6953. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6954. }
  6955. static ssize_t store_flags(struct device *d,
  6956. struct device_attribute *attr,
  6957. const char *buf, size_t count)
  6958. {
  6959. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6960. u32 flags = simple_strtoul(buf, NULL, 0);
  6961. mutex_lock(&priv->mutex);
  6962. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6963. /* Cancel any currently running scans... */
  6964. if (iwl_scan_cancel_timeout(priv, 100))
  6965. IWL_WARNING("Could not cancel scan.\n");
  6966. else {
  6967. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6968. flags);
  6969. priv->staging_rxon.flags = cpu_to_le32(flags);
  6970. iwl_commit_rxon(priv);
  6971. }
  6972. }
  6973. mutex_unlock(&priv->mutex);
  6974. return count;
  6975. }
  6976. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6977. static ssize_t show_filter_flags(struct device *d,
  6978. struct device_attribute *attr, char *buf)
  6979. {
  6980. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6981. return sprintf(buf, "0x%04X\n",
  6982. le32_to_cpu(priv->active_rxon.filter_flags));
  6983. }
  6984. static ssize_t store_filter_flags(struct device *d,
  6985. struct device_attribute *attr,
  6986. const char *buf, size_t count)
  6987. {
  6988. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6989. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6990. mutex_lock(&priv->mutex);
  6991. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6992. /* Cancel any currently running scans... */
  6993. if (iwl_scan_cancel_timeout(priv, 100))
  6994. IWL_WARNING("Could not cancel scan.\n");
  6995. else {
  6996. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6997. "0x%04X\n", filter_flags);
  6998. priv->staging_rxon.filter_flags =
  6999. cpu_to_le32(filter_flags);
  7000. iwl_commit_rxon(priv);
  7001. }
  7002. }
  7003. mutex_unlock(&priv->mutex);
  7004. return count;
  7005. }
  7006. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7007. store_filter_flags);
  7008. static ssize_t show_tune(struct device *d,
  7009. struct device_attribute *attr, char *buf)
  7010. {
  7011. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  7012. return sprintf(buf, "0x%04X\n",
  7013. (priv->phymode << 8) |
  7014. le16_to_cpu(priv->active_rxon.channel));
  7015. }
  7016. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  7017. static ssize_t store_tune(struct device *d,
  7018. struct device_attribute *attr,
  7019. const char *buf, size_t count)
  7020. {
  7021. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  7022. char *p = (char *)buf;
  7023. u16 tune = simple_strtoul(p, &p, 0);
  7024. u8 phymode = (tune >> 8) & 0xff;
  7025. u16 channel = tune & 0xff;
  7026. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7027. mutex_lock(&priv->mutex);
  7028. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7029. (priv->phymode != phymode)) {
  7030. const struct iwl_channel_info *ch_info;
  7031. ch_info = iwl_get_channel_info(priv, phymode, channel);
  7032. if (!ch_info) {
  7033. IWL_WARNING("Requested invalid phymode/channel "
  7034. "combination: %d %d\n", phymode, channel);
  7035. mutex_unlock(&priv->mutex);
  7036. return -EINVAL;
  7037. }
  7038. /* Cancel any currently running scans... */
  7039. if (iwl_scan_cancel_timeout(priv, 100))
  7040. IWL_WARNING("Could not cancel scan.\n");
  7041. else {
  7042. IWL_DEBUG_INFO("Committing phymode and "
  7043. "rxon.channel = %d %d\n",
  7044. phymode, channel);
  7045. iwl_set_rxon_channel(priv, phymode, channel);
  7046. iwl_set_flags_for_phymode(priv, phymode);
  7047. iwl_set_rate(priv);
  7048. iwl_commit_rxon(priv);
  7049. }
  7050. }
  7051. mutex_unlock(&priv->mutex);
  7052. return count;
  7053. }
  7054. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7055. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  7056. static ssize_t show_measurement(struct device *d,
  7057. struct device_attribute *attr, char *buf)
  7058. {
  7059. struct iwl_priv *priv = dev_get_drvdata(d);
  7060. struct iwl_spectrum_notification measure_report;
  7061. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7062. u8 *data = (u8 *) & measure_report;
  7063. unsigned long flags;
  7064. spin_lock_irqsave(&priv->lock, flags);
  7065. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7066. spin_unlock_irqrestore(&priv->lock, flags);
  7067. return 0;
  7068. }
  7069. memcpy(&measure_report, &priv->measure_report, size);
  7070. priv->measurement_status = 0;
  7071. spin_unlock_irqrestore(&priv->lock, flags);
  7072. while (size && (PAGE_SIZE - len)) {
  7073. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7074. PAGE_SIZE - len, 1);
  7075. len = strlen(buf);
  7076. if (PAGE_SIZE - len)
  7077. buf[len++] = '\n';
  7078. ofs += 16;
  7079. size -= min(size, 16U);
  7080. }
  7081. return len;
  7082. }
  7083. static ssize_t store_measurement(struct device *d,
  7084. struct device_attribute *attr,
  7085. const char *buf, size_t count)
  7086. {
  7087. struct iwl_priv *priv = dev_get_drvdata(d);
  7088. struct ieee80211_measurement_params params = {
  7089. .channel = le16_to_cpu(priv->active_rxon.channel),
  7090. .start_time = cpu_to_le64(priv->last_tsf),
  7091. .duration = cpu_to_le16(1),
  7092. };
  7093. u8 type = IWL_MEASURE_BASIC;
  7094. u8 buffer[32];
  7095. u8 channel;
  7096. if (count) {
  7097. char *p = buffer;
  7098. strncpy(buffer, buf, min(sizeof(buffer), count));
  7099. channel = simple_strtoul(p, NULL, 0);
  7100. if (channel)
  7101. params.channel = channel;
  7102. p = buffer;
  7103. while (*p && *p != ' ')
  7104. p++;
  7105. if (*p)
  7106. type = simple_strtoul(p + 1, NULL, 0);
  7107. }
  7108. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7109. "channel %d (for '%s')\n", type, params.channel, buf);
  7110. iwl_get_measurement(priv, &params, type);
  7111. return count;
  7112. }
  7113. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7114. show_measurement, store_measurement);
  7115. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  7116. static ssize_t store_retry_rate(struct device *d,
  7117. struct device_attribute *attr,
  7118. const char *buf, size_t count)
  7119. {
  7120. struct iwl_priv *priv = dev_get_drvdata(d);
  7121. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7122. if (priv->retry_rate <= 0)
  7123. priv->retry_rate = 1;
  7124. return count;
  7125. }
  7126. static ssize_t show_retry_rate(struct device *d,
  7127. struct device_attribute *attr, char *buf)
  7128. {
  7129. struct iwl_priv *priv = dev_get_drvdata(d);
  7130. return sprintf(buf, "%d", priv->retry_rate);
  7131. }
  7132. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7133. store_retry_rate);
  7134. static ssize_t store_power_level(struct device *d,
  7135. struct device_attribute *attr,
  7136. const char *buf, size_t count)
  7137. {
  7138. struct iwl_priv *priv = dev_get_drvdata(d);
  7139. int rc;
  7140. int mode;
  7141. mode = simple_strtoul(buf, NULL, 0);
  7142. mutex_lock(&priv->mutex);
  7143. if (!iwl_is_ready(priv)) {
  7144. rc = -EAGAIN;
  7145. goto out;
  7146. }
  7147. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7148. mode = IWL_POWER_AC;
  7149. else
  7150. mode |= IWL_POWER_ENABLED;
  7151. if (mode != priv->power_mode) {
  7152. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7153. if (rc) {
  7154. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7155. goto out;
  7156. }
  7157. priv->power_mode = mode;
  7158. }
  7159. rc = count;
  7160. out:
  7161. mutex_unlock(&priv->mutex);
  7162. return rc;
  7163. }
  7164. #define MAX_WX_STRING 80
  7165. /* Values are in microsecond */
  7166. static const s32 timeout_duration[] = {
  7167. 350000,
  7168. 250000,
  7169. 75000,
  7170. 37000,
  7171. 25000,
  7172. };
  7173. static const s32 period_duration[] = {
  7174. 400000,
  7175. 700000,
  7176. 1000000,
  7177. 1000000,
  7178. 1000000
  7179. };
  7180. static ssize_t show_power_level(struct device *d,
  7181. struct device_attribute *attr, char *buf)
  7182. {
  7183. struct iwl_priv *priv = dev_get_drvdata(d);
  7184. int level = IWL_POWER_LEVEL(priv->power_mode);
  7185. char *p = buf;
  7186. p += sprintf(p, "%d ", level);
  7187. switch (level) {
  7188. case IWL_POWER_MODE_CAM:
  7189. case IWL_POWER_AC:
  7190. p += sprintf(p, "(AC)");
  7191. break;
  7192. case IWL_POWER_BATTERY:
  7193. p += sprintf(p, "(BATTERY)");
  7194. break;
  7195. default:
  7196. p += sprintf(p,
  7197. "(Timeout %dms, Period %dms)",
  7198. timeout_duration[level - 1] / 1000,
  7199. period_duration[level - 1] / 1000);
  7200. }
  7201. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7202. p += sprintf(p, " OFF\n");
  7203. else
  7204. p += sprintf(p, " \n");
  7205. return (p - buf + 1);
  7206. }
  7207. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7208. store_power_level);
  7209. static ssize_t show_channels(struct device *d,
  7210. struct device_attribute *attr, char *buf)
  7211. {
  7212. struct iwl_priv *priv = dev_get_drvdata(d);
  7213. int len = 0, i;
  7214. struct ieee80211_channel *channels = NULL;
  7215. const struct ieee80211_hw_mode *hw_mode = NULL;
  7216. int count = 0;
  7217. if (!iwl_is_ready(priv))
  7218. return -EAGAIN;
  7219. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  7220. if (!hw_mode)
  7221. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  7222. if (hw_mode) {
  7223. channels = hw_mode->channels;
  7224. count = hw_mode->num_channels;
  7225. }
  7226. len +=
  7227. sprintf(&buf[len],
  7228. "Displaying %d channels in 2.4GHz band "
  7229. "(802.11bg):\n", count);
  7230. for (i = 0; i < count; i++)
  7231. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7232. channels[i].chan,
  7233. channels[i].power_level,
  7234. channels[i].
  7235. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7236. " (IEEE 802.11h required)" : "",
  7237. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7238. || (channels[i].
  7239. flag &
  7240. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7241. ", IBSS",
  7242. channels[i].
  7243. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7244. "active/passive" : "passive only");
  7245. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  7246. if (hw_mode) {
  7247. channels = hw_mode->channels;
  7248. count = hw_mode->num_channels;
  7249. } else {
  7250. channels = NULL;
  7251. count = 0;
  7252. }
  7253. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7254. "(802.11a):\n", count);
  7255. for (i = 0; i < count; i++)
  7256. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7257. channels[i].chan,
  7258. channels[i].power_level,
  7259. channels[i].
  7260. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7261. " (IEEE 802.11h required)" : "",
  7262. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7263. || (channels[i].
  7264. flag &
  7265. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7266. ", IBSS",
  7267. channels[i].
  7268. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7269. "active/passive" : "passive only");
  7270. return len;
  7271. }
  7272. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7273. static ssize_t show_statistics(struct device *d,
  7274. struct device_attribute *attr, char *buf)
  7275. {
  7276. struct iwl_priv *priv = dev_get_drvdata(d);
  7277. u32 size = sizeof(struct iwl_notif_statistics);
  7278. u32 len = 0, ofs = 0;
  7279. u8 *data = (u8 *) & priv->statistics;
  7280. int rc = 0;
  7281. if (!iwl_is_alive(priv))
  7282. return -EAGAIN;
  7283. mutex_lock(&priv->mutex);
  7284. rc = iwl_send_statistics_request(priv);
  7285. mutex_unlock(&priv->mutex);
  7286. if (rc) {
  7287. len = sprintf(buf,
  7288. "Error sending statistics request: 0x%08X\n", rc);
  7289. return len;
  7290. }
  7291. while (size && (PAGE_SIZE - len)) {
  7292. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7293. PAGE_SIZE - len, 1);
  7294. len = strlen(buf);
  7295. if (PAGE_SIZE - len)
  7296. buf[len++] = '\n';
  7297. ofs += 16;
  7298. size -= min(size, 16U);
  7299. }
  7300. return len;
  7301. }
  7302. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7303. static ssize_t show_antenna(struct device *d,
  7304. struct device_attribute *attr, char *buf)
  7305. {
  7306. struct iwl_priv *priv = dev_get_drvdata(d);
  7307. if (!iwl_is_alive(priv))
  7308. return -EAGAIN;
  7309. return sprintf(buf, "%d\n", priv->antenna);
  7310. }
  7311. static ssize_t store_antenna(struct device *d,
  7312. struct device_attribute *attr,
  7313. const char *buf, size_t count)
  7314. {
  7315. int ant;
  7316. struct iwl_priv *priv = dev_get_drvdata(d);
  7317. if (count == 0)
  7318. return 0;
  7319. if (sscanf(buf, "%1i", &ant) != 1) {
  7320. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7321. return count;
  7322. }
  7323. if ((ant >= 0) && (ant <= 2)) {
  7324. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7325. priv->antenna = (enum iwl_antenna)ant;
  7326. } else
  7327. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7328. return count;
  7329. }
  7330. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7331. static ssize_t show_status(struct device *d,
  7332. struct device_attribute *attr, char *buf)
  7333. {
  7334. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  7335. if (!iwl_is_alive(priv))
  7336. return -EAGAIN;
  7337. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7338. }
  7339. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7340. static ssize_t dump_error_log(struct device *d,
  7341. struct device_attribute *attr,
  7342. const char *buf, size_t count)
  7343. {
  7344. char *p = (char *)buf;
  7345. if (p[0] == '1')
  7346. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  7347. return strnlen(buf, count);
  7348. }
  7349. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7350. static ssize_t dump_event_log(struct device *d,
  7351. struct device_attribute *attr,
  7352. const char *buf, size_t count)
  7353. {
  7354. char *p = (char *)buf;
  7355. if (p[0] == '1')
  7356. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  7357. return strnlen(buf, count);
  7358. }
  7359. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7360. /*****************************************************************************
  7361. *
  7362. * driver setup and teardown
  7363. *
  7364. *****************************************************************************/
  7365. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  7366. {
  7367. priv->workqueue = create_workqueue(DRV_NAME);
  7368. init_waitqueue_head(&priv->wait_command_queue);
  7369. INIT_WORK(&priv->up, iwl_bg_up);
  7370. INIT_WORK(&priv->restart, iwl_bg_restart);
  7371. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  7372. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  7373. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  7374. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  7375. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  7376. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  7377. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  7378. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  7379. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  7380. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  7381. iwl_hw_setup_deferred_work(priv);
  7382. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7383. iwl_irq_tasklet, (unsigned long)priv);
  7384. }
  7385. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  7386. {
  7387. iwl_hw_cancel_deferred_work(priv);
  7388. cancel_delayed_work_sync(&priv->init_alive_start);
  7389. cancel_delayed_work(&priv->scan_check);
  7390. cancel_delayed_work(&priv->alive_start);
  7391. cancel_delayed_work(&priv->post_associate);
  7392. cancel_work_sync(&priv->beacon_update);
  7393. }
  7394. static struct attribute *iwl_sysfs_entries[] = {
  7395. &dev_attr_antenna.attr,
  7396. &dev_attr_channels.attr,
  7397. &dev_attr_dump_errors.attr,
  7398. &dev_attr_dump_events.attr,
  7399. &dev_attr_flags.attr,
  7400. &dev_attr_filter_flags.attr,
  7401. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  7402. &dev_attr_measurement.attr,
  7403. #endif
  7404. &dev_attr_power_level.attr,
  7405. &dev_attr_retry_rate.attr,
  7406. &dev_attr_rf_kill.attr,
  7407. &dev_attr_rs_window.attr,
  7408. &dev_attr_statistics.attr,
  7409. &dev_attr_status.attr,
  7410. &dev_attr_temperature.attr,
  7411. &dev_attr_tune.attr,
  7412. &dev_attr_tx_power.attr,
  7413. NULL
  7414. };
  7415. static struct attribute_group iwl_attribute_group = {
  7416. .name = NULL, /* put in device directory */
  7417. .attrs = iwl_sysfs_entries,
  7418. };
  7419. static struct ieee80211_ops iwl_hw_ops = {
  7420. .tx = iwl_mac_tx,
  7421. .start = iwl_mac_start,
  7422. .stop = iwl_mac_stop,
  7423. .add_interface = iwl_mac_add_interface,
  7424. .remove_interface = iwl_mac_remove_interface,
  7425. .config = iwl_mac_config,
  7426. .config_interface = iwl_mac_config_interface,
  7427. .configure_filter = iwl_configure_filter,
  7428. .set_key = iwl_mac_set_key,
  7429. .get_stats = iwl_mac_get_stats,
  7430. .get_tx_stats = iwl_mac_get_tx_stats,
  7431. .conf_tx = iwl_mac_conf_tx,
  7432. .get_tsf = iwl_mac_get_tsf,
  7433. .reset_tsf = iwl_mac_reset_tsf,
  7434. .beacon_update = iwl_mac_beacon_update,
  7435. .erp_ie_changed = iwl_mac_erp_ie_changed,
  7436. #ifdef CONFIG_IWLWIFI_HT
  7437. .conf_ht = iwl_mac_conf_ht,
  7438. .get_ht_capab = iwl_mac_get_ht_capab,
  7439. #ifdef CONFIG_IWLWIFI_HT_AGG
  7440. .ht_tx_agg_start = iwl_mac_ht_tx_agg_start,
  7441. .ht_tx_agg_stop = iwl_mac_ht_tx_agg_stop,
  7442. .ht_rx_agg_start = iwl_mac_ht_rx_agg_start,
  7443. .ht_rx_agg_stop = iwl_mac_ht_rx_agg_stop,
  7444. #endif /* CONFIG_IWLWIFI_HT_AGG */
  7445. #endif /* CONFIG_IWLWIFI_HT */
  7446. .hw_scan = iwl_mac_hw_scan
  7447. };
  7448. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7449. {
  7450. int err = 0;
  7451. struct iwl_priv *priv;
  7452. struct ieee80211_hw *hw;
  7453. int i;
  7454. if (iwl_param_disable_hw_scan) {
  7455. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7456. iwl_hw_ops.hw_scan = NULL;
  7457. }
  7458. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7459. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7460. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7461. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7462. err = -EINVAL;
  7463. goto out;
  7464. }
  7465. /* mac80211 allocates memory for this device instance, including
  7466. * space for this driver's private structure */
  7467. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  7468. if (hw == NULL) {
  7469. IWL_ERROR("Can not allocate network device\n");
  7470. err = -ENOMEM;
  7471. goto out;
  7472. }
  7473. SET_IEEE80211_DEV(hw, &pdev->dev);
  7474. hw->rate_control_algorithm = "iwl-4965-rs";
  7475. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7476. priv = hw->priv;
  7477. priv->hw = hw;
  7478. priv->pci_dev = pdev;
  7479. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  7480. #ifdef CONFIG_IWLWIFI_DEBUG
  7481. iwl_debug_level = iwl_param_debug;
  7482. atomic_set(&priv->restrict_refcnt, 0);
  7483. #endif
  7484. priv->retry_rate = 1;
  7485. priv->ibss_beacon = NULL;
  7486. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7487. * the range of signal quality values that we'll provide.
  7488. * Negative values for level/noise indicate that we'll provide dBm.
  7489. * For WE, at least, non-0 values here *enable* display of values
  7490. * in app (iwconfig). */
  7491. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7492. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7493. hw->max_signal = 100; /* link quality indication (%) */
  7494. /* Tell mac80211 our Tx characteristics */
  7495. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7496. hw->queues = 4;
  7497. #ifdef CONFIG_IWLWIFI_HT
  7498. #ifdef CONFIG_IWLWIFI_HT_AGG
  7499. hw->queues = 16;
  7500. #endif /* CONFIG_IWLWIFI_HT_AGG */
  7501. #endif /* CONFIG_IWLWIFI_HT */
  7502. spin_lock_init(&priv->lock);
  7503. spin_lock_init(&priv->power_data.lock);
  7504. spin_lock_init(&priv->sta_lock);
  7505. spin_lock_init(&priv->hcmd_lock);
  7506. spin_lock_init(&priv->lq_mngr.lock);
  7507. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7508. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7509. INIT_LIST_HEAD(&priv->free_frames);
  7510. mutex_init(&priv->mutex);
  7511. if (pci_enable_device(pdev)) {
  7512. err = -ENODEV;
  7513. goto out_ieee80211_free_hw;
  7514. }
  7515. pci_set_master(pdev);
  7516. iwl_clear_stations_table(priv);
  7517. priv->data_retry_limit = -1;
  7518. priv->ieee_channels = NULL;
  7519. priv->ieee_rates = NULL;
  7520. priv->phymode = -1;
  7521. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7522. if (!err)
  7523. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7524. if (err) {
  7525. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7526. goto out_pci_disable_device;
  7527. }
  7528. pci_set_drvdata(pdev, priv);
  7529. err = pci_request_regions(pdev, DRV_NAME);
  7530. if (err)
  7531. goto out_pci_disable_device;
  7532. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7533. * PCI Tx retries from interfering with C3 CPU state */
  7534. pci_write_config_byte(pdev, 0x41, 0x00);
  7535. priv->hw_base = pci_iomap(pdev, 0, 0);
  7536. if (!priv->hw_base) {
  7537. err = -ENODEV;
  7538. goto out_pci_release_regions;
  7539. }
  7540. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7541. (unsigned long long) pci_resource_len(pdev, 0));
  7542. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7543. /* Initialize module parameter values here */
  7544. if (iwl_param_disable) {
  7545. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7546. IWL_DEBUG_INFO("Radio disabled.\n");
  7547. }
  7548. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7549. priv->ps_mode = 0;
  7550. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7551. priv->is_ht_enabled = 1;
  7552. priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ;
  7553. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7554. priv->ps_mode = IWL_MIMO_PS_NONE;
  7555. priv->cck_power_index_compensation = iwl_read32(
  7556. priv, CSR_HW_REV_WA_REG);
  7557. iwl4965_set_rxon_chain(priv);
  7558. printk(KERN_INFO DRV_NAME
  7559. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7560. /* Device-specific setup */
  7561. if (iwl_hw_set_hw_setting(priv)) {
  7562. IWL_ERROR("failed to set hw settings\n");
  7563. mutex_unlock(&priv->mutex);
  7564. goto out_iounmap;
  7565. }
  7566. #ifdef CONFIG_IWLWIFI_QOS
  7567. if (iwl_param_qos_enable)
  7568. priv->qos_data.qos_enable = 1;
  7569. iwl_reset_qos(priv);
  7570. priv->qos_data.qos_active = 0;
  7571. priv->qos_data.qos_cap.val = 0;
  7572. #endif /* CONFIG_IWLWIFI_QOS */
  7573. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7574. iwl_setup_deferred_work(priv);
  7575. iwl_setup_rx_handlers(priv);
  7576. priv->rates_mask = IWL_RATES_MASK;
  7577. /* If power management is turned on, default to AC mode */
  7578. priv->power_mode = IWL_POWER_AC;
  7579. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7580. pci_enable_msi(pdev);
  7581. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7582. if (err) {
  7583. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7584. goto out_disable_msi;
  7585. }
  7586. mutex_lock(&priv->mutex);
  7587. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7588. if (err) {
  7589. IWL_ERROR("failed to create sysfs device attributes\n");
  7590. mutex_unlock(&priv->mutex);
  7591. goto out_release_irq;
  7592. }
  7593. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7594. * ucode filename and max sizes are card-specific. */
  7595. err = iwl_read_ucode(priv);
  7596. if (err) {
  7597. IWL_ERROR("Could not read microcode: %d\n", err);
  7598. mutex_unlock(&priv->mutex);
  7599. goto out_pci_alloc;
  7600. }
  7601. mutex_unlock(&priv->mutex);
  7602. IWL_DEBUG_INFO("Queueing UP work.\n");
  7603. queue_work(priv->workqueue, &priv->up);
  7604. return 0;
  7605. out_pci_alloc:
  7606. iwl_dealloc_ucode_pci(priv);
  7607. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7608. out_release_irq:
  7609. free_irq(pdev->irq, priv);
  7610. out_disable_msi:
  7611. pci_disable_msi(pdev);
  7612. destroy_workqueue(priv->workqueue);
  7613. priv->workqueue = NULL;
  7614. iwl_unset_hw_setting(priv);
  7615. out_iounmap:
  7616. pci_iounmap(pdev, priv->hw_base);
  7617. out_pci_release_regions:
  7618. pci_release_regions(pdev);
  7619. out_pci_disable_device:
  7620. pci_disable_device(pdev);
  7621. pci_set_drvdata(pdev, NULL);
  7622. out_ieee80211_free_hw:
  7623. ieee80211_free_hw(priv->hw);
  7624. out:
  7625. return err;
  7626. }
  7627. static void iwl_pci_remove(struct pci_dev *pdev)
  7628. {
  7629. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7630. struct list_head *p, *q;
  7631. int i;
  7632. if (!priv)
  7633. return;
  7634. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7635. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7636. iwl_down(priv);
  7637. /* Free MAC hash list for ADHOC */
  7638. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7639. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7640. list_del(p);
  7641. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7642. }
  7643. }
  7644. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7645. iwl_dealloc_ucode_pci(priv);
  7646. if (priv->rxq.bd)
  7647. iwl_rx_queue_free(priv, &priv->rxq);
  7648. iwl_hw_txq_ctx_free(priv);
  7649. iwl_unset_hw_setting(priv);
  7650. iwl_clear_stations_table(priv);
  7651. if (priv->mac80211_registered) {
  7652. ieee80211_unregister_hw(priv->hw);
  7653. iwl_rate_control_unregister(priv->hw);
  7654. }
  7655. /*netif_stop_queue(dev); */
  7656. flush_workqueue(priv->workqueue);
  7657. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7658. * priv->workqueue... so we can't take down the workqueue
  7659. * until now... */
  7660. destroy_workqueue(priv->workqueue);
  7661. priv->workqueue = NULL;
  7662. free_irq(pdev->irq, priv);
  7663. pci_disable_msi(pdev);
  7664. pci_iounmap(pdev, priv->hw_base);
  7665. pci_release_regions(pdev);
  7666. pci_disable_device(pdev);
  7667. pci_set_drvdata(pdev, NULL);
  7668. kfree(priv->channel_info);
  7669. kfree(priv->ieee_channels);
  7670. kfree(priv->ieee_rates);
  7671. if (priv->ibss_beacon)
  7672. dev_kfree_skb(priv->ibss_beacon);
  7673. ieee80211_free_hw(priv->hw);
  7674. }
  7675. #ifdef CONFIG_PM
  7676. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7677. {
  7678. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7679. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7680. /* Take down the device; powers it off, etc. */
  7681. iwl_down(priv);
  7682. if (priv->mac80211_registered)
  7683. ieee80211_stop_queues(priv->hw);
  7684. pci_save_state(pdev);
  7685. pci_disable_device(pdev);
  7686. pci_set_power_state(pdev, PCI_D3hot);
  7687. return 0;
  7688. }
  7689. static void iwl_resume(struct iwl_priv *priv)
  7690. {
  7691. unsigned long flags;
  7692. /* The following it a temporary work around due to the
  7693. * suspend / resume not fully initializing the NIC correctly.
  7694. * Without all of the following, resume will not attempt to take
  7695. * down the NIC (it shouldn't really need to) and will just try
  7696. * and bring the NIC back up. However that fails during the
  7697. * ucode verification process. This then causes iwl_down to be
  7698. * called *after* iwl_hw_nic_init() has succeeded -- which
  7699. * then lets the next init sequence succeed. So, we've
  7700. * replicated all of that NIC init code here... */
  7701. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7702. iwl_hw_nic_init(priv);
  7703. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7704. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7705. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7706. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7707. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7708. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7709. /* tell the device to stop sending interrupts */
  7710. iwl_disable_interrupts(priv);
  7711. spin_lock_irqsave(&priv->lock, flags);
  7712. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7713. if (!iwl_grab_restricted_access(priv)) {
  7714. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7715. APMG_CLK_VAL_DMA_CLK_RQT);
  7716. iwl_release_restricted_access(priv);
  7717. }
  7718. spin_unlock_irqrestore(&priv->lock, flags);
  7719. udelay(5);
  7720. iwl_hw_nic_reset(priv);
  7721. /* Bring the device back up */
  7722. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7723. queue_work(priv->workqueue, &priv->up);
  7724. }
  7725. static int iwl_pci_resume(struct pci_dev *pdev)
  7726. {
  7727. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7728. int err;
  7729. printk(KERN_INFO "Coming out of suspend...\n");
  7730. pci_set_power_state(pdev, PCI_D0);
  7731. err = pci_enable_device(pdev);
  7732. pci_restore_state(pdev);
  7733. /*
  7734. * Suspend/Resume resets the PCI configuration space, so we have to
  7735. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7736. * from interfering with C3 CPU state. pci_restore_state won't help
  7737. * here since it only restores the first 64 bytes pci config header.
  7738. */
  7739. pci_write_config_byte(pdev, 0x41, 0x00);
  7740. iwl_resume(priv);
  7741. return 0;
  7742. }
  7743. #endif /* CONFIG_PM */
  7744. /*****************************************************************************
  7745. *
  7746. * driver and module entry point
  7747. *
  7748. *****************************************************************************/
  7749. static struct pci_driver iwl_driver = {
  7750. .name = DRV_NAME,
  7751. .id_table = iwl_hw_card_ids,
  7752. .probe = iwl_pci_probe,
  7753. .remove = __devexit_p(iwl_pci_remove),
  7754. #ifdef CONFIG_PM
  7755. .suspend = iwl_pci_suspend,
  7756. .resume = iwl_pci_resume,
  7757. #endif
  7758. };
  7759. static int __init iwl_init(void)
  7760. {
  7761. int ret;
  7762. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7763. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7764. ret = pci_register_driver(&iwl_driver);
  7765. if (ret) {
  7766. IWL_ERROR("Unable to initialize PCI module\n");
  7767. return ret;
  7768. }
  7769. #ifdef CONFIG_IWLWIFI_DEBUG
  7770. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7771. if (ret) {
  7772. IWL_ERROR("Unable to create driver sysfs file\n");
  7773. pci_unregister_driver(&iwl_driver);
  7774. return ret;
  7775. }
  7776. #endif
  7777. return ret;
  7778. }
  7779. static void __exit iwl_exit(void)
  7780. {
  7781. #ifdef CONFIG_IWLWIFI_DEBUG
  7782. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7783. #endif
  7784. pci_unregister_driver(&iwl_driver);
  7785. }
  7786. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7787. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7788. module_param_named(disable, iwl_param_disable, int, 0444);
  7789. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7790. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7791. MODULE_PARM_DESC(hwcrypto,
  7792. "using hardware crypto engine (default 0 [software])\n");
  7793. module_param_named(debug, iwl_param_debug, int, 0444);
  7794. MODULE_PARM_DESC(debug, "debug output mask");
  7795. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7796. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7797. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7798. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7799. /* QoS */
  7800. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7801. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7802. module_exit(iwl_exit);
  7803. module_init(iwl_init);