cnic.c 65 KB

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  1. /* cnic.c: Broadcom CNIC core network driver.
  2. *
  3. * Copyright (c) 2006-2009 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
  10. * Modified and maintained by: Michael Chan <mchan@broadcom.com>
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/list.h>
  16. #include <linux/slab.h>
  17. #include <linux/pci.h>
  18. #include <linux/init.h>
  19. #include <linux/netdevice.h>
  20. #include <linux/uio_driver.h>
  21. #include <linux/in.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/delay.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/if_vlan.h>
  26. #include <linux/module.h>
  27. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  28. #define BCM_VLAN 1
  29. #endif
  30. #include <net/ip.h>
  31. #include <net/tcp.h>
  32. #include <net/route.h>
  33. #include <net/ipv6.h>
  34. #include <net/ip6_route.h>
  35. #include <scsi/iscsi_if.h>
  36. #include "cnic_if.h"
  37. #include "bnx2.h"
  38. #include "cnic.h"
  39. #include "cnic_defs.h"
  40. #define DRV_MODULE_NAME "cnic"
  41. #define PFX DRV_MODULE_NAME ": "
  42. static char version[] __devinitdata =
  43. "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
  44. MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
  45. "Chen (zongxi@broadcom.com");
  46. MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
  47. MODULE_LICENSE("GPL");
  48. MODULE_VERSION(CNIC_MODULE_VERSION);
  49. static LIST_HEAD(cnic_dev_list);
  50. static DEFINE_RWLOCK(cnic_dev_lock);
  51. static DEFINE_MUTEX(cnic_lock);
  52. static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
  53. static int cnic_service_bnx2(void *, void *);
  54. static int cnic_ctl(void *, struct cnic_ctl_info *);
  55. static struct cnic_ops cnic_bnx2_ops = {
  56. .cnic_owner = THIS_MODULE,
  57. .cnic_handler = cnic_service_bnx2,
  58. .cnic_ctl = cnic_ctl,
  59. };
  60. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *);
  61. static void cnic_init_bnx2_tx_ring(struct cnic_dev *);
  62. static void cnic_init_bnx2_rx_ring(struct cnic_dev *);
  63. static int cnic_cm_set_pg(struct cnic_sock *);
  64. static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
  65. {
  66. struct cnic_dev *dev = uinfo->priv;
  67. struct cnic_local *cp = dev->cnic_priv;
  68. if (!capable(CAP_NET_ADMIN))
  69. return -EPERM;
  70. if (cp->uio_dev != -1)
  71. return -EBUSY;
  72. cp->uio_dev = iminor(inode);
  73. cnic_shutdown_bnx2_rx_ring(dev);
  74. cnic_init_bnx2_tx_ring(dev);
  75. cnic_init_bnx2_rx_ring(dev);
  76. return 0;
  77. }
  78. static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
  79. {
  80. struct cnic_dev *dev = uinfo->priv;
  81. struct cnic_local *cp = dev->cnic_priv;
  82. cp->uio_dev = -1;
  83. return 0;
  84. }
  85. static inline void cnic_hold(struct cnic_dev *dev)
  86. {
  87. atomic_inc(&dev->ref_count);
  88. }
  89. static inline void cnic_put(struct cnic_dev *dev)
  90. {
  91. atomic_dec(&dev->ref_count);
  92. }
  93. static inline void csk_hold(struct cnic_sock *csk)
  94. {
  95. atomic_inc(&csk->ref_count);
  96. }
  97. static inline void csk_put(struct cnic_sock *csk)
  98. {
  99. atomic_dec(&csk->ref_count);
  100. }
  101. static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
  102. {
  103. struct cnic_dev *cdev;
  104. read_lock(&cnic_dev_lock);
  105. list_for_each_entry(cdev, &cnic_dev_list, list) {
  106. if (netdev == cdev->netdev) {
  107. cnic_hold(cdev);
  108. read_unlock(&cnic_dev_lock);
  109. return cdev;
  110. }
  111. }
  112. read_unlock(&cnic_dev_lock);
  113. return NULL;
  114. }
  115. static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
  116. {
  117. struct cnic_local *cp = dev->cnic_priv;
  118. struct cnic_eth_dev *ethdev = cp->ethdev;
  119. struct drv_ctl_info info;
  120. struct drv_ctl_io *io = &info.data.io;
  121. info.cmd = DRV_CTL_CTX_WR_CMD;
  122. io->cid_addr = cid_addr;
  123. io->offset = off;
  124. io->data = val;
  125. ethdev->drv_ctl(dev->netdev, &info);
  126. }
  127. static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
  128. {
  129. struct cnic_local *cp = dev->cnic_priv;
  130. struct cnic_eth_dev *ethdev = cp->ethdev;
  131. struct drv_ctl_info info;
  132. struct drv_ctl_io *io = &info.data.io;
  133. info.cmd = DRV_CTL_IO_WR_CMD;
  134. io->offset = off;
  135. io->data = val;
  136. ethdev->drv_ctl(dev->netdev, &info);
  137. }
  138. static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
  139. {
  140. struct cnic_local *cp = dev->cnic_priv;
  141. struct cnic_eth_dev *ethdev = cp->ethdev;
  142. struct drv_ctl_info info;
  143. struct drv_ctl_io *io = &info.data.io;
  144. info.cmd = DRV_CTL_IO_RD_CMD;
  145. io->offset = off;
  146. ethdev->drv_ctl(dev->netdev, &info);
  147. return io->data;
  148. }
  149. static int cnic_in_use(struct cnic_sock *csk)
  150. {
  151. return test_bit(SK_F_INUSE, &csk->flags);
  152. }
  153. static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
  154. {
  155. struct cnic_local *cp = dev->cnic_priv;
  156. struct cnic_eth_dev *ethdev = cp->ethdev;
  157. struct drv_ctl_info info;
  158. info.cmd = DRV_CTL_COMPLETION_CMD;
  159. info.data.comp.comp_count = count;
  160. ethdev->drv_ctl(dev->netdev, &info);
  161. }
  162. static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
  163. struct cnic_sock *csk)
  164. {
  165. struct iscsi_path path_req;
  166. char *buf = NULL;
  167. u16 len = 0;
  168. u32 msg_type = ISCSI_KEVENT_IF_DOWN;
  169. struct cnic_ulp_ops *ulp_ops;
  170. if (cp->uio_dev == -1)
  171. return -ENODEV;
  172. if (csk) {
  173. len = sizeof(path_req);
  174. buf = (char *) &path_req;
  175. memset(&path_req, 0, len);
  176. msg_type = ISCSI_KEVENT_PATH_REQ;
  177. path_req.handle = (u64) csk->l5_cid;
  178. if (test_bit(SK_F_IPV6, &csk->flags)) {
  179. memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
  180. sizeof(struct in6_addr));
  181. path_req.ip_addr_len = 16;
  182. } else {
  183. memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
  184. sizeof(struct in_addr));
  185. path_req.ip_addr_len = 4;
  186. }
  187. path_req.vlan_id = csk->vlan_id;
  188. path_req.pmtu = csk->mtu;
  189. }
  190. rcu_read_lock();
  191. ulp_ops = rcu_dereference(cp->ulp_ops[CNIC_ULP_ISCSI]);
  192. if (ulp_ops)
  193. ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
  194. rcu_read_unlock();
  195. return 0;
  196. }
  197. static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
  198. char *buf, u16 len)
  199. {
  200. int rc = -EINVAL;
  201. switch (msg_type) {
  202. case ISCSI_UEVENT_PATH_UPDATE: {
  203. struct cnic_local *cp;
  204. u32 l5_cid;
  205. struct cnic_sock *csk;
  206. struct iscsi_path *path_resp;
  207. if (len < sizeof(*path_resp))
  208. break;
  209. path_resp = (struct iscsi_path *) buf;
  210. cp = dev->cnic_priv;
  211. l5_cid = (u32) path_resp->handle;
  212. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  213. break;
  214. csk = &cp->csk_tbl[l5_cid];
  215. csk_hold(csk);
  216. if (cnic_in_use(csk)) {
  217. memcpy(csk->ha, path_resp->mac_addr, 6);
  218. if (test_bit(SK_F_IPV6, &csk->flags))
  219. memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
  220. sizeof(struct in6_addr));
  221. else
  222. memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
  223. sizeof(struct in_addr));
  224. if (is_valid_ether_addr(csk->ha))
  225. cnic_cm_set_pg(csk);
  226. }
  227. csk_put(csk);
  228. rc = 0;
  229. }
  230. }
  231. return rc;
  232. }
  233. static int cnic_offld_prep(struct cnic_sock *csk)
  234. {
  235. if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  236. return 0;
  237. if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
  238. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  239. return 0;
  240. }
  241. return 1;
  242. }
  243. static int cnic_close_prep(struct cnic_sock *csk)
  244. {
  245. clear_bit(SK_F_CONNECT_START, &csk->flags);
  246. smp_mb__after_clear_bit();
  247. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  248. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  249. msleep(1);
  250. return 1;
  251. }
  252. return 0;
  253. }
  254. static int cnic_abort_prep(struct cnic_sock *csk)
  255. {
  256. clear_bit(SK_F_CONNECT_START, &csk->flags);
  257. smp_mb__after_clear_bit();
  258. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  259. msleep(1);
  260. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  261. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  262. return 1;
  263. }
  264. return 0;
  265. }
  266. int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
  267. {
  268. struct cnic_dev *dev;
  269. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  270. printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
  271. ulp_type);
  272. return -EINVAL;
  273. }
  274. mutex_lock(&cnic_lock);
  275. if (cnic_ulp_tbl[ulp_type]) {
  276. printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
  277. "been registered\n", ulp_type);
  278. mutex_unlock(&cnic_lock);
  279. return -EBUSY;
  280. }
  281. read_lock(&cnic_dev_lock);
  282. list_for_each_entry(dev, &cnic_dev_list, list) {
  283. struct cnic_local *cp = dev->cnic_priv;
  284. clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
  285. }
  286. read_unlock(&cnic_dev_lock);
  287. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
  288. mutex_unlock(&cnic_lock);
  289. /* Prevent race conditions with netdev_event */
  290. rtnl_lock();
  291. read_lock(&cnic_dev_lock);
  292. list_for_each_entry(dev, &cnic_dev_list, list) {
  293. struct cnic_local *cp = dev->cnic_priv;
  294. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
  295. ulp_ops->cnic_init(dev);
  296. }
  297. read_unlock(&cnic_dev_lock);
  298. rtnl_unlock();
  299. return 0;
  300. }
  301. int cnic_unregister_driver(int ulp_type)
  302. {
  303. struct cnic_dev *dev;
  304. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  305. printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
  306. ulp_type);
  307. return -EINVAL;
  308. }
  309. mutex_lock(&cnic_lock);
  310. if (!cnic_ulp_tbl[ulp_type]) {
  311. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
  312. "been registered\n", ulp_type);
  313. goto out_unlock;
  314. }
  315. read_lock(&cnic_dev_lock);
  316. list_for_each_entry(dev, &cnic_dev_list, list) {
  317. struct cnic_local *cp = dev->cnic_priv;
  318. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  319. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
  320. "still has devices registered\n", ulp_type);
  321. read_unlock(&cnic_dev_lock);
  322. goto out_unlock;
  323. }
  324. }
  325. read_unlock(&cnic_dev_lock);
  326. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
  327. mutex_unlock(&cnic_lock);
  328. synchronize_rcu();
  329. return 0;
  330. out_unlock:
  331. mutex_unlock(&cnic_lock);
  332. return -EINVAL;
  333. }
  334. static int cnic_start_hw(struct cnic_dev *);
  335. static void cnic_stop_hw(struct cnic_dev *);
  336. static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
  337. void *ulp_ctx)
  338. {
  339. struct cnic_local *cp = dev->cnic_priv;
  340. struct cnic_ulp_ops *ulp_ops;
  341. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  342. printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
  343. ulp_type);
  344. return -EINVAL;
  345. }
  346. mutex_lock(&cnic_lock);
  347. if (cnic_ulp_tbl[ulp_type] == NULL) {
  348. printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
  349. "has not been registered\n", ulp_type);
  350. mutex_unlock(&cnic_lock);
  351. return -EAGAIN;
  352. }
  353. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  354. printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
  355. "been registered to this device\n", ulp_type);
  356. mutex_unlock(&cnic_lock);
  357. return -EBUSY;
  358. }
  359. clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
  360. cp->ulp_handle[ulp_type] = ulp_ctx;
  361. ulp_ops = cnic_ulp_tbl[ulp_type];
  362. rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
  363. cnic_hold(dev);
  364. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  365. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
  366. ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
  367. mutex_unlock(&cnic_lock);
  368. return 0;
  369. }
  370. EXPORT_SYMBOL(cnic_register_driver);
  371. static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
  372. {
  373. struct cnic_local *cp = dev->cnic_priv;
  374. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  375. printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
  376. ulp_type);
  377. return -EINVAL;
  378. }
  379. mutex_lock(&cnic_lock);
  380. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  381. rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
  382. cnic_put(dev);
  383. } else {
  384. printk(KERN_ERR PFX "cnic_unregister_device: device not "
  385. "registered to this ulp type %d\n", ulp_type);
  386. mutex_unlock(&cnic_lock);
  387. return -EINVAL;
  388. }
  389. mutex_unlock(&cnic_lock);
  390. synchronize_rcu();
  391. return 0;
  392. }
  393. EXPORT_SYMBOL(cnic_unregister_driver);
  394. static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
  395. {
  396. id_tbl->start = start_id;
  397. id_tbl->max = size;
  398. id_tbl->next = 0;
  399. spin_lock_init(&id_tbl->lock);
  400. id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
  401. if (!id_tbl->table)
  402. return -ENOMEM;
  403. return 0;
  404. }
  405. static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
  406. {
  407. kfree(id_tbl->table);
  408. id_tbl->table = NULL;
  409. }
  410. static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
  411. {
  412. int ret = -1;
  413. id -= id_tbl->start;
  414. if (id >= id_tbl->max)
  415. return ret;
  416. spin_lock(&id_tbl->lock);
  417. if (!test_bit(id, id_tbl->table)) {
  418. set_bit(id, id_tbl->table);
  419. ret = 0;
  420. }
  421. spin_unlock(&id_tbl->lock);
  422. return ret;
  423. }
  424. /* Returns -1 if not successful */
  425. static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
  426. {
  427. u32 id;
  428. spin_lock(&id_tbl->lock);
  429. id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
  430. if (id >= id_tbl->max) {
  431. id = -1;
  432. if (id_tbl->next != 0) {
  433. id = find_first_zero_bit(id_tbl->table, id_tbl->next);
  434. if (id >= id_tbl->next)
  435. id = -1;
  436. }
  437. }
  438. if (id < id_tbl->max) {
  439. set_bit(id, id_tbl->table);
  440. id_tbl->next = (id + 1) & (id_tbl->max - 1);
  441. id += id_tbl->start;
  442. }
  443. spin_unlock(&id_tbl->lock);
  444. return id;
  445. }
  446. static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
  447. {
  448. if (id == -1)
  449. return;
  450. id -= id_tbl->start;
  451. if (id >= id_tbl->max)
  452. return;
  453. clear_bit(id, id_tbl->table);
  454. }
  455. static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
  456. {
  457. int i;
  458. if (!dma->pg_arr)
  459. return;
  460. for (i = 0; i < dma->num_pages; i++) {
  461. if (dma->pg_arr[i]) {
  462. pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
  463. dma->pg_arr[i], dma->pg_map_arr[i]);
  464. dma->pg_arr[i] = NULL;
  465. }
  466. }
  467. if (dma->pgtbl) {
  468. pci_free_consistent(dev->pcidev, dma->pgtbl_size,
  469. dma->pgtbl, dma->pgtbl_map);
  470. dma->pgtbl = NULL;
  471. }
  472. kfree(dma->pg_arr);
  473. dma->pg_arr = NULL;
  474. dma->num_pages = 0;
  475. }
  476. static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
  477. {
  478. int i;
  479. u32 *page_table = dma->pgtbl;
  480. for (i = 0; i < dma->num_pages; i++) {
  481. /* Each entry needs to be in big endian format. */
  482. *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
  483. page_table++;
  484. *page_table = (u32) dma->pg_map_arr[i];
  485. page_table++;
  486. }
  487. }
  488. static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
  489. int pages, int use_pg_tbl)
  490. {
  491. int i, size;
  492. struct cnic_local *cp = dev->cnic_priv;
  493. size = pages * (sizeof(void *) + sizeof(dma_addr_t));
  494. dma->pg_arr = kzalloc(size, GFP_ATOMIC);
  495. if (dma->pg_arr == NULL)
  496. return -ENOMEM;
  497. dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
  498. dma->num_pages = pages;
  499. for (i = 0; i < pages; i++) {
  500. dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
  501. BCM_PAGE_SIZE,
  502. &dma->pg_map_arr[i]);
  503. if (dma->pg_arr[i] == NULL)
  504. goto error;
  505. }
  506. if (!use_pg_tbl)
  507. return 0;
  508. dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
  509. ~(BCM_PAGE_SIZE - 1);
  510. dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
  511. &dma->pgtbl_map);
  512. if (dma->pgtbl == NULL)
  513. goto error;
  514. cp->setup_pgtbl(dev, dma);
  515. return 0;
  516. error:
  517. cnic_free_dma(dev, dma);
  518. return -ENOMEM;
  519. }
  520. static void cnic_free_resc(struct cnic_dev *dev)
  521. {
  522. struct cnic_local *cp = dev->cnic_priv;
  523. int i = 0;
  524. if (cp->cnic_uinfo) {
  525. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  526. while (cp->uio_dev != -1 && i < 15) {
  527. msleep(100);
  528. i++;
  529. }
  530. uio_unregister_device(cp->cnic_uinfo);
  531. kfree(cp->cnic_uinfo);
  532. cp->cnic_uinfo = NULL;
  533. }
  534. if (cp->l2_buf) {
  535. pci_free_consistent(dev->pcidev, cp->l2_buf_size,
  536. cp->l2_buf, cp->l2_buf_map);
  537. cp->l2_buf = NULL;
  538. }
  539. if (cp->l2_ring) {
  540. pci_free_consistent(dev->pcidev, cp->l2_ring_size,
  541. cp->l2_ring, cp->l2_ring_map);
  542. cp->l2_ring = NULL;
  543. }
  544. for (i = 0; i < cp->ctx_blks; i++) {
  545. if (cp->ctx_arr[i].ctx) {
  546. pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
  547. cp->ctx_arr[i].ctx,
  548. cp->ctx_arr[i].mapping);
  549. cp->ctx_arr[i].ctx = NULL;
  550. }
  551. }
  552. kfree(cp->ctx_arr);
  553. cp->ctx_arr = NULL;
  554. cp->ctx_blks = 0;
  555. cnic_free_dma(dev, &cp->gbl_buf_info);
  556. cnic_free_dma(dev, &cp->conn_buf_info);
  557. cnic_free_dma(dev, &cp->kwq_info);
  558. cnic_free_dma(dev, &cp->kcq_info);
  559. kfree(cp->iscsi_tbl);
  560. cp->iscsi_tbl = NULL;
  561. kfree(cp->ctx_tbl);
  562. cp->ctx_tbl = NULL;
  563. cnic_free_id_tbl(&cp->cid_tbl);
  564. }
  565. static int cnic_alloc_context(struct cnic_dev *dev)
  566. {
  567. struct cnic_local *cp = dev->cnic_priv;
  568. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  569. int i, k, arr_size;
  570. cp->ctx_blk_size = BCM_PAGE_SIZE;
  571. cp->cids_per_blk = BCM_PAGE_SIZE / 128;
  572. arr_size = BNX2_MAX_CID / cp->cids_per_blk *
  573. sizeof(struct cnic_ctx);
  574. cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
  575. if (cp->ctx_arr == NULL)
  576. return -ENOMEM;
  577. k = 0;
  578. for (i = 0; i < 2; i++) {
  579. u32 j, reg, off, lo, hi;
  580. if (i == 0)
  581. off = BNX2_PG_CTX_MAP;
  582. else
  583. off = BNX2_ISCSI_CTX_MAP;
  584. reg = cnic_reg_rd_ind(dev, off);
  585. lo = reg >> 16;
  586. hi = reg & 0xffff;
  587. for (j = lo; j < hi; j += cp->cids_per_blk, k++)
  588. cp->ctx_arr[k].cid = j;
  589. }
  590. cp->ctx_blks = k;
  591. if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
  592. cp->ctx_blks = 0;
  593. return -ENOMEM;
  594. }
  595. for (i = 0; i < cp->ctx_blks; i++) {
  596. cp->ctx_arr[i].ctx =
  597. pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
  598. &cp->ctx_arr[i].mapping);
  599. if (cp->ctx_arr[i].ctx == NULL)
  600. return -ENOMEM;
  601. }
  602. }
  603. return 0;
  604. }
  605. static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
  606. {
  607. struct cnic_local *cp = dev->cnic_priv;
  608. struct uio_info *uinfo;
  609. int ret;
  610. ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
  611. if (ret)
  612. goto error;
  613. cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
  614. ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
  615. if (ret)
  616. goto error;
  617. cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
  618. ret = cnic_alloc_context(dev);
  619. if (ret)
  620. goto error;
  621. cp->l2_ring_size = 2 * BCM_PAGE_SIZE;
  622. cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
  623. &cp->l2_ring_map);
  624. if (!cp->l2_ring)
  625. goto error;
  626. cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
  627. cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
  628. cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
  629. &cp->l2_buf_map);
  630. if (!cp->l2_buf)
  631. goto error;
  632. uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
  633. if (!uinfo)
  634. goto error;
  635. uinfo->mem[0].addr = dev->netdev->base_addr;
  636. uinfo->mem[0].internal_addr = dev->regview;
  637. uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
  638. uinfo->mem[0].memtype = UIO_MEM_PHYS;
  639. uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
  640. if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
  641. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
  642. else
  643. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
  644. uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
  645. uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
  646. uinfo->mem[2].size = cp->l2_ring_size;
  647. uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
  648. uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
  649. uinfo->mem[3].size = cp->l2_buf_size;
  650. uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
  651. uinfo->name = "bnx2_cnic";
  652. uinfo->version = CNIC_MODULE_VERSION;
  653. uinfo->irq = UIO_IRQ_CUSTOM;
  654. uinfo->open = cnic_uio_open;
  655. uinfo->release = cnic_uio_close;
  656. uinfo->priv = dev;
  657. ret = uio_register_device(&dev->pcidev->dev, uinfo);
  658. if (ret) {
  659. kfree(uinfo);
  660. goto error;
  661. }
  662. cp->cnic_uinfo = uinfo;
  663. return 0;
  664. error:
  665. cnic_free_resc(dev);
  666. return ret;
  667. }
  668. static inline u32 cnic_kwq_avail(struct cnic_local *cp)
  669. {
  670. return cp->max_kwq_idx -
  671. ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
  672. }
  673. static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
  674. u32 num_wqes)
  675. {
  676. struct cnic_local *cp = dev->cnic_priv;
  677. struct kwqe *prod_qe;
  678. u16 prod, sw_prod, i;
  679. if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
  680. return -EAGAIN; /* bnx2 is down */
  681. spin_lock_bh(&cp->cnic_ulp_lock);
  682. if (num_wqes > cnic_kwq_avail(cp) &&
  683. !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
  684. spin_unlock_bh(&cp->cnic_ulp_lock);
  685. return -EAGAIN;
  686. }
  687. cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
  688. prod = cp->kwq_prod_idx;
  689. sw_prod = prod & MAX_KWQ_IDX;
  690. for (i = 0; i < num_wqes; i++) {
  691. prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
  692. memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
  693. prod++;
  694. sw_prod = prod & MAX_KWQ_IDX;
  695. }
  696. cp->kwq_prod_idx = prod;
  697. CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
  698. spin_unlock_bh(&cp->cnic_ulp_lock);
  699. return 0;
  700. }
  701. static void service_kcqes(struct cnic_dev *dev, int num_cqes)
  702. {
  703. struct cnic_local *cp = dev->cnic_priv;
  704. int i, j;
  705. i = 0;
  706. j = 1;
  707. while (num_cqes) {
  708. struct cnic_ulp_ops *ulp_ops;
  709. int ulp_type;
  710. u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
  711. u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
  712. if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
  713. cnic_kwq_completion(dev, 1);
  714. while (j < num_cqes) {
  715. u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
  716. if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
  717. break;
  718. if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
  719. cnic_kwq_completion(dev, 1);
  720. j++;
  721. }
  722. if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
  723. ulp_type = CNIC_ULP_RDMA;
  724. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
  725. ulp_type = CNIC_ULP_ISCSI;
  726. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
  727. ulp_type = CNIC_ULP_L4;
  728. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
  729. goto end;
  730. else {
  731. printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
  732. dev->netdev->name, kcqe_op_flag);
  733. goto end;
  734. }
  735. rcu_read_lock();
  736. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  737. if (likely(ulp_ops)) {
  738. ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
  739. cp->completed_kcq + i, j);
  740. }
  741. rcu_read_unlock();
  742. end:
  743. num_cqes -= j;
  744. i += j;
  745. j = 1;
  746. }
  747. return;
  748. }
  749. static u16 cnic_bnx2_next_idx(u16 idx)
  750. {
  751. return idx + 1;
  752. }
  753. static u16 cnic_bnx2_hw_idx(u16 idx)
  754. {
  755. return idx;
  756. }
  757. static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
  758. {
  759. struct cnic_local *cp = dev->cnic_priv;
  760. u16 i, ri, last;
  761. struct kcqe *kcqe;
  762. int kcqe_cnt = 0, last_cnt = 0;
  763. i = ri = last = *sw_prod;
  764. ri &= MAX_KCQ_IDX;
  765. while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
  766. kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
  767. cp->completed_kcq[kcqe_cnt++] = kcqe;
  768. i = cp->next_idx(i);
  769. ri = i & MAX_KCQ_IDX;
  770. if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
  771. last_cnt = kcqe_cnt;
  772. last = i;
  773. }
  774. }
  775. *sw_prod = last;
  776. return last_cnt;
  777. }
  778. static void cnic_chk_bnx2_pkt_rings(struct cnic_local *cp)
  779. {
  780. u16 rx_cons = *cp->rx_cons_ptr;
  781. u16 tx_cons = *cp->tx_cons_ptr;
  782. if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
  783. cp->tx_cons = tx_cons;
  784. cp->rx_cons = rx_cons;
  785. uio_event_notify(cp->cnic_uinfo);
  786. }
  787. }
  788. static int cnic_service_bnx2(void *data, void *status_blk)
  789. {
  790. struct cnic_dev *dev = data;
  791. struct status_block *sblk = status_blk;
  792. struct cnic_local *cp = dev->cnic_priv;
  793. u32 status_idx = sblk->status_idx;
  794. u16 hw_prod, sw_prod;
  795. int kcqe_cnt;
  796. if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  797. return status_idx;
  798. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  799. hw_prod = sblk->status_completion_producer_index;
  800. sw_prod = cp->kcq_prod_idx;
  801. while (sw_prod != hw_prod) {
  802. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  803. if (kcqe_cnt == 0)
  804. goto done;
  805. service_kcqes(dev, kcqe_cnt);
  806. /* Tell compiler that status_blk fields can change. */
  807. barrier();
  808. if (status_idx != sblk->status_idx) {
  809. status_idx = sblk->status_idx;
  810. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  811. hw_prod = sblk->status_completion_producer_index;
  812. } else
  813. break;
  814. }
  815. done:
  816. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  817. cp->kcq_prod_idx = sw_prod;
  818. cnic_chk_bnx2_pkt_rings(cp);
  819. return status_idx;
  820. }
  821. static void cnic_service_bnx2_msix(unsigned long data)
  822. {
  823. struct cnic_dev *dev = (struct cnic_dev *) data;
  824. struct cnic_local *cp = dev->cnic_priv;
  825. struct status_block_msix *status_blk = cp->bnx2_status_blk;
  826. u32 status_idx = status_blk->status_idx;
  827. u16 hw_prod, sw_prod;
  828. int kcqe_cnt;
  829. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  830. hw_prod = status_blk->status_completion_producer_index;
  831. sw_prod = cp->kcq_prod_idx;
  832. while (sw_prod != hw_prod) {
  833. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  834. if (kcqe_cnt == 0)
  835. goto done;
  836. service_kcqes(dev, kcqe_cnt);
  837. /* Tell compiler that status_blk fields can change. */
  838. barrier();
  839. if (status_idx != status_blk->status_idx) {
  840. status_idx = status_blk->status_idx;
  841. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  842. hw_prod = status_blk->status_completion_producer_index;
  843. } else
  844. break;
  845. }
  846. done:
  847. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  848. cp->kcq_prod_idx = sw_prod;
  849. cnic_chk_bnx2_pkt_rings(cp);
  850. cp->last_status_idx = status_idx;
  851. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  852. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  853. }
  854. static irqreturn_t cnic_irq(int irq, void *dev_instance)
  855. {
  856. struct cnic_dev *dev = dev_instance;
  857. struct cnic_local *cp = dev->cnic_priv;
  858. u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
  859. if (cp->ack_int)
  860. cp->ack_int(dev);
  861. prefetch(cp->status_blk);
  862. prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
  863. if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  864. tasklet_schedule(&cp->cnic_irq_task);
  865. return IRQ_HANDLED;
  866. }
  867. static void cnic_ulp_stop(struct cnic_dev *dev)
  868. {
  869. struct cnic_local *cp = dev->cnic_priv;
  870. int if_type;
  871. rcu_read_lock();
  872. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  873. struct cnic_ulp_ops *ulp_ops;
  874. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  875. if (!ulp_ops)
  876. continue;
  877. if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  878. ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
  879. }
  880. rcu_read_unlock();
  881. }
  882. static void cnic_ulp_start(struct cnic_dev *dev)
  883. {
  884. struct cnic_local *cp = dev->cnic_priv;
  885. int if_type;
  886. rcu_read_lock();
  887. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  888. struct cnic_ulp_ops *ulp_ops;
  889. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  890. if (!ulp_ops || !ulp_ops->cnic_start)
  891. continue;
  892. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  893. ulp_ops->cnic_start(cp->ulp_handle[if_type]);
  894. }
  895. rcu_read_unlock();
  896. }
  897. static int cnic_ctl(void *data, struct cnic_ctl_info *info)
  898. {
  899. struct cnic_dev *dev = data;
  900. switch (info->cmd) {
  901. case CNIC_CTL_STOP_CMD:
  902. cnic_hold(dev);
  903. mutex_lock(&cnic_lock);
  904. cnic_ulp_stop(dev);
  905. cnic_stop_hw(dev);
  906. mutex_unlock(&cnic_lock);
  907. cnic_put(dev);
  908. break;
  909. case CNIC_CTL_START_CMD:
  910. cnic_hold(dev);
  911. mutex_lock(&cnic_lock);
  912. if (!cnic_start_hw(dev))
  913. cnic_ulp_start(dev);
  914. mutex_unlock(&cnic_lock);
  915. cnic_put(dev);
  916. break;
  917. default:
  918. return -EINVAL;
  919. }
  920. return 0;
  921. }
  922. static void cnic_ulp_init(struct cnic_dev *dev)
  923. {
  924. int i;
  925. struct cnic_local *cp = dev->cnic_priv;
  926. rcu_read_lock();
  927. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  928. struct cnic_ulp_ops *ulp_ops;
  929. ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
  930. if (!ulp_ops || !ulp_ops->cnic_init)
  931. continue;
  932. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  933. ulp_ops->cnic_init(dev);
  934. }
  935. rcu_read_unlock();
  936. }
  937. static void cnic_ulp_exit(struct cnic_dev *dev)
  938. {
  939. int i;
  940. struct cnic_local *cp = dev->cnic_priv;
  941. rcu_read_lock();
  942. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  943. struct cnic_ulp_ops *ulp_ops;
  944. ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
  945. if (!ulp_ops || !ulp_ops->cnic_exit)
  946. continue;
  947. if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  948. ulp_ops->cnic_exit(dev);
  949. }
  950. rcu_read_unlock();
  951. }
  952. static int cnic_cm_offload_pg(struct cnic_sock *csk)
  953. {
  954. struct cnic_dev *dev = csk->dev;
  955. struct l4_kwq_offload_pg *l4kwqe;
  956. struct kwqe *wqes[1];
  957. l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
  958. memset(l4kwqe, 0, sizeof(*l4kwqe));
  959. wqes[0] = (struct kwqe *) l4kwqe;
  960. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
  961. l4kwqe->flags =
  962. L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
  963. l4kwqe->l2hdr_nbytes = ETH_HLEN;
  964. l4kwqe->da0 = csk->ha[0];
  965. l4kwqe->da1 = csk->ha[1];
  966. l4kwqe->da2 = csk->ha[2];
  967. l4kwqe->da3 = csk->ha[3];
  968. l4kwqe->da4 = csk->ha[4];
  969. l4kwqe->da5 = csk->ha[5];
  970. l4kwqe->sa0 = dev->mac_addr[0];
  971. l4kwqe->sa1 = dev->mac_addr[1];
  972. l4kwqe->sa2 = dev->mac_addr[2];
  973. l4kwqe->sa3 = dev->mac_addr[3];
  974. l4kwqe->sa4 = dev->mac_addr[4];
  975. l4kwqe->sa5 = dev->mac_addr[5];
  976. l4kwqe->etype = ETH_P_IP;
  977. l4kwqe->ipid_count = DEF_IPID_COUNT;
  978. l4kwqe->host_opaque = csk->l5_cid;
  979. if (csk->vlan_id) {
  980. l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
  981. l4kwqe->vlan_tag = csk->vlan_id;
  982. l4kwqe->l2hdr_nbytes += 4;
  983. }
  984. return dev->submit_kwqes(dev, wqes, 1);
  985. }
  986. static int cnic_cm_update_pg(struct cnic_sock *csk)
  987. {
  988. struct cnic_dev *dev = csk->dev;
  989. struct l4_kwq_update_pg *l4kwqe;
  990. struct kwqe *wqes[1];
  991. l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
  992. memset(l4kwqe, 0, sizeof(*l4kwqe));
  993. wqes[0] = (struct kwqe *) l4kwqe;
  994. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
  995. l4kwqe->flags =
  996. L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
  997. l4kwqe->pg_cid = csk->pg_cid;
  998. l4kwqe->da0 = csk->ha[0];
  999. l4kwqe->da1 = csk->ha[1];
  1000. l4kwqe->da2 = csk->ha[2];
  1001. l4kwqe->da3 = csk->ha[3];
  1002. l4kwqe->da4 = csk->ha[4];
  1003. l4kwqe->da5 = csk->ha[5];
  1004. l4kwqe->pg_host_opaque = csk->l5_cid;
  1005. l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
  1006. return dev->submit_kwqes(dev, wqes, 1);
  1007. }
  1008. static int cnic_cm_upload_pg(struct cnic_sock *csk)
  1009. {
  1010. struct cnic_dev *dev = csk->dev;
  1011. struct l4_kwq_upload *l4kwqe;
  1012. struct kwqe *wqes[1];
  1013. l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
  1014. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1015. wqes[0] = (struct kwqe *) l4kwqe;
  1016. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
  1017. l4kwqe->flags =
  1018. L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
  1019. l4kwqe->cid = csk->pg_cid;
  1020. return dev->submit_kwqes(dev, wqes, 1);
  1021. }
  1022. static int cnic_cm_conn_req(struct cnic_sock *csk)
  1023. {
  1024. struct cnic_dev *dev = csk->dev;
  1025. struct l4_kwq_connect_req1 *l4kwqe1;
  1026. struct l4_kwq_connect_req2 *l4kwqe2;
  1027. struct l4_kwq_connect_req3 *l4kwqe3;
  1028. struct kwqe *wqes[3];
  1029. u8 tcp_flags = 0;
  1030. int num_wqes = 2;
  1031. l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
  1032. l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
  1033. l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
  1034. memset(l4kwqe1, 0, sizeof(*l4kwqe1));
  1035. memset(l4kwqe2, 0, sizeof(*l4kwqe2));
  1036. memset(l4kwqe3, 0, sizeof(*l4kwqe3));
  1037. l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
  1038. l4kwqe3->flags =
  1039. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
  1040. l4kwqe3->ka_timeout = csk->ka_timeout;
  1041. l4kwqe3->ka_interval = csk->ka_interval;
  1042. l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
  1043. l4kwqe3->tos = csk->tos;
  1044. l4kwqe3->ttl = csk->ttl;
  1045. l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
  1046. l4kwqe3->pmtu = csk->mtu;
  1047. l4kwqe3->rcv_buf = csk->rcv_buf;
  1048. l4kwqe3->snd_buf = csk->snd_buf;
  1049. l4kwqe3->seed = csk->seed;
  1050. wqes[0] = (struct kwqe *) l4kwqe1;
  1051. if (test_bit(SK_F_IPV6, &csk->flags)) {
  1052. wqes[1] = (struct kwqe *) l4kwqe2;
  1053. wqes[2] = (struct kwqe *) l4kwqe3;
  1054. num_wqes = 3;
  1055. l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
  1056. l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
  1057. l4kwqe2->flags =
  1058. L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
  1059. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
  1060. l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
  1061. l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
  1062. l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
  1063. l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
  1064. l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
  1065. l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
  1066. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
  1067. sizeof(struct tcphdr);
  1068. } else {
  1069. wqes[1] = (struct kwqe *) l4kwqe3;
  1070. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
  1071. sizeof(struct tcphdr);
  1072. }
  1073. l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
  1074. l4kwqe1->flags =
  1075. (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
  1076. L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
  1077. l4kwqe1->cid = csk->cid;
  1078. l4kwqe1->pg_cid = csk->pg_cid;
  1079. l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
  1080. l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
  1081. l4kwqe1->src_port = be16_to_cpu(csk->src_port);
  1082. l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
  1083. if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
  1084. tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
  1085. if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
  1086. tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
  1087. if (csk->tcp_flags & SK_TCP_NAGLE)
  1088. tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
  1089. if (csk->tcp_flags & SK_TCP_TIMESTAMP)
  1090. tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
  1091. if (csk->tcp_flags & SK_TCP_SACK)
  1092. tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
  1093. if (csk->tcp_flags & SK_TCP_SEG_SCALING)
  1094. tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
  1095. l4kwqe1->tcp_flags = tcp_flags;
  1096. return dev->submit_kwqes(dev, wqes, num_wqes);
  1097. }
  1098. static int cnic_cm_close_req(struct cnic_sock *csk)
  1099. {
  1100. struct cnic_dev *dev = csk->dev;
  1101. struct l4_kwq_close_req *l4kwqe;
  1102. struct kwqe *wqes[1];
  1103. l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
  1104. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1105. wqes[0] = (struct kwqe *) l4kwqe;
  1106. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
  1107. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
  1108. l4kwqe->cid = csk->cid;
  1109. return dev->submit_kwqes(dev, wqes, 1);
  1110. }
  1111. static int cnic_cm_abort_req(struct cnic_sock *csk)
  1112. {
  1113. struct cnic_dev *dev = csk->dev;
  1114. struct l4_kwq_reset_req *l4kwqe;
  1115. struct kwqe *wqes[1];
  1116. l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
  1117. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1118. wqes[0] = (struct kwqe *) l4kwqe;
  1119. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
  1120. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
  1121. l4kwqe->cid = csk->cid;
  1122. return dev->submit_kwqes(dev, wqes, 1);
  1123. }
  1124. static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
  1125. u32 l5_cid, struct cnic_sock **csk, void *context)
  1126. {
  1127. struct cnic_local *cp = dev->cnic_priv;
  1128. struct cnic_sock *csk1;
  1129. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1130. return -EINVAL;
  1131. csk1 = &cp->csk_tbl[l5_cid];
  1132. if (atomic_read(&csk1->ref_count))
  1133. return -EAGAIN;
  1134. if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
  1135. return -EBUSY;
  1136. csk1->dev = dev;
  1137. csk1->cid = cid;
  1138. csk1->l5_cid = l5_cid;
  1139. csk1->ulp_type = ulp_type;
  1140. csk1->context = context;
  1141. csk1->ka_timeout = DEF_KA_TIMEOUT;
  1142. csk1->ka_interval = DEF_KA_INTERVAL;
  1143. csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
  1144. csk1->tos = DEF_TOS;
  1145. csk1->ttl = DEF_TTL;
  1146. csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
  1147. csk1->rcv_buf = DEF_RCV_BUF;
  1148. csk1->snd_buf = DEF_SND_BUF;
  1149. csk1->seed = DEF_SEED;
  1150. *csk = csk1;
  1151. return 0;
  1152. }
  1153. static void cnic_cm_cleanup(struct cnic_sock *csk)
  1154. {
  1155. if (csk->src_port) {
  1156. struct cnic_dev *dev = csk->dev;
  1157. struct cnic_local *cp = dev->cnic_priv;
  1158. cnic_free_id(&cp->csk_port_tbl, csk->src_port);
  1159. csk->src_port = 0;
  1160. }
  1161. }
  1162. static void cnic_close_conn(struct cnic_sock *csk)
  1163. {
  1164. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
  1165. cnic_cm_upload_pg(csk);
  1166. clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1167. }
  1168. cnic_cm_cleanup(csk);
  1169. }
  1170. static int cnic_cm_destroy(struct cnic_sock *csk)
  1171. {
  1172. if (!cnic_in_use(csk))
  1173. return -EINVAL;
  1174. csk_hold(csk);
  1175. clear_bit(SK_F_INUSE, &csk->flags);
  1176. smp_mb__after_clear_bit();
  1177. while (atomic_read(&csk->ref_count) != 1)
  1178. msleep(1);
  1179. cnic_cm_cleanup(csk);
  1180. csk->flags = 0;
  1181. csk_put(csk);
  1182. return 0;
  1183. }
  1184. static inline u16 cnic_get_vlan(struct net_device *dev,
  1185. struct net_device **vlan_dev)
  1186. {
  1187. if (dev->priv_flags & IFF_802_1Q_VLAN) {
  1188. *vlan_dev = vlan_dev_real_dev(dev);
  1189. return vlan_dev_vlan_id(dev);
  1190. }
  1191. *vlan_dev = dev;
  1192. return 0;
  1193. }
  1194. static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
  1195. struct dst_entry **dst)
  1196. {
  1197. #if defined(CONFIG_INET)
  1198. struct flowi fl;
  1199. int err;
  1200. struct rtable *rt;
  1201. memset(&fl, 0, sizeof(fl));
  1202. fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
  1203. err = ip_route_output_key(&init_net, &rt, &fl);
  1204. if (!err)
  1205. *dst = &rt->u.dst;
  1206. return err;
  1207. #else
  1208. return -ENETUNREACH;
  1209. #endif
  1210. }
  1211. static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
  1212. struct dst_entry **dst)
  1213. {
  1214. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1215. struct flowi fl;
  1216. memset(&fl, 0, sizeof(fl));
  1217. ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
  1218. if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
  1219. fl.oif = dst_addr->sin6_scope_id;
  1220. *dst = ip6_route_output(&init_net, NULL, &fl);
  1221. if (*dst)
  1222. return 0;
  1223. #endif
  1224. return -ENETUNREACH;
  1225. }
  1226. static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
  1227. int ulp_type)
  1228. {
  1229. struct cnic_dev *dev = NULL;
  1230. struct dst_entry *dst;
  1231. struct net_device *netdev = NULL;
  1232. int err = -ENETUNREACH;
  1233. if (dst_addr->sin_family == AF_INET)
  1234. err = cnic_get_v4_route(dst_addr, &dst);
  1235. else if (dst_addr->sin_family == AF_INET6) {
  1236. struct sockaddr_in6 *dst_addr6 =
  1237. (struct sockaddr_in6 *) dst_addr;
  1238. err = cnic_get_v6_route(dst_addr6, &dst);
  1239. } else
  1240. return NULL;
  1241. if (err)
  1242. return NULL;
  1243. if (!dst->dev)
  1244. goto done;
  1245. cnic_get_vlan(dst->dev, &netdev);
  1246. dev = cnic_from_netdev(netdev);
  1247. done:
  1248. dst_release(dst);
  1249. if (dev)
  1250. cnic_put(dev);
  1251. return dev;
  1252. }
  1253. static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1254. {
  1255. struct cnic_dev *dev = csk->dev;
  1256. struct cnic_local *cp = dev->cnic_priv;
  1257. return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
  1258. }
  1259. static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1260. {
  1261. struct cnic_dev *dev = csk->dev;
  1262. struct cnic_local *cp = dev->cnic_priv;
  1263. int is_v6, err, rc = -ENETUNREACH;
  1264. struct dst_entry *dst;
  1265. struct net_device *realdev;
  1266. u32 local_port;
  1267. if (saddr->local.v6.sin6_family == AF_INET6 &&
  1268. saddr->remote.v6.sin6_family == AF_INET6)
  1269. is_v6 = 1;
  1270. else if (saddr->local.v4.sin_family == AF_INET &&
  1271. saddr->remote.v4.sin_family == AF_INET)
  1272. is_v6 = 0;
  1273. else
  1274. return -EINVAL;
  1275. clear_bit(SK_F_IPV6, &csk->flags);
  1276. if (is_v6) {
  1277. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1278. set_bit(SK_F_IPV6, &csk->flags);
  1279. err = cnic_get_v6_route(&saddr->remote.v6, &dst);
  1280. if (err)
  1281. return err;
  1282. if (!dst || dst->error || !dst->dev)
  1283. goto err_out;
  1284. memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
  1285. sizeof(struct in6_addr));
  1286. csk->dst_port = saddr->remote.v6.sin6_port;
  1287. local_port = saddr->local.v6.sin6_port;
  1288. #else
  1289. return rc;
  1290. #endif
  1291. } else {
  1292. err = cnic_get_v4_route(&saddr->remote.v4, &dst);
  1293. if (err)
  1294. return err;
  1295. if (!dst || dst->error || !dst->dev)
  1296. goto err_out;
  1297. csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
  1298. csk->dst_port = saddr->remote.v4.sin_port;
  1299. local_port = saddr->local.v4.sin_port;
  1300. }
  1301. csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
  1302. if (realdev != dev->netdev)
  1303. goto err_out;
  1304. if (local_port >= CNIC_LOCAL_PORT_MIN &&
  1305. local_port < CNIC_LOCAL_PORT_MAX) {
  1306. if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
  1307. local_port = 0;
  1308. } else
  1309. local_port = 0;
  1310. if (!local_port) {
  1311. local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
  1312. if (local_port == -1) {
  1313. rc = -ENOMEM;
  1314. goto err_out;
  1315. }
  1316. }
  1317. csk->src_port = local_port;
  1318. csk->mtu = dst_mtu(dst);
  1319. rc = 0;
  1320. err_out:
  1321. dst_release(dst);
  1322. return rc;
  1323. }
  1324. static void cnic_init_csk_state(struct cnic_sock *csk)
  1325. {
  1326. csk->state = 0;
  1327. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1328. clear_bit(SK_F_CLOSING, &csk->flags);
  1329. }
  1330. static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1331. {
  1332. int err = 0;
  1333. if (!cnic_in_use(csk))
  1334. return -EINVAL;
  1335. if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
  1336. return -EINVAL;
  1337. cnic_init_csk_state(csk);
  1338. err = cnic_get_route(csk, saddr);
  1339. if (err)
  1340. goto err_out;
  1341. err = cnic_resolve_addr(csk, saddr);
  1342. if (!err)
  1343. return 0;
  1344. err_out:
  1345. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1346. return err;
  1347. }
  1348. static int cnic_cm_abort(struct cnic_sock *csk)
  1349. {
  1350. struct cnic_local *cp = csk->dev->cnic_priv;
  1351. u32 opcode;
  1352. if (!cnic_in_use(csk))
  1353. return -EINVAL;
  1354. if (cnic_abort_prep(csk))
  1355. return cnic_cm_abort_req(csk);
  1356. /* Getting here means that we haven't started connect, or
  1357. * connect was not successful.
  1358. */
  1359. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  1360. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1361. opcode = csk->state;
  1362. else
  1363. opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
  1364. cp->close_conn(csk, opcode);
  1365. return 0;
  1366. }
  1367. static int cnic_cm_close(struct cnic_sock *csk)
  1368. {
  1369. if (!cnic_in_use(csk))
  1370. return -EINVAL;
  1371. if (cnic_close_prep(csk)) {
  1372. csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
  1373. return cnic_cm_close_req(csk);
  1374. }
  1375. return 0;
  1376. }
  1377. static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
  1378. u8 opcode)
  1379. {
  1380. struct cnic_ulp_ops *ulp_ops;
  1381. int ulp_type = csk->ulp_type;
  1382. rcu_read_lock();
  1383. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  1384. if (ulp_ops) {
  1385. if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
  1386. ulp_ops->cm_connect_complete(csk);
  1387. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
  1388. ulp_ops->cm_close_complete(csk);
  1389. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
  1390. ulp_ops->cm_remote_abort(csk);
  1391. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
  1392. ulp_ops->cm_abort_complete(csk);
  1393. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
  1394. ulp_ops->cm_remote_close(csk);
  1395. }
  1396. rcu_read_unlock();
  1397. }
  1398. static int cnic_cm_set_pg(struct cnic_sock *csk)
  1399. {
  1400. if (cnic_offld_prep(csk)) {
  1401. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1402. cnic_cm_update_pg(csk);
  1403. else
  1404. cnic_cm_offload_pg(csk);
  1405. }
  1406. return 0;
  1407. }
  1408. static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
  1409. {
  1410. struct cnic_local *cp = dev->cnic_priv;
  1411. u32 l5_cid = kcqe->pg_host_opaque;
  1412. u8 opcode = kcqe->op_code;
  1413. struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
  1414. csk_hold(csk);
  1415. if (!cnic_in_use(csk))
  1416. goto done;
  1417. if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1418. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1419. goto done;
  1420. }
  1421. csk->pg_cid = kcqe->pg_cid;
  1422. set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1423. cnic_cm_conn_req(csk);
  1424. done:
  1425. csk_put(csk);
  1426. }
  1427. static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
  1428. {
  1429. struct cnic_local *cp = dev->cnic_priv;
  1430. struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
  1431. u8 opcode = l4kcqe->op_code;
  1432. u32 l5_cid;
  1433. struct cnic_sock *csk;
  1434. if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
  1435. opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1436. cnic_cm_process_offld_pg(dev, l4kcqe);
  1437. return;
  1438. }
  1439. l5_cid = l4kcqe->conn_id;
  1440. if (opcode & 0x80)
  1441. l5_cid = l4kcqe->cid;
  1442. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1443. return;
  1444. csk = &cp->csk_tbl[l5_cid];
  1445. csk_hold(csk);
  1446. if (!cnic_in_use(csk)) {
  1447. csk_put(csk);
  1448. return;
  1449. }
  1450. switch (opcode) {
  1451. case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
  1452. if (l4kcqe->status == 0)
  1453. set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
  1454. smp_mb__before_clear_bit();
  1455. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1456. cnic_cm_upcall(cp, csk, opcode);
  1457. break;
  1458. case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
  1459. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
  1460. csk->state = opcode;
  1461. /* fall through */
  1462. case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
  1463. case L4_KCQE_OPCODE_VALUE_RESET_COMP:
  1464. cp->close_conn(csk, opcode);
  1465. break;
  1466. case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
  1467. cnic_cm_upcall(cp, csk, opcode);
  1468. break;
  1469. }
  1470. csk_put(csk);
  1471. }
  1472. static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
  1473. {
  1474. struct cnic_dev *dev = data;
  1475. int i;
  1476. for (i = 0; i < num; i++)
  1477. cnic_cm_process_kcqe(dev, kcqe[i]);
  1478. }
  1479. static struct cnic_ulp_ops cm_ulp_ops = {
  1480. .indicate_kcqes = cnic_cm_indicate_kcqe,
  1481. };
  1482. static void cnic_cm_free_mem(struct cnic_dev *dev)
  1483. {
  1484. struct cnic_local *cp = dev->cnic_priv;
  1485. kfree(cp->csk_tbl);
  1486. cp->csk_tbl = NULL;
  1487. cnic_free_id_tbl(&cp->csk_port_tbl);
  1488. }
  1489. static int cnic_cm_alloc_mem(struct cnic_dev *dev)
  1490. {
  1491. struct cnic_local *cp = dev->cnic_priv;
  1492. cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
  1493. GFP_KERNEL);
  1494. if (!cp->csk_tbl)
  1495. return -ENOMEM;
  1496. if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
  1497. CNIC_LOCAL_PORT_MIN)) {
  1498. cnic_cm_free_mem(dev);
  1499. return -ENOMEM;
  1500. }
  1501. return 0;
  1502. }
  1503. static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
  1504. {
  1505. if ((opcode == csk->state) ||
  1506. (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
  1507. csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
  1508. if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
  1509. return 1;
  1510. }
  1511. return 0;
  1512. }
  1513. static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
  1514. {
  1515. struct cnic_dev *dev = csk->dev;
  1516. struct cnic_local *cp = dev->cnic_priv;
  1517. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1518. if (cnic_ready_to_close(csk, opcode)) {
  1519. cnic_close_conn(csk);
  1520. cnic_cm_upcall(cp, csk, opcode);
  1521. }
  1522. }
  1523. static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
  1524. {
  1525. }
  1526. static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
  1527. {
  1528. u32 seed;
  1529. get_random_bytes(&seed, 4);
  1530. cnic_ctx_wr(dev, 45, 0, seed);
  1531. return 0;
  1532. }
  1533. static int cnic_cm_open(struct cnic_dev *dev)
  1534. {
  1535. struct cnic_local *cp = dev->cnic_priv;
  1536. int err;
  1537. err = cnic_cm_alloc_mem(dev);
  1538. if (err)
  1539. return err;
  1540. err = cp->start_cm(dev);
  1541. if (err)
  1542. goto err_out;
  1543. dev->cm_create = cnic_cm_create;
  1544. dev->cm_destroy = cnic_cm_destroy;
  1545. dev->cm_connect = cnic_cm_connect;
  1546. dev->cm_abort = cnic_cm_abort;
  1547. dev->cm_close = cnic_cm_close;
  1548. dev->cm_select_dev = cnic_cm_select_dev;
  1549. cp->ulp_handle[CNIC_ULP_L4] = dev;
  1550. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
  1551. return 0;
  1552. err_out:
  1553. cnic_cm_free_mem(dev);
  1554. return err;
  1555. }
  1556. static int cnic_cm_shutdown(struct cnic_dev *dev)
  1557. {
  1558. struct cnic_local *cp = dev->cnic_priv;
  1559. int i;
  1560. cp->stop_cm(dev);
  1561. if (!cp->csk_tbl)
  1562. return 0;
  1563. for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
  1564. struct cnic_sock *csk = &cp->csk_tbl[i];
  1565. clear_bit(SK_F_INUSE, &csk->flags);
  1566. cnic_cm_cleanup(csk);
  1567. }
  1568. cnic_cm_free_mem(dev);
  1569. return 0;
  1570. }
  1571. static void cnic_init_context(struct cnic_dev *dev, u32 cid)
  1572. {
  1573. struct cnic_local *cp = dev->cnic_priv;
  1574. u32 cid_addr;
  1575. int i;
  1576. if (CHIP_NUM(cp) == CHIP_NUM_5709)
  1577. return;
  1578. cid_addr = GET_CID_ADDR(cid);
  1579. for (i = 0; i < CTX_SIZE; i += 4)
  1580. cnic_ctx_wr(dev, cid_addr, i, 0);
  1581. }
  1582. static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
  1583. {
  1584. struct cnic_local *cp = dev->cnic_priv;
  1585. int ret = 0, i;
  1586. u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
  1587. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1588. return 0;
  1589. for (i = 0; i < cp->ctx_blks; i++) {
  1590. int j;
  1591. u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
  1592. u32 val;
  1593. memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
  1594. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
  1595. (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
  1596. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
  1597. (u64) cp->ctx_arr[i].mapping >> 32);
  1598. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
  1599. BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
  1600. for (j = 0; j < 10; j++) {
  1601. val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
  1602. if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
  1603. break;
  1604. udelay(5);
  1605. }
  1606. if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
  1607. ret = -EBUSY;
  1608. break;
  1609. }
  1610. }
  1611. return ret;
  1612. }
  1613. static void cnic_free_irq(struct cnic_dev *dev)
  1614. {
  1615. struct cnic_local *cp = dev->cnic_priv;
  1616. struct cnic_eth_dev *ethdev = cp->ethdev;
  1617. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1618. cp->disable_int_sync(dev);
  1619. tasklet_disable(&cp->cnic_irq_task);
  1620. free_irq(ethdev->irq_arr[0].vector, dev);
  1621. }
  1622. }
  1623. static int cnic_init_bnx2_irq(struct cnic_dev *dev)
  1624. {
  1625. struct cnic_local *cp = dev->cnic_priv;
  1626. struct cnic_eth_dev *ethdev = cp->ethdev;
  1627. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1628. int err, i = 0;
  1629. int sblk_num = cp->status_blk_num;
  1630. u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
  1631. BNX2_HC_SB_CONFIG_1;
  1632. CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
  1633. CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
  1634. CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
  1635. CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
  1636. cp->bnx2_status_blk = cp->status_blk;
  1637. cp->last_status_idx = cp->bnx2_status_blk->status_idx;
  1638. tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2_msix,
  1639. (unsigned long) dev);
  1640. err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
  1641. "cnic", dev);
  1642. if (err) {
  1643. tasklet_disable(&cp->cnic_irq_task);
  1644. return err;
  1645. }
  1646. while (cp->bnx2_status_blk->status_completion_producer_index &&
  1647. i < 10) {
  1648. CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
  1649. 1 << (11 + sblk_num));
  1650. udelay(10);
  1651. i++;
  1652. barrier();
  1653. }
  1654. if (cp->bnx2_status_blk->status_completion_producer_index) {
  1655. cnic_free_irq(dev);
  1656. goto failed;
  1657. }
  1658. } else {
  1659. struct status_block *sblk = cp->status_blk;
  1660. u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
  1661. int i = 0;
  1662. while (sblk->status_completion_producer_index && i < 10) {
  1663. CNIC_WR(dev, BNX2_HC_COMMAND,
  1664. hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
  1665. udelay(10);
  1666. i++;
  1667. barrier();
  1668. }
  1669. if (sblk->status_completion_producer_index)
  1670. goto failed;
  1671. }
  1672. return 0;
  1673. failed:
  1674. printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
  1675. dev->netdev->name);
  1676. return -EBUSY;
  1677. }
  1678. static void cnic_enable_bnx2_int(struct cnic_dev *dev)
  1679. {
  1680. struct cnic_local *cp = dev->cnic_priv;
  1681. struct cnic_eth_dev *ethdev = cp->ethdev;
  1682. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1683. return;
  1684. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1685. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  1686. }
  1687. static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
  1688. {
  1689. struct cnic_local *cp = dev->cnic_priv;
  1690. struct cnic_eth_dev *ethdev = cp->ethdev;
  1691. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1692. return;
  1693. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1694. BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
  1695. CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
  1696. synchronize_irq(ethdev->irq_arr[0].vector);
  1697. }
  1698. static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
  1699. {
  1700. struct cnic_local *cp = dev->cnic_priv;
  1701. struct cnic_eth_dev *ethdev = cp->ethdev;
  1702. u32 cid_addr, tx_cid, sb_id;
  1703. u32 val, offset0, offset1, offset2, offset3;
  1704. int i;
  1705. struct tx_bd *txbd;
  1706. dma_addr_t buf_map;
  1707. struct status_block *s_blk = cp->status_blk;
  1708. sb_id = cp->status_blk_num;
  1709. tx_cid = 20;
  1710. cnic_init_context(dev, tx_cid);
  1711. cnic_init_context(dev, tx_cid + 1);
  1712. cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
  1713. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1714. struct status_block_msix *sblk = cp->status_blk;
  1715. tx_cid = TX_TSS_CID + sb_id - 1;
  1716. cnic_init_context(dev, tx_cid);
  1717. CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
  1718. (TX_TSS_CID << 7));
  1719. cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
  1720. }
  1721. cp->tx_cons = *cp->tx_cons_ptr;
  1722. cid_addr = GET_CID_ADDR(tx_cid);
  1723. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  1724. u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
  1725. for (i = 0; i < PHY_CTX_SIZE; i += 4)
  1726. cnic_ctx_wr(dev, cid_addr2, i, 0);
  1727. offset0 = BNX2_L2CTX_TYPE_XI;
  1728. offset1 = BNX2_L2CTX_CMD_TYPE_XI;
  1729. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
  1730. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
  1731. } else {
  1732. offset0 = BNX2_L2CTX_TYPE;
  1733. offset1 = BNX2_L2CTX_CMD_TYPE;
  1734. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
  1735. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
  1736. }
  1737. val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
  1738. cnic_ctx_wr(dev, cid_addr, offset0, val);
  1739. val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
  1740. cnic_ctx_wr(dev, cid_addr, offset1, val);
  1741. txbd = (struct tx_bd *) cp->l2_ring;
  1742. buf_map = cp->l2_buf_map;
  1743. for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
  1744. txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
  1745. txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1746. }
  1747. val = (u64) cp->l2_ring_map >> 32;
  1748. cnic_ctx_wr(dev, cid_addr, offset2, val);
  1749. txbd->tx_bd_haddr_hi = val;
  1750. val = (u64) cp->l2_ring_map & 0xffffffff;
  1751. cnic_ctx_wr(dev, cid_addr, offset3, val);
  1752. txbd->tx_bd_haddr_lo = val;
  1753. }
  1754. static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
  1755. {
  1756. struct cnic_local *cp = dev->cnic_priv;
  1757. struct cnic_eth_dev *ethdev = cp->ethdev;
  1758. u32 cid_addr, sb_id, val, coal_reg, coal_val;
  1759. int i;
  1760. struct rx_bd *rxbd;
  1761. struct status_block *s_blk = cp->status_blk;
  1762. sb_id = cp->status_blk_num;
  1763. cnic_init_context(dev, 2);
  1764. cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
  1765. coal_reg = BNX2_HC_COMMAND;
  1766. coal_val = CNIC_RD(dev, coal_reg);
  1767. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1768. struct status_block_msix *sblk = cp->status_blk;
  1769. cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
  1770. coal_reg = BNX2_HC_COALESCE_NOW;
  1771. coal_val = 1 << (11 + sb_id);
  1772. }
  1773. i = 0;
  1774. while (!(*cp->rx_cons_ptr != 0) && i < 10) {
  1775. CNIC_WR(dev, coal_reg, coal_val);
  1776. udelay(10);
  1777. i++;
  1778. barrier();
  1779. }
  1780. cp->rx_cons = *cp->rx_cons_ptr;
  1781. cid_addr = GET_CID_ADDR(2);
  1782. val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
  1783. BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
  1784. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
  1785. if (sb_id == 0)
  1786. val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT;
  1787. else
  1788. val = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1789. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
  1790. rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
  1791. for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
  1792. dma_addr_t buf_map;
  1793. int n = (i % cp->l2_rx_ring_size) + 1;
  1794. buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
  1795. rxbd->rx_bd_len = cp->l2_single_buf_size;
  1796. rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
  1797. rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
  1798. rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1799. }
  1800. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
  1801. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
  1802. rxbd->rx_bd_haddr_hi = val;
  1803. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
  1804. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
  1805. rxbd->rx_bd_haddr_lo = val;
  1806. val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
  1807. cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
  1808. }
  1809. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
  1810. {
  1811. struct kwqe *wqes[1], l2kwqe;
  1812. memset(&l2kwqe, 0, sizeof(l2kwqe));
  1813. wqes[0] = &l2kwqe;
  1814. l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
  1815. (L2_KWQE_OPCODE_VALUE_FLUSH <<
  1816. KWQE_OPCODE_SHIFT) | 2;
  1817. dev->submit_kwqes(dev, wqes, 1);
  1818. }
  1819. static void cnic_set_bnx2_mac(struct cnic_dev *dev)
  1820. {
  1821. struct cnic_local *cp = dev->cnic_priv;
  1822. u32 val;
  1823. val = cp->func << 2;
  1824. cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
  1825. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1826. BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
  1827. dev->mac_addr[0] = (u8) (val >> 8);
  1828. dev->mac_addr[1] = (u8) val;
  1829. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
  1830. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1831. BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
  1832. dev->mac_addr[2] = (u8) (val >> 24);
  1833. dev->mac_addr[3] = (u8) (val >> 16);
  1834. dev->mac_addr[4] = (u8) (val >> 8);
  1835. dev->mac_addr[5] = (u8) val;
  1836. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
  1837. val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
  1838. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1839. val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
  1840. CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
  1841. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
  1842. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
  1843. }
  1844. static int cnic_start_bnx2_hw(struct cnic_dev *dev)
  1845. {
  1846. struct cnic_local *cp = dev->cnic_priv;
  1847. struct cnic_eth_dev *ethdev = cp->ethdev;
  1848. struct status_block *sblk = cp->status_blk;
  1849. u32 val;
  1850. int err;
  1851. cnic_set_bnx2_mac(dev);
  1852. val = CNIC_RD(dev, BNX2_MQ_CONFIG);
  1853. val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
  1854. if (BCM_PAGE_BITS > 12)
  1855. val |= (12 - 8) << 4;
  1856. else
  1857. val |= (BCM_PAGE_BITS - 8) << 4;
  1858. CNIC_WR(dev, BNX2_MQ_CONFIG, val);
  1859. CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
  1860. CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
  1861. CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
  1862. err = cnic_setup_5709_context(dev, 1);
  1863. if (err)
  1864. return err;
  1865. cnic_init_context(dev, KWQ_CID);
  1866. cnic_init_context(dev, KCQ_CID);
  1867. cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
  1868. cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
  1869. cp->max_kwq_idx = MAX_KWQ_IDX;
  1870. cp->kwq_prod_idx = 0;
  1871. cp->kwq_con_idx = 0;
  1872. cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
  1873. if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
  1874. cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
  1875. else
  1876. cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
  1877. /* Initialize the kernel work queue context. */
  1878. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1879. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1880. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
  1881. val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
  1882. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1883. val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
  1884. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1885. val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
  1886. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1887. val = (u32) cp->kwq_info.pgtbl_map;
  1888. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1889. cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
  1890. cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
  1891. cp->kcq_prod_idx = 0;
  1892. /* Initialize the kernel complete queue context. */
  1893. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1894. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1895. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
  1896. val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
  1897. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1898. val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
  1899. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1900. val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
  1901. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1902. val = (u32) cp->kcq_info.pgtbl_map;
  1903. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1904. cp->int_num = 0;
  1905. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1906. u32 sb_id = cp->status_blk_num;
  1907. u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1908. cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
  1909. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1910. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1911. }
  1912. /* Enable Commnad Scheduler notification when we write to the
  1913. * host producer index of the kernel contexts. */
  1914. CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
  1915. /* Enable Command Scheduler notification when we write to either
  1916. * the Send Queue or Receive Queue producer indexes of the kernel
  1917. * bypass contexts. */
  1918. CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
  1919. CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
  1920. /* Notify COM when the driver post an application buffer. */
  1921. CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
  1922. /* Set the CP and COM doorbells. These two processors polls the
  1923. * doorbell for a non zero value before running. This must be done
  1924. * after setting up the kernel queue contexts. */
  1925. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
  1926. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
  1927. cnic_init_bnx2_tx_ring(dev);
  1928. cnic_init_bnx2_rx_ring(dev);
  1929. err = cnic_init_bnx2_irq(dev);
  1930. if (err) {
  1931. printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
  1932. dev->netdev->name);
  1933. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  1934. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  1935. return err;
  1936. }
  1937. return 0;
  1938. }
  1939. static int cnic_start_hw(struct cnic_dev *dev)
  1940. {
  1941. struct cnic_local *cp = dev->cnic_priv;
  1942. struct cnic_eth_dev *ethdev = cp->ethdev;
  1943. int err;
  1944. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  1945. return -EALREADY;
  1946. err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
  1947. if (err) {
  1948. printk(KERN_ERR PFX "%s: register_cnic failed\n",
  1949. dev->netdev->name);
  1950. goto err2;
  1951. }
  1952. dev->regview = ethdev->io_base;
  1953. cp->chip_id = ethdev->chip_id;
  1954. pci_dev_get(dev->pcidev);
  1955. cp->func = PCI_FUNC(dev->pcidev->devfn);
  1956. cp->status_blk = ethdev->irq_arr[0].status_blk;
  1957. cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
  1958. err = cp->alloc_resc(dev);
  1959. if (err) {
  1960. printk(KERN_ERR PFX "%s: allocate resource failure\n",
  1961. dev->netdev->name);
  1962. goto err1;
  1963. }
  1964. err = cp->start_hw(dev);
  1965. if (err)
  1966. goto err1;
  1967. err = cnic_cm_open(dev);
  1968. if (err)
  1969. goto err1;
  1970. set_bit(CNIC_F_CNIC_UP, &dev->flags);
  1971. cp->enable_int(dev);
  1972. return 0;
  1973. err1:
  1974. ethdev->drv_unregister_cnic(dev->netdev);
  1975. cp->free_resc(dev);
  1976. pci_dev_put(dev->pcidev);
  1977. err2:
  1978. return err;
  1979. }
  1980. static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
  1981. {
  1982. struct cnic_local *cp = dev->cnic_priv;
  1983. struct cnic_eth_dev *ethdev = cp->ethdev;
  1984. cnic_disable_bnx2_int_sync(dev);
  1985. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  1986. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  1987. cnic_init_context(dev, KWQ_CID);
  1988. cnic_init_context(dev, KCQ_CID);
  1989. cnic_setup_5709_context(dev, 0);
  1990. cnic_free_irq(dev);
  1991. ethdev->drv_unregister_cnic(dev->netdev);
  1992. cnic_free_resc(dev);
  1993. }
  1994. static void cnic_stop_hw(struct cnic_dev *dev)
  1995. {
  1996. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  1997. struct cnic_local *cp = dev->cnic_priv;
  1998. clear_bit(CNIC_F_CNIC_UP, &dev->flags);
  1999. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
  2000. synchronize_rcu();
  2001. cnic_cm_shutdown(dev);
  2002. cp->stop_hw(dev);
  2003. pci_dev_put(dev->pcidev);
  2004. }
  2005. }
  2006. static void cnic_free_dev(struct cnic_dev *dev)
  2007. {
  2008. int i = 0;
  2009. while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
  2010. msleep(100);
  2011. i++;
  2012. }
  2013. if (atomic_read(&dev->ref_count) != 0)
  2014. printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
  2015. " to zero.\n", dev->netdev->name);
  2016. printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
  2017. dev_put(dev->netdev);
  2018. kfree(dev);
  2019. }
  2020. static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
  2021. struct pci_dev *pdev)
  2022. {
  2023. struct cnic_dev *cdev;
  2024. struct cnic_local *cp;
  2025. int alloc_size;
  2026. alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
  2027. cdev = kzalloc(alloc_size , GFP_KERNEL);
  2028. if (cdev == NULL) {
  2029. printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
  2030. dev->name);
  2031. return NULL;
  2032. }
  2033. cdev->netdev = dev;
  2034. cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
  2035. cdev->register_device = cnic_register_device;
  2036. cdev->unregister_device = cnic_unregister_device;
  2037. cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
  2038. cp = cdev->cnic_priv;
  2039. cp->dev = cdev;
  2040. cp->uio_dev = -1;
  2041. cp->l2_single_buf_size = 0x400;
  2042. cp->l2_rx_ring_size = 3;
  2043. spin_lock_init(&cp->cnic_ulp_lock);
  2044. printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
  2045. return cdev;
  2046. }
  2047. static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
  2048. {
  2049. struct pci_dev *pdev;
  2050. struct cnic_dev *cdev;
  2051. struct cnic_local *cp;
  2052. struct cnic_eth_dev *ethdev = NULL;
  2053. struct cnic_eth_dev *(*probe)(void *) = NULL;
  2054. probe = __symbol_get("bnx2_cnic_probe");
  2055. if (probe) {
  2056. ethdev = (*probe)(dev);
  2057. symbol_put_addr(probe);
  2058. }
  2059. if (!ethdev)
  2060. return NULL;
  2061. pdev = ethdev->pdev;
  2062. if (!pdev)
  2063. return NULL;
  2064. dev_hold(dev);
  2065. pci_dev_get(pdev);
  2066. if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
  2067. pdev->device == PCI_DEVICE_ID_NX2_5709S) {
  2068. u8 rev;
  2069. pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  2070. if (rev < 0x10) {
  2071. pci_dev_put(pdev);
  2072. goto cnic_err;
  2073. }
  2074. }
  2075. pci_dev_put(pdev);
  2076. cdev = cnic_alloc_dev(dev, pdev);
  2077. if (cdev == NULL)
  2078. goto cnic_err;
  2079. set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
  2080. cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
  2081. cp = cdev->cnic_priv;
  2082. cp->ethdev = ethdev;
  2083. cdev->pcidev = pdev;
  2084. cp->cnic_ops = &cnic_bnx2_ops;
  2085. cp->start_hw = cnic_start_bnx2_hw;
  2086. cp->stop_hw = cnic_stop_bnx2_hw;
  2087. cp->setup_pgtbl = cnic_setup_page_tbl;
  2088. cp->alloc_resc = cnic_alloc_bnx2_resc;
  2089. cp->free_resc = cnic_free_resc;
  2090. cp->start_cm = cnic_cm_init_bnx2_hw;
  2091. cp->stop_cm = cnic_cm_stop_bnx2_hw;
  2092. cp->enable_int = cnic_enable_bnx2_int;
  2093. cp->disable_int_sync = cnic_disable_bnx2_int_sync;
  2094. cp->close_conn = cnic_close_bnx2_conn;
  2095. cp->next_idx = cnic_bnx2_next_idx;
  2096. cp->hw_idx = cnic_bnx2_hw_idx;
  2097. return cdev;
  2098. cnic_err:
  2099. dev_put(dev);
  2100. return NULL;
  2101. }
  2102. static struct cnic_dev *is_cnic_dev(struct net_device *dev)
  2103. {
  2104. struct ethtool_drvinfo drvinfo;
  2105. struct cnic_dev *cdev = NULL;
  2106. if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
  2107. memset(&drvinfo, 0, sizeof(drvinfo));
  2108. dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
  2109. if (!strcmp(drvinfo.driver, "bnx2"))
  2110. cdev = init_bnx2_cnic(dev);
  2111. if (cdev) {
  2112. write_lock(&cnic_dev_lock);
  2113. list_add(&cdev->list, &cnic_dev_list);
  2114. write_unlock(&cnic_dev_lock);
  2115. }
  2116. }
  2117. return cdev;
  2118. }
  2119. /**
  2120. * netdev event handler
  2121. */
  2122. static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
  2123. void *ptr)
  2124. {
  2125. struct net_device *netdev = ptr;
  2126. struct cnic_dev *dev;
  2127. int if_type;
  2128. int new_dev = 0;
  2129. dev = cnic_from_netdev(netdev);
  2130. if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
  2131. /* Check for the hot-plug device */
  2132. dev = is_cnic_dev(netdev);
  2133. if (dev) {
  2134. new_dev = 1;
  2135. cnic_hold(dev);
  2136. }
  2137. }
  2138. if (dev) {
  2139. struct cnic_local *cp = dev->cnic_priv;
  2140. if (new_dev)
  2141. cnic_ulp_init(dev);
  2142. else if (event == NETDEV_UNREGISTER)
  2143. cnic_ulp_exit(dev);
  2144. else if (event == NETDEV_UP) {
  2145. mutex_lock(&cnic_lock);
  2146. if (!cnic_start_hw(dev))
  2147. cnic_ulp_start(dev);
  2148. mutex_unlock(&cnic_lock);
  2149. }
  2150. rcu_read_lock();
  2151. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  2152. struct cnic_ulp_ops *ulp_ops;
  2153. void *ctx;
  2154. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  2155. if (!ulp_ops || !ulp_ops->indicate_netevent)
  2156. continue;
  2157. ctx = cp->ulp_handle[if_type];
  2158. ulp_ops->indicate_netevent(ctx, event);
  2159. }
  2160. rcu_read_unlock();
  2161. if (event == NETDEV_GOING_DOWN) {
  2162. mutex_lock(&cnic_lock);
  2163. cnic_ulp_stop(dev);
  2164. cnic_stop_hw(dev);
  2165. mutex_unlock(&cnic_lock);
  2166. } else if (event == NETDEV_UNREGISTER) {
  2167. write_lock(&cnic_dev_lock);
  2168. list_del_init(&dev->list);
  2169. write_unlock(&cnic_dev_lock);
  2170. cnic_put(dev);
  2171. cnic_free_dev(dev);
  2172. goto done;
  2173. }
  2174. cnic_put(dev);
  2175. }
  2176. done:
  2177. return NOTIFY_DONE;
  2178. }
  2179. static struct notifier_block cnic_netdev_notifier = {
  2180. .notifier_call = cnic_netdev_event
  2181. };
  2182. static void cnic_release(void)
  2183. {
  2184. struct cnic_dev *dev;
  2185. while (!list_empty(&cnic_dev_list)) {
  2186. dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
  2187. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2188. cnic_ulp_stop(dev);
  2189. cnic_stop_hw(dev);
  2190. }
  2191. cnic_ulp_exit(dev);
  2192. list_del_init(&dev->list);
  2193. cnic_free_dev(dev);
  2194. }
  2195. }
  2196. static int __init cnic_init(void)
  2197. {
  2198. int rc = 0;
  2199. printk(KERN_INFO "%s", version);
  2200. rc = register_netdevice_notifier(&cnic_netdev_notifier);
  2201. if (rc) {
  2202. cnic_release();
  2203. return rc;
  2204. }
  2205. return 0;
  2206. }
  2207. static void __exit cnic_exit(void)
  2208. {
  2209. unregister_netdevice_notifier(&cnic_netdev_notifier);
  2210. cnic_release();
  2211. return;
  2212. }
  2213. module_init(cnic_init);
  2214. module_exit(cnic_exit);