init.c 34 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/sdio_func.h>
  17. #include "core.h"
  18. #include "cfg80211.h"
  19. #include "target.h"
  20. #include "debug.h"
  21. #include "hif-ops.h"
  22. unsigned int debug_mask;
  23. static unsigned int testmode;
  24. module_param(debug_mask, uint, 0644);
  25. module_param(testmode, uint, 0644);
  26. /*
  27. * Include definitions here that can be used to tune the WLAN module
  28. * behavior. Different customers can tune the behavior as per their needs,
  29. * here.
  30. */
  31. /*
  32. * This configuration item enable/disable keepalive support.
  33. * Keepalive support: In the absence of any data traffic to AP, null
  34. * frames will be sent to the AP at periodic interval, to keep the association
  35. * active. This configuration item defines the periodic interval.
  36. * Use value of zero to disable keepalive support
  37. * Default: 60 seconds
  38. */
  39. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  40. /*
  41. * This configuration item sets the value of disconnect timeout
  42. * Firmware delays sending the disconnec event to the host for this
  43. * timeout after is gets disconnected from the current AP.
  44. * If the firmware successly roams within the disconnect timeout
  45. * it sends a new connect event
  46. */
  47. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  48. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  49. enum addr_type {
  50. DATASET_PATCH_ADDR,
  51. APP_LOAD_ADDR,
  52. APP_START_OVERRIDE_ADDR,
  53. };
  54. #define ATH6KL_DATA_OFFSET 64
  55. struct sk_buff *ath6kl_buf_alloc(int size)
  56. {
  57. struct sk_buff *skb;
  58. u16 reserved;
  59. /* Add chacheline space at front and back of buffer */
  60. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  61. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  62. skb = dev_alloc_skb(size + reserved);
  63. if (skb)
  64. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  65. return skb;
  66. }
  67. void ath6kl_init_profile_info(struct ath6kl *ar)
  68. {
  69. ar->ssid_len = 0;
  70. memset(ar->ssid, 0, sizeof(ar->ssid));
  71. ar->dot11_auth_mode = OPEN_AUTH;
  72. ar->auth_mode = NONE_AUTH;
  73. ar->prwise_crypto = NONE_CRYPT;
  74. ar->prwise_crypto_len = 0;
  75. ar->grp_crypto = NONE_CRYPT;
  76. ar->grp_crypto_len = 0;
  77. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  78. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  79. memset(ar->bssid, 0, sizeof(ar->bssid));
  80. ar->bss_ch = 0;
  81. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  82. }
  83. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  84. {
  85. switch (ar->nw_type) {
  86. case INFRA_NETWORK:
  87. return HI_OPTION_FW_MODE_BSS_STA;
  88. case ADHOC_NETWORK:
  89. return HI_OPTION_FW_MODE_IBSS;
  90. case AP_NETWORK:
  91. return HI_OPTION_FW_MODE_AP;
  92. default:
  93. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  94. return 0xff;
  95. }
  96. }
  97. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  98. {
  99. u32 address, data;
  100. struct host_app_area host_app_area;
  101. /* Fetch the address of the host_app_area_s
  102. * instance in the host interest area */
  103. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  104. address = TARG_VTOP(ar->target_type, address);
  105. if (ath6kl_diag_read32(ar, address, &data))
  106. return -EIO;
  107. address = TARG_VTOP(ar->target_type, data);
  108. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  109. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  110. sizeof(struct host_app_area)))
  111. return -EIO;
  112. return 0;
  113. }
  114. static inline void set_ac2_ep_map(struct ath6kl *ar,
  115. u8 ac,
  116. enum htc_endpoint_id ep)
  117. {
  118. ar->ac2ep_map[ac] = ep;
  119. ar->ep2ac_map[ep] = ac;
  120. }
  121. /* connect to a service */
  122. static int ath6kl_connectservice(struct ath6kl *ar,
  123. struct htc_service_connect_req *con_req,
  124. char *desc)
  125. {
  126. int status;
  127. struct htc_service_connect_resp response;
  128. memset(&response, 0, sizeof(response));
  129. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  130. if (status) {
  131. ath6kl_err("failed to connect to %s service status:%d\n",
  132. desc, status);
  133. return status;
  134. }
  135. switch (con_req->svc_id) {
  136. case WMI_CONTROL_SVC:
  137. if (test_bit(WMI_ENABLED, &ar->flag))
  138. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  139. ar->ctrl_ep = response.endpoint;
  140. break;
  141. case WMI_DATA_BE_SVC:
  142. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  143. break;
  144. case WMI_DATA_BK_SVC:
  145. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  146. break;
  147. case WMI_DATA_VI_SVC:
  148. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  149. break;
  150. case WMI_DATA_VO_SVC:
  151. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  152. break;
  153. default:
  154. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  155. return -EINVAL;
  156. }
  157. return 0;
  158. }
  159. static int ath6kl_init_service_ep(struct ath6kl *ar)
  160. {
  161. struct htc_service_connect_req connect;
  162. memset(&connect, 0, sizeof(connect));
  163. /* these fields are the same for all service endpoints */
  164. connect.ep_cb.rx = ath6kl_rx;
  165. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  166. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  167. /*
  168. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  169. * gets called.
  170. */
  171. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  172. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  173. if (!connect.ep_cb.rx_refill_thresh)
  174. connect.ep_cb.rx_refill_thresh++;
  175. /* connect to control service */
  176. connect.svc_id = WMI_CONTROL_SVC;
  177. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  178. return -EIO;
  179. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  180. /*
  181. * Limit the HTC message size on the send path, although e can
  182. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  183. * (802.3) frames on the send path.
  184. */
  185. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  186. /*
  187. * To reduce the amount of committed memory for larger A_MSDU
  188. * frames, use the recv-alloc threshold mechanism for larger
  189. * packets.
  190. */
  191. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  192. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  193. /*
  194. * For the remaining data services set the connection flag to
  195. * reduce dribbling, if configured to do so.
  196. */
  197. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  198. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  199. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  200. connect.svc_id = WMI_DATA_BE_SVC;
  201. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  202. return -EIO;
  203. /* connect to back-ground map this to WMI LOW_PRI */
  204. connect.svc_id = WMI_DATA_BK_SVC;
  205. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  206. return -EIO;
  207. /* connect to Video service, map this to to HI PRI */
  208. connect.svc_id = WMI_DATA_VI_SVC;
  209. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  210. return -EIO;
  211. /*
  212. * Connect to VO service, this is currently not mapped to a WMI
  213. * priority stream due to historical reasons. WMI originally
  214. * defined 3 priorities over 3 mailboxes We can change this when
  215. * WMI is reworked so that priorities are not dependent on
  216. * mailboxes.
  217. */
  218. connect.svc_id = WMI_DATA_VO_SVC;
  219. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  220. return -EIO;
  221. return 0;
  222. }
  223. static void ath6kl_init_control_info(struct ath6kl *ar)
  224. {
  225. u8 ctr;
  226. clear_bit(WMI_ENABLED, &ar->flag);
  227. ath6kl_init_profile_info(ar);
  228. ar->def_txkey_index = 0;
  229. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  230. ar->ch_hint = 0;
  231. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  232. ar->listen_intvl_b = 0;
  233. ar->tx_pwr = 0;
  234. clear_bit(SKIP_SCAN, &ar->flag);
  235. set_bit(WMM_ENABLED, &ar->flag);
  236. ar->intra_bss = 1;
  237. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  238. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  239. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  240. memset((u8 *)ar->sta_list, 0,
  241. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  242. spin_lock_init(&ar->mcastpsq_lock);
  243. /* Init the PS queues */
  244. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  245. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  246. skb_queue_head_init(&ar->sta_list[ctr].psq);
  247. }
  248. skb_queue_head_init(&ar->mcastpsq);
  249. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  250. }
  251. /*
  252. * Set HTC/Mbox operational parameters, this can only be called when the
  253. * target is in the BMI phase.
  254. */
  255. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  256. u8 htc_ctrl_buf)
  257. {
  258. int status;
  259. u32 blk_size;
  260. blk_size = ar->mbox_info.block_size;
  261. if (htc_ctrl_buf)
  262. blk_size |= ((u32)htc_ctrl_buf) << 16;
  263. /* set the host interest area for the block size */
  264. status = ath6kl_bmi_write(ar,
  265. ath6kl_get_hi_item_addr(ar,
  266. HI_ITEM(hi_mbox_io_block_sz)),
  267. (u8 *)&blk_size,
  268. 4);
  269. if (status) {
  270. ath6kl_err("bmi_write_memory for IO block size failed\n");
  271. goto out;
  272. }
  273. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  274. blk_size,
  275. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  276. if (mbox_isr_yield_val) {
  277. /* set the host interest area for the mbox ISR yield limit */
  278. status = ath6kl_bmi_write(ar,
  279. ath6kl_get_hi_item_addr(ar,
  280. HI_ITEM(hi_mbox_isr_yield_limit)),
  281. (u8 *)&mbox_isr_yield_val,
  282. 4);
  283. if (status) {
  284. ath6kl_err("bmi_write_memory for yield limit failed\n");
  285. goto out;
  286. }
  287. }
  288. out:
  289. return status;
  290. }
  291. #define REG_DUMP_COUNT_AR6003 60
  292. #define REGISTER_DUMP_LEN_MAX 60
  293. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  294. {
  295. u32 address;
  296. u32 regdump_loc = 0;
  297. int status;
  298. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  299. u32 i;
  300. if (ar->target_type != TARGET_TYPE_AR6003)
  301. return;
  302. /* the reg dump pointer is copied to the host interest area */
  303. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  304. address = TARG_VTOP(ar->target_type, address);
  305. /* read RAM location through diagnostic window */
  306. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  307. if (status || !regdump_loc) {
  308. ath6kl_err("failed to get ptr to register dump area\n");
  309. return;
  310. }
  311. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  312. regdump_loc);
  313. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  314. /* fetch register dump data */
  315. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  316. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  317. if (status) {
  318. ath6kl_err("failed to get register dump\n");
  319. return;
  320. }
  321. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  322. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  323. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  324. i, regdump_val[i]);
  325. }
  326. void ath6kl_target_failure(struct ath6kl *ar)
  327. {
  328. ath6kl_err("target asserted\n");
  329. /* try dumping target assertion information (if any) */
  330. ath6kl_dump_target_assert_info(ar);
  331. }
  332. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  333. {
  334. int status = 0;
  335. int ret;
  336. /*
  337. * Configure the device for rx dot11 header rules. "0,0" are the
  338. * default values. Required if checksum offload is needed. Set
  339. * RxMetaVersion to 2.
  340. */
  341. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  342. ar->rx_meta_ver, 0, 0)) {
  343. ath6kl_err("unable to set the rx frame format\n");
  344. status = -EIO;
  345. }
  346. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  347. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  348. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  349. ath6kl_err("unable to set power save fail event policy\n");
  350. status = -EIO;
  351. }
  352. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  353. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  354. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  355. ath6kl_err("unable to set barker preamble policy\n");
  356. status = -EIO;
  357. }
  358. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  359. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  360. ath6kl_err("unable to set keep alive interval\n");
  361. status = -EIO;
  362. }
  363. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  364. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  365. ath6kl_err("unable to set disconnect timeout\n");
  366. status = -EIO;
  367. }
  368. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  369. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  370. ath6kl_err("unable to set txop bursting\n");
  371. status = -EIO;
  372. }
  373. ret = ath6kl_wmi_info_req_cmd(ar->wmi, P2P_FLAG_CAPABILITIES_REQ |
  374. P2P_FLAG_MACADDR_REQ |
  375. P2P_FLAG_HMODEL_REQ);
  376. if (ret) {
  377. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  378. "capabilities (%d) - assuming P2P not supported\n",
  379. ret);
  380. }
  381. return status;
  382. }
  383. int ath6kl_configure_target(struct ath6kl *ar)
  384. {
  385. u32 param, ram_reserved_size;
  386. u8 fw_iftype;
  387. fw_iftype = ath6kl_get_fw_iftype(ar);
  388. if (fw_iftype == 0xff)
  389. return -EINVAL;
  390. /* Tell target which HTC version it is used*/
  391. param = HTC_PROTOCOL_VERSION;
  392. if (ath6kl_bmi_write(ar,
  393. ath6kl_get_hi_item_addr(ar,
  394. HI_ITEM(hi_app_host_interest)),
  395. (u8 *)&param, 4) != 0) {
  396. ath6kl_err("bmi_write_memory for htc version failed\n");
  397. return -EIO;
  398. }
  399. /* set the firmware mode to STA/IBSS/AP */
  400. param = 0;
  401. if (ath6kl_bmi_read(ar,
  402. ath6kl_get_hi_item_addr(ar,
  403. HI_ITEM(hi_option_flag)),
  404. (u8 *)&param, 4) != 0) {
  405. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  406. return -EIO;
  407. }
  408. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  409. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  410. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  411. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  412. if (ath6kl_bmi_write(ar,
  413. ath6kl_get_hi_item_addr(ar,
  414. HI_ITEM(hi_option_flag)),
  415. (u8 *)&param,
  416. 4) != 0) {
  417. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  418. return -EIO;
  419. }
  420. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  421. /*
  422. * Hardcode the address use for the extended board data
  423. * Ideally this should be pre-allocate by the OS at boot time
  424. * But since it is a new feature and board data is loaded
  425. * at init time, we have to workaround this from host.
  426. * It is difficult to patch the firmware boot code,
  427. * but possible in theory.
  428. */
  429. if (ar->target_type == TARGET_TYPE_AR6003 ||
  430. ar->target_type == TARGET_TYPE_AR6004) {
  431. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  432. param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  433. ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE;
  434. } else if (ar->version.target_ver == AR6004_REV1_VERSION) {
  435. param = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  436. ram_reserved_size = AR6004_REV1_RAM_RESERVE_SIZE;
  437. } else {
  438. param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  439. ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE;
  440. }
  441. if (ath6kl_bmi_write(ar,
  442. ath6kl_get_hi_item_addr(ar,
  443. HI_ITEM(hi_board_ext_data)),
  444. (u8 *)&param, 4) != 0) {
  445. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  446. return -EIO;
  447. }
  448. if (ath6kl_bmi_write(ar,
  449. ath6kl_get_hi_item_addr(ar,
  450. HI_ITEM(hi_end_ram_reserve_sz)),
  451. (u8 *)&ram_reserved_size, 4) != 0) {
  452. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  453. return -EIO;
  454. }
  455. }
  456. /* set the block size for the target */
  457. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  458. /* use default number of control buffers */
  459. return -EIO;
  460. return 0;
  461. }
  462. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  463. {
  464. struct net_device *dev;
  465. struct ath6kl *ar;
  466. struct wireless_dev *wdev;
  467. wdev = ath6kl_cfg80211_init(sdev);
  468. if (!wdev) {
  469. ath6kl_err("ath6kl_cfg80211_init failed\n");
  470. return NULL;
  471. }
  472. ar = wdev_priv(wdev);
  473. ar->dev = sdev;
  474. ar->wdev = wdev;
  475. wdev->iftype = NL80211_IFTYPE_STATION;
  476. if (ath6kl_debug_init(ar)) {
  477. ath6kl_err("Failed to initialize debugfs\n");
  478. ath6kl_cfg80211_deinit(ar);
  479. return NULL;
  480. }
  481. dev = alloc_netdev(0, "wlan%d", ether_setup);
  482. if (!dev) {
  483. ath6kl_err("no memory for network device instance\n");
  484. ath6kl_cfg80211_deinit(ar);
  485. return NULL;
  486. }
  487. dev->ieee80211_ptr = wdev;
  488. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  489. wdev->netdev = dev;
  490. ar->sme_state = SME_DISCONNECTED;
  491. ar->auto_auth_stage = AUTH_IDLE;
  492. init_netdev(dev);
  493. ar->net_dev = dev;
  494. set_bit(WLAN_ENABLED, &ar->flag);
  495. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  496. spin_lock_init(&ar->lock);
  497. ath6kl_init_control_info(ar);
  498. init_waitqueue_head(&ar->event_wq);
  499. sema_init(&ar->sem, 1);
  500. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  501. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  502. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  503. (unsigned long) dev);
  504. return ar;
  505. }
  506. int ath6kl_unavail_ev(struct ath6kl *ar)
  507. {
  508. ath6kl_destroy(ar->net_dev, 1);
  509. return 0;
  510. }
  511. /* firmware upload */
  512. static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type)
  513. {
  514. WARN_ON(target_ver != AR6003_REV2_VERSION &&
  515. target_ver != AR6003_REV3_VERSION &&
  516. target_ver != AR6004_REV1_VERSION);
  517. switch (type) {
  518. case DATASET_PATCH_ADDR:
  519. return (target_ver == AR6003_REV2_VERSION) ?
  520. AR6003_REV2_DATASET_PATCH_ADDRESS :
  521. AR6003_REV3_DATASET_PATCH_ADDRESS;
  522. case APP_LOAD_ADDR:
  523. return (target_ver == AR6003_REV2_VERSION) ?
  524. AR6003_REV2_APP_LOAD_ADDRESS :
  525. 0x1234;
  526. case APP_START_OVERRIDE_ADDR:
  527. return (target_ver == AR6003_REV2_VERSION) ?
  528. AR6003_REV2_APP_START_OVERRIDE :
  529. AR6003_REV3_APP_START_OVERRIDE;
  530. default:
  531. return 0;
  532. }
  533. }
  534. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  535. u8 **fw, size_t *fw_len)
  536. {
  537. const struct firmware *fw_entry;
  538. int ret;
  539. ret = request_firmware(&fw_entry, filename, ar->dev);
  540. if (ret)
  541. return ret;
  542. *fw_len = fw_entry->size;
  543. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  544. if (*fw == NULL)
  545. ret = -ENOMEM;
  546. release_firmware(fw_entry);
  547. return ret;
  548. }
  549. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  550. {
  551. const char *filename;
  552. int ret;
  553. switch (ar->version.target_ver) {
  554. case AR6003_REV2_VERSION:
  555. filename = AR6003_REV2_BOARD_DATA_FILE;
  556. break;
  557. case AR6004_REV1_VERSION:
  558. filename = AR6004_REV1_BOARD_DATA_FILE;
  559. break;
  560. default:
  561. filename = AR6003_REV3_BOARD_DATA_FILE;
  562. break;
  563. }
  564. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  565. &ar->fw_board_len);
  566. if (ret == 0) {
  567. /* managed to get proper board file */
  568. return 0;
  569. }
  570. /* there was no proper board file, try to use default instead */
  571. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  572. filename, ret);
  573. switch (ar->version.target_ver) {
  574. case AR6003_REV2_VERSION:
  575. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  576. break;
  577. case AR6004_REV1_VERSION:
  578. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  579. break;
  580. default:
  581. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  582. break;
  583. }
  584. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  585. &ar->fw_board_len);
  586. if (ret) {
  587. ath6kl_err("Failed to get default board file %s: %d\n",
  588. filename, ret);
  589. return ret;
  590. }
  591. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  592. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  593. return 0;
  594. }
  595. static int ath6kl_upload_board_file(struct ath6kl *ar)
  596. {
  597. u32 board_address, board_ext_address, param;
  598. u32 board_data_size, board_ext_data_size;
  599. int ret;
  600. if (ar->fw_board == NULL) {
  601. ret = ath6kl_fetch_board_file(ar);
  602. if (ret)
  603. return ret;
  604. }
  605. /*
  606. * Determine where in Target RAM to write Board Data.
  607. * For AR6004, host determine Target RAM address for
  608. * writing board data.
  609. */
  610. if (ar->target_type == TARGET_TYPE_AR6004) {
  611. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  612. ath6kl_bmi_write(ar,
  613. ath6kl_get_hi_item_addr(ar,
  614. HI_ITEM(hi_board_data)),
  615. (u8 *) &board_address, 4);
  616. } else {
  617. ath6kl_bmi_read(ar,
  618. ath6kl_get_hi_item_addr(ar,
  619. HI_ITEM(hi_board_data)),
  620. (u8 *) &board_address, 4);
  621. }
  622. ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n",
  623. board_address);
  624. /* determine where in target ram to write extended board data */
  625. ath6kl_bmi_read(ar,
  626. ath6kl_get_hi_item_addr(ar,
  627. HI_ITEM(hi_board_ext_data)),
  628. (u8 *) &board_ext_address, 4);
  629. ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n",
  630. board_ext_address);
  631. if (board_ext_address == 0) {
  632. ath6kl_err("Failed to get board file target address.\n");
  633. return -EINVAL;
  634. }
  635. switch (ar->target_type) {
  636. case TARGET_TYPE_AR6003:
  637. board_data_size = AR6003_BOARD_DATA_SZ;
  638. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  639. break;
  640. case TARGET_TYPE_AR6004:
  641. board_data_size = AR6004_BOARD_DATA_SZ;
  642. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  643. break;
  644. default:
  645. WARN_ON(1);
  646. return -EINVAL;
  647. break;
  648. }
  649. if (ar->fw_board_len == (board_data_size +
  650. board_ext_data_size)) {
  651. /* write extended board data */
  652. ret = ath6kl_bmi_write(ar, board_ext_address,
  653. ar->fw_board + board_data_size,
  654. board_ext_data_size);
  655. if (ret) {
  656. ath6kl_err("Failed to write extended board data: %d\n",
  657. ret);
  658. return ret;
  659. }
  660. /* record that extended board data is initialized */
  661. param = (board_ext_data_size << 16) | 1;
  662. ath6kl_bmi_write(ar,
  663. ath6kl_get_hi_item_addr(ar,
  664. HI_ITEM(hi_board_ext_data_config)),
  665. (unsigned char *) &param, 4);
  666. }
  667. if (ar->fw_board_len < board_data_size) {
  668. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  669. ret = -EINVAL;
  670. return ret;
  671. }
  672. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  673. board_data_size);
  674. if (ret) {
  675. ath6kl_err("Board file bmi write failed: %d\n", ret);
  676. return ret;
  677. }
  678. /* record the fact that Board Data IS initialized */
  679. param = 1;
  680. ath6kl_bmi_write(ar,
  681. ath6kl_get_hi_item_addr(ar,
  682. HI_ITEM(hi_board_data_initialized)),
  683. (u8 *)&param, 4);
  684. return ret;
  685. }
  686. static int ath6kl_upload_otp(struct ath6kl *ar)
  687. {
  688. const char *filename;
  689. u32 address, param;
  690. int ret;
  691. switch (ar->version.target_ver) {
  692. case AR6003_REV2_VERSION:
  693. filename = AR6003_REV2_OTP_FILE;
  694. break;
  695. case AR6004_REV1_VERSION:
  696. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  697. return 0;
  698. break;
  699. default:
  700. filename = AR6003_REV3_OTP_FILE;
  701. break;
  702. }
  703. if (ar->fw_otp == NULL) {
  704. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  705. &ar->fw_otp_len);
  706. if (ret) {
  707. ath6kl_err("Failed to get OTP file %s: %d\n",
  708. filename, ret);
  709. return ret;
  710. }
  711. }
  712. address = ath6kl_get_load_address(ar->version.target_ver,
  713. APP_LOAD_ADDR);
  714. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  715. ar->fw_otp_len);
  716. if (ret) {
  717. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  718. return ret;
  719. }
  720. /* execute the OTP code */
  721. param = 0;
  722. address = ath6kl_get_load_address(ar->version.target_ver,
  723. APP_START_OVERRIDE_ADDR);
  724. ath6kl_bmi_execute(ar, address, &param);
  725. return ret;
  726. }
  727. static int ath6kl_upload_firmware(struct ath6kl *ar)
  728. {
  729. const char *filename;
  730. u32 address;
  731. int ret;
  732. if (testmode) {
  733. switch (ar->version.target_ver) {
  734. case AR6003_REV2_VERSION:
  735. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  736. break;
  737. case AR6003_REV3_VERSION:
  738. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  739. break;
  740. case AR6004_REV1_VERSION:
  741. ath6kl_warn("testmode not supported with ar6004\n");
  742. return -EOPNOTSUPP;
  743. default:
  744. ath6kl_warn("unknown target version: 0x%x\n",
  745. ar->version.target_ver);
  746. return -EINVAL;
  747. }
  748. set_bit(TESTMODE, &ar->flag);
  749. goto get_fw;
  750. }
  751. switch (ar->version.target_ver) {
  752. case AR6003_REV2_VERSION:
  753. filename = AR6003_REV2_FIRMWARE_FILE;
  754. break;
  755. case AR6004_REV1_VERSION:
  756. filename = AR6004_REV1_FIRMWARE_FILE;
  757. break;
  758. default:
  759. filename = AR6003_REV3_FIRMWARE_FILE;
  760. break;
  761. }
  762. get_fw:
  763. if (ar->fw == NULL) {
  764. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  765. if (ret) {
  766. ath6kl_err("Failed to get firmware file %s: %d\n",
  767. filename, ret);
  768. return ret;
  769. }
  770. }
  771. address = ath6kl_get_load_address(ar->version.target_ver,
  772. APP_LOAD_ADDR);
  773. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  774. if (ret) {
  775. ath6kl_err("Failed to write firmware: %d\n", ret);
  776. return ret;
  777. }
  778. /*
  779. * Set starting address for firmware
  780. * Don't need to setup app_start override addr on AR6004
  781. */
  782. if (ar->target_type != TARGET_TYPE_AR6004) {
  783. address = ath6kl_get_load_address(ar->version.target_ver,
  784. APP_START_OVERRIDE_ADDR);
  785. ath6kl_bmi_set_app_start(ar, address);
  786. }
  787. return ret;
  788. }
  789. static int ath6kl_upload_patch(struct ath6kl *ar)
  790. {
  791. const char *filename;
  792. u32 address, param;
  793. int ret;
  794. switch (ar->version.target_ver) {
  795. case AR6003_REV2_VERSION:
  796. filename = AR6003_REV2_PATCH_FILE;
  797. break;
  798. case AR6004_REV1_VERSION:
  799. /* FIXME: implement for AR6004 */
  800. return 0;
  801. break;
  802. default:
  803. filename = AR6003_REV3_PATCH_FILE;
  804. break;
  805. }
  806. if (ar->fw_patch == NULL) {
  807. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  808. &ar->fw_patch_len);
  809. if (ret) {
  810. ath6kl_err("Failed to get patch file %s: %d\n",
  811. filename, ret);
  812. return ret;
  813. }
  814. }
  815. address = ath6kl_get_load_address(ar->version.target_ver,
  816. DATASET_PATCH_ADDR);
  817. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  818. if (ret) {
  819. ath6kl_err("Failed to write patch file: %d\n", ret);
  820. return ret;
  821. }
  822. param = address;
  823. ath6kl_bmi_write(ar,
  824. ath6kl_get_hi_item_addr(ar,
  825. HI_ITEM(hi_dset_list_head)),
  826. (unsigned char *) &param, 4);
  827. return 0;
  828. }
  829. static int ath6kl_init_upload(struct ath6kl *ar)
  830. {
  831. u32 param, options, sleep, address;
  832. int status = 0;
  833. if (ar->target_type != TARGET_TYPE_AR6003 &&
  834. ar->target_type != TARGET_TYPE_AR6004)
  835. return -EINVAL;
  836. /* temporarily disable system sleep */
  837. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  838. status = ath6kl_bmi_reg_read(ar, address, &param);
  839. if (status)
  840. return status;
  841. options = param;
  842. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  843. status = ath6kl_bmi_reg_write(ar, address, param);
  844. if (status)
  845. return status;
  846. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  847. status = ath6kl_bmi_reg_read(ar, address, &param);
  848. if (status)
  849. return status;
  850. sleep = param;
  851. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  852. status = ath6kl_bmi_reg_write(ar, address, param);
  853. if (status)
  854. return status;
  855. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  856. options, sleep);
  857. /* program analog PLL register */
  858. /* no need to control 40/44MHz clock on AR6004 */
  859. if (ar->target_type != TARGET_TYPE_AR6004) {
  860. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  861. 0xF9104001);
  862. if (status)
  863. return status;
  864. /* Run at 80/88MHz by default */
  865. param = SM(CPU_CLOCK_STANDARD, 1);
  866. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  867. status = ath6kl_bmi_reg_write(ar, address, param);
  868. if (status)
  869. return status;
  870. }
  871. param = 0;
  872. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  873. param = SM(LPO_CAL_ENABLE, 1);
  874. status = ath6kl_bmi_reg_write(ar, address, param);
  875. if (status)
  876. return status;
  877. /* WAR to avoid SDIO CRC err */
  878. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  879. ath6kl_err("temporary war to avoid sdio crc error\n");
  880. param = 0x20;
  881. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  882. status = ath6kl_bmi_reg_write(ar, address, param);
  883. if (status)
  884. return status;
  885. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  886. status = ath6kl_bmi_reg_write(ar, address, param);
  887. if (status)
  888. return status;
  889. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  890. status = ath6kl_bmi_reg_write(ar, address, param);
  891. if (status)
  892. return status;
  893. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  894. status = ath6kl_bmi_reg_write(ar, address, param);
  895. if (status)
  896. return status;
  897. }
  898. /* write EEPROM data to Target RAM */
  899. status = ath6kl_upload_board_file(ar);
  900. if (status)
  901. return status;
  902. /* transfer One time Programmable data */
  903. status = ath6kl_upload_otp(ar);
  904. if (status)
  905. return status;
  906. /* Download Target firmware */
  907. status = ath6kl_upload_firmware(ar);
  908. if (status)
  909. return status;
  910. status = ath6kl_upload_patch(ar);
  911. if (status)
  912. return status;
  913. /* Restore system sleep */
  914. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  915. status = ath6kl_bmi_reg_write(ar, address, sleep);
  916. if (status)
  917. return status;
  918. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  919. param = options | 0x20;
  920. status = ath6kl_bmi_reg_write(ar, address, param);
  921. if (status)
  922. return status;
  923. /* Configure GPIO AR6003 UART */
  924. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  925. status = ath6kl_bmi_write(ar,
  926. ath6kl_get_hi_item_addr(ar,
  927. HI_ITEM(hi_dbg_uart_txpin)),
  928. (u8 *)&param, 4);
  929. return status;
  930. }
  931. static int ath6kl_init(struct net_device *dev)
  932. {
  933. struct ath6kl *ar = ath6kl_priv(dev);
  934. int status = 0;
  935. s32 timeleft;
  936. if (!ar)
  937. return -EIO;
  938. /* Do we need to finish the BMI phase */
  939. if (ath6kl_bmi_done(ar)) {
  940. status = -EIO;
  941. goto ath6kl_init_done;
  942. }
  943. /* Indicate that WMI is enabled (although not ready yet) */
  944. set_bit(WMI_ENABLED, &ar->flag);
  945. ar->wmi = ath6kl_wmi_init(ar);
  946. if (!ar->wmi) {
  947. ath6kl_err("failed to initialize wmi\n");
  948. status = -EIO;
  949. goto ath6kl_init_done;
  950. }
  951. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  952. wlan_node_table_init(&ar->scan_table);
  953. /*
  954. * The reason we have to wait for the target here is that the
  955. * driver layer has to init BMI in order to set the host block
  956. * size.
  957. */
  958. if (ath6kl_htc_wait_target(ar->htc_target)) {
  959. status = -EIO;
  960. goto err_node_cleanup;
  961. }
  962. if (ath6kl_init_service_ep(ar)) {
  963. status = -EIO;
  964. goto err_cleanup_scatter;
  965. }
  966. /* setup access class priority mappings */
  967. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  968. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  969. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  970. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  971. /* give our connected endpoints some buffers */
  972. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  973. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  974. /* allocate some buffers that handle larger AMSDU frames */
  975. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  976. /* setup credit distribution */
  977. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  978. ath6kl_cookie_init(ar);
  979. /* start HTC */
  980. status = ath6kl_htc_start(ar->htc_target);
  981. if (status) {
  982. ath6kl_cookie_cleanup(ar);
  983. goto err_rxbuf_cleanup;
  984. }
  985. /* Wait for Wmi event to be ready */
  986. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  987. test_bit(WMI_READY,
  988. &ar->flag),
  989. WMI_TIMEOUT);
  990. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  991. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  992. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  993. status = -EIO;
  994. goto err_htc_stop;
  995. }
  996. if (!timeleft || signal_pending(current)) {
  997. ath6kl_err("wmi is not ready or wait was interrupted\n");
  998. status = -EIO;
  999. goto err_htc_stop;
  1000. }
  1001. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1002. /* communicate the wmi protocol verision to the target */
  1003. if ((ath6kl_set_host_app_area(ar)) != 0)
  1004. ath6kl_err("unable to set the host app area\n");
  1005. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1006. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1007. status = ath6kl_target_config_wlan_params(ar);
  1008. if (!status)
  1009. goto ath6kl_init_done;
  1010. err_htc_stop:
  1011. ath6kl_htc_stop(ar->htc_target);
  1012. err_rxbuf_cleanup:
  1013. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1014. ath6kl_cleanup_amsdu_rxbufs(ar);
  1015. err_cleanup_scatter:
  1016. ath6kl_hif_cleanup_scatter(ar);
  1017. err_node_cleanup:
  1018. wlan_node_table_cleanup(&ar->scan_table);
  1019. ath6kl_wmi_shutdown(ar->wmi);
  1020. clear_bit(WMI_ENABLED, &ar->flag);
  1021. ar->wmi = NULL;
  1022. ath6kl_init_done:
  1023. return status;
  1024. }
  1025. int ath6kl_core_init(struct ath6kl *ar)
  1026. {
  1027. int ret = 0;
  1028. struct ath6kl_bmi_target_info targ_info;
  1029. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1030. if (!ar->ath6kl_wq)
  1031. return -ENOMEM;
  1032. ret = ath6kl_bmi_init(ar);
  1033. if (ret)
  1034. goto err_wq;
  1035. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1036. if (ret)
  1037. goto err_bmi_cleanup;
  1038. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1039. ar->target_type = le32_to_cpu(targ_info.type);
  1040. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1041. ret = ath6kl_configure_target(ar);
  1042. if (ret)
  1043. goto err_bmi_cleanup;
  1044. ar->htc_target = ath6kl_htc_create(ar);
  1045. if (!ar->htc_target) {
  1046. ret = -ENOMEM;
  1047. goto err_bmi_cleanup;
  1048. }
  1049. ar->aggr_cntxt = aggr_init(ar->net_dev);
  1050. if (!ar->aggr_cntxt) {
  1051. ath6kl_err("failed to initialize aggr\n");
  1052. ret = -ENOMEM;
  1053. goto err_htc_cleanup;
  1054. }
  1055. ret = ath6kl_init_upload(ar);
  1056. if (ret)
  1057. goto err_htc_cleanup;
  1058. ret = ath6kl_init(ar->net_dev);
  1059. if (ret)
  1060. goto err_htc_cleanup;
  1061. /* This runs the init function if registered */
  1062. ret = register_netdev(ar->net_dev);
  1063. if (ret) {
  1064. ath6kl_err("register_netdev failed\n");
  1065. ath6kl_destroy(ar->net_dev, 0);
  1066. return ret;
  1067. }
  1068. set_bit(NETDEV_REGISTERED, &ar->flag);
  1069. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1070. __func__, ar->net_dev->name, ar->net_dev, ar);
  1071. return ret;
  1072. err_htc_cleanup:
  1073. ath6kl_htc_cleanup(ar->htc_target);
  1074. err_bmi_cleanup:
  1075. ath6kl_bmi_cleanup(ar);
  1076. err_wq:
  1077. destroy_workqueue(ar->ath6kl_wq);
  1078. return ret;
  1079. }
  1080. void ath6kl_stop_txrx(struct ath6kl *ar)
  1081. {
  1082. struct net_device *ndev = ar->net_dev;
  1083. if (!ndev)
  1084. return;
  1085. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1086. if (down_interruptible(&ar->sem)) {
  1087. ath6kl_err("down_interruptible failed\n");
  1088. return;
  1089. }
  1090. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1091. ath6kl_stop_endpoint(ndev, false, true);
  1092. clear_bit(WLAN_ENABLED, &ar->flag);
  1093. }
  1094. /*
  1095. * We need to differentiate between the surprise and planned removal of the
  1096. * device because of the following consideration:
  1097. *
  1098. * - In case of surprise removal, the hcd already frees up the pending
  1099. * for the device and hence there is no need to unregister the function
  1100. * driver inorder to get these requests. For planned removal, the function
  1101. * driver has to explicitly unregister itself to have the hcd return all the
  1102. * pending requests before the data structures for the devices are freed up.
  1103. * Note that as per the current implementation, the function driver will
  1104. * end up releasing all the devices since there is no API to selectively
  1105. * release a particular device.
  1106. *
  1107. * - Certain commands issued to the target can be skipped for surprise
  1108. * removal since they will anyway not go through.
  1109. */
  1110. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1111. {
  1112. struct ath6kl *ar;
  1113. if (!dev || !ath6kl_priv(dev)) {
  1114. ath6kl_err("failed to get device structure\n");
  1115. return;
  1116. }
  1117. ar = ath6kl_priv(dev);
  1118. destroy_workqueue(ar->ath6kl_wq);
  1119. if (ar->htc_target)
  1120. ath6kl_htc_cleanup(ar->htc_target);
  1121. aggr_module_destroy(ar->aggr_cntxt);
  1122. ath6kl_cookie_cleanup(ar);
  1123. ath6kl_cleanup_amsdu_rxbufs(ar);
  1124. ath6kl_bmi_cleanup(ar);
  1125. ath6kl_debug_cleanup(ar);
  1126. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1127. unregister_netdev(dev);
  1128. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1129. }
  1130. free_netdev(dev);
  1131. wlan_node_table_cleanup(&ar->scan_table);
  1132. kfree(ar->fw_board);
  1133. kfree(ar->fw_otp);
  1134. kfree(ar->fw);
  1135. kfree(ar->fw_patch);
  1136. ath6kl_cfg80211_deinit(ar);
  1137. }