cciss.c 136 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/major.h>
  30. #include <linux/fs.h>
  31. #include <linux/bio.h>
  32. #include <linux/blkpg.h>
  33. #include <linux/timer.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/init.h>
  37. #include <linux/jiffies.h>
  38. #include <linux/hdreg.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/compat.h>
  41. #include <linux/mutex.h>
  42. #include <asm/uaccess.h>
  43. #include <asm/io.h>
  44. #include <linux/dma-mapping.h>
  45. #include <linux/blkdev.h>
  46. #include <linux/genhd.h>
  47. #include <linux/completion.h>
  48. #include <scsi/scsi.h>
  49. #include <scsi/sg.h>
  50. #include <scsi/scsi_ioctl.h>
  51. #include <linux/cdrom.h>
  52. #include <linux/scatterlist.h>
  53. #include <linux/kthread.h>
  54. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  55. #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
  56. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
  57. /* Embedded module documentation macros - see modules.h */
  58. MODULE_AUTHOR("Hewlett-Packard Company");
  59. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  60. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  61. MODULE_VERSION("3.6.26");
  62. MODULE_LICENSE("GPL");
  63. static DEFINE_MUTEX(cciss_mutex);
  64. static struct proc_dir_entry *proc_cciss;
  65. #include "cciss_cmd.h"
  66. #include "cciss.h"
  67. #include <linux/cciss_ioctl.h>
  68. /* define the PCI info for the cards we can control */
  69. static const struct pci_device_id cciss_pci_device_id[] = {
  70. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  71. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  72. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  73. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  77. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  78. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  90. {0,}
  91. };
  92. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  93. /* board_id = Subsystem Device ID & Vendor ID
  94. * product = Marketing Name for the board
  95. * access = Address of the struct of function pointers
  96. */
  97. static struct board_type products[] = {
  98. {0x40700E11, "Smart Array 5300", &SA5_access},
  99. {0x40800E11, "Smart Array 5i", &SA5B_access},
  100. {0x40820E11, "Smart Array 532", &SA5B_access},
  101. {0x40830E11, "Smart Array 5312", &SA5B_access},
  102. {0x409A0E11, "Smart Array 641", &SA5_access},
  103. {0x409B0E11, "Smart Array 642", &SA5_access},
  104. {0x409C0E11, "Smart Array 6400", &SA5_access},
  105. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  106. {0x40910E11, "Smart Array 6i", &SA5_access},
  107. {0x3225103C, "Smart Array P600", &SA5_access},
  108. {0x3223103C, "Smart Array P800", &SA5_access},
  109. {0x3234103C, "Smart Array P400", &SA5_access},
  110. {0x3235103C, "Smart Array P400i", &SA5_access},
  111. {0x3211103C, "Smart Array E200i", &SA5_access},
  112. {0x3212103C, "Smart Array E200", &SA5_access},
  113. {0x3213103C, "Smart Array E200i", &SA5_access},
  114. {0x3214103C, "Smart Array E200i", &SA5_access},
  115. {0x3215103C, "Smart Array E200i", &SA5_access},
  116. {0x3237103C, "Smart Array E500", &SA5_access},
  117. {0x3223103C, "Smart Array P800", &SA5_access},
  118. {0x3234103C, "Smart Array P400", &SA5_access},
  119. {0x323D103C, "Smart Array P700m", &SA5_access},
  120. };
  121. /* How long to wait (in milliseconds) for board to go into simple mode */
  122. #define MAX_CONFIG_WAIT 30000
  123. #define MAX_IOCTL_CONFIG_WAIT 1000
  124. /*define how many times we will try a command because of bus resets */
  125. #define MAX_CMD_RETRIES 3
  126. #define MAX_CTLR 32
  127. /* Originally cciss driver only supports 8 major numbers */
  128. #define MAX_CTLR_ORIG 8
  129. static ctlr_info_t *hba[MAX_CTLR];
  130. static struct task_struct *cciss_scan_thread;
  131. static DEFINE_MUTEX(scan_mutex);
  132. static LIST_HEAD(scan_q);
  133. static void do_cciss_request(struct request_queue *q);
  134. static irqreturn_t do_cciss_intx(int irq, void *dev_id);
  135. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
  136. static int cciss_open(struct block_device *bdev, fmode_t mode);
  137. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
  138. static int cciss_release(struct gendisk *disk, fmode_t mode);
  139. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  140. unsigned int cmd, unsigned long arg);
  141. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  142. unsigned int cmd, unsigned long arg);
  143. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  144. static int cciss_revalidate(struct gendisk *disk);
  145. static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
  146. static int deregister_disk(ctlr_info_t *h, int drv_index,
  147. int clear_all, int via_ioctl);
  148. static void cciss_read_capacity(ctlr_info_t *h, int logvol,
  149. sector_t *total_size, unsigned int *block_size);
  150. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  151. sector_t *total_size, unsigned int *block_size);
  152. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  153. sector_t total_size,
  154. unsigned int block_size, InquiryData_struct *inq_buff,
  155. drive_info_struct *drv);
  156. static void __devinit cciss_interrupt_mode(ctlr_info_t *);
  157. static void start_io(ctlr_info_t *h);
  158. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  159. __u8 page_code, unsigned char scsi3addr[],
  160. int cmd_type);
  161. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  162. int attempt_retry);
  163. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  164. static int add_to_scan_list(struct ctlr_info *h);
  165. static int scan_thread(void *data);
  166. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  167. static void cciss_hba_release(struct device *dev);
  168. static void cciss_device_release(struct device *dev);
  169. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
  170. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
  171. static inline u32 next_command(ctlr_info_t *h);
  172. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  173. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  174. u64 *cfg_offset);
  175. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  176. unsigned long *memory_bar);
  177. /* performant mode helper functions */
  178. static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
  179. int *bucket_map);
  180. static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
  181. #ifdef CONFIG_PROC_FS
  182. static void cciss_procinit(ctlr_info_t *h);
  183. #else
  184. static void cciss_procinit(ctlr_info_t *h)
  185. {
  186. }
  187. #endif /* CONFIG_PROC_FS */
  188. #ifdef CONFIG_COMPAT
  189. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  190. unsigned, unsigned long);
  191. #endif
  192. static const struct block_device_operations cciss_fops = {
  193. .owner = THIS_MODULE,
  194. .open = cciss_unlocked_open,
  195. .release = cciss_release,
  196. .ioctl = do_ioctl,
  197. .getgeo = cciss_getgeo,
  198. #ifdef CONFIG_COMPAT
  199. .compat_ioctl = cciss_compat_ioctl,
  200. #endif
  201. .revalidate_disk = cciss_revalidate,
  202. };
  203. /* set_performant_mode: Modify the tag for cciss performant
  204. * set bit 0 for pull model, bits 3-1 for block fetch
  205. * register number
  206. */
  207. static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
  208. {
  209. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  210. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  211. }
  212. /*
  213. * Enqueuing and dequeuing functions for cmdlists.
  214. */
  215. static inline void addQ(struct hlist_head *list, CommandList_struct *c)
  216. {
  217. hlist_add_head(&c->list, list);
  218. }
  219. static inline void removeQ(CommandList_struct *c)
  220. {
  221. /*
  222. * After kexec/dump some commands might still
  223. * be in flight, which the firmware will try
  224. * to complete. Resetting the firmware doesn't work
  225. * with old fw revisions, so we have to mark
  226. * them off as 'stale' to prevent the driver from
  227. * falling over.
  228. */
  229. if (WARN_ON(hlist_unhashed(&c->list))) {
  230. c->cmd_type = CMD_MSG_STALE;
  231. return;
  232. }
  233. hlist_del_init(&c->list);
  234. }
  235. static void enqueue_cmd_and_start_io(ctlr_info_t *h,
  236. CommandList_struct *c)
  237. {
  238. unsigned long flags;
  239. set_performant_mode(h, c);
  240. spin_lock_irqsave(&h->lock, flags);
  241. addQ(&h->reqQ, c);
  242. h->Qdepth++;
  243. if (h->Qdepth > h->maxQsinceinit)
  244. h->maxQsinceinit = h->Qdepth;
  245. start_io(h);
  246. spin_unlock_irqrestore(&h->lock, flags);
  247. }
  248. static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
  249. int nr_cmds)
  250. {
  251. int i;
  252. if (!cmd_sg_list)
  253. return;
  254. for (i = 0; i < nr_cmds; i++) {
  255. kfree(cmd_sg_list[i]);
  256. cmd_sg_list[i] = NULL;
  257. }
  258. kfree(cmd_sg_list);
  259. }
  260. static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
  261. ctlr_info_t *h, int chainsize, int nr_cmds)
  262. {
  263. int j;
  264. SGDescriptor_struct **cmd_sg_list;
  265. if (chainsize <= 0)
  266. return NULL;
  267. cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
  268. if (!cmd_sg_list)
  269. return NULL;
  270. /* Build up chain blocks for each command */
  271. for (j = 0; j < nr_cmds; j++) {
  272. /* Need a block of chainsized s/g elements. */
  273. cmd_sg_list[j] = kmalloc((chainsize *
  274. sizeof(*cmd_sg_list[j])), GFP_KERNEL);
  275. if (!cmd_sg_list[j]) {
  276. dev_err(&h->pdev->dev, "Cannot get memory "
  277. "for s/g chains.\n");
  278. goto clean;
  279. }
  280. }
  281. return cmd_sg_list;
  282. clean:
  283. cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
  284. return NULL;
  285. }
  286. static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
  287. {
  288. SGDescriptor_struct *chain_sg;
  289. u64bit temp64;
  290. if (c->Header.SGTotal <= h->max_cmd_sgentries)
  291. return;
  292. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  293. temp64.val32.lower = chain_sg->Addr.lower;
  294. temp64.val32.upper = chain_sg->Addr.upper;
  295. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  296. }
  297. static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
  298. SGDescriptor_struct *chain_block, int len)
  299. {
  300. SGDescriptor_struct *chain_sg;
  301. u64bit temp64;
  302. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  303. chain_sg->Ext = CCISS_SG_CHAIN;
  304. chain_sg->Len = len;
  305. temp64.val = pci_map_single(h->pdev, chain_block, len,
  306. PCI_DMA_TODEVICE);
  307. chain_sg->Addr.lower = temp64.val32.lower;
  308. chain_sg->Addr.upper = temp64.val32.upper;
  309. }
  310. #include "cciss_scsi.c" /* For SCSI tape support */
  311. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  312. "UNKNOWN"
  313. };
  314. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
  315. #ifdef CONFIG_PROC_FS
  316. /*
  317. * Report information about this controller.
  318. */
  319. #define ENG_GIG 1000000000
  320. #define ENG_GIG_FACTOR (ENG_GIG/512)
  321. #define ENGAGE_SCSI "engage scsi"
  322. static void cciss_seq_show_header(struct seq_file *seq)
  323. {
  324. ctlr_info_t *h = seq->private;
  325. seq_printf(seq, "%s: HP %s Controller\n"
  326. "Board ID: 0x%08lx\n"
  327. "Firmware Version: %c%c%c%c\n"
  328. "IRQ: %d\n"
  329. "Logical drives: %d\n"
  330. "Current Q depth: %d\n"
  331. "Current # commands on controller: %d\n"
  332. "Max Q depth since init: %d\n"
  333. "Max # commands on controller since init: %d\n"
  334. "Max SG entries since init: %d\n",
  335. h->devname,
  336. h->product_name,
  337. (unsigned long)h->board_id,
  338. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  339. h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
  340. h->num_luns,
  341. h->Qdepth, h->commands_outstanding,
  342. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  343. #ifdef CONFIG_CISS_SCSI_TAPE
  344. cciss_seq_tape_report(seq, h);
  345. #endif /* CONFIG_CISS_SCSI_TAPE */
  346. }
  347. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  348. {
  349. ctlr_info_t *h = seq->private;
  350. unsigned long flags;
  351. /* prevent displaying bogus info during configuration
  352. * or deconfiguration of a logical volume
  353. */
  354. spin_lock_irqsave(&h->lock, flags);
  355. if (h->busy_configuring) {
  356. spin_unlock_irqrestore(&h->lock, flags);
  357. return ERR_PTR(-EBUSY);
  358. }
  359. h->busy_configuring = 1;
  360. spin_unlock_irqrestore(&h->lock, flags);
  361. if (*pos == 0)
  362. cciss_seq_show_header(seq);
  363. return pos;
  364. }
  365. static int cciss_seq_show(struct seq_file *seq, void *v)
  366. {
  367. sector_t vol_sz, vol_sz_frac;
  368. ctlr_info_t *h = seq->private;
  369. unsigned ctlr = h->ctlr;
  370. loff_t *pos = v;
  371. drive_info_struct *drv = h->drv[*pos];
  372. if (*pos > h->highest_lun)
  373. return 0;
  374. if (drv == NULL) /* it's possible for h->drv[] to have holes. */
  375. return 0;
  376. if (drv->heads == 0)
  377. return 0;
  378. vol_sz = drv->nr_blocks;
  379. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  380. vol_sz_frac *= 100;
  381. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  382. if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
  383. drv->raid_level = RAID_UNKNOWN;
  384. seq_printf(seq, "cciss/c%dd%d:"
  385. "\t%4u.%02uGB\tRAID %s\n",
  386. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  387. raid_label[drv->raid_level]);
  388. return 0;
  389. }
  390. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  391. {
  392. ctlr_info_t *h = seq->private;
  393. if (*pos > h->highest_lun)
  394. return NULL;
  395. *pos += 1;
  396. return pos;
  397. }
  398. static void cciss_seq_stop(struct seq_file *seq, void *v)
  399. {
  400. ctlr_info_t *h = seq->private;
  401. /* Only reset h->busy_configuring if we succeeded in setting
  402. * it during cciss_seq_start. */
  403. if (v == ERR_PTR(-EBUSY))
  404. return;
  405. h->busy_configuring = 0;
  406. }
  407. static const struct seq_operations cciss_seq_ops = {
  408. .start = cciss_seq_start,
  409. .show = cciss_seq_show,
  410. .next = cciss_seq_next,
  411. .stop = cciss_seq_stop,
  412. };
  413. static int cciss_seq_open(struct inode *inode, struct file *file)
  414. {
  415. int ret = seq_open(file, &cciss_seq_ops);
  416. struct seq_file *seq = file->private_data;
  417. if (!ret)
  418. seq->private = PDE(inode)->data;
  419. return ret;
  420. }
  421. static ssize_t
  422. cciss_proc_write(struct file *file, const char __user *buf,
  423. size_t length, loff_t *ppos)
  424. {
  425. int err;
  426. char *buffer;
  427. #ifndef CONFIG_CISS_SCSI_TAPE
  428. return -EINVAL;
  429. #endif
  430. if (!buf || length > PAGE_SIZE - 1)
  431. return -EINVAL;
  432. buffer = (char *)__get_free_page(GFP_KERNEL);
  433. if (!buffer)
  434. return -ENOMEM;
  435. err = -EFAULT;
  436. if (copy_from_user(buffer, buf, length))
  437. goto out;
  438. buffer[length] = '\0';
  439. #ifdef CONFIG_CISS_SCSI_TAPE
  440. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  441. struct seq_file *seq = file->private_data;
  442. ctlr_info_t *h = seq->private;
  443. err = cciss_engage_scsi(h);
  444. if (err == 0)
  445. err = length;
  446. } else
  447. #endif /* CONFIG_CISS_SCSI_TAPE */
  448. err = -EINVAL;
  449. /* might be nice to have "disengage" too, but it's not
  450. safely possible. (only 1 module use count, lock issues.) */
  451. out:
  452. free_page((unsigned long)buffer);
  453. return err;
  454. }
  455. static const struct file_operations cciss_proc_fops = {
  456. .owner = THIS_MODULE,
  457. .open = cciss_seq_open,
  458. .read = seq_read,
  459. .llseek = seq_lseek,
  460. .release = seq_release,
  461. .write = cciss_proc_write,
  462. };
  463. static void __devinit cciss_procinit(ctlr_info_t *h)
  464. {
  465. struct proc_dir_entry *pde;
  466. if (proc_cciss == NULL)
  467. proc_cciss = proc_mkdir("driver/cciss", NULL);
  468. if (!proc_cciss)
  469. return;
  470. pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  471. S_IROTH, proc_cciss,
  472. &cciss_proc_fops, h);
  473. }
  474. #endif /* CONFIG_PROC_FS */
  475. #define MAX_PRODUCT_NAME_LEN 19
  476. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  477. #define to_drv(n) container_of(n, drive_info_struct, dev)
  478. static ssize_t host_store_rescan(struct device *dev,
  479. struct device_attribute *attr,
  480. const char *buf, size_t count)
  481. {
  482. struct ctlr_info *h = to_hba(dev);
  483. add_to_scan_list(h);
  484. wake_up_process(cciss_scan_thread);
  485. wait_for_completion_interruptible(&h->scan_wait);
  486. return count;
  487. }
  488. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  489. static ssize_t dev_show_unique_id(struct device *dev,
  490. struct device_attribute *attr,
  491. char *buf)
  492. {
  493. drive_info_struct *drv = to_drv(dev);
  494. struct ctlr_info *h = to_hba(drv->dev.parent);
  495. __u8 sn[16];
  496. unsigned long flags;
  497. int ret = 0;
  498. spin_lock_irqsave(&h->lock, flags);
  499. if (h->busy_configuring)
  500. ret = -EBUSY;
  501. else
  502. memcpy(sn, drv->serial_no, sizeof(sn));
  503. spin_unlock_irqrestore(&h->lock, flags);
  504. if (ret)
  505. return ret;
  506. else
  507. return snprintf(buf, 16 * 2 + 2,
  508. "%02X%02X%02X%02X%02X%02X%02X%02X"
  509. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  510. sn[0], sn[1], sn[2], sn[3],
  511. sn[4], sn[5], sn[6], sn[7],
  512. sn[8], sn[9], sn[10], sn[11],
  513. sn[12], sn[13], sn[14], sn[15]);
  514. }
  515. static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  516. static ssize_t dev_show_vendor(struct device *dev,
  517. struct device_attribute *attr,
  518. char *buf)
  519. {
  520. drive_info_struct *drv = to_drv(dev);
  521. struct ctlr_info *h = to_hba(drv->dev.parent);
  522. char vendor[VENDOR_LEN + 1];
  523. unsigned long flags;
  524. int ret = 0;
  525. spin_lock_irqsave(&h->lock, flags);
  526. if (h->busy_configuring)
  527. ret = -EBUSY;
  528. else
  529. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  530. spin_unlock_irqrestore(&h->lock, flags);
  531. if (ret)
  532. return ret;
  533. else
  534. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  535. }
  536. static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  537. static ssize_t dev_show_model(struct device *dev,
  538. struct device_attribute *attr,
  539. char *buf)
  540. {
  541. drive_info_struct *drv = to_drv(dev);
  542. struct ctlr_info *h = to_hba(drv->dev.parent);
  543. char model[MODEL_LEN + 1];
  544. unsigned long flags;
  545. int ret = 0;
  546. spin_lock_irqsave(&h->lock, flags);
  547. if (h->busy_configuring)
  548. ret = -EBUSY;
  549. else
  550. memcpy(model, drv->model, MODEL_LEN + 1);
  551. spin_unlock_irqrestore(&h->lock, flags);
  552. if (ret)
  553. return ret;
  554. else
  555. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  556. }
  557. static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  558. static ssize_t dev_show_rev(struct device *dev,
  559. struct device_attribute *attr,
  560. char *buf)
  561. {
  562. drive_info_struct *drv = to_drv(dev);
  563. struct ctlr_info *h = to_hba(drv->dev.parent);
  564. char rev[REV_LEN + 1];
  565. unsigned long flags;
  566. int ret = 0;
  567. spin_lock_irqsave(&h->lock, flags);
  568. if (h->busy_configuring)
  569. ret = -EBUSY;
  570. else
  571. memcpy(rev, drv->rev, REV_LEN + 1);
  572. spin_unlock_irqrestore(&h->lock, flags);
  573. if (ret)
  574. return ret;
  575. else
  576. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  577. }
  578. static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  579. static ssize_t cciss_show_lunid(struct device *dev,
  580. struct device_attribute *attr, char *buf)
  581. {
  582. drive_info_struct *drv = to_drv(dev);
  583. struct ctlr_info *h = to_hba(drv->dev.parent);
  584. unsigned long flags;
  585. unsigned char lunid[8];
  586. spin_lock_irqsave(&h->lock, flags);
  587. if (h->busy_configuring) {
  588. spin_unlock_irqrestore(&h->lock, flags);
  589. return -EBUSY;
  590. }
  591. if (!drv->heads) {
  592. spin_unlock_irqrestore(&h->lock, flags);
  593. return -ENOTTY;
  594. }
  595. memcpy(lunid, drv->LunID, sizeof(lunid));
  596. spin_unlock_irqrestore(&h->lock, flags);
  597. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  598. lunid[0], lunid[1], lunid[2], lunid[3],
  599. lunid[4], lunid[5], lunid[6], lunid[7]);
  600. }
  601. static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
  602. static ssize_t cciss_show_raid_level(struct device *dev,
  603. struct device_attribute *attr, char *buf)
  604. {
  605. drive_info_struct *drv = to_drv(dev);
  606. struct ctlr_info *h = to_hba(drv->dev.parent);
  607. int raid;
  608. unsigned long flags;
  609. spin_lock_irqsave(&h->lock, flags);
  610. if (h->busy_configuring) {
  611. spin_unlock_irqrestore(&h->lock, flags);
  612. return -EBUSY;
  613. }
  614. raid = drv->raid_level;
  615. spin_unlock_irqrestore(&h->lock, flags);
  616. if (raid < 0 || raid > RAID_UNKNOWN)
  617. raid = RAID_UNKNOWN;
  618. return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
  619. raid_label[raid]);
  620. }
  621. static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
  622. static ssize_t cciss_show_usage_count(struct device *dev,
  623. struct device_attribute *attr, char *buf)
  624. {
  625. drive_info_struct *drv = to_drv(dev);
  626. struct ctlr_info *h = to_hba(drv->dev.parent);
  627. unsigned long flags;
  628. int count;
  629. spin_lock_irqsave(&h->lock, flags);
  630. if (h->busy_configuring) {
  631. spin_unlock_irqrestore(&h->lock, flags);
  632. return -EBUSY;
  633. }
  634. count = drv->usage_count;
  635. spin_unlock_irqrestore(&h->lock, flags);
  636. return snprintf(buf, 20, "%d\n", count);
  637. }
  638. static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
  639. static struct attribute *cciss_host_attrs[] = {
  640. &dev_attr_rescan.attr,
  641. NULL
  642. };
  643. static struct attribute_group cciss_host_attr_group = {
  644. .attrs = cciss_host_attrs,
  645. };
  646. static const struct attribute_group *cciss_host_attr_groups[] = {
  647. &cciss_host_attr_group,
  648. NULL
  649. };
  650. static struct device_type cciss_host_type = {
  651. .name = "cciss_host",
  652. .groups = cciss_host_attr_groups,
  653. .release = cciss_hba_release,
  654. };
  655. static struct attribute *cciss_dev_attrs[] = {
  656. &dev_attr_unique_id.attr,
  657. &dev_attr_model.attr,
  658. &dev_attr_vendor.attr,
  659. &dev_attr_rev.attr,
  660. &dev_attr_lunid.attr,
  661. &dev_attr_raid_level.attr,
  662. &dev_attr_usage_count.attr,
  663. NULL
  664. };
  665. static struct attribute_group cciss_dev_attr_group = {
  666. .attrs = cciss_dev_attrs,
  667. };
  668. static const struct attribute_group *cciss_dev_attr_groups[] = {
  669. &cciss_dev_attr_group,
  670. NULL
  671. };
  672. static struct device_type cciss_dev_type = {
  673. .name = "cciss_device",
  674. .groups = cciss_dev_attr_groups,
  675. .release = cciss_device_release,
  676. };
  677. static struct bus_type cciss_bus_type = {
  678. .name = "cciss",
  679. };
  680. /*
  681. * cciss_hba_release is called when the reference count
  682. * of h->dev goes to zero.
  683. */
  684. static void cciss_hba_release(struct device *dev)
  685. {
  686. /*
  687. * nothing to do, but need this to avoid a warning
  688. * about not having a release handler from lib/kref.c.
  689. */
  690. }
  691. /*
  692. * Initialize sysfs entry for each controller. This sets up and registers
  693. * the 'cciss#' directory for each individual controller under
  694. * /sys/bus/pci/devices/<dev>/.
  695. */
  696. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  697. {
  698. device_initialize(&h->dev);
  699. h->dev.type = &cciss_host_type;
  700. h->dev.bus = &cciss_bus_type;
  701. dev_set_name(&h->dev, "%s", h->devname);
  702. h->dev.parent = &h->pdev->dev;
  703. return device_add(&h->dev);
  704. }
  705. /*
  706. * Remove sysfs entries for an hba.
  707. */
  708. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  709. {
  710. device_del(&h->dev);
  711. put_device(&h->dev); /* final put. */
  712. }
  713. /* cciss_device_release is called when the reference count
  714. * of h->drv[x]dev goes to zero.
  715. */
  716. static void cciss_device_release(struct device *dev)
  717. {
  718. drive_info_struct *drv = to_drv(dev);
  719. kfree(drv);
  720. }
  721. /*
  722. * Initialize sysfs for each logical drive. This sets up and registers
  723. * the 'c#d#' directory for each individual logical drive under
  724. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  725. * /sys/block/cciss!c#d# to this entry.
  726. */
  727. static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  728. int drv_index)
  729. {
  730. struct device *dev;
  731. if (h->drv[drv_index]->device_initialized)
  732. return 0;
  733. dev = &h->drv[drv_index]->dev;
  734. device_initialize(dev);
  735. dev->type = &cciss_dev_type;
  736. dev->bus = &cciss_bus_type;
  737. dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
  738. dev->parent = &h->dev;
  739. h->drv[drv_index]->device_initialized = 1;
  740. return device_add(dev);
  741. }
  742. /*
  743. * Remove sysfs entries for a logical drive.
  744. */
  745. static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
  746. int ctlr_exiting)
  747. {
  748. struct device *dev = &h->drv[drv_index]->dev;
  749. /* special case for c*d0, we only destroy it on controller exit */
  750. if (drv_index == 0 && !ctlr_exiting)
  751. return;
  752. device_del(dev);
  753. put_device(dev); /* the "final" put. */
  754. h->drv[drv_index] = NULL;
  755. }
  756. /*
  757. * For operations that cannot sleep, a command block is allocated at init,
  758. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  759. * which ones are free or in use.
  760. */
  761. static CommandList_struct *cmd_alloc(ctlr_info_t *h)
  762. {
  763. CommandList_struct *c;
  764. int i;
  765. u64bit temp64;
  766. dma_addr_t cmd_dma_handle, err_dma_handle;
  767. do {
  768. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  769. if (i == h->nr_cmds)
  770. return NULL;
  771. } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
  772. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  773. c = h->cmd_pool + i;
  774. memset(c, 0, sizeof(CommandList_struct));
  775. cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
  776. c->err_info = h->errinfo_pool + i;
  777. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  778. err_dma_handle = h->errinfo_pool_dhandle
  779. + i * sizeof(ErrorInfo_struct);
  780. h->nr_allocs++;
  781. c->cmdindex = i;
  782. INIT_HLIST_NODE(&c->list);
  783. c->busaddr = (__u32) cmd_dma_handle;
  784. temp64.val = (__u64) err_dma_handle;
  785. c->ErrDesc.Addr.lower = temp64.val32.lower;
  786. c->ErrDesc.Addr.upper = temp64.val32.upper;
  787. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  788. c->ctlr = h->ctlr;
  789. return c;
  790. }
  791. /* allocate a command using pci_alloc_consistent, used for ioctls,
  792. * etc., not for the main i/o path.
  793. */
  794. static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
  795. {
  796. CommandList_struct *c;
  797. u64bit temp64;
  798. dma_addr_t cmd_dma_handle, err_dma_handle;
  799. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  800. sizeof(CommandList_struct), &cmd_dma_handle);
  801. if (c == NULL)
  802. return NULL;
  803. memset(c, 0, sizeof(CommandList_struct));
  804. c->cmdindex = -1;
  805. c->err_info = (ErrorInfo_struct *)
  806. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  807. &err_dma_handle);
  808. if (c->err_info == NULL) {
  809. pci_free_consistent(h->pdev,
  810. sizeof(CommandList_struct), c, cmd_dma_handle);
  811. return NULL;
  812. }
  813. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  814. INIT_HLIST_NODE(&c->list);
  815. c->busaddr = (__u32) cmd_dma_handle;
  816. temp64.val = (__u64) err_dma_handle;
  817. c->ErrDesc.Addr.lower = temp64.val32.lower;
  818. c->ErrDesc.Addr.upper = temp64.val32.upper;
  819. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  820. c->ctlr = h->ctlr;
  821. return c;
  822. }
  823. static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
  824. {
  825. int i;
  826. i = c - h->cmd_pool;
  827. clear_bit(i & (BITS_PER_LONG - 1),
  828. h->cmd_pool_bits + (i / BITS_PER_LONG));
  829. h->nr_frees++;
  830. }
  831. static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
  832. {
  833. u64bit temp64;
  834. temp64.val32.lower = c->ErrDesc.Addr.lower;
  835. temp64.val32.upper = c->ErrDesc.Addr.upper;
  836. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  837. c->err_info, (dma_addr_t) temp64.val);
  838. pci_free_consistent(h->pdev, sizeof(CommandList_struct),
  839. c, (dma_addr_t) c->busaddr);
  840. }
  841. static inline ctlr_info_t *get_host(struct gendisk *disk)
  842. {
  843. return disk->queue->queuedata;
  844. }
  845. static inline drive_info_struct *get_drv(struct gendisk *disk)
  846. {
  847. return disk->private_data;
  848. }
  849. /*
  850. * Open. Make sure the device is really there.
  851. */
  852. static int cciss_open(struct block_device *bdev, fmode_t mode)
  853. {
  854. ctlr_info_t *h = get_host(bdev->bd_disk);
  855. drive_info_struct *drv = get_drv(bdev->bd_disk);
  856. dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
  857. if (drv->busy_configuring)
  858. return -EBUSY;
  859. /*
  860. * Root is allowed to open raw volume zero even if it's not configured
  861. * so array config can still work. Root is also allowed to open any
  862. * volume that has a LUN ID, so it can issue IOCTL to reread the
  863. * disk information. I don't think I really like this
  864. * but I'm already using way to many device nodes to claim another one
  865. * for "raw controller".
  866. */
  867. if (drv->heads == 0) {
  868. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  869. /* if not node 0 make sure it is a partition = 0 */
  870. if (MINOR(bdev->bd_dev) & 0x0f) {
  871. return -ENXIO;
  872. /* if it is, make sure we have a LUN ID */
  873. } else if (memcmp(drv->LunID, CTLR_LUNID,
  874. sizeof(drv->LunID))) {
  875. return -ENXIO;
  876. }
  877. }
  878. if (!capable(CAP_SYS_ADMIN))
  879. return -EPERM;
  880. }
  881. drv->usage_count++;
  882. h->usage_count++;
  883. return 0;
  884. }
  885. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
  886. {
  887. int ret;
  888. mutex_lock(&cciss_mutex);
  889. ret = cciss_open(bdev, mode);
  890. mutex_unlock(&cciss_mutex);
  891. return ret;
  892. }
  893. /*
  894. * Close. Sync first.
  895. */
  896. static int cciss_release(struct gendisk *disk, fmode_t mode)
  897. {
  898. ctlr_info_t *h;
  899. drive_info_struct *drv;
  900. mutex_lock(&cciss_mutex);
  901. h = get_host(disk);
  902. drv = get_drv(disk);
  903. dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
  904. drv->usage_count--;
  905. h->usage_count--;
  906. mutex_unlock(&cciss_mutex);
  907. return 0;
  908. }
  909. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  910. unsigned cmd, unsigned long arg)
  911. {
  912. int ret;
  913. mutex_lock(&cciss_mutex);
  914. ret = cciss_ioctl(bdev, mode, cmd, arg);
  915. mutex_unlock(&cciss_mutex);
  916. return ret;
  917. }
  918. #ifdef CONFIG_COMPAT
  919. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  920. unsigned cmd, unsigned long arg);
  921. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  922. unsigned cmd, unsigned long arg);
  923. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  924. unsigned cmd, unsigned long arg)
  925. {
  926. switch (cmd) {
  927. case CCISS_GETPCIINFO:
  928. case CCISS_GETINTINFO:
  929. case CCISS_SETINTINFO:
  930. case CCISS_GETNODENAME:
  931. case CCISS_SETNODENAME:
  932. case CCISS_GETHEARTBEAT:
  933. case CCISS_GETBUSTYPES:
  934. case CCISS_GETFIRMVER:
  935. case CCISS_GETDRIVVER:
  936. case CCISS_REVALIDVOLS:
  937. case CCISS_DEREGDISK:
  938. case CCISS_REGNEWDISK:
  939. case CCISS_REGNEWD:
  940. case CCISS_RESCANDISK:
  941. case CCISS_GETLUNINFO:
  942. return do_ioctl(bdev, mode, cmd, arg);
  943. case CCISS_PASSTHRU32:
  944. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  945. case CCISS_BIG_PASSTHRU32:
  946. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  947. default:
  948. return -ENOIOCTLCMD;
  949. }
  950. }
  951. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  952. unsigned cmd, unsigned long arg)
  953. {
  954. IOCTL32_Command_struct __user *arg32 =
  955. (IOCTL32_Command_struct __user *) arg;
  956. IOCTL_Command_struct arg64;
  957. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  958. int err;
  959. u32 cp;
  960. err = 0;
  961. err |=
  962. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  963. sizeof(arg64.LUN_info));
  964. err |=
  965. copy_from_user(&arg64.Request, &arg32->Request,
  966. sizeof(arg64.Request));
  967. err |=
  968. copy_from_user(&arg64.error_info, &arg32->error_info,
  969. sizeof(arg64.error_info));
  970. err |= get_user(arg64.buf_size, &arg32->buf_size);
  971. err |= get_user(cp, &arg32->buf);
  972. arg64.buf = compat_ptr(cp);
  973. err |= copy_to_user(p, &arg64, sizeof(arg64));
  974. if (err)
  975. return -EFAULT;
  976. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  977. if (err)
  978. return err;
  979. err |=
  980. copy_in_user(&arg32->error_info, &p->error_info,
  981. sizeof(arg32->error_info));
  982. if (err)
  983. return -EFAULT;
  984. return err;
  985. }
  986. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  987. unsigned cmd, unsigned long arg)
  988. {
  989. BIG_IOCTL32_Command_struct __user *arg32 =
  990. (BIG_IOCTL32_Command_struct __user *) arg;
  991. BIG_IOCTL_Command_struct arg64;
  992. BIG_IOCTL_Command_struct __user *p =
  993. compat_alloc_user_space(sizeof(arg64));
  994. int err;
  995. u32 cp;
  996. memset(&arg64, 0, sizeof(arg64));
  997. err = 0;
  998. err |=
  999. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  1000. sizeof(arg64.LUN_info));
  1001. err |=
  1002. copy_from_user(&arg64.Request, &arg32->Request,
  1003. sizeof(arg64.Request));
  1004. err |=
  1005. copy_from_user(&arg64.error_info, &arg32->error_info,
  1006. sizeof(arg64.error_info));
  1007. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1008. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  1009. err |= get_user(cp, &arg32->buf);
  1010. arg64.buf = compat_ptr(cp);
  1011. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1012. if (err)
  1013. return -EFAULT;
  1014. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  1015. if (err)
  1016. return err;
  1017. err |=
  1018. copy_in_user(&arg32->error_info, &p->error_info,
  1019. sizeof(arg32->error_info));
  1020. if (err)
  1021. return -EFAULT;
  1022. return err;
  1023. }
  1024. #endif
  1025. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  1026. {
  1027. drive_info_struct *drv = get_drv(bdev->bd_disk);
  1028. if (!drv->cylinders)
  1029. return -ENXIO;
  1030. geo->heads = drv->heads;
  1031. geo->sectors = drv->sectors;
  1032. geo->cylinders = drv->cylinders;
  1033. return 0;
  1034. }
  1035. static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  1036. {
  1037. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1038. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  1039. (void)check_for_unit_attention(h, c);
  1040. }
  1041. static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
  1042. {
  1043. cciss_pci_info_struct pciinfo;
  1044. if (!argp)
  1045. return -EINVAL;
  1046. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  1047. pciinfo.bus = h->pdev->bus->number;
  1048. pciinfo.dev_fn = h->pdev->devfn;
  1049. pciinfo.board_id = h->board_id;
  1050. if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  1051. return -EFAULT;
  1052. return 0;
  1053. }
  1054. static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
  1055. {
  1056. cciss_coalint_struct intinfo;
  1057. if (!argp)
  1058. return -EINVAL;
  1059. intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
  1060. intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
  1061. if (copy_to_user
  1062. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  1063. return -EFAULT;
  1064. return 0;
  1065. }
  1066. static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
  1067. {
  1068. cciss_coalint_struct intinfo;
  1069. unsigned long flags;
  1070. int i;
  1071. if (!argp)
  1072. return -EINVAL;
  1073. if (!capable(CAP_SYS_ADMIN))
  1074. return -EPERM;
  1075. if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
  1076. return -EFAULT;
  1077. if ((intinfo.delay == 0) && (intinfo.count == 0))
  1078. return -EINVAL;
  1079. spin_lock_irqsave(&h->lock, flags);
  1080. /* Update the field, and then ring the doorbell */
  1081. writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
  1082. writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
  1083. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1084. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1085. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  1086. break;
  1087. udelay(1000); /* delay and try again */
  1088. }
  1089. spin_unlock_irqrestore(&h->lock, flags);
  1090. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1091. return -EAGAIN;
  1092. return 0;
  1093. }
  1094. static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
  1095. {
  1096. NodeName_type NodeName;
  1097. int i;
  1098. if (!argp)
  1099. return -EINVAL;
  1100. for (i = 0; i < 16; i++)
  1101. NodeName[i] = readb(&h->cfgtable->ServerName[i]);
  1102. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  1103. return -EFAULT;
  1104. return 0;
  1105. }
  1106. static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
  1107. {
  1108. NodeName_type NodeName;
  1109. unsigned long flags;
  1110. int i;
  1111. if (!argp)
  1112. return -EINVAL;
  1113. if (!capable(CAP_SYS_ADMIN))
  1114. return -EPERM;
  1115. if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
  1116. return -EFAULT;
  1117. spin_lock_irqsave(&h->lock, flags);
  1118. /* Update the field, and then ring the doorbell */
  1119. for (i = 0; i < 16; i++)
  1120. writeb(NodeName[i], &h->cfgtable->ServerName[i]);
  1121. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1122. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1123. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  1124. break;
  1125. udelay(1000); /* delay and try again */
  1126. }
  1127. spin_unlock_irqrestore(&h->lock, flags);
  1128. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1129. return -EAGAIN;
  1130. return 0;
  1131. }
  1132. static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
  1133. {
  1134. Heartbeat_type heartbeat;
  1135. if (!argp)
  1136. return -EINVAL;
  1137. heartbeat = readl(&h->cfgtable->HeartBeat);
  1138. if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
  1139. return -EFAULT;
  1140. return 0;
  1141. }
  1142. static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
  1143. {
  1144. BusTypes_type BusTypes;
  1145. if (!argp)
  1146. return -EINVAL;
  1147. BusTypes = readl(&h->cfgtable->BusTypes);
  1148. if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
  1149. return -EFAULT;
  1150. return 0;
  1151. }
  1152. static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
  1153. {
  1154. FirmwareVer_type firmware;
  1155. if (!argp)
  1156. return -EINVAL;
  1157. memcpy(firmware, h->firm_ver, 4);
  1158. if (copy_to_user
  1159. (argp, firmware, sizeof(FirmwareVer_type)))
  1160. return -EFAULT;
  1161. return 0;
  1162. }
  1163. static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
  1164. {
  1165. DriverVer_type DriverVer = DRIVER_VERSION;
  1166. if (!argp)
  1167. return -EINVAL;
  1168. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  1169. return -EFAULT;
  1170. return 0;
  1171. }
  1172. static int cciss_getluninfo(ctlr_info_t *h,
  1173. struct gendisk *disk, void __user *argp)
  1174. {
  1175. LogvolInfo_struct luninfo;
  1176. drive_info_struct *drv = get_drv(disk);
  1177. if (!argp)
  1178. return -EINVAL;
  1179. memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
  1180. luninfo.num_opens = drv->usage_count;
  1181. luninfo.num_parts = 0;
  1182. if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
  1183. return -EFAULT;
  1184. return 0;
  1185. }
  1186. static int cciss_passthru(ctlr_info_t *h, void __user *argp)
  1187. {
  1188. IOCTL_Command_struct iocommand;
  1189. CommandList_struct *c;
  1190. char *buff = NULL;
  1191. u64bit temp64;
  1192. DECLARE_COMPLETION_ONSTACK(wait);
  1193. if (!argp)
  1194. return -EINVAL;
  1195. if (!capable(CAP_SYS_RAWIO))
  1196. return -EPERM;
  1197. if (copy_from_user
  1198. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1199. return -EFAULT;
  1200. if ((iocommand.buf_size < 1) &&
  1201. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1202. return -EINVAL;
  1203. }
  1204. if (iocommand.buf_size > 0) {
  1205. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1206. if (buff == NULL)
  1207. return -EFAULT;
  1208. }
  1209. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1210. /* Copy the data into the buffer we created */
  1211. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  1212. kfree(buff);
  1213. return -EFAULT;
  1214. }
  1215. } else {
  1216. memset(buff, 0, iocommand.buf_size);
  1217. }
  1218. c = cmd_special_alloc(h);
  1219. if (!c) {
  1220. kfree(buff);
  1221. return -ENOMEM;
  1222. }
  1223. /* Fill in the command type */
  1224. c->cmd_type = CMD_IOCTL_PEND;
  1225. /* Fill in Command Header */
  1226. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1227. if (iocommand.buf_size > 0) { /* buffer to fill */
  1228. c->Header.SGList = 1;
  1229. c->Header.SGTotal = 1;
  1230. } else { /* no buffers to fill */
  1231. c->Header.SGList = 0;
  1232. c->Header.SGTotal = 0;
  1233. }
  1234. c->Header.LUN = iocommand.LUN_info;
  1235. /* use the kernel address the cmd block for tag */
  1236. c->Header.Tag.lower = c->busaddr;
  1237. /* Fill in Request block */
  1238. c->Request = iocommand.Request;
  1239. /* Fill in the scatter gather information */
  1240. if (iocommand.buf_size > 0) {
  1241. temp64.val = pci_map_single(h->pdev, buff,
  1242. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  1243. c->SG[0].Addr.lower = temp64.val32.lower;
  1244. c->SG[0].Addr.upper = temp64.val32.upper;
  1245. c->SG[0].Len = iocommand.buf_size;
  1246. c->SG[0].Ext = 0; /* we are not chaining */
  1247. }
  1248. c->waiting = &wait;
  1249. enqueue_cmd_and_start_io(h, c);
  1250. wait_for_completion(&wait);
  1251. /* unlock the buffers from DMA */
  1252. temp64.val32.lower = c->SG[0].Addr.lower;
  1253. temp64.val32.upper = c->SG[0].Addr.upper;
  1254. pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
  1255. PCI_DMA_BIDIRECTIONAL);
  1256. check_ioctl_unit_attention(h, c);
  1257. /* Copy the error information out */
  1258. iocommand.error_info = *(c->err_info);
  1259. if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1260. kfree(buff);
  1261. cmd_special_free(h, c);
  1262. return -EFAULT;
  1263. }
  1264. if (iocommand.Request.Type.Direction == XFER_READ) {
  1265. /* Copy the data out of the buffer we created */
  1266. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  1267. kfree(buff);
  1268. cmd_special_free(h, c);
  1269. return -EFAULT;
  1270. }
  1271. }
  1272. kfree(buff);
  1273. cmd_special_free(h, c);
  1274. return 0;
  1275. }
  1276. static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
  1277. {
  1278. BIG_IOCTL_Command_struct *ioc;
  1279. CommandList_struct *c;
  1280. unsigned char **buff = NULL;
  1281. int *buff_size = NULL;
  1282. u64bit temp64;
  1283. BYTE sg_used = 0;
  1284. int status = 0;
  1285. int i;
  1286. DECLARE_COMPLETION_ONSTACK(wait);
  1287. __u32 left;
  1288. __u32 sz;
  1289. BYTE __user *data_ptr;
  1290. if (!argp)
  1291. return -EINVAL;
  1292. if (!capable(CAP_SYS_RAWIO))
  1293. return -EPERM;
  1294. ioc = (BIG_IOCTL_Command_struct *)
  1295. kmalloc(sizeof(*ioc), GFP_KERNEL);
  1296. if (!ioc) {
  1297. status = -ENOMEM;
  1298. goto cleanup1;
  1299. }
  1300. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1301. status = -EFAULT;
  1302. goto cleanup1;
  1303. }
  1304. if ((ioc->buf_size < 1) &&
  1305. (ioc->Request.Type.Direction != XFER_NONE)) {
  1306. status = -EINVAL;
  1307. goto cleanup1;
  1308. }
  1309. /* Check kmalloc limits using all SGs */
  1310. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1311. status = -EINVAL;
  1312. goto cleanup1;
  1313. }
  1314. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1315. status = -EINVAL;
  1316. goto cleanup1;
  1317. }
  1318. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1319. if (!buff) {
  1320. status = -ENOMEM;
  1321. goto cleanup1;
  1322. }
  1323. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  1324. if (!buff_size) {
  1325. status = -ENOMEM;
  1326. goto cleanup1;
  1327. }
  1328. left = ioc->buf_size;
  1329. data_ptr = ioc->buf;
  1330. while (left) {
  1331. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  1332. buff_size[sg_used] = sz;
  1333. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1334. if (buff[sg_used] == NULL) {
  1335. status = -ENOMEM;
  1336. goto cleanup1;
  1337. }
  1338. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1339. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  1340. status = -EFAULT;
  1341. goto cleanup1;
  1342. }
  1343. } else {
  1344. memset(buff[sg_used], 0, sz);
  1345. }
  1346. left -= sz;
  1347. data_ptr += sz;
  1348. sg_used++;
  1349. }
  1350. c = cmd_special_alloc(h);
  1351. if (!c) {
  1352. status = -ENOMEM;
  1353. goto cleanup1;
  1354. }
  1355. c->cmd_type = CMD_IOCTL_PEND;
  1356. c->Header.ReplyQueue = 0;
  1357. c->Header.SGList = sg_used;
  1358. c->Header.SGTotal = sg_used;
  1359. c->Header.LUN = ioc->LUN_info;
  1360. c->Header.Tag.lower = c->busaddr;
  1361. c->Request = ioc->Request;
  1362. for (i = 0; i < sg_used; i++) {
  1363. temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
  1364. PCI_DMA_BIDIRECTIONAL);
  1365. c->SG[i].Addr.lower = temp64.val32.lower;
  1366. c->SG[i].Addr.upper = temp64.val32.upper;
  1367. c->SG[i].Len = buff_size[i];
  1368. c->SG[i].Ext = 0; /* we are not chaining */
  1369. }
  1370. c->waiting = &wait;
  1371. enqueue_cmd_and_start_io(h, c);
  1372. wait_for_completion(&wait);
  1373. /* unlock the buffers from DMA */
  1374. for (i = 0; i < sg_used; i++) {
  1375. temp64.val32.lower = c->SG[i].Addr.lower;
  1376. temp64.val32.upper = c->SG[i].Addr.upper;
  1377. pci_unmap_single(h->pdev,
  1378. (dma_addr_t) temp64.val, buff_size[i],
  1379. PCI_DMA_BIDIRECTIONAL);
  1380. }
  1381. check_ioctl_unit_attention(h, c);
  1382. /* Copy the error information out */
  1383. ioc->error_info = *(c->err_info);
  1384. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1385. cmd_special_free(h, c);
  1386. status = -EFAULT;
  1387. goto cleanup1;
  1388. }
  1389. if (ioc->Request.Type.Direction == XFER_READ) {
  1390. /* Copy the data out of the buffer we created */
  1391. BYTE __user *ptr = ioc->buf;
  1392. for (i = 0; i < sg_used; i++) {
  1393. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  1394. cmd_special_free(h, c);
  1395. status = -EFAULT;
  1396. goto cleanup1;
  1397. }
  1398. ptr += buff_size[i];
  1399. }
  1400. }
  1401. cmd_special_free(h, c);
  1402. status = 0;
  1403. cleanup1:
  1404. if (buff) {
  1405. for (i = 0; i < sg_used; i++)
  1406. kfree(buff[i]);
  1407. kfree(buff);
  1408. }
  1409. kfree(buff_size);
  1410. kfree(ioc);
  1411. return status;
  1412. }
  1413. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  1414. unsigned int cmd, unsigned long arg)
  1415. {
  1416. struct gendisk *disk = bdev->bd_disk;
  1417. ctlr_info_t *h = get_host(disk);
  1418. void __user *argp = (void __user *)arg;
  1419. dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
  1420. cmd, arg);
  1421. switch (cmd) {
  1422. case CCISS_GETPCIINFO:
  1423. return cciss_getpciinfo(h, argp);
  1424. case CCISS_GETINTINFO:
  1425. return cciss_getintinfo(h, argp);
  1426. case CCISS_SETINTINFO:
  1427. return cciss_setintinfo(h, argp);
  1428. case CCISS_GETNODENAME:
  1429. return cciss_getnodename(h, argp);
  1430. case CCISS_SETNODENAME:
  1431. return cciss_setnodename(h, argp);
  1432. case CCISS_GETHEARTBEAT:
  1433. return cciss_getheartbeat(h, argp);
  1434. case CCISS_GETBUSTYPES:
  1435. return cciss_getbustypes(h, argp);
  1436. case CCISS_GETFIRMVER:
  1437. return cciss_getfirmver(h, argp);
  1438. case CCISS_GETDRIVVER:
  1439. return cciss_getdrivver(h, argp);
  1440. case CCISS_DEREGDISK:
  1441. case CCISS_REGNEWD:
  1442. case CCISS_REVALIDVOLS:
  1443. return rebuild_lun_table(h, 0, 1);
  1444. case CCISS_GETLUNINFO:
  1445. return cciss_getluninfo(h, disk, argp);
  1446. case CCISS_PASSTHRU:
  1447. return cciss_passthru(h, argp);
  1448. case CCISS_BIG_PASSTHRU:
  1449. return cciss_bigpassthru(h, argp);
  1450. /* scsi_cmd_ioctl handles these, below, though some are not */
  1451. /* very meaningful for cciss. SG_IO is the main one people want. */
  1452. case SG_GET_VERSION_NUM:
  1453. case SG_SET_TIMEOUT:
  1454. case SG_GET_TIMEOUT:
  1455. case SG_GET_RESERVED_SIZE:
  1456. case SG_SET_RESERVED_SIZE:
  1457. case SG_EMULATED_HOST:
  1458. case SG_IO:
  1459. case SCSI_IOCTL_SEND_COMMAND:
  1460. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1461. /* scsi_cmd_ioctl would normally handle these, below, but */
  1462. /* they aren't a good fit for cciss, as CD-ROMs are */
  1463. /* not supported, and we don't have any bus/target/lun */
  1464. /* which we present to the kernel. */
  1465. case CDROM_SEND_PACKET:
  1466. case CDROMCLOSETRAY:
  1467. case CDROMEJECT:
  1468. case SCSI_IOCTL_GET_IDLUN:
  1469. case SCSI_IOCTL_GET_BUS_NUMBER:
  1470. default:
  1471. return -ENOTTY;
  1472. }
  1473. }
  1474. static void cciss_check_queues(ctlr_info_t *h)
  1475. {
  1476. int start_queue = h->next_to_run;
  1477. int i;
  1478. /* check to see if we have maxed out the number of commands that can
  1479. * be placed on the queue. If so then exit. We do this check here
  1480. * in case the interrupt we serviced was from an ioctl and did not
  1481. * free any new commands.
  1482. */
  1483. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1484. return;
  1485. /* We have room on the queue for more commands. Now we need to queue
  1486. * them up. We will also keep track of the next queue to run so
  1487. * that every queue gets a chance to be started first.
  1488. */
  1489. for (i = 0; i < h->highest_lun + 1; i++) {
  1490. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1491. /* make sure the disk has been added and the drive is real
  1492. * because this can be called from the middle of init_one.
  1493. */
  1494. if (!h->drv[curr_queue])
  1495. continue;
  1496. if (!(h->drv[curr_queue]->queue) ||
  1497. !(h->drv[curr_queue]->heads))
  1498. continue;
  1499. blk_start_queue(h->gendisk[curr_queue]->queue);
  1500. /* check to see if we have maxed out the number of commands
  1501. * that can be placed on the queue.
  1502. */
  1503. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1504. if (curr_queue == start_queue) {
  1505. h->next_to_run =
  1506. (start_queue + 1) % (h->highest_lun + 1);
  1507. break;
  1508. } else {
  1509. h->next_to_run = curr_queue;
  1510. break;
  1511. }
  1512. }
  1513. }
  1514. }
  1515. static void cciss_softirq_done(struct request *rq)
  1516. {
  1517. CommandList_struct *c = rq->completion_data;
  1518. ctlr_info_t *h = hba[c->ctlr];
  1519. SGDescriptor_struct *curr_sg = c->SG;
  1520. u64bit temp64;
  1521. unsigned long flags;
  1522. int i, ddir;
  1523. int sg_index = 0;
  1524. if (c->Request.Type.Direction == XFER_READ)
  1525. ddir = PCI_DMA_FROMDEVICE;
  1526. else
  1527. ddir = PCI_DMA_TODEVICE;
  1528. /* command did not need to be retried */
  1529. /* unmap the DMA mapping for all the scatter gather elements */
  1530. for (i = 0; i < c->Header.SGList; i++) {
  1531. if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
  1532. cciss_unmap_sg_chain_block(h, c);
  1533. /* Point to the next block */
  1534. curr_sg = h->cmd_sg_list[c->cmdindex];
  1535. sg_index = 0;
  1536. }
  1537. temp64.val32.lower = curr_sg[sg_index].Addr.lower;
  1538. temp64.val32.upper = curr_sg[sg_index].Addr.upper;
  1539. pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
  1540. ddir);
  1541. ++sg_index;
  1542. }
  1543. dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
  1544. /* set the residual count for pc requests */
  1545. if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
  1546. rq->resid_len = c->err_info->ResidualCnt;
  1547. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1548. spin_lock_irqsave(&h->lock, flags);
  1549. cmd_free(h, c);
  1550. cciss_check_queues(h);
  1551. spin_unlock_irqrestore(&h->lock, flags);
  1552. }
  1553. static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
  1554. unsigned char scsi3addr[], uint32_t log_unit)
  1555. {
  1556. memcpy(scsi3addr, h->drv[log_unit]->LunID,
  1557. sizeof(h->drv[log_unit]->LunID));
  1558. }
  1559. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1560. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1561. * they cannot be read.
  1562. */
  1563. static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
  1564. char *vendor, char *model, char *rev)
  1565. {
  1566. int rc;
  1567. InquiryData_struct *inq_buf;
  1568. unsigned char scsi3addr[8];
  1569. *vendor = '\0';
  1570. *model = '\0';
  1571. *rev = '\0';
  1572. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1573. if (!inq_buf)
  1574. return;
  1575. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1576. rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
  1577. scsi3addr, TYPE_CMD);
  1578. if (rc == IO_OK) {
  1579. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1580. vendor[VENDOR_LEN] = '\0';
  1581. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1582. model[MODEL_LEN] = '\0';
  1583. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1584. rev[REV_LEN] = '\0';
  1585. }
  1586. kfree(inq_buf);
  1587. return;
  1588. }
  1589. /* This function gets the serial number of a logical drive via
  1590. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1591. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1592. * are returned instead.
  1593. */
  1594. static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
  1595. unsigned char *serial_no, int buflen)
  1596. {
  1597. #define PAGE_83_INQ_BYTES 64
  1598. int rc;
  1599. unsigned char *buf;
  1600. unsigned char scsi3addr[8];
  1601. if (buflen > 16)
  1602. buflen = 16;
  1603. memset(serial_no, 0xff, buflen);
  1604. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1605. if (!buf)
  1606. return;
  1607. memset(serial_no, 0, buflen);
  1608. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1609. rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
  1610. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1611. if (rc == IO_OK)
  1612. memcpy(serial_no, &buf[8], buflen);
  1613. kfree(buf);
  1614. return;
  1615. }
  1616. /*
  1617. * cciss_add_disk sets up the block device queue for a logical drive
  1618. */
  1619. static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1620. int drv_index)
  1621. {
  1622. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1623. if (!disk->queue)
  1624. goto init_queue_failure;
  1625. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1626. disk->major = h->major;
  1627. disk->first_minor = drv_index << NWD_SHIFT;
  1628. disk->fops = &cciss_fops;
  1629. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1630. goto cleanup_queue;
  1631. disk->private_data = h->drv[drv_index];
  1632. disk->driverfs_dev = &h->drv[drv_index]->dev;
  1633. /* Set up queue information */
  1634. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1635. /* This is a hardware imposed limit. */
  1636. blk_queue_max_segments(disk->queue, h->maxsgentries);
  1637. blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
  1638. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1639. disk->queue->queuedata = h;
  1640. blk_queue_logical_block_size(disk->queue,
  1641. h->drv[drv_index]->block_size);
  1642. /* Make sure all queue data is written out before */
  1643. /* setting h->drv[drv_index]->queue, as setting this */
  1644. /* allows the interrupt handler to start the queue */
  1645. wmb();
  1646. h->drv[drv_index]->queue = disk->queue;
  1647. add_disk(disk);
  1648. return 0;
  1649. cleanup_queue:
  1650. blk_cleanup_queue(disk->queue);
  1651. disk->queue = NULL;
  1652. init_queue_failure:
  1653. return -1;
  1654. }
  1655. /* This function will check the usage_count of the drive to be updated/added.
  1656. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1657. * the drive's capacity, geometry, or serial number has changed,
  1658. * then the drive information will be updated and the disk will be
  1659. * re-registered with the kernel. If these conditions don't hold,
  1660. * then it will be left alone for the next reboot. The exception to this
  1661. * is disk 0 which will always be left registered with the kernel since it
  1662. * is also the controller node. Any changes to disk 0 will show up on
  1663. * the next reboot.
  1664. */
  1665. static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
  1666. int first_time, int via_ioctl)
  1667. {
  1668. struct gendisk *disk;
  1669. InquiryData_struct *inq_buff = NULL;
  1670. unsigned int block_size;
  1671. sector_t total_size;
  1672. unsigned long flags = 0;
  1673. int ret = 0;
  1674. drive_info_struct *drvinfo;
  1675. /* Get information about the disk and modify the driver structure */
  1676. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1677. drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
  1678. if (inq_buff == NULL || drvinfo == NULL)
  1679. goto mem_msg;
  1680. /* testing to see if 16-byte CDBs are already being used */
  1681. if (h->cciss_read == CCISS_READ_16) {
  1682. cciss_read_capacity_16(h, drv_index,
  1683. &total_size, &block_size);
  1684. } else {
  1685. cciss_read_capacity(h, drv_index, &total_size, &block_size);
  1686. /* if read_capacity returns all F's this volume is >2TB */
  1687. /* in size so we switch to 16-byte CDB's for all */
  1688. /* read/write ops */
  1689. if (total_size == 0xFFFFFFFFULL) {
  1690. cciss_read_capacity_16(h, drv_index,
  1691. &total_size, &block_size);
  1692. h->cciss_read = CCISS_READ_16;
  1693. h->cciss_write = CCISS_WRITE_16;
  1694. } else {
  1695. h->cciss_read = CCISS_READ_10;
  1696. h->cciss_write = CCISS_WRITE_10;
  1697. }
  1698. }
  1699. cciss_geometry_inquiry(h, drv_index, total_size, block_size,
  1700. inq_buff, drvinfo);
  1701. drvinfo->block_size = block_size;
  1702. drvinfo->nr_blocks = total_size + 1;
  1703. cciss_get_device_descr(h, drv_index, drvinfo->vendor,
  1704. drvinfo->model, drvinfo->rev);
  1705. cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
  1706. sizeof(drvinfo->serial_no));
  1707. /* Save the lunid in case we deregister the disk, below. */
  1708. memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
  1709. sizeof(drvinfo->LunID));
  1710. /* Is it the same disk we already know, and nothing's changed? */
  1711. if (h->drv[drv_index]->raid_level != -1 &&
  1712. ((memcmp(drvinfo->serial_no,
  1713. h->drv[drv_index]->serial_no, 16) == 0) &&
  1714. drvinfo->block_size == h->drv[drv_index]->block_size &&
  1715. drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
  1716. drvinfo->heads == h->drv[drv_index]->heads &&
  1717. drvinfo->sectors == h->drv[drv_index]->sectors &&
  1718. drvinfo->cylinders == h->drv[drv_index]->cylinders))
  1719. /* The disk is unchanged, nothing to update */
  1720. goto freeret;
  1721. /* If we get here it's not the same disk, or something's changed,
  1722. * so we need to * deregister it, and re-register it, if it's not
  1723. * in use.
  1724. * If the disk already exists then deregister it before proceeding
  1725. * (unless it's the first disk (for the controller node).
  1726. */
  1727. if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
  1728. dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
  1729. spin_lock_irqsave(&h->lock, flags);
  1730. h->drv[drv_index]->busy_configuring = 1;
  1731. spin_unlock_irqrestore(&h->lock, flags);
  1732. /* deregister_disk sets h->drv[drv_index]->queue = NULL
  1733. * which keeps the interrupt handler from starting
  1734. * the queue.
  1735. */
  1736. ret = deregister_disk(h, drv_index, 0, via_ioctl);
  1737. }
  1738. /* If the disk is in use return */
  1739. if (ret)
  1740. goto freeret;
  1741. /* Save the new information from cciss_geometry_inquiry
  1742. * and serial number inquiry. If the disk was deregistered
  1743. * above, then h->drv[drv_index] will be NULL.
  1744. */
  1745. if (h->drv[drv_index] == NULL) {
  1746. drvinfo->device_initialized = 0;
  1747. h->drv[drv_index] = drvinfo;
  1748. drvinfo = NULL; /* so it won't be freed below. */
  1749. } else {
  1750. /* special case for cxd0 */
  1751. h->drv[drv_index]->block_size = drvinfo->block_size;
  1752. h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
  1753. h->drv[drv_index]->heads = drvinfo->heads;
  1754. h->drv[drv_index]->sectors = drvinfo->sectors;
  1755. h->drv[drv_index]->cylinders = drvinfo->cylinders;
  1756. h->drv[drv_index]->raid_level = drvinfo->raid_level;
  1757. memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
  1758. memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
  1759. VENDOR_LEN + 1);
  1760. memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
  1761. memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
  1762. }
  1763. ++h->num_luns;
  1764. disk = h->gendisk[drv_index];
  1765. set_capacity(disk, h->drv[drv_index]->nr_blocks);
  1766. /* If it's not disk 0 (drv_index != 0)
  1767. * or if it was disk 0, but there was previously
  1768. * no actual corresponding configured logical drive
  1769. * (raid_leve == -1) then we want to update the
  1770. * logical drive's information.
  1771. */
  1772. if (drv_index || first_time) {
  1773. if (cciss_add_disk(h, disk, drv_index) != 0) {
  1774. cciss_free_gendisk(h, drv_index);
  1775. cciss_free_drive_info(h, drv_index);
  1776. dev_warn(&h->pdev->dev, "could not update disk %d\n",
  1777. drv_index);
  1778. --h->num_luns;
  1779. }
  1780. }
  1781. freeret:
  1782. kfree(inq_buff);
  1783. kfree(drvinfo);
  1784. return;
  1785. mem_msg:
  1786. dev_err(&h->pdev->dev, "out of memory\n");
  1787. goto freeret;
  1788. }
  1789. /* This function will find the first index of the controllers drive array
  1790. * that has a null drv pointer and allocate the drive info struct and
  1791. * will return that index This is where new drives will be added.
  1792. * If the index to be returned is greater than the highest_lun index for
  1793. * the controller then highest_lun is set * to this new index.
  1794. * If there are no available indexes or if tha allocation fails, then -1
  1795. * is returned. * "controller_node" is used to know if this is a real
  1796. * logical drive, or just the controller node, which determines if this
  1797. * counts towards highest_lun.
  1798. */
  1799. static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
  1800. {
  1801. int i;
  1802. drive_info_struct *drv;
  1803. /* Search for an empty slot for our drive info */
  1804. for (i = 0; i < CISS_MAX_LUN; i++) {
  1805. /* if not cxd0 case, and it's occupied, skip it. */
  1806. if (h->drv[i] && i != 0)
  1807. continue;
  1808. /*
  1809. * If it's cxd0 case, and drv is alloc'ed already, and a
  1810. * disk is configured there, skip it.
  1811. */
  1812. if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
  1813. continue;
  1814. /*
  1815. * We've found an empty slot. Update highest_lun
  1816. * provided this isn't just the fake cxd0 controller node.
  1817. */
  1818. if (i > h->highest_lun && !controller_node)
  1819. h->highest_lun = i;
  1820. /* If adding a real disk at cxd0, and it's already alloc'ed */
  1821. if (i == 0 && h->drv[i] != NULL)
  1822. return i;
  1823. /*
  1824. * Found an empty slot, not already alloc'ed. Allocate it.
  1825. * Mark it with raid_level == -1, so we know it's new later on.
  1826. */
  1827. drv = kzalloc(sizeof(*drv), GFP_KERNEL);
  1828. if (!drv)
  1829. return -1;
  1830. drv->raid_level = -1; /* so we know it's new */
  1831. h->drv[i] = drv;
  1832. return i;
  1833. }
  1834. return -1;
  1835. }
  1836. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
  1837. {
  1838. kfree(h->drv[drv_index]);
  1839. h->drv[drv_index] = NULL;
  1840. }
  1841. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
  1842. {
  1843. put_disk(h->gendisk[drv_index]);
  1844. h->gendisk[drv_index] = NULL;
  1845. }
  1846. /* cciss_add_gendisk finds a free hba[]->drv structure
  1847. * and allocates a gendisk if needed, and sets the lunid
  1848. * in the drvinfo structure. It returns the index into
  1849. * the ->drv[] array, or -1 if none are free.
  1850. * is_controller_node indicates whether highest_lun should
  1851. * count this disk, or if it's only being added to provide
  1852. * a means to talk to the controller in case no logical
  1853. * drives have yet been configured.
  1854. */
  1855. static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
  1856. int controller_node)
  1857. {
  1858. int drv_index;
  1859. drv_index = cciss_alloc_drive_info(h, controller_node);
  1860. if (drv_index == -1)
  1861. return -1;
  1862. /*Check if the gendisk needs to be allocated */
  1863. if (!h->gendisk[drv_index]) {
  1864. h->gendisk[drv_index] =
  1865. alloc_disk(1 << NWD_SHIFT);
  1866. if (!h->gendisk[drv_index]) {
  1867. dev_err(&h->pdev->dev,
  1868. "could not allocate a new disk %d\n",
  1869. drv_index);
  1870. goto err_free_drive_info;
  1871. }
  1872. }
  1873. memcpy(h->drv[drv_index]->LunID, lunid,
  1874. sizeof(h->drv[drv_index]->LunID));
  1875. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1876. goto err_free_disk;
  1877. /* Don't need to mark this busy because nobody */
  1878. /* else knows about this disk yet to contend */
  1879. /* for access to it. */
  1880. h->drv[drv_index]->busy_configuring = 0;
  1881. wmb();
  1882. return drv_index;
  1883. err_free_disk:
  1884. cciss_free_gendisk(h, drv_index);
  1885. err_free_drive_info:
  1886. cciss_free_drive_info(h, drv_index);
  1887. return -1;
  1888. }
  1889. /* This is for the special case of a controller which
  1890. * has no logical drives. In this case, we still need
  1891. * to register a disk so the controller can be accessed
  1892. * by the Array Config Utility.
  1893. */
  1894. static void cciss_add_controller_node(ctlr_info_t *h)
  1895. {
  1896. struct gendisk *disk;
  1897. int drv_index;
  1898. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1899. return;
  1900. drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
  1901. if (drv_index == -1)
  1902. goto error;
  1903. h->drv[drv_index]->block_size = 512;
  1904. h->drv[drv_index]->nr_blocks = 0;
  1905. h->drv[drv_index]->heads = 0;
  1906. h->drv[drv_index]->sectors = 0;
  1907. h->drv[drv_index]->cylinders = 0;
  1908. h->drv[drv_index]->raid_level = -1;
  1909. memset(h->drv[drv_index]->serial_no, 0, 16);
  1910. disk = h->gendisk[drv_index];
  1911. if (cciss_add_disk(h, disk, drv_index) == 0)
  1912. return;
  1913. cciss_free_gendisk(h, drv_index);
  1914. cciss_free_drive_info(h, drv_index);
  1915. error:
  1916. dev_warn(&h->pdev->dev, "could not add disk 0.\n");
  1917. return;
  1918. }
  1919. /* This function will add and remove logical drives from the Logical
  1920. * drive array of the controller and maintain persistency of ordering
  1921. * so that mount points are preserved until the next reboot. This allows
  1922. * for the removal of logical drives in the middle of the drive array
  1923. * without a re-ordering of those drives.
  1924. * INPUT
  1925. * h = The controller to perform the operations on
  1926. */
  1927. static int rebuild_lun_table(ctlr_info_t *h, int first_time,
  1928. int via_ioctl)
  1929. {
  1930. int num_luns;
  1931. ReportLunData_struct *ld_buff = NULL;
  1932. int return_code;
  1933. int listlength = 0;
  1934. int i;
  1935. int drv_found;
  1936. int drv_index = 0;
  1937. unsigned char lunid[8] = CTLR_LUNID;
  1938. unsigned long flags;
  1939. if (!capable(CAP_SYS_RAWIO))
  1940. return -EPERM;
  1941. /* Set busy_configuring flag for this operation */
  1942. spin_lock_irqsave(&h->lock, flags);
  1943. if (h->busy_configuring) {
  1944. spin_unlock_irqrestore(&h->lock, flags);
  1945. return -EBUSY;
  1946. }
  1947. h->busy_configuring = 1;
  1948. spin_unlock_irqrestore(&h->lock, flags);
  1949. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1950. if (ld_buff == NULL)
  1951. goto mem_msg;
  1952. return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
  1953. sizeof(ReportLunData_struct),
  1954. 0, CTLR_LUNID, TYPE_CMD);
  1955. if (return_code == IO_OK)
  1956. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  1957. else { /* reading number of logical volumes failed */
  1958. dev_warn(&h->pdev->dev,
  1959. "report logical volume command failed\n");
  1960. listlength = 0;
  1961. goto freeret;
  1962. }
  1963. num_luns = listlength / 8; /* 8 bytes per entry */
  1964. if (num_luns > CISS_MAX_LUN) {
  1965. num_luns = CISS_MAX_LUN;
  1966. dev_warn(&h->pdev->dev, "more luns configured"
  1967. " on controller than can be handled by"
  1968. " this driver.\n");
  1969. }
  1970. if (num_luns == 0)
  1971. cciss_add_controller_node(h);
  1972. /* Compare controller drive array to driver's drive array
  1973. * to see if any drives are missing on the controller due
  1974. * to action of Array Config Utility (user deletes drive)
  1975. * and deregister logical drives which have disappeared.
  1976. */
  1977. for (i = 0; i <= h->highest_lun; i++) {
  1978. int j;
  1979. drv_found = 0;
  1980. /* skip holes in the array from already deleted drives */
  1981. if (h->drv[i] == NULL)
  1982. continue;
  1983. for (j = 0; j < num_luns; j++) {
  1984. memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
  1985. if (memcmp(h->drv[i]->LunID, lunid,
  1986. sizeof(lunid)) == 0) {
  1987. drv_found = 1;
  1988. break;
  1989. }
  1990. }
  1991. if (!drv_found) {
  1992. /* Deregister it from the OS, it's gone. */
  1993. spin_lock_irqsave(&h->lock, flags);
  1994. h->drv[i]->busy_configuring = 1;
  1995. spin_unlock_irqrestore(&h->lock, flags);
  1996. return_code = deregister_disk(h, i, 1, via_ioctl);
  1997. if (h->drv[i] != NULL)
  1998. h->drv[i]->busy_configuring = 0;
  1999. }
  2000. }
  2001. /* Compare controller drive array to driver's drive array.
  2002. * Check for updates in the drive information and any new drives
  2003. * on the controller due to ACU adding logical drives, or changing
  2004. * a logical drive's size, etc. Reregister any new/changed drives
  2005. */
  2006. for (i = 0; i < num_luns; i++) {
  2007. int j;
  2008. drv_found = 0;
  2009. memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
  2010. /* Find if the LUN is already in the drive array
  2011. * of the driver. If so then update its info
  2012. * if not in use. If it does not exist then find
  2013. * the first free index and add it.
  2014. */
  2015. for (j = 0; j <= h->highest_lun; j++) {
  2016. if (h->drv[j] != NULL &&
  2017. memcmp(h->drv[j]->LunID, lunid,
  2018. sizeof(h->drv[j]->LunID)) == 0) {
  2019. drv_index = j;
  2020. drv_found = 1;
  2021. break;
  2022. }
  2023. }
  2024. /* check if the drive was found already in the array */
  2025. if (!drv_found) {
  2026. drv_index = cciss_add_gendisk(h, lunid, 0);
  2027. if (drv_index == -1)
  2028. goto freeret;
  2029. }
  2030. cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
  2031. } /* end for */
  2032. freeret:
  2033. kfree(ld_buff);
  2034. h->busy_configuring = 0;
  2035. /* We return -1 here to tell the ACU that we have registered/updated
  2036. * all of the drives that we can and to keep it from calling us
  2037. * additional times.
  2038. */
  2039. return -1;
  2040. mem_msg:
  2041. dev_err(&h->pdev->dev, "out of memory\n");
  2042. h->busy_configuring = 0;
  2043. goto freeret;
  2044. }
  2045. static void cciss_clear_drive_info(drive_info_struct *drive_info)
  2046. {
  2047. /* zero out the disk size info */
  2048. drive_info->nr_blocks = 0;
  2049. drive_info->block_size = 0;
  2050. drive_info->heads = 0;
  2051. drive_info->sectors = 0;
  2052. drive_info->cylinders = 0;
  2053. drive_info->raid_level = -1;
  2054. memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
  2055. memset(drive_info->model, 0, sizeof(drive_info->model));
  2056. memset(drive_info->rev, 0, sizeof(drive_info->rev));
  2057. memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
  2058. /*
  2059. * don't clear the LUNID though, we need to remember which
  2060. * one this one is.
  2061. */
  2062. }
  2063. /* This function will deregister the disk and it's queue from the
  2064. * kernel. It must be called with the controller lock held and the
  2065. * drv structures busy_configuring flag set. It's parameters are:
  2066. *
  2067. * disk = This is the disk to be deregistered
  2068. * drv = This is the drive_info_struct associated with the disk to be
  2069. * deregistered. It contains information about the disk used
  2070. * by the driver.
  2071. * clear_all = This flag determines whether or not the disk information
  2072. * is going to be completely cleared out and the highest_lun
  2073. * reset. Sometimes we want to clear out information about
  2074. * the disk in preparation for re-adding it. In this case
  2075. * the highest_lun should be left unchanged and the LunID
  2076. * should not be cleared.
  2077. * via_ioctl
  2078. * This indicates whether we've reached this path via ioctl.
  2079. * This affects the maximum usage count allowed for c0d0 to be messed with.
  2080. * If this path is reached via ioctl(), then the max_usage_count will
  2081. * be 1, as the process calling ioctl() has got to have the device open.
  2082. * If we get here via sysfs, then the max usage count will be zero.
  2083. */
  2084. static int deregister_disk(ctlr_info_t *h, int drv_index,
  2085. int clear_all, int via_ioctl)
  2086. {
  2087. int i;
  2088. struct gendisk *disk;
  2089. drive_info_struct *drv;
  2090. int recalculate_highest_lun;
  2091. if (!capable(CAP_SYS_RAWIO))
  2092. return -EPERM;
  2093. drv = h->drv[drv_index];
  2094. disk = h->gendisk[drv_index];
  2095. /* make sure logical volume is NOT is use */
  2096. if (clear_all || (h->gendisk[0] == disk)) {
  2097. if (drv->usage_count > via_ioctl)
  2098. return -EBUSY;
  2099. } else if (drv->usage_count > 0)
  2100. return -EBUSY;
  2101. recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
  2102. /* invalidate the devices and deregister the disk. If it is disk
  2103. * zero do not deregister it but just zero out it's values. This
  2104. * allows us to delete disk zero but keep the controller registered.
  2105. */
  2106. if (h->gendisk[0] != disk) {
  2107. struct request_queue *q = disk->queue;
  2108. if (disk->flags & GENHD_FL_UP) {
  2109. cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
  2110. del_gendisk(disk);
  2111. }
  2112. if (q)
  2113. blk_cleanup_queue(q);
  2114. /* If clear_all is set then we are deleting the logical
  2115. * drive, not just refreshing its info. For drives
  2116. * other than disk 0 we will call put_disk. We do not
  2117. * do this for disk 0 as we need it to be able to
  2118. * configure the controller.
  2119. */
  2120. if (clear_all){
  2121. /* This isn't pretty, but we need to find the
  2122. * disk in our array and NULL our the pointer.
  2123. * This is so that we will call alloc_disk if
  2124. * this index is used again later.
  2125. */
  2126. for (i=0; i < CISS_MAX_LUN; i++){
  2127. if (h->gendisk[i] == disk) {
  2128. h->gendisk[i] = NULL;
  2129. break;
  2130. }
  2131. }
  2132. put_disk(disk);
  2133. }
  2134. } else {
  2135. set_capacity(disk, 0);
  2136. cciss_clear_drive_info(drv);
  2137. }
  2138. --h->num_luns;
  2139. /* if it was the last disk, find the new hightest lun */
  2140. if (clear_all && recalculate_highest_lun) {
  2141. int newhighest = -1;
  2142. for (i = 0; i <= h->highest_lun; i++) {
  2143. /* if the disk has size > 0, it is available */
  2144. if (h->drv[i] && h->drv[i]->heads)
  2145. newhighest = i;
  2146. }
  2147. h->highest_lun = newhighest;
  2148. }
  2149. return 0;
  2150. }
  2151. static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
  2152. size_t size, __u8 page_code, unsigned char *scsi3addr,
  2153. int cmd_type)
  2154. {
  2155. u64bit buff_dma_handle;
  2156. int status = IO_OK;
  2157. c->cmd_type = CMD_IOCTL_PEND;
  2158. c->Header.ReplyQueue = 0;
  2159. if (buff != NULL) {
  2160. c->Header.SGList = 1;
  2161. c->Header.SGTotal = 1;
  2162. } else {
  2163. c->Header.SGList = 0;
  2164. c->Header.SGTotal = 0;
  2165. }
  2166. c->Header.Tag.lower = c->busaddr;
  2167. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2168. c->Request.Type.Type = cmd_type;
  2169. if (cmd_type == TYPE_CMD) {
  2170. switch (cmd) {
  2171. case CISS_INQUIRY:
  2172. /* are we trying to read a vital product page */
  2173. if (page_code != 0) {
  2174. c->Request.CDB[1] = 0x01;
  2175. c->Request.CDB[2] = page_code;
  2176. }
  2177. c->Request.CDBLen = 6;
  2178. c->Request.Type.Attribute = ATTR_SIMPLE;
  2179. c->Request.Type.Direction = XFER_READ;
  2180. c->Request.Timeout = 0;
  2181. c->Request.CDB[0] = CISS_INQUIRY;
  2182. c->Request.CDB[4] = size & 0xFF;
  2183. break;
  2184. case CISS_REPORT_LOG:
  2185. case CISS_REPORT_PHYS:
  2186. /* Talking to controller so It's a physical command
  2187. mode = 00 target = 0. Nothing to write.
  2188. */
  2189. c->Request.CDBLen = 12;
  2190. c->Request.Type.Attribute = ATTR_SIMPLE;
  2191. c->Request.Type.Direction = XFER_READ;
  2192. c->Request.Timeout = 0;
  2193. c->Request.CDB[0] = cmd;
  2194. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2195. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2196. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2197. c->Request.CDB[9] = size & 0xFF;
  2198. break;
  2199. case CCISS_READ_CAPACITY:
  2200. c->Request.CDBLen = 10;
  2201. c->Request.Type.Attribute = ATTR_SIMPLE;
  2202. c->Request.Type.Direction = XFER_READ;
  2203. c->Request.Timeout = 0;
  2204. c->Request.CDB[0] = cmd;
  2205. break;
  2206. case CCISS_READ_CAPACITY_16:
  2207. c->Request.CDBLen = 16;
  2208. c->Request.Type.Attribute = ATTR_SIMPLE;
  2209. c->Request.Type.Direction = XFER_READ;
  2210. c->Request.Timeout = 0;
  2211. c->Request.CDB[0] = cmd;
  2212. c->Request.CDB[1] = 0x10;
  2213. c->Request.CDB[10] = (size >> 24) & 0xFF;
  2214. c->Request.CDB[11] = (size >> 16) & 0xFF;
  2215. c->Request.CDB[12] = (size >> 8) & 0xFF;
  2216. c->Request.CDB[13] = size & 0xFF;
  2217. c->Request.Timeout = 0;
  2218. c->Request.CDB[0] = cmd;
  2219. break;
  2220. case CCISS_CACHE_FLUSH:
  2221. c->Request.CDBLen = 12;
  2222. c->Request.Type.Attribute = ATTR_SIMPLE;
  2223. c->Request.Type.Direction = XFER_WRITE;
  2224. c->Request.Timeout = 0;
  2225. c->Request.CDB[0] = BMIC_WRITE;
  2226. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2227. break;
  2228. case TEST_UNIT_READY:
  2229. c->Request.CDBLen = 6;
  2230. c->Request.Type.Attribute = ATTR_SIMPLE;
  2231. c->Request.Type.Direction = XFER_NONE;
  2232. c->Request.Timeout = 0;
  2233. break;
  2234. default:
  2235. dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
  2236. return IO_ERROR;
  2237. }
  2238. } else if (cmd_type == TYPE_MSG) {
  2239. switch (cmd) {
  2240. case 0: /* ABORT message */
  2241. c->Request.CDBLen = 12;
  2242. c->Request.Type.Attribute = ATTR_SIMPLE;
  2243. c->Request.Type.Direction = XFER_WRITE;
  2244. c->Request.Timeout = 0;
  2245. c->Request.CDB[0] = cmd; /* abort */
  2246. c->Request.CDB[1] = 0; /* abort a command */
  2247. /* buff contains the tag of the command to abort */
  2248. memcpy(&c->Request.CDB[4], buff, 8);
  2249. break;
  2250. case 1: /* RESET message */
  2251. c->Request.CDBLen = 16;
  2252. c->Request.Type.Attribute = ATTR_SIMPLE;
  2253. c->Request.Type.Direction = XFER_NONE;
  2254. c->Request.Timeout = 0;
  2255. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2256. c->Request.CDB[0] = cmd; /* reset */
  2257. c->Request.CDB[1] = 0x03; /* reset a target */
  2258. break;
  2259. case 3: /* No-Op message */
  2260. c->Request.CDBLen = 1;
  2261. c->Request.Type.Attribute = ATTR_SIMPLE;
  2262. c->Request.Type.Direction = XFER_WRITE;
  2263. c->Request.Timeout = 0;
  2264. c->Request.CDB[0] = cmd;
  2265. break;
  2266. default:
  2267. dev_warn(&h->pdev->dev,
  2268. "unknown message type %d\n", cmd);
  2269. return IO_ERROR;
  2270. }
  2271. } else {
  2272. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2273. return IO_ERROR;
  2274. }
  2275. /* Fill in the scatter gather information */
  2276. if (size > 0) {
  2277. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2278. buff, size,
  2279. PCI_DMA_BIDIRECTIONAL);
  2280. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2281. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2282. c->SG[0].Len = size;
  2283. c->SG[0].Ext = 0; /* we are not chaining */
  2284. }
  2285. return status;
  2286. }
  2287. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2288. {
  2289. switch (c->err_info->ScsiStatus) {
  2290. case SAM_STAT_GOOD:
  2291. return IO_OK;
  2292. case SAM_STAT_CHECK_CONDITION:
  2293. switch (0xf & c->err_info->SenseInfo[2]) {
  2294. case 0: return IO_OK; /* no sense */
  2295. case 1: return IO_OK; /* recovered error */
  2296. default:
  2297. if (check_for_unit_attention(h, c))
  2298. return IO_NEEDS_RETRY;
  2299. dev_warn(&h->pdev->dev, "cmd 0x%02x "
  2300. "check condition, sense key = 0x%02x\n",
  2301. c->Request.CDB[0], c->err_info->SenseInfo[2]);
  2302. }
  2303. break;
  2304. default:
  2305. dev_warn(&h->pdev->dev, "cmd 0x%02x"
  2306. "scsi status = 0x%02x\n",
  2307. c->Request.CDB[0], c->err_info->ScsiStatus);
  2308. break;
  2309. }
  2310. return IO_ERROR;
  2311. }
  2312. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2313. {
  2314. int return_status = IO_OK;
  2315. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2316. return IO_OK;
  2317. switch (c->err_info->CommandStatus) {
  2318. case CMD_TARGET_STATUS:
  2319. return_status = check_target_status(h, c);
  2320. break;
  2321. case CMD_DATA_UNDERRUN:
  2322. case CMD_DATA_OVERRUN:
  2323. /* expected for inquiry and report lun commands */
  2324. break;
  2325. case CMD_INVALID:
  2326. dev_warn(&h->pdev->dev, "cmd 0x%02x is "
  2327. "reported invalid\n", c->Request.CDB[0]);
  2328. return_status = IO_ERROR;
  2329. break;
  2330. case CMD_PROTOCOL_ERR:
  2331. dev_warn(&h->pdev->dev, "cmd 0x%02x has "
  2332. "protocol error\n", c->Request.CDB[0]);
  2333. return_status = IO_ERROR;
  2334. break;
  2335. case CMD_HARDWARE_ERR:
  2336. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2337. " hardware error\n", c->Request.CDB[0]);
  2338. return_status = IO_ERROR;
  2339. break;
  2340. case CMD_CONNECTION_LOST:
  2341. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2342. "connection lost\n", c->Request.CDB[0]);
  2343. return_status = IO_ERROR;
  2344. break;
  2345. case CMD_ABORTED:
  2346. dev_warn(&h->pdev->dev, "cmd 0x%02x was "
  2347. "aborted\n", c->Request.CDB[0]);
  2348. return_status = IO_ERROR;
  2349. break;
  2350. case CMD_ABORT_FAILED:
  2351. dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
  2352. "abort failed\n", c->Request.CDB[0]);
  2353. return_status = IO_ERROR;
  2354. break;
  2355. case CMD_UNSOLICITED_ABORT:
  2356. dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
  2357. c->Request.CDB[0]);
  2358. return_status = IO_NEEDS_RETRY;
  2359. break;
  2360. default:
  2361. dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
  2362. "unknown status %x\n", c->Request.CDB[0],
  2363. c->err_info->CommandStatus);
  2364. return_status = IO_ERROR;
  2365. }
  2366. return return_status;
  2367. }
  2368. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2369. int attempt_retry)
  2370. {
  2371. DECLARE_COMPLETION_ONSTACK(wait);
  2372. u64bit buff_dma_handle;
  2373. int return_status = IO_OK;
  2374. resend_cmd2:
  2375. c->waiting = &wait;
  2376. enqueue_cmd_and_start_io(h, c);
  2377. wait_for_completion(&wait);
  2378. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2379. goto command_done;
  2380. return_status = process_sendcmd_error(h, c);
  2381. if (return_status == IO_NEEDS_RETRY &&
  2382. c->retry_count < MAX_CMD_RETRIES) {
  2383. dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
  2384. c->Request.CDB[0]);
  2385. c->retry_count++;
  2386. /* erase the old error information */
  2387. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2388. return_status = IO_OK;
  2389. INIT_COMPLETION(wait);
  2390. goto resend_cmd2;
  2391. }
  2392. command_done:
  2393. /* unlock the buffers from DMA */
  2394. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2395. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2396. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2397. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2398. return return_status;
  2399. }
  2400. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  2401. __u8 page_code, unsigned char scsi3addr[],
  2402. int cmd_type)
  2403. {
  2404. CommandList_struct *c;
  2405. int return_status;
  2406. c = cmd_special_alloc(h);
  2407. if (!c)
  2408. return -ENOMEM;
  2409. return_status = fill_cmd(h, c, cmd, buff, size, page_code,
  2410. scsi3addr, cmd_type);
  2411. if (return_status == IO_OK)
  2412. return_status = sendcmd_withirq_core(h, c, 1);
  2413. cmd_special_free(h, c);
  2414. return return_status;
  2415. }
  2416. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  2417. sector_t total_size,
  2418. unsigned int block_size,
  2419. InquiryData_struct *inq_buff,
  2420. drive_info_struct *drv)
  2421. {
  2422. int return_code;
  2423. unsigned long t;
  2424. unsigned char scsi3addr[8];
  2425. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2426. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2427. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  2428. sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
  2429. if (return_code == IO_OK) {
  2430. if (inq_buff->data_byte[8] == 0xFF) {
  2431. dev_warn(&h->pdev->dev,
  2432. "reading geometry failed, volume "
  2433. "does not support reading geometry\n");
  2434. drv->heads = 255;
  2435. drv->sectors = 32; /* Sectors per track */
  2436. drv->cylinders = total_size + 1;
  2437. drv->raid_level = RAID_UNKNOWN;
  2438. } else {
  2439. drv->heads = inq_buff->data_byte[6];
  2440. drv->sectors = inq_buff->data_byte[7];
  2441. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2442. drv->cylinders += inq_buff->data_byte[5];
  2443. drv->raid_level = inq_buff->data_byte[8];
  2444. }
  2445. drv->block_size = block_size;
  2446. drv->nr_blocks = total_size + 1;
  2447. t = drv->heads * drv->sectors;
  2448. if (t > 1) {
  2449. sector_t real_size = total_size + 1;
  2450. unsigned long rem = sector_div(real_size, t);
  2451. if (rem)
  2452. real_size++;
  2453. drv->cylinders = real_size;
  2454. }
  2455. } else { /* Get geometry failed */
  2456. dev_warn(&h->pdev->dev, "reading geometry failed\n");
  2457. }
  2458. }
  2459. static void
  2460. cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
  2461. unsigned int *block_size)
  2462. {
  2463. ReadCapdata_struct *buf;
  2464. int return_code;
  2465. unsigned char scsi3addr[8];
  2466. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2467. if (!buf) {
  2468. dev_warn(&h->pdev->dev, "out of memory\n");
  2469. return;
  2470. }
  2471. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2472. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
  2473. sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
  2474. if (return_code == IO_OK) {
  2475. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2476. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2477. } else { /* read capacity command failed */
  2478. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2479. *total_size = 0;
  2480. *block_size = BLOCK_SIZE;
  2481. }
  2482. kfree(buf);
  2483. }
  2484. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  2485. sector_t *total_size, unsigned int *block_size)
  2486. {
  2487. ReadCapdata_struct_16 *buf;
  2488. int return_code;
  2489. unsigned char scsi3addr[8];
  2490. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2491. if (!buf) {
  2492. dev_warn(&h->pdev->dev, "out of memory\n");
  2493. return;
  2494. }
  2495. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2496. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
  2497. buf, sizeof(ReadCapdata_struct_16),
  2498. 0, scsi3addr, TYPE_CMD);
  2499. if (return_code == IO_OK) {
  2500. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2501. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2502. } else { /* read capacity command failed */
  2503. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2504. *total_size = 0;
  2505. *block_size = BLOCK_SIZE;
  2506. }
  2507. dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
  2508. (unsigned long long)*total_size+1, *block_size);
  2509. kfree(buf);
  2510. }
  2511. static int cciss_revalidate(struct gendisk *disk)
  2512. {
  2513. ctlr_info_t *h = get_host(disk);
  2514. drive_info_struct *drv = get_drv(disk);
  2515. int logvol;
  2516. int FOUND = 0;
  2517. unsigned int block_size;
  2518. sector_t total_size;
  2519. InquiryData_struct *inq_buff = NULL;
  2520. for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
  2521. if (memcmp(h->drv[logvol]->LunID, drv->LunID,
  2522. sizeof(drv->LunID)) == 0) {
  2523. FOUND = 1;
  2524. break;
  2525. }
  2526. }
  2527. if (!FOUND)
  2528. return 1;
  2529. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2530. if (inq_buff == NULL) {
  2531. dev_warn(&h->pdev->dev, "out of memory\n");
  2532. return 1;
  2533. }
  2534. if (h->cciss_read == CCISS_READ_10) {
  2535. cciss_read_capacity(h, logvol,
  2536. &total_size, &block_size);
  2537. } else {
  2538. cciss_read_capacity_16(h, logvol,
  2539. &total_size, &block_size);
  2540. }
  2541. cciss_geometry_inquiry(h, logvol, total_size, block_size,
  2542. inq_buff, drv);
  2543. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2544. set_capacity(disk, drv->nr_blocks);
  2545. kfree(inq_buff);
  2546. return 0;
  2547. }
  2548. /*
  2549. * Map (physical) PCI mem into (virtual) kernel space
  2550. */
  2551. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2552. {
  2553. ulong page_base = ((ulong) base) & PAGE_MASK;
  2554. ulong page_offs = ((ulong) base) - page_base;
  2555. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2556. return page_remapped ? (page_remapped + page_offs) : NULL;
  2557. }
  2558. /*
  2559. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2560. * the Q to wait for completion.
  2561. */
  2562. static void start_io(ctlr_info_t *h)
  2563. {
  2564. CommandList_struct *c;
  2565. while (!hlist_empty(&h->reqQ)) {
  2566. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  2567. /* can't do anything if fifo is full */
  2568. if ((h->access.fifo_full(h))) {
  2569. dev_warn(&h->pdev->dev, "fifo full\n");
  2570. break;
  2571. }
  2572. /* Get the first entry from the Request Q */
  2573. removeQ(c);
  2574. h->Qdepth--;
  2575. /* Tell the controller execute command */
  2576. h->access.submit_command(h, c);
  2577. /* Put job onto the completed Q */
  2578. addQ(&h->cmpQ, c);
  2579. }
  2580. }
  2581. /* Assumes that h->lock is held. */
  2582. /* Zeros out the error record and then resends the command back */
  2583. /* to the controller */
  2584. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2585. {
  2586. /* erase the old error information */
  2587. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2588. /* add it to software queue and then send it to the controller */
  2589. addQ(&h->reqQ, c);
  2590. h->Qdepth++;
  2591. if (h->Qdepth > h->maxQsinceinit)
  2592. h->maxQsinceinit = h->Qdepth;
  2593. start_io(h);
  2594. }
  2595. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2596. unsigned int msg_byte, unsigned int host_byte,
  2597. unsigned int driver_byte)
  2598. {
  2599. /* inverse of macros in scsi.h */
  2600. return (scsi_status_byte & 0xff) |
  2601. ((msg_byte & 0xff) << 8) |
  2602. ((host_byte & 0xff) << 16) |
  2603. ((driver_byte & 0xff) << 24);
  2604. }
  2605. static inline int evaluate_target_status(ctlr_info_t *h,
  2606. CommandList_struct *cmd, int *retry_cmd)
  2607. {
  2608. unsigned char sense_key;
  2609. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2610. int error_value;
  2611. *retry_cmd = 0;
  2612. /* If we get in here, it means we got "target status", that is, scsi status */
  2613. status_byte = cmd->err_info->ScsiStatus;
  2614. driver_byte = DRIVER_OK;
  2615. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2616. if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
  2617. host_byte = DID_PASSTHROUGH;
  2618. else
  2619. host_byte = DID_OK;
  2620. error_value = make_status_bytes(status_byte, msg_byte,
  2621. host_byte, driver_byte);
  2622. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2623. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
  2624. dev_warn(&h->pdev->dev, "cmd %p "
  2625. "has SCSI Status 0x%x\n",
  2626. cmd, cmd->err_info->ScsiStatus);
  2627. return error_value;
  2628. }
  2629. /* check the sense key */
  2630. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2631. /* no status or recovered error */
  2632. if (((sense_key == 0x0) || (sense_key == 0x1)) &&
  2633. (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
  2634. error_value = 0;
  2635. if (check_for_unit_attention(h, cmd)) {
  2636. *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
  2637. return 0;
  2638. }
  2639. /* Not SG_IO or similar? */
  2640. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
  2641. if (error_value != 0)
  2642. dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
  2643. " sense key = 0x%x\n", cmd, sense_key);
  2644. return error_value;
  2645. }
  2646. /* SG_IO or similar, copy sense data back */
  2647. if (cmd->rq->sense) {
  2648. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2649. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2650. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2651. cmd->rq->sense_len);
  2652. } else
  2653. cmd->rq->sense_len = 0;
  2654. return error_value;
  2655. }
  2656. /* checks the status of the job and calls complete buffers to mark all
  2657. * buffers for the completed job. Note that this function does not need
  2658. * to hold the hba/queue lock.
  2659. */
  2660. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2661. int timeout)
  2662. {
  2663. int retry_cmd = 0;
  2664. struct request *rq = cmd->rq;
  2665. rq->errors = 0;
  2666. if (timeout)
  2667. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2668. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2669. goto after_error_processing;
  2670. switch (cmd->err_info->CommandStatus) {
  2671. case CMD_TARGET_STATUS:
  2672. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2673. break;
  2674. case CMD_DATA_UNDERRUN:
  2675. if (cmd->rq->cmd_type == REQ_TYPE_FS) {
  2676. dev_warn(&h->pdev->dev, "cmd %p has"
  2677. " completed with data underrun "
  2678. "reported\n", cmd);
  2679. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2680. }
  2681. break;
  2682. case CMD_DATA_OVERRUN:
  2683. if (cmd->rq->cmd_type == REQ_TYPE_FS)
  2684. dev_warn(&h->pdev->dev, "cciss: cmd %p has"
  2685. " completed with data overrun "
  2686. "reported\n", cmd);
  2687. break;
  2688. case CMD_INVALID:
  2689. dev_warn(&h->pdev->dev, "cciss: cmd %p is "
  2690. "reported invalid\n", cmd);
  2691. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2692. cmd->err_info->CommandStatus, DRIVER_OK,
  2693. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2694. DID_PASSTHROUGH : DID_ERROR);
  2695. break;
  2696. case CMD_PROTOCOL_ERR:
  2697. dev_warn(&h->pdev->dev, "cciss: cmd %p has "
  2698. "protocol error\n", cmd);
  2699. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2700. cmd->err_info->CommandStatus, DRIVER_OK,
  2701. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2702. DID_PASSTHROUGH : DID_ERROR);
  2703. break;
  2704. case CMD_HARDWARE_ERR:
  2705. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2706. " hardware error\n", cmd);
  2707. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2708. cmd->err_info->CommandStatus, DRIVER_OK,
  2709. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2710. DID_PASSTHROUGH : DID_ERROR);
  2711. break;
  2712. case CMD_CONNECTION_LOST:
  2713. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2714. "connection lost\n", cmd);
  2715. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2716. cmd->err_info->CommandStatus, DRIVER_OK,
  2717. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2718. DID_PASSTHROUGH : DID_ERROR);
  2719. break;
  2720. case CMD_ABORTED:
  2721. dev_warn(&h->pdev->dev, "cciss: cmd %p was "
  2722. "aborted\n", cmd);
  2723. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2724. cmd->err_info->CommandStatus, DRIVER_OK,
  2725. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2726. DID_PASSTHROUGH : DID_ABORT);
  2727. break;
  2728. case CMD_ABORT_FAILED:
  2729. dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
  2730. "abort failed\n", cmd);
  2731. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2732. cmd->err_info->CommandStatus, DRIVER_OK,
  2733. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2734. DID_PASSTHROUGH : DID_ERROR);
  2735. break;
  2736. case CMD_UNSOLICITED_ABORT:
  2737. dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
  2738. "abort %p\n", h->ctlr, cmd);
  2739. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2740. retry_cmd = 1;
  2741. dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
  2742. cmd->retry_count++;
  2743. } else
  2744. dev_warn(&h->pdev->dev,
  2745. "%p retried too many times\n", cmd);
  2746. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2747. cmd->err_info->CommandStatus, DRIVER_OK,
  2748. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2749. DID_PASSTHROUGH : DID_ABORT);
  2750. break;
  2751. case CMD_TIMEOUT:
  2752. dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
  2753. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2754. cmd->err_info->CommandStatus, DRIVER_OK,
  2755. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2756. DID_PASSTHROUGH : DID_ERROR);
  2757. break;
  2758. default:
  2759. dev_warn(&h->pdev->dev, "cmd %p returned "
  2760. "unknown status %x\n", cmd,
  2761. cmd->err_info->CommandStatus);
  2762. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2763. cmd->err_info->CommandStatus, DRIVER_OK,
  2764. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2765. DID_PASSTHROUGH : DID_ERROR);
  2766. }
  2767. after_error_processing:
  2768. /* We need to return this command */
  2769. if (retry_cmd) {
  2770. resend_cciss_cmd(h, cmd);
  2771. return;
  2772. }
  2773. cmd->rq->completion_data = cmd;
  2774. blk_complete_request(cmd->rq);
  2775. }
  2776. static inline u32 cciss_tag_contains_index(u32 tag)
  2777. {
  2778. #define DIRECT_LOOKUP_BIT 0x10
  2779. return tag & DIRECT_LOOKUP_BIT;
  2780. }
  2781. static inline u32 cciss_tag_to_index(u32 tag)
  2782. {
  2783. #define DIRECT_LOOKUP_SHIFT 5
  2784. return tag >> DIRECT_LOOKUP_SHIFT;
  2785. }
  2786. static inline u32 cciss_tag_discard_error_bits(u32 tag)
  2787. {
  2788. #define CCISS_ERROR_BITS 0x03
  2789. return tag & ~CCISS_ERROR_BITS;
  2790. }
  2791. static inline void cciss_mark_tag_indexed(u32 *tag)
  2792. {
  2793. *tag |= DIRECT_LOOKUP_BIT;
  2794. }
  2795. static inline void cciss_set_tag_index(u32 *tag, u32 index)
  2796. {
  2797. *tag |= (index << DIRECT_LOOKUP_SHIFT);
  2798. }
  2799. /*
  2800. * Get a request and submit it to the controller.
  2801. */
  2802. static void do_cciss_request(struct request_queue *q)
  2803. {
  2804. ctlr_info_t *h = q->queuedata;
  2805. CommandList_struct *c;
  2806. sector_t start_blk;
  2807. int seg;
  2808. struct request *creq;
  2809. u64bit temp64;
  2810. struct scatterlist *tmp_sg;
  2811. SGDescriptor_struct *curr_sg;
  2812. drive_info_struct *drv;
  2813. int i, dir;
  2814. int sg_index = 0;
  2815. int chained = 0;
  2816. /* We call start_io here in case there is a command waiting on the
  2817. * queue that has not been sent.
  2818. */
  2819. if (blk_queue_plugged(q))
  2820. goto startio;
  2821. queue:
  2822. creq = blk_peek_request(q);
  2823. if (!creq)
  2824. goto startio;
  2825. BUG_ON(creq->nr_phys_segments > h->maxsgentries);
  2826. c = cmd_alloc(h);
  2827. if (!c)
  2828. goto full;
  2829. blk_start_request(creq);
  2830. tmp_sg = h->scatter_list[c->cmdindex];
  2831. spin_unlock_irq(q->queue_lock);
  2832. c->cmd_type = CMD_RWREQ;
  2833. c->rq = creq;
  2834. /* fill in the request */
  2835. drv = creq->rq_disk->private_data;
  2836. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2837. /* got command from pool, so use the command block index instead */
  2838. /* for direct lookups. */
  2839. /* The first 2 bits are reserved for controller error reporting. */
  2840. cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
  2841. cciss_mark_tag_indexed(&c->Header.Tag.lower);
  2842. memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
  2843. c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
  2844. c->Request.Type.Type = TYPE_CMD; /* It is a command. */
  2845. c->Request.Type.Attribute = ATTR_SIMPLE;
  2846. c->Request.Type.Direction =
  2847. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2848. c->Request.Timeout = 0; /* Don't time out */
  2849. c->Request.CDB[0] =
  2850. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2851. start_blk = blk_rq_pos(creq);
  2852. dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
  2853. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2854. sg_init_table(tmp_sg, h->maxsgentries);
  2855. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2856. /* get the DMA records for the setup */
  2857. if (c->Request.Type.Direction == XFER_READ)
  2858. dir = PCI_DMA_FROMDEVICE;
  2859. else
  2860. dir = PCI_DMA_TODEVICE;
  2861. curr_sg = c->SG;
  2862. sg_index = 0;
  2863. chained = 0;
  2864. for (i = 0; i < seg; i++) {
  2865. if (((sg_index+1) == (h->max_cmd_sgentries)) &&
  2866. !chained && ((seg - i) > 1)) {
  2867. /* Point to next chain block. */
  2868. curr_sg = h->cmd_sg_list[c->cmdindex];
  2869. sg_index = 0;
  2870. chained = 1;
  2871. }
  2872. curr_sg[sg_index].Len = tmp_sg[i].length;
  2873. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2874. tmp_sg[i].offset,
  2875. tmp_sg[i].length, dir);
  2876. curr_sg[sg_index].Addr.lower = temp64.val32.lower;
  2877. curr_sg[sg_index].Addr.upper = temp64.val32.upper;
  2878. curr_sg[sg_index].Ext = 0; /* we are not chaining */
  2879. ++sg_index;
  2880. }
  2881. if (chained)
  2882. cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
  2883. (seg - (h->max_cmd_sgentries - 1)) *
  2884. sizeof(SGDescriptor_struct));
  2885. /* track how many SG entries we are using */
  2886. if (seg > h->maxSG)
  2887. h->maxSG = seg;
  2888. dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
  2889. "chained[%d]\n",
  2890. blk_rq_sectors(creq), seg, chained);
  2891. c->Header.SGTotal = seg + chained;
  2892. if (seg <= h->max_cmd_sgentries)
  2893. c->Header.SGList = c->Header.SGTotal;
  2894. else
  2895. c->Header.SGList = h->max_cmd_sgentries;
  2896. set_performant_mode(h, c);
  2897. if (likely(creq->cmd_type == REQ_TYPE_FS)) {
  2898. if(h->cciss_read == CCISS_READ_10) {
  2899. c->Request.CDB[1] = 0;
  2900. c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
  2901. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2902. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2903. c->Request.CDB[5] = start_blk & 0xff;
  2904. c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
  2905. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2906. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2907. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2908. } else {
  2909. u32 upper32 = upper_32_bits(start_blk);
  2910. c->Request.CDBLen = 16;
  2911. c->Request.CDB[1]= 0;
  2912. c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
  2913. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2914. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2915. c->Request.CDB[5]= upper32 & 0xff;
  2916. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2917. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2918. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2919. c->Request.CDB[9]= start_blk & 0xff;
  2920. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2921. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2922. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2923. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2924. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2925. }
  2926. } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
  2927. c->Request.CDBLen = creq->cmd_len;
  2928. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2929. } else {
  2930. dev_warn(&h->pdev->dev, "bad request type %d\n",
  2931. creq->cmd_type);
  2932. BUG();
  2933. }
  2934. spin_lock_irq(q->queue_lock);
  2935. addQ(&h->reqQ, c);
  2936. h->Qdepth++;
  2937. if (h->Qdepth > h->maxQsinceinit)
  2938. h->maxQsinceinit = h->Qdepth;
  2939. goto queue;
  2940. full:
  2941. blk_stop_queue(q);
  2942. startio:
  2943. /* We will already have the driver lock here so not need
  2944. * to lock it.
  2945. */
  2946. start_io(h);
  2947. }
  2948. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2949. {
  2950. return h->access.command_completed(h);
  2951. }
  2952. static inline int interrupt_pending(ctlr_info_t *h)
  2953. {
  2954. return h->access.intr_pending(h);
  2955. }
  2956. static inline long interrupt_not_for_us(ctlr_info_t *h)
  2957. {
  2958. return ((h->access.intr_pending(h) == 0) ||
  2959. (h->interrupts_enabled == 0));
  2960. }
  2961. static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
  2962. u32 raw_tag)
  2963. {
  2964. if (unlikely(tag_index >= h->nr_cmds)) {
  2965. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2966. return 1;
  2967. }
  2968. return 0;
  2969. }
  2970. static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
  2971. u32 raw_tag)
  2972. {
  2973. removeQ(c);
  2974. if (likely(c->cmd_type == CMD_RWREQ))
  2975. complete_command(h, c, 0);
  2976. else if (c->cmd_type == CMD_IOCTL_PEND)
  2977. complete(c->waiting);
  2978. #ifdef CONFIG_CISS_SCSI_TAPE
  2979. else if (c->cmd_type == CMD_SCSI)
  2980. complete_scsi_command(c, 0, raw_tag);
  2981. #endif
  2982. }
  2983. static inline u32 next_command(ctlr_info_t *h)
  2984. {
  2985. u32 a;
  2986. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  2987. return h->access.command_completed(h);
  2988. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  2989. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  2990. (h->reply_pool_head)++;
  2991. h->commands_outstanding--;
  2992. } else {
  2993. a = FIFO_EMPTY;
  2994. }
  2995. /* Check for wraparound */
  2996. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  2997. h->reply_pool_head = h->reply_pool;
  2998. h->reply_pool_wraparound ^= 1;
  2999. }
  3000. return a;
  3001. }
  3002. /* process completion of an indexed ("direct lookup") command */
  3003. static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3004. {
  3005. u32 tag_index;
  3006. CommandList_struct *c;
  3007. tag_index = cciss_tag_to_index(raw_tag);
  3008. if (bad_tag(h, tag_index, raw_tag))
  3009. return next_command(h);
  3010. c = h->cmd_pool + tag_index;
  3011. finish_cmd(h, c, raw_tag);
  3012. return next_command(h);
  3013. }
  3014. /* process completion of a non-indexed command */
  3015. static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3016. {
  3017. u32 tag;
  3018. CommandList_struct *c = NULL;
  3019. struct hlist_node *tmp;
  3020. __u32 busaddr_masked, tag_masked;
  3021. tag = cciss_tag_discard_error_bits(raw_tag);
  3022. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  3023. busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
  3024. tag_masked = cciss_tag_discard_error_bits(tag);
  3025. if (busaddr_masked == tag_masked) {
  3026. finish_cmd(h, c, raw_tag);
  3027. return next_command(h);
  3028. }
  3029. }
  3030. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3031. return next_command(h);
  3032. }
  3033. static irqreturn_t do_cciss_intx(int irq, void *dev_id)
  3034. {
  3035. ctlr_info_t *h = dev_id;
  3036. unsigned long flags;
  3037. u32 raw_tag;
  3038. if (interrupt_not_for_us(h))
  3039. return IRQ_NONE;
  3040. spin_lock_irqsave(&h->lock, flags);
  3041. while (interrupt_pending(h)) {
  3042. raw_tag = get_next_completion(h);
  3043. while (raw_tag != FIFO_EMPTY) {
  3044. if (cciss_tag_contains_index(raw_tag))
  3045. raw_tag = process_indexed_cmd(h, raw_tag);
  3046. else
  3047. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3048. }
  3049. }
  3050. spin_unlock_irqrestore(&h->lock, flags);
  3051. return IRQ_HANDLED;
  3052. }
  3053. /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
  3054. * check the interrupt pending register because it is not set.
  3055. */
  3056. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
  3057. {
  3058. ctlr_info_t *h = dev_id;
  3059. unsigned long flags;
  3060. u32 raw_tag;
  3061. spin_lock_irqsave(&h->lock, flags);
  3062. raw_tag = get_next_completion(h);
  3063. while (raw_tag != FIFO_EMPTY) {
  3064. if (cciss_tag_contains_index(raw_tag))
  3065. raw_tag = process_indexed_cmd(h, raw_tag);
  3066. else
  3067. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3068. }
  3069. spin_unlock_irqrestore(&h->lock, flags);
  3070. return IRQ_HANDLED;
  3071. }
  3072. /**
  3073. * add_to_scan_list() - add controller to rescan queue
  3074. * @h: Pointer to the controller.
  3075. *
  3076. * Adds the controller to the rescan queue if not already on the queue.
  3077. *
  3078. * returns 1 if added to the queue, 0 if skipped (could be on the
  3079. * queue already, or the controller could be initializing or shutting
  3080. * down).
  3081. **/
  3082. static int add_to_scan_list(struct ctlr_info *h)
  3083. {
  3084. struct ctlr_info *test_h;
  3085. int found = 0;
  3086. int ret = 0;
  3087. if (h->busy_initializing)
  3088. return 0;
  3089. if (!mutex_trylock(&h->busy_shutting_down))
  3090. return 0;
  3091. mutex_lock(&scan_mutex);
  3092. list_for_each_entry(test_h, &scan_q, scan_list) {
  3093. if (test_h == h) {
  3094. found = 1;
  3095. break;
  3096. }
  3097. }
  3098. if (!found && !h->busy_scanning) {
  3099. INIT_COMPLETION(h->scan_wait);
  3100. list_add_tail(&h->scan_list, &scan_q);
  3101. ret = 1;
  3102. }
  3103. mutex_unlock(&scan_mutex);
  3104. mutex_unlock(&h->busy_shutting_down);
  3105. return ret;
  3106. }
  3107. /**
  3108. * remove_from_scan_list() - remove controller from rescan queue
  3109. * @h: Pointer to the controller.
  3110. *
  3111. * Removes the controller from the rescan queue if present. Blocks if
  3112. * the controller is currently conducting a rescan. The controller
  3113. * can be in one of three states:
  3114. * 1. Doesn't need a scan
  3115. * 2. On the scan list, but not scanning yet (we remove it)
  3116. * 3. Busy scanning (and not on the list). In this case we want to wait for
  3117. * the scan to complete to make sure the scanning thread for this
  3118. * controller is completely idle.
  3119. **/
  3120. static void remove_from_scan_list(struct ctlr_info *h)
  3121. {
  3122. struct ctlr_info *test_h, *tmp_h;
  3123. mutex_lock(&scan_mutex);
  3124. list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
  3125. if (test_h == h) { /* state 2. */
  3126. list_del(&h->scan_list);
  3127. complete_all(&h->scan_wait);
  3128. mutex_unlock(&scan_mutex);
  3129. return;
  3130. }
  3131. }
  3132. if (h->busy_scanning) { /* state 3. */
  3133. mutex_unlock(&scan_mutex);
  3134. wait_for_completion(&h->scan_wait);
  3135. } else { /* state 1, nothing to do. */
  3136. mutex_unlock(&scan_mutex);
  3137. }
  3138. }
  3139. /**
  3140. * scan_thread() - kernel thread used to rescan controllers
  3141. * @data: Ignored.
  3142. *
  3143. * A kernel thread used scan for drive topology changes on
  3144. * controllers. The thread processes only one controller at a time
  3145. * using a queue. Controllers are added to the queue using
  3146. * add_to_scan_list() and removed from the queue either after done
  3147. * processing or using remove_from_scan_list().
  3148. *
  3149. * returns 0.
  3150. **/
  3151. static int scan_thread(void *data)
  3152. {
  3153. struct ctlr_info *h;
  3154. while (1) {
  3155. set_current_state(TASK_INTERRUPTIBLE);
  3156. schedule();
  3157. if (kthread_should_stop())
  3158. break;
  3159. while (1) {
  3160. mutex_lock(&scan_mutex);
  3161. if (list_empty(&scan_q)) {
  3162. mutex_unlock(&scan_mutex);
  3163. break;
  3164. }
  3165. h = list_entry(scan_q.next,
  3166. struct ctlr_info,
  3167. scan_list);
  3168. list_del(&h->scan_list);
  3169. h->busy_scanning = 1;
  3170. mutex_unlock(&scan_mutex);
  3171. rebuild_lun_table(h, 0, 0);
  3172. complete_all(&h->scan_wait);
  3173. mutex_lock(&scan_mutex);
  3174. h->busy_scanning = 0;
  3175. mutex_unlock(&scan_mutex);
  3176. }
  3177. }
  3178. return 0;
  3179. }
  3180. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  3181. {
  3182. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  3183. return 0;
  3184. switch (c->err_info->SenseInfo[12]) {
  3185. case STATE_CHANGED:
  3186. dev_warn(&h->pdev->dev, "a state change "
  3187. "detected, command retried\n");
  3188. return 1;
  3189. break;
  3190. case LUN_FAILED:
  3191. dev_warn(&h->pdev->dev, "LUN failure "
  3192. "detected, action required\n");
  3193. return 1;
  3194. break;
  3195. case REPORT_LUNS_CHANGED:
  3196. dev_warn(&h->pdev->dev, "report LUN data changed\n");
  3197. /*
  3198. * Here, we could call add_to_scan_list and wake up the scan thread,
  3199. * except that it's quite likely that we will get more than one
  3200. * REPORT_LUNS_CHANGED condition in quick succession, which means
  3201. * that those which occur after the first one will likely happen
  3202. * *during* the scan_thread's rescan. And the rescan code is not
  3203. * robust enough to restart in the middle, undoing what it has already
  3204. * done, and it's not clear that it's even possible to do this, since
  3205. * part of what it does is notify the block layer, which starts
  3206. * doing it's own i/o to read partition tables and so on, and the
  3207. * driver doesn't have visibility to know what might need undoing.
  3208. * In any event, if possible, it is horribly complicated to get right
  3209. * so we just don't do it for now.
  3210. *
  3211. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  3212. */
  3213. return 1;
  3214. break;
  3215. case POWER_OR_RESET:
  3216. dev_warn(&h->pdev->dev,
  3217. "a power on or device reset detected\n");
  3218. return 1;
  3219. break;
  3220. case UNIT_ATTENTION_CLEARED:
  3221. dev_warn(&h->pdev->dev,
  3222. "unit attention cleared by another initiator\n");
  3223. return 1;
  3224. break;
  3225. default:
  3226. dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
  3227. return 1;
  3228. }
  3229. }
  3230. /*
  3231. * We cannot read the structure directly, for portability we must use
  3232. * the io functions.
  3233. * This is for debug only.
  3234. */
  3235. static void print_cfg_table(ctlr_info_t *h)
  3236. {
  3237. int i;
  3238. char temp_name[17];
  3239. CfgTable_struct *tb = h->cfgtable;
  3240. dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
  3241. dev_dbg(&h->pdev->dev, "------------------------------------\n");
  3242. for (i = 0; i < 4; i++)
  3243. temp_name[i] = readb(&(tb->Signature[i]));
  3244. temp_name[4] = '\0';
  3245. dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
  3246. dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
  3247. readl(&(tb->SpecValence)));
  3248. dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
  3249. readl(&(tb->TransportSupport)));
  3250. dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
  3251. readl(&(tb->TransportActive)));
  3252. dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
  3253. readl(&(tb->HostWrite.TransportRequest)));
  3254. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
  3255. readl(&(tb->HostWrite.CoalIntDelay)));
  3256. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
  3257. readl(&(tb->HostWrite.CoalIntCount)));
  3258. dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
  3259. readl(&(tb->CmdsOutMax)));
  3260. dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
  3261. readl(&(tb->BusTypes)));
  3262. for (i = 0; i < 16; i++)
  3263. temp_name[i] = readb(&(tb->ServerName[i]));
  3264. temp_name[16] = '\0';
  3265. dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
  3266. dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
  3267. readl(&(tb->HeartBeat)));
  3268. }
  3269. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3270. {
  3271. int i, offset, mem_type, bar_type;
  3272. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3273. return 0;
  3274. offset = 0;
  3275. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3276. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3277. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3278. offset += 4;
  3279. else {
  3280. mem_type = pci_resource_flags(pdev, i) &
  3281. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3282. switch (mem_type) {
  3283. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3284. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3285. offset += 4; /* 32 bit */
  3286. break;
  3287. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3288. offset += 8;
  3289. break;
  3290. default: /* reserved in PCI 2.2 */
  3291. dev_warn(&pdev->dev,
  3292. "Base address is invalid\n");
  3293. return -1;
  3294. break;
  3295. }
  3296. }
  3297. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3298. return i + 1;
  3299. }
  3300. return -1;
  3301. }
  3302. /* Fill in bucket_map[], given nsgs (the max number of
  3303. * scatter gather elements supported) and bucket[],
  3304. * which is an array of 8 integers. The bucket[] array
  3305. * contains 8 different DMA transfer sizes (in 16
  3306. * byte increments) which the controller uses to fetch
  3307. * commands. This function fills in bucket_map[], which
  3308. * maps a given number of scatter gather elements to one of
  3309. * the 8 DMA transfer sizes. The point of it is to allow the
  3310. * controller to only do as much DMA as needed to fetch the
  3311. * command, with the DMA transfer size encoded in the lower
  3312. * bits of the command address.
  3313. */
  3314. static void calc_bucket_map(int bucket[], int num_buckets,
  3315. int nsgs, int *bucket_map)
  3316. {
  3317. int i, j, b, size;
  3318. /* even a command with 0 SGs requires 4 blocks */
  3319. #define MINIMUM_TRANSFER_BLOCKS 4
  3320. #define NUM_BUCKETS 8
  3321. /* Note, bucket_map must have nsgs+1 entries. */
  3322. for (i = 0; i <= nsgs; i++) {
  3323. /* Compute size of a command with i SG entries */
  3324. size = i + MINIMUM_TRANSFER_BLOCKS;
  3325. b = num_buckets; /* Assume the biggest bucket */
  3326. /* Find the bucket that is just big enough */
  3327. for (j = 0; j < 8; j++) {
  3328. if (bucket[j] >= size) {
  3329. b = j;
  3330. break;
  3331. }
  3332. }
  3333. /* for a command with i SG entries, use bucket b. */
  3334. bucket_map[i] = b;
  3335. }
  3336. }
  3337. static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
  3338. {
  3339. int i;
  3340. /* under certain very rare conditions, this can take awhile.
  3341. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3342. * as we enter this code.) */
  3343. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3344. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3345. break;
  3346. usleep_range(10000, 20000);
  3347. }
  3348. }
  3349. static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
  3350. {
  3351. /* This is a bit complicated. There are 8 registers on
  3352. * the controller which we write to to tell it 8 different
  3353. * sizes of commands which there may be. It's a way of
  3354. * reducing the DMA done to fetch each command. Encoded into
  3355. * each command's tag are 3 bits which communicate to the controller
  3356. * which of the eight sizes that command fits within. The size of
  3357. * each command depends on how many scatter gather entries there are.
  3358. * Each SG entry requires 16 bytes. The eight registers are programmed
  3359. * with the number of 16-byte blocks a command of that size requires.
  3360. * The smallest command possible requires 5 such 16 byte blocks.
  3361. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3362. * blocks. Note, this only extends to the SG entries contained
  3363. * within the command block, and does not extend to chained blocks
  3364. * of SG elements. bft[] contains the eight values we write to
  3365. * the registers. They are not evenly distributed, but have more
  3366. * sizes for small commands, and fewer sizes for larger commands.
  3367. */
  3368. __u32 trans_offset;
  3369. int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3370. /*
  3371. * 5 = 1 s/g entry or 4k
  3372. * 6 = 2 s/g entry or 8k
  3373. * 8 = 4 s/g entry or 16k
  3374. * 10 = 6 s/g entry or 24k
  3375. */
  3376. unsigned long register_value;
  3377. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3378. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3379. /* Controller spec: zero out this buffer. */
  3380. memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
  3381. h->reply_pool_head = h->reply_pool;
  3382. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3383. calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
  3384. h->blockFetchTable);
  3385. writel(bft[0], &h->transtable->BlockFetch0);
  3386. writel(bft[1], &h->transtable->BlockFetch1);
  3387. writel(bft[2], &h->transtable->BlockFetch2);
  3388. writel(bft[3], &h->transtable->BlockFetch3);
  3389. writel(bft[4], &h->transtable->BlockFetch4);
  3390. writel(bft[5], &h->transtable->BlockFetch5);
  3391. writel(bft[6], &h->transtable->BlockFetch6);
  3392. writel(bft[7], &h->transtable->BlockFetch7);
  3393. /* size of controller ring buffer */
  3394. writel(h->max_commands, &h->transtable->RepQSize);
  3395. writel(1, &h->transtable->RepQCount);
  3396. writel(0, &h->transtable->RepQCtrAddrLow32);
  3397. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3398. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3399. writel(0, &h->transtable->RepQAddr0High32);
  3400. writel(CFGTBL_Trans_Performant,
  3401. &(h->cfgtable->HostWrite.TransportRequest));
  3402. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3403. cciss_wait_for_mode_change_ack(h);
  3404. register_value = readl(&(h->cfgtable->TransportActive));
  3405. if (!(register_value & CFGTBL_Trans_Performant))
  3406. dev_warn(&h->pdev->dev, "cciss: unable to get board into"
  3407. " performant mode\n");
  3408. }
  3409. static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
  3410. {
  3411. __u32 trans_support;
  3412. dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
  3413. /* Attempt to put controller into performant mode if supported */
  3414. /* Does board support performant mode? */
  3415. trans_support = readl(&(h->cfgtable->TransportSupport));
  3416. if (!(trans_support & PERFORMANT_MODE))
  3417. return;
  3418. dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
  3419. /* Performant mode demands commands on a 32 byte boundary
  3420. * pci_alloc_consistent aligns on page boundarys already.
  3421. * Just need to check if divisible by 32
  3422. */
  3423. if ((sizeof(CommandList_struct) % 32) != 0) {
  3424. dev_warn(&h->pdev->dev, "%s %d %s\n",
  3425. "cciss info: command size[",
  3426. (int)sizeof(CommandList_struct),
  3427. "] not divisible by 32, no performant mode..\n");
  3428. return;
  3429. }
  3430. /* Performant mode ring buffer and supporting data structures */
  3431. h->reply_pool = (__u64 *)pci_alloc_consistent(
  3432. h->pdev, h->max_commands * sizeof(__u64),
  3433. &(h->reply_pool_dhandle));
  3434. /* Need a block fetch table for performant mode */
  3435. h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
  3436. sizeof(__u32)), GFP_KERNEL);
  3437. if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
  3438. goto clean_up;
  3439. cciss_enter_performant_mode(h);
  3440. /* Change the access methods to the performant access methods */
  3441. h->access = SA5_performant_access;
  3442. h->transMethod = CFGTBL_Trans_Performant;
  3443. return;
  3444. clean_up:
  3445. kfree(h->blockFetchTable);
  3446. if (h->reply_pool)
  3447. pci_free_consistent(h->pdev,
  3448. h->max_commands * sizeof(__u64),
  3449. h->reply_pool,
  3450. h->reply_pool_dhandle);
  3451. return;
  3452. } /* cciss_put_controller_into_performant_mode */
  3453. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3454. * controllers that are capable. If not, we use IO-APIC mode.
  3455. */
  3456. static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
  3457. {
  3458. #ifdef CONFIG_PCI_MSI
  3459. int err;
  3460. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3461. {0, 2}, {0, 3}
  3462. };
  3463. /* Some boards advertise MSI but don't really support it */
  3464. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3465. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3466. goto default_int_mode;
  3467. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3468. err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
  3469. if (!err) {
  3470. h->intr[0] = cciss_msix_entries[0].vector;
  3471. h->intr[1] = cciss_msix_entries[1].vector;
  3472. h->intr[2] = cciss_msix_entries[2].vector;
  3473. h->intr[3] = cciss_msix_entries[3].vector;
  3474. h->msix_vector = 1;
  3475. return;
  3476. }
  3477. if (err > 0) {
  3478. dev_warn(&h->pdev->dev,
  3479. "only %d MSI-X vectors available\n", err);
  3480. goto default_int_mode;
  3481. } else {
  3482. dev_warn(&h->pdev->dev,
  3483. "MSI-X init failed %d\n", err);
  3484. goto default_int_mode;
  3485. }
  3486. }
  3487. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3488. if (!pci_enable_msi(h->pdev))
  3489. h->msi_vector = 1;
  3490. else
  3491. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3492. }
  3493. default_int_mode:
  3494. #endif /* CONFIG_PCI_MSI */
  3495. /* if we get here we're going to use the default interrupt mode */
  3496. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3497. return;
  3498. }
  3499. static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3500. {
  3501. int i;
  3502. u32 subsystem_vendor_id, subsystem_device_id;
  3503. subsystem_vendor_id = pdev->subsystem_vendor;
  3504. subsystem_device_id = pdev->subsystem_device;
  3505. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3506. subsystem_vendor_id;
  3507. for (i = 0; i < ARRAY_SIZE(products); i++)
  3508. if (*board_id == products[i].board_id)
  3509. return i;
  3510. dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
  3511. *board_id);
  3512. return -ENODEV;
  3513. }
  3514. static inline bool cciss_board_disabled(ctlr_info_t *h)
  3515. {
  3516. u16 command;
  3517. (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
  3518. return ((command & PCI_COMMAND_MEMORY) == 0);
  3519. }
  3520. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  3521. unsigned long *memory_bar)
  3522. {
  3523. int i;
  3524. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3525. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3526. /* addressing mode bits already removed */
  3527. *memory_bar = pci_resource_start(pdev, i);
  3528. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3529. *memory_bar);
  3530. return 0;
  3531. }
  3532. dev_warn(&pdev->dev, "no memory BAR found\n");
  3533. return -ENODEV;
  3534. }
  3535. static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
  3536. void __iomem *vaddr, int wait_for_ready)
  3537. #define BOARD_READY 1
  3538. #define BOARD_NOT_READY 0
  3539. {
  3540. int i, iterations;
  3541. u32 scratchpad;
  3542. if (wait_for_ready)
  3543. iterations = CCISS_BOARD_READY_ITERATIONS;
  3544. else
  3545. iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
  3546. for (i = 0; i < iterations; i++) {
  3547. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3548. if (wait_for_ready) {
  3549. if (scratchpad == CCISS_FIRMWARE_READY)
  3550. return 0;
  3551. } else {
  3552. if (scratchpad != CCISS_FIRMWARE_READY)
  3553. return 0;
  3554. }
  3555. msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
  3556. }
  3557. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3558. return -ENODEV;
  3559. }
  3560. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  3561. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3562. u64 *cfg_offset)
  3563. {
  3564. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3565. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3566. *cfg_base_addr &= (u32) 0x0000ffff;
  3567. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3568. if (*cfg_base_addr_index == -1) {
  3569. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
  3570. "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
  3571. return -ENODEV;
  3572. }
  3573. return 0;
  3574. }
  3575. static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
  3576. {
  3577. u64 cfg_offset;
  3578. u32 cfg_base_addr;
  3579. u64 cfg_base_addr_index;
  3580. u32 trans_offset;
  3581. int rc;
  3582. rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3583. &cfg_base_addr_index, &cfg_offset);
  3584. if (rc)
  3585. return rc;
  3586. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3587. cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
  3588. if (!h->cfgtable)
  3589. return -ENOMEM;
  3590. /* Find performant mode table. */
  3591. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3592. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3593. cfg_base_addr_index)+cfg_offset+trans_offset,
  3594. sizeof(*h->transtable));
  3595. if (!h->transtable)
  3596. return -ENOMEM;
  3597. return 0;
  3598. }
  3599. static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
  3600. {
  3601. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3602. /* Limit commands in memory limited kdump scenario. */
  3603. if (reset_devices && h->max_commands > 32)
  3604. h->max_commands = 32;
  3605. if (h->max_commands < 16) {
  3606. dev_warn(&h->pdev->dev, "Controller reports "
  3607. "max supported commands of %d, an obvious lie. "
  3608. "Using 16. Ensure that firmware is up to date.\n",
  3609. h->max_commands);
  3610. h->max_commands = 16;
  3611. }
  3612. }
  3613. /* Interrogate the hardware for some limits:
  3614. * max commands, max SG elements without chaining, and with chaining,
  3615. * SG chain block size, etc.
  3616. */
  3617. static void __devinit cciss_find_board_params(ctlr_info_t *h)
  3618. {
  3619. cciss_get_max_perf_mode_cmds(h);
  3620. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3621. h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
  3622. /*
  3623. * Limit in-command s/g elements to 32 save dma'able memory.
  3624. * Howvever spec says if 0, use 31
  3625. */
  3626. h->max_cmd_sgentries = 31;
  3627. if (h->maxsgentries > 512) {
  3628. h->max_cmd_sgentries = 32;
  3629. h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
  3630. h->maxsgentries--; /* save one for chain pointer */
  3631. } else {
  3632. h->maxsgentries = 31; /* default to traditional values */
  3633. h->chainsize = 0;
  3634. }
  3635. }
  3636. static inline bool CISS_signature_present(ctlr_info_t *h)
  3637. {
  3638. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3639. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3640. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3641. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3642. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3643. return false;
  3644. }
  3645. return true;
  3646. }
  3647. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3648. static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
  3649. {
  3650. #ifdef CONFIG_X86
  3651. u32 prefetch;
  3652. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3653. prefetch |= 0x100;
  3654. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3655. #endif
  3656. }
  3657. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3658. * in a prefetch beyond physical memory.
  3659. */
  3660. static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
  3661. {
  3662. u32 dma_prefetch;
  3663. __u32 dma_refetch;
  3664. if (h->board_id != 0x3225103C)
  3665. return;
  3666. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3667. dma_prefetch |= 0x8000;
  3668. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3669. pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3670. dma_refetch |= 0x1;
  3671. pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
  3672. }
  3673. static int __devinit cciss_pci_init(ctlr_info_t *h)
  3674. {
  3675. int prod_index, err;
  3676. prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
  3677. if (prod_index < 0)
  3678. return -ENODEV;
  3679. h->product_name = products[prod_index].product_name;
  3680. h->access = *(products[prod_index].access);
  3681. if (cciss_board_disabled(h)) {
  3682. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3683. return -ENODEV;
  3684. }
  3685. err = pci_enable_device(h->pdev);
  3686. if (err) {
  3687. dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
  3688. return err;
  3689. }
  3690. err = pci_request_regions(h->pdev, "cciss");
  3691. if (err) {
  3692. dev_warn(&h->pdev->dev,
  3693. "Cannot obtain PCI resources, aborting\n");
  3694. return err;
  3695. }
  3696. dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
  3697. dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
  3698. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3699. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3700. */
  3701. cciss_interrupt_mode(h);
  3702. err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
  3703. if (err)
  3704. goto err_out_free_res;
  3705. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3706. if (!h->vaddr) {
  3707. err = -ENOMEM;
  3708. goto err_out_free_res;
  3709. }
  3710. err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3711. if (err)
  3712. goto err_out_free_res;
  3713. err = cciss_find_cfgtables(h);
  3714. if (err)
  3715. goto err_out_free_res;
  3716. print_cfg_table(h);
  3717. cciss_find_board_params(h);
  3718. if (!CISS_signature_present(h)) {
  3719. err = -ENODEV;
  3720. goto err_out_free_res;
  3721. }
  3722. cciss_enable_scsi_prefetch(h);
  3723. cciss_p600_dma_prefetch_quirk(h);
  3724. cciss_put_controller_into_performant_mode(h);
  3725. return 0;
  3726. err_out_free_res:
  3727. /*
  3728. * Deliberately omit pci_disable_device(): it does something nasty to
  3729. * Smart Array controllers that pci_enable_device does not undo
  3730. */
  3731. if (h->transtable)
  3732. iounmap(h->transtable);
  3733. if (h->cfgtable)
  3734. iounmap(h->cfgtable);
  3735. if (h->vaddr)
  3736. iounmap(h->vaddr);
  3737. pci_release_regions(h->pdev);
  3738. return err;
  3739. }
  3740. /* Function to find the first free pointer into our hba[] array
  3741. * Returns -1 if no free entries are left.
  3742. */
  3743. static int alloc_cciss_hba(struct pci_dev *pdev)
  3744. {
  3745. int i;
  3746. for (i = 0; i < MAX_CTLR; i++) {
  3747. if (!hba[i]) {
  3748. ctlr_info_t *h;
  3749. h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3750. if (!h)
  3751. goto Enomem;
  3752. hba[i] = h;
  3753. return i;
  3754. }
  3755. }
  3756. dev_warn(&pdev->dev, "This driver supports a maximum"
  3757. " of %d controllers.\n", MAX_CTLR);
  3758. return -1;
  3759. Enomem:
  3760. dev_warn(&pdev->dev, "out of memory.\n");
  3761. return -1;
  3762. }
  3763. static void free_hba(ctlr_info_t *h)
  3764. {
  3765. int i;
  3766. hba[h->ctlr] = NULL;
  3767. for (i = 0; i < h->highest_lun + 1; i++)
  3768. if (h->gendisk[i] != NULL)
  3769. put_disk(h->gendisk[i]);
  3770. kfree(h);
  3771. }
  3772. /* Send a message CDB to the firmware. */
  3773. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3774. {
  3775. typedef struct {
  3776. CommandListHeader_struct CommandHeader;
  3777. RequestBlock_struct Request;
  3778. ErrDescriptor_struct ErrorDescriptor;
  3779. } Command;
  3780. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3781. Command *cmd;
  3782. dma_addr_t paddr64;
  3783. uint32_t paddr32, tag;
  3784. void __iomem *vaddr;
  3785. int i, err;
  3786. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3787. if (vaddr == NULL)
  3788. return -ENOMEM;
  3789. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3790. CCISS commands, so they must be allocated from the lower 4GiB of
  3791. memory. */
  3792. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3793. if (err) {
  3794. iounmap(vaddr);
  3795. return -ENOMEM;
  3796. }
  3797. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3798. if (cmd == NULL) {
  3799. iounmap(vaddr);
  3800. return -ENOMEM;
  3801. }
  3802. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3803. although there's no guarantee, we assume that the address is at
  3804. least 4-byte aligned (most likely, it's page-aligned). */
  3805. paddr32 = paddr64;
  3806. cmd->CommandHeader.ReplyQueue = 0;
  3807. cmd->CommandHeader.SGList = 0;
  3808. cmd->CommandHeader.SGTotal = 0;
  3809. cmd->CommandHeader.Tag.lower = paddr32;
  3810. cmd->CommandHeader.Tag.upper = 0;
  3811. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3812. cmd->Request.CDBLen = 16;
  3813. cmd->Request.Type.Type = TYPE_MSG;
  3814. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3815. cmd->Request.Type.Direction = XFER_NONE;
  3816. cmd->Request.Timeout = 0; /* Don't time out */
  3817. cmd->Request.CDB[0] = opcode;
  3818. cmd->Request.CDB[1] = type;
  3819. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3820. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3821. cmd->ErrorDescriptor.Addr.upper = 0;
  3822. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3823. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3824. for (i = 0; i < 10; i++) {
  3825. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3826. if ((tag & ~3) == paddr32)
  3827. break;
  3828. schedule_timeout_uninterruptible(HZ);
  3829. }
  3830. iounmap(vaddr);
  3831. /* we leak the DMA buffer here ... no choice since the controller could
  3832. still complete the command. */
  3833. if (i == 10) {
  3834. dev_err(&pdev->dev,
  3835. "controller message %02x:%02x timed out\n",
  3836. opcode, type);
  3837. return -ETIMEDOUT;
  3838. }
  3839. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3840. if (tag & 2) {
  3841. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3842. opcode, type);
  3843. return -EIO;
  3844. }
  3845. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3846. opcode, type);
  3847. return 0;
  3848. }
  3849. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3850. #define cciss_noop(p) cciss_message(p, 3, 0)
  3851. static int cciss_controller_hard_reset(struct pci_dev *pdev,
  3852. void * __iomem vaddr, bool use_doorbell)
  3853. {
  3854. u16 pmcsr;
  3855. int pos;
  3856. if (use_doorbell) {
  3857. /* For everything after the P600, the PCI power state method
  3858. * of resetting the controller doesn't work, so we have this
  3859. * other way using the doorbell register.
  3860. */
  3861. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3862. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  3863. msleep(1000);
  3864. } else { /* Try to do it the PCI power state way */
  3865. /* Quoting from the Open CISS Specification: "The Power
  3866. * Management Control/Status Register (CSR) controls the power
  3867. * state of the device. The normal operating state is D0,
  3868. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3869. * the controller, place the interface device in D3 then to D0,
  3870. * this causes a secondary PCI reset which will reset the
  3871. * controller." */
  3872. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3873. if (pos == 0) {
  3874. dev_err(&pdev->dev,
  3875. "cciss_controller_hard_reset: "
  3876. "PCI PM not supported\n");
  3877. return -ENODEV;
  3878. }
  3879. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3880. /* enter the D3hot power management state */
  3881. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3882. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3883. pmcsr |= PCI_D3hot;
  3884. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3885. msleep(500);
  3886. /* enter the D0 power management state */
  3887. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3888. pmcsr |= PCI_D0;
  3889. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3890. msleep(500);
  3891. }
  3892. return 0;
  3893. }
  3894. /* This does a hard reset of the controller using PCI power management
  3895. * states or using the doorbell register. */
  3896. static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
  3897. {
  3898. u64 cfg_offset;
  3899. u32 cfg_base_addr;
  3900. u64 cfg_base_addr_index;
  3901. void __iomem *vaddr;
  3902. unsigned long paddr;
  3903. u32 misc_fw_support, active_transport;
  3904. int rc;
  3905. CfgTable_struct __iomem *cfgtable;
  3906. bool use_doorbell;
  3907. u32 board_id;
  3908. u16 command_register;
  3909. /* For controllers as old a the p600, this is very nearly
  3910. * the same thing as
  3911. *
  3912. * pci_save_state(pci_dev);
  3913. * pci_set_power_state(pci_dev, PCI_D3hot);
  3914. * pci_set_power_state(pci_dev, PCI_D0);
  3915. * pci_restore_state(pci_dev);
  3916. *
  3917. * For controllers newer than the P600, the pci power state
  3918. * method of resetting doesn't work so we have another way
  3919. * using the doorbell register.
  3920. */
  3921. /* Exclude 640x boards. These are two pci devices in one slot
  3922. * which share a battery backed cache module. One controls the
  3923. * cache, the other accesses the cache through the one that controls
  3924. * it. If we reset the one controlling the cache, the other will
  3925. * likely not be happy. Just forbid resetting this conjoined mess.
  3926. */
  3927. cciss_lookup_board_id(pdev, &board_id);
  3928. if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
  3929. dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
  3930. "due to shared cache module.");
  3931. return -ENODEV;
  3932. }
  3933. /* Save the PCI command register */
  3934. pci_read_config_word(pdev, 4, &command_register);
  3935. /* Turn the board off. This is so that later pci_restore_state()
  3936. * won't turn the board on before the rest of config space is ready.
  3937. */
  3938. pci_disable_device(pdev);
  3939. pci_save_state(pdev);
  3940. /* find the first memory BAR, so we can find the cfg table */
  3941. rc = cciss_pci_find_memory_BAR(pdev, &paddr);
  3942. if (rc)
  3943. return rc;
  3944. vaddr = remap_pci_mem(paddr, 0x250);
  3945. if (!vaddr)
  3946. return -ENOMEM;
  3947. /* find cfgtable in order to check if reset via doorbell is supported */
  3948. rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3949. &cfg_base_addr_index, &cfg_offset);
  3950. if (rc)
  3951. goto unmap_vaddr;
  3952. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3953. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3954. if (!cfgtable) {
  3955. rc = -ENOMEM;
  3956. goto unmap_vaddr;
  3957. }
  3958. /* If reset via doorbell register is supported, use that. */
  3959. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3960. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3961. /* The doorbell reset seems to cause lockups on some Smart
  3962. * Arrays (e.g. P410, P410i, maybe others). Until this is
  3963. * fixed or at least isolated, avoid the doorbell reset.
  3964. */
  3965. use_doorbell = 0;
  3966. rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
  3967. if (rc)
  3968. goto unmap_cfgtable;
  3969. pci_restore_state(pdev);
  3970. rc = pci_enable_device(pdev);
  3971. if (rc) {
  3972. dev_warn(&pdev->dev, "failed to enable device.\n");
  3973. goto unmap_cfgtable;
  3974. }
  3975. pci_write_config_word(pdev, 4, command_register);
  3976. /* Some devices (notably the HP Smart Array 5i Controller)
  3977. need a little pause here */
  3978. msleep(CCISS_POST_RESET_PAUSE_MSECS);
  3979. /* Wait for board to become not ready, then ready. */
  3980. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  3981. rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3982. if (rc) /* Don't bail, might be E500, etc. which can't be reset */
  3983. dev_warn(&pdev->dev,
  3984. "failed waiting for board to become not ready\n");
  3985. rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3986. if (rc) {
  3987. dev_warn(&pdev->dev,
  3988. "failed waiting for board to become ready\n");
  3989. goto unmap_cfgtable;
  3990. }
  3991. dev_info(&pdev->dev, "board ready.\n");
  3992. /* Controller should be in simple mode at this point. If it's not,
  3993. * It means we're on one of those controllers which doesn't support
  3994. * the doorbell reset method and on which the PCI power management reset
  3995. * method doesn't work (P800, for example.)
  3996. * In those cases, don't try to proceed, as it generally doesn't work.
  3997. */
  3998. active_transport = readl(&cfgtable->TransportActive);
  3999. if (active_transport & PERFORMANT_MODE) {
  4000. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  4001. " Ignoring controller.\n");
  4002. rc = -ENODEV;
  4003. }
  4004. unmap_cfgtable:
  4005. iounmap(cfgtable);
  4006. unmap_vaddr:
  4007. iounmap(vaddr);
  4008. return rc;
  4009. }
  4010. static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
  4011. {
  4012. int rc, i;
  4013. if (!reset_devices)
  4014. return 0;
  4015. /* Reset the controller with a PCI power-cycle or via doorbell */
  4016. rc = cciss_kdump_hard_reset_controller(pdev);
  4017. /* -ENOTSUPP here means we cannot reset the controller
  4018. * but it's already (and still) up and running in
  4019. * "performant mode". Or, it might be 640x, which can't reset
  4020. * due to concerns about shared bbwc between 6402/6404 pair.
  4021. */
  4022. if (rc == -ENOTSUPP)
  4023. return 0; /* just try to do the kdump anyhow. */
  4024. if (rc)
  4025. return -ENODEV;
  4026. /* Now try to get the controller to respond to a no-op */
  4027. for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
  4028. if (cciss_noop(pdev) == 0)
  4029. break;
  4030. else
  4031. dev_warn(&pdev->dev, "no-op failed%s\n",
  4032. (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
  4033. "; re-trying" : ""));
  4034. msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
  4035. }
  4036. return 0;
  4037. }
  4038. /*
  4039. * This is it. Find all the controllers and register them. I really hate
  4040. * stealing all these major device numbers.
  4041. * returns the number of block devices registered.
  4042. */
  4043. static int __devinit cciss_init_one(struct pci_dev *pdev,
  4044. const struct pci_device_id *ent)
  4045. {
  4046. int i;
  4047. int j = 0;
  4048. int k = 0;
  4049. int rc;
  4050. int dac, return_code;
  4051. InquiryData_struct *inq_buff;
  4052. ctlr_info_t *h;
  4053. rc = cciss_init_reset_devices(pdev);
  4054. if (rc)
  4055. return rc;
  4056. i = alloc_cciss_hba(pdev);
  4057. if (i < 0)
  4058. return -1;
  4059. h = hba[i];
  4060. h->pdev = pdev;
  4061. h->busy_initializing = 1;
  4062. INIT_HLIST_HEAD(&h->cmpQ);
  4063. INIT_HLIST_HEAD(&h->reqQ);
  4064. mutex_init(&h->busy_shutting_down);
  4065. if (cciss_pci_init(h) != 0)
  4066. goto clean_no_release_regions;
  4067. sprintf(h->devname, "cciss%d", i);
  4068. h->ctlr = i;
  4069. init_completion(&h->scan_wait);
  4070. if (cciss_create_hba_sysfs_entry(h))
  4071. goto clean0;
  4072. /* configure PCI DMA stuff */
  4073. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4074. dac = 1;
  4075. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  4076. dac = 0;
  4077. else {
  4078. dev_err(&h->pdev->dev, "no suitable DMA available\n");
  4079. goto clean1;
  4080. }
  4081. /*
  4082. * register with the major number, or get a dynamic major number
  4083. * by passing 0 as argument. This is done for greater than
  4084. * 8 controller support.
  4085. */
  4086. if (i < MAX_CTLR_ORIG)
  4087. h->major = COMPAQ_CISS_MAJOR + i;
  4088. rc = register_blkdev(h->major, h->devname);
  4089. if (rc == -EBUSY || rc == -EINVAL) {
  4090. dev_err(&h->pdev->dev,
  4091. "Unable to get major number %d for %s "
  4092. "on hba %d\n", h->major, h->devname, i);
  4093. goto clean1;
  4094. } else {
  4095. if (i >= MAX_CTLR_ORIG)
  4096. h->major = rc;
  4097. }
  4098. /* make sure the board interrupts are off */
  4099. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4100. if (h->msi_vector || h->msix_vector) {
  4101. if (request_irq(h->intr[PERF_MODE_INT],
  4102. do_cciss_msix_intr,
  4103. IRQF_DISABLED, h->devname, h)) {
  4104. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4105. h->intr[PERF_MODE_INT], h->devname);
  4106. goto clean2;
  4107. }
  4108. } else {
  4109. if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
  4110. IRQF_DISABLED, h->devname, h)) {
  4111. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4112. h->intr[PERF_MODE_INT], h->devname);
  4113. goto clean2;
  4114. }
  4115. }
  4116. dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  4117. h->devname, pdev->device, pci_name(pdev),
  4118. h->intr[PERF_MODE_INT], dac ? "" : " not");
  4119. h->cmd_pool_bits =
  4120. kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4121. * sizeof(unsigned long), GFP_KERNEL);
  4122. h->cmd_pool = (CommandList_struct *)
  4123. pci_alloc_consistent(h->pdev,
  4124. h->nr_cmds * sizeof(CommandList_struct),
  4125. &(h->cmd_pool_dhandle));
  4126. h->errinfo_pool = (ErrorInfo_struct *)
  4127. pci_alloc_consistent(h->pdev,
  4128. h->nr_cmds * sizeof(ErrorInfo_struct),
  4129. &(h->errinfo_pool_dhandle));
  4130. if ((h->cmd_pool_bits == NULL)
  4131. || (h->cmd_pool == NULL)
  4132. || (h->errinfo_pool == NULL)) {
  4133. dev_err(&h->pdev->dev, "out of memory");
  4134. goto clean4;
  4135. }
  4136. /* Need space for temp scatter list */
  4137. h->scatter_list = kmalloc(h->max_commands *
  4138. sizeof(struct scatterlist *),
  4139. GFP_KERNEL);
  4140. if (!h->scatter_list)
  4141. goto clean4;
  4142. for (k = 0; k < h->nr_cmds; k++) {
  4143. h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
  4144. h->maxsgentries,
  4145. GFP_KERNEL);
  4146. if (h->scatter_list[k] == NULL) {
  4147. dev_err(&h->pdev->dev,
  4148. "could not allocate s/g lists\n");
  4149. goto clean4;
  4150. }
  4151. }
  4152. h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
  4153. h->chainsize, h->nr_cmds);
  4154. if (!h->cmd_sg_list && h->chainsize > 0)
  4155. goto clean4;
  4156. spin_lock_init(&h->lock);
  4157. /* Initialize the pdev driver private data.
  4158. have it point to h. */
  4159. pci_set_drvdata(pdev, h);
  4160. /* command and error info recs zeroed out before
  4161. they are used */
  4162. memset(h->cmd_pool_bits, 0,
  4163. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4164. * sizeof(unsigned long));
  4165. h->num_luns = 0;
  4166. h->highest_lun = -1;
  4167. for (j = 0; j < CISS_MAX_LUN; j++) {
  4168. h->drv[j] = NULL;
  4169. h->gendisk[j] = NULL;
  4170. }
  4171. cciss_scsi_setup(h);
  4172. /* Turn the interrupts on so we can service requests */
  4173. h->access.set_intr_mask(h, CCISS_INTR_ON);
  4174. /* Get the firmware version */
  4175. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  4176. if (inq_buff == NULL) {
  4177. dev_err(&h->pdev->dev, "out of memory\n");
  4178. goto clean4;
  4179. }
  4180. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  4181. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  4182. if (return_code == IO_OK) {
  4183. h->firm_ver[0] = inq_buff->data_byte[32];
  4184. h->firm_ver[1] = inq_buff->data_byte[33];
  4185. h->firm_ver[2] = inq_buff->data_byte[34];
  4186. h->firm_ver[3] = inq_buff->data_byte[35];
  4187. } else { /* send command failed */
  4188. dev_warn(&h->pdev->dev, "unable to determine firmware"
  4189. " version of controller\n");
  4190. }
  4191. kfree(inq_buff);
  4192. cciss_procinit(h);
  4193. h->cciss_max_sectors = 8192;
  4194. rebuild_lun_table(h, 1, 0);
  4195. h->busy_initializing = 0;
  4196. return 1;
  4197. clean4:
  4198. kfree(h->cmd_pool_bits);
  4199. /* Free up sg elements */
  4200. for (k-- ; k >= 0; k--)
  4201. kfree(h->scatter_list[k]);
  4202. kfree(h->scatter_list);
  4203. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4204. if (h->cmd_pool)
  4205. pci_free_consistent(h->pdev,
  4206. h->nr_cmds * sizeof(CommandList_struct),
  4207. h->cmd_pool, h->cmd_pool_dhandle);
  4208. if (h->errinfo_pool)
  4209. pci_free_consistent(h->pdev,
  4210. h->nr_cmds * sizeof(ErrorInfo_struct),
  4211. h->errinfo_pool,
  4212. h->errinfo_pool_dhandle);
  4213. free_irq(h->intr[PERF_MODE_INT], h);
  4214. clean2:
  4215. unregister_blkdev(h->major, h->devname);
  4216. clean1:
  4217. cciss_destroy_hba_sysfs_entry(h);
  4218. clean0:
  4219. pci_release_regions(pdev);
  4220. clean_no_release_regions:
  4221. h->busy_initializing = 0;
  4222. /*
  4223. * Deliberately omit pci_disable_device(): it does something nasty to
  4224. * Smart Array controllers that pci_enable_device does not undo
  4225. */
  4226. pci_set_drvdata(pdev, NULL);
  4227. free_hba(h);
  4228. return -1;
  4229. }
  4230. static void cciss_shutdown(struct pci_dev *pdev)
  4231. {
  4232. ctlr_info_t *h;
  4233. char *flush_buf;
  4234. int return_code;
  4235. h = pci_get_drvdata(pdev);
  4236. flush_buf = kzalloc(4, GFP_KERNEL);
  4237. if (!flush_buf) {
  4238. dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
  4239. return;
  4240. }
  4241. /* write all data in the battery backed cache to disk */
  4242. memset(flush_buf, 0, 4);
  4243. return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
  4244. 4, 0, CTLR_LUNID, TYPE_CMD);
  4245. kfree(flush_buf);
  4246. if (return_code != IO_OK)
  4247. dev_warn(&h->pdev->dev, "Error flushing cache\n");
  4248. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4249. free_irq(h->intr[PERF_MODE_INT], h);
  4250. }
  4251. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  4252. {
  4253. ctlr_info_t *h;
  4254. int i, j;
  4255. if (pci_get_drvdata(pdev) == NULL) {
  4256. dev_err(&pdev->dev, "Unable to remove device\n");
  4257. return;
  4258. }
  4259. h = pci_get_drvdata(pdev);
  4260. i = h->ctlr;
  4261. if (hba[i] == NULL) {
  4262. dev_err(&pdev->dev, "device appears to already be removed\n");
  4263. return;
  4264. }
  4265. mutex_lock(&h->busy_shutting_down);
  4266. remove_from_scan_list(h);
  4267. remove_proc_entry(h->devname, proc_cciss);
  4268. unregister_blkdev(h->major, h->devname);
  4269. /* remove it from the disk list */
  4270. for (j = 0; j < CISS_MAX_LUN; j++) {
  4271. struct gendisk *disk = h->gendisk[j];
  4272. if (disk) {
  4273. struct request_queue *q = disk->queue;
  4274. if (disk->flags & GENHD_FL_UP) {
  4275. cciss_destroy_ld_sysfs_entry(h, j, 1);
  4276. del_gendisk(disk);
  4277. }
  4278. if (q)
  4279. blk_cleanup_queue(q);
  4280. }
  4281. }
  4282. #ifdef CONFIG_CISS_SCSI_TAPE
  4283. cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
  4284. #endif
  4285. cciss_shutdown(pdev);
  4286. #ifdef CONFIG_PCI_MSI
  4287. if (h->msix_vector)
  4288. pci_disable_msix(h->pdev);
  4289. else if (h->msi_vector)
  4290. pci_disable_msi(h->pdev);
  4291. #endif /* CONFIG_PCI_MSI */
  4292. iounmap(h->transtable);
  4293. iounmap(h->cfgtable);
  4294. iounmap(h->vaddr);
  4295. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
  4296. h->cmd_pool, h->cmd_pool_dhandle);
  4297. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
  4298. h->errinfo_pool, h->errinfo_pool_dhandle);
  4299. kfree(h->cmd_pool_bits);
  4300. /* Free up sg elements */
  4301. for (j = 0; j < h->nr_cmds; j++)
  4302. kfree(h->scatter_list[j]);
  4303. kfree(h->scatter_list);
  4304. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4305. /*
  4306. * Deliberately omit pci_disable_device(): it does something nasty to
  4307. * Smart Array controllers that pci_enable_device does not undo
  4308. */
  4309. pci_release_regions(pdev);
  4310. pci_set_drvdata(pdev, NULL);
  4311. cciss_destroy_hba_sysfs_entry(h);
  4312. mutex_unlock(&h->busy_shutting_down);
  4313. free_hba(h);
  4314. }
  4315. static struct pci_driver cciss_pci_driver = {
  4316. .name = "cciss",
  4317. .probe = cciss_init_one,
  4318. .remove = __devexit_p(cciss_remove_one),
  4319. .id_table = cciss_pci_device_id, /* id_table */
  4320. .shutdown = cciss_shutdown,
  4321. };
  4322. /*
  4323. * This is it. Register the PCI driver information for the cards we control
  4324. * the OS will call our registered routines when it finds one of our cards.
  4325. */
  4326. static int __init cciss_init(void)
  4327. {
  4328. int err;
  4329. /*
  4330. * The hardware requires that commands are aligned on a 64-bit
  4331. * boundary. Given that we use pci_alloc_consistent() to allocate an
  4332. * array of them, the size must be a multiple of 8 bytes.
  4333. */
  4334. BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
  4335. printk(KERN_INFO DRIVER_NAME "\n");
  4336. err = bus_register(&cciss_bus_type);
  4337. if (err)
  4338. return err;
  4339. /* Start the scan thread */
  4340. cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
  4341. if (IS_ERR(cciss_scan_thread)) {
  4342. err = PTR_ERR(cciss_scan_thread);
  4343. goto err_bus_unregister;
  4344. }
  4345. /* Register for our PCI devices */
  4346. err = pci_register_driver(&cciss_pci_driver);
  4347. if (err)
  4348. goto err_thread_stop;
  4349. return err;
  4350. err_thread_stop:
  4351. kthread_stop(cciss_scan_thread);
  4352. err_bus_unregister:
  4353. bus_unregister(&cciss_bus_type);
  4354. return err;
  4355. }
  4356. static void __exit cciss_cleanup(void)
  4357. {
  4358. int i;
  4359. pci_unregister_driver(&cciss_pci_driver);
  4360. /* double check that all controller entrys have been removed */
  4361. for (i = 0; i < MAX_CTLR; i++) {
  4362. if (hba[i] != NULL) {
  4363. dev_warn(&hba[i]->pdev->dev,
  4364. "had to remove controller\n");
  4365. cciss_remove_one(hba[i]->pdev);
  4366. }
  4367. }
  4368. kthread_stop(cciss_scan_thread);
  4369. if (proc_cciss)
  4370. remove_proc_entry("driver/cciss", NULL);
  4371. bus_unregister(&cciss_bus_type);
  4372. }
  4373. module_init(cciss_init);
  4374. module_exit(cciss_cleanup);