pci_64.h 1.4 KB

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  1. #ifndef _ASM_X86_PCI_64_H
  2. #define _ASM_X86_PCI_64_H
  3. #ifdef __KERNEL__
  4. #ifdef CONFIG_CALGARY_IOMMU
  5. static inline void *pci_iommu(struct pci_bus *bus)
  6. {
  7. struct pci_sysdata *sd = bus->sysdata;
  8. return sd->iommu;
  9. }
  10. static inline void set_pci_iommu(struct pci_bus *bus, void *val)
  11. {
  12. struct pci_sysdata *sd = bus->sysdata;
  13. sd->iommu = val;
  14. }
  15. #endif /* CONFIG_CALGARY_IOMMU */
  16. extern int (*pci_config_read)(int seg, int bus, int dev, int fn,
  17. int reg, int len, u32 *value);
  18. extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
  19. int reg, int len, u32 value);
  20. extern void dma32_reserve_bootmem(void);
  21. extern void pci_iommu_alloc(void);
  22. /* The PCI address space does equal the physical memory
  23. * address space. The networking and block device layers use
  24. * this boolean for bounce buffer decisions
  25. *
  26. * On AMD64 it mostly equals, but we set it to zero if a hardware
  27. * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
  28. */
  29. #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
  30. #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
  31. dma_addr_t ADDR_NAME;
  32. #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
  33. __u32 LEN_NAME;
  34. #define pci_unmap_addr(PTR, ADDR_NAME) \
  35. ((PTR)->ADDR_NAME)
  36. #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
  37. (((PTR)->ADDR_NAME) = (VAL))
  38. #define pci_unmap_len(PTR, LEN_NAME) \
  39. ((PTR)->LEN_NAME)
  40. #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
  41. (((PTR)->LEN_NAME) = (VAL))
  42. #endif /* __KERNEL__ */
  43. #endif /* _ASM_X86_PCI_64_H */