libata-core.c 126 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. */
  34. #include <linux/config.h>
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/pci.h>
  38. #include <linux/init.h>
  39. #include <linux/list.h>
  40. #include <linux/mm.h>
  41. #include <linux/highmem.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/delay.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/completion.h>
  48. #include <linux/suspend.h>
  49. #include <linux/workqueue.h>
  50. #include <linux/jiffies.h>
  51. #include <linux/scatterlist.h>
  52. #include <scsi/scsi.h>
  53. #include "scsi_priv.h"
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsi_host.h>
  56. #include <linux/libata.h>
  57. #include <asm/io.h>
  58. #include <asm/semaphore.h>
  59. #include <asm/byteorder.h>
  60. #include "libata.h"
  61. static unsigned int ata_dev_init_params(struct ata_port *ap,
  62. struct ata_device *dev);
  63. static void ata_set_mode(struct ata_port *ap);
  64. static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
  65. struct ata_device *dev);
  66. static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
  67. static void ata_pio_error(struct ata_port *ap);
  68. static unsigned int ata_unique_id = 1;
  69. static struct workqueue_struct *ata_wq;
  70. int atapi_enabled = 1;
  71. module_param(atapi_enabled, int, 0444);
  72. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  73. int libata_fua = 0;
  74. module_param_named(fua, libata_fua, int, 0444);
  75. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  76. MODULE_AUTHOR("Jeff Garzik");
  77. MODULE_DESCRIPTION("Library module for ATA devices");
  78. MODULE_LICENSE("GPL");
  79. MODULE_VERSION(DRV_VERSION);
  80. /**
  81. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  82. * @tf: Taskfile to convert
  83. * @fis: Buffer into which data will output
  84. * @pmp: Port multiplier port
  85. *
  86. * Converts a standard ATA taskfile to a Serial ATA
  87. * FIS structure (Register - Host to Device).
  88. *
  89. * LOCKING:
  90. * Inherited from caller.
  91. */
  92. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
  93. {
  94. fis[0] = 0x27; /* Register - Host to Device FIS */
  95. fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
  96. bit 7 indicates Command FIS */
  97. fis[2] = tf->command;
  98. fis[3] = tf->feature;
  99. fis[4] = tf->lbal;
  100. fis[5] = tf->lbam;
  101. fis[6] = tf->lbah;
  102. fis[7] = tf->device;
  103. fis[8] = tf->hob_lbal;
  104. fis[9] = tf->hob_lbam;
  105. fis[10] = tf->hob_lbah;
  106. fis[11] = tf->hob_feature;
  107. fis[12] = tf->nsect;
  108. fis[13] = tf->hob_nsect;
  109. fis[14] = 0;
  110. fis[15] = tf->ctl;
  111. fis[16] = 0;
  112. fis[17] = 0;
  113. fis[18] = 0;
  114. fis[19] = 0;
  115. }
  116. /**
  117. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  118. * @fis: Buffer from which data will be input
  119. * @tf: Taskfile to output
  120. *
  121. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  122. *
  123. * LOCKING:
  124. * Inherited from caller.
  125. */
  126. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  127. {
  128. tf->command = fis[2]; /* status */
  129. tf->feature = fis[3]; /* error */
  130. tf->lbal = fis[4];
  131. tf->lbam = fis[5];
  132. tf->lbah = fis[6];
  133. tf->device = fis[7];
  134. tf->hob_lbal = fis[8];
  135. tf->hob_lbam = fis[9];
  136. tf->hob_lbah = fis[10];
  137. tf->nsect = fis[12];
  138. tf->hob_nsect = fis[13];
  139. }
  140. static const u8 ata_rw_cmds[] = {
  141. /* pio multi */
  142. ATA_CMD_READ_MULTI,
  143. ATA_CMD_WRITE_MULTI,
  144. ATA_CMD_READ_MULTI_EXT,
  145. ATA_CMD_WRITE_MULTI_EXT,
  146. 0,
  147. 0,
  148. 0,
  149. ATA_CMD_WRITE_MULTI_FUA_EXT,
  150. /* pio */
  151. ATA_CMD_PIO_READ,
  152. ATA_CMD_PIO_WRITE,
  153. ATA_CMD_PIO_READ_EXT,
  154. ATA_CMD_PIO_WRITE_EXT,
  155. 0,
  156. 0,
  157. 0,
  158. 0,
  159. /* dma */
  160. ATA_CMD_READ,
  161. ATA_CMD_WRITE,
  162. ATA_CMD_READ_EXT,
  163. ATA_CMD_WRITE_EXT,
  164. 0,
  165. 0,
  166. 0,
  167. ATA_CMD_WRITE_FUA_EXT
  168. };
  169. /**
  170. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  171. * @qc: command to examine and configure
  172. *
  173. * Examine the device configuration and tf->flags to calculate
  174. * the proper read/write commands and protocol to use.
  175. *
  176. * LOCKING:
  177. * caller.
  178. */
  179. int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
  180. {
  181. struct ata_taskfile *tf = &qc->tf;
  182. struct ata_device *dev = qc->dev;
  183. u8 cmd;
  184. int index, fua, lba48, write;
  185. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  186. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  187. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  188. if (dev->flags & ATA_DFLAG_PIO) {
  189. tf->protocol = ATA_PROT_PIO;
  190. index = dev->multi_count ? 0 : 8;
  191. } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
  192. /* Unable to use DMA due to host limitation */
  193. tf->protocol = ATA_PROT_PIO;
  194. index = dev->multi_count ? 0 : 8;
  195. } else {
  196. tf->protocol = ATA_PROT_DMA;
  197. index = 16;
  198. }
  199. cmd = ata_rw_cmds[index + fua + lba48 + write];
  200. if (cmd) {
  201. tf->command = cmd;
  202. return 0;
  203. }
  204. return -1;
  205. }
  206. /**
  207. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  208. * @pio_mask: pio_mask
  209. * @mwdma_mask: mwdma_mask
  210. * @udma_mask: udma_mask
  211. *
  212. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  213. * unsigned int xfer_mask.
  214. *
  215. * LOCKING:
  216. * None.
  217. *
  218. * RETURNS:
  219. * Packed xfer_mask.
  220. */
  221. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  222. unsigned int mwdma_mask,
  223. unsigned int udma_mask)
  224. {
  225. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  226. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  227. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  228. }
  229. /**
  230. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  231. * @xfer_mask: xfer_mask to unpack
  232. * @pio_mask: resulting pio_mask
  233. * @mwdma_mask: resulting mwdma_mask
  234. * @udma_mask: resulting udma_mask
  235. *
  236. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  237. * Any NULL distination masks will be ignored.
  238. */
  239. static void ata_unpack_xfermask(unsigned int xfer_mask,
  240. unsigned int *pio_mask,
  241. unsigned int *mwdma_mask,
  242. unsigned int *udma_mask)
  243. {
  244. if (pio_mask)
  245. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  246. if (mwdma_mask)
  247. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  248. if (udma_mask)
  249. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  250. }
  251. static const struct ata_xfer_ent {
  252. unsigned int shift, bits;
  253. u8 base;
  254. } ata_xfer_tbl[] = {
  255. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  256. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  257. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  258. { -1, },
  259. };
  260. /**
  261. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  262. * @xfer_mask: xfer_mask of interest
  263. *
  264. * Return matching XFER_* value for @xfer_mask. Only the highest
  265. * bit of @xfer_mask is considered.
  266. *
  267. * LOCKING:
  268. * None.
  269. *
  270. * RETURNS:
  271. * Matching XFER_* value, 0 if no match found.
  272. */
  273. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  274. {
  275. int highbit = fls(xfer_mask) - 1;
  276. const struct ata_xfer_ent *ent;
  277. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  278. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  279. return ent->base + highbit - ent->shift;
  280. return 0;
  281. }
  282. /**
  283. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  284. * @xfer_mode: XFER_* of interest
  285. *
  286. * Return matching xfer_mask for @xfer_mode.
  287. *
  288. * LOCKING:
  289. * None.
  290. *
  291. * RETURNS:
  292. * Matching xfer_mask, 0 if no match found.
  293. */
  294. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  295. {
  296. const struct ata_xfer_ent *ent;
  297. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  298. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  299. return 1 << (ent->shift + xfer_mode - ent->base);
  300. return 0;
  301. }
  302. /**
  303. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  304. * @xfer_mode: XFER_* of interest
  305. *
  306. * Return matching xfer_shift for @xfer_mode.
  307. *
  308. * LOCKING:
  309. * None.
  310. *
  311. * RETURNS:
  312. * Matching xfer_shift, -1 if no match found.
  313. */
  314. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  315. {
  316. const struct ata_xfer_ent *ent;
  317. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  318. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  319. return ent->shift;
  320. return -1;
  321. }
  322. /**
  323. * ata_mode_string - convert xfer_mask to string
  324. * @xfer_mask: mask of bits supported; only highest bit counts.
  325. *
  326. * Determine string which represents the highest speed
  327. * (highest bit in @modemask).
  328. *
  329. * LOCKING:
  330. * None.
  331. *
  332. * RETURNS:
  333. * Constant C string representing highest speed listed in
  334. * @mode_mask, or the constant C string "<n/a>".
  335. */
  336. static const char *ata_mode_string(unsigned int xfer_mask)
  337. {
  338. static const char * const xfer_mode_str[] = {
  339. "PIO0",
  340. "PIO1",
  341. "PIO2",
  342. "PIO3",
  343. "PIO4",
  344. "MWDMA0",
  345. "MWDMA1",
  346. "MWDMA2",
  347. "UDMA/16",
  348. "UDMA/25",
  349. "UDMA/33",
  350. "UDMA/44",
  351. "UDMA/66",
  352. "UDMA/100",
  353. "UDMA/133",
  354. "UDMA7",
  355. };
  356. int highbit;
  357. highbit = fls(xfer_mask) - 1;
  358. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  359. return xfer_mode_str[highbit];
  360. return "<n/a>";
  361. }
  362. static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
  363. {
  364. if (ata_dev_present(dev)) {
  365. printk(KERN_WARNING "ata%u: dev %u disabled\n",
  366. ap->id, dev->devno);
  367. dev->class++;
  368. }
  369. }
  370. /**
  371. * ata_pio_devchk - PATA device presence detection
  372. * @ap: ATA channel to examine
  373. * @device: Device to examine (starting at zero)
  374. *
  375. * This technique was originally described in
  376. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  377. * later found its way into the ATA/ATAPI spec.
  378. *
  379. * Write a pattern to the ATA shadow registers,
  380. * and if a device is present, it will respond by
  381. * correctly storing and echoing back the
  382. * ATA shadow register contents.
  383. *
  384. * LOCKING:
  385. * caller.
  386. */
  387. static unsigned int ata_pio_devchk(struct ata_port *ap,
  388. unsigned int device)
  389. {
  390. struct ata_ioports *ioaddr = &ap->ioaddr;
  391. u8 nsect, lbal;
  392. ap->ops->dev_select(ap, device);
  393. outb(0x55, ioaddr->nsect_addr);
  394. outb(0xaa, ioaddr->lbal_addr);
  395. outb(0xaa, ioaddr->nsect_addr);
  396. outb(0x55, ioaddr->lbal_addr);
  397. outb(0x55, ioaddr->nsect_addr);
  398. outb(0xaa, ioaddr->lbal_addr);
  399. nsect = inb(ioaddr->nsect_addr);
  400. lbal = inb(ioaddr->lbal_addr);
  401. if ((nsect == 0x55) && (lbal == 0xaa))
  402. return 1; /* we found a device */
  403. return 0; /* nothing found */
  404. }
  405. /**
  406. * ata_mmio_devchk - PATA device presence detection
  407. * @ap: ATA channel to examine
  408. * @device: Device to examine (starting at zero)
  409. *
  410. * This technique was originally described in
  411. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  412. * later found its way into the ATA/ATAPI spec.
  413. *
  414. * Write a pattern to the ATA shadow registers,
  415. * and if a device is present, it will respond by
  416. * correctly storing and echoing back the
  417. * ATA shadow register contents.
  418. *
  419. * LOCKING:
  420. * caller.
  421. */
  422. static unsigned int ata_mmio_devchk(struct ata_port *ap,
  423. unsigned int device)
  424. {
  425. struct ata_ioports *ioaddr = &ap->ioaddr;
  426. u8 nsect, lbal;
  427. ap->ops->dev_select(ap, device);
  428. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  429. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  430. writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
  431. writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
  432. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  433. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  434. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  435. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  436. if ((nsect == 0x55) && (lbal == 0xaa))
  437. return 1; /* we found a device */
  438. return 0; /* nothing found */
  439. }
  440. /**
  441. * ata_devchk - PATA device presence detection
  442. * @ap: ATA channel to examine
  443. * @device: Device to examine (starting at zero)
  444. *
  445. * Dispatch ATA device presence detection, depending
  446. * on whether we are using PIO or MMIO to talk to the
  447. * ATA shadow registers.
  448. *
  449. * LOCKING:
  450. * caller.
  451. */
  452. static unsigned int ata_devchk(struct ata_port *ap,
  453. unsigned int device)
  454. {
  455. if (ap->flags & ATA_FLAG_MMIO)
  456. return ata_mmio_devchk(ap, device);
  457. return ata_pio_devchk(ap, device);
  458. }
  459. /**
  460. * ata_dev_classify - determine device type based on ATA-spec signature
  461. * @tf: ATA taskfile register set for device to be identified
  462. *
  463. * Determine from taskfile register contents whether a device is
  464. * ATA or ATAPI, as per "Signature and persistence" section
  465. * of ATA/PI spec (volume 1, sect 5.14).
  466. *
  467. * LOCKING:
  468. * None.
  469. *
  470. * RETURNS:
  471. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
  472. * the event of failure.
  473. */
  474. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  475. {
  476. /* Apple's open source Darwin code hints that some devices only
  477. * put a proper signature into the LBA mid/high registers,
  478. * So, we only check those. It's sufficient for uniqueness.
  479. */
  480. if (((tf->lbam == 0) && (tf->lbah == 0)) ||
  481. ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
  482. DPRINTK("found ATA device by sig\n");
  483. return ATA_DEV_ATA;
  484. }
  485. if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
  486. ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
  487. DPRINTK("found ATAPI device by sig\n");
  488. return ATA_DEV_ATAPI;
  489. }
  490. DPRINTK("unknown device\n");
  491. return ATA_DEV_UNKNOWN;
  492. }
  493. /**
  494. * ata_dev_try_classify - Parse returned ATA device signature
  495. * @ap: ATA channel to examine
  496. * @device: Device to examine (starting at zero)
  497. * @r_err: Value of error register on completion
  498. *
  499. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  500. * an ATA/ATAPI-defined set of values is placed in the ATA
  501. * shadow registers, indicating the results of device detection
  502. * and diagnostics.
  503. *
  504. * Select the ATA device, and read the values from the ATA shadow
  505. * registers. Then parse according to the Error register value,
  506. * and the spec-defined values examined by ata_dev_classify().
  507. *
  508. * LOCKING:
  509. * caller.
  510. *
  511. * RETURNS:
  512. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  513. */
  514. static unsigned int
  515. ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
  516. {
  517. struct ata_taskfile tf;
  518. unsigned int class;
  519. u8 err;
  520. ap->ops->dev_select(ap, device);
  521. memset(&tf, 0, sizeof(tf));
  522. ap->ops->tf_read(ap, &tf);
  523. err = tf.feature;
  524. if (r_err)
  525. *r_err = err;
  526. /* see if device passed diags */
  527. if (err == 1)
  528. /* do nothing */ ;
  529. else if ((device == 0) && (err == 0x81))
  530. /* do nothing */ ;
  531. else
  532. return ATA_DEV_NONE;
  533. /* determine if device is ATA or ATAPI */
  534. class = ata_dev_classify(&tf);
  535. if (class == ATA_DEV_UNKNOWN)
  536. return ATA_DEV_NONE;
  537. if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  538. return ATA_DEV_NONE;
  539. return class;
  540. }
  541. /**
  542. * ata_id_string - Convert IDENTIFY DEVICE page into string
  543. * @id: IDENTIFY DEVICE results we will examine
  544. * @s: string into which data is output
  545. * @ofs: offset into identify device page
  546. * @len: length of string to return. must be an even number.
  547. *
  548. * The strings in the IDENTIFY DEVICE page are broken up into
  549. * 16-bit chunks. Run through the string, and output each
  550. * 8-bit chunk linearly, regardless of platform.
  551. *
  552. * LOCKING:
  553. * caller.
  554. */
  555. void ata_id_string(const u16 *id, unsigned char *s,
  556. unsigned int ofs, unsigned int len)
  557. {
  558. unsigned int c;
  559. while (len > 0) {
  560. c = id[ofs] >> 8;
  561. *s = c;
  562. s++;
  563. c = id[ofs] & 0xff;
  564. *s = c;
  565. s++;
  566. ofs++;
  567. len -= 2;
  568. }
  569. }
  570. /**
  571. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  572. * @id: IDENTIFY DEVICE results we will examine
  573. * @s: string into which data is output
  574. * @ofs: offset into identify device page
  575. * @len: length of string to return. must be an odd number.
  576. *
  577. * This function is identical to ata_id_string except that it
  578. * trims trailing spaces and terminates the resulting string with
  579. * null. @len must be actual maximum length (even number) + 1.
  580. *
  581. * LOCKING:
  582. * caller.
  583. */
  584. void ata_id_c_string(const u16 *id, unsigned char *s,
  585. unsigned int ofs, unsigned int len)
  586. {
  587. unsigned char *p;
  588. WARN_ON(!(len & 1));
  589. ata_id_string(id, s, ofs, len - 1);
  590. p = s + strnlen(s, len - 1);
  591. while (p > s && p[-1] == ' ')
  592. p--;
  593. *p = '\0';
  594. }
  595. static u64 ata_id_n_sectors(const u16 *id)
  596. {
  597. if (ata_id_has_lba(id)) {
  598. if (ata_id_has_lba48(id))
  599. return ata_id_u64(id, 100);
  600. else
  601. return ata_id_u32(id, 60);
  602. } else {
  603. if (ata_id_current_chs_valid(id))
  604. return ata_id_u32(id, 57);
  605. else
  606. return id[1] * id[3] * id[6];
  607. }
  608. }
  609. /**
  610. * ata_noop_dev_select - Select device 0/1 on ATA bus
  611. * @ap: ATA channel to manipulate
  612. * @device: ATA device (numbered from zero) to select
  613. *
  614. * This function performs no actual function.
  615. *
  616. * May be used as the dev_select() entry in ata_port_operations.
  617. *
  618. * LOCKING:
  619. * caller.
  620. */
  621. void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
  622. {
  623. }
  624. /**
  625. * ata_std_dev_select - Select device 0/1 on ATA bus
  626. * @ap: ATA channel to manipulate
  627. * @device: ATA device (numbered from zero) to select
  628. *
  629. * Use the method defined in the ATA specification to
  630. * make either device 0, or device 1, active on the
  631. * ATA channel. Works with both PIO and MMIO.
  632. *
  633. * May be used as the dev_select() entry in ata_port_operations.
  634. *
  635. * LOCKING:
  636. * caller.
  637. */
  638. void ata_std_dev_select (struct ata_port *ap, unsigned int device)
  639. {
  640. u8 tmp;
  641. if (device == 0)
  642. tmp = ATA_DEVICE_OBS;
  643. else
  644. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  645. if (ap->flags & ATA_FLAG_MMIO) {
  646. writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
  647. } else {
  648. outb(tmp, ap->ioaddr.device_addr);
  649. }
  650. ata_pause(ap); /* needed; also flushes, for mmio */
  651. }
  652. /**
  653. * ata_dev_select - Select device 0/1 on ATA bus
  654. * @ap: ATA channel to manipulate
  655. * @device: ATA device (numbered from zero) to select
  656. * @wait: non-zero to wait for Status register BSY bit to clear
  657. * @can_sleep: non-zero if context allows sleeping
  658. *
  659. * Use the method defined in the ATA specification to
  660. * make either device 0, or device 1, active on the
  661. * ATA channel.
  662. *
  663. * This is a high-level version of ata_std_dev_select(),
  664. * which additionally provides the services of inserting
  665. * the proper pauses and status polling, where needed.
  666. *
  667. * LOCKING:
  668. * caller.
  669. */
  670. void ata_dev_select(struct ata_port *ap, unsigned int device,
  671. unsigned int wait, unsigned int can_sleep)
  672. {
  673. VPRINTK("ENTER, ata%u: device %u, wait %u\n",
  674. ap->id, device, wait);
  675. if (wait)
  676. ata_wait_idle(ap);
  677. ap->ops->dev_select(ap, device);
  678. if (wait) {
  679. if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
  680. msleep(150);
  681. ata_wait_idle(ap);
  682. }
  683. }
  684. /**
  685. * ata_dump_id - IDENTIFY DEVICE info debugging output
  686. * @id: IDENTIFY DEVICE page to dump
  687. *
  688. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  689. * page.
  690. *
  691. * LOCKING:
  692. * caller.
  693. */
  694. static inline void ata_dump_id(const u16 *id)
  695. {
  696. DPRINTK("49==0x%04x "
  697. "53==0x%04x "
  698. "63==0x%04x "
  699. "64==0x%04x "
  700. "75==0x%04x \n",
  701. id[49],
  702. id[53],
  703. id[63],
  704. id[64],
  705. id[75]);
  706. DPRINTK("80==0x%04x "
  707. "81==0x%04x "
  708. "82==0x%04x "
  709. "83==0x%04x "
  710. "84==0x%04x \n",
  711. id[80],
  712. id[81],
  713. id[82],
  714. id[83],
  715. id[84]);
  716. DPRINTK("88==0x%04x "
  717. "93==0x%04x\n",
  718. id[88],
  719. id[93]);
  720. }
  721. /**
  722. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  723. * @id: IDENTIFY data to compute xfer mask from
  724. *
  725. * Compute the xfermask for this device. This is not as trivial
  726. * as it seems if we must consider early devices correctly.
  727. *
  728. * FIXME: pre IDE drive timing (do we care ?).
  729. *
  730. * LOCKING:
  731. * None.
  732. *
  733. * RETURNS:
  734. * Computed xfermask
  735. */
  736. static unsigned int ata_id_xfermask(const u16 *id)
  737. {
  738. unsigned int pio_mask, mwdma_mask, udma_mask;
  739. /* Usual case. Word 53 indicates word 64 is valid */
  740. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  741. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  742. pio_mask <<= 3;
  743. pio_mask |= 0x7;
  744. } else {
  745. /* If word 64 isn't valid then Word 51 high byte holds
  746. * the PIO timing number for the maximum. Turn it into
  747. * a mask.
  748. */
  749. pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
  750. /* But wait.. there's more. Design your standards by
  751. * committee and you too can get a free iordy field to
  752. * process. However its the speeds not the modes that
  753. * are supported... Note drivers using the timing API
  754. * will get this right anyway
  755. */
  756. }
  757. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  758. udma_mask = 0;
  759. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  760. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  761. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  762. }
  763. /**
  764. * ata_port_queue_task - Queue port_task
  765. * @ap: The ata_port to queue port_task for
  766. *
  767. * Schedule @fn(@data) for execution after @delay jiffies using
  768. * port_task. There is one port_task per port and it's the
  769. * user(low level driver)'s responsibility to make sure that only
  770. * one task is active at any given time.
  771. *
  772. * libata core layer takes care of synchronization between
  773. * port_task and EH. ata_port_queue_task() may be ignored for EH
  774. * synchronization.
  775. *
  776. * LOCKING:
  777. * Inherited from caller.
  778. */
  779. void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
  780. unsigned long delay)
  781. {
  782. int rc;
  783. if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
  784. return;
  785. PREPARE_WORK(&ap->port_task, fn, data);
  786. if (!delay)
  787. rc = queue_work(ata_wq, &ap->port_task);
  788. else
  789. rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
  790. /* rc == 0 means that another user is using port task */
  791. WARN_ON(rc == 0);
  792. }
  793. /**
  794. * ata_port_flush_task - Flush port_task
  795. * @ap: The ata_port to flush port_task for
  796. *
  797. * After this function completes, port_task is guranteed not to
  798. * be running or scheduled.
  799. *
  800. * LOCKING:
  801. * Kernel thread context (may sleep)
  802. */
  803. void ata_port_flush_task(struct ata_port *ap)
  804. {
  805. unsigned long flags;
  806. DPRINTK("ENTER\n");
  807. spin_lock_irqsave(&ap->host_set->lock, flags);
  808. ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
  809. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  810. DPRINTK("flush #1\n");
  811. flush_workqueue(ata_wq);
  812. /*
  813. * At this point, if a task is running, it's guaranteed to see
  814. * the FLUSH flag; thus, it will never queue pio tasks again.
  815. * Cancel and flush.
  816. */
  817. if (!cancel_delayed_work(&ap->port_task)) {
  818. DPRINTK("flush #2\n");
  819. flush_workqueue(ata_wq);
  820. }
  821. spin_lock_irqsave(&ap->host_set->lock, flags);
  822. ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
  823. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  824. DPRINTK("EXIT\n");
  825. }
  826. void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  827. {
  828. struct completion *waiting = qc->private_data;
  829. qc->ap->ops->tf_read(qc->ap, &qc->tf);
  830. complete(waiting);
  831. }
  832. /**
  833. * ata_exec_internal - execute libata internal command
  834. * @ap: Port to which the command is sent
  835. * @dev: Device to which the command is sent
  836. * @tf: Taskfile registers for the command and the result
  837. * @dma_dir: Data tranfer direction of the command
  838. * @buf: Data buffer of the command
  839. * @buflen: Length of data buffer
  840. *
  841. * Executes libata internal command with timeout. @tf contains
  842. * command on entry and result on return. Timeout and error
  843. * conditions are reported via return value. No recovery action
  844. * is taken after a command times out. It's caller's duty to
  845. * clean up after timeout.
  846. *
  847. * LOCKING:
  848. * None. Should be called with kernel context, might sleep.
  849. */
  850. static unsigned
  851. ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
  852. struct ata_taskfile *tf,
  853. int dma_dir, void *buf, unsigned int buflen)
  854. {
  855. u8 command = tf->command;
  856. struct ata_queued_cmd *qc;
  857. DECLARE_COMPLETION(wait);
  858. unsigned long flags;
  859. unsigned int err_mask;
  860. spin_lock_irqsave(&ap->host_set->lock, flags);
  861. qc = ata_qc_new_init(ap, dev);
  862. BUG_ON(qc == NULL);
  863. qc->tf = *tf;
  864. qc->dma_dir = dma_dir;
  865. if (dma_dir != DMA_NONE) {
  866. ata_sg_init_one(qc, buf, buflen);
  867. qc->nsect = buflen / ATA_SECT_SIZE;
  868. }
  869. qc->private_data = &wait;
  870. qc->complete_fn = ata_qc_complete_internal;
  871. qc->err_mask = ata_qc_issue(qc);
  872. if (qc->err_mask)
  873. ata_qc_complete(qc);
  874. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  875. if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
  876. ata_port_flush_task(ap);
  877. spin_lock_irqsave(&ap->host_set->lock, flags);
  878. /* We're racing with irq here. If we lose, the
  879. * following test prevents us from completing the qc
  880. * again. If completion irq occurs after here but
  881. * before the caller cleans up, it will result in a
  882. * spurious interrupt. We can live with that.
  883. */
  884. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  885. qc->err_mask = AC_ERR_TIMEOUT;
  886. ata_qc_complete(qc);
  887. printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
  888. ap->id, command);
  889. }
  890. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  891. }
  892. *tf = qc->tf;
  893. err_mask = qc->err_mask;
  894. ata_qc_free(qc);
  895. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  896. * Until those drivers are fixed, we detect the condition
  897. * here, fail the command with AC_ERR_SYSTEM and reenable the
  898. * port.
  899. *
  900. * Note that this doesn't change any behavior as internal
  901. * command failure results in disabling the device in the
  902. * higher layer for LLDDs without new reset/EH callbacks.
  903. *
  904. * Kill the following code as soon as those drivers are fixed.
  905. */
  906. if (ap->flags & ATA_FLAG_PORT_DISABLED) {
  907. err_mask |= AC_ERR_SYSTEM;
  908. ata_port_probe(ap);
  909. }
  910. return err_mask;
  911. }
  912. /**
  913. * ata_pio_need_iordy - check if iordy needed
  914. * @adev: ATA device
  915. *
  916. * Check if the current speed of the device requires IORDY. Used
  917. * by various controllers for chip configuration.
  918. */
  919. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  920. {
  921. int pio;
  922. int speed = adev->pio_mode - XFER_PIO_0;
  923. if (speed < 2)
  924. return 0;
  925. if (speed > 2)
  926. return 1;
  927. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  928. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  929. pio = adev->id[ATA_ID_EIDE_PIO];
  930. /* Is the speed faster than the drive allows non IORDY ? */
  931. if (pio) {
  932. /* This is cycle times not frequency - watch the logic! */
  933. if (pio > 240) /* PIO2 is 240nS per cycle */
  934. return 1;
  935. return 0;
  936. }
  937. }
  938. return 0;
  939. }
  940. /**
  941. * ata_dev_read_id - Read ID data from the specified device
  942. * @ap: port on which target device resides
  943. * @dev: target device
  944. * @p_class: pointer to class of the target device (may be changed)
  945. * @post_reset: is this read ID post-reset?
  946. * @p_id: read IDENTIFY page (newly allocated)
  947. *
  948. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  949. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  950. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  951. * for pre-ATA4 drives.
  952. *
  953. * LOCKING:
  954. * Kernel thread context (may sleep)
  955. *
  956. * RETURNS:
  957. * 0 on success, -errno otherwise.
  958. */
  959. static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
  960. unsigned int *p_class, int post_reset, u16 **p_id)
  961. {
  962. unsigned int class = *p_class;
  963. struct ata_taskfile tf;
  964. unsigned int err_mask = 0;
  965. u16 *id;
  966. const char *reason;
  967. int rc;
  968. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  969. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  970. id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
  971. if (id == NULL) {
  972. rc = -ENOMEM;
  973. reason = "out of memory";
  974. goto err_out;
  975. }
  976. retry:
  977. ata_tf_init(ap, &tf, dev->devno);
  978. switch (class) {
  979. case ATA_DEV_ATA:
  980. tf.command = ATA_CMD_ID_ATA;
  981. break;
  982. case ATA_DEV_ATAPI:
  983. tf.command = ATA_CMD_ID_ATAPI;
  984. break;
  985. default:
  986. rc = -ENODEV;
  987. reason = "unsupported class";
  988. goto err_out;
  989. }
  990. tf.protocol = ATA_PROT_PIO;
  991. err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
  992. id, sizeof(id[0]) * ATA_ID_WORDS);
  993. if (err_mask) {
  994. rc = -EIO;
  995. reason = "I/O error";
  996. goto err_out;
  997. }
  998. swap_buf_le16(id, ATA_ID_WORDS);
  999. /* sanity check */
  1000. if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
  1001. rc = -EINVAL;
  1002. reason = "device reports illegal type";
  1003. goto err_out;
  1004. }
  1005. if (post_reset && class == ATA_DEV_ATA) {
  1006. /*
  1007. * The exact sequence expected by certain pre-ATA4 drives is:
  1008. * SRST RESET
  1009. * IDENTIFY
  1010. * INITIALIZE DEVICE PARAMETERS
  1011. * anything else..
  1012. * Some drives were very specific about that exact sequence.
  1013. */
  1014. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1015. err_mask = ata_dev_init_params(ap, dev);
  1016. if (err_mask) {
  1017. rc = -EIO;
  1018. reason = "INIT_DEV_PARAMS failed";
  1019. goto err_out;
  1020. }
  1021. /* current CHS translation info (id[53-58]) might be
  1022. * changed. reread the identify device info.
  1023. */
  1024. post_reset = 0;
  1025. goto retry;
  1026. }
  1027. }
  1028. *p_class = class;
  1029. *p_id = id;
  1030. return 0;
  1031. err_out:
  1032. printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
  1033. ap->id, dev->devno, reason);
  1034. kfree(id);
  1035. return rc;
  1036. }
  1037. static inline u8 ata_dev_knobble(const struct ata_port *ap,
  1038. struct ata_device *dev)
  1039. {
  1040. return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1041. }
  1042. /**
  1043. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1044. * @ap: Port on which target device resides
  1045. * @dev: Target device to configure
  1046. * @print_info: Enable device info printout
  1047. *
  1048. * Configure @dev according to @dev->id. Generic and low-level
  1049. * driver specific fixups are also applied.
  1050. *
  1051. * LOCKING:
  1052. * Kernel thread context (may sleep)
  1053. *
  1054. * RETURNS:
  1055. * 0 on success, -errno otherwise
  1056. */
  1057. static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
  1058. int print_info)
  1059. {
  1060. const u16 *id = dev->id;
  1061. unsigned int xfer_mask;
  1062. int i, rc;
  1063. if (!ata_dev_present(dev)) {
  1064. DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
  1065. ap->id, dev->devno);
  1066. return 0;
  1067. }
  1068. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1069. /* print device capabilities */
  1070. if (print_info)
  1071. printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
  1072. "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
  1073. ap->id, dev->devno, id[49], id[82], id[83],
  1074. id[84], id[85], id[86], id[87], id[88]);
  1075. /* initialize to-be-configured parameters */
  1076. dev->flags = 0;
  1077. dev->max_sectors = 0;
  1078. dev->cdb_len = 0;
  1079. dev->n_sectors = 0;
  1080. dev->cylinders = 0;
  1081. dev->heads = 0;
  1082. dev->sectors = 0;
  1083. /*
  1084. * common ATA, ATAPI feature tests
  1085. */
  1086. /* find max transfer mode; for printk only */
  1087. xfer_mask = ata_id_xfermask(id);
  1088. ata_dump_id(id);
  1089. /* ATA-specific feature tests */
  1090. if (dev->class == ATA_DEV_ATA) {
  1091. dev->n_sectors = ata_id_n_sectors(id);
  1092. if (ata_id_has_lba(id)) {
  1093. const char *lba_desc;
  1094. lba_desc = "LBA";
  1095. dev->flags |= ATA_DFLAG_LBA;
  1096. if (ata_id_has_lba48(id)) {
  1097. dev->flags |= ATA_DFLAG_LBA48;
  1098. lba_desc = "LBA48";
  1099. }
  1100. /* print device info to dmesg */
  1101. if (print_info)
  1102. printk(KERN_INFO "ata%u: dev %u ATA-%d, "
  1103. "max %s, %Lu sectors: %s\n",
  1104. ap->id, dev->devno,
  1105. ata_id_major_version(id),
  1106. ata_mode_string(xfer_mask),
  1107. (unsigned long long)dev->n_sectors,
  1108. lba_desc);
  1109. } else {
  1110. /* CHS */
  1111. /* Default translation */
  1112. dev->cylinders = id[1];
  1113. dev->heads = id[3];
  1114. dev->sectors = id[6];
  1115. if (ata_id_current_chs_valid(id)) {
  1116. /* Current CHS translation is valid. */
  1117. dev->cylinders = id[54];
  1118. dev->heads = id[55];
  1119. dev->sectors = id[56];
  1120. }
  1121. /* print device info to dmesg */
  1122. if (print_info)
  1123. printk(KERN_INFO "ata%u: dev %u ATA-%d, "
  1124. "max %s, %Lu sectors: CHS %u/%u/%u\n",
  1125. ap->id, dev->devno,
  1126. ata_id_major_version(id),
  1127. ata_mode_string(xfer_mask),
  1128. (unsigned long long)dev->n_sectors,
  1129. dev->cylinders, dev->heads, dev->sectors);
  1130. }
  1131. if (dev->id[59] & 0x100) {
  1132. dev->multi_count = dev->id[59] & 0xff;
  1133. DPRINTK("ata%u: dev %u multi count %u\n",
  1134. ap->id, device, dev->multi_count);
  1135. }
  1136. dev->cdb_len = 16;
  1137. }
  1138. /* ATAPI-specific feature tests */
  1139. else if (dev->class == ATA_DEV_ATAPI) {
  1140. rc = atapi_cdb_len(id);
  1141. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1142. printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
  1143. rc = -EINVAL;
  1144. goto err_out_nosup;
  1145. }
  1146. dev->cdb_len = (unsigned int) rc;
  1147. if (ata_id_cdb_intr(dev->id))
  1148. dev->flags |= ATA_DFLAG_CDB_INTR;
  1149. /* print device info to dmesg */
  1150. if (print_info)
  1151. printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
  1152. ap->id, dev->devno, ata_mode_string(xfer_mask));
  1153. }
  1154. ap->host->max_cmd_len = 0;
  1155. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1156. ap->host->max_cmd_len = max_t(unsigned int,
  1157. ap->host->max_cmd_len,
  1158. ap->device[i].cdb_len);
  1159. /* limit bridge transfers to udma5, 200 sectors */
  1160. if (ata_dev_knobble(ap, dev)) {
  1161. if (print_info)
  1162. printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
  1163. ap->id, dev->devno);
  1164. dev->udma_mask &= ATA_UDMA5;
  1165. dev->max_sectors = ATA_MAX_SECTORS;
  1166. }
  1167. if (ap->ops->dev_config)
  1168. ap->ops->dev_config(ap, dev);
  1169. DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
  1170. return 0;
  1171. err_out_nosup:
  1172. DPRINTK("EXIT, err\n");
  1173. return rc;
  1174. }
  1175. /**
  1176. * ata_bus_probe - Reset and probe ATA bus
  1177. * @ap: Bus to probe
  1178. *
  1179. * Master ATA bus probing function. Initiates a hardware-dependent
  1180. * bus reset, then attempts to identify any devices found on
  1181. * the bus.
  1182. *
  1183. * LOCKING:
  1184. * PCI/etc. bus probe sem.
  1185. *
  1186. * RETURNS:
  1187. * Zero on success, non-zero on error.
  1188. */
  1189. static int ata_bus_probe(struct ata_port *ap)
  1190. {
  1191. unsigned int classes[ATA_MAX_DEVICES];
  1192. unsigned int i, rc, found = 0;
  1193. ata_port_probe(ap);
  1194. /* reset and determine device classes */
  1195. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1196. classes[i] = ATA_DEV_UNKNOWN;
  1197. if (ap->ops->probe_reset) {
  1198. rc = ap->ops->probe_reset(ap, classes);
  1199. if (rc) {
  1200. printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
  1201. return rc;
  1202. }
  1203. } else {
  1204. ap->ops->phy_reset(ap);
  1205. if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
  1206. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1207. classes[i] = ap->device[i].class;
  1208. ata_port_probe(ap);
  1209. }
  1210. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1211. if (classes[i] == ATA_DEV_UNKNOWN)
  1212. classes[i] = ATA_DEV_NONE;
  1213. /* read IDENTIFY page and configure devices */
  1214. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1215. struct ata_device *dev = &ap->device[i];
  1216. dev->class = classes[i];
  1217. if (!ata_dev_present(dev))
  1218. continue;
  1219. WARN_ON(dev->id != NULL);
  1220. if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
  1221. dev->class = ATA_DEV_NONE;
  1222. continue;
  1223. }
  1224. if (ata_dev_configure(ap, dev, 1)) {
  1225. ata_dev_disable(ap, dev);
  1226. continue;
  1227. }
  1228. found = 1;
  1229. }
  1230. if (!found)
  1231. goto err_out_disable;
  1232. ata_set_mode(ap);
  1233. if (ap->flags & ATA_FLAG_PORT_DISABLED)
  1234. goto err_out_disable;
  1235. return 0;
  1236. err_out_disable:
  1237. ap->ops->port_disable(ap);
  1238. return -1;
  1239. }
  1240. /**
  1241. * ata_port_probe - Mark port as enabled
  1242. * @ap: Port for which we indicate enablement
  1243. *
  1244. * Modify @ap data structure such that the system
  1245. * thinks that the entire port is enabled.
  1246. *
  1247. * LOCKING: host_set lock, or some other form of
  1248. * serialization.
  1249. */
  1250. void ata_port_probe(struct ata_port *ap)
  1251. {
  1252. ap->flags &= ~ATA_FLAG_PORT_DISABLED;
  1253. }
  1254. /**
  1255. * sata_print_link_status - Print SATA link status
  1256. * @ap: SATA port to printk link status about
  1257. *
  1258. * This function prints link speed and status of a SATA link.
  1259. *
  1260. * LOCKING:
  1261. * None.
  1262. */
  1263. static void sata_print_link_status(struct ata_port *ap)
  1264. {
  1265. u32 sstatus, tmp;
  1266. const char *speed;
  1267. if (!ap->ops->scr_read)
  1268. return;
  1269. sstatus = scr_read(ap, SCR_STATUS);
  1270. if (sata_dev_present(ap)) {
  1271. tmp = (sstatus >> 4) & 0xf;
  1272. if (tmp & (1 << 0))
  1273. speed = "1.5";
  1274. else if (tmp & (1 << 1))
  1275. speed = "3.0";
  1276. else
  1277. speed = "<unknown>";
  1278. printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
  1279. ap->id, speed, sstatus);
  1280. } else {
  1281. printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
  1282. ap->id, sstatus);
  1283. }
  1284. }
  1285. /**
  1286. * __sata_phy_reset - Wake/reset a low-level SATA PHY
  1287. * @ap: SATA port associated with target SATA PHY.
  1288. *
  1289. * This function issues commands to standard SATA Sxxx
  1290. * PHY registers, to wake up the phy (and device), and
  1291. * clear any reset condition.
  1292. *
  1293. * LOCKING:
  1294. * PCI/etc. bus probe sem.
  1295. *
  1296. */
  1297. void __sata_phy_reset(struct ata_port *ap)
  1298. {
  1299. u32 sstatus;
  1300. unsigned long timeout = jiffies + (HZ * 5);
  1301. if (ap->flags & ATA_FLAG_SATA_RESET) {
  1302. /* issue phy wake/reset */
  1303. scr_write_flush(ap, SCR_CONTROL, 0x301);
  1304. /* Couldn't find anything in SATA I/II specs, but
  1305. * AHCI-1.1 10.4.2 says at least 1 ms. */
  1306. mdelay(1);
  1307. }
  1308. scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
  1309. /* wait for phy to become ready, if necessary */
  1310. do {
  1311. msleep(200);
  1312. sstatus = scr_read(ap, SCR_STATUS);
  1313. if ((sstatus & 0xf) != 1)
  1314. break;
  1315. } while (time_before(jiffies, timeout));
  1316. /* print link status */
  1317. sata_print_link_status(ap);
  1318. /* TODO: phy layer with polling, timeouts, etc. */
  1319. if (sata_dev_present(ap))
  1320. ata_port_probe(ap);
  1321. else
  1322. ata_port_disable(ap);
  1323. if (ap->flags & ATA_FLAG_PORT_DISABLED)
  1324. return;
  1325. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1326. ata_port_disable(ap);
  1327. return;
  1328. }
  1329. ap->cbl = ATA_CBL_SATA;
  1330. }
  1331. /**
  1332. * sata_phy_reset - Reset SATA bus.
  1333. * @ap: SATA port associated with target SATA PHY.
  1334. *
  1335. * This function resets the SATA bus, and then probes
  1336. * the bus for devices.
  1337. *
  1338. * LOCKING:
  1339. * PCI/etc. bus probe sem.
  1340. *
  1341. */
  1342. void sata_phy_reset(struct ata_port *ap)
  1343. {
  1344. __sata_phy_reset(ap);
  1345. if (ap->flags & ATA_FLAG_PORT_DISABLED)
  1346. return;
  1347. ata_bus_reset(ap);
  1348. }
  1349. /**
  1350. * ata_dev_pair - return other device on cable
  1351. * @ap: port
  1352. * @adev: device
  1353. *
  1354. * Obtain the other device on the same cable, or if none is
  1355. * present NULL is returned
  1356. */
  1357. struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
  1358. {
  1359. struct ata_device *pair = &ap->device[1 - adev->devno];
  1360. if (!ata_dev_present(pair))
  1361. return NULL;
  1362. return pair;
  1363. }
  1364. /**
  1365. * ata_port_disable - Disable port.
  1366. * @ap: Port to be disabled.
  1367. *
  1368. * Modify @ap data structure such that the system
  1369. * thinks that the entire port is disabled, and should
  1370. * never attempt to probe or communicate with devices
  1371. * on this port.
  1372. *
  1373. * LOCKING: host_set lock, or some other form of
  1374. * serialization.
  1375. */
  1376. void ata_port_disable(struct ata_port *ap)
  1377. {
  1378. ap->device[0].class = ATA_DEV_NONE;
  1379. ap->device[1].class = ATA_DEV_NONE;
  1380. ap->flags |= ATA_FLAG_PORT_DISABLED;
  1381. }
  1382. /*
  1383. * This mode timing computation functionality is ported over from
  1384. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  1385. */
  1386. /*
  1387. * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  1388. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  1389. * for PIO 5, which is a nonstandard extension and UDMA6, which
  1390. * is currently supported only by Maxtor drives.
  1391. */
  1392. static const struct ata_timing ata_timing[] = {
  1393. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  1394. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  1395. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  1396. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  1397. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  1398. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  1399. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  1400. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  1401. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  1402. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  1403. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  1404. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  1405. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  1406. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  1407. /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
  1408. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  1409. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  1410. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  1411. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  1412. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  1413. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  1414. { 0xFF }
  1415. };
  1416. #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
  1417. #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
  1418. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  1419. {
  1420. q->setup = EZ(t->setup * 1000, T);
  1421. q->act8b = EZ(t->act8b * 1000, T);
  1422. q->rec8b = EZ(t->rec8b * 1000, T);
  1423. q->cyc8b = EZ(t->cyc8b * 1000, T);
  1424. q->active = EZ(t->active * 1000, T);
  1425. q->recover = EZ(t->recover * 1000, T);
  1426. q->cycle = EZ(t->cycle * 1000, T);
  1427. q->udma = EZ(t->udma * 1000, UT);
  1428. }
  1429. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  1430. struct ata_timing *m, unsigned int what)
  1431. {
  1432. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  1433. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  1434. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  1435. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  1436. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  1437. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  1438. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  1439. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  1440. }
  1441. static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
  1442. {
  1443. const struct ata_timing *t;
  1444. for (t = ata_timing; t->mode != speed; t++)
  1445. if (t->mode == 0xFF)
  1446. return NULL;
  1447. return t;
  1448. }
  1449. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  1450. struct ata_timing *t, int T, int UT)
  1451. {
  1452. const struct ata_timing *s;
  1453. struct ata_timing p;
  1454. /*
  1455. * Find the mode.
  1456. */
  1457. if (!(s = ata_timing_find_mode(speed)))
  1458. return -EINVAL;
  1459. memcpy(t, s, sizeof(*s));
  1460. /*
  1461. * If the drive is an EIDE drive, it can tell us it needs extended
  1462. * PIO/MW_DMA cycle timing.
  1463. */
  1464. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  1465. memset(&p, 0, sizeof(p));
  1466. if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  1467. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  1468. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  1469. } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  1470. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  1471. }
  1472. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  1473. }
  1474. /*
  1475. * Convert the timing to bus clock counts.
  1476. */
  1477. ata_timing_quantize(t, t, T, UT);
  1478. /*
  1479. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  1480. * S.M.A.R.T * and some other commands. We have to ensure that the
  1481. * DMA cycle timing is slower/equal than the fastest PIO timing.
  1482. */
  1483. if (speed > XFER_PIO_4) {
  1484. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  1485. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  1486. }
  1487. /*
  1488. * Lengthen active & recovery time so that cycle time is correct.
  1489. */
  1490. if (t->act8b + t->rec8b < t->cyc8b) {
  1491. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  1492. t->rec8b = t->cyc8b - t->act8b;
  1493. }
  1494. if (t->active + t->recover < t->cycle) {
  1495. t->active += (t->cycle - (t->active + t->recover)) / 2;
  1496. t->recover = t->cycle - t->active;
  1497. }
  1498. return 0;
  1499. }
  1500. static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
  1501. {
  1502. unsigned int err_mask;
  1503. int rc;
  1504. if (dev->xfer_shift == ATA_SHIFT_PIO)
  1505. dev->flags |= ATA_DFLAG_PIO;
  1506. err_mask = ata_dev_set_xfermode(ap, dev);
  1507. if (err_mask) {
  1508. printk(KERN_ERR
  1509. "ata%u: failed to set xfermode (err_mask=0x%x)\n",
  1510. ap->id, err_mask);
  1511. return -EIO;
  1512. }
  1513. rc = ata_dev_revalidate(ap, dev, 0);
  1514. if (rc) {
  1515. printk(KERN_ERR
  1516. "ata%u: failed to revalidate after set xfermode\n",
  1517. ap->id);
  1518. return rc;
  1519. }
  1520. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  1521. dev->xfer_shift, (int)dev->xfer_mode);
  1522. printk(KERN_INFO "ata%u: dev %u configured for %s\n",
  1523. ap->id, dev->devno,
  1524. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  1525. return 0;
  1526. }
  1527. static int ata_host_set_pio(struct ata_port *ap)
  1528. {
  1529. int i;
  1530. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1531. struct ata_device *dev = &ap->device[i];
  1532. if (!ata_dev_present(dev))
  1533. continue;
  1534. if (!dev->pio_mode) {
  1535. printk(KERN_WARNING "ata%u: no PIO support for device %d.\n", ap->id, i);
  1536. return -1;
  1537. }
  1538. dev->xfer_mode = dev->pio_mode;
  1539. dev->xfer_shift = ATA_SHIFT_PIO;
  1540. if (ap->ops->set_piomode)
  1541. ap->ops->set_piomode(ap, dev);
  1542. }
  1543. return 0;
  1544. }
  1545. static void ata_host_set_dma(struct ata_port *ap)
  1546. {
  1547. int i;
  1548. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1549. struct ata_device *dev = &ap->device[i];
  1550. if (!ata_dev_present(dev) || !dev->dma_mode)
  1551. continue;
  1552. dev->xfer_mode = dev->dma_mode;
  1553. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  1554. if (ap->ops->set_dmamode)
  1555. ap->ops->set_dmamode(ap, dev);
  1556. }
  1557. }
  1558. /**
  1559. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  1560. * @ap: port on which timings will be programmed
  1561. *
  1562. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
  1563. *
  1564. * LOCKING:
  1565. * PCI/etc. bus probe sem.
  1566. */
  1567. static void ata_set_mode(struct ata_port *ap)
  1568. {
  1569. int i, rc;
  1570. /* step 1: calculate xfer_mask */
  1571. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1572. struct ata_device *dev = &ap->device[i];
  1573. unsigned int pio_mask, dma_mask;
  1574. if (!ata_dev_present(dev))
  1575. continue;
  1576. ata_dev_xfermask(ap, dev);
  1577. /* TODO: let LLDD filter dev->*_mask here */
  1578. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  1579. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  1580. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  1581. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  1582. }
  1583. /* step 2: always set host PIO timings */
  1584. rc = ata_host_set_pio(ap);
  1585. if (rc)
  1586. goto err_out;
  1587. /* step 3: set host DMA timings */
  1588. ata_host_set_dma(ap);
  1589. /* step 4: update devices' xfer mode */
  1590. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1591. struct ata_device *dev = &ap->device[i];
  1592. if (!ata_dev_present(dev))
  1593. continue;
  1594. if (ata_dev_set_mode(ap, dev))
  1595. goto err_out;
  1596. }
  1597. if (ap->ops->post_set_mode)
  1598. ap->ops->post_set_mode(ap);
  1599. return;
  1600. err_out:
  1601. ata_port_disable(ap);
  1602. }
  1603. /**
  1604. * ata_tf_to_host - issue ATA taskfile to host controller
  1605. * @ap: port to which command is being issued
  1606. * @tf: ATA taskfile register set
  1607. *
  1608. * Issues ATA taskfile register set to ATA host controller,
  1609. * with proper synchronization with interrupt handler and
  1610. * other threads.
  1611. *
  1612. * LOCKING:
  1613. * spin_lock_irqsave(host_set lock)
  1614. */
  1615. static inline void ata_tf_to_host(struct ata_port *ap,
  1616. const struct ata_taskfile *tf)
  1617. {
  1618. ap->ops->tf_load(ap, tf);
  1619. ap->ops->exec_command(ap, tf);
  1620. }
  1621. /**
  1622. * ata_busy_sleep - sleep until BSY clears, or timeout
  1623. * @ap: port containing status register to be polled
  1624. * @tmout_pat: impatience timeout
  1625. * @tmout: overall timeout
  1626. *
  1627. * Sleep until ATA Status register bit BSY clears,
  1628. * or a timeout occurs.
  1629. *
  1630. * LOCKING: None.
  1631. */
  1632. unsigned int ata_busy_sleep (struct ata_port *ap,
  1633. unsigned long tmout_pat, unsigned long tmout)
  1634. {
  1635. unsigned long timer_start, timeout;
  1636. u8 status;
  1637. status = ata_busy_wait(ap, ATA_BUSY, 300);
  1638. timer_start = jiffies;
  1639. timeout = timer_start + tmout_pat;
  1640. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1641. msleep(50);
  1642. status = ata_busy_wait(ap, ATA_BUSY, 3);
  1643. }
  1644. if (status & ATA_BUSY)
  1645. printk(KERN_WARNING "ata%u is slow to respond, "
  1646. "please be patient\n", ap->id);
  1647. timeout = timer_start + tmout;
  1648. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1649. msleep(50);
  1650. status = ata_chk_status(ap);
  1651. }
  1652. if (status & ATA_BUSY) {
  1653. printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
  1654. ap->id, tmout / HZ);
  1655. return 1;
  1656. }
  1657. return 0;
  1658. }
  1659. static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
  1660. {
  1661. struct ata_ioports *ioaddr = &ap->ioaddr;
  1662. unsigned int dev0 = devmask & (1 << 0);
  1663. unsigned int dev1 = devmask & (1 << 1);
  1664. unsigned long timeout;
  1665. /* if device 0 was found in ata_devchk, wait for its
  1666. * BSY bit to clear
  1667. */
  1668. if (dev0)
  1669. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1670. /* if device 1 was found in ata_devchk, wait for
  1671. * register access, then wait for BSY to clear
  1672. */
  1673. timeout = jiffies + ATA_TMOUT_BOOT;
  1674. while (dev1) {
  1675. u8 nsect, lbal;
  1676. ap->ops->dev_select(ap, 1);
  1677. if (ap->flags & ATA_FLAG_MMIO) {
  1678. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  1679. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  1680. } else {
  1681. nsect = inb(ioaddr->nsect_addr);
  1682. lbal = inb(ioaddr->lbal_addr);
  1683. }
  1684. if ((nsect == 1) && (lbal == 1))
  1685. break;
  1686. if (time_after(jiffies, timeout)) {
  1687. dev1 = 0;
  1688. break;
  1689. }
  1690. msleep(50); /* give drive a breather */
  1691. }
  1692. if (dev1)
  1693. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1694. /* is all this really necessary? */
  1695. ap->ops->dev_select(ap, 0);
  1696. if (dev1)
  1697. ap->ops->dev_select(ap, 1);
  1698. if (dev0)
  1699. ap->ops->dev_select(ap, 0);
  1700. }
  1701. static unsigned int ata_bus_softreset(struct ata_port *ap,
  1702. unsigned int devmask)
  1703. {
  1704. struct ata_ioports *ioaddr = &ap->ioaddr;
  1705. DPRINTK("ata%u: bus reset via SRST\n", ap->id);
  1706. /* software reset. causes dev0 to be selected */
  1707. if (ap->flags & ATA_FLAG_MMIO) {
  1708. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1709. udelay(20); /* FIXME: flush */
  1710. writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
  1711. udelay(20); /* FIXME: flush */
  1712. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1713. } else {
  1714. outb(ap->ctl, ioaddr->ctl_addr);
  1715. udelay(10);
  1716. outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  1717. udelay(10);
  1718. outb(ap->ctl, ioaddr->ctl_addr);
  1719. }
  1720. /* spec mandates ">= 2ms" before checking status.
  1721. * We wait 150ms, because that was the magic delay used for
  1722. * ATAPI devices in Hale Landis's ATADRVR, for the period of time
  1723. * between when the ATA command register is written, and then
  1724. * status is checked. Because waiting for "a while" before
  1725. * checking status is fine, post SRST, we perform this magic
  1726. * delay here as well.
  1727. *
  1728. * Old drivers/ide uses the 2mS rule and then waits for ready
  1729. */
  1730. msleep(150);
  1731. /* Before we perform post reset processing we want to see if
  1732. the bus shows 0xFF because the odd clown forgets the D7 pulldown
  1733. resistor */
  1734. if (ata_check_status(ap) == 0xFF)
  1735. return 1; /* Positive is failure for some reason */
  1736. ata_bus_post_reset(ap, devmask);
  1737. return 0;
  1738. }
  1739. /**
  1740. * ata_bus_reset - reset host port and associated ATA channel
  1741. * @ap: port to reset
  1742. *
  1743. * This is typically the first time we actually start issuing
  1744. * commands to the ATA channel. We wait for BSY to clear, then
  1745. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  1746. * result. Determine what devices, if any, are on the channel
  1747. * by looking at the device 0/1 error register. Look at the signature
  1748. * stored in each device's taskfile registers, to determine if
  1749. * the device is ATA or ATAPI.
  1750. *
  1751. * LOCKING:
  1752. * PCI/etc. bus probe sem.
  1753. * Obtains host_set lock.
  1754. *
  1755. * SIDE EFFECTS:
  1756. * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
  1757. */
  1758. void ata_bus_reset(struct ata_port *ap)
  1759. {
  1760. struct ata_ioports *ioaddr = &ap->ioaddr;
  1761. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  1762. u8 err;
  1763. unsigned int dev0, dev1 = 0, devmask = 0;
  1764. DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
  1765. /* determine if device 0/1 are present */
  1766. if (ap->flags & ATA_FLAG_SATA_RESET)
  1767. dev0 = 1;
  1768. else {
  1769. dev0 = ata_devchk(ap, 0);
  1770. if (slave_possible)
  1771. dev1 = ata_devchk(ap, 1);
  1772. }
  1773. if (dev0)
  1774. devmask |= (1 << 0);
  1775. if (dev1)
  1776. devmask |= (1 << 1);
  1777. /* select device 0 again */
  1778. ap->ops->dev_select(ap, 0);
  1779. /* issue bus reset */
  1780. if (ap->flags & ATA_FLAG_SRST)
  1781. if (ata_bus_softreset(ap, devmask))
  1782. goto err_out;
  1783. /*
  1784. * determine by signature whether we have ATA or ATAPI devices
  1785. */
  1786. ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
  1787. if ((slave_possible) && (err != 0x81))
  1788. ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
  1789. /* re-enable interrupts */
  1790. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  1791. ata_irq_on(ap);
  1792. /* is double-select really necessary? */
  1793. if (ap->device[1].class != ATA_DEV_NONE)
  1794. ap->ops->dev_select(ap, 1);
  1795. if (ap->device[0].class != ATA_DEV_NONE)
  1796. ap->ops->dev_select(ap, 0);
  1797. /* if no devices were detected, disable this port */
  1798. if ((ap->device[0].class == ATA_DEV_NONE) &&
  1799. (ap->device[1].class == ATA_DEV_NONE))
  1800. goto err_out;
  1801. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  1802. /* set up device control for ATA_FLAG_SATA_RESET */
  1803. if (ap->flags & ATA_FLAG_MMIO)
  1804. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1805. else
  1806. outb(ap->ctl, ioaddr->ctl_addr);
  1807. }
  1808. DPRINTK("EXIT\n");
  1809. return;
  1810. err_out:
  1811. printk(KERN_ERR "ata%u: disabling port\n", ap->id);
  1812. ap->ops->port_disable(ap);
  1813. DPRINTK("EXIT\n");
  1814. }
  1815. static int sata_phy_resume(struct ata_port *ap)
  1816. {
  1817. unsigned long timeout = jiffies + (HZ * 5);
  1818. u32 sstatus;
  1819. scr_write_flush(ap, SCR_CONTROL, 0x300);
  1820. /* Wait for phy to become ready, if necessary. */
  1821. do {
  1822. msleep(200);
  1823. sstatus = scr_read(ap, SCR_STATUS);
  1824. if ((sstatus & 0xf) != 1)
  1825. return 0;
  1826. } while (time_before(jiffies, timeout));
  1827. return -1;
  1828. }
  1829. /**
  1830. * ata_std_probeinit - initialize probing
  1831. * @ap: port to be probed
  1832. *
  1833. * @ap is about to be probed. Initialize it. This function is
  1834. * to be used as standard callback for ata_drive_probe_reset().
  1835. *
  1836. * NOTE!!! Do not use this function as probeinit if a low level
  1837. * driver implements only hardreset. Just pass NULL as probeinit
  1838. * in that case. Using this function is probably okay but doing
  1839. * so makes reset sequence different from the original
  1840. * ->phy_reset implementation and Jeff nervous. :-P
  1841. */
  1842. extern void ata_std_probeinit(struct ata_port *ap)
  1843. {
  1844. if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
  1845. sata_phy_resume(ap);
  1846. if (sata_dev_present(ap))
  1847. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1848. }
  1849. }
  1850. /**
  1851. * ata_std_softreset - reset host port via ATA SRST
  1852. * @ap: port to reset
  1853. * @verbose: fail verbosely
  1854. * @classes: resulting classes of attached devices
  1855. *
  1856. * Reset host port using ATA SRST. This function is to be used
  1857. * as standard callback for ata_drive_*_reset() functions.
  1858. *
  1859. * LOCKING:
  1860. * Kernel thread context (may sleep)
  1861. *
  1862. * RETURNS:
  1863. * 0 on success, -errno otherwise.
  1864. */
  1865. int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
  1866. {
  1867. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  1868. unsigned int devmask = 0, err_mask;
  1869. u8 err;
  1870. DPRINTK("ENTER\n");
  1871. if (ap->ops->scr_read && !sata_dev_present(ap)) {
  1872. classes[0] = ATA_DEV_NONE;
  1873. goto out;
  1874. }
  1875. /* determine if device 0/1 are present */
  1876. if (ata_devchk(ap, 0))
  1877. devmask |= (1 << 0);
  1878. if (slave_possible && ata_devchk(ap, 1))
  1879. devmask |= (1 << 1);
  1880. /* select device 0 again */
  1881. ap->ops->dev_select(ap, 0);
  1882. /* issue bus reset */
  1883. DPRINTK("about to softreset, devmask=%x\n", devmask);
  1884. err_mask = ata_bus_softreset(ap, devmask);
  1885. if (err_mask) {
  1886. if (verbose)
  1887. printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
  1888. ap->id, err_mask);
  1889. else
  1890. DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
  1891. err_mask);
  1892. return -EIO;
  1893. }
  1894. /* determine by signature whether we have ATA or ATAPI devices */
  1895. classes[0] = ata_dev_try_classify(ap, 0, &err);
  1896. if (slave_possible && err != 0x81)
  1897. classes[1] = ata_dev_try_classify(ap, 1, &err);
  1898. out:
  1899. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  1900. return 0;
  1901. }
  1902. /**
  1903. * sata_std_hardreset - reset host port via SATA phy reset
  1904. * @ap: port to reset
  1905. * @verbose: fail verbosely
  1906. * @class: resulting class of attached device
  1907. *
  1908. * SATA phy-reset host port using DET bits of SControl register.
  1909. * This function is to be used as standard callback for
  1910. * ata_drive_*_reset().
  1911. *
  1912. * LOCKING:
  1913. * Kernel thread context (may sleep)
  1914. *
  1915. * RETURNS:
  1916. * 0 on success, -errno otherwise.
  1917. */
  1918. int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
  1919. {
  1920. DPRINTK("ENTER\n");
  1921. /* Issue phy wake/reset */
  1922. scr_write_flush(ap, SCR_CONTROL, 0x301);
  1923. /*
  1924. * Couldn't find anything in SATA I/II specs, but AHCI-1.1
  1925. * 10.4.2 says at least 1 ms.
  1926. */
  1927. msleep(1);
  1928. /* Bring phy back */
  1929. sata_phy_resume(ap);
  1930. /* TODO: phy layer with polling, timeouts, etc. */
  1931. if (!sata_dev_present(ap)) {
  1932. *class = ATA_DEV_NONE;
  1933. DPRINTK("EXIT, link offline\n");
  1934. return 0;
  1935. }
  1936. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1937. if (verbose)
  1938. printk(KERN_ERR "ata%u: COMRESET failed "
  1939. "(device not ready)\n", ap->id);
  1940. else
  1941. DPRINTK("EXIT, device not ready\n");
  1942. return -EIO;
  1943. }
  1944. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  1945. *class = ata_dev_try_classify(ap, 0, NULL);
  1946. DPRINTK("EXIT, class=%u\n", *class);
  1947. return 0;
  1948. }
  1949. /**
  1950. * ata_std_postreset - standard postreset callback
  1951. * @ap: the target ata_port
  1952. * @classes: classes of attached devices
  1953. *
  1954. * This function is invoked after a successful reset. Note that
  1955. * the device might have been reset more than once using
  1956. * different reset methods before postreset is invoked.
  1957. *
  1958. * This function is to be used as standard callback for
  1959. * ata_drive_*_reset().
  1960. *
  1961. * LOCKING:
  1962. * Kernel thread context (may sleep)
  1963. */
  1964. void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
  1965. {
  1966. DPRINTK("ENTER\n");
  1967. /* set cable type if it isn't already set */
  1968. if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
  1969. ap->cbl = ATA_CBL_SATA;
  1970. /* print link status */
  1971. if (ap->cbl == ATA_CBL_SATA)
  1972. sata_print_link_status(ap);
  1973. /* re-enable interrupts */
  1974. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  1975. ata_irq_on(ap);
  1976. /* is double-select really necessary? */
  1977. if (classes[0] != ATA_DEV_NONE)
  1978. ap->ops->dev_select(ap, 1);
  1979. if (classes[1] != ATA_DEV_NONE)
  1980. ap->ops->dev_select(ap, 0);
  1981. /* bail out if no device is present */
  1982. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  1983. DPRINTK("EXIT, no device\n");
  1984. return;
  1985. }
  1986. /* set up device control */
  1987. if (ap->ioaddr.ctl_addr) {
  1988. if (ap->flags & ATA_FLAG_MMIO)
  1989. writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
  1990. else
  1991. outb(ap->ctl, ap->ioaddr.ctl_addr);
  1992. }
  1993. DPRINTK("EXIT\n");
  1994. }
  1995. /**
  1996. * ata_std_probe_reset - standard probe reset method
  1997. * @ap: prot to perform probe-reset
  1998. * @classes: resulting classes of attached devices
  1999. *
  2000. * The stock off-the-shelf ->probe_reset method.
  2001. *
  2002. * LOCKING:
  2003. * Kernel thread context (may sleep)
  2004. *
  2005. * RETURNS:
  2006. * 0 on success, -errno otherwise.
  2007. */
  2008. int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
  2009. {
  2010. ata_reset_fn_t hardreset;
  2011. hardreset = NULL;
  2012. if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
  2013. hardreset = sata_std_hardreset;
  2014. return ata_drive_probe_reset(ap, ata_std_probeinit,
  2015. ata_std_softreset, hardreset,
  2016. ata_std_postreset, classes);
  2017. }
  2018. static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
  2019. ata_postreset_fn_t postreset,
  2020. unsigned int *classes)
  2021. {
  2022. int i, rc;
  2023. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2024. classes[i] = ATA_DEV_UNKNOWN;
  2025. rc = reset(ap, 0, classes);
  2026. if (rc)
  2027. return rc;
  2028. /* If any class isn't ATA_DEV_UNKNOWN, consider classification
  2029. * is complete and convert all ATA_DEV_UNKNOWN to
  2030. * ATA_DEV_NONE.
  2031. */
  2032. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2033. if (classes[i] != ATA_DEV_UNKNOWN)
  2034. break;
  2035. if (i < ATA_MAX_DEVICES)
  2036. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2037. if (classes[i] == ATA_DEV_UNKNOWN)
  2038. classes[i] = ATA_DEV_NONE;
  2039. if (postreset)
  2040. postreset(ap, classes);
  2041. return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
  2042. }
  2043. /**
  2044. * ata_drive_probe_reset - Perform probe reset with given methods
  2045. * @ap: port to reset
  2046. * @probeinit: probeinit method (can be NULL)
  2047. * @softreset: softreset method (can be NULL)
  2048. * @hardreset: hardreset method (can be NULL)
  2049. * @postreset: postreset method (can be NULL)
  2050. * @classes: resulting classes of attached devices
  2051. *
  2052. * Reset the specified port and classify attached devices using
  2053. * given methods. This function prefers softreset but tries all
  2054. * possible reset sequences to reset and classify devices. This
  2055. * function is intended to be used for constructing ->probe_reset
  2056. * callback by low level drivers.
  2057. *
  2058. * Reset methods should follow the following rules.
  2059. *
  2060. * - Return 0 on sucess, -errno on failure.
  2061. * - If classification is supported, fill classes[] with
  2062. * recognized class codes.
  2063. * - If classification is not supported, leave classes[] alone.
  2064. * - If verbose is non-zero, print error message on failure;
  2065. * otherwise, shut up.
  2066. *
  2067. * LOCKING:
  2068. * Kernel thread context (may sleep)
  2069. *
  2070. * RETURNS:
  2071. * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
  2072. * if classification fails, and any error code from reset
  2073. * methods.
  2074. */
  2075. int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
  2076. ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
  2077. ata_postreset_fn_t postreset, unsigned int *classes)
  2078. {
  2079. int rc = -EINVAL;
  2080. if (probeinit)
  2081. probeinit(ap);
  2082. if (softreset) {
  2083. rc = do_probe_reset(ap, softreset, postreset, classes);
  2084. if (rc == 0)
  2085. return 0;
  2086. }
  2087. if (!hardreset)
  2088. return rc;
  2089. rc = do_probe_reset(ap, hardreset, postreset, classes);
  2090. if (rc == 0 || rc != -ENODEV)
  2091. return rc;
  2092. if (softreset)
  2093. rc = do_probe_reset(ap, softreset, postreset, classes);
  2094. return rc;
  2095. }
  2096. /**
  2097. * ata_dev_same_device - Determine whether new ID matches configured device
  2098. * @ap: port on which the device to compare against resides
  2099. * @dev: device to compare against
  2100. * @new_class: class of the new device
  2101. * @new_id: IDENTIFY page of the new device
  2102. *
  2103. * Compare @new_class and @new_id against @dev and determine
  2104. * whether @dev is the device indicated by @new_class and
  2105. * @new_id.
  2106. *
  2107. * LOCKING:
  2108. * None.
  2109. *
  2110. * RETURNS:
  2111. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  2112. */
  2113. static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
  2114. unsigned int new_class, const u16 *new_id)
  2115. {
  2116. const u16 *old_id = dev->id;
  2117. unsigned char model[2][41], serial[2][21];
  2118. u64 new_n_sectors;
  2119. if (dev->class != new_class) {
  2120. printk(KERN_INFO
  2121. "ata%u: dev %u class mismatch %d != %d\n",
  2122. ap->id, dev->devno, dev->class, new_class);
  2123. return 0;
  2124. }
  2125. ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
  2126. ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
  2127. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
  2128. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
  2129. new_n_sectors = ata_id_n_sectors(new_id);
  2130. if (strcmp(model[0], model[1])) {
  2131. printk(KERN_INFO
  2132. "ata%u: dev %u model number mismatch '%s' != '%s'\n",
  2133. ap->id, dev->devno, model[0], model[1]);
  2134. return 0;
  2135. }
  2136. if (strcmp(serial[0], serial[1])) {
  2137. printk(KERN_INFO
  2138. "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
  2139. ap->id, dev->devno, serial[0], serial[1]);
  2140. return 0;
  2141. }
  2142. if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
  2143. printk(KERN_INFO
  2144. "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
  2145. ap->id, dev->devno, (unsigned long long)dev->n_sectors,
  2146. (unsigned long long)new_n_sectors);
  2147. return 0;
  2148. }
  2149. return 1;
  2150. }
  2151. /**
  2152. * ata_dev_revalidate - Revalidate ATA device
  2153. * @ap: port on which the device to revalidate resides
  2154. * @dev: device to revalidate
  2155. * @post_reset: is this revalidation after reset?
  2156. *
  2157. * Re-read IDENTIFY page and make sure @dev is still attached to
  2158. * the port.
  2159. *
  2160. * LOCKING:
  2161. * Kernel thread context (may sleep)
  2162. *
  2163. * RETURNS:
  2164. * 0 on success, negative errno otherwise
  2165. */
  2166. int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
  2167. int post_reset)
  2168. {
  2169. unsigned int class;
  2170. u16 *id;
  2171. int rc;
  2172. if (!ata_dev_present(dev))
  2173. return -ENODEV;
  2174. class = dev->class;
  2175. id = NULL;
  2176. /* allocate & read ID data */
  2177. rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
  2178. if (rc)
  2179. goto fail;
  2180. /* is the device still there? */
  2181. if (!ata_dev_same_device(ap, dev, class, id)) {
  2182. rc = -ENODEV;
  2183. goto fail;
  2184. }
  2185. kfree(dev->id);
  2186. dev->id = id;
  2187. /* configure device according to the new ID */
  2188. return ata_dev_configure(ap, dev, 0);
  2189. fail:
  2190. printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
  2191. ap->id, dev->devno, rc);
  2192. kfree(id);
  2193. return rc;
  2194. }
  2195. static const char * const ata_dma_blacklist [] = {
  2196. "WDC AC11000H", NULL,
  2197. "WDC AC22100H", NULL,
  2198. "WDC AC32500H", NULL,
  2199. "WDC AC33100H", NULL,
  2200. "WDC AC31600H", NULL,
  2201. "WDC AC32100H", "24.09P07",
  2202. "WDC AC23200L", "21.10N21",
  2203. "Compaq CRD-8241B", NULL,
  2204. "CRD-8400B", NULL,
  2205. "CRD-8480B", NULL,
  2206. "CRD-8482B", NULL,
  2207. "CRD-84", NULL,
  2208. "SanDisk SDP3B", NULL,
  2209. "SanDisk SDP3B-64", NULL,
  2210. "SANYO CD-ROM CRD", NULL,
  2211. "HITACHI CDR-8", NULL,
  2212. "HITACHI CDR-8335", NULL,
  2213. "HITACHI CDR-8435", NULL,
  2214. "Toshiba CD-ROM XM-6202B", NULL,
  2215. "TOSHIBA CD-ROM XM-1702BC", NULL,
  2216. "CD-532E-A", NULL,
  2217. "E-IDE CD-ROM CR-840", NULL,
  2218. "CD-ROM Drive/F5A", NULL,
  2219. "WPI CDD-820", NULL,
  2220. "SAMSUNG CD-ROM SC-148C", NULL,
  2221. "SAMSUNG CD-ROM SC", NULL,
  2222. "SanDisk SDP3B-64", NULL,
  2223. "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
  2224. "_NEC DV5800A", NULL,
  2225. "SAMSUNG CD-ROM SN-124", "N001"
  2226. };
  2227. static int ata_strim(char *s, size_t len)
  2228. {
  2229. len = strnlen(s, len);
  2230. /* ATAPI specifies that empty space is blank-filled; remove blanks */
  2231. while ((len > 0) && (s[len - 1] == ' ')) {
  2232. len--;
  2233. s[len] = 0;
  2234. }
  2235. return len;
  2236. }
  2237. static int ata_dma_blacklisted(const struct ata_device *dev)
  2238. {
  2239. unsigned char model_num[40];
  2240. unsigned char model_rev[16];
  2241. unsigned int nlen, rlen;
  2242. int i;
  2243. ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
  2244. sizeof(model_num));
  2245. ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
  2246. sizeof(model_rev));
  2247. nlen = ata_strim(model_num, sizeof(model_num));
  2248. rlen = ata_strim(model_rev, sizeof(model_rev));
  2249. for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
  2250. if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
  2251. if (ata_dma_blacklist[i+1] == NULL)
  2252. return 1;
  2253. if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
  2254. return 1;
  2255. }
  2256. }
  2257. return 0;
  2258. }
  2259. /**
  2260. * ata_dev_xfermask - Compute supported xfermask of the given device
  2261. * @ap: Port on which the device to compute xfermask for resides
  2262. * @dev: Device to compute xfermask for
  2263. *
  2264. * Compute supported xfermask of @dev and store it in
  2265. * dev->*_mask. This function is responsible for applying all
  2266. * known limits including host controller limits, device
  2267. * blacklist, etc...
  2268. *
  2269. * LOCKING:
  2270. * None.
  2271. */
  2272. static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
  2273. {
  2274. unsigned long xfer_mask;
  2275. int i;
  2276. xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
  2277. ap->udma_mask);
  2278. /* use port-wide xfermask for now */
  2279. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  2280. struct ata_device *d = &ap->device[i];
  2281. if (!ata_dev_present(d))
  2282. continue;
  2283. xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
  2284. d->udma_mask);
  2285. xfer_mask &= ata_id_xfermask(d->id);
  2286. if (ata_dma_blacklisted(d))
  2287. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2288. }
  2289. if (ata_dma_blacklisted(dev))
  2290. printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
  2291. "disabling DMA\n", ap->id, dev->devno);
  2292. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  2293. &dev->udma_mask);
  2294. }
  2295. /**
  2296. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  2297. * @ap: Port associated with device @dev
  2298. * @dev: Device to which command will be sent
  2299. *
  2300. * Issue SET FEATURES - XFER MODE command to device @dev
  2301. * on port @ap.
  2302. *
  2303. * LOCKING:
  2304. * PCI/etc. bus probe sem.
  2305. *
  2306. * RETURNS:
  2307. * 0 on success, AC_ERR_* mask otherwise.
  2308. */
  2309. static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
  2310. struct ata_device *dev)
  2311. {
  2312. struct ata_taskfile tf;
  2313. unsigned int err_mask;
  2314. /* set up set-features taskfile */
  2315. DPRINTK("set features - xfer mode\n");
  2316. ata_tf_init(ap, &tf, dev->devno);
  2317. tf.command = ATA_CMD_SET_FEATURES;
  2318. tf.feature = SETFEATURES_XFER;
  2319. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2320. tf.protocol = ATA_PROT_NODATA;
  2321. tf.nsect = dev->xfer_mode;
  2322. err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
  2323. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2324. return err_mask;
  2325. }
  2326. /**
  2327. * ata_dev_init_params - Issue INIT DEV PARAMS command
  2328. * @ap: Port associated with device @dev
  2329. * @dev: Device to which command will be sent
  2330. *
  2331. * LOCKING:
  2332. * Kernel thread context (may sleep)
  2333. *
  2334. * RETURNS:
  2335. * 0 on success, AC_ERR_* mask otherwise.
  2336. */
  2337. static unsigned int ata_dev_init_params(struct ata_port *ap,
  2338. struct ata_device *dev)
  2339. {
  2340. struct ata_taskfile tf;
  2341. unsigned int err_mask;
  2342. u16 sectors = dev->id[6];
  2343. u16 heads = dev->id[3];
  2344. /* Number of sectors per track 1-255. Number of heads 1-16 */
  2345. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  2346. return 0;
  2347. /* set up init dev params taskfile */
  2348. DPRINTK("init dev params \n");
  2349. ata_tf_init(ap, &tf, dev->devno);
  2350. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  2351. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2352. tf.protocol = ATA_PROT_NODATA;
  2353. tf.nsect = sectors;
  2354. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  2355. err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
  2356. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2357. return err_mask;
  2358. }
  2359. /**
  2360. * ata_sg_clean - Unmap DMA memory associated with command
  2361. * @qc: Command containing DMA memory to be released
  2362. *
  2363. * Unmap all mapped DMA memory associated with this command.
  2364. *
  2365. * LOCKING:
  2366. * spin_lock_irqsave(host_set lock)
  2367. */
  2368. static void ata_sg_clean(struct ata_queued_cmd *qc)
  2369. {
  2370. struct ata_port *ap = qc->ap;
  2371. struct scatterlist *sg = qc->__sg;
  2372. int dir = qc->dma_dir;
  2373. void *pad_buf = NULL;
  2374. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  2375. WARN_ON(sg == NULL);
  2376. if (qc->flags & ATA_QCFLAG_SINGLE)
  2377. WARN_ON(qc->n_elem > 1);
  2378. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  2379. /* if we padded the buffer out to 32-bit bound, and data
  2380. * xfer direction is from-device, we must copy from the
  2381. * pad buffer back into the supplied buffer
  2382. */
  2383. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  2384. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2385. if (qc->flags & ATA_QCFLAG_SG) {
  2386. if (qc->n_elem)
  2387. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  2388. /* restore last sg */
  2389. sg[qc->orig_n_elem - 1].length += qc->pad_len;
  2390. if (pad_buf) {
  2391. struct scatterlist *psg = &qc->pad_sgent;
  2392. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2393. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  2394. kunmap_atomic(addr, KM_IRQ0);
  2395. }
  2396. } else {
  2397. if (qc->n_elem)
  2398. dma_unmap_single(ap->dev,
  2399. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  2400. dir);
  2401. /* restore sg */
  2402. sg->length += qc->pad_len;
  2403. if (pad_buf)
  2404. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  2405. pad_buf, qc->pad_len);
  2406. }
  2407. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  2408. qc->__sg = NULL;
  2409. }
  2410. /**
  2411. * ata_fill_sg - Fill PCI IDE PRD table
  2412. * @qc: Metadata associated with taskfile to be transferred
  2413. *
  2414. * Fill PCI IDE PRD (scatter-gather) table with segments
  2415. * associated with the current disk command.
  2416. *
  2417. * LOCKING:
  2418. * spin_lock_irqsave(host_set lock)
  2419. *
  2420. */
  2421. static void ata_fill_sg(struct ata_queued_cmd *qc)
  2422. {
  2423. struct ata_port *ap = qc->ap;
  2424. struct scatterlist *sg;
  2425. unsigned int idx;
  2426. WARN_ON(qc->__sg == NULL);
  2427. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  2428. idx = 0;
  2429. ata_for_each_sg(sg, qc) {
  2430. u32 addr, offset;
  2431. u32 sg_len, len;
  2432. /* determine if physical DMA addr spans 64K boundary.
  2433. * Note h/w doesn't support 64-bit, so we unconditionally
  2434. * truncate dma_addr_t to u32.
  2435. */
  2436. addr = (u32) sg_dma_address(sg);
  2437. sg_len = sg_dma_len(sg);
  2438. while (sg_len) {
  2439. offset = addr & 0xffff;
  2440. len = sg_len;
  2441. if ((offset + sg_len) > 0x10000)
  2442. len = 0x10000 - offset;
  2443. ap->prd[idx].addr = cpu_to_le32(addr);
  2444. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  2445. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  2446. idx++;
  2447. sg_len -= len;
  2448. addr += len;
  2449. }
  2450. }
  2451. if (idx)
  2452. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  2453. }
  2454. /**
  2455. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  2456. * @qc: Metadata associated with taskfile to check
  2457. *
  2458. * Allow low-level driver to filter ATA PACKET commands, returning
  2459. * a status indicating whether or not it is OK to use DMA for the
  2460. * supplied PACKET command.
  2461. *
  2462. * LOCKING:
  2463. * spin_lock_irqsave(host_set lock)
  2464. *
  2465. * RETURNS: 0 when ATAPI DMA can be used
  2466. * nonzero otherwise
  2467. */
  2468. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  2469. {
  2470. struct ata_port *ap = qc->ap;
  2471. int rc = 0; /* Assume ATAPI DMA is OK by default */
  2472. if (ap->ops->check_atapi_dma)
  2473. rc = ap->ops->check_atapi_dma(qc);
  2474. return rc;
  2475. }
  2476. /**
  2477. * ata_qc_prep - Prepare taskfile for submission
  2478. * @qc: Metadata associated with taskfile to be prepared
  2479. *
  2480. * Prepare ATA taskfile for submission.
  2481. *
  2482. * LOCKING:
  2483. * spin_lock_irqsave(host_set lock)
  2484. */
  2485. void ata_qc_prep(struct ata_queued_cmd *qc)
  2486. {
  2487. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  2488. return;
  2489. ata_fill_sg(qc);
  2490. }
  2491. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  2492. /**
  2493. * ata_sg_init_one - Associate command with memory buffer
  2494. * @qc: Command to be associated
  2495. * @buf: Memory buffer
  2496. * @buflen: Length of memory buffer, in bytes.
  2497. *
  2498. * Initialize the data-related elements of queued_cmd @qc
  2499. * to point to a single memory buffer, @buf of byte length @buflen.
  2500. *
  2501. * LOCKING:
  2502. * spin_lock_irqsave(host_set lock)
  2503. */
  2504. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  2505. {
  2506. struct scatterlist *sg;
  2507. qc->flags |= ATA_QCFLAG_SINGLE;
  2508. memset(&qc->sgent, 0, sizeof(qc->sgent));
  2509. qc->__sg = &qc->sgent;
  2510. qc->n_elem = 1;
  2511. qc->orig_n_elem = 1;
  2512. qc->buf_virt = buf;
  2513. sg = qc->__sg;
  2514. sg_init_one(sg, buf, buflen);
  2515. }
  2516. /**
  2517. * ata_sg_init - Associate command with scatter-gather table.
  2518. * @qc: Command to be associated
  2519. * @sg: Scatter-gather table.
  2520. * @n_elem: Number of elements in s/g table.
  2521. *
  2522. * Initialize the data-related elements of queued_cmd @qc
  2523. * to point to a scatter-gather table @sg, containing @n_elem
  2524. * elements.
  2525. *
  2526. * LOCKING:
  2527. * spin_lock_irqsave(host_set lock)
  2528. */
  2529. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  2530. unsigned int n_elem)
  2531. {
  2532. qc->flags |= ATA_QCFLAG_SG;
  2533. qc->__sg = sg;
  2534. qc->n_elem = n_elem;
  2535. qc->orig_n_elem = n_elem;
  2536. }
  2537. /**
  2538. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  2539. * @qc: Command with memory buffer to be mapped.
  2540. *
  2541. * DMA-map the memory buffer associated with queued_cmd @qc.
  2542. *
  2543. * LOCKING:
  2544. * spin_lock_irqsave(host_set lock)
  2545. *
  2546. * RETURNS:
  2547. * Zero on success, negative on error.
  2548. */
  2549. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  2550. {
  2551. struct ata_port *ap = qc->ap;
  2552. int dir = qc->dma_dir;
  2553. struct scatterlist *sg = qc->__sg;
  2554. dma_addr_t dma_address;
  2555. int trim_sg = 0;
  2556. /* we must lengthen transfers to end on a 32-bit boundary */
  2557. qc->pad_len = sg->length & 3;
  2558. if (qc->pad_len) {
  2559. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2560. struct scatterlist *psg = &qc->pad_sgent;
  2561. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2562. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2563. if (qc->tf.flags & ATA_TFLAG_WRITE)
  2564. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  2565. qc->pad_len);
  2566. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2567. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2568. /* trim sg */
  2569. sg->length -= qc->pad_len;
  2570. if (sg->length == 0)
  2571. trim_sg = 1;
  2572. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  2573. sg->length, qc->pad_len);
  2574. }
  2575. if (trim_sg) {
  2576. qc->n_elem--;
  2577. goto skip_map;
  2578. }
  2579. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  2580. sg->length, dir);
  2581. if (dma_mapping_error(dma_address)) {
  2582. /* restore sg */
  2583. sg->length += qc->pad_len;
  2584. return -1;
  2585. }
  2586. sg_dma_address(sg) = dma_address;
  2587. sg_dma_len(sg) = sg->length;
  2588. skip_map:
  2589. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  2590. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2591. return 0;
  2592. }
  2593. /**
  2594. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  2595. * @qc: Command with scatter-gather table to be mapped.
  2596. *
  2597. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  2598. *
  2599. * LOCKING:
  2600. * spin_lock_irqsave(host_set lock)
  2601. *
  2602. * RETURNS:
  2603. * Zero on success, negative on error.
  2604. *
  2605. */
  2606. static int ata_sg_setup(struct ata_queued_cmd *qc)
  2607. {
  2608. struct ata_port *ap = qc->ap;
  2609. struct scatterlist *sg = qc->__sg;
  2610. struct scatterlist *lsg = &sg[qc->n_elem - 1];
  2611. int n_elem, pre_n_elem, dir, trim_sg = 0;
  2612. VPRINTK("ENTER, ata%u\n", ap->id);
  2613. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  2614. /* we must lengthen transfers to end on a 32-bit boundary */
  2615. qc->pad_len = lsg->length & 3;
  2616. if (qc->pad_len) {
  2617. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2618. struct scatterlist *psg = &qc->pad_sgent;
  2619. unsigned int offset;
  2620. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2621. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2622. /*
  2623. * psg->page/offset are used to copy to-be-written
  2624. * data in this function or read data in ata_sg_clean.
  2625. */
  2626. offset = lsg->offset + lsg->length - qc->pad_len;
  2627. psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
  2628. psg->offset = offset_in_page(offset);
  2629. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  2630. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2631. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  2632. kunmap_atomic(addr, KM_IRQ0);
  2633. }
  2634. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2635. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2636. /* trim last sg */
  2637. lsg->length -= qc->pad_len;
  2638. if (lsg->length == 0)
  2639. trim_sg = 1;
  2640. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  2641. qc->n_elem - 1, lsg->length, qc->pad_len);
  2642. }
  2643. pre_n_elem = qc->n_elem;
  2644. if (trim_sg && pre_n_elem)
  2645. pre_n_elem--;
  2646. if (!pre_n_elem) {
  2647. n_elem = 0;
  2648. goto skip_map;
  2649. }
  2650. dir = qc->dma_dir;
  2651. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  2652. if (n_elem < 1) {
  2653. /* restore last sg */
  2654. lsg->length += qc->pad_len;
  2655. return -1;
  2656. }
  2657. DPRINTK("%d sg elements mapped\n", n_elem);
  2658. skip_map:
  2659. qc->n_elem = n_elem;
  2660. return 0;
  2661. }
  2662. /**
  2663. * ata_poll_qc_complete - turn irq back on and finish qc
  2664. * @qc: Command to complete
  2665. * @err_mask: ATA status register content
  2666. *
  2667. * LOCKING:
  2668. * None. (grabs host lock)
  2669. */
  2670. void ata_poll_qc_complete(struct ata_queued_cmd *qc)
  2671. {
  2672. struct ata_port *ap = qc->ap;
  2673. unsigned long flags;
  2674. spin_lock_irqsave(&ap->host_set->lock, flags);
  2675. ata_irq_on(ap);
  2676. ata_qc_complete(qc);
  2677. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  2678. }
  2679. /**
  2680. * ata_pio_poll - poll using PIO, depending on current state
  2681. * @ap: the target ata_port
  2682. *
  2683. * LOCKING:
  2684. * None. (executing in kernel thread context)
  2685. *
  2686. * RETURNS:
  2687. * timeout value to use
  2688. */
  2689. static unsigned long ata_pio_poll(struct ata_port *ap)
  2690. {
  2691. struct ata_queued_cmd *qc;
  2692. u8 status;
  2693. unsigned int poll_state = HSM_ST_UNKNOWN;
  2694. unsigned int reg_state = HSM_ST_UNKNOWN;
  2695. qc = ata_qc_from_tag(ap, ap->active_tag);
  2696. WARN_ON(qc == NULL);
  2697. switch (ap->hsm_task_state) {
  2698. case HSM_ST:
  2699. case HSM_ST_POLL:
  2700. poll_state = HSM_ST_POLL;
  2701. reg_state = HSM_ST;
  2702. break;
  2703. case HSM_ST_LAST:
  2704. case HSM_ST_LAST_POLL:
  2705. poll_state = HSM_ST_LAST_POLL;
  2706. reg_state = HSM_ST_LAST;
  2707. break;
  2708. default:
  2709. BUG();
  2710. break;
  2711. }
  2712. status = ata_chk_status(ap);
  2713. if (status & ATA_BUSY) {
  2714. if (time_after(jiffies, ap->pio_task_timeout)) {
  2715. qc->err_mask |= AC_ERR_TIMEOUT;
  2716. ap->hsm_task_state = HSM_ST_TMOUT;
  2717. return 0;
  2718. }
  2719. ap->hsm_task_state = poll_state;
  2720. return ATA_SHORT_PAUSE;
  2721. }
  2722. ap->hsm_task_state = reg_state;
  2723. return 0;
  2724. }
  2725. /**
  2726. * ata_pio_complete - check if drive is busy or idle
  2727. * @ap: the target ata_port
  2728. *
  2729. * LOCKING:
  2730. * None. (executing in kernel thread context)
  2731. *
  2732. * RETURNS:
  2733. * Zero if qc completed.
  2734. * Non-zero if has next.
  2735. */
  2736. static int ata_pio_complete (struct ata_port *ap)
  2737. {
  2738. struct ata_queued_cmd *qc;
  2739. u8 drv_stat;
  2740. /*
  2741. * This is purely heuristic. This is a fast path. Sometimes when
  2742. * we enter, BSY will be cleared in a chk-status or two. If not,
  2743. * the drive is probably seeking or something. Snooze for a couple
  2744. * msecs, then chk-status again. If still busy, fall back to
  2745. * HSM_ST_LAST_POLL state.
  2746. */
  2747. drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
  2748. if (drv_stat & ATA_BUSY) {
  2749. msleep(2);
  2750. drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
  2751. if (drv_stat & ATA_BUSY) {
  2752. ap->hsm_task_state = HSM_ST_LAST_POLL;
  2753. ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
  2754. return 1;
  2755. }
  2756. }
  2757. qc = ata_qc_from_tag(ap, ap->active_tag);
  2758. WARN_ON(qc == NULL);
  2759. drv_stat = ata_wait_idle(ap);
  2760. if (!ata_ok(drv_stat)) {
  2761. qc->err_mask |= __ac_err_mask(drv_stat);
  2762. ap->hsm_task_state = HSM_ST_ERR;
  2763. return 1;
  2764. }
  2765. ap->hsm_task_state = HSM_ST_IDLE;
  2766. WARN_ON(qc->err_mask);
  2767. ata_poll_qc_complete(qc);
  2768. /* another command may start at this point */
  2769. return 0;
  2770. }
  2771. /**
  2772. * swap_buf_le16 - swap halves of 16-bit words in place
  2773. * @buf: Buffer to swap
  2774. * @buf_words: Number of 16-bit words in buffer.
  2775. *
  2776. * Swap halves of 16-bit words if needed to convert from
  2777. * little-endian byte order to native cpu byte order, or
  2778. * vice-versa.
  2779. *
  2780. * LOCKING:
  2781. * Inherited from caller.
  2782. */
  2783. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  2784. {
  2785. #ifdef __BIG_ENDIAN
  2786. unsigned int i;
  2787. for (i = 0; i < buf_words; i++)
  2788. buf[i] = le16_to_cpu(buf[i]);
  2789. #endif /* __BIG_ENDIAN */
  2790. }
  2791. /**
  2792. * ata_mmio_data_xfer - Transfer data by MMIO
  2793. * @ap: port to read/write
  2794. * @buf: data buffer
  2795. * @buflen: buffer length
  2796. * @write_data: read/write
  2797. *
  2798. * Transfer data from/to the device data register by MMIO.
  2799. *
  2800. * LOCKING:
  2801. * Inherited from caller.
  2802. */
  2803. static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
  2804. unsigned int buflen, int write_data)
  2805. {
  2806. unsigned int i;
  2807. unsigned int words = buflen >> 1;
  2808. u16 *buf16 = (u16 *) buf;
  2809. void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
  2810. /* Transfer multiple of 2 bytes */
  2811. if (write_data) {
  2812. for (i = 0; i < words; i++)
  2813. writew(le16_to_cpu(buf16[i]), mmio);
  2814. } else {
  2815. for (i = 0; i < words; i++)
  2816. buf16[i] = cpu_to_le16(readw(mmio));
  2817. }
  2818. /* Transfer trailing 1 byte, if any. */
  2819. if (unlikely(buflen & 0x01)) {
  2820. u16 align_buf[1] = { 0 };
  2821. unsigned char *trailing_buf = buf + buflen - 1;
  2822. if (write_data) {
  2823. memcpy(align_buf, trailing_buf, 1);
  2824. writew(le16_to_cpu(align_buf[0]), mmio);
  2825. } else {
  2826. align_buf[0] = cpu_to_le16(readw(mmio));
  2827. memcpy(trailing_buf, align_buf, 1);
  2828. }
  2829. }
  2830. }
  2831. /**
  2832. * ata_pio_data_xfer - Transfer data by PIO
  2833. * @ap: port to read/write
  2834. * @buf: data buffer
  2835. * @buflen: buffer length
  2836. * @write_data: read/write
  2837. *
  2838. * Transfer data from/to the device data register by PIO.
  2839. *
  2840. * LOCKING:
  2841. * Inherited from caller.
  2842. */
  2843. static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
  2844. unsigned int buflen, int write_data)
  2845. {
  2846. unsigned int words = buflen >> 1;
  2847. /* Transfer multiple of 2 bytes */
  2848. if (write_data)
  2849. outsw(ap->ioaddr.data_addr, buf, words);
  2850. else
  2851. insw(ap->ioaddr.data_addr, buf, words);
  2852. /* Transfer trailing 1 byte, if any. */
  2853. if (unlikely(buflen & 0x01)) {
  2854. u16 align_buf[1] = { 0 };
  2855. unsigned char *trailing_buf = buf + buflen - 1;
  2856. if (write_data) {
  2857. memcpy(align_buf, trailing_buf, 1);
  2858. outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  2859. } else {
  2860. align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
  2861. memcpy(trailing_buf, align_buf, 1);
  2862. }
  2863. }
  2864. }
  2865. /**
  2866. * ata_data_xfer - Transfer data from/to the data register.
  2867. * @ap: port to read/write
  2868. * @buf: data buffer
  2869. * @buflen: buffer length
  2870. * @do_write: read/write
  2871. *
  2872. * Transfer data from/to the device data register.
  2873. *
  2874. * LOCKING:
  2875. * Inherited from caller.
  2876. */
  2877. static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
  2878. unsigned int buflen, int do_write)
  2879. {
  2880. /* Make the crap hardware pay the costs not the good stuff */
  2881. if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
  2882. unsigned long flags;
  2883. local_irq_save(flags);
  2884. if (ap->flags & ATA_FLAG_MMIO)
  2885. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  2886. else
  2887. ata_pio_data_xfer(ap, buf, buflen, do_write);
  2888. local_irq_restore(flags);
  2889. } else {
  2890. if (ap->flags & ATA_FLAG_MMIO)
  2891. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  2892. else
  2893. ata_pio_data_xfer(ap, buf, buflen, do_write);
  2894. }
  2895. }
  2896. /**
  2897. * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
  2898. * @qc: Command on going
  2899. *
  2900. * Transfer ATA_SECT_SIZE of data from/to the ATA device.
  2901. *
  2902. * LOCKING:
  2903. * Inherited from caller.
  2904. */
  2905. static void ata_pio_sector(struct ata_queued_cmd *qc)
  2906. {
  2907. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  2908. struct scatterlist *sg = qc->__sg;
  2909. struct ata_port *ap = qc->ap;
  2910. struct page *page;
  2911. unsigned int offset;
  2912. unsigned char *buf;
  2913. if (qc->cursect == (qc->nsect - 1))
  2914. ap->hsm_task_state = HSM_ST_LAST;
  2915. page = sg[qc->cursg].page;
  2916. offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
  2917. /* get the current page and offset */
  2918. page = nth_page(page, (offset >> PAGE_SHIFT));
  2919. offset %= PAGE_SIZE;
  2920. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2921. if (PageHighMem(page)) {
  2922. unsigned long flags;
  2923. local_irq_save(flags);
  2924. buf = kmap_atomic(page, KM_IRQ0);
  2925. /* do the actual data transfer */
  2926. ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
  2927. kunmap_atomic(buf, KM_IRQ0);
  2928. local_irq_restore(flags);
  2929. } else {
  2930. buf = page_address(page);
  2931. ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
  2932. }
  2933. qc->cursect++;
  2934. qc->cursg_ofs++;
  2935. if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
  2936. qc->cursg++;
  2937. qc->cursg_ofs = 0;
  2938. }
  2939. }
  2940. /**
  2941. * ata_pio_sectors - Transfer one or many 512-byte sectors.
  2942. * @qc: Command on going
  2943. *
  2944. * Transfer one or many ATA_SECT_SIZE of data from/to the
  2945. * ATA device for the DRQ request.
  2946. *
  2947. * LOCKING:
  2948. * Inherited from caller.
  2949. */
  2950. static void ata_pio_sectors(struct ata_queued_cmd *qc)
  2951. {
  2952. if (is_multi_taskfile(&qc->tf)) {
  2953. /* READ/WRITE MULTIPLE */
  2954. unsigned int nsect;
  2955. WARN_ON(qc->dev->multi_count == 0);
  2956. nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
  2957. while (nsect--)
  2958. ata_pio_sector(qc);
  2959. } else
  2960. ata_pio_sector(qc);
  2961. }
  2962. /**
  2963. * atapi_send_cdb - Write CDB bytes to hardware
  2964. * @ap: Port to which ATAPI device is attached.
  2965. * @qc: Taskfile currently active
  2966. *
  2967. * When device has indicated its readiness to accept
  2968. * a CDB, this function is called. Send the CDB.
  2969. *
  2970. * LOCKING:
  2971. * caller.
  2972. */
  2973. static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
  2974. {
  2975. /* send SCSI cdb */
  2976. DPRINTK("send cdb\n");
  2977. WARN_ON(qc->dev->cdb_len < 12);
  2978. ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
  2979. ata_altstatus(ap); /* flush */
  2980. switch (qc->tf.protocol) {
  2981. case ATA_PROT_ATAPI:
  2982. ap->hsm_task_state = HSM_ST;
  2983. break;
  2984. case ATA_PROT_ATAPI_NODATA:
  2985. ap->hsm_task_state = HSM_ST_LAST;
  2986. break;
  2987. case ATA_PROT_ATAPI_DMA:
  2988. ap->hsm_task_state = HSM_ST_LAST;
  2989. /* initiate bmdma */
  2990. ap->ops->bmdma_start(qc);
  2991. break;
  2992. }
  2993. }
  2994. /**
  2995. * ata_pio_first_block - Write first data block to hardware
  2996. * @ap: Port to which ATA/ATAPI device is attached.
  2997. *
  2998. * When device has indicated its readiness to accept
  2999. * the data, this function sends out the CDB or
  3000. * the first data block by PIO.
  3001. * After this,
  3002. * - If polling, ata_pio_task() handles the rest.
  3003. * - Otherwise, interrupt handler takes over.
  3004. *
  3005. * LOCKING:
  3006. * Kernel thread context (may sleep)
  3007. *
  3008. * RETURNS:
  3009. * Zero if irq handler takes over
  3010. * Non-zero if has next (polling).
  3011. */
  3012. static int ata_pio_first_block(struct ata_port *ap)
  3013. {
  3014. struct ata_queued_cmd *qc;
  3015. u8 status;
  3016. unsigned long flags;
  3017. int has_next;
  3018. qc = ata_qc_from_tag(ap, ap->active_tag);
  3019. WARN_ON(qc == NULL);
  3020. WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
  3021. /* if polling, we will stay in the work queue after sending the data.
  3022. * otherwise, interrupt handler takes over after sending the data.
  3023. */
  3024. has_next = (qc->tf.flags & ATA_TFLAG_POLLING);
  3025. /* sleep-wait for BSY to clear */
  3026. DPRINTK("busy wait\n");
  3027. if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) {
  3028. qc->err_mask |= AC_ERR_TIMEOUT;
  3029. ap->hsm_task_state = HSM_ST_TMOUT;
  3030. goto err_out;
  3031. }
  3032. /* make sure DRQ is set */
  3033. status = ata_chk_status(ap);
  3034. if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
  3035. /* device status error */
  3036. qc->err_mask |= AC_ERR_HSM;
  3037. ap->hsm_task_state = HSM_ST_ERR;
  3038. goto err_out;
  3039. }
  3040. /* Send the CDB (atapi) or the first data block (ata pio out).
  3041. * During the state transition, interrupt handler shouldn't
  3042. * be invoked before the data transfer is complete and
  3043. * hsm_task_state is changed. Hence, the following locking.
  3044. */
  3045. spin_lock_irqsave(&ap->host_set->lock, flags);
  3046. if (qc->tf.protocol == ATA_PROT_PIO) {
  3047. /* PIO data out protocol.
  3048. * send first data block.
  3049. */
  3050. /* ata_pio_sectors() might change the state to HSM_ST_LAST.
  3051. * so, the state is changed here before ata_pio_sectors().
  3052. */
  3053. ap->hsm_task_state = HSM_ST;
  3054. ata_pio_sectors(qc);
  3055. ata_altstatus(ap); /* flush */
  3056. } else
  3057. /* send CDB */
  3058. atapi_send_cdb(ap, qc);
  3059. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3060. /* if polling, ata_pio_task() handles the rest.
  3061. * otherwise, interrupt handler takes over from here.
  3062. */
  3063. return has_next;
  3064. err_out:
  3065. return 1; /* has next */
  3066. }
  3067. /**
  3068. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3069. * @qc: Command on going
  3070. * @bytes: number of bytes
  3071. *
  3072. * Transfer Transfer data from/to the ATAPI device.
  3073. *
  3074. * LOCKING:
  3075. * Inherited from caller.
  3076. *
  3077. */
  3078. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  3079. {
  3080. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3081. struct scatterlist *sg = qc->__sg;
  3082. struct ata_port *ap = qc->ap;
  3083. struct page *page;
  3084. unsigned char *buf;
  3085. unsigned int offset, count;
  3086. if (qc->curbytes + bytes >= qc->nbytes)
  3087. ap->hsm_task_state = HSM_ST_LAST;
  3088. next_sg:
  3089. if (unlikely(qc->cursg >= qc->n_elem)) {
  3090. /*
  3091. * The end of qc->sg is reached and the device expects
  3092. * more data to transfer. In order not to overrun qc->sg
  3093. * and fulfill length specified in the byte count register,
  3094. * - for read case, discard trailing data from the device
  3095. * - for write case, padding zero data to the device
  3096. */
  3097. u16 pad_buf[1] = { 0 };
  3098. unsigned int words = bytes >> 1;
  3099. unsigned int i;
  3100. if (words) /* warning if bytes > 1 */
  3101. printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
  3102. ap->id, bytes);
  3103. for (i = 0; i < words; i++)
  3104. ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
  3105. ap->hsm_task_state = HSM_ST_LAST;
  3106. return;
  3107. }
  3108. sg = &qc->__sg[qc->cursg];
  3109. page = sg->page;
  3110. offset = sg->offset + qc->cursg_ofs;
  3111. /* get the current page and offset */
  3112. page = nth_page(page, (offset >> PAGE_SHIFT));
  3113. offset %= PAGE_SIZE;
  3114. /* don't overrun current sg */
  3115. count = min(sg->length - qc->cursg_ofs, bytes);
  3116. /* don't cross page boundaries */
  3117. count = min(count, (unsigned int)PAGE_SIZE - offset);
  3118. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3119. if (PageHighMem(page)) {
  3120. unsigned long flags;
  3121. local_irq_save(flags);
  3122. buf = kmap_atomic(page, KM_IRQ0);
  3123. /* do the actual data transfer */
  3124. ata_data_xfer(ap, buf + offset, count, do_write);
  3125. kunmap_atomic(buf, KM_IRQ0);
  3126. local_irq_restore(flags);
  3127. } else {
  3128. buf = page_address(page);
  3129. ata_data_xfer(ap, buf + offset, count, do_write);
  3130. }
  3131. bytes -= count;
  3132. qc->curbytes += count;
  3133. qc->cursg_ofs += count;
  3134. if (qc->cursg_ofs == sg->length) {
  3135. qc->cursg++;
  3136. qc->cursg_ofs = 0;
  3137. }
  3138. if (bytes)
  3139. goto next_sg;
  3140. }
  3141. /**
  3142. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3143. * @qc: Command on going
  3144. *
  3145. * Transfer Transfer data from/to the ATAPI device.
  3146. *
  3147. * LOCKING:
  3148. * Inherited from caller.
  3149. */
  3150. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  3151. {
  3152. struct ata_port *ap = qc->ap;
  3153. struct ata_device *dev = qc->dev;
  3154. unsigned int ireason, bc_lo, bc_hi, bytes;
  3155. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  3156. ap->ops->tf_read(ap, &qc->tf);
  3157. ireason = qc->tf.nsect;
  3158. bc_lo = qc->tf.lbam;
  3159. bc_hi = qc->tf.lbah;
  3160. bytes = (bc_hi << 8) | bc_lo;
  3161. /* shall be cleared to zero, indicating xfer of data */
  3162. if (ireason & (1 << 0))
  3163. goto err_out;
  3164. /* make sure transfer direction matches expected */
  3165. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  3166. if (do_write != i_write)
  3167. goto err_out;
  3168. VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
  3169. __atapi_pio_bytes(qc, bytes);
  3170. return;
  3171. err_out:
  3172. printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
  3173. ap->id, dev->devno);
  3174. qc->err_mask |= AC_ERR_HSM;
  3175. ap->hsm_task_state = HSM_ST_ERR;
  3176. }
  3177. /**
  3178. * ata_pio_block - start PIO on a block
  3179. * @ap: the target ata_port
  3180. *
  3181. * LOCKING:
  3182. * None. (executing in kernel thread context)
  3183. */
  3184. static void ata_pio_block(struct ata_port *ap)
  3185. {
  3186. struct ata_queued_cmd *qc;
  3187. u8 status;
  3188. /*
  3189. * This is purely heuristic. This is a fast path.
  3190. * Sometimes when we enter, BSY will be cleared in
  3191. * a chk-status or two. If not, the drive is probably seeking
  3192. * or something. Snooze for a couple msecs, then
  3193. * chk-status again. If still busy, fall back to
  3194. * HSM_ST_POLL state.
  3195. */
  3196. status = ata_busy_wait(ap, ATA_BUSY, 5);
  3197. if (status & ATA_BUSY) {
  3198. msleep(2);
  3199. status = ata_busy_wait(ap, ATA_BUSY, 10);
  3200. if (status & ATA_BUSY) {
  3201. ap->hsm_task_state = HSM_ST_POLL;
  3202. ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
  3203. return;
  3204. }
  3205. }
  3206. qc = ata_qc_from_tag(ap, ap->active_tag);
  3207. WARN_ON(qc == NULL);
  3208. /* check error */
  3209. if (status & (ATA_ERR | ATA_DF)) {
  3210. qc->err_mask |= AC_ERR_DEV;
  3211. ap->hsm_task_state = HSM_ST_ERR;
  3212. return;
  3213. }
  3214. /* transfer data if any */
  3215. if (is_atapi_taskfile(&qc->tf)) {
  3216. /* DRQ=0 means no more data to transfer */
  3217. if ((status & ATA_DRQ) == 0) {
  3218. ap->hsm_task_state = HSM_ST_LAST;
  3219. return;
  3220. }
  3221. atapi_pio_bytes(qc);
  3222. } else {
  3223. /* handle BSY=0, DRQ=0 as error */
  3224. if ((status & ATA_DRQ) == 0) {
  3225. qc->err_mask |= AC_ERR_HSM;
  3226. ap->hsm_task_state = HSM_ST_ERR;
  3227. return;
  3228. }
  3229. ata_pio_sectors(qc);
  3230. }
  3231. ata_altstatus(ap); /* flush */
  3232. }
  3233. static void ata_pio_error(struct ata_port *ap)
  3234. {
  3235. struct ata_queued_cmd *qc;
  3236. qc = ata_qc_from_tag(ap, ap->active_tag);
  3237. WARN_ON(qc == NULL);
  3238. if (qc->tf.command != ATA_CMD_PACKET)
  3239. printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
  3240. /* make sure qc->err_mask is available to
  3241. * know what's wrong and recover
  3242. */
  3243. WARN_ON(qc->err_mask == 0);
  3244. ap->hsm_task_state = HSM_ST_IDLE;
  3245. ata_poll_qc_complete(qc);
  3246. }
  3247. /**
  3248. * ata_hsm_move - move the HSM to the next state.
  3249. * @ap: the target ata_port
  3250. * @qc: qc on going
  3251. * @status: current device status
  3252. * @in_wq: 1 if called from workqueue, 0 otherwise
  3253. *
  3254. * RETURNS:
  3255. * 1 when poll next status needed, 0 otherwise.
  3256. */
  3257. static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
  3258. u8 status, int in_wq)
  3259. {
  3260. unsigned long flags = 0;
  3261. int poll_next;
  3262. WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
  3263. /* Make sure ata_qc_issue_prot() does not throw things
  3264. * like DMA polling into the workqueue. Notice that
  3265. * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
  3266. */
  3267. WARN_ON(in_wq != ((qc->tf.flags & ATA_TFLAG_POLLING) ||
  3268. (ap->hsm_task_state == HSM_ST_FIRST &&
  3269. ((qc->tf.protocol == ATA_PROT_PIO &&
  3270. (qc->tf.flags & ATA_TFLAG_WRITE)) ||
  3271. (is_atapi_taskfile(&qc->tf) &&
  3272. !(qc->dev->flags & ATA_DFLAG_CDB_INTR))))));
  3273. /* check error */
  3274. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3275. qc->err_mask |= AC_ERR_DEV;
  3276. ap->hsm_task_state = HSM_ST_ERR;
  3277. }
  3278. fsm_start:
  3279. switch (ap->hsm_task_state) {
  3280. case HSM_ST_FIRST:
  3281. /* Send first data block or PACKET CDB */
  3282. /* If polling, we will stay in the work queue after
  3283. * sending the data. Otherwise, interrupt handler
  3284. * takes over after sending the data.
  3285. */
  3286. poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
  3287. /* check device status */
  3288. if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
  3289. /* Wrong status. Let EH handle this */
  3290. qc->err_mask |= AC_ERR_HSM;
  3291. ap->hsm_task_state = HSM_ST_ERR;
  3292. goto fsm_start;
  3293. }
  3294. /* Send the CDB (atapi) or the first data block (ata pio out).
  3295. * During the state transition, interrupt handler shouldn't
  3296. * be invoked before the data transfer is complete and
  3297. * hsm_task_state is changed. Hence, the following locking.
  3298. */
  3299. if (in_wq)
  3300. spin_lock_irqsave(&ap->host_set->lock, flags);
  3301. if (qc->tf.protocol == ATA_PROT_PIO) {
  3302. /* PIO data out protocol.
  3303. * send first data block.
  3304. */
  3305. /* ata_pio_sectors() might change the state
  3306. * to HSM_ST_LAST. so, the state is changed here
  3307. * before ata_pio_sectors().
  3308. */
  3309. ap->hsm_task_state = HSM_ST;
  3310. ata_pio_sectors(qc);
  3311. ata_altstatus(ap); /* flush */
  3312. } else
  3313. /* send CDB */
  3314. atapi_send_cdb(ap, qc);
  3315. if (in_wq)
  3316. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3317. /* if polling, ata_pio_task() handles the rest.
  3318. * otherwise, interrupt handler takes over from here.
  3319. */
  3320. break;
  3321. case HSM_ST:
  3322. /* complete command or read/write the data register */
  3323. if (qc->tf.protocol == ATA_PROT_ATAPI) {
  3324. /* ATAPI PIO protocol */
  3325. if ((status & ATA_DRQ) == 0) {
  3326. /* no more data to transfer */
  3327. ap->hsm_task_state = HSM_ST_LAST;
  3328. goto fsm_start;
  3329. }
  3330. atapi_pio_bytes(qc);
  3331. if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
  3332. /* bad ireason reported by device */
  3333. goto fsm_start;
  3334. } else {
  3335. /* ATA PIO protocol */
  3336. if (unlikely((status & ATA_DRQ) == 0)) {
  3337. /* handle BSY=0, DRQ=0 as error */
  3338. qc->err_mask |= AC_ERR_HSM;
  3339. ap->hsm_task_state = HSM_ST_ERR;
  3340. goto fsm_start;
  3341. }
  3342. ata_pio_sectors(qc);
  3343. if (ap->hsm_task_state == HSM_ST_LAST &&
  3344. (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
  3345. /* all data read */
  3346. ata_altstatus(ap);
  3347. status = ata_chk_status(ap);
  3348. goto fsm_start;
  3349. }
  3350. }
  3351. ata_altstatus(ap); /* flush */
  3352. poll_next = 1;
  3353. break;
  3354. case HSM_ST_LAST:
  3355. if (unlikely(!ata_ok(status))) {
  3356. qc->err_mask |= __ac_err_mask(status);
  3357. ap->hsm_task_state = HSM_ST_ERR;
  3358. goto fsm_start;
  3359. }
  3360. /* no more data to transfer */
  3361. DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
  3362. ap->id, status);
  3363. WARN_ON(qc->err_mask);
  3364. ap->hsm_task_state = HSM_ST_IDLE;
  3365. /* complete taskfile transaction */
  3366. if (in_wq)
  3367. ata_poll_qc_complete(qc);
  3368. else
  3369. ata_qc_complete(qc);
  3370. poll_next = 0;
  3371. break;
  3372. case HSM_ST_ERR:
  3373. if (qc->tf.command != ATA_CMD_PACKET)
  3374. printk(KERN_ERR "ata%u: command error, drv_stat 0x%x\n",
  3375. ap->id, status);
  3376. /* make sure qc->err_mask is available to
  3377. * know what's wrong and recover
  3378. */
  3379. WARN_ON(qc->err_mask == 0);
  3380. ap->hsm_task_state = HSM_ST_IDLE;
  3381. if (in_wq)
  3382. ata_poll_qc_complete(qc);
  3383. else
  3384. ata_qc_complete(qc);
  3385. poll_next = 0;
  3386. break;
  3387. default:
  3388. poll_next = 0;
  3389. BUG();
  3390. }
  3391. return poll_next;
  3392. }
  3393. static void ata_pio_task(void *_data)
  3394. {
  3395. struct ata_port *ap = _data;
  3396. unsigned long timeout;
  3397. int has_next;
  3398. fsm_start:
  3399. timeout = 0;
  3400. has_next = 1;
  3401. switch (ap->hsm_task_state) {
  3402. case HSM_ST_FIRST:
  3403. has_next = ata_pio_first_block(ap);
  3404. break;
  3405. case HSM_ST:
  3406. ata_pio_block(ap);
  3407. break;
  3408. case HSM_ST_LAST:
  3409. has_next = ata_pio_complete(ap);
  3410. break;
  3411. case HSM_ST_POLL:
  3412. case HSM_ST_LAST_POLL:
  3413. timeout = ata_pio_poll(ap);
  3414. break;
  3415. case HSM_ST_TMOUT:
  3416. case HSM_ST_ERR:
  3417. ata_pio_error(ap);
  3418. return;
  3419. default:
  3420. BUG();
  3421. return;
  3422. }
  3423. if (timeout)
  3424. ata_port_queue_task(ap, ata_pio_task, ap, timeout);
  3425. else if (has_next)
  3426. goto fsm_start;
  3427. }
  3428. /**
  3429. * ata_qc_timeout - Handle timeout of queued command
  3430. * @qc: Command that timed out
  3431. *
  3432. * Some part of the kernel (currently, only the SCSI layer)
  3433. * has noticed that the active command on port @ap has not
  3434. * completed after a specified length of time. Handle this
  3435. * condition by disabling DMA (if necessary) and completing
  3436. * transactions, with error if necessary.
  3437. *
  3438. * This also handles the case of the "lost interrupt", where
  3439. * for some reason (possibly hardware bug, possibly driver bug)
  3440. * an interrupt was not delivered to the driver, even though the
  3441. * transaction completed successfully.
  3442. *
  3443. * LOCKING:
  3444. * Inherited from SCSI layer (none, can sleep)
  3445. */
  3446. static void ata_qc_timeout(struct ata_queued_cmd *qc)
  3447. {
  3448. struct ata_port *ap = qc->ap;
  3449. struct ata_host_set *host_set = ap->host_set;
  3450. u8 host_stat = 0, drv_stat;
  3451. unsigned long flags;
  3452. DPRINTK("ENTER\n");
  3453. ap->hsm_task_state = HSM_ST_IDLE;
  3454. spin_lock_irqsave(&host_set->lock, flags);
  3455. switch (qc->tf.protocol) {
  3456. case ATA_PROT_DMA:
  3457. case ATA_PROT_ATAPI_DMA:
  3458. host_stat = ap->ops->bmdma_status(ap);
  3459. /* before we do anything else, clear DMA-Start bit */
  3460. ap->ops->bmdma_stop(qc);
  3461. /* fall through */
  3462. default:
  3463. ata_altstatus(ap);
  3464. drv_stat = ata_chk_status(ap);
  3465. /* ack bmdma irq events */
  3466. ap->ops->irq_clear(ap);
  3467. printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
  3468. ap->id, qc->tf.command, drv_stat, host_stat);
  3469. ap->hsm_task_state = HSM_ST_IDLE;
  3470. /* complete taskfile transaction */
  3471. qc->err_mask |= AC_ERR_TIMEOUT;
  3472. break;
  3473. }
  3474. spin_unlock_irqrestore(&host_set->lock, flags);
  3475. ata_eh_qc_complete(qc);
  3476. DPRINTK("EXIT\n");
  3477. }
  3478. /**
  3479. * ata_eng_timeout - Handle timeout of queued command
  3480. * @ap: Port on which timed-out command is active
  3481. *
  3482. * Some part of the kernel (currently, only the SCSI layer)
  3483. * has noticed that the active command on port @ap has not
  3484. * completed after a specified length of time. Handle this
  3485. * condition by disabling DMA (if necessary) and completing
  3486. * transactions, with error if necessary.
  3487. *
  3488. * This also handles the case of the "lost interrupt", where
  3489. * for some reason (possibly hardware bug, possibly driver bug)
  3490. * an interrupt was not delivered to the driver, even though the
  3491. * transaction completed successfully.
  3492. *
  3493. * LOCKING:
  3494. * Inherited from SCSI layer (none, can sleep)
  3495. */
  3496. void ata_eng_timeout(struct ata_port *ap)
  3497. {
  3498. DPRINTK("ENTER\n");
  3499. ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
  3500. DPRINTK("EXIT\n");
  3501. }
  3502. /**
  3503. * ata_qc_new - Request an available ATA command, for queueing
  3504. * @ap: Port associated with device @dev
  3505. * @dev: Device from whom we request an available command structure
  3506. *
  3507. * LOCKING:
  3508. * None.
  3509. */
  3510. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  3511. {
  3512. struct ata_queued_cmd *qc = NULL;
  3513. unsigned int i;
  3514. for (i = 0; i < ATA_MAX_QUEUE; i++)
  3515. if (!test_and_set_bit(i, &ap->qactive)) {
  3516. qc = ata_qc_from_tag(ap, i);
  3517. break;
  3518. }
  3519. if (qc)
  3520. qc->tag = i;
  3521. return qc;
  3522. }
  3523. /**
  3524. * ata_qc_new_init - Request an available ATA command, and initialize it
  3525. * @ap: Port associated with device @dev
  3526. * @dev: Device from whom we request an available command structure
  3527. *
  3528. * LOCKING:
  3529. * None.
  3530. */
  3531. struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
  3532. struct ata_device *dev)
  3533. {
  3534. struct ata_queued_cmd *qc;
  3535. qc = ata_qc_new(ap);
  3536. if (qc) {
  3537. qc->scsicmd = NULL;
  3538. qc->ap = ap;
  3539. qc->dev = dev;
  3540. ata_qc_reinit(qc);
  3541. }
  3542. return qc;
  3543. }
  3544. /**
  3545. * ata_qc_free - free unused ata_queued_cmd
  3546. * @qc: Command to complete
  3547. *
  3548. * Designed to free unused ata_queued_cmd object
  3549. * in case something prevents using it.
  3550. *
  3551. * LOCKING:
  3552. * spin_lock_irqsave(host_set lock)
  3553. */
  3554. void ata_qc_free(struct ata_queued_cmd *qc)
  3555. {
  3556. struct ata_port *ap = qc->ap;
  3557. unsigned int tag;
  3558. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3559. qc->flags = 0;
  3560. tag = qc->tag;
  3561. if (likely(ata_tag_valid(tag))) {
  3562. if (tag == ap->active_tag)
  3563. ap->active_tag = ATA_TAG_POISON;
  3564. qc->tag = ATA_TAG_POISON;
  3565. clear_bit(tag, &ap->qactive);
  3566. }
  3567. }
  3568. void __ata_qc_complete(struct ata_queued_cmd *qc)
  3569. {
  3570. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3571. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  3572. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  3573. ata_sg_clean(qc);
  3574. /* atapi: mark qc as inactive to prevent the interrupt handler
  3575. * from completing the command twice later, before the error handler
  3576. * is called. (when rc != 0 and atapi request sense is needed)
  3577. */
  3578. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  3579. /* call completion callback */
  3580. qc->complete_fn(qc);
  3581. }
  3582. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  3583. {
  3584. struct ata_port *ap = qc->ap;
  3585. switch (qc->tf.protocol) {
  3586. case ATA_PROT_DMA:
  3587. case ATA_PROT_ATAPI_DMA:
  3588. return 1;
  3589. case ATA_PROT_ATAPI:
  3590. case ATA_PROT_PIO:
  3591. if (ap->flags & ATA_FLAG_PIO_DMA)
  3592. return 1;
  3593. /* fall through */
  3594. default:
  3595. return 0;
  3596. }
  3597. /* never reached */
  3598. }
  3599. /**
  3600. * ata_qc_issue - issue taskfile to device
  3601. * @qc: command to issue to device
  3602. *
  3603. * Prepare an ATA command to submission to device.
  3604. * This includes mapping the data into a DMA-able
  3605. * area, filling in the S/G table, and finally
  3606. * writing the taskfile to hardware, starting the command.
  3607. *
  3608. * LOCKING:
  3609. * spin_lock_irqsave(host_set lock)
  3610. *
  3611. * RETURNS:
  3612. * Zero on success, AC_ERR_* mask on failure
  3613. */
  3614. unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
  3615. {
  3616. struct ata_port *ap = qc->ap;
  3617. if (ata_should_dma_map(qc)) {
  3618. if (qc->flags & ATA_QCFLAG_SG) {
  3619. if (ata_sg_setup(qc))
  3620. goto sg_err;
  3621. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  3622. if (ata_sg_setup_one(qc))
  3623. goto sg_err;
  3624. }
  3625. } else {
  3626. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3627. }
  3628. ap->ops->qc_prep(qc);
  3629. qc->ap->active_tag = qc->tag;
  3630. qc->flags |= ATA_QCFLAG_ACTIVE;
  3631. return ap->ops->qc_issue(qc);
  3632. sg_err:
  3633. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3634. return AC_ERR_SYSTEM;
  3635. }
  3636. /**
  3637. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  3638. * @qc: command to issue to device
  3639. *
  3640. * Using various libata functions and hooks, this function
  3641. * starts an ATA command. ATA commands are grouped into
  3642. * classes called "protocols", and issuing each type of protocol
  3643. * is slightly different.
  3644. *
  3645. * May be used as the qc_issue() entry in ata_port_operations.
  3646. *
  3647. * LOCKING:
  3648. * spin_lock_irqsave(host_set lock)
  3649. *
  3650. * RETURNS:
  3651. * Zero on success, AC_ERR_* mask on failure
  3652. */
  3653. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  3654. {
  3655. struct ata_port *ap = qc->ap;
  3656. /* Use polling pio if the LLD doesn't handle
  3657. * interrupt driven pio and atapi CDB interrupt.
  3658. */
  3659. if (ap->flags & ATA_FLAG_PIO_POLLING) {
  3660. switch (qc->tf.protocol) {
  3661. case ATA_PROT_PIO:
  3662. case ATA_PROT_ATAPI:
  3663. case ATA_PROT_ATAPI_NODATA:
  3664. qc->tf.flags |= ATA_TFLAG_POLLING;
  3665. break;
  3666. case ATA_PROT_ATAPI_DMA:
  3667. if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
  3668. BUG();
  3669. break;
  3670. default:
  3671. break;
  3672. }
  3673. }
  3674. /* select the device */
  3675. ata_dev_select(ap, qc->dev->devno, 1, 0);
  3676. /* start the command */
  3677. switch (qc->tf.protocol) {
  3678. case ATA_PROT_NODATA:
  3679. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3680. ata_qc_set_polling(qc);
  3681. ata_tf_to_host(ap, &qc->tf);
  3682. ap->hsm_task_state = HSM_ST_LAST;
  3683. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3684. ata_port_queue_task(ap, ata_pio_task, ap, 0);
  3685. break;
  3686. case ATA_PROT_DMA:
  3687. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3688. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3689. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3690. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3691. ap->hsm_task_state = HSM_ST_LAST;
  3692. break;
  3693. case ATA_PROT_PIO:
  3694. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3695. ata_qc_set_polling(qc);
  3696. ata_tf_to_host(ap, &qc->tf);
  3697. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  3698. /* PIO data out protocol */
  3699. ap->hsm_task_state = HSM_ST_FIRST;
  3700. ata_port_queue_task(ap, ata_pio_task, ap, 0);
  3701. /* always send first data block using
  3702. * the ata_pio_task() codepath.
  3703. */
  3704. } else {
  3705. /* PIO data in protocol */
  3706. ap->hsm_task_state = HSM_ST;
  3707. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3708. ata_port_queue_task(ap, ata_pio_task, ap, 0);
  3709. /* if polling, ata_pio_task() handles the rest.
  3710. * otherwise, interrupt handler takes over from here.
  3711. */
  3712. }
  3713. break;
  3714. case ATA_PROT_ATAPI:
  3715. case ATA_PROT_ATAPI_NODATA:
  3716. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3717. ata_qc_set_polling(qc);
  3718. ata_tf_to_host(ap, &qc->tf);
  3719. ap->hsm_task_state = HSM_ST_FIRST;
  3720. /* send cdb by polling if no cdb interrupt */
  3721. if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
  3722. (qc->tf.flags & ATA_TFLAG_POLLING))
  3723. ata_port_queue_task(ap, ata_pio_task, ap, 0);
  3724. break;
  3725. case ATA_PROT_ATAPI_DMA:
  3726. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3727. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3728. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3729. ap->hsm_task_state = HSM_ST_FIRST;
  3730. /* send cdb by polling if no cdb interrupt */
  3731. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3732. ata_port_queue_task(ap, ata_pio_task, ap, 0);
  3733. break;
  3734. default:
  3735. WARN_ON(1);
  3736. return AC_ERR_SYSTEM;
  3737. }
  3738. return 0;
  3739. }
  3740. /**
  3741. * ata_host_intr - Handle host interrupt for given (port, task)
  3742. * @ap: Port on which interrupt arrived (possibly...)
  3743. * @qc: Taskfile currently active in engine
  3744. *
  3745. * Handle host interrupt for given queued command. Currently,
  3746. * only DMA interrupts are handled. All other commands are
  3747. * handled via polling with interrupts disabled (nIEN bit).
  3748. *
  3749. * LOCKING:
  3750. * spin_lock_irqsave(host_set lock)
  3751. *
  3752. * RETURNS:
  3753. * One if interrupt was handled, zero if not (shared irq).
  3754. */
  3755. inline unsigned int ata_host_intr (struct ata_port *ap,
  3756. struct ata_queued_cmd *qc)
  3757. {
  3758. u8 status, host_stat = 0;
  3759. VPRINTK("ata%u: protocol %d task_state %d\n",
  3760. ap->id, qc->tf.protocol, ap->hsm_task_state);
  3761. /* Check whether we are expecting interrupt in this state */
  3762. switch (ap->hsm_task_state) {
  3763. case HSM_ST_FIRST:
  3764. /* Some pre-ATAPI-4 devices assert INTRQ
  3765. * at this state when ready to receive CDB.
  3766. */
  3767. /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
  3768. * The flag was turned on only for atapi devices.
  3769. * No need to check is_atapi_taskfile(&qc->tf) again.
  3770. */
  3771. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3772. goto idle_irq;
  3773. break;
  3774. case HSM_ST_LAST:
  3775. if (qc->tf.protocol == ATA_PROT_DMA ||
  3776. qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
  3777. /* check status of DMA engine */
  3778. host_stat = ap->ops->bmdma_status(ap);
  3779. VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
  3780. /* if it's not our irq... */
  3781. if (!(host_stat & ATA_DMA_INTR))
  3782. goto idle_irq;
  3783. /* before we do anything else, clear DMA-Start bit */
  3784. ap->ops->bmdma_stop(qc);
  3785. if (unlikely(host_stat & ATA_DMA_ERR)) {
  3786. /* error when transfering data to/from memory */
  3787. qc->err_mask |= AC_ERR_HOST_BUS;
  3788. ap->hsm_task_state = HSM_ST_ERR;
  3789. }
  3790. }
  3791. break;
  3792. case HSM_ST:
  3793. break;
  3794. default:
  3795. goto idle_irq;
  3796. }
  3797. /* check altstatus */
  3798. status = ata_altstatus(ap);
  3799. if (status & ATA_BUSY)
  3800. goto idle_irq;
  3801. /* check main status, clearing INTRQ */
  3802. status = ata_chk_status(ap);
  3803. if (unlikely(status & ATA_BUSY))
  3804. goto idle_irq;
  3805. DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
  3806. ap->id, qc->tf.protocol, ap->hsm_task_state, status);
  3807. /* ack bmdma irq events */
  3808. ap->ops->irq_clear(ap);
  3809. ata_hsm_move(ap, qc, status, 0);
  3810. return 1; /* irq handled */
  3811. idle_irq:
  3812. ap->stats.idle_irq++;
  3813. #ifdef ATA_IRQ_TRAP
  3814. if ((ap->stats.idle_irq % 1000) == 0) {
  3815. ata_irq_ack(ap, 0); /* debug trap */
  3816. printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
  3817. return 1;
  3818. }
  3819. #endif
  3820. return 0; /* irq not handled */
  3821. }
  3822. /**
  3823. * ata_interrupt - Default ATA host interrupt handler
  3824. * @irq: irq line (unused)
  3825. * @dev_instance: pointer to our ata_host_set information structure
  3826. * @regs: unused
  3827. *
  3828. * Default interrupt handler for PCI IDE devices. Calls
  3829. * ata_host_intr() for each port that is not disabled.
  3830. *
  3831. * LOCKING:
  3832. * Obtains host_set lock during operation.
  3833. *
  3834. * RETURNS:
  3835. * IRQ_NONE or IRQ_HANDLED.
  3836. */
  3837. irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
  3838. {
  3839. struct ata_host_set *host_set = dev_instance;
  3840. unsigned int i;
  3841. unsigned int handled = 0;
  3842. unsigned long flags;
  3843. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  3844. spin_lock_irqsave(&host_set->lock, flags);
  3845. for (i = 0; i < host_set->n_ports; i++) {
  3846. struct ata_port *ap;
  3847. ap = host_set->ports[i];
  3848. if (ap &&
  3849. !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
  3850. struct ata_queued_cmd *qc;
  3851. qc = ata_qc_from_tag(ap, ap->active_tag);
  3852. if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
  3853. (qc->flags & ATA_QCFLAG_ACTIVE))
  3854. handled |= ata_host_intr(ap, qc);
  3855. }
  3856. }
  3857. spin_unlock_irqrestore(&host_set->lock, flags);
  3858. return IRQ_RETVAL(handled);
  3859. }
  3860. /*
  3861. * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
  3862. * without filling any other registers
  3863. */
  3864. static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
  3865. u8 cmd)
  3866. {
  3867. struct ata_taskfile tf;
  3868. int err;
  3869. ata_tf_init(ap, &tf, dev->devno);
  3870. tf.command = cmd;
  3871. tf.flags |= ATA_TFLAG_DEVICE;
  3872. tf.protocol = ATA_PROT_NODATA;
  3873. err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
  3874. if (err)
  3875. printk(KERN_ERR "%s: ata command failed: %d\n",
  3876. __FUNCTION__, err);
  3877. return err;
  3878. }
  3879. static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
  3880. {
  3881. u8 cmd;
  3882. if (!ata_try_flush_cache(dev))
  3883. return 0;
  3884. if (ata_id_has_flush_ext(dev->id))
  3885. cmd = ATA_CMD_FLUSH_EXT;
  3886. else
  3887. cmd = ATA_CMD_FLUSH;
  3888. return ata_do_simple_cmd(ap, dev, cmd);
  3889. }
  3890. static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
  3891. {
  3892. return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
  3893. }
  3894. static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
  3895. {
  3896. return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
  3897. }
  3898. /**
  3899. * ata_device_resume - wakeup a previously suspended devices
  3900. * @ap: port the device is connected to
  3901. * @dev: the device to resume
  3902. *
  3903. * Kick the drive back into action, by sending it an idle immediate
  3904. * command and making sure its transfer mode matches between drive
  3905. * and host.
  3906. *
  3907. */
  3908. int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
  3909. {
  3910. if (ap->flags & ATA_FLAG_SUSPENDED) {
  3911. ap->flags &= ~ATA_FLAG_SUSPENDED;
  3912. ata_set_mode(ap);
  3913. }
  3914. if (!ata_dev_present(dev))
  3915. return 0;
  3916. if (dev->class == ATA_DEV_ATA)
  3917. ata_start_drive(ap, dev);
  3918. return 0;
  3919. }
  3920. /**
  3921. * ata_device_suspend - prepare a device for suspend
  3922. * @ap: port the device is connected to
  3923. * @dev: the device to suspend
  3924. *
  3925. * Flush the cache on the drive, if appropriate, then issue a
  3926. * standbynow command.
  3927. */
  3928. int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
  3929. {
  3930. if (!ata_dev_present(dev))
  3931. return 0;
  3932. if (dev->class == ATA_DEV_ATA)
  3933. ata_flush_cache(ap, dev);
  3934. if (state.event != PM_EVENT_FREEZE)
  3935. ata_standby_drive(ap, dev);
  3936. ap->flags |= ATA_FLAG_SUSPENDED;
  3937. return 0;
  3938. }
  3939. /**
  3940. * ata_port_start - Set port up for dma.
  3941. * @ap: Port to initialize
  3942. *
  3943. * Called just after data structures for each port are
  3944. * initialized. Allocates space for PRD table.
  3945. *
  3946. * May be used as the port_start() entry in ata_port_operations.
  3947. *
  3948. * LOCKING:
  3949. * Inherited from caller.
  3950. */
  3951. int ata_port_start (struct ata_port *ap)
  3952. {
  3953. struct device *dev = ap->dev;
  3954. int rc;
  3955. ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
  3956. if (!ap->prd)
  3957. return -ENOMEM;
  3958. rc = ata_pad_alloc(ap, dev);
  3959. if (rc) {
  3960. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  3961. return rc;
  3962. }
  3963. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
  3964. return 0;
  3965. }
  3966. /**
  3967. * ata_port_stop - Undo ata_port_start()
  3968. * @ap: Port to shut down
  3969. *
  3970. * Frees the PRD table.
  3971. *
  3972. * May be used as the port_stop() entry in ata_port_operations.
  3973. *
  3974. * LOCKING:
  3975. * Inherited from caller.
  3976. */
  3977. void ata_port_stop (struct ata_port *ap)
  3978. {
  3979. struct device *dev = ap->dev;
  3980. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  3981. ata_pad_free(ap, dev);
  3982. }
  3983. void ata_host_stop (struct ata_host_set *host_set)
  3984. {
  3985. if (host_set->mmio_base)
  3986. iounmap(host_set->mmio_base);
  3987. }
  3988. /**
  3989. * ata_host_remove - Unregister SCSI host structure with upper layers
  3990. * @ap: Port to unregister
  3991. * @do_unregister: 1 if we fully unregister, 0 to just stop the port
  3992. *
  3993. * LOCKING:
  3994. * Inherited from caller.
  3995. */
  3996. static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
  3997. {
  3998. struct Scsi_Host *sh = ap->host;
  3999. DPRINTK("ENTER\n");
  4000. if (do_unregister)
  4001. scsi_remove_host(sh);
  4002. ap->ops->port_stop(ap);
  4003. }
  4004. /**
  4005. * ata_host_init - Initialize an ata_port structure
  4006. * @ap: Structure to initialize
  4007. * @host: associated SCSI mid-layer structure
  4008. * @host_set: Collection of hosts to which @ap belongs
  4009. * @ent: Probe information provided by low-level driver
  4010. * @port_no: Port number associated with this ata_port
  4011. *
  4012. * Initialize a new ata_port structure, and its associated
  4013. * scsi_host.
  4014. *
  4015. * LOCKING:
  4016. * Inherited from caller.
  4017. */
  4018. static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
  4019. struct ata_host_set *host_set,
  4020. const struct ata_probe_ent *ent, unsigned int port_no)
  4021. {
  4022. unsigned int i;
  4023. host->max_id = 16;
  4024. host->max_lun = 1;
  4025. host->max_channel = 1;
  4026. host->unique_id = ata_unique_id++;
  4027. host->max_cmd_len = 12;
  4028. ap->flags = ATA_FLAG_PORT_DISABLED;
  4029. ap->id = host->unique_id;
  4030. ap->host = host;
  4031. ap->ctl = ATA_DEVCTL_OBS;
  4032. ap->host_set = host_set;
  4033. ap->dev = ent->dev;
  4034. ap->port_no = port_no;
  4035. ap->hard_port_no =
  4036. ent->legacy_mode ? ent->hard_port_no : port_no;
  4037. ap->pio_mask = ent->pio_mask;
  4038. ap->mwdma_mask = ent->mwdma_mask;
  4039. ap->udma_mask = ent->udma_mask;
  4040. ap->flags |= ent->host_flags;
  4041. ap->ops = ent->port_ops;
  4042. ap->cbl = ATA_CBL_NONE;
  4043. ap->active_tag = ATA_TAG_POISON;
  4044. ap->last_ctl = 0xFF;
  4045. INIT_WORK(&ap->port_task, NULL, NULL);
  4046. INIT_LIST_HEAD(&ap->eh_done_q);
  4047. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  4048. struct ata_device *dev = &ap->device[i];
  4049. dev->devno = i;
  4050. dev->pio_mask = UINT_MAX;
  4051. dev->mwdma_mask = UINT_MAX;
  4052. dev->udma_mask = UINT_MAX;
  4053. }
  4054. #ifdef ATA_IRQ_TRAP
  4055. ap->stats.unhandled_irq = 1;
  4056. ap->stats.idle_irq = 1;
  4057. #endif
  4058. memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
  4059. }
  4060. /**
  4061. * ata_host_add - Attach low-level ATA driver to system
  4062. * @ent: Information provided by low-level driver
  4063. * @host_set: Collections of ports to which we add
  4064. * @port_no: Port number associated with this host
  4065. *
  4066. * Attach low-level ATA driver to system.
  4067. *
  4068. * LOCKING:
  4069. * PCI/etc. bus probe sem.
  4070. *
  4071. * RETURNS:
  4072. * New ata_port on success, for NULL on error.
  4073. */
  4074. static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
  4075. struct ata_host_set *host_set,
  4076. unsigned int port_no)
  4077. {
  4078. struct Scsi_Host *host;
  4079. struct ata_port *ap;
  4080. int rc;
  4081. DPRINTK("ENTER\n");
  4082. if (!ent->port_ops->probe_reset &&
  4083. !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
  4084. printk(KERN_ERR "ata%u: no reset mechanism available\n",
  4085. port_no);
  4086. return NULL;
  4087. }
  4088. host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
  4089. if (!host)
  4090. return NULL;
  4091. host->transportt = &ata_scsi_transport_template;
  4092. ap = (struct ata_port *) &host->hostdata[0];
  4093. ata_host_init(ap, host, host_set, ent, port_no);
  4094. rc = ap->ops->port_start(ap);
  4095. if (rc)
  4096. goto err_out;
  4097. return ap;
  4098. err_out:
  4099. scsi_host_put(host);
  4100. return NULL;
  4101. }
  4102. /**
  4103. * ata_device_add - Register hardware device with ATA and SCSI layers
  4104. * @ent: Probe information describing hardware device to be registered
  4105. *
  4106. * This function processes the information provided in the probe
  4107. * information struct @ent, allocates the necessary ATA and SCSI
  4108. * host information structures, initializes them, and registers
  4109. * everything with requisite kernel subsystems.
  4110. *
  4111. * This function requests irqs, probes the ATA bus, and probes
  4112. * the SCSI bus.
  4113. *
  4114. * LOCKING:
  4115. * PCI/etc. bus probe sem.
  4116. *
  4117. * RETURNS:
  4118. * Number of ports registered. Zero on error (no ports registered).
  4119. */
  4120. int ata_device_add(const struct ata_probe_ent *ent)
  4121. {
  4122. unsigned int count = 0, i;
  4123. struct device *dev = ent->dev;
  4124. struct ata_host_set *host_set;
  4125. DPRINTK("ENTER\n");
  4126. /* alloc a container for our list of ATA ports (buses) */
  4127. host_set = kzalloc(sizeof(struct ata_host_set) +
  4128. (ent->n_ports * sizeof(void *)), GFP_KERNEL);
  4129. if (!host_set)
  4130. return 0;
  4131. spin_lock_init(&host_set->lock);
  4132. host_set->dev = dev;
  4133. host_set->n_ports = ent->n_ports;
  4134. host_set->irq = ent->irq;
  4135. host_set->mmio_base = ent->mmio_base;
  4136. host_set->private_data = ent->private_data;
  4137. host_set->ops = ent->port_ops;
  4138. /* register each port bound to this device */
  4139. for (i = 0; i < ent->n_ports; i++) {
  4140. struct ata_port *ap;
  4141. unsigned long xfer_mode_mask;
  4142. ap = ata_host_add(ent, host_set, i);
  4143. if (!ap)
  4144. goto err_out;
  4145. host_set->ports[i] = ap;
  4146. xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
  4147. (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
  4148. (ap->pio_mask << ATA_SHIFT_PIO);
  4149. /* print per-port info to dmesg */
  4150. printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
  4151. "bmdma 0x%lX irq %lu\n",
  4152. ap->id,
  4153. ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
  4154. ata_mode_string(xfer_mode_mask),
  4155. ap->ioaddr.cmd_addr,
  4156. ap->ioaddr.ctl_addr,
  4157. ap->ioaddr.bmdma_addr,
  4158. ent->irq);
  4159. ata_chk_status(ap);
  4160. host_set->ops->irq_clear(ap);
  4161. count++;
  4162. }
  4163. if (!count)
  4164. goto err_free_ret;
  4165. /* obtain irq, that is shared between channels */
  4166. if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
  4167. DRV_NAME, host_set))
  4168. goto err_out;
  4169. /* perform each probe synchronously */
  4170. DPRINTK("probe begin\n");
  4171. for (i = 0; i < count; i++) {
  4172. struct ata_port *ap;
  4173. int rc;
  4174. ap = host_set->ports[i];
  4175. DPRINTK("ata%u: bus probe begin\n", ap->id);
  4176. rc = ata_bus_probe(ap);
  4177. DPRINTK("ata%u: bus probe end\n", ap->id);
  4178. if (rc) {
  4179. /* FIXME: do something useful here?
  4180. * Current libata behavior will
  4181. * tear down everything when
  4182. * the module is removed
  4183. * or the h/w is unplugged.
  4184. */
  4185. }
  4186. rc = scsi_add_host(ap->host, dev);
  4187. if (rc) {
  4188. printk(KERN_ERR "ata%u: scsi_add_host failed\n",
  4189. ap->id);
  4190. /* FIXME: do something useful here */
  4191. /* FIXME: handle unconditional calls to
  4192. * scsi_scan_host and ata_host_remove, below,
  4193. * at the very least
  4194. */
  4195. }
  4196. }
  4197. /* probes are done, now scan each port's disk(s) */
  4198. DPRINTK("host probe begin\n");
  4199. for (i = 0; i < count; i++) {
  4200. struct ata_port *ap = host_set->ports[i];
  4201. ata_scsi_scan_host(ap);
  4202. }
  4203. dev_set_drvdata(dev, host_set);
  4204. VPRINTK("EXIT, returning %u\n", ent->n_ports);
  4205. return ent->n_ports; /* success */
  4206. err_out:
  4207. for (i = 0; i < count; i++) {
  4208. ata_host_remove(host_set->ports[i], 1);
  4209. scsi_host_put(host_set->ports[i]->host);
  4210. }
  4211. err_free_ret:
  4212. kfree(host_set);
  4213. VPRINTK("EXIT, returning 0\n");
  4214. return 0;
  4215. }
  4216. /**
  4217. * ata_host_set_remove - PCI layer callback for device removal
  4218. * @host_set: ATA host set that was removed
  4219. *
  4220. * Unregister all objects associated with this host set. Free those
  4221. * objects.
  4222. *
  4223. * LOCKING:
  4224. * Inherited from calling layer (may sleep).
  4225. */
  4226. void ata_host_set_remove(struct ata_host_set *host_set)
  4227. {
  4228. struct ata_port *ap;
  4229. unsigned int i;
  4230. for (i = 0; i < host_set->n_ports; i++) {
  4231. ap = host_set->ports[i];
  4232. scsi_remove_host(ap->host);
  4233. }
  4234. free_irq(host_set->irq, host_set);
  4235. for (i = 0; i < host_set->n_ports; i++) {
  4236. ap = host_set->ports[i];
  4237. ata_scsi_release(ap->host);
  4238. if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
  4239. struct ata_ioports *ioaddr = &ap->ioaddr;
  4240. if (ioaddr->cmd_addr == 0x1f0)
  4241. release_region(0x1f0, 8);
  4242. else if (ioaddr->cmd_addr == 0x170)
  4243. release_region(0x170, 8);
  4244. }
  4245. scsi_host_put(ap->host);
  4246. }
  4247. if (host_set->ops->host_stop)
  4248. host_set->ops->host_stop(host_set);
  4249. kfree(host_set);
  4250. }
  4251. /**
  4252. * ata_scsi_release - SCSI layer callback hook for host unload
  4253. * @host: libata host to be unloaded
  4254. *
  4255. * Performs all duties necessary to shut down a libata port...
  4256. * Kill port kthread, disable port, and release resources.
  4257. *
  4258. * LOCKING:
  4259. * Inherited from SCSI layer.
  4260. *
  4261. * RETURNS:
  4262. * One.
  4263. */
  4264. int ata_scsi_release(struct Scsi_Host *host)
  4265. {
  4266. struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
  4267. int i;
  4268. DPRINTK("ENTER\n");
  4269. ap->ops->port_disable(ap);
  4270. ata_host_remove(ap, 0);
  4271. for (i = 0; i < ATA_MAX_DEVICES; i++)
  4272. kfree(ap->device[i].id);
  4273. DPRINTK("EXIT\n");
  4274. return 1;
  4275. }
  4276. /**
  4277. * ata_std_ports - initialize ioaddr with standard port offsets.
  4278. * @ioaddr: IO address structure to be initialized
  4279. *
  4280. * Utility function which initializes data_addr, error_addr,
  4281. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  4282. * device_addr, status_addr, and command_addr to standard offsets
  4283. * relative to cmd_addr.
  4284. *
  4285. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  4286. */
  4287. void ata_std_ports(struct ata_ioports *ioaddr)
  4288. {
  4289. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  4290. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  4291. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  4292. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  4293. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  4294. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  4295. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  4296. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  4297. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  4298. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  4299. }
  4300. #ifdef CONFIG_PCI
  4301. void ata_pci_host_stop (struct ata_host_set *host_set)
  4302. {
  4303. struct pci_dev *pdev = to_pci_dev(host_set->dev);
  4304. pci_iounmap(pdev, host_set->mmio_base);
  4305. }
  4306. /**
  4307. * ata_pci_remove_one - PCI layer callback for device removal
  4308. * @pdev: PCI device that was removed
  4309. *
  4310. * PCI layer indicates to libata via this hook that
  4311. * hot-unplug or module unload event has occurred.
  4312. * Handle this by unregistering all objects associated
  4313. * with this PCI device. Free those objects. Then finally
  4314. * release PCI resources and disable device.
  4315. *
  4316. * LOCKING:
  4317. * Inherited from PCI layer (may sleep).
  4318. */
  4319. void ata_pci_remove_one (struct pci_dev *pdev)
  4320. {
  4321. struct device *dev = pci_dev_to_dev(pdev);
  4322. struct ata_host_set *host_set = dev_get_drvdata(dev);
  4323. ata_host_set_remove(host_set);
  4324. pci_release_regions(pdev);
  4325. pci_disable_device(pdev);
  4326. dev_set_drvdata(dev, NULL);
  4327. }
  4328. /* move to PCI subsystem */
  4329. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  4330. {
  4331. unsigned long tmp = 0;
  4332. switch (bits->width) {
  4333. case 1: {
  4334. u8 tmp8 = 0;
  4335. pci_read_config_byte(pdev, bits->reg, &tmp8);
  4336. tmp = tmp8;
  4337. break;
  4338. }
  4339. case 2: {
  4340. u16 tmp16 = 0;
  4341. pci_read_config_word(pdev, bits->reg, &tmp16);
  4342. tmp = tmp16;
  4343. break;
  4344. }
  4345. case 4: {
  4346. u32 tmp32 = 0;
  4347. pci_read_config_dword(pdev, bits->reg, &tmp32);
  4348. tmp = tmp32;
  4349. break;
  4350. }
  4351. default:
  4352. return -EINVAL;
  4353. }
  4354. tmp &= bits->mask;
  4355. return (tmp == bits->val) ? 1 : 0;
  4356. }
  4357. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
  4358. {
  4359. pci_save_state(pdev);
  4360. pci_disable_device(pdev);
  4361. pci_set_power_state(pdev, PCI_D3hot);
  4362. return 0;
  4363. }
  4364. int ata_pci_device_resume(struct pci_dev *pdev)
  4365. {
  4366. pci_set_power_state(pdev, PCI_D0);
  4367. pci_restore_state(pdev);
  4368. pci_enable_device(pdev);
  4369. pci_set_master(pdev);
  4370. return 0;
  4371. }
  4372. #endif /* CONFIG_PCI */
  4373. static int __init ata_init(void)
  4374. {
  4375. ata_wq = create_workqueue("ata");
  4376. if (!ata_wq)
  4377. return -ENOMEM;
  4378. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  4379. return 0;
  4380. }
  4381. static void __exit ata_exit(void)
  4382. {
  4383. destroy_workqueue(ata_wq);
  4384. }
  4385. module_init(ata_init);
  4386. module_exit(ata_exit);
  4387. static unsigned long ratelimit_time;
  4388. static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
  4389. int ata_ratelimit(void)
  4390. {
  4391. int rc;
  4392. unsigned long flags;
  4393. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  4394. if (time_after(jiffies, ratelimit_time)) {
  4395. rc = 1;
  4396. ratelimit_time = jiffies + (HZ/5);
  4397. } else
  4398. rc = 0;
  4399. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  4400. return rc;
  4401. }
  4402. /*
  4403. * libata is essentially a library of internal helper functions for
  4404. * low-level ATA host controller drivers. As such, the API/ABI is
  4405. * likely to change as new drivers are added and updated.
  4406. * Do not depend on ABI/API stability.
  4407. */
  4408. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  4409. EXPORT_SYMBOL_GPL(ata_std_ports);
  4410. EXPORT_SYMBOL_GPL(ata_device_add);
  4411. EXPORT_SYMBOL_GPL(ata_host_set_remove);
  4412. EXPORT_SYMBOL_GPL(ata_sg_init);
  4413. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  4414. EXPORT_SYMBOL_GPL(__ata_qc_complete);
  4415. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  4416. EXPORT_SYMBOL_GPL(ata_eng_timeout);
  4417. EXPORT_SYMBOL_GPL(ata_tf_load);
  4418. EXPORT_SYMBOL_GPL(ata_tf_read);
  4419. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  4420. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  4421. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  4422. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  4423. EXPORT_SYMBOL_GPL(ata_check_status);
  4424. EXPORT_SYMBOL_GPL(ata_altstatus);
  4425. EXPORT_SYMBOL_GPL(ata_exec_command);
  4426. EXPORT_SYMBOL_GPL(ata_port_start);
  4427. EXPORT_SYMBOL_GPL(ata_port_stop);
  4428. EXPORT_SYMBOL_GPL(ata_host_stop);
  4429. EXPORT_SYMBOL_GPL(ata_interrupt);
  4430. EXPORT_SYMBOL_GPL(ata_qc_prep);
  4431. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  4432. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  4433. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  4434. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  4435. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  4436. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  4437. EXPORT_SYMBOL_GPL(ata_port_probe);
  4438. EXPORT_SYMBOL_GPL(sata_phy_reset);
  4439. EXPORT_SYMBOL_GPL(__sata_phy_reset);
  4440. EXPORT_SYMBOL_GPL(ata_bus_reset);
  4441. EXPORT_SYMBOL_GPL(ata_std_probeinit);
  4442. EXPORT_SYMBOL_GPL(ata_std_softreset);
  4443. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  4444. EXPORT_SYMBOL_GPL(ata_std_postreset);
  4445. EXPORT_SYMBOL_GPL(ata_std_probe_reset);
  4446. EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
  4447. EXPORT_SYMBOL_GPL(ata_dev_revalidate);
  4448. EXPORT_SYMBOL_GPL(ata_dev_classify);
  4449. EXPORT_SYMBOL_GPL(ata_dev_pair);
  4450. EXPORT_SYMBOL_GPL(ata_port_disable);
  4451. EXPORT_SYMBOL_GPL(ata_ratelimit);
  4452. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  4453. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  4454. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  4455. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  4456. EXPORT_SYMBOL_GPL(ata_scsi_error);
  4457. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  4458. EXPORT_SYMBOL_GPL(ata_scsi_release);
  4459. EXPORT_SYMBOL_GPL(ata_host_intr);
  4460. EXPORT_SYMBOL_GPL(ata_id_string);
  4461. EXPORT_SYMBOL_GPL(ata_id_c_string);
  4462. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  4463. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  4464. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
  4465. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  4466. EXPORT_SYMBOL_GPL(ata_timing_compute);
  4467. EXPORT_SYMBOL_GPL(ata_timing_merge);
  4468. #ifdef CONFIG_PCI
  4469. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  4470. EXPORT_SYMBOL_GPL(ata_pci_host_stop);
  4471. EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
  4472. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  4473. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  4474. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  4475. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  4476. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  4477. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  4478. #endif /* CONFIG_PCI */
  4479. EXPORT_SYMBOL_GPL(ata_device_suspend);
  4480. EXPORT_SYMBOL_GPL(ata_device_resume);
  4481. EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
  4482. EXPORT_SYMBOL_GPL(ata_scsi_device_resume);