platform.c 7.7 KB

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  1. /*
  2. * Platform device support for Au1x00 SoCs.
  3. *
  4. * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
  5. *
  6. * (C) Copyright Embedded Alley Solutions, Inc 2005
  7. * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/dma-mapping.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/serial_8250.h>
  16. #include <linux/init.h>
  17. #include <asm/mach-au1x00/au1xxx.h>
  18. #define PORT(_base, _irq) \
  19. { \
  20. .iobase = _base, \
  21. .membase = (void __iomem *)_base,\
  22. .mapbase = CPHYSADDR(_base), \
  23. .irq = _irq, \
  24. .regshift = 2, \
  25. .iotype = UPIO_AU, \
  26. .flags = UPF_SKIP_TEST \
  27. }
  28. static struct plat_serial8250_port au1x00_uart_data[] = {
  29. #if defined(CONFIG_SERIAL_8250_AU1X00)
  30. #if defined(CONFIG_SOC_AU1000)
  31. PORT(UART0_ADDR, AU1000_UART0_INT),
  32. PORT(UART1_ADDR, AU1000_UART1_INT),
  33. PORT(UART2_ADDR, AU1000_UART2_INT),
  34. PORT(UART3_ADDR, AU1000_UART3_INT),
  35. #elif defined(CONFIG_SOC_AU1500)
  36. PORT(UART0_ADDR, AU1500_UART0_INT),
  37. PORT(UART3_ADDR, AU1500_UART3_INT),
  38. #elif defined(CONFIG_SOC_AU1100)
  39. PORT(UART0_ADDR, AU1100_UART0_INT),
  40. PORT(UART1_ADDR, AU1100_UART1_INT),
  41. PORT(UART3_ADDR, AU1100_UART3_INT),
  42. #elif defined(CONFIG_SOC_AU1550)
  43. PORT(UART0_ADDR, AU1550_UART0_INT),
  44. PORT(UART1_ADDR, AU1550_UART1_INT),
  45. PORT(UART3_ADDR, AU1550_UART3_INT),
  46. #elif defined(CONFIG_SOC_AU1200)
  47. PORT(UART0_ADDR, AU1200_UART0_INT),
  48. PORT(UART1_ADDR, AU1200_UART1_INT),
  49. #endif
  50. #endif /* CONFIG_SERIAL_8250_AU1X00 */
  51. { },
  52. };
  53. static struct platform_device au1xx0_uart_device = {
  54. .name = "serial8250",
  55. .id = PLAT8250_DEV_AU1X00,
  56. .dev = {
  57. .platform_data = au1x00_uart_data,
  58. },
  59. };
  60. /* OHCI (USB full speed host controller) */
  61. static struct resource au1xxx_usb_ohci_resources[] = {
  62. [0] = {
  63. .start = USB_OHCI_BASE,
  64. .end = USB_OHCI_BASE + USB_OHCI_LEN - 1,
  65. .flags = IORESOURCE_MEM,
  66. },
  67. [1] = {
  68. .start = AU1000_USB_HOST_INT,
  69. .end = AU1000_USB_HOST_INT,
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. };
  73. /* The dmamask must be set for OHCI to work */
  74. static u64 ohci_dmamask = DMA_32BIT_MASK;
  75. static struct platform_device au1xxx_usb_ohci_device = {
  76. .name = "au1xxx-ohci",
  77. .id = 0,
  78. .dev = {
  79. .dma_mask = &ohci_dmamask,
  80. .coherent_dma_mask = DMA_32BIT_MASK,
  81. },
  82. .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
  83. .resource = au1xxx_usb_ohci_resources,
  84. };
  85. /*** AU1100 LCD controller ***/
  86. #ifdef CONFIG_FB_AU1100
  87. static struct resource au1100_lcd_resources[] = {
  88. [0] = {
  89. .start = LCD_PHYS_ADDR,
  90. .end = LCD_PHYS_ADDR + 0x800 - 1,
  91. .flags = IORESOURCE_MEM,
  92. },
  93. [1] = {
  94. .start = AU1100_LCD_INT,
  95. .end = AU1100_LCD_INT,
  96. .flags = IORESOURCE_IRQ,
  97. }
  98. };
  99. static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
  100. static struct platform_device au1100_lcd_device = {
  101. .name = "au1100-lcd",
  102. .id = 0,
  103. .dev = {
  104. .dma_mask = &au1100_lcd_dmamask,
  105. .coherent_dma_mask = DMA_32BIT_MASK,
  106. },
  107. .num_resources = ARRAY_SIZE(au1100_lcd_resources),
  108. .resource = au1100_lcd_resources,
  109. };
  110. #endif
  111. #ifdef CONFIG_SOC_AU1200
  112. /* EHCI (USB high speed host controller) */
  113. static struct resource au1xxx_usb_ehci_resources[] = {
  114. [0] = {
  115. .start = USB_EHCI_BASE,
  116. .end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
  117. .flags = IORESOURCE_MEM,
  118. },
  119. [1] = {
  120. .start = AU1000_USB_HOST_INT,
  121. .end = AU1000_USB_HOST_INT,
  122. .flags = IORESOURCE_IRQ,
  123. },
  124. };
  125. static u64 ehci_dmamask = DMA_32BIT_MASK;
  126. static struct platform_device au1xxx_usb_ehci_device = {
  127. .name = "au1xxx-ehci",
  128. .id = 0,
  129. .dev = {
  130. .dma_mask = &ehci_dmamask,
  131. .coherent_dma_mask = DMA_32BIT_MASK,
  132. },
  133. .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
  134. .resource = au1xxx_usb_ehci_resources,
  135. };
  136. /* Au1200 UDC (USB gadget controller) */
  137. static struct resource au1xxx_usb_gdt_resources[] = {
  138. [0] = {
  139. .start = USB_UDC_BASE,
  140. .end = USB_UDC_BASE + USB_UDC_LEN - 1,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. [1] = {
  144. .start = AU1200_USB_INT,
  145. .end = AU1200_USB_INT,
  146. .flags = IORESOURCE_IRQ,
  147. },
  148. };
  149. static struct resource au1xxx_mmc_resources[] = {
  150. [0] = {
  151. .start = SD0_PHYS_ADDR,
  152. .end = SD0_PHYS_ADDR + 0x7ffff,
  153. .flags = IORESOURCE_MEM,
  154. },
  155. [1] = {
  156. .start = SD1_PHYS_ADDR,
  157. .end = SD1_PHYS_ADDR + 0x7ffff,
  158. .flags = IORESOURCE_MEM,
  159. },
  160. [2] = {
  161. .start = AU1200_SD_INT,
  162. .end = AU1200_SD_INT,
  163. .flags = IORESOURCE_IRQ,
  164. }
  165. };
  166. static u64 udc_dmamask = DMA_32BIT_MASK;
  167. static struct platform_device au1xxx_usb_gdt_device = {
  168. .name = "au1xxx-udc",
  169. .id = 0,
  170. .dev = {
  171. .dma_mask = &udc_dmamask,
  172. .coherent_dma_mask = DMA_32BIT_MASK,
  173. },
  174. .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
  175. .resource = au1xxx_usb_gdt_resources,
  176. };
  177. /* Au1200 UOC (USB OTG controller) */
  178. static struct resource au1xxx_usb_otg_resources[] = {
  179. [0] = {
  180. .start = USB_UOC_BASE,
  181. .end = USB_UOC_BASE + USB_UOC_LEN - 1,
  182. .flags = IORESOURCE_MEM,
  183. },
  184. [1] = {
  185. .start = AU1200_USB_INT,
  186. .end = AU1200_USB_INT,
  187. .flags = IORESOURCE_IRQ,
  188. },
  189. };
  190. static u64 uoc_dmamask = DMA_32BIT_MASK;
  191. static struct platform_device au1xxx_usb_otg_device = {
  192. .name = "au1xxx-uoc",
  193. .id = 0,
  194. .dev = {
  195. .dma_mask = &uoc_dmamask,
  196. .coherent_dma_mask = DMA_32BIT_MASK,
  197. },
  198. .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
  199. .resource = au1xxx_usb_otg_resources,
  200. };
  201. static struct resource au1200_lcd_resources[] = {
  202. [0] = {
  203. .start = LCD_PHYS_ADDR,
  204. .end = LCD_PHYS_ADDR + 0x800 - 1,
  205. .flags = IORESOURCE_MEM,
  206. },
  207. [1] = {
  208. .start = AU1200_LCD_INT,
  209. .end = AU1200_LCD_INT,
  210. .flags = IORESOURCE_IRQ,
  211. }
  212. };
  213. static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
  214. static struct platform_device au1200_lcd_device = {
  215. .name = "au1200-lcd",
  216. .id = 0,
  217. .dev = {
  218. .dma_mask = &au1200_lcd_dmamask,
  219. .coherent_dma_mask = DMA_32BIT_MASK,
  220. },
  221. .num_resources = ARRAY_SIZE(au1200_lcd_resources),
  222. .resource = au1200_lcd_resources,
  223. };
  224. static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
  225. static struct platform_device au1xxx_mmc_device = {
  226. .name = "au1xxx-mmc",
  227. .id = 0,
  228. .dev = {
  229. .dma_mask = &au1xxx_mmc_dmamask,
  230. .coherent_dma_mask = DMA_32BIT_MASK,
  231. },
  232. .num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
  233. .resource = au1xxx_mmc_resources,
  234. };
  235. #endif /* #ifdef CONFIG_SOC_AU1200 */
  236. static struct platform_device au1x00_pcmcia_device = {
  237. .name = "au1x00-pcmcia",
  238. .id = 0,
  239. };
  240. /* All Alchemy demoboards with I2C have this #define in their headers */
  241. #ifdef SMBUS_PSC_BASE
  242. static struct resource pbdb_smbus_resources[] = {
  243. {
  244. .start = CPHYSADDR(SMBUS_PSC_BASE),
  245. .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
  246. .flags = IORESOURCE_MEM,
  247. },
  248. };
  249. static struct platform_device pbdb_smbus_device = {
  250. .name = "au1xpsc_smbus",
  251. .id = 0, /* bus number */
  252. .num_resources = ARRAY_SIZE(pbdb_smbus_resources),
  253. .resource = pbdb_smbus_resources,
  254. };
  255. #endif
  256. static struct platform_device *au1xxx_platform_devices[] __initdata = {
  257. &au1xx0_uart_device,
  258. &au1xxx_usb_ohci_device,
  259. &au1x00_pcmcia_device,
  260. #ifdef CONFIG_FB_AU1100
  261. &au1100_lcd_device,
  262. #endif
  263. #ifdef CONFIG_SOC_AU1200
  264. &au1xxx_usb_ehci_device,
  265. &au1xxx_usb_gdt_device,
  266. &au1xxx_usb_otg_device,
  267. &au1200_lcd_device,
  268. &au1xxx_mmc_device,
  269. #endif
  270. #ifdef SMBUS_PSC_BASE
  271. &pbdb_smbus_device,
  272. #endif
  273. };
  274. static int __init au1xxx_platform_init(void)
  275. {
  276. unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
  277. int i;
  278. /* Fill up uartclk. */
  279. for (i = 0; au1x00_uart_data[i].flags; i++)
  280. au1x00_uart_data[i].uartclk = uartclk;
  281. return platform_add_devices(au1xxx_platform_devices,
  282. ARRAY_SIZE(au1xxx_platform_devices));
  283. }
  284. arch_initcall(au1xxx_platform_init);