grufault.c 17 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * FAULT HANDLER FOR GRU DETECTED TLB MISSES
  5. *
  6. * This file contains code that handles TLB misses within the GRU.
  7. * These misses are reported either via interrupts or user polling of
  8. * the user CB.
  9. *
  10. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/errno.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mm.h>
  30. #include <linux/hugetlb.h>
  31. #include <linux/device.h>
  32. #include <linux/io.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/security.h>
  35. #include <asm/pgtable.h>
  36. #include "gru.h"
  37. #include "grutables.h"
  38. #include "grulib.h"
  39. #include "gru_instructions.h"
  40. #include <asm/uv/uv_hub.h>
  41. /*
  42. * Test if a physical address is a valid GRU GSEG address
  43. */
  44. static inline int is_gru_paddr(unsigned long paddr)
  45. {
  46. return paddr >= gru_start_paddr && paddr < gru_end_paddr;
  47. }
  48. /*
  49. * Find the vma of a GRU segment. Caller must hold mmap_sem.
  50. */
  51. struct vm_area_struct *gru_find_vma(unsigned long vaddr)
  52. {
  53. struct vm_area_struct *vma;
  54. vma = find_vma(current->mm, vaddr);
  55. if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
  56. return vma;
  57. return NULL;
  58. }
  59. /*
  60. * Find and lock the gts that contains the specified user vaddr.
  61. *
  62. * Returns:
  63. * - *gts with the mmap_sem locked for read and the GTS locked.
  64. * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
  65. */
  66. static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
  67. {
  68. struct mm_struct *mm = current->mm;
  69. struct vm_area_struct *vma;
  70. struct gru_thread_state *gts = NULL;
  71. down_read(&mm->mmap_sem);
  72. vma = gru_find_vma(vaddr);
  73. if (vma)
  74. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  75. if (gts)
  76. mutex_lock(&gts->ts_ctxlock);
  77. else
  78. up_read(&mm->mmap_sem);
  79. return gts;
  80. }
  81. static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
  82. {
  83. struct mm_struct *mm = current->mm;
  84. struct vm_area_struct *vma;
  85. struct gru_thread_state *gts = NULL;
  86. down_write(&mm->mmap_sem);
  87. vma = gru_find_vma(vaddr);
  88. if (vma)
  89. gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
  90. if (gts) {
  91. mutex_lock(&gts->ts_ctxlock);
  92. downgrade_write(&mm->mmap_sem);
  93. } else {
  94. up_write(&mm->mmap_sem);
  95. }
  96. return gts;
  97. }
  98. /*
  99. * Unlock a GTS that was previously locked with gru_find_lock_gts().
  100. */
  101. static void gru_unlock_gts(struct gru_thread_state *gts)
  102. {
  103. mutex_unlock(&gts->ts_ctxlock);
  104. up_read(&current->mm->mmap_sem);
  105. }
  106. /*
  107. * Set a CB.istatus to active using a user virtual address. This must be done
  108. * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
  109. * If the line is evicted, the status may be lost. The in-cache update
  110. * is necessary to prevent the user from seeing a stale cb.istatus that will
  111. * change as soon as the TFH restart is complete. Races may cause an
  112. * occasional failure to clear the cb.istatus, but that is ok.
  113. *
  114. * If the cb address is not valid (should not happen, but...), nothing
  115. * bad will happen.. The get_user()/put_user() will fail but there
  116. * are no bad side-effects.
  117. */
  118. static void gru_cb_set_istatus_active(unsigned long __user *cb)
  119. {
  120. union {
  121. struct gru_instruction_bits bits;
  122. unsigned long dw;
  123. } u;
  124. if (cb) {
  125. get_user(u.dw, cb);
  126. u.bits.istatus = CBS_ACTIVE;
  127. put_user(u.dw, cb);
  128. }
  129. }
  130. /*
  131. * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
  132. * interrupt. Interrupts are always sent to a cpu on the blade that contains the
  133. * GRU (except for headless blades which are not currently supported). A blade
  134. * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
  135. * number uniquely identifies the GRU chiplet on the local blade that caused the
  136. * interrupt. Always called in interrupt context.
  137. */
  138. static inline struct gru_state *irq_to_gru(int irq)
  139. {
  140. return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
  141. }
  142. /*
  143. * Read & clear a TFM
  144. *
  145. * The GRU has an array of fault maps. A map is private to a cpu
  146. * Only one cpu will be accessing a cpu's fault map.
  147. *
  148. * This function scans the cpu-private fault map & clears all bits that
  149. * are set. The function returns a bitmap that indicates the bits that
  150. * were cleared. Note that sense the maps may be updated asynchronously by
  151. * the GRU, atomic operations must be used to clear bits.
  152. */
  153. static void get_clear_fault_map(struct gru_state *gru,
  154. struct gru_tlb_fault_map *map)
  155. {
  156. unsigned long i, k;
  157. struct gru_tlb_fault_map *tfm;
  158. tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
  159. prefetchw(tfm); /* Helps on hardware, required for emulator */
  160. for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
  161. k = tfm->fault_bits[i];
  162. if (k)
  163. k = xchg(&tfm->fault_bits[i], 0UL);
  164. map->fault_bits[i] = k;
  165. }
  166. /*
  167. * Not functionally required but helps performance. (Required
  168. * on emulator)
  169. */
  170. gru_flush_cache(tfm);
  171. }
  172. /*
  173. * Atomic (interrupt context) & non-atomic (user context) functions to
  174. * convert a vaddr into a physical address. The size of the page
  175. * is returned in pageshift.
  176. * returns:
  177. * 0 - successful
  178. * < 0 - error code
  179. * 1 - (atomic only) try again in non-atomic context
  180. */
  181. static int non_atomic_pte_lookup(struct vm_area_struct *vma,
  182. unsigned long vaddr, int write,
  183. unsigned long *paddr, int *pageshift)
  184. {
  185. struct page *page;
  186. /* ZZZ Need to handle HUGE pages */
  187. if (is_vm_hugetlb_page(vma))
  188. return -EFAULT;
  189. *pageshift = PAGE_SHIFT;
  190. if (get_user_pages
  191. (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
  192. return -EFAULT;
  193. *paddr = page_to_phys(page);
  194. put_page(page);
  195. return 0;
  196. }
  197. /*
  198. * atomic_pte_lookup
  199. *
  200. * Convert a user virtual address to a physical address
  201. * Only supports Intel large pages (2MB only) on x86_64.
  202. * ZZZ - hugepage support is incomplete
  203. *
  204. * NOTE: mmap_sem is already held on entry to this function. This
  205. * guarantees existence of the page tables.
  206. */
  207. static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
  208. int write, unsigned long *paddr, int *pageshift)
  209. {
  210. pgd_t *pgdp;
  211. pmd_t *pmdp;
  212. pud_t *pudp;
  213. pte_t pte;
  214. pgdp = pgd_offset(vma->vm_mm, vaddr);
  215. if (unlikely(pgd_none(*pgdp)))
  216. goto err;
  217. pudp = pud_offset(pgdp, vaddr);
  218. if (unlikely(pud_none(*pudp)))
  219. goto err;
  220. pmdp = pmd_offset(pudp, vaddr);
  221. if (unlikely(pmd_none(*pmdp)))
  222. goto err;
  223. #ifdef CONFIG_X86_64
  224. if (unlikely(pmd_large(*pmdp)))
  225. pte = *(pte_t *) pmdp;
  226. else
  227. #endif
  228. pte = *pte_offset_kernel(pmdp, vaddr);
  229. if (unlikely(!pte_present(pte) ||
  230. (write && (!pte_write(pte) || !pte_dirty(pte)))))
  231. return 1;
  232. *paddr = pte_pfn(pte) << PAGE_SHIFT;
  233. #ifdef CONFIG_HUGETLB_PAGE
  234. *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
  235. #else
  236. *pageshift = PAGE_SHIFT;
  237. #endif
  238. return 0;
  239. err:
  240. local_irq_enable();
  241. return 1;
  242. }
  243. /*
  244. * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
  245. * Input:
  246. * cb Address of user CBR. Null if not running in user context
  247. * Return:
  248. * 0 = dropin, exception, or switch to UPM successful
  249. * 1 = range invalidate active
  250. * < 0 = error code
  251. *
  252. */
  253. static int gru_try_dropin(struct gru_thread_state *gts,
  254. struct gru_tlb_fault_handle *tfh,
  255. unsigned long __user *cb)
  256. {
  257. struct mm_struct *mm = gts->ts_mm;
  258. struct vm_area_struct *vma;
  259. int pageshift, asid, write, ret;
  260. unsigned long paddr, gpa, vaddr;
  261. /*
  262. * NOTE: The GRU contains magic hardware that eliminates races between
  263. * TLB invalidates and TLB dropins. If an invalidate occurs
  264. * in the window between reading the TFH and the subsequent TLB dropin,
  265. * the dropin is ignored. This eliminates the need for additional locks.
  266. */
  267. /*
  268. * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
  269. * Might be a hardware race OR a stupid user. Ignore FMM because FMM
  270. * is a transient state.
  271. */
  272. if (tfh->state == TFHSTATE_IDLE)
  273. goto failidle;
  274. if (tfh->state == TFHSTATE_MISS_FMM && cb)
  275. goto failfmm;
  276. write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
  277. vaddr = tfh->missvaddr;
  278. asid = tfh->missasid;
  279. if (asid == 0)
  280. goto failnoasid;
  281. rmb(); /* TFH must be cache resident before reading ms_range_active */
  282. /*
  283. * TFH is cache resident - at least briefly. Fail the dropin
  284. * if a range invalidate is active.
  285. */
  286. if (atomic_read(&gts->ts_gms->ms_range_active))
  287. goto failactive;
  288. vma = find_vma(mm, vaddr);
  289. if (!vma)
  290. goto failinval;
  291. /*
  292. * Atomic lookup is faster & usually works even if called in non-atomic
  293. * context.
  294. */
  295. rmb(); /* Must/check ms_range_active before loading PTEs */
  296. ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &pageshift);
  297. if (ret) {
  298. if (!cb)
  299. goto failupm;
  300. if (non_atomic_pte_lookup(vma, vaddr, write, &paddr,
  301. &pageshift))
  302. goto failinval;
  303. }
  304. if (is_gru_paddr(paddr))
  305. goto failinval;
  306. paddr = paddr & ~((1UL << pageshift) - 1);
  307. gpa = uv_soc_phys_ram_to_gpa(paddr);
  308. gru_cb_set_istatus_active(cb);
  309. tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
  310. GRU_PAGESIZE(pageshift));
  311. STAT(tlb_dropin);
  312. gru_dbg(grudev,
  313. "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
  314. ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
  315. pageshift, gpa);
  316. return 0;
  317. failnoasid:
  318. /* No asid (delayed unload). */
  319. STAT(tlb_dropin_fail_no_asid);
  320. gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  321. if (!cb)
  322. tfh_user_polling_mode(tfh);
  323. else
  324. gru_flush_cache(tfh);
  325. return -EAGAIN;
  326. failupm:
  327. /* Atomic failure switch CBR to UPM */
  328. tfh_user_polling_mode(tfh);
  329. STAT(tlb_dropin_fail_upm);
  330. gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  331. return 1;
  332. failfmm:
  333. /* FMM state on UPM call */
  334. gru_flush_cache(tfh);
  335. STAT(tlb_dropin_fail_fmm);
  336. gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
  337. return 0;
  338. failidle:
  339. /* TFH was idle - no miss pending */
  340. gru_flush_cache(tfh);
  341. if (cb)
  342. gru_flush_cache(cb);
  343. STAT(tlb_dropin_fail_idle);
  344. gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
  345. return 0;
  346. failinval:
  347. /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
  348. tfh_exception(tfh);
  349. STAT(tlb_dropin_fail_invalid);
  350. gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  351. return -EFAULT;
  352. failactive:
  353. /* Range invalidate active. Switch to UPM iff atomic */
  354. if (!cb)
  355. tfh_user_polling_mode(tfh);
  356. else
  357. gru_flush_cache(tfh);
  358. STAT(tlb_dropin_fail_range_active);
  359. gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
  360. tfh, vaddr);
  361. return 1;
  362. }
  363. /*
  364. * Process an external interrupt from the GRU. This interrupt is
  365. * caused by a TLB miss.
  366. * Note that this is the interrupt handler that is registered with linux
  367. * interrupt handlers.
  368. */
  369. irqreturn_t gru_intr(int irq, void *dev_id)
  370. {
  371. struct gru_state *gru;
  372. struct gru_tlb_fault_map map;
  373. struct gru_thread_state *gts;
  374. struct gru_tlb_fault_handle *tfh = NULL;
  375. int cbrnum, ctxnum;
  376. STAT(intr);
  377. gru = irq_to_gru(irq);
  378. if (!gru) {
  379. dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
  380. raw_smp_processor_id(), irq);
  381. return IRQ_NONE;
  382. }
  383. get_clear_fault_map(gru, &map);
  384. gru_dbg(grudev, "irq %d, gru %x, map 0x%lx\n", irq, gru->gs_gid,
  385. map.fault_bits[0]);
  386. for_each_cbr_in_tfm(cbrnum, map.fault_bits) {
  387. tfh = get_tfh_by_index(gru, cbrnum);
  388. prefetchw(tfh); /* Helps on hdw, required for emulator */
  389. /*
  390. * When hardware sets a bit in the faultmap, it implicitly
  391. * locks the GRU context so that it cannot be unloaded.
  392. * The gts cannot change until a TFH start/writestart command
  393. * is issued.
  394. */
  395. ctxnum = tfh->ctxnum;
  396. gts = gru->gs_gts[ctxnum];
  397. /*
  398. * This is running in interrupt context. Trylock the mmap_sem.
  399. * If it fails, retry the fault in user context.
  400. */
  401. if (down_read_trylock(&gts->ts_mm->mmap_sem)) {
  402. gru_try_dropin(gts, tfh, NULL);
  403. up_read(&gts->ts_mm->mmap_sem);
  404. } else {
  405. tfh_user_polling_mode(tfh);
  406. STAT(intr_mm_lock_failed);
  407. }
  408. }
  409. return IRQ_HANDLED;
  410. }
  411. static int gru_user_dropin(struct gru_thread_state *gts,
  412. struct gru_tlb_fault_handle *tfh,
  413. unsigned long __user *cb)
  414. {
  415. struct gru_mm_struct *gms = gts->ts_gms;
  416. int ret;
  417. while (1) {
  418. wait_event(gms->ms_wait_queue,
  419. atomic_read(&gms->ms_range_active) == 0);
  420. prefetchw(tfh); /* Helps on hdw, required for emulator */
  421. ret = gru_try_dropin(gts, tfh, cb);
  422. if (ret <= 0)
  423. return ret;
  424. STAT(call_os_wait_queue);
  425. }
  426. }
  427. /*
  428. * This interface is called as a result of a user detecting a "call OS" bit
  429. * in a user CB. Normally means that a TLB fault has occurred.
  430. * cb - user virtual address of the CB
  431. */
  432. int gru_handle_user_call_os(unsigned long cb)
  433. {
  434. struct gru_tlb_fault_handle *tfh;
  435. struct gru_thread_state *gts;
  436. unsigned long __user *cbp;
  437. int ucbnum, cbrnum, ret = -EINVAL;
  438. STAT(call_os);
  439. gru_dbg(grudev, "address 0x%lx\n", cb);
  440. /* sanity check the cb pointer */
  441. ucbnum = get_cb_number((void *)cb);
  442. if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
  443. return -EINVAL;
  444. cbp = (unsigned long *)cb;
  445. gts = gru_find_lock_gts(cb);
  446. if (!gts)
  447. return -EINVAL;
  448. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
  449. goto exit;
  450. /*
  451. * If force_unload is set, the UPM TLB fault is phony. The task
  452. * has migrated to another node and the GSEG must be moved. Just
  453. * unload the context. The task will page fault and assign a new
  454. * context.
  455. */
  456. if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
  457. gts->ts_blade != uv_numa_blade_id()) {
  458. STAT(call_os_offnode_reference);
  459. gts->ts_force_unload = 1;
  460. }
  461. ret = -EAGAIN;
  462. cbrnum = thread_cbr_number(gts, ucbnum);
  463. if (gts->ts_force_unload) {
  464. gru_unload_context(gts, 1);
  465. } else if (gts->ts_gru) {
  466. tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
  467. ret = gru_user_dropin(gts, tfh, cbp);
  468. }
  469. exit:
  470. gru_unlock_gts(gts);
  471. return ret;
  472. }
  473. /*
  474. * Fetch the exception detail information for a CB that terminated with
  475. * an exception.
  476. */
  477. int gru_get_exception_detail(unsigned long arg)
  478. {
  479. struct control_block_extended_exc_detail excdet;
  480. struct gru_control_block_extended *cbe;
  481. struct gru_thread_state *gts;
  482. int ucbnum, cbrnum, ret;
  483. STAT(user_exception);
  484. if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
  485. return -EFAULT;
  486. gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
  487. gts = gru_find_lock_gts(excdet.cb);
  488. if (!gts)
  489. return -EINVAL;
  490. ucbnum = get_cb_number((void *)excdet.cb);
  491. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
  492. ret = -EINVAL;
  493. } else if (gts->ts_gru) {
  494. cbrnum = thread_cbr_number(gts, ucbnum);
  495. cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
  496. prefetchw(cbe);/* Harmless on hardware, required for emulator */
  497. excdet.opc = cbe->opccpy;
  498. excdet.exopc = cbe->exopccpy;
  499. excdet.ecause = cbe->ecause;
  500. excdet.exceptdet0 = cbe->idef1upd;
  501. excdet.exceptdet1 = cbe->idef3upd;
  502. ret = 0;
  503. } else {
  504. ret = -EAGAIN;
  505. }
  506. gru_unlock_gts(gts);
  507. gru_dbg(grudev, "address 0x%lx, ecause 0x%x\n", excdet.cb,
  508. excdet.ecause);
  509. if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
  510. ret = -EFAULT;
  511. return ret;
  512. }
  513. /*
  514. * User request to unload a context. Content is saved for possible reload.
  515. */
  516. static int gru_unload_all_contexts(void)
  517. {
  518. struct gru_thread_state *gts;
  519. struct gru_state *gru;
  520. int maxgid, gid, ctxnum;
  521. int nodesperblade;
  522. if (!capable(CAP_SYS_ADMIN))
  523. return -EPERM;
  524. if (num_online_nodes() > 1 &&
  525. (uv_node_to_blade_id(1) == uv_node_to_blade_id(0)))
  526. nodesperblade = 2;
  527. else
  528. nodesperblade = 1;
  529. maxgid = GRU_CHIPLETS_PER_BLADE * num_online_nodes() / nodesperblade;
  530. for (gid = 0; gid < maxgid; gid++) {
  531. gru = GID_TO_GRU(gid);
  532. spin_lock(&gru->gs_lock);
  533. for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
  534. gts = gru->gs_gts[ctxnum];
  535. if (gts && mutex_trylock(&gts->ts_ctxlock)) {
  536. spin_unlock(&gru->gs_lock);
  537. gru_unload_context(gts, 1);
  538. gru_unlock_gts(gts);
  539. spin_lock(&gru->gs_lock);
  540. }
  541. }
  542. spin_unlock(&gru->gs_lock);
  543. }
  544. return 0;
  545. }
  546. int gru_user_unload_context(unsigned long arg)
  547. {
  548. struct gru_thread_state *gts;
  549. struct gru_unload_context_req req;
  550. STAT(user_unload_context);
  551. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  552. return -EFAULT;
  553. gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
  554. if (!req.gseg)
  555. return gru_unload_all_contexts();
  556. gts = gru_find_lock_gts(req.gseg);
  557. if (!gts)
  558. return -EINVAL;
  559. if (gts->ts_gru)
  560. gru_unload_context(gts, 1);
  561. gru_unlock_gts(gts);
  562. return 0;
  563. }
  564. /*
  565. * User request to flush a range of virtual addresses from the GRU TLB
  566. * (Mainly for testing).
  567. */
  568. int gru_user_flush_tlb(unsigned long arg)
  569. {
  570. struct gru_thread_state *gts;
  571. struct gru_flush_tlb_req req;
  572. STAT(user_flush_tlb);
  573. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  574. return -EFAULT;
  575. gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
  576. req.vaddr, req.len);
  577. gts = gru_find_lock_gts(req.gseg);
  578. if (!gts)
  579. return -EINVAL;
  580. gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.len);
  581. gru_unlock_gts(gts);
  582. return 0;
  583. }
  584. /*
  585. * Register the current task as the user of the GSEG slice.
  586. * Needed for TLB fault interrupt targeting.
  587. */
  588. int gru_set_task_slice(long address)
  589. {
  590. struct gru_thread_state *gts;
  591. STAT(set_task_slice);
  592. gru_dbg(grudev, "address 0x%lx\n", address);
  593. gts = gru_alloc_locked_gts(address);
  594. if (!gts)
  595. return -EINVAL;
  596. gts->ts_tgid_owner = current->tgid;
  597. gru_unlock_gts(gts);
  598. return 0;
  599. }