p54common.c 29 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042
  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. static struct ieee80211_rate p54_rates[] = {
  25. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  26. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  27. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  28. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  29. { .bitrate = 60, .hw_value = 4, },
  30. { .bitrate = 90, .hw_value = 5, },
  31. { .bitrate = 120, .hw_value = 6, },
  32. { .bitrate = 180, .hw_value = 7, },
  33. { .bitrate = 240, .hw_value = 8, },
  34. { .bitrate = 360, .hw_value = 9, },
  35. { .bitrate = 480, .hw_value = 10, },
  36. { .bitrate = 540, .hw_value = 11, },
  37. };
  38. static struct ieee80211_channel p54_channels[] = {
  39. { .center_freq = 2412, .hw_value = 1, },
  40. { .center_freq = 2417, .hw_value = 2, },
  41. { .center_freq = 2422, .hw_value = 3, },
  42. { .center_freq = 2427, .hw_value = 4, },
  43. { .center_freq = 2432, .hw_value = 5, },
  44. { .center_freq = 2437, .hw_value = 6, },
  45. { .center_freq = 2442, .hw_value = 7, },
  46. { .center_freq = 2447, .hw_value = 8, },
  47. { .center_freq = 2452, .hw_value = 9, },
  48. { .center_freq = 2457, .hw_value = 10, },
  49. { .center_freq = 2462, .hw_value = 11, },
  50. { .center_freq = 2467, .hw_value = 12, },
  51. { .center_freq = 2472, .hw_value = 13, },
  52. { .center_freq = 2484, .hw_value = 14, },
  53. };
  54. struct ieee80211_supported_band band_2GHz = {
  55. .channels = p54_channels,
  56. .n_channels = ARRAY_SIZE(p54_channels),
  57. .bitrates = p54_rates,
  58. .n_bitrates = ARRAY_SIZE(p54_rates),
  59. };
  60. void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  61. {
  62. struct p54_common *priv = dev->priv;
  63. struct bootrec_exp_if *exp_if;
  64. struct bootrec *bootrec;
  65. u32 *data = (u32 *)fw->data;
  66. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  67. u8 *fw_version = NULL;
  68. size_t len;
  69. int i;
  70. if (priv->rx_start)
  71. return;
  72. while (data < end_data && *data)
  73. data++;
  74. while (data < end_data && !*data)
  75. data++;
  76. bootrec = (struct bootrec *) data;
  77. while (bootrec->data <= end_data &&
  78. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  79. u32 code = le32_to_cpu(bootrec->code);
  80. switch (code) {
  81. case BR_CODE_COMPONENT_ID:
  82. switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
  83. case FW_FMAC:
  84. printk(KERN_INFO "p54: FreeMAC firmware\n");
  85. break;
  86. case FW_LM20:
  87. printk(KERN_INFO "p54: LM20 firmware\n");
  88. break;
  89. case FW_LM86:
  90. printk(KERN_INFO "p54: LM86 firmware\n");
  91. break;
  92. case FW_LM87:
  93. printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
  94. break;
  95. default:
  96. printk(KERN_INFO "p54: unknown firmware\n");
  97. break;
  98. }
  99. break;
  100. case BR_CODE_COMPONENT_VERSION:
  101. /* 24 bytes should be enough for all firmwares */
  102. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  103. fw_version = (unsigned char*)bootrec->data;
  104. break;
  105. case BR_CODE_DESCR:
  106. priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
  107. /* FIXME add sanity checking */
  108. priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
  109. break;
  110. case BR_CODE_EXPOSED_IF:
  111. exp_if = (struct bootrec_exp_if *) bootrec->data;
  112. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  113. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  114. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  115. break;
  116. case BR_CODE_DEPENDENT_IF:
  117. break;
  118. case BR_CODE_END_OF_BRA:
  119. case LEGACY_BR_CODE_END_OF_BRA:
  120. end_data = NULL;
  121. break;
  122. default:
  123. break;
  124. }
  125. bootrec = (struct bootrec *)&bootrec->data[len];
  126. }
  127. if (fw_version)
  128. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  129. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  130. if (priv->fw_var >= 0x300) {
  131. /* Firmware supports QoS, use it! */
  132. priv->tx_stats.data[0].limit = 3;
  133. priv->tx_stats.data[1].limit = 4;
  134. priv->tx_stats.data[2].limit = 3;
  135. priv->tx_stats.data[3].limit = 1;
  136. dev->queues = 4;
  137. }
  138. }
  139. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  140. static int p54_convert_rev0_to_rev1(struct ieee80211_hw *dev,
  141. struct pda_pa_curve_data *curve_data)
  142. {
  143. struct p54_common *priv = dev->priv;
  144. struct pda_pa_curve_data_sample_rev1 *rev1;
  145. struct pda_pa_curve_data_sample_rev0 *rev0;
  146. size_t cd_len = sizeof(*curve_data) +
  147. (curve_data->points_per_channel*sizeof(*rev1) + 2) *
  148. curve_data->channels;
  149. unsigned int i, j;
  150. void *source, *target;
  151. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  152. if (!priv->curve_data)
  153. return -ENOMEM;
  154. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  155. source = curve_data->data;
  156. target = priv->curve_data->data;
  157. for (i = 0; i < curve_data->channels; i++) {
  158. __le16 *freq = source;
  159. source += sizeof(__le16);
  160. *((__le16 *)target) = *freq;
  161. target += sizeof(__le16);
  162. for (j = 0; j < curve_data->points_per_channel; j++) {
  163. rev1 = target;
  164. rev0 = source;
  165. rev1->rf_power = rev0->rf_power;
  166. rev1->pa_detector = rev0->pa_detector;
  167. rev1->data_64qam = rev0->pcv;
  168. /* "invent" the points for the other modulations */
  169. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  170. rev1->data_16qam = SUB(rev0->pcv, 12);
  171. rev1->data_qpsk = SUB(rev1->data_16qam, 12);
  172. rev1->data_bpsk = SUB(rev1->data_qpsk, 12);
  173. rev1->data_barker= SUB(rev1->data_bpsk, 14);
  174. #undef SUB
  175. target += sizeof(*rev1);
  176. source += sizeof(*rev0);
  177. }
  178. }
  179. return 0;
  180. }
  181. int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  182. {
  183. struct p54_common *priv = dev->priv;
  184. struct eeprom_pda_wrap *wrap = NULL;
  185. struct pda_entry *entry;
  186. int i = 0;
  187. unsigned int data_len, entry_len;
  188. void *tmp;
  189. int err;
  190. wrap = (struct eeprom_pda_wrap *) eeprom;
  191. entry = (void *)wrap->data + wrap->len;
  192. i += 2;
  193. i += le16_to_cpu(entry->len)*2;
  194. while (i < len) {
  195. entry_len = le16_to_cpu(entry->len);
  196. data_len = ((entry_len - 1) << 1);
  197. switch (le16_to_cpu(entry->code)) {
  198. case PDR_MAC_ADDRESS:
  199. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  200. break;
  201. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  202. if (data_len < 2) {
  203. err = -EINVAL;
  204. goto err;
  205. }
  206. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  207. err = -EINVAL;
  208. goto err;
  209. }
  210. priv->output_limit = kmalloc(entry->data[1] *
  211. sizeof(*priv->output_limit), GFP_KERNEL);
  212. if (!priv->output_limit) {
  213. err = -ENOMEM;
  214. goto err;
  215. }
  216. memcpy(priv->output_limit, &entry->data[2],
  217. entry->data[1]*sizeof(*priv->output_limit));
  218. priv->output_limit_len = entry->data[1];
  219. break;
  220. case PDR_PRISM_PA_CAL_CURVE_DATA:
  221. if (data_len < sizeof(struct pda_pa_curve_data)) {
  222. err = -EINVAL;
  223. goto err;
  224. }
  225. if (((struct pda_pa_curve_data *)entry->data)->cal_method_rev) {
  226. priv->curve_data = kmalloc(data_len, GFP_KERNEL);
  227. if (!priv->curve_data) {
  228. err = -ENOMEM;
  229. goto err;
  230. }
  231. memcpy(priv->curve_data, entry->data, data_len);
  232. } else {
  233. err = p54_convert_rev0_to_rev1(dev, (struct pda_pa_curve_data *)entry->data);
  234. if (err)
  235. goto err;
  236. }
  237. break;
  238. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  239. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  240. if (!priv->iq_autocal) {
  241. err = -ENOMEM;
  242. goto err;
  243. }
  244. memcpy(priv->iq_autocal, entry->data, data_len);
  245. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  246. break;
  247. case PDR_INTERFACE_LIST:
  248. tmp = entry->data;
  249. while ((u8 *)tmp < entry->data + data_len) {
  250. struct bootrec_exp_if *exp_if = tmp;
  251. if (le16_to_cpu(exp_if->if_id) == 0xF)
  252. priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
  253. tmp += sizeof(struct bootrec_exp_if);
  254. }
  255. break;
  256. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  257. priv->version = *(u8 *)(entry->data + 1);
  258. break;
  259. case PDR_END:
  260. i = len;
  261. break;
  262. }
  263. entry = (void *)entry + (entry_len + 1)*2;
  264. i += 2;
  265. i += entry_len*2;
  266. }
  267. if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
  268. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  269. err = -EINVAL;
  270. goto err;
  271. }
  272. return 0;
  273. err:
  274. if (priv->iq_autocal) {
  275. kfree(priv->iq_autocal);
  276. priv->iq_autocal = NULL;
  277. }
  278. if (priv->output_limit) {
  279. kfree(priv->output_limit);
  280. priv->output_limit = NULL;
  281. }
  282. if (priv->curve_data) {
  283. kfree(priv->curve_data);
  284. priv->curve_data = NULL;
  285. }
  286. printk(KERN_ERR "p54: eeprom parse failed!\n");
  287. return err;
  288. }
  289. EXPORT_SYMBOL_GPL(p54_parse_eeprom);
  290. void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
  291. {
  292. struct p54_eeprom_lm86 *eeprom_hdr;
  293. hdr->magic1 = cpu_to_le16(0x8000);
  294. hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
  295. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  296. hdr->retry1 = hdr->retry2 = 0;
  297. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  298. eeprom_hdr->offset = 0x0;
  299. eeprom_hdr->len = cpu_to_le16(0x2000);
  300. }
  301. EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
  302. static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  303. {
  304. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  305. struct ieee80211_rx_status rx_status = {0};
  306. u16 freq = le16_to_cpu(hdr->freq);
  307. rx_status.ssi = hdr->rssi;
  308. /* XX correct? */
  309. rx_status.rate_idx = hdr->rate & 0xf;
  310. rx_status.freq = freq;
  311. rx_status.band = IEEE80211_BAND_2GHZ;
  312. rx_status.antenna = hdr->antenna;
  313. rx_status.mactime = le64_to_cpu(hdr->timestamp);
  314. rx_status.flag |= RX_FLAG_TSFT;
  315. skb_pull(skb, sizeof(*hdr));
  316. skb_trim(skb, le16_to_cpu(hdr->len));
  317. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  318. }
  319. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  320. {
  321. struct p54_common *priv = dev->priv;
  322. int i;
  323. /* ieee80211_start_queues is great if all queues are really empty.
  324. * But, what if some are full? */
  325. for (i = 0; i < dev->queues; i++)
  326. if (priv->tx_stats.data[i].len < priv->tx_stats.data[i].limit)
  327. ieee80211_wake_queue(dev, i);
  328. }
  329. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  330. {
  331. struct p54_common *priv = dev->priv;
  332. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  333. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  334. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  335. u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
  336. struct memrecord *range = NULL;
  337. u32 freed = 0;
  338. u32 last_addr = priv->rx_start;
  339. while (entry != (struct sk_buff *)&priv->tx_queue) {
  340. range = (struct memrecord *)&entry->cb;
  341. if (range->start_addr == addr) {
  342. struct ieee80211_tx_status status = {{0}};
  343. struct p54_control_hdr *entry_hdr;
  344. struct p54_tx_control_allocdata *entry_data;
  345. int pad = 0;
  346. if (entry->next != (struct sk_buff *)&priv->tx_queue)
  347. freed = ((struct memrecord *)&entry->next->cb)->start_addr - last_addr;
  348. else
  349. freed = priv->rx_end - last_addr;
  350. last_addr = range->end_addr;
  351. __skb_unlink(entry, &priv->tx_queue);
  352. if (!range->control) {
  353. kfree_skb(entry);
  354. break;
  355. }
  356. memcpy(&status.control, range->control,
  357. sizeof(status.control));
  358. kfree(range->control);
  359. priv->tx_stats.data[status.control.queue].len--;
  360. entry_hdr = (struct p54_control_hdr *) entry->data;
  361. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  362. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  363. pad = entry_data->align[0];
  364. if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
  365. if (!(payload->status & 0x01))
  366. status.flags |= IEEE80211_TX_STATUS_ACK;
  367. else
  368. status.excessive_retries = 1;
  369. }
  370. status.retry_count = payload->retries - 1;
  371. status.ack_signal = le16_to_cpu(payload->ack_rssi);
  372. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  373. ieee80211_tx_status_irqsafe(dev, entry, &status);
  374. break;
  375. } else
  376. last_addr = range->end_addr;
  377. entry = entry->next;
  378. }
  379. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  380. sizeof(struct p54_control_hdr))
  381. p54_wake_free_queues(dev);
  382. }
  383. static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  384. {
  385. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  386. switch (le16_to_cpu(hdr->type)) {
  387. case P54_CONTROL_TYPE_TXDONE:
  388. p54_rx_frame_sent(dev, skb);
  389. break;
  390. case P54_CONTROL_TYPE_BBP:
  391. break;
  392. default:
  393. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  394. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  395. break;
  396. }
  397. }
  398. /* returns zero if skb can be reused */
  399. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  400. {
  401. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  402. switch (type) {
  403. case 0x00:
  404. case 0x01:
  405. p54_rx_data(dev, skb);
  406. return -1;
  407. case 0x4d:
  408. /* TODO: do something better... but then again, I've never seen this happen */
  409. printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
  410. wiphy_name(dev->wiphy));
  411. break;
  412. case 0x80:
  413. p54_rx_control(dev, skb);
  414. break;
  415. default:
  416. printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
  417. wiphy_name(dev->wiphy), type);
  418. break;
  419. }
  420. return 0;
  421. }
  422. EXPORT_SYMBOL_GPL(p54_rx);
  423. /*
  424. * So, the firmware is somewhat stupid and doesn't know what places in its
  425. * memory incoming data should go to. By poking around in the firmware, we
  426. * can find some unused memory to upload our packets to. However, data that we
  427. * want the card to TX needs to stay intact until the card has told us that
  428. * it is done with it. This function finds empty places we can upload to and
  429. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  430. * allocated areas.
  431. */
  432. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  433. struct p54_control_hdr *data, u32 len,
  434. struct ieee80211_tx_control *control)
  435. {
  436. struct p54_common *priv = dev->priv;
  437. struct sk_buff *entry = priv->tx_queue.next;
  438. struct sk_buff *target_skb = NULL;
  439. struct memrecord *range;
  440. u32 last_addr = priv->rx_start;
  441. u32 largest_hole = 0;
  442. u32 target_addr = priv->rx_start;
  443. unsigned long flags;
  444. unsigned int left;
  445. len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
  446. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  447. left = skb_queue_len(&priv->tx_queue);
  448. while (left--) {
  449. u32 hole_size;
  450. range = (struct memrecord *)&entry->cb;
  451. hole_size = range->start_addr - last_addr;
  452. if (!target_skb && hole_size >= len) {
  453. target_skb = entry->prev;
  454. hole_size -= len;
  455. target_addr = last_addr;
  456. }
  457. largest_hole = max(largest_hole, hole_size);
  458. last_addr = range->end_addr;
  459. entry = entry->next;
  460. }
  461. if (!target_skb && priv->rx_end - last_addr >= len) {
  462. target_skb = priv->tx_queue.prev;
  463. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  464. if (!skb_queue_empty(&priv->tx_queue)) {
  465. range = (struct memrecord *)&target_skb->cb;
  466. target_addr = range->end_addr;
  467. }
  468. } else
  469. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  470. if (skb) {
  471. range = (struct memrecord *)&skb->cb;
  472. range->start_addr = target_addr;
  473. range->end_addr = target_addr + len;
  474. range->control = control;
  475. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  476. if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  477. sizeof(struct p54_control_hdr))
  478. ieee80211_stop_queues(dev);
  479. }
  480. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  481. data->req_id = cpu_to_le32(target_addr + 0x70);
  482. }
  483. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
  484. struct ieee80211_tx_control *control)
  485. {
  486. struct ieee80211_tx_queue_stats_data *current_queue;
  487. struct p54_common *priv = dev->priv;
  488. struct p54_control_hdr *hdr;
  489. struct p54_tx_control_allocdata *txhdr;
  490. struct ieee80211_tx_control *control_copy;
  491. size_t padding, len;
  492. u8 rate;
  493. current_queue = &priv->tx_stats.data[control->queue];
  494. if (unlikely(current_queue->len > current_queue->limit))
  495. return NETDEV_TX_BUSY;
  496. current_queue->len++;
  497. current_queue->count++;
  498. if (current_queue->len == current_queue->limit)
  499. ieee80211_stop_queue(dev, control->queue);
  500. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  501. len = skb->len;
  502. control_copy = kmalloc(sizeof(*control), GFP_ATOMIC);
  503. if (control_copy)
  504. memcpy(control_copy, control, sizeof(*control));
  505. txhdr = (struct p54_tx_control_allocdata *)
  506. skb_push(skb, sizeof(*txhdr) + padding);
  507. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  508. if (padding)
  509. hdr->magic1 = cpu_to_le16(0x4010);
  510. else
  511. hdr->magic1 = cpu_to_le16(0x0010);
  512. hdr->len = cpu_to_le16(len);
  513. hdr->type = (control->flags & IEEE80211_TXCTL_NO_ACK) ? 0 : cpu_to_le16(1);
  514. hdr->retry1 = hdr->retry2 = control->retry_limit;
  515. p54_assign_address(dev, skb, hdr, skb->len, control_copy);
  516. memset(txhdr->wep_key, 0x0, 16);
  517. txhdr->padding = 0;
  518. txhdr->padding2 = 0;
  519. /* TODO: add support for alternate retry TX rates */
  520. rate = control->tx_rate->hw_value;
  521. if (control->flags & IEEE80211_TXCTL_SHORT_PREAMBLE)
  522. rate |= 0x10;
  523. if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
  524. rate |= 0x40;
  525. else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
  526. rate |= 0x20;
  527. memset(txhdr->rateset, rate, 8);
  528. txhdr->wep_key_present = 0;
  529. txhdr->wep_key_len = 0;
  530. txhdr->frame_type = cpu_to_le32(control->queue + 4);
  531. txhdr->magic4 = 0;
  532. txhdr->antenna = (control->antenna_sel_tx == 0) ?
  533. 2 : control->antenna_sel_tx - 1;
  534. txhdr->output_power = 0x7f; // HW Maximum
  535. txhdr->magic5 = (control->flags & IEEE80211_TXCTL_NO_ACK) ?
  536. 0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
  537. if (padding)
  538. txhdr->align[0] = padding;
  539. priv->tx(dev, hdr, skb->len, 0);
  540. return 0;
  541. }
  542. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  543. const u8 *dst, const u8 *src, u8 antenna,
  544. u32 magic3, u32 magic8, u32 magic9)
  545. {
  546. struct p54_common *priv = dev->priv;
  547. struct p54_control_hdr *hdr;
  548. struct p54_tx_control_filter *filter;
  549. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  550. priv->tx_hdr_len, GFP_ATOMIC);
  551. if (!hdr)
  552. return -ENOMEM;
  553. hdr = (void *)hdr + priv->tx_hdr_len;
  554. filter = (struct p54_tx_control_filter *) hdr->data;
  555. hdr->magic1 = cpu_to_le16(0x8001);
  556. hdr->len = cpu_to_le16(sizeof(*filter));
  557. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter), NULL);
  558. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  559. filter->filter_type = cpu_to_le16(filter_type);
  560. memcpy(filter->dst, dst, ETH_ALEN);
  561. if (!src)
  562. memset(filter->src, ~0, ETH_ALEN);
  563. else
  564. memcpy(filter->src, src, ETH_ALEN);
  565. filter->antenna = antenna;
  566. filter->magic3 = cpu_to_le32(magic3);
  567. filter->rx_addr = cpu_to_le32(priv->rx_end);
  568. filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
  569. filter->rxhw = priv->rxhw;
  570. filter->magic8 = cpu_to_le16(magic8);
  571. filter->magic9 = cpu_to_le16(magic9);
  572. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
  573. return 0;
  574. }
  575. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  576. {
  577. struct p54_common *priv = dev->priv;
  578. struct p54_control_hdr *hdr;
  579. struct p54_tx_control_channel *chan;
  580. unsigned int i;
  581. size_t payload_len = sizeof(*chan) + sizeof(u32)*2 +
  582. sizeof(*chan->curve_data) *
  583. priv->curve_data->points_per_channel;
  584. void *entry;
  585. hdr = kzalloc(sizeof(*hdr) + payload_len +
  586. priv->tx_hdr_len, GFP_KERNEL);
  587. if (!hdr)
  588. return -ENOMEM;
  589. hdr = (void *)hdr + priv->tx_hdr_len;
  590. chan = (struct p54_tx_control_channel *) hdr->data;
  591. hdr->magic1 = cpu_to_le16(0x8001);
  592. hdr->len = cpu_to_le16(sizeof(*chan));
  593. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  594. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + payload_len, NULL);
  595. chan->magic1 = cpu_to_le16(0x1);
  596. chan->magic2 = cpu_to_le16(0x0);
  597. for (i = 0; i < priv->iq_autocal_len; i++) {
  598. if (priv->iq_autocal[i].freq != freq)
  599. continue;
  600. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  601. sizeof(*priv->iq_autocal));
  602. break;
  603. }
  604. if (i == priv->iq_autocal_len)
  605. goto err;
  606. for (i = 0; i < priv->output_limit_len; i++) {
  607. if (priv->output_limit[i].freq != freq)
  608. continue;
  609. chan->val_barker = 0x38;
  610. chan->val_bpsk = priv->output_limit[i].val_bpsk;
  611. chan->val_qpsk = priv->output_limit[i].val_qpsk;
  612. chan->val_16qam = priv->output_limit[i].val_16qam;
  613. chan->val_64qam = priv->output_limit[i].val_64qam;
  614. break;
  615. }
  616. if (i == priv->output_limit_len)
  617. goto err;
  618. chan->pa_points_per_curve = priv->curve_data->points_per_channel;
  619. entry = priv->curve_data->data;
  620. for (i = 0; i < priv->curve_data->channels; i++) {
  621. if (*((__le16 *)entry) != freq) {
  622. entry += sizeof(__le16);
  623. entry += sizeof(struct pda_pa_curve_data_sample_rev1) *
  624. chan->pa_points_per_curve;
  625. continue;
  626. }
  627. entry += sizeof(__le16);
  628. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  629. chan->pa_points_per_curve);
  630. break;
  631. }
  632. memcpy(hdr->data + payload_len - 4, &chan->val_bpsk, 4);
  633. priv->tx(dev, hdr, sizeof(*hdr) + payload_len, 1);
  634. return 0;
  635. err:
  636. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  637. kfree(hdr);
  638. return -EINVAL;
  639. }
  640. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  641. {
  642. struct p54_common *priv = dev->priv;
  643. struct p54_control_hdr *hdr;
  644. struct p54_tx_control_led *led;
  645. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  646. priv->tx_hdr_len, GFP_KERNEL);
  647. if (!hdr)
  648. return -ENOMEM;
  649. hdr = (void *)hdr + priv->tx_hdr_len;
  650. hdr->magic1 = cpu_to_le16(0x8001);
  651. hdr->len = cpu_to_le16(sizeof(*led));
  652. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  653. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led), NULL);
  654. led = (struct p54_tx_control_led *) hdr->data;
  655. led->mode = cpu_to_le16(mode);
  656. led->led_permanent = cpu_to_le16(link);
  657. led->led_temporary = cpu_to_le16(act);
  658. led->duration = cpu_to_le16(1000);
  659. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  660. return 0;
  661. }
  662. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  663. do { \
  664. queue.aifs = cpu_to_le16(ai_fs); \
  665. queue.cwmin = cpu_to_le16(cw_min); \
  666. queue.cwmax = cpu_to_le16(cw_max); \
  667. queue.txop = cpu_to_le16(_txop); \
  668. } while(0)
  669. static void p54_init_vdcf(struct ieee80211_hw *dev)
  670. {
  671. struct p54_common *priv = dev->priv;
  672. struct p54_control_hdr *hdr;
  673. struct p54_tx_control_vdcf *vdcf;
  674. /* all USB V1 adapters need a extra headroom */
  675. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  676. hdr->magic1 = cpu_to_le16(0x8001);
  677. hdr->len = cpu_to_le16(sizeof(*vdcf));
  678. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  679. hdr->req_id = cpu_to_le32(priv->rx_start);
  680. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  681. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
  682. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
  683. P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
  684. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
  685. }
  686. static void p54_set_vdcf(struct ieee80211_hw *dev)
  687. {
  688. struct p54_common *priv = dev->priv;
  689. struct p54_control_hdr *hdr;
  690. struct p54_tx_control_vdcf *vdcf;
  691. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  692. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf), NULL);
  693. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  694. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  695. vdcf->slottime = 9;
  696. vdcf->magic1 = 0x00;
  697. vdcf->magic2 = 0x10;
  698. } else {
  699. vdcf->slottime = 20;
  700. vdcf->magic1 = 0x0a;
  701. vdcf->magic2 = 0x06;
  702. }
  703. /* (see prism54/isl_oid.h for further details) */
  704. vdcf->frameburst = cpu_to_le16(0);
  705. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  706. }
  707. static int p54_start(struct ieee80211_hw *dev)
  708. {
  709. struct p54_common *priv = dev->priv;
  710. int err;
  711. err = priv->open(dev);
  712. if (!err)
  713. priv->mode = IEEE80211_IF_TYPE_MNTR;
  714. return err;
  715. }
  716. static void p54_stop(struct ieee80211_hw *dev)
  717. {
  718. struct p54_common *priv = dev->priv;
  719. struct sk_buff *skb;
  720. while ((skb = skb_dequeue(&priv->tx_queue))) {
  721. struct memrecord *range = (struct memrecord *)&skb->cb;
  722. if (range->control)
  723. kfree(range->control);
  724. kfree_skb(skb);
  725. }
  726. priv->stop(dev);
  727. priv->mode = IEEE80211_IF_TYPE_INVALID;
  728. }
  729. static int p54_add_interface(struct ieee80211_hw *dev,
  730. struct ieee80211_if_init_conf *conf)
  731. {
  732. struct p54_common *priv = dev->priv;
  733. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  734. return -EOPNOTSUPP;
  735. switch (conf->type) {
  736. case IEEE80211_IF_TYPE_STA:
  737. priv->mode = conf->type;
  738. break;
  739. default:
  740. return -EOPNOTSUPP;
  741. }
  742. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  743. p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
  744. p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
  745. switch (conf->type) {
  746. case IEEE80211_IF_TYPE_STA:
  747. p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
  748. break;
  749. default:
  750. BUG(); /* impossible */
  751. break;
  752. }
  753. p54_set_leds(dev, 1, 0, 0);
  754. return 0;
  755. }
  756. static void p54_remove_interface(struct ieee80211_hw *dev,
  757. struct ieee80211_if_init_conf *conf)
  758. {
  759. struct p54_common *priv = dev->priv;
  760. priv->mode = IEEE80211_IF_TYPE_MNTR;
  761. memset(priv->mac_addr, 0, ETH_ALEN);
  762. p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
  763. }
  764. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  765. {
  766. int ret;
  767. ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
  768. p54_set_vdcf(dev);
  769. return ret;
  770. }
  771. static int p54_config_interface(struct ieee80211_hw *dev,
  772. struct ieee80211_vif *vif,
  773. struct ieee80211_if_conf *conf)
  774. {
  775. struct p54_common *priv = dev->priv;
  776. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
  777. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
  778. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  779. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  780. return 0;
  781. }
  782. static void p54_configure_filter(struct ieee80211_hw *dev,
  783. unsigned int changed_flags,
  784. unsigned int *total_flags,
  785. int mc_count, struct dev_mc_list *mclist)
  786. {
  787. struct p54_common *priv = dev->priv;
  788. *total_flags &= FIF_BCN_PRBRESP_PROMISC;
  789. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  790. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  791. p54_set_filter(dev, 0, priv->mac_addr,
  792. NULL, 2, 0, 0, 0);
  793. else
  794. p54_set_filter(dev, 0, priv->mac_addr,
  795. priv->bssid, 2, 0, 0, 0);
  796. }
  797. }
  798. static int p54_conf_tx(struct ieee80211_hw *dev, int queue,
  799. const struct ieee80211_tx_queue_params *params)
  800. {
  801. struct p54_common *priv = dev->priv;
  802. struct p54_tx_control_vdcf *vdcf;
  803. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  804. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  805. if ((params) && !((queue < 0) || (queue > 4))) {
  806. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  807. params->cw_min, params->cw_max, params->txop);
  808. } else
  809. return -EINVAL;
  810. p54_set_vdcf(dev);
  811. return 0;
  812. }
  813. static int p54_get_stats(struct ieee80211_hw *dev,
  814. struct ieee80211_low_level_stats *stats)
  815. {
  816. /* TODO */
  817. return 0;
  818. }
  819. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  820. struct ieee80211_tx_queue_stats *stats)
  821. {
  822. struct p54_common *priv = dev->priv;
  823. unsigned int i;
  824. for (i = 0; i < dev->queues; i++)
  825. memcpy(&stats->data[i], &priv->tx_stats.data[i],
  826. sizeof(stats->data[i]));
  827. return 0;
  828. }
  829. static const struct ieee80211_ops p54_ops = {
  830. .tx = p54_tx,
  831. .start = p54_start,
  832. .stop = p54_stop,
  833. .add_interface = p54_add_interface,
  834. .remove_interface = p54_remove_interface,
  835. .config = p54_config,
  836. .config_interface = p54_config_interface,
  837. .configure_filter = p54_configure_filter,
  838. .conf_tx = p54_conf_tx,
  839. .get_stats = p54_get_stats,
  840. .get_tx_stats = p54_get_tx_stats
  841. };
  842. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  843. {
  844. struct ieee80211_hw *dev;
  845. struct p54_common *priv;
  846. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  847. if (!dev)
  848. return NULL;
  849. priv = dev->priv;
  850. priv->mode = IEEE80211_IF_TYPE_INVALID;
  851. skb_queue_head_init(&priv->tx_queue);
  852. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  853. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  854. IEEE80211_HW_RX_INCLUDES_FCS;
  855. dev->channel_change_time = 1000; /* TODO: find actual value */
  856. dev->max_rssi = 127;
  857. priv->tx_stats.data[0].limit = 5;
  858. dev->queues = 1;
  859. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  860. sizeof(struct p54_tx_control_allocdata);
  861. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
  862. priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
  863. if (!priv->cached_vdcf) {
  864. ieee80211_free_hw(dev);
  865. return NULL;
  866. }
  867. p54_init_vdcf(dev);
  868. return dev;
  869. }
  870. EXPORT_SYMBOL_GPL(p54_init_common);
  871. void p54_free_common(struct ieee80211_hw *dev)
  872. {
  873. struct p54_common *priv = dev->priv;
  874. kfree(priv->iq_autocal);
  875. kfree(priv->output_limit);
  876. kfree(priv->curve_data);
  877. kfree(priv->cached_vdcf);
  878. }
  879. EXPORT_SYMBOL_GPL(p54_free_common);
  880. static int __init p54_init(void)
  881. {
  882. return 0;
  883. }
  884. static void __exit p54_exit(void)
  885. {
  886. }
  887. module_init(p54_init);
  888. module_exit(p54_exit);