board-da850-evm.c 16 KB

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  1. /*
  2. * TI DA850/OMAP-L138 EVM board
  3. *
  4. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Derived from: arch/arm/mach-davinci/board-da830-evm.c
  7. * Original Copyrights follow:
  8. *
  9. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/i2c.h>
  18. #include <linux/i2c/at24.h>
  19. #include <linux/i2c/pca953x.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/mtd/mtd.h>
  23. #include <linux/mtd/nand.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/regulator/machine.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <mach/cp_intc.h>
  30. #include <mach/da8xx.h>
  31. #include <mach/nand.h>
  32. #include <mach/mux.h>
  33. #define DA850_EVM_PHY_MASK 0x1
  34. #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
  35. #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
  36. #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
  37. #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
  38. #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
  39. #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
  40. static struct mtd_partition da850_evm_norflash_partition[] = {
  41. {
  42. .name = "NOR filesystem",
  43. .offset = 0,
  44. .size = MTDPART_SIZ_FULL,
  45. .mask_flags = 0,
  46. },
  47. };
  48. static struct physmap_flash_data da850_evm_norflash_data = {
  49. .width = 2,
  50. .parts = da850_evm_norflash_partition,
  51. .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
  52. };
  53. static struct resource da850_evm_norflash_resource[] = {
  54. {
  55. .start = DA8XX_AEMIF_CS2_BASE,
  56. .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
  57. .flags = IORESOURCE_MEM,
  58. },
  59. };
  60. static struct platform_device da850_evm_norflash_device = {
  61. .name = "physmap-flash",
  62. .id = 0,
  63. .dev = {
  64. .platform_data = &da850_evm_norflash_data,
  65. },
  66. .num_resources = 1,
  67. .resource = da850_evm_norflash_resource,
  68. };
  69. /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
  70. * (128K blocks). It may be used instead of the (default) SPI flash
  71. * to boot, using TI's tools to install the secondary boot loader
  72. * (UBL) and U-Boot.
  73. */
  74. struct mtd_partition da850_evm_nandflash_partition[] = {
  75. {
  76. .name = "u-boot env",
  77. .offset = 0,
  78. .size = SZ_128K,
  79. .mask_flags = MTD_WRITEABLE,
  80. },
  81. {
  82. .name = "UBL",
  83. .offset = MTDPART_OFS_APPEND,
  84. .size = SZ_128K,
  85. .mask_flags = MTD_WRITEABLE,
  86. },
  87. {
  88. .name = "u-boot",
  89. .offset = MTDPART_OFS_APPEND,
  90. .size = 4 * SZ_128K,
  91. .mask_flags = MTD_WRITEABLE,
  92. },
  93. {
  94. .name = "kernel",
  95. .offset = 0x200000,
  96. .size = SZ_2M,
  97. .mask_flags = 0,
  98. },
  99. {
  100. .name = "filesystem",
  101. .offset = MTDPART_OFS_APPEND,
  102. .size = MTDPART_SIZ_FULL,
  103. .mask_flags = 0,
  104. },
  105. };
  106. static struct davinci_nand_pdata da850_evm_nandflash_data = {
  107. .parts = da850_evm_nandflash_partition,
  108. .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
  109. .ecc_mode = NAND_ECC_HW,
  110. .options = NAND_USE_FLASH_BBT,
  111. };
  112. static struct resource da850_evm_nandflash_resource[] = {
  113. {
  114. .start = DA8XX_AEMIF_CS3_BASE,
  115. .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .start = DA8XX_AEMIF_CTL_BASE,
  120. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. };
  124. static struct platform_device da850_evm_nandflash_device = {
  125. .name = "davinci_nand",
  126. .id = 1,
  127. .dev = {
  128. .platform_data = &da850_evm_nandflash_data,
  129. },
  130. .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
  131. .resource = da850_evm_nandflash_resource,
  132. };
  133. static u32 ui_card_detected;
  134. static void da850_evm_setup_nor_nand(void);
  135. #ifdef CONFIG_DA850_UI_RMII
  136. static inline void da850_evm_setup_emac_rmii(int rmii_sel)
  137. {
  138. struct davinci_soc_info *soc_info = &davinci_soc_info;
  139. soc_info->emac_pdata->rmii_en = 1;
  140. gpio_set_value(rmii_sel, 0);
  141. }
  142. #else
  143. static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
  144. #endif
  145. static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
  146. unsigned ngpio, void *c)
  147. {
  148. int sel_a, sel_b, sel_c, ret;
  149. sel_a = gpio + 7;
  150. sel_b = gpio + 6;
  151. sel_c = gpio + 5;
  152. ret = gpio_request(sel_a, "sel_a");
  153. if (ret) {
  154. pr_warning("Cannot open UI expander pin %d\n", sel_a);
  155. goto exp_setup_sela_fail;
  156. }
  157. ret = gpio_request(sel_b, "sel_b");
  158. if (ret) {
  159. pr_warning("Cannot open UI expander pin %d\n", sel_b);
  160. goto exp_setup_selb_fail;
  161. }
  162. ret = gpio_request(sel_c, "sel_c");
  163. if (ret) {
  164. pr_warning("Cannot open UI expander pin %d\n", sel_c);
  165. goto exp_setup_selc_fail;
  166. }
  167. /* deselect all functionalities */
  168. gpio_direction_output(sel_a, 1);
  169. gpio_direction_output(sel_b, 1);
  170. gpio_direction_output(sel_c, 1);
  171. ui_card_detected = 1;
  172. pr_info("DA850/OMAP-L138 EVM UI card detected\n");
  173. da850_evm_setup_nor_nand();
  174. da850_evm_setup_emac_rmii(sel_a);
  175. return 0;
  176. exp_setup_selc_fail:
  177. gpio_free(sel_b);
  178. exp_setup_selb_fail:
  179. gpio_free(sel_a);
  180. exp_setup_sela_fail:
  181. return ret;
  182. }
  183. static int da850_evm_ui_expander_teardown(struct i2c_client *client,
  184. unsigned gpio, unsigned ngpio, void *c)
  185. {
  186. /* deselect all functionalities */
  187. gpio_set_value(gpio + 5, 1);
  188. gpio_set_value(gpio + 6, 1);
  189. gpio_set_value(gpio + 7, 1);
  190. gpio_free(gpio + 5);
  191. gpio_free(gpio + 6);
  192. gpio_free(gpio + 7);
  193. return 0;
  194. }
  195. static struct pca953x_platform_data da850_evm_ui_expander_info = {
  196. .gpio_base = DAVINCI_N_GPIO,
  197. .setup = da850_evm_ui_expander_setup,
  198. .teardown = da850_evm_ui_expander_teardown,
  199. };
  200. static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
  201. {
  202. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  203. },
  204. {
  205. I2C_BOARD_INFO("tca6416", 0x20),
  206. .platform_data = &da850_evm_ui_expander_info,
  207. },
  208. };
  209. static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
  210. .bus_freq = 100, /* kHz */
  211. .bus_delay = 0, /* usec */
  212. };
  213. static struct davinci_uart_config da850_evm_uart_config __initdata = {
  214. .enabled_uarts = 0x7,
  215. };
  216. static struct platform_device *da850_evm_devices[] __initdata = {
  217. &da850_evm_nandflash_device,
  218. &da850_evm_norflash_device,
  219. };
  220. /* davinci da850 evm audio machine driver */
  221. static u8 da850_iis_serializer_direction[] = {
  222. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  223. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  224. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
  225. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  226. };
  227. static struct snd_platform_data da850_evm_snd_data = {
  228. .tx_dma_offset = 0x2000,
  229. .rx_dma_offset = 0x2000,
  230. .op_mode = DAVINCI_MCASP_IIS_MODE,
  231. .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
  232. .tdm_slots = 2,
  233. .serial_dir = da850_iis_serializer_direction,
  234. .eventq_no = EVENTQ_1,
  235. .version = MCASP_VERSION_2,
  236. .txnumevt = 1,
  237. .rxnumevt = 1,
  238. };
  239. static int da850_evm_mmc_get_ro(int index)
  240. {
  241. return gpio_get_value(DA850_MMCSD_WP_PIN);
  242. }
  243. static int da850_evm_mmc_get_cd(int index)
  244. {
  245. return !gpio_get_value(DA850_MMCSD_CD_PIN);
  246. }
  247. static struct davinci_mmc_config da850_mmc_config = {
  248. .get_ro = da850_evm_mmc_get_ro,
  249. .get_cd = da850_evm_mmc_get_cd,
  250. .wires = 4,
  251. .version = MMC_CTLR_VERSION_2,
  252. };
  253. static int da850_lcd_hw_init(void)
  254. {
  255. int status;
  256. status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
  257. if (status < 0)
  258. return status;
  259. status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
  260. if (status < 0) {
  261. gpio_free(DA850_LCD_BL_PIN);
  262. return status;
  263. }
  264. gpio_direction_output(DA850_LCD_BL_PIN, 0);
  265. gpio_direction_output(DA850_LCD_PWR_PIN, 0);
  266. /* disable lcd backlight */
  267. gpio_set_value(DA850_LCD_BL_PIN, 0);
  268. /* disable lcd power */
  269. gpio_set_value(DA850_LCD_PWR_PIN, 0);
  270. /* enable lcd power */
  271. gpio_set_value(DA850_LCD_PWR_PIN, 1);
  272. /* enable lcd backlight */
  273. gpio_set_value(DA850_LCD_BL_PIN, 1);
  274. return 0;
  275. }
  276. #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
  277. #define DA8XX_AEMIF_ASIZE_16BIT 0x1
  278. static void __init da850_evm_init_nor(void)
  279. {
  280. void __iomem *aemif_addr;
  281. aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
  282. /* Configure data bus width of CS2 to 16 bit */
  283. writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
  284. DA8XX_AEMIF_ASIZE_16BIT,
  285. aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
  286. iounmap(aemif_addr);
  287. }
  288. /* TPS65070 voltage regulator support */
  289. /* 3.3V */
  290. struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
  291. {
  292. .supply = "usb0_vdda33",
  293. },
  294. {
  295. .supply = "usb1_vdda33",
  296. },
  297. };
  298. /* 3.3V or 1.8V */
  299. struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
  300. {
  301. .supply = "dvdd3318_a",
  302. },
  303. {
  304. .supply = "dvdd3318_b",
  305. },
  306. {
  307. .supply = "dvdd3318_c",
  308. },
  309. };
  310. /* 1.2V */
  311. struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
  312. {
  313. .supply = "cvdd",
  314. },
  315. };
  316. /* 1.8V LDO */
  317. struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
  318. {
  319. .supply = "sata_vddr",
  320. },
  321. {
  322. .supply = "usb0_vdda18",
  323. },
  324. {
  325. .supply = "usb1_vdda18",
  326. },
  327. {
  328. .supply = "ddr_dvdd18",
  329. },
  330. };
  331. /* 1.2V LDO */
  332. struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
  333. {
  334. .supply = "sata_vdd",
  335. },
  336. {
  337. .supply = "pll0_vdda",
  338. },
  339. {
  340. .supply = "pll1_vdda",
  341. },
  342. {
  343. .supply = "usbs_cvdd",
  344. },
  345. {
  346. .supply = "vddarnwa1",
  347. },
  348. };
  349. struct regulator_init_data tps65070_regulator_data[] = {
  350. /* dcdc1 */
  351. {
  352. .constraints = {
  353. .min_uV = 3150000,
  354. .max_uV = 3450000,
  355. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  356. REGULATOR_CHANGE_STATUS),
  357. .boot_on = 1,
  358. },
  359. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
  360. .consumer_supplies = tps65070_dcdc1_consumers,
  361. },
  362. /* dcdc2 */
  363. {
  364. .constraints = {
  365. .min_uV = 1710000,
  366. .max_uV = 3450000,
  367. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  368. REGULATOR_CHANGE_STATUS),
  369. .boot_on = 1,
  370. },
  371. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
  372. .consumer_supplies = tps65070_dcdc2_consumers,
  373. },
  374. /* dcdc3 */
  375. {
  376. .constraints = {
  377. .min_uV = 950000,
  378. .max_uV = 1320000,
  379. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  380. REGULATOR_CHANGE_STATUS),
  381. .boot_on = 1,
  382. },
  383. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
  384. .consumer_supplies = tps65070_dcdc3_consumers,
  385. },
  386. /* ldo1 */
  387. {
  388. .constraints = {
  389. .min_uV = 1710000,
  390. .max_uV = 1890000,
  391. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  392. REGULATOR_CHANGE_STATUS),
  393. .boot_on = 1,
  394. },
  395. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
  396. .consumer_supplies = tps65070_ldo1_consumers,
  397. },
  398. /* ldo2 */
  399. {
  400. .constraints = {
  401. .min_uV = 1140000,
  402. .max_uV = 1320000,
  403. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  404. REGULATOR_CHANGE_STATUS),
  405. .boot_on = 1,
  406. },
  407. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
  408. .consumer_supplies = tps65070_ldo2_consumers,
  409. },
  410. };
  411. static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
  412. {
  413. I2C_BOARD_INFO("tps6507x", 0x48),
  414. .platform_data = &tps65070_regulator_data[0],
  415. },
  416. };
  417. static int __init pmic_tps65070_init(void)
  418. {
  419. return i2c_register_board_info(1, da850evm_tps65070_info,
  420. ARRAY_SIZE(da850evm_tps65070_info));
  421. }
  422. #if defined(CONFIG_MMC_DAVINCI) || \
  423. defined(CONFIG_MMC_DAVINCI_MODULE)
  424. #define HAS_MMC 1
  425. #else
  426. #define HAS_MMC 0
  427. #endif
  428. static void da850_evm_setup_nor_nand(void)
  429. {
  430. int ret = 0;
  431. if (ui_card_detected & !HAS_MMC) {
  432. ret = da8xx_pinmux_setup(da850_nand_pins);
  433. if (ret)
  434. pr_warning("da850_evm_init: nand mux setup failed: "
  435. "%d\n", ret);
  436. ret = da8xx_pinmux_setup(da850_nor_pins);
  437. if (ret)
  438. pr_warning("da850_evm_init: nor mux setup failed: %d\n",
  439. ret);
  440. da850_evm_init_nor();
  441. platform_add_devices(da850_evm_devices,
  442. ARRAY_SIZE(da850_evm_devices));
  443. }
  444. }
  445. static const short da850_evm_lcdc_pins[] = {
  446. DA850_GPIO2_8, DA850_GPIO2_15,
  447. -1
  448. };
  449. static int __init da850_evm_config_emac(void)
  450. {
  451. void __iomem *cfg_chip3_base;
  452. int ret;
  453. u32 val;
  454. struct davinci_soc_info *soc_info = &davinci_soc_info;
  455. u8 rmii_en = soc_info->emac_pdata->rmii_en;
  456. if (!machine_is_davinci_da850_evm())
  457. return 0;
  458. cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
  459. /* configure the CFGCHIP3 register for RMII or MII */
  460. val = __raw_readl(cfg_chip3_base);
  461. if (rmii_en)
  462. val |= BIT(8);
  463. else
  464. val &= ~BIT(8);
  465. __raw_writel(val, cfg_chip3_base);
  466. if (!rmii_en)
  467. ret = da8xx_pinmux_setup(da850_cpgmac_pins);
  468. else
  469. ret = da8xx_pinmux_setup(da850_rmii_pins);
  470. if (ret)
  471. pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
  472. ret);
  473. ret = davinci_cfg_reg(DA850_GPIO2_6);
  474. if (ret)
  475. pr_warning("da850_evm_init:GPIO(2,6) mux setup "
  476. "failed\n");
  477. ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
  478. if (ret) {
  479. pr_warning("Cannot open GPIO %d\n",
  480. DA850_MII_MDIO_CLKEN_PIN);
  481. return ret;
  482. }
  483. if (rmii_en) {
  484. /* Disable MII MDIO clock */
  485. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 1);
  486. pr_info("EMAC: RMII PHY configured, MII PHY will not be"
  487. " functional\n");
  488. } else {
  489. /* Enable MII MDIO clock */
  490. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 0);
  491. pr_info("EMAC: MII PHY configured, RMII PHY will not be"
  492. " functional\n");
  493. }
  494. soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
  495. soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
  496. ret = da8xx_register_emac();
  497. if (ret)
  498. pr_warning("da850_evm_init: emac registration failed: %d\n",
  499. ret);
  500. return 0;
  501. }
  502. device_initcall(da850_evm_config_emac);
  503. static __init void da850_evm_init(void)
  504. {
  505. int ret;
  506. ret = pmic_tps65070_init();
  507. if (ret)
  508. pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
  509. ret);
  510. ret = da8xx_register_edma();
  511. if (ret)
  512. pr_warning("da850_evm_init: edma registration failed: %d\n",
  513. ret);
  514. ret = da8xx_pinmux_setup(da850_i2c0_pins);
  515. if (ret)
  516. pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
  517. ret);
  518. ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
  519. if (ret)
  520. pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
  521. ret);
  522. ret = da8xx_register_watchdog();
  523. if (ret)
  524. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  525. ret);
  526. if (HAS_MMC) {
  527. ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
  528. if (ret)
  529. pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
  530. " %d\n", ret);
  531. ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
  532. if (ret)
  533. pr_warning("da850_evm_init: can not open GPIO %d\n",
  534. DA850_MMCSD_CD_PIN);
  535. gpio_direction_input(DA850_MMCSD_CD_PIN);
  536. ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
  537. if (ret)
  538. pr_warning("da850_evm_init: can not open GPIO %d\n",
  539. DA850_MMCSD_WP_PIN);
  540. gpio_direction_input(DA850_MMCSD_WP_PIN);
  541. ret = da8xx_register_mmcsd0(&da850_mmc_config);
  542. if (ret)
  543. pr_warning("da850_evm_init: mmcsd0 registration failed:"
  544. " %d\n", ret);
  545. }
  546. davinci_serial_init(&da850_evm_uart_config);
  547. i2c_register_board_info(1, da850_evm_i2c_devices,
  548. ARRAY_SIZE(da850_evm_i2c_devices));
  549. /*
  550. * shut down uart 0 and 1; they are not used on the board and
  551. * accessing them causes endless "too much work in irq53" messages
  552. * with arago fs
  553. */
  554. __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
  555. __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
  556. ret = da8xx_pinmux_setup(da850_mcasp_pins);
  557. if (ret)
  558. pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
  559. ret);
  560. da8xx_register_mcasp(0, &da850_evm_snd_data);
  561. ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
  562. if (ret)
  563. pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
  564. ret);
  565. /* Handle board specific muxing for LCD here */
  566. ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
  567. if (ret)
  568. pr_warning("da850_evm_init: evm specific lcd mux setup "
  569. "failed: %d\n", ret);
  570. ret = da850_lcd_hw_init();
  571. if (ret)
  572. pr_warning("da850_evm_init: lcd initialization failed: %d\n",
  573. ret);
  574. ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
  575. if (ret)
  576. pr_warning("da850_evm_init: lcdc registration failed: %d\n",
  577. ret);
  578. ret = da8xx_register_rtc();
  579. if (ret)
  580. pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
  581. ret = da850_register_cpufreq();
  582. if (ret)
  583. pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
  584. ret);
  585. }
  586. #ifdef CONFIG_SERIAL_8250_CONSOLE
  587. static int __init da850_evm_console_init(void)
  588. {
  589. return add_preferred_console("ttyS", 2, "115200");
  590. }
  591. console_initcall(da850_evm_console_init);
  592. #endif
  593. static __init void da850_evm_irq_init(void)
  594. {
  595. struct davinci_soc_info *soc_info = &davinci_soc_info;
  596. cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
  597. soc_info->intc_irq_prios);
  598. }
  599. static void __init da850_evm_map_io(void)
  600. {
  601. da850_init();
  602. }
  603. MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
  604. .phys_io = IO_PHYS,
  605. .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
  606. .boot_params = (DA8XX_DDR_BASE + 0x100),
  607. .map_io = da850_evm_map_io,
  608. .init_irq = da850_evm_irq_init,
  609. .timer = &davinci_timer,
  610. .init_machine = da850_evm_init,
  611. MACHINE_END