fsl-diu-fb.c 43 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * Freescale DIU Frame Buffer device driver
  5. *
  6. * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
  7. * Paul Widmer <paul.widmer@freescale.com>
  8. * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
  9. * York Sun <yorksun@freescale.com>
  10. *
  11. * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/slab.h>
  24. #include <linux/fb.h>
  25. #include <linux/init.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/vmalloc.h>
  32. #include <sysdev/fsl_soc.h>
  33. #include <linux/fsl-diu-fb.h>
  34. #include "edid.h"
  35. /*
  36. * List of supported video modes
  37. *
  38. * The first entry is the default video mode
  39. */
  40. static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
  41. {
  42. .name = "1024x768-60",
  43. .refresh = 60,
  44. .xres = 1024,
  45. .yres = 768,
  46. .pixclock = 15385,
  47. .left_margin = 160,
  48. .right_margin = 24,
  49. .upper_margin = 29,
  50. .lower_margin = 3,
  51. .hsync_len = 136,
  52. .vsync_len = 6,
  53. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  54. .vmode = FB_VMODE_NONINTERLACED
  55. },
  56. {
  57. .name = "1024x768-70",
  58. .refresh = 70,
  59. .xres = 1024,
  60. .yres = 768,
  61. .pixclock = 16886,
  62. .left_margin = 3,
  63. .right_margin = 3,
  64. .upper_margin = 2,
  65. .lower_margin = 2,
  66. .hsync_len = 40,
  67. .vsync_len = 18,
  68. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  69. .vmode = FB_VMODE_NONINTERLACED
  70. },
  71. {
  72. .name = "1024x768-75",
  73. .refresh = 75,
  74. .xres = 1024,
  75. .yres = 768,
  76. .pixclock = 15009,
  77. .left_margin = 3,
  78. .right_margin = 3,
  79. .upper_margin = 2,
  80. .lower_margin = 2,
  81. .hsync_len = 80,
  82. .vsync_len = 32,
  83. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  84. .vmode = FB_VMODE_NONINTERLACED
  85. },
  86. {
  87. .name = "1280x1024-60",
  88. .refresh = 60,
  89. .xres = 1280,
  90. .yres = 1024,
  91. .pixclock = 9375,
  92. .left_margin = 38,
  93. .right_margin = 128,
  94. .upper_margin = 2,
  95. .lower_margin = 7,
  96. .hsync_len = 216,
  97. .vsync_len = 37,
  98. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  99. .vmode = FB_VMODE_NONINTERLACED
  100. },
  101. {
  102. .name = "1280x1024-70",
  103. .refresh = 70,
  104. .xres = 1280,
  105. .yres = 1024,
  106. .pixclock = 9380,
  107. .left_margin = 6,
  108. .right_margin = 6,
  109. .upper_margin = 4,
  110. .lower_margin = 4,
  111. .hsync_len = 60,
  112. .vsync_len = 94,
  113. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  114. .vmode = FB_VMODE_NONINTERLACED
  115. },
  116. {
  117. .name = "1280x1024-75",
  118. .refresh = 75,
  119. .xres = 1280,
  120. .yres = 1024,
  121. .pixclock = 9380,
  122. .left_margin = 6,
  123. .right_margin = 6,
  124. .upper_margin = 4,
  125. .lower_margin = 4,
  126. .hsync_len = 60,
  127. .vsync_len = 15,
  128. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  129. .vmode = FB_VMODE_NONINTERLACED
  130. },
  131. {
  132. .name = "320x240", /* for AOI only */
  133. .refresh = 60,
  134. .xres = 320,
  135. .yres = 240,
  136. .pixclock = 15385,
  137. .left_margin = 0,
  138. .right_margin = 0,
  139. .upper_margin = 0,
  140. .lower_margin = 0,
  141. .hsync_len = 0,
  142. .vsync_len = 0,
  143. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  144. .vmode = FB_VMODE_NONINTERLACED
  145. },
  146. {
  147. .name = "1280x480-60",
  148. .refresh = 60,
  149. .xres = 1280,
  150. .yres = 480,
  151. .pixclock = 18939,
  152. .left_margin = 353,
  153. .right_margin = 47,
  154. .upper_margin = 39,
  155. .lower_margin = 4,
  156. .hsync_len = 8,
  157. .vsync_len = 2,
  158. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  159. .vmode = FB_VMODE_NONINTERLACED
  160. },
  161. };
  162. static char *fb_mode = "1024x768-32@60";
  163. static unsigned long default_bpp = 32;
  164. static enum fsl_diu_monitor_port monitor_port;
  165. static char *monitor_string;
  166. #if defined(CONFIG_NOT_COHERENT_CACHE)
  167. static u8 *coherence_data;
  168. static size_t coherence_data_size;
  169. static unsigned int d_cache_line_size;
  170. #endif
  171. static DEFINE_SPINLOCK(diu_lock);
  172. struct fsl_diu_data {
  173. struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
  174. /*FSL_AOI_NUM has one dummy AOI */
  175. struct device_attribute dev_attr;
  176. struct diu_ad *dummy_ad;
  177. void *dummy_aoi_virt;
  178. unsigned int irq;
  179. int fb_enabled;
  180. enum fsl_diu_monitor_port monitor_port;
  181. };
  182. struct mfb_info {
  183. int index;
  184. int type;
  185. char *id;
  186. int registered;
  187. int blank;
  188. unsigned long pseudo_palette[16];
  189. struct diu_ad *ad;
  190. int cursor_reset;
  191. unsigned char g_alpha;
  192. unsigned int count;
  193. int x_aoi_d; /* aoi display x offset to physical screen */
  194. int y_aoi_d; /* aoi display y offset to physical screen */
  195. struct fsl_diu_data *parent;
  196. u8 *edid_data;
  197. };
  198. static struct mfb_info mfb_template[] = {
  199. { /* AOI 0 for plane 0 */
  200. .index = 0,
  201. .type = MFB_TYPE_OUTPUT,
  202. .id = "Panel0",
  203. .registered = 0,
  204. .count = 0,
  205. .x_aoi_d = 0,
  206. .y_aoi_d = 0,
  207. },
  208. { /* AOI 0 for plane 1 */
  209. .index = 1,
  210. .type = MFB_TYPE_OUTPUT,
  211. .id = "Panel1 AOI0",
  212. .registered = 0,
  213. .g_alpha = 0xff,
  214. .count = 0,
  215. .x_aoi_d = 0,
  216. .y_aoi_d = 0,
  217. },
  218. { /* AOI 1 for plane 1 */
  219. .index = 2,
  220. .type = MFB_TYPE_OUTPUT,
  221. .id = "Panel1 AOI1",
  222. .registered = 0,
  223. .g_alpha = 0xff,
  224. .count = 0,
  225. .x_aoi_d = 0,
  226. .y_aoi_d = 480,
  227. },
  228. { /* AOI 0 for plane 2 */
  229. .index = 3,
  230. .type = MFB_TYPE_OUTPUT,
  231. .id = "Panel2 AOI0",
  232. .registered = 0,
  233. .g_alpha = 0xff,
  234. .count = 0,
  235. .x_aoi_d = 640,
  236. .y_aoi_d = 0,
  237. },
  238. { /* AOI 1 for plane 2 */
  239. .index = 4,
  240. .type = MFB_TYPE_OUTPUT,
  241. .id = "Panel2 AOI1",
  242. .registered = 0,
  243. .g_alpha = 0xff,
  244. .count = 0,
  245. .x_aoi_d = 640,
  246. .y_aoi_d = 480,
  247. },
  248. };
  249. static struct diu_hw dr = {
  250. .mode = MFB_MODE1,
  251. .reg_lock = __SPIN_LOCK_UNLOCKED(diu_hw.reg_lock),
  252. };
  253. static struct diu_pool pool;
  254. /**
  255. * fsl_diu_name_to_port - convert a port name to a monitor port enum
  256. *
  257. * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns
  258. * the enum fsl_diu_monitor_port that corresponds to that string.
  259. *
  260. * For compatibility with older versions, a number ("0", "1", or "2") is also
  261. * supported.
  262. *
  263. * If the string is unknown, DVI is assumed.
  264. *
  265. * If the particular port is not supported by the platform, another port
  266. * (platform-specific) is chosen instead.
  267. */
  268. static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s)
  269. {
  270. enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI;
  271. unsigned long val;
  272. if (s) {
  273. if (!strict_strtoul(s, 10, &val) && (val <= 2))
  274. port = (enum fsl_diu_monitor_port) val;
  275. else if (strncmp(s, "lvds", 4) == 0)
  276. port = FSL_DIU_PORT_LVDS;
  277. else if (strncmp(s, "dlvds", 5) == 0)
  278. port = FSL_DIU_PORT_DLVDS;
  279. }
  280. return diu_ops.valid_monitor_port(port);
  281. }
  282. /**
  283. * fsl_diu_alloc - allocate memory for the DIU
  284. * @size: number of bytes to allocate
  285. * @param: returned physical address of memory
  286. *
  287. * This function allocates a physically-contiguous block of memory.
  288. */
  289. static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
  290. {
  291. void *virt;
  292. virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
  293. if (virt)
  294. *phys = virt_to_phys(virt);
  295. return virt;
  296. }
  297. /**
  298. * fsl_diu_free - release DIU memory
  299. * @virt: pointer returned by fsl_diu_alloc()
  300. * @size: number of bytes allocated by fsl_diu_alloc()
  301. *
  302. * This function releases memory allocated by fsl_diu_alloc().
  303. */
  304. static void fsl_diu_free(void *virt, size_t size)
  305. {
  306. if (virt && size)
  307. free_pages_exact(virt, size);
  308. }
  309. /*
  310. * Workaround for failed writing desc register of planes.
  311. * Needed with MPC5121 DIU rev 2.0 silicon.
  312. */
  313. void wr_reg_wa(u32 *reg, u32 val)
  314. {
  315. do {
  316. out_be32(reg, val);
  317. } while (in_be32(reg) != val);
  318. }
  319. static int fsl_diu_enable_panel(struct fb_info *info)
  320. {
  321. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  322. struct diu *hw = dr.diu_reg;
  323. struct diu_ad *ad = mfbi->ad;
  324. struct fsl_diu_data *machine_data = mfbi->parent;
  325. int res = 0;
  326. if (mfbi->type != MFB_TYPE_OFF) {
  327. switch (mfbi->index) {
  328. case 0: /* plane 0 */
  329. if (hw->desc[0] != ad->paddr)
  330. wr_reg_wa(&hw->desc[0], ad->paddr);
  331. break;
  332. case 1: /* plane 1 AOI 0 */
  333. cmfbi = machine_data->fsl_diu_info[2]->par;
  334. if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
  335. if (cmfbi->count > 0) /* AOI1 open */
  336. ad->next_ad =
  337. cpu_to_le32(cmfbi->ad->paddr);
  338. else
  339. ad->next_ad = 0;
  340. wr_reg_wa(&hw->desc[1], ad->paddr);
  341. }
  342. break;
  343. case 3: /* plane 2 AOI 0 */
  344. cmfbi = machine_data->fsl_diu_info[4]->par;
  345. if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
  346. if (cmfbi->count > 0) /* AOI1 open */
  347. ad->next_ad =
  348. cpu_to_le32(cmfbi->ad->paddr);
  349. else
  350. ad->next_ad = 0;
  351. wr_reg_wa(&hw->desc[2], ad->paddr);
  352. }
  353. break;
  354. case 2: /* plane 1 AOI 1 */
  355. pmfbi = machine_data->fsl_diu_info[1]->par;
  356. ad->next_ad = 0;
  357. if (hw->desc[1] == machine_data->dummy_ad->paddr)
  358. wr_reg_wa(&hw->desc[1], ad->paddr);
  359. else /* AOI0 open */
  360. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  361. break;
  362. case 4: /* plane 2 AOI 1 */
  363. pmfbi = machine_data->fsl_diu_info[3]->par;
  364. ad->next_ad = 0;
  365. if (hw->desc[2] == machine_data->dummy_ad->paddr)
  366. wr_reg_wa(&hw->desc[2], ad->paddr);
  367. else /* AOI0 was open */
  368. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  369. break;
  370. default:
  371. res = -EINVAL;
  372. break;
  373. }
  374. } else
  375. res = -EINVAL;
  376. return res;
  377. }
  378. static int fsl_diu_disable_panel(struct fb_info *info)
  379. {
  380. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  381. struct diu *hw = dr.diu_reg;
  382. struct diu_ad *ad = mfbi->ad;
  383. struct fsl_diu_data *machine_data = mfbi->parent;
  384. int res = 0;
  385. switch (mfbi->index) {
  386. case 0: /* plane 0 */
  387. if (hw->desc[0] != machine_data->dummy_ad->paddr)
  388. wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
  389. break;
  390. case 1: /* plane 1 AOI 0 */
  391. cmfbi = machine_data->fsl_diu_info[2]->par;
  392. if (cmfbi->count > 0) /* AOI1 is open */
  393. wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
  394. /* move AOI1 to the first */
  395. else /* AOI1 was closed */
  396. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  397. /* close AOI 0 */
  398. break;
  399. case 3: /* plane 2 AOI 0 */
  400. cmfbi = machine_data->fsl_diu_info[4]->par;
  401. if (cmfbi->count > 0) /* AOI1 is open */
  402. wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
  403. /* move AOI1 to the first */
  404. else /* AOI1 was closed */
  405. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  406. /* close AOI 0 */
  407. break;
  408. case 2: /* plane 1 AOI 1 */
  409. pmfbi = machine_data->fsl_diu_info[1]->par;
  410. if (hw->desc[1] != ad->paddr) {
  411. /* AOI1 is not the first in the chain */
  412. if (pmfbi->count > 0)
  413. /* AOI0 is open, must be the first */
  414. pmfbi->ad->next_ad = 0;
  415. } else /* AOI1 is the first in the chain */
  416. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  417. /* close AOI 1 */
  418. break;
  419. case 4: /* plane 2 AOI 1 */
  420. pmfbi = machine_data->fsl_diu_info[3]->par;
  421. if (hw->desc[2] != ad->paddr) {
  422. /* AOI1 is not the first in the chain */
  423. if (pmfbi->count > 0)
  424. /* AOI0 is open, must be the first */
  425. pmfbi->ad->next_ad = 0;
  426. } else /* AOI1 is the first in the chain */
  427. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  428. /* close AOI 1 */
  429. break;
  430. default:
  431. res = -EINVAL;
  432. break;
  433. }
  434. return res;
  435. }
  436. static void enable_lcdc(struct fb_info *info)
  437. {
  438. struct diu *hw = dr.diu_reg;
  439. struct mfb_info *mfbi = info->par;
  440. struct fsl_diu_data *machine_data = mfbi->parent;
  441. if (!machine_data->fb_enabled) {
  442. out_be32(&hw->diu_mode, dr.mode);
  443. machine_data->fb_enabled++;
  444. }
  445. }
  446. static void disable_lcdc(struct fb_info *info)
  447. {
  448. struct diu *hw = dr.diu_reg;
  449. struct mfb_info *mfbi = info->par;
  450. struct fsl_diu_data *machine_data = mfbi->parent;
  451. if (machine_data->fb_enabled) {
  452. out_be32(&hw->diu_mode, 0);
  453. machine_data->fb_enabled = 0;
  454. }
  455. }
  456. static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
  457. struct fb_info *info)
  458. {
  459. struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
  460. struct fsl_diu_data *machine_data = mfbi->parent;
  461. int available_height, upper_aoi_bottom, index = mfbi->index;
  462. int lower_aoi_is_open, upper_aoi_is_open;
  463. __u32 base_plane_width, base_plane_height, upper_aoi_height;
  464. base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
  465. base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
  466. if (mfbi->x_aoi_d < 0)
  467. mfbi->x_aoi_d = 0;
  468. if (mfbi->y_aoi_d < 0)
  469. mfbi->y_aoi_d = 0;
  470. switch (index) {
  471. case 0:
  472. if (mfbi->x_aoi_d != 0)
  473. mfbi->x_aoi_d = 0;
  474. if (mfbi->y_aoi_d != 0)
  475. mfbi->y_aoi_d = 0;
  476. break;
  477. case 1: /* AOI 0 */
  478. case 3:
  479. lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
  480. lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
  481. if (var->xres > base_plane_width)
  482. var->xres = base_plane_width;
  483. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  484. mfbi->x_aoi_d = base_plane_width - var->xres;
  485. if (lower_aoi_is_open)
  486. available_height = lower_aoi_mfbi->y_aoi_d;
  487. else
  488. available_height = base_plane_height;
  489. if (var->yres > available_height)
  490. var->yres = available_height;
  491. if ((mfbi->y_aoi_d + var->yres) > available_height)
  492. mfbi->y_aoi_d = available_height - var->yres;
  493. break;
  494. case 2: /* AOI 1 */
  495. case 4:
  496. upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
  497. upper_aoi_height =
  498. machine_data->fsl_diu_info[index-1]->var.yres;
  499. upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
  500. upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
  501. if (var->xres > base_plane_width)
  502. var->xres = base_plane_width;
  503. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  504. mfbi->x_aoi_d = base_plane_width - var->xres;
  505. if (mfbi->y_aoi_d < 0)
  506. mfbi->y_aoi_d = 0;
  507. if (upper_aoi_is_open) {
  508. if (mfbi->y_aoi_d < upper_aoi_bottom)
  509. mfbi->y_aoi_d = upper_aoi_bottom;
  510. available_height = base_plane_height
  511. - upper_aoi_bottom;
  512. } else
  513. available_height = base_plane_height;
  514. if (var->yres > available_height)
  515. var->yres = available_height;
  516. if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
  517. mfbi->y_aoi_d = base_plane_height - var->yres;
  518. break;
  519. }
  520. }
  521. /*
  522. * Checks to see if the hardware supports the state requested by var passed
  523. * in. This function does not alter the hardware state! If the var passed in
  524. * is slightly off by what the hardware can support then we alter the var
  525. * PASSED in to what we can do. If the hardware doesn't support mode change
  526. * a -EINVAL will be returned by the upper layers.
  527. */
  528. static int fsl_diu_check_var(struct fb_var_screeninfo *var,
  529. struct fb_info *info)
  530. {
  531. if (var->xres_virtual < var->xres)
  532. var->xres_virtual = var->xres;
  533. if (var->yres_virtual < var->yres)
  534. var->yres_virtual = var->yres;
  535. if (var->xoffset < 0)
  536. var->xoffset = 0;
  537. if (var->yoffset < 0)
  538. var->yoffset = 0;
  539. if (var->xoffset + info->var.xres > info->var.xres_virtual)
  540. var->xoffset = info->var.xres_virtual - info->var.xres;
  541. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  542. var->yoffset = info->var.yres_virtual - info->var.yres;
  543. if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  544. (var->bits_per_pixel != 16))
  545. var->bits_per_pixel = default_bpp;
  546. switch (var->bits_per_pixel) {
  547. case 16:
  548. var->red.length = 5;
  549. var->red.offset = 11;
  550. var->red.msb_right = 0;
  551. var->green.length = 6;
  552. var->green.offset = 5;
  553. var->green.msb_right = 0;
  554. var->blue.length = 5;
  555. var->blue.offset = 0;
  556. var->blue.msb_right = 0;
  557. var->transp.length = 0;
  558. var->transp.offset = 0;
  559. var->transp.msb_right = 0;
  560. break;
  561. case 24:
  562. var->red.length = 8;
  563. var->red.offset = 0;
  564. var->red.msb_right = 0;
  565. var->green.length = 8;
  566. var->green.offset = 8;
  567. var->green.msb_right = 0;
  568. var->blue.length = 8;
  569. var->blue.offset = 16;
  570. var->blue.msb_right = 0;
  571. var->transp.length = 0;
  572. var->transp.offset = 0;
  573. var->transp.msb_right = 0;
  574. break;
  575. case 32:
  576. var->red.length = 8;
  577. var->red.offset = 16;
  578. var->red.msb_right = 0;
  579. var->green.length = 8;
  580. var->green.offset = 8;
  581. var->green.msb_right = 0;
  582. var->blue.length = 8;
  583. var->blue.offset = 0;
  584. var->blue.msb_right = 0;
  585. var->transp.length = 8;
  586. var->transp.offset = 24;
  587. var->transp.msb_right = 0;
  588. break;
  589. }
  590. var->height = -1;
  591. var->width = -1;
  592. var->grayscale = 0;
  593. /* Copy nonstd field to/from sync for fbset usage */
  594. var->sync |= var->nonstd;
  595. var->nonstd |= var->sync;
  596. adjust_aoi_size_position(var, info);
  597. return 0;
  598. }
  599. static void set_fix(struct fb_info *info)
  600. {
  601. struct fb_fix_screeninfo *fix = &info->fix;
  602. struct fb_var_screeninfo *var = &info->var;
  603. struct mfb_info *mfbi = info->par;
  604. strncpy(fix->id, mfbi->id, strlen(mfbi->id));
  605. fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  606. fix->type = FB_TYPE_PACKED_PIXELS;
  607. fix->accel = FB_ACCEL_NONE;
  608. fix->visual = FB_VISUAL_TRUECOLOR;
  609. fix->xpanstep = 1;
  610. fix->ypanstep = 1;
  611. }
  612. static void update_lcdc(struct fb_info *info)
  613. {
  614. struct fb_var_screeninfo *var = &info->var;
  615. struct mfb_info *mfbi = info->par;
  616. struct fsl_diu_data *machine_data = mfbi->parent;
  617. struct diu *hw;
  618. int i, j;
  619. char __iomem *cursor_base, *gamma_table_base;
  620. u32 temp;
  621. hw = dr.diu_reg;
  622. if (mfbi->type == MFB_TYPE_OFF) {
  623. fsl_diu_disable_panel(info);
  624. return;
  625. }
  626. diu_ops.set_monitor_port(machine_data->monitor_port);
  627. gamma_table_base = pool.gamma.vaddr;
  628. cursor_base = pool.cursor.vaddr;
  629. /* Prep for DIU init - gamma table, cursor table */
  630. for (i = 0; i <= 2; i++)
  631. for (j = 0; j <= 255; j++)
  632. *gamma_table_base++ = j;
  633. diu_ops.set_gamma_table(machine_data->monitor_port, pool.gamma.vaddr);
  634. disable_lcdc(info);
  635. /* Program DIU registers */
  636. out_be32(&hw->gamma, pool.gamma.paddr);
  637. out_be32(&hw->cursor, pool.cursor.paddr);
  638. out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
  639. out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
  640. out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
  641. /* DISP SIZE */
  642. out_be32(&hw->wb_size, 0); /* WB SIZE */
  643. out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
  644. /* Horizontal and vertical configuration register */
  645. temp = var->left_margin << 22 | /* BP_H */
  646. var->hsync_len << 11 | /* PW_H */
  647. var->right_margin; /* FP_H */
  648. out_be32(&hw->hsyn_para, temp);
  649. temp = var->upper_margin << 22 | /* BP_V */
  650. var->vsync_len << 11 | /* PW_V */
  651. var->lower_margin; /* FP_V */
  652. out_be32(&hw->vsyn_para, temp);
  653. diu_ops.set_pixel_clock(var->pixclock);
  654. out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
  655. out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
  656. out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
  657. out_be32(&hw->plut, 0x01F5F666);
  658. /* Enable the DIU */
  659. enable_lcdc(info);
  660. }
  661. static int map_video_memory(struct fb_info *info)
  662. {
  663. phys_addr_t phys;
  664. u32 smem_len = info->fix.line_length * info->var.yres_virtual;
  665. info->screen_base = fsl_diu_alloc(smem_len, &phys);
  666. if (info->screen_base == NULL) {
  667. dev_err(info->dev, "unable to allocate fb memory\n");
  668. return -ENOMEM;
  669. }
  670. mutex_lock(&info->mm_lock);
  671. info->fix.smem_start = (unsigned long) phys;
  672. info->fix.smem_len = smem_len;
  673. mutex_unlock(&info->mm_lock);
  674. info->screen_size = info->fix.smem_len;
  675. return 0;
  676. }
  677. static void unmap_video_memory(struct fb_info *info)
  678. {
  679. fsl_diu_free(info->screen_base, info->fix.smem_len);
  680. mutex_lock(&info->mm_lock);
  681. info->screen_base = NULL;
  682. info->fix.smem_start = 0;
  683. info->fix.smem_len = 0;
  684. mutex_unlock(&info->mm_lock);
  685. }
  686. /*
  687. * Using the fb_var_screeninfo in fb_info we set the aoi of this
  688. * particular framebuffer. It is a light version of fsl_diu_set_par.
  689. */
  690. static int fsl_diu_set_aoi(struct fb_info *info)
  691. {
  692. struct fb_var_screeninfo *var = &info->var;
  693. struct mfb_info *mfbi = info->par;
  694. struct diu_ad *ad = mfbi->ad;
  695. /* AOI should not be greater than display size */
  696. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  697. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  698. return 0;
  699. }
  700. /*
  701. * Using the fb_var_screeninfo in fb_info we set the resolution of this
  702. * particular framebuffer. This function alters the fb_fix_screeninfo stored
  703. * in fb_info. It does not alter var in fb_info since we are using that
  704. * data. This means we depend on the data in var inside fb_info to be
  705. * supported by the hardware. fsl_diu_check_var is always called before
  706. * fsl_diu_set_par to ensure this.
  707. */
  708. static int fsl_diu_set_par(struct fb_info *info)
  709. {
  710. unsigned long len;
  711. struct fb_var_screeninfo *var = &info->var;
  712. struct mfb_info *mfbi = info->par;
  713. struct fsl_diu_data *machine_data = mfbi->parent;
  714. struct diu_ad *ad = mfbi->ad;
  715. struct diu *hw;
  716. hw = dr.diu_reg;
  717. set_fix(info);
  718. mfbi->cursor_reset = 1;
  719. len = info->var.yres_virtual * info->fix.line_length;
  720. /* Alloc & dealloc each time resolution/bpp change */
  721. if (len != info->fix.smem_len) {
  722. if (info->fix.smem_start)
  723. unmap_video_memory(info);
  724. /* Memory allocation for framebuffer */
  725. if (map_video_memory(info)) {
  726. dev_err(info->dev, "unable to allocate fb memory 1\n");
  727. return -ENOMEM;
  728. }
  729. }
  730. ad->pix_fmt = diu_ops.get_pixel_format(machine_data->monitor_port,
  731. var->bits_per_pixel);
  732. ad->addr = cpu_to_le32(info->fix.smem_start);
  733. ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
  734. var->xres_virtual) | mfbi->g_alpha;
  735. /* AOI should not be greater than display size */
  736. ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
  737. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  738. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  739. /* Disable chroma keying function */
  740. ad->ckmax_r = 0;
  741. ad->ckmax_g = 0;
  742. ad->ckmax_b = 0;
  743. ad->ckmin_r = 255;
  744. ad->ckmin_g = 255;
  745. ad->ckmin_b = 255;
  746. if (mfbi->index == 0)
  747. update_lcdc(info);
  748. return 0;
  749. }
  750. static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
  751. {
  752. return ((val << width) + 0x7FFF - val) >> 16;
  753. }
  754. /*
  755. * Set a single color register. The values supplied have a 16 bit magnitude
  756. * which needs to be scaled in this function for the hardware. Things to take
  757. * into consideration are how many color registers, if any, are supported with
  758. * the current color visual. With truecolor mode no color palettes are
  759. * supported. Here a pseudo palette is created which we store the value in
  760. * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
  761. * color palette.
  762. */
  763. static int fsl_diu_setcolreg(unsigned int regno, unsigned int red,
  764. unsigned int green, unsigned int blue,
  765. unsigned int transp, struct fb_info *info)
  766. {
  767. int ret = 1;
  768. /*
  769. * If greyscale is true, then we convert the RGB value
  770. * to greyscale no matter what visual we are using.
  771. */
  772. if (info->var.grayscale)
  773. red = green = blue = (19595 * red + 38470 * green +
  774. 7471 * blue) >> 16;
  775. switch (info->fix.visual) {
  776. case FB_VISUAL_TRUECOLOR:
  777. /*
  778. * 16-bit True Colour. We encode the RGB value
  779. * according to the RGB bitfield information.
  780. */
  781. if (regno < 16) {
  782. u32 *pal = info->pseudo_palette;
  783. u32 v;
  784. red = CNVT_TOHW(red, info->var.red.length);
  785. green = CNVT_TOHW(green, info->var.green.length);
  786. blue = CNVT_TOHW(blue, info->var.blue.length);
  787. transp = CNVT_TOHW(transp, info->var.transp.length);
  788. v = (red << info->var.red.offset) |
  789. (green << info->var.green.offset) |
  790. (blue << info->var.blue.offset) |
  791. (transp << info->var.transp.offset);
  792. pal[regno] = v;
  793. ret = 0;
  794. }
  795. break;
  796. }
  797. return ret;
  798. }
  799. /*
  800. * Pan (or wrap, depending on the `vmode' field) the display using the
  801. * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
  802. * don't fit, return -EINVAL.
  803. */
  804. static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
  805. struct fb_info *info)
  806. {
  807. if ((info->var.xoffset == var->xoffset) &&
  808. (info->var.yoffset == var->yoffset))
  809. return 0; /* No change, do nothing */
  810. if (var->xoffset < 0 || var->yoffset < 0
  811. || var->xoffset + info->var.xres > info->var.xres_virtual
  812. || var->yoffset + info->var.yres > info->var.yres_virtual)
  813. return -EINVAL;
  814. info->var.xoffset = var->xoffset;
  815. info->var.yoffset = var->yoffset;
  816. if (var->vmode & FB_VMODE_YWRAP)
  817. info->var.vmode |= FB_VMODE_YWRAP;
  818. else
  819. info->var.vmode &= ~FB_VMODE_YWRAP;
  820. fsl_diu_set_aoi(info);
  821. return 0;
  822. }
  823. /*
  824. * Blank the screen if blank_mode != 0, else unblank. Return 0 if blanking
  825. * succeeded, != 0 if un-/blanking failed.
  826. * blank_mode == 2: suspend vsync
  827. * blank_mode == 3: suspend hsync
  828. * blank_mode == 4: powerdown
  829. */
  830. static int fsl_diu_blank(int blank_mode, struct fb_info *info)
  831. {
  832. struct mfb_info *mfbi = info->par;
  833. mfbi->blank = blank_mode;
  834. switch (blank_mode) {
  835. case FB_BLANK_VSYNC_SUSPEND:
  836. case FB_BLANK_HSYNC_SUSPEND:
  837. /* FIXME: fixes to enable_panel and enable lcdc needed */
  838. case FB_BLANK_NORMAL:
  839. /* fsl_diu_disable_panel(info);*/
  840. break;
  841. case FB_BLANK_POWERDOWN:
  842. /* disable_lcdc(info); */
  843. break;
  844. case FB_BLANK_UNBLANK:
  845. /* fsl_diu_enable_panel(info);*/
  846. break;
  847. }
  848. return 0;
  849. }
  850. static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
  851. unsigned long arg)
  852. {
  853. struct mfb_info *mfbi = info->par;
  854. struct diu_ad *ad = mfbi->ad;
  855. struct mfb_chroma_key ck;
  856. unsigned char global_alpha;
  857. struct aoi_display_offset aoi_d;
  858. __u32 pix_fmt;
  859. void __user *buf = (void __user *)arg;
  860. if (!arg)
  861. return -EINVAL;
  862. switch (cmd) {
  863. case MFB_SET_PIXFMT:
  864. if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
  865. return -EFAULT;
  866. ad->pix_fmt = pix_fmt;
  867. break;
  868. case MFB_GET_PIXFMT:
  869. pix_fmt = ad->pix_fmt;
  870. if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
  871. return -EFAULT;
  872. break;
  873. case MFB_SET_AOID:
  874. if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
  875. return -EFAULT;
  876. mfbi->x_aoi_d = aoi_d.x_aoi_d;
  877. mfbi->y_aoi_d = aoi_d.y_aoi_d;
  878. fsl_diu_check_var(&info->var, info);
  879. fsl_diu_set_aoi(info);
  880. break;
  881. case MFB_GET_AOID:
  882. aoi_d.x_aoi_d = mfbi->x_aoi_d;
  883. aoi_d.y_aoi_d = mfbi->y_aoi_d;
  884. if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
  885. return -EFAULT;
  886. break;
  887. case MFB_GET_ALPHA:
  888. global_alpha = mfbi->g_alpha;
  889. if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
  890. return -EFAULT;
  891. break;
  892. case MFB_SET_ALPHA:
  893. /* set panel information */
  894. if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
  895. return -EFAULT;
  896. ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
  897. (global_alpha & 0xff);
  898. mfbi->g_alpha = global_alpha;
  899. break;
  900. case MFB_SET_CHROMA_KEY:
  901. /* set panel winformation */
  902. if (copy_from_user(&ck, buf, sizeof(ck)))
  903. return -EFAULT;
  904. if (ck.enable &&
  905. (ck.red_max < ck.red_min ||
  906. ck.green_max < ck.green_min ||
  907. ck.blue_max < ck.blue_min))
  908. return -EINVAL;
  909. if (!ck.enable) {
  910. ad->ckmax_r = 0;
  911. ad->ckmax_g = 0;
  912. ad->ckmax_b = 0;
  913. ad->ckmin_r = 255;
  914. ad->ckmin_g = 255;
  915. ad->ckmin_b = 255;
  916. } else {
  917. ad->ckmax_r = ck.red_max;
  918. ad->ckmax_g = ck.green_max;
  919. ad->ckmax_b = ck.blue_max;
  920. ad->ckmin_r = ck.red_min;
  921. ad->ckmin_g = ck.green_min;
  922. ad->ckmin_b = ck.blue_min;
  923. }
  924. break;
  925. case FBIOGET_GWINFO:
  926. if (mfbi->type == MFB_TYPE_OFF)
  927. return -ENODEV;
  928. /* get graphic window information */
  929. if (copy_to_user(buf, ad, sizeof(*ad)))
  930. return -EFAULT;
  931. break;
  932. default:
  933. dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd);
  934. return -ENOIOCTLCMD;
  935. }
  936. return 0;
  937. }
  938. /* turn on fb if count == 1
  939. */
  940. static int fsl_diu_open(struct fb_info *info, int user)
  941. {
  942. struct mfb_info *mfbi = info->par;
  943. int res = 0;
  944. /* free boot splash memory on first /dev/fb0 open */
  945. if (!mfbi->index && diu_ops.release_bootmem)
  946. diu_ops.release_bootmem();
  947. spin_lock(&diu_lock);
  948. mfbi->count++;
  949. if (mfbi->count == 1) {
  950. fsl_diu_check_var(&info->var, info);
  951. res = fsl_diu_set_par(info);
  952. if (res < 0)
  953. mfbi->count--;
  954. else {
  955. res = fsl_diu_enable_panel(info);
  956. if (res < 0)
  957. mfbi->count--;
  958. }
  959. }
  960. spin_unlock(&diu_lock);
  961. return res;
  962. }
  963. /* turn off fb if count == 0
  964. */
  965. static int fsl_diu_release(struct fb_info *info, int user)
  966. {
  967. struct mfb_info *mfbi = info->par;
  968. int res = 0;
  969. spin_lock(&diu_lock);
  970. mfbi->count--;
  971. if (mfbi->count == 0) {
  972. res = fsl_diu_disable_panel(info);
  973. if (res < 0)
  974. mfbi->count++;
  975. }
  976. spin_unlock(&diu_lock);
  977. return res;
  978. }
  979. static struct fb_ops fsl_diu_ops = {
  980. .owner = THIS_MODULE,
  981. .fb_check_var = fsl_diu_check_var,
  982. .fb_set_par = fsl_diu_set_par,
  983. .fb_setcolreg = fsl_diu_setcolreg,
  984. .fb_blank = fsl_diu_blank,
  985. .fb_pan_display = fsl_diu_pan_display,
  986. .fb_fillrect = cfb_fillrect,
  987. .fb_copyarea = cfb_copyarea,
  988. .fb_imageblit = cfb_imageblit,
  989. .fb_ioctl = fsl_diu_ioctl,
  990. .fb_open = fsl_diu_open,
  991. .fb_release = fsl_diu_release,
  992. };
  993. static int init_fbinfo(struct fb_info *info)
  994. {
  995. struct mfb_info *mfbi = info->par;
  996. info->device = NULL;
  997. info->var.activate = FB_ACTIVATE_NOW;
  998. info->fbops = &fsl_diu_ops;
  999. info->flags = FBINFO_FLAG_DEFAULT;
  1000. info->pseudo_palette = &mfbi->pseudo_palette;
  1001. /* Allocate colormap */
  1002. fb_alloc_cmap(&info->cmap, 16, 0);
  1003. return 0;
  1004. }
  1005. static int __devinit install_fb(struct fb_info *info)
  1006. {
  1007. int rc;
  1008. struct mfb_info *mfbi = info->par;
  1009. const char *aoi_mode, *init_aoi_mode = "320x240";
  1010. struct fb_videomode *db = fsl_diu_mode_db;
  1011. unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
  1012. int has_default_mode = 1;
  1013. if (init_fbinfo(info))
  1014. return -EINVAL;
  1015. if (mfbi->index == 0) { /* plane 0 */
  1016. if (mfbi->edid_data) {
  1017. /* Now build modedb from EDID */
  1018. fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
  1019. fb_videomode_to_modelist(info->monspecs.modedb,
  1020. info->monspecs.modedb_len,
  1021. &info->modelist);
  1022. db = info->monspecs.modedb;
  1023. dbsize = info->monspecs.modedb_len;
  1024. }
  1025. aoi_mode = fb_mode;
  1026. } else {
  1027. aoi_mode = init_aoi_mode;
  1028. }
  1029. rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, NULL,
  1030. default_bpp);
  1031. if (!rc) {
  1032. /*
  1033. * For plane 0 we continue and look into
  1034. * driver's internal modedb.
  1035. */
  1036. if (mfbi->index == 0 && mfbi->edid_data)
  1037. has_default_mode = 0;
  1038. else
  1039. return -EINVAL;
  1040. }
  1041. if (!has_default_mode) {
  1042. rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
  1043. ARRAY_SIZE(fsl_diu_mode_db), NULL, default_bpp);
  1044. if (rc)
  1045. has_default_mode = 1;
  1046. }
  1047. /* Still not found, use preferred mode from database if any */
  1048. if (!has_default_mode && info->monspecs.modedb) {
  1049. struct fb_monspecs *specs = &info->monspecs;
  1050. struct fb_videomode *modedb = &specs->modedb[0];
  1051. /*
  1052. * Get preferred timing. If not found,
  1053. * first mode in database will be used.
  1054. */
  1055. if (specs->misc & FB_MISC_1ST_DETAIL) {
  1056. int i;
  1057. for (i = 0; i < specs->modedb_len; i++) {
  1058. if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
  1059. modedb = &specs->modedb[i];
  1060. break;
  1061. }
  1062. }
  1063. }
  1064. info->var.bits_per_pixel = default_bpp;
  1065. fb_videomode_to_var(&info->var, modedb);
  1066. }
  1067. if (mfbi->type == MFB_TYPE_OFF)
  1068. mfbi->blank = FB_BLANK_NORMAL;
  1069. else
  1070. mfbi->blank = FB_BLANK_UNBLANK;
  1071. if (fsl_diu_check_var(&info->var, info)) {
  1072. dev_err(info->dev, "fsl_diu_check_var failed\n");
  1073. fb_dealloc_cmap(&info->cmap);
  1074. return -EINVAL;
  1075. }
  1076. if (register_framebuffer(info) < 0) {
  1077. dev_err(info->dev, "register_framebuffer failed\n");
  1078. unmap_video_memory(info);
  1079. fb_dealloc_cmap(&info->cmap);
  1080. return -EINVAL;
  1081. }
  1082. mfbi->registered = 1;
  1083. dev_info(info->dev, "%s registered successfully\n", mfbi->id);
  1084. return 0;
  1085. }
  1086. static void uninstall_fb(struct fb_info *info)
  1087. {
  1088. struct mfb_info *mfbi = info->par;
  1089. if (!mfbi->registered)
  1090. return;
  1091. if (mfbi->index == 0)
  1092. kfree(mfbi->edid_data);
  1093. unregister_framebuffer(info);
  1094. unmap_video_memory(info);
  1095. if (&info->cmap)
  1096. fb_dealloc_cmap(&info->cmap);
  1097. mfbi->registered = 0;
  1098. }
  1099. static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
  1100. {
  1101. struct diu *hw = dr.diu_reg;
  1102. unsigned int status = in_be32(&hw->int_status);
  1103. if (status) {
  1104. /* This is the workaround for underrun */
  1105. if (status & INT_UNDRUN) {
  1106. out_be32(&hw->diu_mode, 0);
  1107. udelay(1);
  1108. out_be32(&hw->diu_mode, 1);
  1109. }
  1110. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1111. else if (status & INT_VSYNC) {
  1112. unsigned int i;
  1113. for (i = 0; i < coherence_data_size;
  1114. i += d_cache_line_size)
  1115. __asm__ __volatile__ (
  1116. "dcbz 0, %[input]"
  1117. ::[input]"r"(&coherence_data[i]));
  1118. }
  1119. #endif
  1120. return IRQ_HANDLED;
  1121. }
  1122. return IRQ_NONE;
  1123. }
  1124. static int request_irq_local(int irq)
  1125. {
  1126. u32 ints;
  1127. struct diu *hw;
  1128. int ret;
  1129. hw = dr.diu_reg;
  1130. /* Read to clear the status */
  1131. in_be32(&hw->int_status);
  1132. ret = request_irq(irq, fsl_diu_isr, 0, "diu", NULL);
  1133. if (!ret) {
  1134. ints = INT_PARERR | INT_LS_BF_VS;
  1135. #if !defined(CONFIG_NOT_COHERENT_CACHE)
  1136. ints |= INT_VSYNC;
  1137. #endif
  1138. if (dr.mode == MFB_MODE2 || dr.mode == MFB_MODE3)
  1139. ints |= INT_VSYNC_WB;
  1140. /* Read to clear the status */
  1141. in_be32(&hw->int_status);
  1142. out_be32(&hw->int_mask, ints);
  1143. }
  1144. return ret;
  1145. }
  1146. static void free_irq_local(int irq)
  1147. {
  1148. struct diu *hw = dr.diu_reg;
  1149. /* Disable all LCDC interrupt */
  1150. out_be32(&hw->int_mask, 0x1f);
  1151. free_irq(irq, NULL);
  1152. }
  1153. #ifdef CONFIG_PM
  1154. /*
  1155. * Power management hooks. Note that we won't be called from IRQ context,
  1156. * unlike the blank functions above, so we may sleep.
  1157. */
  1158. static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state)
  1159. {
  1160. struct fsl_diu_data *machine_data;
  1161. machine_data = dev_get_drvdata(&ofdev->dev);
  1162. disable_lcdc(machine_data->fsl_diu_info[0]);
  1163. return 0;
  1164. }
  1165. static int fsl_diu_resume(struct platform_device *ofdev)
  1166. {
  1167. struct fsl_diu_data *machine_data;
  1168. machine_data = dev_get_drvdata(&ofdev->dev);
  1169. enable_lcdc(machine_data->fsl_diu_info[0]);
  1170. return 0;
  1171. }
  1172. #else
  1173. #define fsl_diu_suspend NULL
  1174. #define fsl_diu_resume NULL
  1175. #endif /* CONFIG_PM */
  1176. /* Align to 64-bit(8-byte), 32-byte, etc. */
  1177. static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1178. u32 bytes_align)
  1179. {
  1180. u32 offset;
  1181. dma_addr_t mask;
  1182. buf->vaddr =
  1183. dma_alloc_coherent(dev, size + bytes_align, &buf->paddr,
  1184. GFP_DMA | __GFP_ZERO);
  1185. if (!buf->vaddr)
  1186. return -ENOMEM;
  1187. mask = bytes_align - 1;
  1188. offset = buf->paddr & mask;
  1189. if (offset) {
  1190. buf->offset = bytes_align - offset;
  1191. buf->paddr = buf->paddr + offset;
  1192. } else
  1193. buf->offset = 0;
  1194. return 0;
  1195. }
  1196. static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1197. u32 bytes_align)
  1198. {
  1199. dma_free_coherent(dev, size + bytes_align, buf->vaddr,
  1200. buf->paddr - buf->offset);
  1201. }
  1202. static ssize_t store_monitor(struct device *device,
  1203. struct device_attribute *attr, const char *buf, size_t count)
  1204. {
  1205. enum fsl_diu_monitor_port old_monitor_port;
  1206. struct fsl_diu_data *machine_data =
  1207. container_of(attr, struct fsl_diu_data, dev_attr);
  1208. old_monitor_port = machine_data->monitor_port;
  1209. machine_data->monitor_port = fsl_diu_name_to_port(buf);
  1210. if (old_monitor_port != machine_data->monitor_port) {
  1211. /* All AOIs need adjust pixel format
  1212. * fsl_diu_set_par only change the pixsel format here
  1213. * unlikely to fail. */
  1214. fsl_diu_set_par(machine_data->fsl_diu_info[0]);
  1215. fsl_diu_set_par(machine_data->fsl_diu_info[1]);
  1216. fsl_diu_set_par(machine_data->fsl_diu_info[2]);
  1217. fsl_diu_set_par(machine_data->fsl_diu_info[3]);
  1218. fsl_diu_set_par(machine_data->fsl_diu_info[4]);
  1219. }
  1220. return count;
  1221. }
  1222. static ssize_t show_monitor(struct device *device,
  1223. struct device_attribute *attr, char *buf)
  1224. {
  1225. struct fsl_diu_data *machine_data =
  1226. container_of(attr, struct fsl_diu_data, dev_attr);
  1227. switch (machine_data->monitor_port) {
  1228. case FSL_DIU_PORT_DVI:
  1229. return sprintf(buf, "DVI\n");
  1230. case FSL_DIU_PORT_LVDS:
  1231. return sprintf(buf, "Single-link LVDS\n");
  1232. case FSL_DIU_PORT_DLVDS:
  1233. return sprintf(buf, "Dual-link LVDS\n");
  1234. }
  1235. return 0;
  1236. }
  1237. static int __devinit fsl_diu_probe(struct platform_device *pdev)
  1238. {
  1239. struct device_node *np = pdev->dev.of_node;
  1240. struct mfb_info *mfbi;
  1241. phys_addr_t dummy_ad_addr = 0;
  1242. int ret, i, error = 0;
  1243. struct fsl_diu_data *machine_data;
  1244. int diu_mode;
  1245. machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
  1246. if (!machine_data)
  1247. return -ENOMEM;
  1248. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1249. machine_data->fsl_diu_info[i] =
  1250. framebuffer_alloc(sizeof(struct mfb_info), &pdev->dev);
  1251. if (!machine_data->fsl_diu_info[i]) {
  1252. dev_err(&pdev->dev, "cannot allocate memory\n");
  1253. ret = -ENOMEM;
  1254. goto error2;
  1255. }
  1256. mfbi = machine_data->fsl_diu_info[i]->par;
  1257. memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
  1258. mfbi->parent = machine_data;
  1259. if (mfbi->index == 0) {
  1260. const u8 *prop;
  1261. int len;
  1262. /* Get EDID */
  1263. prop = of_get_property(np, "edid", &len);
  1264. if (prop && len == EDID_LENGTH)
  1265. mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
  1266. GFP_KERNEL);
  1267. }
  1268. }
  1269. dr.diu_reg = of_iomap(np, 0);
  1270. if (!dr.diu_reg) {
  1271. dev_err(&pdev->dev, "cannot map DIU registers\n");
  1272. ret = -EFAULT;
  1273. goto error2;
  1274. }
  1275. diu_mode = in_be32(&dr.diu_reg->diu_mode);
  1276. if (diu_mode != MFB_MODE1)
  1277. out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
  1278. /* Get the IRQ of the DIU */
  1279. machine_data->irq = irq_of_parse_and_map(np, 0);
  1280. if (!machine_data->irq) {
  1281. dev_err(&pdev->dev, "could not get DIU IRQ\n");
  1282. ret = -EINVAL;
  1283. goto error;
  1284. }
  1285. machine_data->monitor_port = monitor_port;
  1286. /* Area descriptor memory pool aligns to 64-bit boundary */
  1287. if (allocate_buf(&pdev->dev, &pool.ad,
  1288. sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
  1289. return -ENOMEM;
  1290. /* Get memory for Gamma Table - 32-byte aligned memory */
  1291. if (allocate_buf(&pdev->dev, &pool.gamma, 768, 32)) {
  1292. ret = -ENOMEM;
  1293. goto error;
  1294. }
  1295. /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
  1296. if (allocate_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1297. 32)) {
  1298. ret = -ENOMEM;
  1299. goto error;
  1300. }
  1301. i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1302. machine_data->dummy_ad = (struct diu_ad *)
  1303. ((u32)pool.ad.vaddr + pool.ad.offset) + i;
  1304. machine_data->dummy_ad->paddr = pool.ad.paddr +
  1305. i * sizeof(struct diu_ad);
  1306. machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
  1307. if (!machine_data->dummy_aoi_virt) {
  1308. ret = -ENOMEM;
  1309. goto error;
  1310. }
  1311. machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
  1312. machine_data->dummy_ad->pix_fmt = 0x88882317;
  1313. machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
  1314. machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
  1315. machine_data->dummy_ad->offset_xyi = 0;
  1316. machine_data->dummy_ad->offset_xyd = 0;
  1317. machine_data->dummy_ad->next_ad = 0;
  1318. /*
  1319. * Let DIU display splash screen if it was pre-initialized
  1320. * by the bootloader, set dummy area descriptor otherwise.
  1321. */
  1322. if (diu_mode != MFB_MODE1)
  1323. out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
  1324. out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
  1325. out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
  1326. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1327. machine_data->fsl_diu_info[i]->fix.smem_start = 0;
  1328. mfbi = machine_data->fsl_diu_info[i]->par;
  1329. mfbi->ad = (struct diu_ad *)((u32)pool.ad.vaddr
  1330. + pool.ad.offset) + i;
  1331. mfbi->ad->paddr = pool.ad.paddr + i * sizeof(struct diu_ad);
  1332. ret = install_fb(machine_data->fsl_diu_info[i]);
  1333. if (ret) {
  1334. dev_err(&pdev->dev, "could not register fb %d\n", i);
  1335. goto error;
  1336. }
  1337. }
  1338. if (request_irq_local(machine_data->irq)) {
  1339. dev_err(&pdev->dev, "could not claim irq\n");
  1340. goto error;
  1341. }
  1342. sysfs_attr_init(&machine_data->dev_attr.attr);
  1343. machine_data->dev_attr.attr.name = "monitor";
  1344. machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
  1345. machine_data->dev_attr.show = show_monitor;
  1346. machine_data->dev_attr.store = store_monitor;
  1347. error = device_create_file(machine_data->fsl_diu_info[0]->dev,
  1348. &machine_data->dev_attr);
  1349. if (error) {
  1350. dev_err(&pdev->dev, "could not create sysfs file %s\n",
  1351. machine_data->dev_attr.attr.name);
  1352. }
  1353. dev_set_drvdata(&pdev->dev, machine_data);
  1354. return 0;
  1355. error:
  1356. for (i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1357. i > 0; i--)
  1358. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1359. if (pool.ad.vaddr)
  1360. free_buf(&pdev->dev, &pool.ad,
  1361. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1362. if (pool.gamma.vaddr)
  1363. free_buf(&pdev->dev, &pool.gamma, 768, 32);
  1364. if (pool.cursor.vaddr)
  1365. free_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1366. 32);
  1367. if (machine_data->dummy_aoi_virt)
  1368. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1369. iounmap(dr.diu_reg);
  1370. error2:
  1371. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1372. if (machine_data->fsl_diu_info[i])
  1373. framebuffer_release(machine_data->fsl_diu_info[i]);
  1374. kfree(machine_data);
  1375. return ret;
  1376. }
  1377. static int fsl_diu_remove(struct platform_device *pdev)
  1378. {
  1379. struct fsl_diu_data *machine_data;
  1380. int i;
  1381. machine_data = dev_get_drvdata(&pdev->dev);
  1382. disable_lcdc(machine_data->fsl_diu_info[0]);
  1383. free_irq_local(machine_data->irq);
  1384. for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--)
  1385. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1386. if (pool.ad.vaddr)
  1387. free_buf(&pdev->dev, &pool.ad,
  1388. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1389. if (pool.gamma.vaddr)
  1390. free_buf(&pdev->dev, &pool.gamma, 768, 32);
  1391. if (pool.cursor.vaddr)
  1392. free_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
  1393. if (machine_data->dummy_aoi_virt)
  1394. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1395. iounmap(dr.diu_reg);
  1396. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1397. if (machine_data->fsl_diu_info[i])
  1398. framebuffer_release(machine_data->fsl_diu_info[i]);
  1399. kfree(machine_data);
  1400. return 0;
  1401. }
  1402. #ifndef MODULE
  1403. static int __init fsl_diu_setup(char *options)
  1404. {
  1405. char *opt;
  1406. unsigned long val;
  1407. if (!options || !*options)
  1408. return 0;
  1409. while ((opt = strsep(&options, ",")) != NULL) {
  1410. if (!*opt)
  1411. continue;
  1412. if (!strncmp(opt, "monitor=", 8)) {
  1413. monitor_port = fsl_diu_name_to_port(opt + 8);
  1414. } else if (!strncmp(opt, "bpp=", 4)) {
  1415. if (!strict_strtoul(opt + 4, 10, &val))
  1416. default_bpp = val;
  1417. } else
  1418. fb_mode = opt;
  1419. }
  1420. return 0;
  1421. }
  1422. #endif
  1423. static struct of_device_id fsl_diu_match[] = {
  1424. #ifdef CONFIG_PPC_MPC512x
  1425. {
  1426. .compatible = "fsl,mpc5121-diu",
  1427. },
  1428. #endif
  1429. {
  1430. .compatible = "fsl,diu",
  1431. },
  1432. {}
  1433. };
  1434. MODULE_DEVICE_TABLE(of, fsl_diu_match);
  1435. static struct platform_driver fsl_diu_driver = {
  1436. .driver = {
  1437. .name = "fsl_diu",
  1438. .owner = THIS_MODULE,
  1439. .of_match_table = fsl_diu_match,
  1440. },
  1441. .probe = fsl_diu_probe,
  1442. .remove = fsl_diu_remove,
  1443. .suspend = fsl_diu_suspend,
  1444. .resume = fsl_diu_resume,
  1445. };
  1446. static int __init fsl_diu_init(void)
  1447. {
  1448. #ifdef CONFIG_NOT_COHERENT_CACHE
  1449. struct device_node *np;
  1450. const u32 *prop;
  1451. #endif
  1452. int ret;
  1453. #ifndef MODULE
  1454. char *option;
  1455. /*
  1456. * For kernel boot options (in 'video=xxxfb:<options>' format)
  1457. */
  1458. if (fb_get_options("fslfb", &option))
  1459. return -ENODEV;
  1460. fsl_diu_setup(option);
  1461. #else
  1462. monitor_port = fsl_diu_name_to_port(monitor_string);
  1463. #endif
  1464. pr_info("Freescale Display Interface Unit (DIU) framebuffer driver\n");
  1465. #ifdef CONFIG_NOT_COHERENT_CACHE
  1466. np = of_find_node_by_type(NULL, "cpu");
  1467. if (!np) {
  1468. pr_err("fsl-diu-fb: can't find 'cpu' device node\n");
  1469. return -ENODEV;
  1470. }
  1471. prop = of_get_property(np, "d-cache-size", NULL);
  1472. if (prop == NULL) {
  1473. pr_err("fsl-diu-fb: missing 'd-cache-size' property' "
  1474. "in 'cpu' node\n");
  1475. of_node_put(np);
  1476. return -ENODEV;
  1477. }
  1478. /*
  1479. * Freescale PLRU requires 13/8 times the cache size to do a proper
  1480. * displacement flush
  1481. */
  1482. coherence_data_size = be32_to_cpup(prop) * 13;
  1483. coherence_data_size /= 8;
  1484. prop = of_get_property(np, "d-cache-line-size", NULL);
  1485. if (prop == NULL) {
  1486. pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' "
  1487. "in 'cpu' node\n");
  1488. of_node_put(np);
  1489. return -ENODEV;
  1490. }
  1491. d_cache_line_size = be32_to_cpup(prop);
  1492. of_node_put(np);
  1493. coherence_data = vmalloc(coherence_data_size);
  1494. if (!coherence_data)
  1495. return -ENOMEM;
  1496. #endif
  1497. ret = platform_driver_register(&fsl_diu_driver);
  1498. if (ret) {
  1499. pr_err("fsl-diu-fb: failed to register platform driver\n");
  1500. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1501. vfree(coherence_data);
  1502. #endif
  1503. iounmap(dr.diu_reg);
  1504. }
  1505. return ret;
  1506. }
  1507. static void __exit fsl_diu_exit(void)
  1508. {
  1509. platform_driver_unregister(&fsl_diu_driver);
  1510. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1511. vfree(coherence_data);
  1512. #endif
  1513. }
  1514. module_init(fsl_diu_init);
  1515. module_exit(fsl_diu_exit);
  1516. MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
  1517. MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
  1518. MODULE_LICENSE("GPL");
  1519. module_param_named(mode, fb_mode, charp, 0);
  1520. MODULE_PARM_DESC(mode,
  1521. "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
  1522. module_param_named(bpp, default_bpp, ulong, 0);
  1523. MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified in 'mode'");
  1524. module_param_named(monitor, monitor_string, charp, 0);
  1525. MODULE_PARM_DESC(monitor, "Specify the monitor port "
  1526. "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform");