cx88-video.c 52 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * video4linux video interface
  5. *
  6. * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  7. *
  8. * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
  9. * - Multituner support
  10. * - video_ioctl2 conversion
  11. * - PAL/M fixes
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/init.h>
  28. #include <linux/list.h>
  29. #include <linux/module.h>
  30. #include <linux/kmod.h>
  31. #include <linux/kernel.h>
  32. #include <linux/slab.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/kthread.h>
  37. #include <asm/div64.h>
  38. #include "cx88.h"
  39. #include <media/v4l2-common.h>
  40. #include <media/v4l2-ioctl.h>
  41. #include <media/wm8775.h>
  42. MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  43. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  44. MODULE_LICENSE("GPL");
  45. MODULE_VERSION(CX88_VERSION);
  46. /* ------------------------------------------------------------------ */
  47. static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  48. static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  49. static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  50. module_param_array(video_nr, int, NULL, 0444);
  51. module_param_array(vbi_nr, int, NULL, 0444);
  52. module_param_array(radio_nr, int, NULL, 0444);
  53. MODULE_PARM_DESC(video_nr,"video device numbers");
  54. MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
  55. MODULE_PARM_DESC(radio_nr,"radio device numbers");
  56. static unsigned int video_debug;
  57. module_param(video_debug,int,0644);
  58. MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
  59. static unsigned int irq_debug;
  60. module_param(irq_debug,int,0644);
  61. MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
  62. static unsigned int vid_limit = 16;
  63. module_param(vid_limit,int,0644);
  64. MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
  65. #define dprintk(level,fmt, arg...) if (video_debug >= level) \
  66. printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  67. /* ------------------------------------------------------------------- */
  68. /* static data */
  69. static const struct cx8800_fmt formats[] = {
  70. {
  71. .name = "8 bpp, gray",
  72. .fourcc = V4L2_PIX_FMT_GREY,
  73. .cxformat = ColorFormatY8,
  74. .depth = 8,
  75. .flags = FORMAT_FLAGS_PACKED,
  76. },{
  77. .name = "15 bpp RGB, le",
  78. .fourcc = V4L2_PIX_FMT_RGB555,
  79. .cxformat = ColorFormatRGB15,
  80. .depth = 16,
  81. .flags = FORMAT_FLAGS_PACKED,
  82. },{
  83. .name = "15 bpp RGB, be",
  84. .fourcc = V4L2_PIX_FMT_RGB555X,
  85. .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  86. .depth = 16,
  87. .flags = FORMAT_FLAGS_PACKED,
  88. },{
  89. .name = "16 bpp RGB, le",
  90. .fourcc = V4L2_PIX_FMT_RGB565,
  91. .cxformat = ColorFormatRGB16,
  92. .depth = 16,
  93. .flags = FORMAT_FLAGS_PACKED,
  94. },{
  95. .name = "16 bpp RGB, be",
  96. .fourcc = V4L2_PIX_FMT_RGB565X,
  97. .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  98. .depth = 16,
  99. .flags = FORMAT_FLAGS_PACKED,
  100. },{
  101. .name = "24 bpp RGB, le",
  102. .fourcc = V4L2_PIX_FMT_BGR24,
  103. .cxformat = ColorFormatRGB24,
  104. .depth = 24,
  105. .flags = FORMAT_FLAGS_PACKED,
  106. },{
  107. .name = "32 bpp RGB, le",
  108. .fourcc = V4L2_PIX_FMT_BGR32,
  109. .cxformat = ColorFormatRGB32,
  110. .depth = 32,
  111. .flags = FORMAT_FLAGS_PACKED,
  112. },{
  113. .name = "32 bpp RGB, be",
  114. .fourcc = V4L2_PIX_FMT_RGB32,
  115. .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
  116. .depth = 32,
  117. .flags = FORMAT_FLAGS_PACKED,
  118. },{
  119. .name = "4:2:2, packed, YUYV",
  120. .fourcc = V4L2_PIX_FMT_YUYV,
  121. .cxformat = ColorFormatYUY2,
  122. .depth = 16,
  123. .flags = FORMAT_FLAGS_PACKED,
  124. },{
  125. .name = "4:2:2, packed, UYVY",
  126. .fourcc = V4L2_PIX_FMT_UYVY,
  127. .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
  128. .depth = 16,
  129. .flags = FORMAT_FLAGS_PACKED,
  130. },
  131. };
  132. static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
  133. {
  134. unsigned int i;
  135. for (i = 0; i < ARRAY_SIZE(formats); i++)
  136. if (formats[i].fourcc == fourcc)
  137. return formats+i;
  138. return NULL;
  139. }
  140. /* ------------------------------------------------------------------- */
  141. static const struct v4l2_queryctrl no_ctl = {
  142. .name = "42",
  143. .flags = V4L2_CTRL_FLAG_DISABLED,
  144. };
  145. struct cx88_ctrl {
  146. /* control information */
  147. u32 id;
  148. s32 minimum;
  149. s32 maximum;
  150. u32 step;
  151. s32 default_value;
  152. /* control register information */
  153. u32 off;
  154. u32 reg;
  155. u32 sreg;
  156. u32 mask;
  157. u32 shift;
  158. };
  159. static const struct cx88_ctrl cx8800_ctls[] = {
  160. /* --- video --- */
  161. {
  162. .id = V4L2_CID_BRIGHTNESS,
  163. .minimum = 0x00,
  164. .maximum = 0xff,
  165. .step = 1,
  166. .default_value = 0x7f,
  167. .off = 128,
  168. .reg = MO_CONTR_BRIGHT,
  169. .mask = 0x00ff,
  170. .shift = 0,
  171. },{
  172. .id = V4L2_CID_CONTRAST,
  173. .minimum = 0,
  174. .maximum = 0xff,
  175. .step = 1,
  176. .default_value = 0x3f,
  177. .off = 0,
  178. .reg = MO_CONTR_BRIGHT,
  179. .mask = 0xff00,
  180. .shift = 8,
  181. },{
  182. .id = V4L2_CID_HUE,
  183. .minimum = 0,
  184. .maximum = 0xff,
  185. .step = 1,
  186. .default_value = 0x7f,
  187. .off = 128,
  188. .reg = MO_HUE,
  189. .mask = 0x00ff,
  190. .shift = 0,
  191. },{
  192. /* strictly, this only describes only U saturation.
  193. * V saturation is handled specially through code.
  194. */
  195. .id = V4L2_CID_SATURATION,
  196. .minimum = 0,
  197. .maximum = 0xff,
  198. .step = 1,
  199. .default_value = 0x7f,
  200. .off = 0,
  201. .reg = MO_UV_SATURATION,
  202. .mask = 0x00ff,
  203. .shift = 0,
  204. }, {
  205. .id = V4L2_CID_SHARPNESS,
  206. .minimum = 0,
  207. .maximum = 4,
  208. .step = 1,
  209. .default_value = 0x0,
  210. .off = 0,
  211. /* NOTE: the value is converted and written to both even
  212. and odd registers in the code */
  213. .reg = MO_FILTER_ODD,
  214. .mask = 7 << 7,
  215. .shift = 7,
  216. }, {
  217. .id = V4L2_CID_CHROMA_AGC,
  218. .minimum = 0,
  219. .maximum = 1,
  220. .default_value = 0x1,
  221. .reg = MO_INPUT_FORMAT,
  222. .mask = 1 << 10,
  223. .shift = 10,
  224. }, {
  225. .id = V4L2_CID_COLOR_KILLER,
  226. .minimum = 0,
  227. .maximum = 1,
  228. .default_value = 0x1,
  229. .reg = MO_INPUT_FORMAT,
  230. .mask = 1 << 9,
  231. .shift = 9,
  232. }, {
  233. .id = V4L2_CID_BAND_STOP_FILTER,
  234. .minimum = 0,
  235. .maximum = 1,
  236. .step = 1,
  237. .default_value = 0x0,
  238. .off = 0,
  239. .reg = MO_HTOTAL,
  240. .mask = 3 << 11,
  241. .shift = 11,
  242. }, {
  243. /* --- audio --- */
  244. .id = V4L2_CID_AUDIO_MUTE,
  245. .minimum = 0,
  246. .maximum = 1,
  247. .default_value = 1,
  248. .reg = AUD_VOL_CTL,
  249. .sreg = SHADOW_AUD_VOL_CTL,
  250. .mask = (1 << 6),
  251. .shift = 6,
  252. },{
  253. .id = V4L2_CID_AUDIO_VOLUME,
  254. .minimum = 0,
  255. .maximum = 0x3f,
  256. .step = 1,
  257. .default_value = 0x3f,
  258. .reg = AUD_VOL_CTL,
  259. .sreg = SHADOW_AUD_VOL_CTL,
  260. .mask = 0x3f,
  261. .shift = 0,
  262. },{
  263. .id = V4L2_CID_AUDIO_BALANCE,
  264. .minimum = 0,
  265. .maximum = 0x7f,
  266. .step = 1,
  267. .default_value = 0x40,
  268. .reg = AUD_BAL_CTL,
  269. .sreg = SHADOW_AUD_BAL_CTL,
  270. .mask = 0x7f,
  271. .shift = 0,
  272. }
  273. };
  274. enum { CX8800_CTLS = ARRAY_SIZE(cx8800_ctls) };
  275. int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
  276. {
  277. return 0;
  278. }
  279. EXPORT_SYMBOL(cx8800_ctrl_query);
  280. /* ------------------------------------------------------------------- */
  281. /* resource management */
  282. static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
  283. {
  284. struct cx88_core *core = dev->core;
  285. if (fh->resources & bit)
  286. /* have it already allocated */
  287. return 1;
  288. /* is it free? */
  289. mutex_lock(&core->lock);
  290. if (dev->resources & bit) {
  291. /* no, someone else uses it */
  292. mutex_unlock(&core->lock);
  293. return 0;
  294. }
  295. /* it's free, grab it */
  296. fh->resources |= bit;
  297. dev->resources |= bit;
  298. dprintk(1,"res: get %d\n",bit);
  299. mutex_unlock(&core->lock);
  300. return 1;
  301. }
  302. static
  303. int res_check(struct cx8800_fh *fh, unsigned int bit)
  304. {
  305. return (fh->resources & bit);
  306. }
  307. static
  308. int res_locked(struct cx8800_dev *dev, unsigned int bit)
  309. {
  310. return (dev->resources & bit);
  311. }
  312. static
  313. void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
  314. {
  315. struct cx88_core *core = dev->core;
  316. BUG_ON((fh->resources & bits) != bits);
  317. mutex_lock(&core->lock);
  318. fh->resources &= ~bits;
  319. dev->resources &= ~bits;
  320. dprintk(1,"res: put %d\n",bits);
  321. mutex_unlock(&core->lock);
  322. }
  323. /* ------------------------------------------------------------------ */
  324. int cx88_video_mux(struct cx88_core *core, unsigned int input)
  325. {
  326. /* struct cx88_core *core = dev->core; */
  327. dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
  328. input, INPUT(input).vmux,
  329. INPUT(input).gpio0,INPUT(input).gpio1,
  330. INPUT(input).gpio2,INPUT(input).gpio3);
  331. core->input = input;
  332. cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
  333. cx_write(MO_GP3_IO, INPUT(input).gpio3);
  334. cx_write(MO_GP0_IO, INPUT(input).gpio0);
  335. cx_write(MO_GP1_IO, INPUT(input).gpio1);
  336. cx_write(MO_GP2_IO, INPUT(input).gpio2);
  337. switch (INPUT(input).type) {
  338. case CX88_VMUX_SVIDEO:
  339. cx_set(MO_AFECFG_IO, 0x00000001);
  340. cx_set(MO_INPUT_FORMAT, 0x00010010);
  341. cx_set(MO_FILTER_EVEN, 0x00002020);
  342. cx_set(MO_FILTER_ODD, 0x00002020);
  343. break;
  344. default:
  345. cx_clear(MO_AFECFG_IO, 0x00000001);
  346. cx_clear(MO_INPUT_FORMAT, 0x00010010);
  347. cx_clear(MO_FILTER_EVEN, 0x00002020);
  348. cx_clear(MO_FILTER_ODD, 0x00002020);
  349. break;
  350. }
  351. /* if there are audioroutes defined, we have an external
  352. ADC to deal with audio */
  353. if (INPUT(input).audioroute) {
  354. /* The wm8775 module has the "2" route hardwired into
  355. the initialization. Some boards may use different
  356. routes for different inputs. HVR-1300 surely does */
  357. if (core->board.audio_chip &&
  358. core->board.audio_chip == V4L2_IDENT_WM8775) {
  359. call_all(core, audio, s_routing,
  360. INPUT(input).audioroute, 0, 0);
  361. }
  362. /* cx2388's C-ADC is connected to the tuner only.
  363. When used with S-Video, that ADC is busy dealing with
  364. chroma, so an external must be used for baseband audio */
  365. if (INPUT(input).type != CX88_VMUX_TELEVISION &&
  366. INPUT(input).type != CX88_VMUX_CABLE) {
  367. /* "I2S ADC mode" */
  368. core->tvaudio = WW_I2SADC;
  369. cx88_set_tvaudio(core);
  370. } else {
  371. /* Normal mode */
  372. cx_write(AUD_I2SCNTL, 0x0);
  373. cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
  374. }
  375. }
  376. return 0;
  377. }
  378. EXPORT_SYMBOL(cx88_video_mux);
  379. /* ------------------------------------------------------------------ */
  380. static int start_video_dma(struct cx8800_dev *dev,
  381. struct cx88_dmaqueue *q,
  382. struct cx88_buffer *buf)
  383. {
  384. struct cx88_core *core = dev->core;
  385. /* setup fifo + format */
  386. cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
  387. buf->bpl, buf->risc.dma);
  388. cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
  389. cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
  390. /* reset counter */
  391. cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
  392. q->count = 1;
  393. /* enable irqs */
  394. cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
  395. /* Enables corresponding bits at PCI_INT_STAT:
  396. bits 0 to 4: video, audio, transport stream, VIP, Host
  397. bit 7: timer
  398. bits 8 and 9: DMA complete for: SRC, DST
  399. bits 10 and 11: BERR signal asserted for RISC: RD, WR
  400. bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
  401. */
  402. cx_set(MO_VID_INTMSK, 0x0f0011);
  403. /* enable capture */
  404. cx_set(VID_CAPTURE_CONTROL,0x06);
  405. /* start dma */
  406. cx_set(MO_DEV_CNTRL2, (1<<5));
  407. cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
  408. return 0;
  409. }
  410. #ifdef CONFIG_PM
  411. static int stop_video_dma(struct cx8800_dev *dev)
  412. {
  413. struct cx88_core *core = dev->core;
  414. /* stop dma */
  415. cx_clear(MO_VID_DMACNTRL, 0x11);
  416. /* disable capture */
  417. cx_clear(VID_CAPTURE_CONTROL,0x06);
  418. /* disable irqs */
  419. cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
  420. cx_clear(MO_VID_INTMSK, 0x0f0011);
  421. return 0;
  422. }
  423. #endif
  424. static int restart_video_queue(struct cx8800_dev *dev,
  425. struct cx88_dmaqueue *q)
  426. {
  427. struct cx88_core *core = dev->core;
  428. struct cx88_buffer *buf, *prev;
  429. if (!list_empty(&q->active)) {
  430. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  431. dprintk(2,"restart_queue [%p/%d]: restart dma\n",
  432. buf, buf->vb.i);
  433. start_video_dma(dev, q, buf);
  434. list_for_each_entry(buf, &q->active, vb.queue)
  435. buf->count = q->count++;
  436. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  437. return 0;
  438. }
  439. prev = NULL;
  440. for (;;) {
  441. if (list_empty(&q->queued))
  442. return 0;
  443. buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
  444. if (NULL == prev) {
  445. list_move_tail(&buf->vb.queue, &q->active);
  446. start_video_dma(dev, q, buf);
  447. buf->vb.state = VIDEOBUF_ACTIVE;
  448. buf->count = q->count++;
  449. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  450. dprintk(2,"[%p/%d] restart_queue - first active\n",
  451. buf,buf->vb.i);
  452. } else if (prev->vb.width == buf->vb.width &&
  453. prev->vb.height == buf->vb.height &&
  454. prev->fmt == buf->fmt) {
  455. list_move_tail(&buf->vb.queue, &q->active);
  456. buf->vb.state = VIDEOBUF_ACTIVE;
  457. buf->count = q->count++;
  458. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  459. dprintk(2,"[%p/%d] restart_queue - move to active\n",
  460. buf,buf->vb.i);
  461. } else {
  462. return 0;
  463. }
  464. prev = buf;
  465. }
  466. }
  467. /* ------------------------------------------------------------------ */
  468. static int
  469. buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
  470. {
  471. struct cx8800_fh *fh = q->priv_data;
  472. *size = fh->fmt->depth*fh->width*fh->height >> 3;
  473. if (0 == *count)
  474. *count = 32;
  475. if (*size * *count > vid_limit * 1024 * 1024)
  476. *count = (vid_limit * 1024 * 1024) / *size;
  477. return 0;
  478. }
  479. static int
  480. buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  481. enum v4l2_field field)
  482. {
  483. struct cx8800_fh *fh = q->priv_data;
  484. struct cx8800_dev *dev = fh->dev;
  485. struct cx88_core *core = dev->core;
  486. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  487. struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
  488. int rc, init_buffer = 0;
  489. BUG_ON(NULL == fh->fmt);
  490. if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
  491. fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
  492. return -EINVAL;
  493. buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
  494. if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
  495. return -EINVAL;
  496. if (buf->fmt != fh->fmt ||
  497. buf->vb.width != fh->width ||
  498. buf->vb.height != fh->height ||
  499. buf->vb.field != field) {
  500. buf->fmt = fh->fmt;
  501. buf->vb.width = fh->width;
  502. buf->vb.height = fh->height;
  503. buf->vb.field = field;
  504. init_buffer = 1;
  505. }
  506. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  507. init_buffer = 1;
  508. if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
  509. goto fail;
  510. }
  511. if (init_buffer) {
  512. buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
  513. switch (buf->vb.field) {
  514. case V4L2_FIELD_TOP:
  515. cx88_risc_buffer(dev->pci, &buf->risc,
  516. dma->sglist, 0, UNSET,
  517. buf->bpl, 0, buf->vb.height);
  518. break;
  519. case V4L2_FIELD_BOTTOM:
  520. cx88_risc_buffer(dev->pci, &buf->risc,
  521. dma->sglist, UNSET, 0,
  522. buf->bpl, 0, buf->vb.height);
  523. break;
  524. case V4L2_FIELD_INTERLACED:
  525. cx88_risc_buffer(dev->pci, &buf->risc,
  526. dma->sglist, 0, buf->bpl,
  527. buf->bpl, buf->bpl,
  528. buf->vb.height >> 1);
  529. break;
  530. case V4L2_FIELD_SEQ_TB:
  531. cx88_risc_buffer(dev->pci, &buf->risc,
  532. dma->sglist,
  533. 0, buf->bpl * (buf->vb.height >> 1),
  534. buf->bpl, 0,
  535. buf->vb.height >> 1);
  536. break;
  537. case V4L2_FIELD_SEQ_BT:
  538. cx88_risc_buffer(dev->pci, &buf->risc,
  539. dma->sglist,
  540. buf->bpl * (buf->vb.height >> 1), 0,
  541. buf->bpl, 0,
  542. buf->vb.height >> 1);
  543. break;
  544. default:
  545. BUG();
  546. }
  547. }
  548. dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
  549. buf, buf->vb.i,
  550. fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
  551. (unsigned long)buf->risc.dma);
  552. buf->vb.state = VIDEOBUF_PREPARED;
  553. return 0;
  554. fail:
  555. cx88_free_buffer(q,buf);
  556. return rc;
  557. }
  558. static void
  559. buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
  560. {
  561. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  562. struct cx88_buffer *prev;
  563. struct cx8800_fh *fh = vq->priv_data;
  564. struct cx8800_dev *dev = fh->dev;
  565. struct cx88_core *core = dev->core;
  566. struct cx88_dmaqueue *q = &dev->vidq;
  567. /* add jump to stopper */
  568. buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
  569. buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
  570. if (!list_empty(&q->queued)) {
  571. list_add_tail(&buf->vb.queue,&q->queued);
  572. buf->vb.state = VIDEOBUF_QUEUED;
  573. dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
  574. buf, buf->vb.i);
  575. } else if (list_empty(&q->active)) {
  576. list_add_tail(&buf->vb.queue,&q->active);
  577. start_video_dma(dev, q, buf);
  578. buf->vb.state = VIDEOBUF_ACTIVE;
  579. buf->count = q->count++;
  580. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  581. dprintk(2,"[%p/%d] buffer_queue - first active\n",
  582. buf, buf->vb.i);
  583. } else {
  584. prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
  585. if (prev->vb.width == buf->vb.width &&
  586. prev->vb.height == buf->vb.height &&
  587. prev->fmt == buf->fmt) {
  588. list_add_tail(&buf->vb.queue,&q->active);
  589. buf->vb.state = VIDEOBUF_ACTIVE;
  590. buf->count = q->count++;
  591. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  592. dprintk(2,"[%p/%d] buffer_queue - append to active\n",
  593. buf, buf->vb.i);
  594. } else {
  595. list_add_tail(&buf->vb.queue,&q->queued);
  596. buf->vb.state = VIDEOBUF_QUEUED;
  597. dprintk(2,"[%p/%d] buffer_queue - first queued\n",
  598. buf, buf->vb.i);
  599. }
  600. }
  601. }
  602. static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  603. {
  604. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  605. cx88_free_buffer(q,buf);
  606. }
  607. static const struct videobuf_queue_ops cx8800_video_qops = {
  608. .buf_setup = buffer_setup,
  609. .buf_prepare = buffer_prepare,
  610. .buf_queue = buffer_queue,
  611. .buf_release = buffer_release,
  612. };
  613. /* ------------------------------------------------------------------ */
  614. /* ------------------------------------------------------------------ */
  615. static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
  616. {
  617. switch (fh->type) {
  618. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  619. return &fh->vidq;
  620. case V4L2_BUF_TYPE_VBI_CAPTURE:
  621. return &fh->vbiq;
  622. default:
  623. BUG();
  624. return NULL;
  625. }
  626. }
  627. static int get_ressource(struct cx8800_fh *fh)
  628. {
  629. switch (fh->type) {
  630. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  631. return RESOURCE_VIDEO;
  632. case V4L2_BUF_TYPE_VBI_CAPTURE:
  633. return RESOURCE_VBI;
  634. default:
  635. BUG();
  636. return 0;
  637. }
  638. }
  639. static int video_open(struct file *file)
  640. {
  641. struct video_device *vdev = video_devdata(file);
  642. struct cx8800_dev *dev = video_drvdata(file);
  643. struct cx88_core *core = dev->core;
  644. struct cx8800_fh *fh;
  645. enum v4l2_buf_type type = 0;
  646. int radio = 0;
  647. switch (vdev->vfl_type) {
  648. case VFL_TYPE_GRABBER:
  649. type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  650. break;
  651. case VFL_TYPE_VBI:
  652. type = V4L2_BUF_TYPE_VBI_CAPTURE;
  653. break;
  654. case VFL_TYPE_RADIO:
  655. radio = 1;
  656. break;
  657. }
  658. dprintk(1, "open dev=%s radio=%d type=%s\n",
  659. video_device_node_name(vdev), radio, v4l2_type_names[type]);
  660. /* allocate + initialize per filehandle data */
  661. fh = kzalloc(sizeof(*fh),GFP_KERNEL);
  662. if (unlikely(!fh))
  663. return -ENOMEM;
  664. file->private_data = fh;
  665. fh->dev = dev;
  666. fh->radio = radio;
  667. fh->type = type;
  668. fh->width = 320;
  669. fh->height = 240;
  670. fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
  671. mutex_lock(&core->lock);
  672. videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
  673. &dev->pci->dev, &dev->slock,
  674. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  675. V4L2_FIELD_INTERLACED,
  676. sizeof(struct cx88_buffer),
  677. fh, NULL);
  678. videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
  679. &dev->pci->dev, &dev->slock,
  680. V4L2_BUF_TYPE_VBI_CAPTURE,
  681. V4L2_FIELD_SEQ_TB,
  682. sizeof(struct cx88_buffer),
  683. fh, NULL);
  684. if (fh->radio) {
  685. dprintk(1,"video_open: setting radio device\n");
  686. cx_write(MO_GP3_IO, core->board.radio.gpio3);
  687. cx_write(MO_GP0_IO, core->board.radio.gpio0);
  688. cx_write(MO_GP1_IO, core->board.radio.gpio1);
  689. cx_write(MO_GP2_IO, core->board.radio.gpio2);
  690. if (core->board.radio.audioroute) {
  691. if(core->board.audio_chip &&
  692. core->board.audio_chip == V4L2_IDENT_WM8775) {
  693. call_all(core, audio, s_routing,
  694. core->board.radio.audioroute, 0, 0);
  695. }
  696. /* "I2S ADC mode" */
  697. core->tvaudio = WW_I2SADC;
  698. cx88_set_tvaudio(core);
  699. } else {
  700. /* FM Mode */
  701. core->tvaudio = WW_FM;
  702. cx88_set_tvaudio(core);
  703. cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
  704. }
  705. call_all(core, tuner, s_radio);
  706. }
  707. core->users++;
  708. mutex_unlock(&core->lock);
  709. return 0;
  710. }
  711. static ssize_t
  712. video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
  713. {
  714. struct cx8800_fh *fh = file->private_data;
  715. switch (fh->type) {
  716. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  717. if (res_locked(fh->dev,RESOURCE_VIDEO))
  718. return -EBUSY;
  719. return videobuf_read_one(&fh->vidq, data, count, ppos,
  720. file->f_flags & O_NONBLOCK);
  721. case V4L2_BUF_TYPE_VBI_CAPTURE:
  722. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  723. return -EBUSY;
  724. return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
  725. file->f_flags & O_NONBLOCK);
  726. default:
  727. BUG();
  728. return 0;
  729. }
  730. }
  731. static unsigned int
  732. video_poll(struct file *file, struct poll_table_struct *wait)
  733. {
  734. struct cx8800_fh *fh = file->private_data;
  735. struct cx88_buffer *buf;
  736. unsigned int rc = POLLERR;
  737. if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
  738. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  739. return POLLERR;
  740. return videobuf_poll_stream(file, &fh->vbiq, wait);
  741. }
  742. mutex_lock(&fh->vidq.vb_lock);
  743. if (res_check(fh,RESOURCE_VIDEO)) {
  744. /* streaming capture */
  745. if (list_empty(&fh->vidq.stream))
  746. goto done;
  747. buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
  748. } else {
  749. /* read() capture */
  750. buf = (struct cx88_buffer*)fh->vidq.read_buf;
  751. if (NULL == buf)
  752. goto done;
  753. }
  754. poll_wait(file, &buf->vb.done, wait);
  755. if (buf->vb.state == VIDEOBUF_DONE ||
  756. buf->vb.state == VIDEOBUF_ERROR)
  757. rc = POLLIN|POLLRDNORM;
  758. else
  759. rc = 0;
  760. done:
  761. mutex_unlock(&fh->vidq.vb_lock);
  762. return rc;
  763. }
  764. static int video_release(struct file *file)
  765. {
  766. struct cx8800_fh *fh = file->private_data;
  767. struct cx8800_dev *dev = fh->dev;
  768. /* turn off overlay */
  769. if (res_check(fh, RESOURCE_OVERLAY)) {
  770. /* FIXME */
  771. res_free(dev,fh,RESOURCE_OVERLAY);
  772. }
  773. /* stop video capture */
  774. if (res_check(fh, RESOURCE_VIDEO)) {
  775. videobuf_queue_cancel(&fh->vidq);
  776. res_free(dev,fh,RESOURCE_VIDEO);
  777. }
  778. if (fh->vidq.read_buf) {
  779. buffer_release(&fh->vidq,fh->vidq.read_buf);
  780. kfree(fh->vidq.read_buf);
  781. }
  782. /* stop vbi capture */
  783. if (res_check(fh, RESOURCE_VBI)) {
  784. videobuf_stop(&fh->vbiq);
  785. res_free(dev,fh,RESOURCE_VBI);
  786. }
  787. videobuf_mmap_free(&fh->vidq);
  788. videobuf_mmap_free(&fh->vbiq);
  789. mutex_lock(&dev->core->lock);
  790. file->private_data = NULL;
  791. kfree(fh);
  792. dev->core->users--;
  793. if (!dev->core->users)
  794. call_all(dev->core, core, s_power, 0);
  795. mutex_unlock(&dev->core->lock);
  796. return 0;
  797. }
  798. static int
  799. video_mmap(struct file *file, struct vm_area_struct * vma)
  800. {
  801. struct cx8800_fh *fh = file->private_data;
  802. return videobuf_mmap_mapper(get_queue(fh), vma);
  803. }
  804. /* ------------------------------------------------------------------ */
  805. /* VIDEO CTRL IOCTLS */
  806. static int cx8800_s_ctrl(struct v4l2_ctrl *ctrl)
  807. {
  808. struct cx88_core *core =
  809. container_of(ctrl->handler, struct cx88_core, hdl);
  810. const struct cx88_ctrl *cc = ctrl->priv;
  811. u32 value,mask;
  812. /* Pass changes onto any WM8775 */
  813. if (core->board.audio_chip == V4L2_IDENT_WM8775) {
  814. switch (ctrl->id) {
  815. case V4L2_CID_AUDIO_MUTE:
  816. wm8775_s_ctrl(core, ctrl->id, ctrl->val);
  817. break;
  818. case V4L2_CID_AUDIO_VOLUME:
  819. wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
  820. (0x90 + ctrl->val) << 8 : 0);
  821. break;
  822. case V4L2_CID_AUDIO_BALANCE:
  823. wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
  824. break;
  825. default:
  826. break;
  827. }
  828. }
  829. mask = cc->mask;
  830. switch (ctrl->id) {
  831. case V4L2_CID_AUDIO_BALANCE:
  832. value = (ctrl->val < 0x40) ? (0x7f - ctrl->val) : (ctrl->val - 0x40);
  833. break;
  834. case V4L2_CID_AUDIO_VOLUME:
  835. value = 0x3f - (ctrl->val & 0x3f);
  836. break;
  837. case V4L2_CID_SATURATION:
  838. /* special v_sat handling */
  839. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  840. if (core->tvnorm & V4L2_STD_SECAM) {
  841. /* For SECAM, both U and V sat should be equal */
  842. value=value<<8|value;
  843. } else {
  844. /* Keeps U Saturation proportional to V Sat */
  845. value=(value*0x5a)/0x7f<<8|value;
  846. }
  847. mask=0xffff;
  848. break;
  849. case V4L2_CID_SHARPNESS:
  850. /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
  851. value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
  852. /* needs to be set for both fields */
  853. cx_andor(MO_FILTER_EVEN, mask, value);
  854. break;
  855. case V4L2_CID_CHROMA_AGC:
  856. /* Do not allow chroma AGC to be enabled for SECAM */
  857. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  858. if ((core->tvnorm & V4L2_STD_SECAM) && value)
  859. return -EINVAL;
  860. break;
  861. default:
  862. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  863. break;
  864. }
  865. dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  866. ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
  867. mask, cc->sreg ? " [shadowed]" : "");
  868. if (cc->sreg)
  869. cx_sandor(cc->sreg, cc->reg, mask, value);
  870. else
  871. cx_andor(cc->reg, mask, value);
  872. return 0;
  873. }
  874. /* ------------------------------------------------------------------ */
  875. /* VIDEO IOCTLS */
  876. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  877. struct v4l2_format *f)
  878. {
  879. struct cx8800_fh *fh = priv;
  880. f->fmt.pix.width = fh->width;
  881. f->fmt.pix.height = fh->height;
  882. f->fmt.pix.field = fh->vidq.field;
  883. f->fmt.pix.pixelformat = fh->fmt->fourcc;
  884. f->fmt.pix.bytesperline =
  885. (f->fmt.pix.width * fh->fmt->depth) >> 3;
  886. f->fmt.pix.sizeimage =
  887. f->fmt.pix.height * f->fmt.pix.bytesperline;
  888. return 0;
  889. }
  890. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  891. struct v4l2_format *f)
  892. {
  893. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  894. const struct cx8800_fmt *fmt;
  895. enum v4l2_field field;
  896. unsigned int maxw, maxh;
  897. fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  898. if (NULL == fmt)
  899. return -EINVAL;
  900. field = f->fmt.pix.field;
  901. maxw = norm_maxw(core->tvnorm);
  902. maxh = norm_maxh(core->tvnorm);
  903. if (V4L2_FIELD_ANY == field) {
  904. field = (f->fmt.pix.height > maxh/2)
  905. ? V4L2_FIELD_INTERLACED
  906. : V4L2_FIELD_BOTTOM;
  907. }
  908. switch (field) {
  909. case V4L2_FIELD_TOP:
  910. case V4L2_FIELD_BOTTOM:
  911. maxh = maxh / 2;
  912. break;
  913. case V4L2_FIELD_INTERLACED:
  914. break;
  915. default:
  916. return -EINVAL;
  917. }
  918. f->fmt.pix.field = field;
  919. v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
  920. &f->fmt.pix.height, 32, maxh, 0, 0);
  921. f->fmt.pix.bytesperline =
  922. (f->fmt.pix.width * fmt->depth) >> 3;
  923. f->fmt.pix.sizeimage =
  924. f->fmt.pix.height * f->fmt.pix.bytesperline;
  925. return 0;
  926. }
  927. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  928. struct v4l2_format *f)
  929. {
  930. struct cx8800_fh *fh = priv;
  931. int err = vidioc_try_fmt_vid_cap (file,priv,f);
  932. if (0 != err)
  933. return err;
  934. fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  935. fh->width = f->fmt.pix.width;
  936. fh->height = f->fmt.pix.height;
  937. fh->vidq.field = f->fmt.pix.field;
  938. return 0;
  939. }
  940. void cx88_querycap(struct file *file, struct cx88_core *core,
  941. struct v4l2_capability *cap)
  942. {
  943. struct video_device *vdev = video_devdata(file);
  944. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  945. cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
  946. if (UNSET != core->board.tuner_type)
  947. cap->device_caps |= V4L2_CAP_TUNER;
  948. switch (vdev->vfl_type) {
  949. case VFL_TYPE_RADIO:
  950. cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
  951. break;
  952. case VFL_TYPE_GRABBER:
  953. cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
  954. break;
  955. case VFL_TYPE_VBI:
  956. cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
  957. break;
  958. }
  959. cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE |
  960. V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS;
  961. if (core->board.radio.type == CX88_RADIO)
  962. cap->capabilities |= V4L2_CAP_RADIO;
  963. }
  964. EXPORT_SYMBOL(cx88_querycap);
  965. static int vidioc_querycap(struct file *file, void *priv,
  966. struct v4l2_capability *cap)
  967. {
  968. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  969. struct cx88_core *core = dev->core;
  970. strcpy(cap->driver, "cx8800");
  971. sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
  972. cx88_querycap(file, core, cap);
  973. return 0;
  974. }
  975. static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
  976. struct v4l2_fmtdesc *f)
  977. {
  978. if (unlikely(f->index >= ARRAY_SIZE(formats)))
  979. return -EINVAL;
  980. strlcpy(f->description,formats[f->index].name,sizeof(f->description));
  981. f->pixelformat = formats[f->index].fourcc;
  982. return 0;
  983. }
  984. static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
  985. {
  986. struct cx8800_fh *fh = priv;
  987. return (videobuf_reqbufs(get_queue(fh), p));
  988. }
  989. static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
  990. {
  991. struct cx8800_fh *fh = priv;
  992. return (videobuf_querybuf(get_queue(fh), p));
  993. }
  994. static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  995. {
  996. struct cx8800_fh *fh = priv;
  997. return (videobuf_qbuf(get_queue(fh), p));
  998. }
  999. static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1000. {
  1001. struct cx8800_fh *fh = priv;
  1002. return (videobuf_dqbuf(get_queue(fh), p,
  1003. file->f_flags & O_NONBLOCK));
  1004. }
  1005. static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
  1006. {
  1007. struct cx8800_fh *fh = priv;
  1008. struct cx8800_dev *dev = fh->dev;
  1009. /* We should remember that this driver also supports teletext, */
  1010. /* so we have to test if the v4l2_buf_type is VBI capture data. */
  1011. if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  1012. (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
  1013. return -EINVAL;
  1014. if (unlikely(i != fh->type))
  1015. return -EINVAL;
  1016. if (unlikely(!res_get(dev,fh,get_ressource(fh))))
  1017. return -EBUSY;
  1018. return videobuf_streamon(get_queue(fh));
  1019. }
  1020. static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
  1021. {
  1022. struct cx8800_fh *fh = priv;
  1023. struct cx8800_dev *dev = fh->dev;
  1024. int err, res;
  1025. if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  1026. (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
  1027. return -EINVAL;
  1028. if (i != fh->type)
  1029. return -EINVAL;
  1030. res = get_ressource(fh);
  1031. err = videobuf_streamoff(get_queue(fh));
  1032. if (err < 0)
  1033. return err;
  1034. res_free(dev,fh,res);
  1035. return 0;
  1036. }
  1037. static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
  1038. {
  1039. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1040. mutex_lock(&core->lock);
  1041. cx88_set_tvnorm(core,*tvnorms);
  1042. mutex_unlock(&core->lock);
  1043. return 0;
  1044. }
  1045. /* only one input in this sample driver */
  1046. int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
  1047. {
  1048. static const char * const iname[] = {
  1049. [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
  1050. [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
  1051. [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
  1052. [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
  1053. [ CX88_VMUX_SVIDEO ] = "S-Video",
  1054. [ CX88_VMUX_TELEVISION ] = "Television",
  1055. [ CX88_VMUX_CABLE ] = "Cable TV",
  1056. [ CX88_VMUX_DVB ] = "DVB",
  1057. [ CX88_VMUX_DEBUG ] = "for debug only",
  1058. };
  1059. unsigned int n = i->index;
  1060. if (n >= 4)
  1061. return -EINVAL;
  1062. if (0 == INPUT(n).type)
  1063. return -EINVAL;
  1064. i->type = V4L2_INPUT_TYPE_CAMERA;
  1065. strcpy(i->name,iname[INPUT(n).type]);
  1066. if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
  1067. (CX88_VMUX_CABLE == INPUT(n).type)) {
  1068. i->type = V4L2_INPUT_TYPE_TUNER;
  1069. i->std = CX88_NORMS;
  1070. }
  1071. return 0;
  1072. }
  1073. EXPORT_SYMBOL(cx88_enum_input);
  1074. static int vidioc_enum_input (struct file *file, void *priv,
  1075. struct v4l2_input *i)
  1076. {
  1077. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1078. return cx88_enum_input (core,i);
  1079. }
  1080. static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
  1081. {
  1082. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1083. *i = core->input;
  1084. return 0;
  1085. }
  1086. static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
  1087. {
  1088. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1089. if (i >= 4)
  1090. return -EINVAL;
  1091. mutex_lock(&core->lock);
  1092. cx88_newstation(core);
  1093. cx88_video_mux(core,i);
  1094. mutex_unlock(&core->lock);
  1095. return 0;
  1096. }
  1097. static int vidioc_g_tuner (struct file *file, void *priv,
  1098. struct v4l2_tuner *t)
  1099. {
  1100. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1101. u32 reg;
  1102. if (unlikely(UNSET == core->board.tuner_type))
  1103. return -EINVAL;
  1104. if (0 != t->index)
  1105. return -EINVAL;
  1106. strcpy(t->name, "Television");
  1107. t->type = V4L2_TUNER_ANALOG_TV;
  1108. t->capability = V4L2_TUNER_CAP_NORM;
  1109. t->rangehigh = 0xffffffffUL;
  1110. cx88_get_stereo(core ,t);
  1111. reg = cx_read(MO_DEVICE_STATUS);
  1112. t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
  1113. return 0;
  1114. }
  1115. static int vidioc_s_tuner (struct file *file, void *priv,
  1116. struct v4l2_tuner *t)
  1117. {
  1118. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1119. if (UNSET == core->board.tuner_type)
  1120. return -EINVAL;
  1121. if (0 != t->index)
  1122. return -EINVAL;
  1123. cx88_set_stereo(core, t->audmode, 1);
  1124. return 0;
  1125. }
  1126. static int vidioc_g_frequency (struct file *file, void *priv,
  1127. struct v4l2_frequency *f)
  1128. {
  1129. struct cx8800_fh *fh = priv;
  1130. struct cx88_core *core = fh->dev->core;
  1131. if (unlikely(UNSET == core->board.tuner_type))
  1132. return -EINVAL;
  1133. /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
  1134. f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
  1135. f->frequency = core->freq;
  1136. call_all(core, tuner, g_frequency, f);
  1137. return 0;
  1138. }
  1139. int cx88_set_freq (struct cx88_core *core,
  1140. struct v4l2_frequency *f)
  1141. {
  1142. if (unlikely(UNSET == core->board.tuner_type))
  1143. return -EINVAL;
  1144. if (unlikely(f->tuner != 0))
  1145. return -EINVAL;
  1146. mutex_lock(&core->lock);
  1147. core->freq = f->frequency;
  1148. cx88_newstation(core);
  1149. call_all(core, tuner, s_frequency, f);
  1150. /* When changing channels it is required to reset TVAUDIO */
  1151. msleep (10);
  1152. cx88_set_tvaudio(core);
  1153. mutex_unlock(&core->lock);
  1154. return 0;
  1155. }
  1156. EXPORT_SYMBOL(cx88_set_freq);
  1157. static int vidioc_s_frequency (struct file *file, void *priv,
  1158. struct v4l2_frequency *f)
  1159. {
  1160. struct cx8800_fh *fh = priv;
  1161. struct cx88_core *core = fh->dev->core;
  1162. if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
  1163. return -EINVAL;
  1164. if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
  1165. return -EINVAL;
  1166. return
  1167. cx88_set_freq (core,f);
  1168. }
  1169. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1170. static int vidioc_g_register (struct file *file, void *fh,
  1171. struct v4l2_dbg_register *reg)
  1172. {
  1173. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1174. if (!v4l2_chip_match_host(&reg->match))
  1175. return -EINVAL;
  1176. /* cx2388x has a 24-bit register space */
  1177. reg->val = cx_read(reg->reg & 0xffffff);
  1178. reg->size = 4;
  1179. return 0;
  1180. }
  1181. static int vidioc_s_register (struct file *file, void *fh,
  1182. struct v4l2_dbg_register *reg)
  1183. {
  1184. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1185. if (!v4l2_chip_match_host(&reg->match))
  1186. return -EINVAL;
  1187. cx_write(reg->reg & 0xffffff, reg->val);
  1188. return 0;
  1189. }
  1190. #endif
  1191. /* ----------------------------------------------------------- */
  1192. /* RADIO ESPECIFIC IOCTLS */
  1193. /* ----------------------------------------------------------- */
  1194. static int radio_g_tuner (struct file *file, void *priv,
  1195. struct v4l2_tuner *t)
  1196. {
  1197. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1198. if (unlikely(t->index > 0))
  1199. return -EINVAL;
  1200. strcpy(t->name, "Radio");
  1201. t->type = V4L2_TUNER_RADIO;
  1202. call_all(core, tuner, g_tuner, t);
  1203. return 0;
  1204. }
  1205. /* FIXME: Should add a standard for radio */
  1206. static int radio_s_tuner (struct file *file, void *priv,
  1207. struct v4l2_tuner *t)
  1208. {
  1209. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1210. if (0 != t->index)
  1211. return -EINVAL;
  1212. call_all(core, tuner, s_tuner, t);
  1213. return 0;
  1214. }
  1215. /* ----------------------------------------------------------- */
  1216. static void cx8800_vid_timeout(unsigned long data)
  1217. {
  1218. struct cx8800_dev *dev = (struct cx8800_dev*)data;
  1219. struct cx88_core *core = dev->core;
  1220. struct cx88_dmaqueue *q = &dev->vidq;
  1221. struct cx88_buffer *buf;
  1222. unsigned long flags;
  1223. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1224. cx_clear(MO_VID_DMACNTRL, 0x11);
  1225. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1226. spin_lock_irqsave(&dev->slock,flags);
  1227. while (!list_empty(&q->active)) {
  1228. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  1229. list_del(&buf->vb.queue);
  1230. buf->vb.state = VIDEOBUF_ERROR;
  1231. wake_up(&buf->vb.done);
  1232. printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
  1233. buf, buf->vb.i, (unsigned long)buf->risc.dma);
  1234. }
  1235. restart_video_queue(dev,q);
  1236. spin_unlock_irqrestore(&dev->slock,flags);
  1237. }
  1238. static const char *cx88_vid_irqs[32] = {
  1239. "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
  1240. "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
  1241. "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
  1242. "y_sync", "u_sync", "v_sync", "vbi_sync",
  1243. "opc_err", "par_err", "rip_err", "pci_abort",
  1244. };
  1245. static void cx8800_vid_irq(struct cx8800_dev *dev)
  1246. {
  1247. struct cx88_core *core = dev->core;
  1248. u32 status, mask, count;
  1249. status = cx_read(MO_VID_INTSTAT);
  1250. mask = cx_read(MO_VID_INTMSK);
  1251. if (0 == (status & mask))
  1252. return;
  1253. cx_write(MO_VID_INTSTAT, status);
  1254. if (irq_debug || (status & mask & ~0xff))
  1255. cx88_print_irqbits(core->name, "irq vid",
  1256. cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
  1257. status, mask);
  1258. /* risc op code error */
  1259. if (status & (1 << 16)) {
  1260. printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
  1261. cx_clear(MO_VID_DMACNTRL, 0x11);
  1262. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1263. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1264. }
  1265. /* risc1 y */
  1266. if (status & 0x01) {
  1267. spin_lock(&dev->slock);
  1268. count = cx_read(MO_VIDY_GPCNT);
  1269. cx88_wakeup(core, &dev->vidq, count);
  1270. spin_unlock(&dev->slock);
  1271. }
  1272. /* risc1 vbi */
  1273. if (status & 0x08) {
  1274. spin_lock(&dev->slock);
  1275. count = cx_read(MO_VBI_GPCNT);
  1276. cx88_wakeup(core, &dev->vbiq, count);
  1277. spin_unlock(&dev->slock);
  1278. }
  1279. /* risc2 y */
  1280. if (status & 0x10) {
  1281. dprintk(2,"stopper video\n");
  1282. spin_lock(&dev->slock);
  1283. restart_video_queue(dev,&dev->vidq);
  1284. spin_unlock(&dev->slock);
  1285. }
  1286. /* risc2 vbi */
  1287. if (status & 0x80) {
  1288. dprintk(2,"stopper vbi\n");
  1289. spin_lock(&dev->slock);
  1290. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1291. spin_unlock(&dev->slock);
  1292. }
  1293. }
  1294. static irqreturn_t cx8800_irq(int irq, void *dev_id)
  1295. {
  1296. struct cx8800_dev *dev = dev_id;
  1297. struct cx88_core *core = dev->core;
  1298. u32 status;
  1299. int loop, handled = 0;
  1300. for (loop = 0; loop < 10; loop++) {
  1301. status = cx_read(MO_PCI_INTSTAT) &
  1302. (core->pci_irqmask | PCI_INT_VIDINT);
  1303. if (0 == status)
  1304. goto out;
  1305. cx_write(MO_PCI_INTSTAT, status);
  1306. handled = 1;
  1307. if (status & core->pci_irqmask)
  1308. cx88_core_irq(core,status);
  1309. if (status & PCI_INT_VIDINT)
  1310. cx8800_vid_irq(dev);
  1311. };
  1312. if (10 == loop) {
  1313. printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
  1314. core->name);
  1315. cx_write(MO_PCI_INTMSK,0);
  1316. }
  1317. out:
  1318. return IRQ_RETVAL(handled);
  1319. }
  1320. /* ----------------------------------------------------------- */
  1321. /* exported stuff */
  1322. static const struct v4l2_file_operations video_fops =
  1323. {
  1324. .owner = THIS_MODULE,
  1325. .open = video_open,
  1326. .release = video_release,
  1327. .read = video_read,
  1328. .poll = video_poll,
  1329. .mmap = video_mmap,
  1330. .unlocked_ioctl = video_ioctl2,
  1331. };
  1332. static const struct v4l2_ioctl_ops video_ioctl_ops = {
  1333. .vidioc_querycap = vidioc_querycap,
  1334. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  1335. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  1336. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  1337. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  1338. .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
  1339. .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
  1340. .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
  1341. .vidioc_reqbufs = vidioc_reqbufs,
  1342. .vidioc_querybuf = vidioc_querybuf,
  1343. .vidioc_qbuf = vidioc_qbuf,
  1344. .vidioc_dqbuf = vidioc_dqbuf,
  1345. .vidioc_s_std = vidioc_s_std,
  1346. .vidioc_enum_input = vidioc_enum_input,
  1347. .vidioc_g_input = vidioc_g_input,
  1348. .vidioc_s_input = vidioc_s_input,
  1349. .vidioc_streamon = vidioc_streamon,
  1350. .vidioc_streamoff = vidioc_streamoff,
  1351. .vidioc_g_tuner = vidioc_g_tuner,
  1352. .vidioc_s_tuner = vidioc_s_tuner,
  1353. .vidioc_g_frequency = vidioc_g_frequency,
  1354. .vidioc_s_frequency = vidioc_s_frequency,
  1355. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1356. .vidioc_g_register = vidioc_g_register,
  1357. .vidioc_s_register = vidioc_s_register,
  1358. #endif
  1359. };
  1360. static struct video_device cx8800_vbi_template;
  1361. static const struct video_device cx8800_video_template = {
  1362. .name = "cx8800-video",
  1363. .fops = &video_fops,
  1364. .ioctl_ops = &video_ioctl_ops,
  1365. .tvnorms = CX88_NORMS,
  1366. .current_norm = V4L2_STD_NTSC_M,
  1367. };
  1368. static const struct v4l2_file_operations radio_fops =
  1369. {
  1370. .owner = THIS_MODULE,
  1371. .open = video_open,
  1372. .release = video_release,
  1373. .unlocked_ioctl = video_ioctl2,
  1374. };
  1375. static const struct v4l2_ioctl_ops radio_ioctl_ops = {
  1376. .vidioc_querycap = vidioc_querycap,
  1377. .vidioc_g_tuner = radio_g_tuner,
  1378. .vidioc_s_tuner = radio_s_tuner,
  1379. .vidioc_g_frequency = vidioc_g_frequency,
  1380. .vidioc_s_frequency = vidioc_s_frequency,
  1381. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1382. .vidioc_g_register = vidioc_g_register,
  1383. .vidioc_s_register = vidioc_s_register,
  1384. #endif
  1385. };
  1386. static const struct video_device cx8800_radio_template = {
  1387. .name = "cx8800-radio",
  1388. .fops = &radio_fops,
  1389. .ioctl_ops = &radio_ioctl_ops,
  1390. };
  1391. static const struct v4l2_ctrl_ops cx8800_ctrl_ops = {
  1392. .s_ctrl = cx8800_s_ctrl,
  1393. };
  1394. /* ----------------------------------------------------------- */
  1395. static void cx8800_unregister_video(struct cx8800_dev *dev)
  1396. {
  1397. if (dev->radio_dev) {
  1398. if (video_is_registered(dev->radio_dev))
  1399. video_unregister_device(dev->radio_dev);
  1400. else
  1401. video_device_release(dev->radio_dev);
  1402. dev->radio_dev = NULL;
  1403. }
  1404. if (dev->vbi_dev) {
  1405. if (video_is_registered(dev->vbi_dev))
  1406. video_unregister_device(dev->vbi_dev);
  1407. else
  1408. video_device_release(dev->vbi_dev);
  1409. dev->vbi_dev = NULL;
  1410. }
  1411. if (dev->video_dev) {
  1412. if (video_is_registered(dev->video_dev))
  1413. video_unregister_device(dev->video_dev);
  1414. else
  1415. video_device_release(dev->video_dev);
  1416. dev->video_dev = NULL;
  1417. }
  1418. }
  1419. static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
  1420. const struct pci_device_id *pci_id)
  1421. {
  1422. struct cx8800_dev *dev;
  1423. struct cx88_core *core;
  1424. int err;
  1425. int i;
  1426. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  1427. if (NULL == dev)
  1428. return -ENOMEM;
  1429. /* pci init */
  1430. dev->pci = pci_dev;
  1431. if (pci_enable_device(pci_dev)) {
  1432. err = -EIO;
  1433. goto fail_free;
  1434. }
  1435. core = cx88_core_get(dev->pci);
  1436. if (NULL == core) {
  1437. err = -EINVAL;
  1438. goto fail_free;
  1439. }
  1440. dev->core = core;
  1441. /* print pci info */
  1442. dev->pci_rev = pci_dev->revision;
  1443. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  1444. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  1445. "latency: %d, mmio: 0x%llx\n", core->name,
  1446. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  1447. dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
  1448. pci_set_master(pci_dev);
  1449. if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
  1450. printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
  1451. err = -EIO;
  1452. goto fail_core;
  1453. }
  1454. /* Initialize VBI template */
  1455. memcpy( &cx8800_vbi_template, &cx8800_video_template,
  1456. sizeof(cx8800_vbi_template) );
  1457. strcpy(cx8800_vbi_template.name,"cx8800-vbi");
  1458. /* initialize driver struct */
  1459. spin_lock_init(&dev->slock);
  1460. core->tvnorm = cx8800_video_template.current_norm;
  1461. /* init video dma queues */
  1462. INIT_LIST_HEAD(&dev->vidq.active);
  1463. INIT_LIST_HEAD(&dev->vidq.queued);
  1464. dev->vidq.timeout.function = cx8800_vid_timeout;
  1465. dev->vidq.timeout.data = (unsigned long)dev;
  1466. init_timer(&dev->vidq.timeout);
  1467. cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
  1468. MO_VID_DMACNTRL,0x11,0x00);
  1469. /* init vbi dma queues */
  1470. INIT_LIST_HEAD(&dev->vbiq.active);
  1471. INIT_LIST_HEAD(&dev->vbiq.queued);
  1472. dev->vbiq.timeout.function = cx8800_vbi_timeout;
  1473. dev->vbiq.timeout.data = (unsigned long)dev;
  1474. init_timer(&dev->vbiq.timeout);
  1475. cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
  1476. MO_VID_DMACNTRL,0x88,0x00);
  1477. /* get irq */
  1478. err = request_irq(pci_dev->irq, cx8800_irq,
  1479. IRQF_SHARED | IRQF_DISABLED, core->name, dev);
  1480. if (err < 0) {
  1481. printk(KERN_ERR "%s/0: can't get IRQ %d\n",
  1482. core->name,pci_dev->irq);
  1483. goto fail_core;
  1484. }
  1485. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1486. for (i = 0; i < CX8800_CTLS; i++) {
  1487. const struct cx88_ctrl *cc = &cx8800_ctls[i];
  1488. struct v4l2_ctrl *vc;
  1489. vc = v4l2_ctrl_new_std(&core->hdl, &cx8800_ctrl_ops,
  1490. cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
  1491. if (vc == NULL) {
  1492. err = core->hdl.error;
  1493. goto fail_core;
  1494. }
  1495. vc->priv = (void *)cc;
  1496. }
  1497. /* load and configure helper modules */
  1498. if (core->board.audio_chip == V4L2_IDENT_WM8775) {
  1499. struct i2c_board_info wm8775_info = {
  1500. .type = "wm8775",
  1501. .addr = 0x36 >> 1,
  1502. .platform_data = &core->wm8775_data,
  1503. };
  1504. struct v4l2_subdev *sd;
  1505. if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
  1506. core->wm8775_data.is_nova_s = true;
  1507. else
  1508. core->wm8775_data.is_nova_s = false;
  1509. sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
  1510. &wm8775_info, NULL);
  1511. if (sd != NULL) {
  1512. core->sd_wm8775 = sd;
  1513. sd->grp_id = WM8775_GID;
  1514. }
  1515. }
  1516. if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
  1517. /* This probes for a tda9874 as is used on some
  1518. Pixelview Ultra boards. */
  1519. v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
  1520. "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
  1521. }
  1522. switch (core->boardnr) {
  1523. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1524. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
  1525. static const struct i2c_board_info rtc_info = {
  1526. I2C_BOARD_INFO("isl1208", 0x6f)
  1527. };
  1528. request_module("rtc-isl1208");
  1529. core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
  1530. }
  1531. /* break intentionally omitted */
  1532. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1533. request_module("ir-kbd-i2c");
  1534. }
  1535. /* Sets device info at pci_dev */
  1536. pci_set_drvdata(pci_dev, dev);
  1537. /* initial device configuration */
  1538. mutex_lock(&core->lock);
  1539. cx88_set_tvnorm(core, core->tvnorm);
  1540. v4l2_ctrl_handler_setup(&core->hdl);
  1541. cx88_video_mux(core, 0);
  1542. /* register v4l devices */
  1543. dev->video_dev = cx88_vdev_init(core,dev->pci,
  1544. &cx8800_video_template,"video");
  1545. video_set_drvdata(dev->video_dev, dev);
  1546. err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
  1547. video_nr[core->nr]);
  1548. if (err < 0) {
  1549. printk(KERN_ERR "%s/0: can't register video device\n",
  1550. core->name);
  1551. goto fail_unreg;
  1552. }
  1553. printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
  1554. core->name, video_device_node_name(dev->video_dev));
  1555. dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
  1556. video_set_drvdata(dev->vbi_dev, dev);
  1557. err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
  1558. vbi_nr[core->nr]);
  1559. if (err < 0) {
  1560. printk(KERN_ERR "%s/0: can't register vbi device\n",
  1561. core->name);
  1562. goto fail_unreg;
  1563. }
  1564. printk(KERN_INFO "%s/0: registered device %s\n",
  1565. core->name, video_device_node_name(dev->vbi_dev));
  1566. if (core->board.radio.type == CX88_RADIO) {
  1567. dev->radio_dev = cx88_vdev_init(core,dev->pci,
  1568. &cx8800_radio_template,"radio");
  1569. video_set_drvdata(dev->radio_dev, dev);
  1570. err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
  1571. radio_nr[core->nr]);
  1572. if (err < 0) {
  1573. printk(KERN_ERR "%s/0: can't register radio device\n",
  1574. core->name);
  1575. goto fail_unreg;
  1576. }
  1577. printk(KERN_INFO "%s/0: registered device %s\n",
  1578. core->name, video_device_node_name(dev->radio_dev));
  1579. }
  1580. /* start tvaudio thread */
  1581. if (core->board.tuner_type != TUNER_ABSENT) {
  1582. core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
  1583. if (IS_ERR(core->kthread)) {
  1584. err = PTR_ERR(core->kthread);
  1585. printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
  1586. core->name, err);
  1587. }
  1588. }
  1589. mutex_unlock(&core->lock);
  1590. return 0;
  1591. fail_unreg:
  1592. cx8800_unregister_video(dev);
  1593. free_irq(pci_dev->irq, dev);
  1594. mutex_unlock(&core->lock);
  1595. fail_core:
  1596. cx88_core_put(core,dev->pci);
  1597. fail_free:
  1598. kfree(dev);
  1599. return err;
  1600. }
  1601. static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
  1602. {
  1603. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1604. struct cx88_core *core = dev->core;
  1605. /* stop thread */
  1606. if (core->kthread) {
  1607. kthread_stop(core->kthread);
  1608. core->kthread = NULL;
  1609. }
  1610. if (core->ir)
  1611. cx88_ir_stop(core);
  1612. cx88_shutdown(core); /* FIXME */
  1613. pci_disable_device(pci_dev);
  1614. /* unregister stuff */
  1615. free_irq(pci_dev->irq, dev);
  1616. cx8800_unregister_video(dev);
  1617. pci_set_drvdata(pci_dev, NULL);
  1618. /* free memory */
  1619. btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
  1620. cx88_core_put(core,dev->pci);
  1621. kfree(dev);
  1622. }
  1623. #ifdef CONFIG_PM
  1624. static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
  1625. {
  1626. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1627. struct cx88_core *core = dev->core;
  1628. /* stop video+vbi capture */
  1629. spin_lock(&dev->slock);
  1630. if (!list_empty(&dev->vidq.active)) {
  1631. printk("%s/0: suspend video\n", core->name);
  1632. stop_video_dma(dev);
  1633. del_timer(&dev->vidq.timeout);
  1634. }
  1635. if (!list_empty(&dev->vbiq.active)) {
  1636. printk("%s/0: suspend vbi\n", core->name);
  1637. cx8800_stop_vbi_dma(dev);
  1638. del_timer(&dev->vbiq.timeout);
  1639. }
  1640. spin_unlock(&dev->slock);
  1641. if (core->ir)
  1642. cx88_ir_stop(core);
  1643. /* FIXME -- shutdown device */
  1644. cx88_shutdown(core);
  1645. pci_save_state(pci_dev);
  1646. if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
  1647. pci_disable_device(pci_dev);
  1648. dev->state.disabled = 1;
  1649. }
  1650. return 0;
  1651. }
  1652. static int cx8800_resume(struct pci_dev *pci_dev)
  1653. {
  1654. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1655. struct cx88_core *core = dev->core;
  1656. int err;
  1657. if (dev->state.disabled) {
  1658. err=pci_enable_device(pci_dev);
  1659. if (err) {
  1660. printk(KERN_ERR "%s/0: can't enable device\n",
  1661. core->name);
  1662. return err;
  1663. }
  1664. dev->state.disabled = 0;
  1665. }
  1666. err= pci_set_power_state(pci_dev, PCI_D0);
  1667. if (err) {
  1668. printk(KERN_ERR "%s/0: can't set power state\n", core->name);
  1669. pci_disable_device(pci_dev);
  1670. dev->state.disabled = 1;
  1671. return err;
  1672. }
  1673. pci_restore_state(pci_dev);
  1674. /* FIXME: re-initialize hardware */
  1675. cx88_reset(core);
  1676. if (core->ir)
  1677. cx88_ir_start(core);
  1678. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1679. /* restart video+vbi capture */
  1680. spin_lock(&dev->slock);
  1681. if (!list_empty(&dev->vidq.active)) {
  1682. printk("%s/0: resume video\n", core->name);
  1683. restart_video_queue(dev,&dev->vidq);
  1684. }
  1685. if (!list_empty(&dev->vbiq.active)) {
  1686. printk("%s/0: resume vbi\n", core->name);
  1687. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1688. }
  1689. spin_unlock(&dev->slock);
  1690. return 0;
  1691. }
  1692. #endif
  1693. /* ----------------------------------------------------------- */
  1694. static const struct pci_device_id cx8800_pci_tbl[] = {
  1695. {
  1696. .vendor = 0x14f1,
  1697. .device = 0x8800,
  1698. .subvendor = PCI_ANY_ID,
  1699. .subdevice = PCI_ANY_ID,
  1700. },{
  1701. /* --- end of list --- */
  1702. }
  1703. };
  1704. MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
  1705. static struct pci_driver cx8800_pci_driver = {
  1706. .name = "cx8800",
  1707. .id_table = cx8800_pci_tbl,
  1708. .probe = cx8800_initdev,
  1709. .remove = __devexit_p(cx8800_finidev),
  1710. #ifdef CONFIG_PM
  1711. .suspend = cx8800_suspend,
  1712. .resume = cx8800_resume,
  1713. #endif
  1714. };
  1715. static int __init cx8800_init(void)
  1716. {
  1717. printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %s loaded\n",
  1718. CX88_VERSION);
  1719. return pci_register_driver(&cx8800_pci_driver);
  1720. }
  1721. static void __exit cx8800_fini(void)
  1722. {
  1723. pci_unregister_driver(&cx8800_pci_driver);
  1724. }
  1725. module_init(cx8800_init);
  1726. module_exit(cx8800_fini);