handle.c 11 KB

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  1. /*
  2. * linux/kernel/irq/handle.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code.
  8. *
  9. * Detailed information is available in Documentation/DocBook/genericirq
  10. *
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/module.h>
  14. #include <linux/random.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <linux/rculist.h>
  18. #include <linux/hash.h>
  19. #include <trace/irq.h>
  20. #include <linux/bootmem.h>
  21. #include "internals.h"
  22. /*
  23. * lockdep: we want to handle all irq_desc locks as a single lock-class:
  24. */
  25. struct lock_class_key irq_desc_lock_class;
  26. /**
  27. * handle_bad_irq - handle spurious and unhandled irqs
  28. * @irq: the interrupt number
  29. * @desc: description of the interrupt
  30. *
  31. * Handles spurious and unhandled IRQ's. It also prints a debugmessage.
  32. */
  33. void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
  34. {
  35. print_irq_desc(irq, desc);
  36. kstat_incr_irqs_this_cpu(irq, desc);
  37. ack_bad_irq(irq);
  38. }
  39. #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS)
  40. static void __init init_irq_default_affinity(void)
  41. {
  42. alloc_bootmem_cpumask_var(&irq_default_affinity);
  43. cpumask_setall(irq_default_affinity);
  44. }
  45. #else
  46. static void __init init_irq_default_affinity(void)
  47. {
  48. }
  49. #endif
  50. /*
  51. * Linux has a controller-independent interrupt architecture.
  52. * Every controller has a 'controller-template', that is used
  53. * by the main code to do the right thing. Each driver-visible
  54. * interrupt source is transparently wired to the appropriate
  55. * controller. Thus drivers need not be aware of the
  56. * interrupt-controller.
  57. *
  58. * The code is designed to be easily extended with new/different
  59. * interrupt controllers, without having to do assembly magic or
  60. * having to touch the generic code.
  61. *
  62. * Controller mappings for all interrupt sources:
  63. */
  64. int nr_irqs = NR_IRQS;
  65. EXPORT_SYMBOL_GPL(nr_irqs);
  66. #ifdef CONFIG_SPARSE_IRQ
  67. static struct irq_desc irq_desc_init = {
  68. .irq = -1,
  69. .status = IRQ_DISABLED,
  70. .chip = &no_irq_chip,
  71. .handle_irq = handle_bad_irq,
  72. .depth = 1,
  73. .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
  74. };
  75. void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr)
  76. {
  77. unsigned long bytes;
  78. char *ptr;
  79. int node;
  80. /* Compute how many bytes we need per irq and allocate them */
  81. bytes = nr * sizeof(unsigned int);
  82. node = cpu_to_node(cpu);
  83. ptr = kzalloc_node(bytes, GFP_ATOMIC, node);
  84. printk(KERN_DEBUG " alloc kstat_irqs on cpu %d node %d\n", cpu, node);
  85. if (ptr)
  86. desc->kstat_irqs = (unsigned int *)ptr;
  87. }
  88. static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
  89. {
  90. memcpy(desc, &irq_desc_init, sizeof(struct irq_desc));
  91. spin_lock_init(&desc->lock);
  92. desc->irq = irq;
  93. #ifdef CONFIG_SMP
  94. desc->cpu = cpu;
  95. #endif
  96. lockdep_set_class(&desc->lock, &irq_desc_lock_class);
  97. init_kstat_irqs(desc, cpu, nr_cpu_ids);
  98. if (!desc->kstat_irqs) {
  99. printk(KERN_ERR "can not alloc kstat_irqs\n");
  100. BUG_ON(1);
  101. }
  102. if (!init_alloc_desc_masks(desc, cpu, false)) {
  103. printk(KERN_ERR "can not alloc irq_desc cpumasks\n");
  104. BUG_ON(1);
  105. }
  106. arch_init_chip_data(desc, cpu);
  107. }
  108. /*
  109. * Protect the sparse_irqs:
  110. */
  111. DEFINE_SPINLOCK(sparse_irq_lock);
  112. struct irq_desc **irq_desc_ptrs __read_mostly;
  113. static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
  114. [0 ... NR_IRQS_LEGACY-1] = {
  115. .irq = -1,
  116. .status = IRQ_DISABLED,
  117. .chip = &no_irq_chip,
  118. .handle_irq = handle_bad_irq,
  119. .depth = 1,
  120. .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
  121. }
  122. };
  123. static unsigned int *kstat_irqs_legacy;
  124. int __init early_irq_init(void)
  125. {
  126. struct irq_desc *desc;
  127. int legacy_count;
  128. int i;
  129. init_irq_default_affinity();
  130. /* initialize nr_irqs based on nr_cpu_ids */
  131. arch_probe_nr_irqs();
  132. printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d\n", NR_IRQS, nr_irqs);
  133. desc = irq_desc_legacy;
  134. legacy_count = ARRAY_SIZE(irq_desc_legacy);
  135. /* allocate irq_desc_ptrs array based on nr_irqs */
  136. irq_desc_ptrs = alloc_bootmem(nr_irqs * sizeof(void *));
  137. /* allocate based on nr_cpu_ids */
  138. /* FIXME: invert kstat_irgs, and it'd be a per_cpu_alloc'd thing */
  139. kstat_irqs_legacy = alloc_bootmem(NR_IRQS_LEGACY * nr_cpu_ids *
  140. sizeof(int));
  141. for (i = 0; i < legacy_count; i++) {
  142. desc[i].irq = i;
  143. desc[i].kstat_irqs = kstat_irqs_legacy + i * nr_cpu_ids;
  144. lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
  145. init_alloc_desc_masks(&desc[i], 0, true);
  146. irq_desc_ptrs[i] = desc + i;
  147. }
  148. for (i = legacy_count; i < nr_irqs; i++)
  149. irq_desc_ptrs[i] = NULL;
  150. return arch_early_irq_init();
  151. }
  152. struct irq_desc *irq_to_desc(unsigned int irq)
  153. {
  154. if (irq_desc_ptrs && irq < nr_irqs)
  155. return irq_desc_ptrs[irq];
  156. return NULL;
  157. }
  158. struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
  159. {
  160. struct irq_desc *desc;
  161. unsigned long flags;
  162. int node;
  163. if (irq >= nr_irqs) {
  164. WARN(1, "irq (%d) >= nr_irqs (%d) in irq_to_desc_alloc\n",
  165. irq, nr_irqs);
  166. return NULL;
  167. }
  168. desc = irq_desc_ptrs[irq];
  169. if (desc)
  170. return desc;
  171. spin_lock_irqsave(&sparse_irq_lock, flags);
  172. /* We have to check it to avoid races with another CPU */
  173. desc = irq_desc_ptrs[irq];
  174. if (desc)
  175. goto out_unlock;
  176. node = cpu_to_node(cpu);
  177. desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node);
  178. printk(KERN_DEBUG " alloc irq_desc for %d on cpu %d node %d\n",
  179. irq, cpu, node);
  180. if (!desc) {
  181. printk(KERN_ERR "can not alloc irq_desc\n");
  182. BUG_ON(1);
  183. }
  184. init_one_irq_desc(irq, desc, cpu);
  185. irq_desc_ptrs[irq] = desc;
  186. out_unlock:
  187. spin_unlock_irqrestore(&sparse_irq_lock, flags);
  188. return desc;
  189. }
  190. #else /* !CONFIG_SPARSE_IRQ */
  191. struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
  192. [0 ... NR_IRQS-1] = {
  193. .status = IRQ_DISABLED,
  194. .chip = &no_irq_chip,
  195. .handle_irq = handle_bad_irq,
  196. .depth = 1,
  197. .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
  198. }
  199. };
  200. int __init early_irq_init(void)
  201. {
  202. struct irq_desc *desc;
  203. int count;
  204. int i;
  205. init_irq_default_affinity();
  206. printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS);
  207. desc = irq_desc;
  208. count = ARRAY_SIZE(irq_desc);
  209. for (i = 0; i < count; i++) {
  210. desc[i].irq = i;
  211. init_alloc_desc_masks(&desc[i], 0, true);
  212. }
  213. return arch_early_irq_init();
  214. }
  215. struct irq_desc *irq_to_desc(unsigned int irq)
  216. {
  217. return (irq < NR_IRQS) ? irq_desc + irq : NULL;
  218. }
  219. struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
  220. {
  221. return irq_to_desc(irq);
  222. }
  223. #endif /* !CONFIG_SPARSE_IRQ */
  224. /*
  225. * What should we do if we get a hw irq event on an illegal vector?
  226. * Each architecture has to answer this themself.
  227. */
  228. static void ack_bad(unsigned int irq)
  229. {
  230. struct irq_desc *desc = irq_to_desc(irq);
  231. print_irq_desc(irq, desc);
  232. ack_bad_irq(irq);
  233. }
  234. /*
  235. * NOP functions
  236. */
  237. static void noop(unsigned int irq)
  238. {
  239. }
  240. static unsigned int noop_ret(unsigned int irq)
  241. {
  242. return 0;
  243. }
  244. /*
  245. * Generic no controller implementation
  246. */
  247. struct irq_chip no_irq_chip = {
  248. .name = "none",
  249. .startup = noop_ret,
  250. .shutdown = noop,
  251. .enable = noop,
  252. .disable = noop,
  253. .ack = ack_bad,
  254. .end = noop,
  255. };
  256. /*
  257. * Generic dummy implementation which can be used for
  258. * real dumb interrupt sources
  259. */
  260. struct irq_chip dummy_irq_chip = {
  261. .name = "dummy",
  262. .startup = noop_ret,
  263. .shutdown = noop,
  264. .enable = noop,
  265. .disable = noop,
  266. .ack = noop,
  267. .mask = noop,
  268. .unmask = noop,
  269. .end = noop,
  270. };
  271. /*
  272. * Special, empty irq handler:
  273. */
  274. irqreturn_t no_action(int cpl, void *dev_id)
  275. {
  276. return IRQ_NONE;
  277. }
  278. DEFINE_TRACE(irq_handler_entry);
  279. DEFINE_TRACE(irq_handler_exit);
  280. /**
  281. * handle_IRQ_event - irq action chain handler
  282. * @irq: the interrupt number
  283. * @action: the interrupt action chain for this irq
  284. *
  285. * Handles the action chain of an irq event
  286. */
  287. irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
  288. {
  289. irqreturn_t ret, retval = IRQ_NONE;
  290. unsigned int status = 0;
  291. if (!(action->flags & IRQF_DISABLED))
  292. local_irq_enable_in_hardirq();
  293. do {
  294. trace_irq_handler_entry(irq, action);
  295. ret = action->handler(irq, action->dev_id);
  296. trace_irq_handler_exit(irq, action, ret);
  297. if (ret == IRQ_HANDLED)
  298. status |= action->flags;
  299. retval |= ret;
  300. action = action->next;
  301. } while (action);
  302. if (status & IRQF_SAMPLE_RANDOM)
  303. add_interrupt_randomness(irq);
  304. local_irq_disable();
  305. return retval;
  306. }
  307. #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
  308. /**
  309. * __do_IRQ - original all in one highlevel IRQ handler
  310. * @irq: the interrupt number
  311. *
  312. * __do_IRQ handles all normal device IRQ's (the special
  313. * SMP cross-CPU interrupts have their own specific
  314. * handlers).
  315. *
  316. * This is the original x86 implementation which is used for every
  317. * interrupt type.
  318. */
  319. unsigned int __do_IRQ(unsigned int irq)
  320. {
  321. struct irq_desc *desc = irq_to_desc(irq);
  322. struct irqaction *action;
  323. unsigned int status;
  324. kstat_incr_irqs_this_cpu(irq, desc);
  325. if (CHECK_IRQ_PER_CPU(desc->status)) {
  326. irqreturn_t action_ret;
  327. /*
  328. * No locking required for CPU-local interrupts:
  329. */
  330. if (desc->chip->ack) {
  331. desc->chip->ack(irq);
  332. /* get new one */
  333. desc = irq_remap_to_desc(irq, desc);
  334. }
  335. if (likely(!(desc->status & IRQ_DISABLED))) {
  336. action_ret = handle_IRQ_event(irq, desc->action);
  337. if (!noirqdebug)
  338. note_interrupt(irq, desc, action_ret);
  339. }
  340. desc->chip->end(irq);
  341. return 1;
  342. }
  343. spin_lock(&desc->lock);
  344. if (desc->chip->ack) {
  345. desc->chip->ack(irq);
  346. desc = irq_remap_to_desc(irq, desc);
  347. }
  348. /*
  349. * REPLAY is when Linux resends an IRQ that was dropped earlier
  350. * WAITING is used by probe to mark irqs that are being tested
  351. */
  352. status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
  353. status |= IRQ_PENDING; /* we _want_ to handle it */
  354. /*
  355. * If the IRQ is disabled for whatever reason, we cannot
  356. * use the action we have.
  357. */
  358. action = NULL;
  359. if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
  360. action = desc->action;
  361. status &= ~IRQ_PENDING; /* we commit to handling */
  362. status |= IRQ_INPROGRESS; /* we are handling it */
  363. }
  364. desc->status = status;
  365. /*
  366. * If there is no IRQ handler or it was disabled, exit early.
  367. * Since we set PENDING, if another processor is handling
  368. * a different instance of this same irq, the other processor
  369. * will take care of it.
  370. */
  371. if (unlikely(!action))
  372. goto out;
  373. /*
  374. * Edge triggered interrupts need to remember
  375. * pending events.
  376. * This applies to any hw interrupts that allow a second
  377. * instance of the same irq to arrive while we are in do_IRQ
  378. * or in the handler. But the code here only handles the _second_
  379. * instance of the irq, not the third or fourth. So it is mostly
  380. * useful for irq hardware that does not mask cleanly in an
  381. * SMP environment.
  382. */
  383. for (;;) {
  384. irqreturn_t action_ret;
  385. spin_unlock(&desc->lock);
  386. action_ret = handle_IRQ_event(irq, action);
  387. if (!noirqdebug)
  388. note_interrupt(irq, desc, action_ret);
  389. spin_lock(&desc->lock);
  390. if (likely(!(desc->status & IRQ_PENDING)))
  391. break;
  392. desc->status &= ~IRQ_PENDING;
  393. }
  394. desc->status &= ~IRQ_INPROGRESS;
  395. out:
  396. /*
  397. * The ->end() handler has to deal with interrupts which got
  398. * disabled while the handler was running.
  399. */
  400. desc->chip->end(irq);
  401. spin_unlock(&desc->lock);
  402. return 1;
  403. }
  404. #endif
  405. void early_init_irq_lock_class(void)
  406. {
  407. struct irq_desc *desc;
  408. int i;
  409. for_each_irq_desc(i, desc) {
  410. lockdep_set_class(&desc->lock, &irq_desc_lock_class);
  411. }
  412. }
  413. #ifdef CONFIG_SPARSE_IRQ
  414. unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
  415. {
  416. struct irq_desc *desc = irq_to_desc(irq);
  417. return desc ? desc->kstat_irqs[cpu] : 0;
  418. }
  419. #endif
  420. EXPORT_SYMBOL(kstat_irqs_cpu);