omap_hwmod.c 60 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2010 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - handle IO mapping
  120. * - bus throughput & module latency measurement code
  121. *
  122. * XXX add tests at the beginning of each function to ensure the hwmod is
  123. * in the appropriate state
  124. * XXX error return values should be checked to ensure that they are
  125. * appropriate
  126. */
  127. #undef DEBUG
  128. #include <linux/kernel.h>
  129. #include <linux/errno.h>
  130. #include <linux/io.h>
  131. #include <linux/clk.h>
  132. #include <linux/delay.h>
  133. #include <linux/err.h>
  134. #include <linux/list.h>
  135. #include <linux/mutex.h>
  136. #include <linux/spinlock.h>
  137. #include <plat/common.h>
  138. #include <plat/cpu.h>
  139. #include "clockdomain.h"
  140. #include "powerdomain.h"
  141. #include <plat/clock.h>
  142. #include <plat/omap_hwmod.h>
  143. #include <plat/prcm.h>
  144. #include "cm2xxx_3xxx.h"
  145. #include "cm44xx.h"
  146. #include "prm2xxx_3xxx.h"
  147. #include "prm44xx.h"
  148. #include "mux.h"
  149. /* Maximum microseconds to wait for OMAP module to softreset */
  150. #define MAX_MODULE_SOFTRESET_WAIT 10000
  151. /* Name of the OMAP hwmod for the MPU */
  152. #define MPU_INITIATOR_NAME "mpu"
  153. /* omap_hwmod_list contains all registered struct omap_hwmods */
  154. static LIST_HEAD(omap_hwmod_list);
  155. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  156. static struct omap_hwmod *mpu_oh;
  157. /* Private functions */
  158. /**
  159. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  160. * @oh: struct omap_hwmod *
  161. *
  162. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  163. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  164. * OCP_SYSCONFIG register or 0 upon success.
  165. */
  166. static int _update_sysc_cache(struct omap_hwmod *oh)
  167. {
  168. if (!oh->class->sysc) {
  169. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  170. return -EINVAL;
  171. }
  172. /* XXX ensure module interface clock is up */
  173. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  174. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  175. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  176. return 0;
  177. }
  178. /**
  179. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  180. * @v: OCP_SYSCONFIG value to write
  181. * @oh: struct omap_hwmod *
  182. *
  183. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  184. * one. No return value.
  185. */
  186. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  187. {
  188. if (!oh->class->sysc) {
  189. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  190. return;
  191. }
  192. /* XXX ensure module interface clock is up */
  193. /* Module might have lost context, always update cache and register */
  194. oh->_sysc_cache = v;
  195. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  196. }
  197. /**
  198. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  199. * @oh: struct omap_hwmod *
  200. * @standbymode: MIDLEMODE field bits
  201. * @v: pointer to register contents to modify
  202. *
  203. * Update the master standby mode bits in @v to be @standbymode for
  204. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  205. * upon error or 0 upon success.
  206. */
  207. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  208. u32 *v)
  209. {
  210. u32 mstandby_mask;
  211. u8 mstandby_shift;
  212. if (!oh->class->sysc ||
  213. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  214. return -EINVAL;
  215. if (!oh->class->sysc->sysc_fields) {
  216. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  217. return -EINVAL;
  218. }
  219. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  220. mstandby_mask = (0x3 << mstandby_shift);
  221. *v &= ~mstandby_mask;
  222. *v |= __ffs(standbymode) << mstandby_shift;
  223. return 0;
  224. }
  225. /**
  226. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  227. * @oh: struct omap_hwmod *
  228. * @idlemode: SIDLEMODE field bits
  229. * @v: pointer to register contents to modify
  230. *
  231. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  232. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  233. * or 0 upon success.
  234. */
  235. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  236. {
  237. u32 sidle_mask;
  238. u8 sidle_shift;
  239. if (!oh->class->sysc ||
  240. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  241. return -EINVAL;
  242. if (!oh->class->sysc->sysc_fields) {
  243. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  244. return -EINVAL;
  245. }
  246. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  247. sidle_mask = (0x3 << sidle_shift);
  248. *v &= ~sidle_mask;
  249. *v |= __ffs(idlemode) << sidle_shift;
  250. return 0;
  251. }
  252. /**
  253. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  254. * @oh: struct omap_hwmod *
  255. * @clockact: CLOCKACTIVITY field bits
  256. * @v: pointer to register contents to modify
  257. *
  258. * Update the clockactivity mode bits in @v to be @clockact for the
  259. * @oh hwmod. Used for additional powersaving on some modules. Does
  260. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  261. * success.
  262. */
  263. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  264. {
  265. u32 clkact_mask;
  266. u8 clkact_shift;
  267. if (!oh->class->sysc ||
  268. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  269. return -EINVAL;
  270. if (!oh->class->sysc->sysc_fields) {
  271. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  272. return -EINVAL;
  273. }
  274. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  275. clkact_mask = (0x3 << clkact_shift);
  276. *v &= ~clkact_mask;
  277. *v |= clockact << clkact_shift;
  278. return 0;
  279. }
  280. /**
  281. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  282. * @oh: struct omap_hwmod *
  283. * @v: pointer to register contents to modify
  284. *
  285. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  286. * error or 0 upon success.
  287. */
  288. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  289. {
  290. u32 softrst_mask;
  291. if (!oh->class->sysc ||
  292. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  293. return -EINVAL;
  294. if (!oh->class->sysc->sysc_fields) {
  295. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  296. return -EINVAL;
  297. }
  298. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  299. *v |= softrst_mask;
  300. return 0;
  301. }
  302. /**
  303. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  304. * @oh: struct omap_hwmod *
  305. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  306. * @v: pointer to register contents to modify
  307. *
  308. * Update the module autoidle bit in @v to be @autoidle for the @oh
  309. * hwmod. The autoidle bit controls whether the module can gate
  310. * internal clocks automatically when it isn't doing anything; the
  311. * exact function of this bit varies on a per-module basis. This
  312. * function does not write to the hardware. Returns -EINVAL upon
  313. * error or 0 upon success.
  314. */
  315. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  316. u32 *v)
  317. {
  318. u32 autoidle_mask;
  319. u8 autoidle_shift;
  320. if (!oh->class->sysc ||
  321. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  322. return -EINVAL;
  323. if (!oh->class->sysc->sysc_fields) {
  324. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  325. return -EINVAL;
  326. }
  327. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  328. autoidle_mask = (0x3 << autoidle_shift);
  329. *v &= ~autoidle_mask;
  330. *v |= autoidle << autoidle_shift;
  331. return 0;
  332. }
  333. /**
  334. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  335. * @oh: struct omap_hwmod *
  336. *
  337. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  338. * upon error or 0 upon success.
  339. */
  340. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  341. {
  342. u32 wakeup_mask;
  343. if (!oh->class->sysc ||
  344. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  345. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  346. return -EINVAL;
  347. if (!oh->class->sysc->sysc_fields) {
  348. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  349. return -EINVAL;
  350. }
  351. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  352. *v |= wakeup_mask;
  353. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  354. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  355. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  356. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  357. return 0;
  358. }
  359. /**
  360. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  361. * @oh: struct omap_hwmod *
  362. *
  363. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  364. * upon error or 0 upon success.
  365. */
  366. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  367. {
  368. u32 wakeup_mask;
  369. if (!oh->class->sysc ||
  370. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  371. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  372. return -EINVAL;
  373. if (!oh->class->sysc->sysc_fields) {
  374. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  375. return -EINVAL;
  376. }
  377. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  378. *v &= ~wakeup_mask;
  379. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  380. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  381. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  382. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  383. return 0;
  384. }
  385. /**
  386. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  387. * @oh: struct omap_hwmod *
  388. *
  389. * Prevent the hardware module @oh from entering idle while the
  390. * hardare module initiator @init_oh is active. Useful when a module
  391. * will be accessed by a particular initiator (e.g., if a module will
  392. * be accessed by the IVA, there should be a sleepdep between the IVA
  393. * initiator and the module). Only applies to modules in smart-idle
  394. * mode. Returns -EINVAL upon error or passes along
  395. * clkdm_add_sleepdep() value upon success.
  396. */
  397. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  398. {
  399. if (!oh->_clk)
  400. return -EINVAL;
  401. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  402. }
  403. /**
  404. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  405. * @oh: struct omap_hwmod *
  406. *
  407. * Allow the hardware module @oh to enter idle while the hardare
  408. * module initiator @init_oh is active. Useful when a module will not
  409. * be accessed by a particular initiator (e.g., if a module will not
  410. * be accessed by the IVA, there should be no sleepdep between the IVA
  411. * initiator and the module). Only applies to modules in smart-idle
  412. * mode. Returns -EINVAL upon error or passes along
  413. * clkdm_del_sleepdep() value upon success.
  414. */
  415. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  416. {
  417. if (!oh->_clk)
  418. return -EINVAL;
  419. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  420. }
  421. /**
  422. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  423. * @oh: struct omap_hwmod *
  424. *
  425. * Called from _init_clocks(). Populates the @oh _clk (main
  426. * functional clock pointer) if a main_clk is present. Returns 0 on
  427. * success or -EINVAL on error.
  428. */
  429. static int _init_main_clk(struct omap_hwmod *oh)
  430. {
  431. int ret = 0;
  432. if (!oh->main_clk)
  433. return 0;
  434. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  435. if (!oh->_clk) {
  436. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  437. oh->name, oh->main_clk);
  438. return -EINVAL;
  439. }
  440. if (!oh->_clk->clkdm)
  441. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  442. oh->main_clk, oh->_clk->name);
  443. return ret;
  444. }
  445. /**
  446. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  447. * @oh: struct omap_hwmod *
  448. *
  449. * Called from _init_clocks(). Populates the @oh OCP slave interface
  450. * clock pointers. Returns 0 on success or -EINVAL on error.
  451. */
  452. static int _init_interface_clks(struct omap_hwmod *oh)
  453. {
  454. struct clk *c;
  455. int i;
  456. int ret = 0;
  457. if (oh->slaves_cnt == 0)
  458. return 0;
  459. for (i = 0; i < oh->slaves_cnt; i++) {
  460. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  461. if (!os->clk)
  462. continue;
  463. c = omap_clk_get_by_name(os->clk);
  464. if (!c) {
  465. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  466. oh->name, os->clk);
  467. ret = -EINVAL;
  468. }
  469. os->_clk = c;
  470. }
  471. return ret;
  472. }
  473. /**
  474. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  475. * @oh: struct omap_hwmod *
  476. *
  477. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  478. * clock pointers. Returns 0 on success or -EINVAL on error.
  479. */
  480. static int _init_opt_clks(struct omap_hwmod *oh)
  481. {
  482. struct omap_hwmod_opt_clk *oc;
  483. struct clk *c;
  484. int i;
  485. int ret = 0;
  486. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  487. c = omap_clk_get_by_name(oc->clk);
  488. if (!c) {
  489. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  490. oh->name, oc->clk);
  491. ret = -EINVAL;
  492. }
  493. oc->_clk = c;
  494. }
  495. return ret;
  496. }
  497. /**
  498. * _enable_clocks - enable hwmod main clock and interface clocks
  499. * @oh: struct omap_hwmod *
  500. *
  501. * Enables all clocks necessary for register reads and writes to succeed
  502. * on the hwmod @oh. Returns 0.
  503. */
  504. static int _enable_clocks(struct omap_hwmod *oh)
  505. {
  506. int i;
  507. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  508. if (oh->_clk)
  509. clk_enable(oh->_clk);
  510. if (oh->slaves_cnt > 0) {
  511. for (i = 0; i < oh->slaves_cnt; i++) {
  512. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  513. struct clk *c = os->_clk;
  514. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  515. clk_enable(c);
  516. }
  517. }
  518. /* The opt clocks are controlled by the device driver. */
  519. return 0;
  520. }
  521. /**
  522. * _disable_clocks - disable hwmod main clock and interface clocks
  523. * @oh: struct omap_hwmod *
  524. *
  525. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  526. */
  527. static int _disable_clocks(struct omap_hwmod *oh)
  528. {
  529. int i;
  530. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  531. if (oh->_clk)
  532. clk_disable(oh->_clk);
  533. if (oh->slaves_cnt > 0) {
  534. for (i = 0; i < oh->slaves_cnt; i++) {
  535. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  536. struct clk *c = os->_clk;
  537. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  538. clk_disable(c);
  539. }
  540. }
  541. /* The opt clocks are controlled by the device driver. */
  542. return 0;
  543. }
  544. static void _enable_optional_clocks(struct omap_hwmod *oh)
  545. {
  546. struct omap_hwmod_opt_clk *oc;
  547. int i;
  548. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  549. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  550. if (oc->_clk) {
  551. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  552. oc->_clk->name);
  553. clk_enable(oc->_clk);
  554. }
  555. }
  556. static void _disable_optional_clocks(struct omap_hwmod *oh)
  557. {
  558. struct omap_hwmod_opt_clk *oc;
  559. int i;
  560. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  561. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  562. if (oc->_clk) {
  563. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  564. oc->_clk->name);
  565. clk_disable(oc->_clk);
  566. }
  567. }
  568. /**
  569. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  570. * @oh: struct omap_hwmod *
  571. *
  572. * Returns the array index of the OCP slave port that the MPU
  573. * addresses the device on, or -EINVAL upon error or not found.
  574. */
  575. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  576. {
  577. int i;
  578. int found = 0;
  579. if (!oh || oh->slaves_cnt == 0)
  580. return -EINVAL;
  581. for (i = 0; i < oh->slaves_cnt; i++) {
  582. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  583. if (os->user & OCP_USER_MPU) {
  584. found = 1;
  585. break;
  586. }
  587. }
  588. if (found)
  589. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  590. oh->name, i);
  591. else
  592. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  593. oh->name);
  594. return (found) ? i : -EINVAL;
  595. }
  596. /**
  597. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  598. * @oh: struct omap_hwmod *
  599. *
  600. * Return the virtual address of the base of the register target of
  601. * device @oh, or NULL on error.
  602. */
  603. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  604. {
  605. struct omap_hwmod_ocp_if *os;
  606. struct omap_hwmod_addr_space *mem;
  607. int i;
  608. int found = 0;
  609. void __iomem *va_start;
  610. if (!oh || oh->slaves_cnt == 0)
  611. return NULL;
  612. os = oh->slaves[index];
  613. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  614. if (mem->flags & ADDR_TYPE_RT) {
  615. found = 1;
  616. break;
  617. }
  618. }
  619. if (found) {
  620. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  621. if (!va_start) {
  622. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  623. return NULL;
  624. }
  625. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  626. oh->name, va_start);
  627. } else {
  628. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  629. oh->name);
  630. }
  631. return (found) ? va_start : NULL;
  632. }
  633. /**
  634. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  635. * @oh: struct omap_hwmod *
  636. *
  637. * If module is marked as SWSUP_SIDLE, force the module out of slave
  638. * idle; otherwise, configure it for smart-idle. If module is marked
  639. * as SWSUP_MSUSPEND, force the module out of master standby;
  640. * otherwise, configure it for smart-standby. No return value.
  641. */
  642. static void _enable_sysc(struct omap_hwmod *oh)
  643. {
  644. u8 idlemode, sf;
  645. u32 v;
  646. if (!oh->class->sysc)
  647. return;
  648. v = oh->_sysc_cache;
  649. sf = oh->class->sysc->sysc_flags;
  650. if (sf & SYSC_HAS_SIDLEMODE) {
  651. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  652. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  653. _set_slave_idlemode(oh, idlemode, &v);
  654. }
  655. if (sf & SYSC_HAS_MIDLEMODE) {
  656. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  657. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  658. _set_master_standbymode(oh, idlemode, &v);
  659. }
  660. /*
  661. * XXX The clock framework should handle this, by
  662. * calling into this code. But this must wait until the
  663. * clock structures are tagged with omap_hwmod entries
  664. */
  665. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  666. (sf & SYSC_HAS_CLOCKACTIVITY))
  667. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  668. /* If slave is in SMARTIDLE, also enable wakeup */
  669. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  670. _enable_wakeup(oh, &v);
  671. _write_sysconfig(v, oh);
  672. /*
  673. * Set the autoidle bit only after setting the smartidle bit
  674. * Setting this will not have any impact on the other modules.
  675. */
  676. if (sf & SYSC_HAS_AUTOIDLE) {
  677. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  678. 0 : 1;
  679. _set_module_autoidle(oh, idlemode, &v);
  680. _write_sysconfig(v, oh);
  681. }
  682. }
  683. /**
  684. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  685. * @oh: struct omap_hwmod *
  686. *
  687. * If module is marked as SWSUP_SIDLE, force the module into slave
  688. * idle; otherwise, configure it for smart-idle. If module is marked
  689. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  690. * configure it for smart-standby. No return value.
  691. */
  692. static void _idle_sysc(struct omap_hwmod *oh)
  693. {
  694. u8 idlemode, sf;
  695. u32 v;
  696. if (!oh->class->sysc)
  697. return;
  698. v = oh->_sysc_cache;
  699. sf = oh->class->sysc->sysc_flags;
  700. if (sf & SYSC_HAS_SIDLEMODE) {
  701. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  702. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  703. _set_slave_idlemode(oh, idlemode, &v);
  704. }
  705. if (sf & SYSC_HAS_MIDLEMODE) {
  706. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  707. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  708. _set_master_standbymode(oh, idlemode, &v);
  709. }
  710. /* If slave is in SMARTIDLE, also enable wakeup */
  711. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  712. _enable_wakeup(oh, &v);
  713. _write_sysconfig(v, oh);
  714. }
  715. /**
  716. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  717. * @oh: struct omap_hwmod *
  718. *
  719. * Force the module into slave idle and master suspend. No return
  720. * value.
  721. */
  722. static void _shutdown_sysc(struct omap_hwmod *oh)
  723. {
  724. u32 v;
  725. u8 sf;
  726. if (!oh->class->sysc)
  727. return;
  728. v = oh->_sysc_cache;
  729. sf = oh->class->sysc->sysc_flags;
  730. if (sf & SYSC_HAS_SIDLEMODE)
  731. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  732. if (sf & SYSC_HAS_MIDLEMODE)
  733. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  734. if (sf & SYSC_HAS_AUTOIDLE)
  735. _set_module_autoidle(oh, 1, &v);
  736. _write_sysconfig(v, oh);
  737. }
  738. /**
  739. * _lookup - find an omap_hwmod by name
  740. * @name: find an omap_hwmod by name
  741. *
  742. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  743. */
  744. static struct omap_hwmod *_lookup(const char *name)
  745. {
  746. struct omap_hwmod *oh, *temp_oh;
  747. oh = NULL;
  748. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  749. if (!strcmp(name, temp_oh->name)) {
  750. oh = temp_oh;
  751. break;
  752. }
  753. }
  754. return oh;
  755. }
  756. /**
  757. * _init_clocks - clk_get() all clocks associated with this hwmod
  758. * @oh: struct omap_hwmod *
  759. * @data: not used; pass NULL
  760. *
  761. * Called by omap_hwmod_late_init() (after omap2_clk_init()).
  762. * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
  763. * the omap_hwmod has not yet been registered or if the clocks have
  764. * already been initialized, 0 on success, or a non-zero error on
  765. * failure.
  766. */
  767. static int _init_clocks(struct omap_hwmod *oh, void *data)
  768. {
  769. int ret = 0;
  770. if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
  771. return -EINVAL;
  772. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  773. ret |= _init_main_clk(oh);
  774. ret |= _init_interface_clks(oh);
  775. ret |= _init_opt_clks(oh);
  776. if (!ret)
  777. oh->_state = _HWMOD_STATE_CLKS_INITED;
  778. return 0;
  779. }
  780. /**
  781. * _wait_target_ready - wait for a module to leave slave idle
  782. * @oh: struct omap_hwmod *
  783. *
  784. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  785. * does not have an IDLEST bit or if the module successfully leaves
  786. * slave idle; otherwise, pass along the return value of the
  787. * appropriate *_cm_wait_module_ready() function.
  788. */
  789. static int _wait_target_ready(struct omap_hwmod *oh)
  790. {
  791. struct omap_hwmod_ocp_if *os;
  792. int ret;
  793. if (!oh)
  794. return -EINVAL;
  795. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  796. return 0;
  797. os = oh->slaves[oh->_mpu_port_index];
  798. if (oh->flags & HWMOD_NO_IDLEST)
  799. return 0;
  800. /* XXX check module SIDLEMODE */
  801. /* XXX check clock enable states */
  802. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  803. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  804. oh->prcm.omap2.idlest_reg_id,
  805. oh->prcm.omap2.idlest_idle_bit);
  806. } else if (cpu_is_omap44xx()) {
  807. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  808. } else {
  809. BUG();
  810. };
  811. return ret;
  812. }
  813. /**
  814. * _lookup_hardreset - return the register bit shift for this hwmod/reset line
  815. * @oh: struct omap_hwmod *
  816. * @name: name of the reset line in the context of this hwmod
  817. *
  818. * Return the bit position of the reset line that match the
  819. * input name. Return -ENOENT if not found.
  820. */
  821. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
  822. {
  823. int i;
  824. for (i = 0; i < oh->rst_lines_cnt; i++) {
  825. const char *rst_line = oh->rst_lines[i].name;
  826. if (!strcmp(rst_line, name)) {
  827. u8 shift = oh->rst_lines[i].rst_shift;
  828. pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
  829. oh->name, rst_line, shift);
  830. return shift;
  831. }
  832. }
  833. return -ENOENT;
  834. }
  835. /**
  836. * _assert_hardreset - assert the HW reset line of submodules
  837. * contained in the hwmod module.
  838. * @oh: struct omap_hwmod *
  839. * @name: name of the reset line to lookup and assert
  840. *
  841. * Some IP like dsp, ipu or iva contain processor that require
  842. * an HW reset line to be assert / deassert in order to enable fully
  843. * the IP.
  844. */
  845. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  846. {
  847. u8 shift;
  848. if (!oh)
  849. return -EINVAL;
  850. shift = _lookup_hardreset(oh, name);
  851. if (IS_ERR_VALUE(shift))
  852. return shift;
  853. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  854. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  855. shift);
  856. else if (cpu_is_omap44xx())
  857. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  858. shift);
  859. else
  860. return -EINVAL;
  861. }
  862. /**
  863. * _deassert_hardreset - deassert the HW reset line of submodules contained
  864. * in the hwmod module.
  865. * @oh: struct omap_hwmod *
  866. * @name: name of the reset line to look up and deassert
  867. *
  868. * Some IP like dsp, ipu or iva contain processor that require
  869. * an HW reset line to be assert / deassert in order to enable fully
  870. * the IP.
  871. */
  872. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  873. {
  874. u8 shift;
  875. int r;
  876. if (!oh)
  877. return -EINVAL;
  878. shift = _lookup_hardreset(oh, name);
  879. if (IS_ERR_VALUE(shift))
  880. return shift;
  881. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  882. r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  883. shift);
  884. else if (cpu_is_omap44xx())
  885. r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  886. shift);
  887. else
  888. return -EINVAL;
  889. if (r == -EBUSY)
  890. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  891. return r;
  892. }
  893. /**
  894. * _read_hardreset - read the HW reset line state of submodules
  895. * contained in the hwmod module
  896. * @oh: struct omap_hwmod *
  897. * @name: name of the reset line to look up and read
  898. *
  899. * Return the state of the reset line.
  900. */
  901. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  902. {
  903. u8 shift;
  904. if (!oh)
  905. return -EINVAL;
  906. shift = _lookup_hardreset(oh, name);
  907. if (IS_ERR_VALUE(shift))
  908. return shift;
  909. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  910. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  911. shift);
  912. } else if (cpu_is_omap44xx()) {
  913. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  914. shift);
  915. } else {
  916. return -EINVAL;
  917. }
  918. }
  919. /**
  920. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  921. * @oh: struct omap_hwmod *
  922. *
  923. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  924. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  925. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  926. * the module did not reset in time, or 0 upon success.
  927. *
  928. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  929. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  930. * use the SYSCONFIG softreset bit to provide the status.
  931. *
  932. * Note that some IP like McBSP do have reset control but don't have
  933. * reset status.
  934. */
  935. static int _ocp_softreset(struct omap_hwmod *oh)
  936. {
  937. u32 v;
  938. int c = 0;
  939. int ret = 0;
  940. if (!oh->class->sysc ||
  941. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  942. return -EINVAL;
  943. /* clocks must be on for this operation */
  944. if (oh->_state != _HWMOD_STATE_ENABLED) {
  945. pr_warning("omap_hwmod: %s: reset can only be entered from "
  946. "enabled state\n", oh->name);
  947. return -EINVAL;
  948. }
  949. /* For some modules, all optionnal clocks need to be enabled as well */
  950. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  951. _enable_optional_clocks(oh);
  952. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  953. v = oh->_sysc_cache;
  954. ret = _set_softreset(oh, &v);
  955. if (ret)
  956. goto dis_opt_clks;
  957. _write_sysconfig(v, oh);
  958. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  959. omap_test_timeout((omap_hwmod_read(oh,
  960. oh->class->sysc->syss_offs)
  961. & SYSS_RESETDONE_MASK),
  962. MAX_MODULE_SOFTRESET_WAIT, c);
  963. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  964. omap_test_timeout(!(omap_hwmod_read(oh,
  965. oh->class->sysc->sysc_offs)
  966. & SYSC_TYPE2_SOFTRESET_MASK),
  967. MAX_MODULE_SOFTRESET_WAIT, c);
  968. if (c == MAX_MODULE_SOFTRESET_WAIT)
  969. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  970. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  971. else
  972. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  973. /*
  974. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  975. * _wait_target_ready() or _reset()
  976. */
  977. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  978. dis_opt_clks:
  979. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  980. _disable_optional_clocks(oh);
  981. return ret;
  982. }
  983. /**
  984. * _reset - reset an omap_hwmod
  985. * @oh: struct omap_hwmod *
  986. *
  987. * Resets an omap_hwmod @oh. The default software reset mechanism for
  988. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  989. * bit. However, some hwmods cannot be reset via this method: some
  990. * are not targets and therefore have no OCP header registers to
  991. * access; others (like the IVA) have idiosyncratic reset sequences.
  992. * So for these relatively rare cases, custom reset code can be
  993. * supplied in the struct omap_hwmod_class .reset function pointer.
  994. * Passes along the return value from either _reset() or the custom
  995. * reset function - these must return -EINVAL if the hwmod cannot be
  996. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  997. * the module did not reset in time, or 0 upon success.
  998. */
  999. static int _reset(struct omap_hwmod *oh)
  1000. {
  1001. int ret;
  1002. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1003. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1004. return ret;
  1005. }
  1006. /**
  1007. * _enable - enable an omap_hwmod
  1008. * @oh: struct omap_hwmod *
  1009. *
  1010. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1011. * register target. Returns -EINVAL if the hwmod is in the wrong
  1012. * state or passes along the return value of _wait_target_ready().
  1013. */
  1014. static int _enable(struct omap_hwmod *oh)
  1015. {
  1016. int r;
  1017. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1018. oh->_state != _HWMOD_STATE_IDLE &&
  1019. oh->_state != _HWMOD_STATE_DISABLED) {
  1020. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1021. "from initialized, idle, or disabled state\n", oh->name);
  1022. return -EINVAL;
  1023. }
  1024. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1025. /*
  1026. * If an IP contains only one HW reset line, then de-assert it in order
  1027. * to allow to enable the clocks. Otherwise the PRCM will return
  1028. * Intransition status, and the init will failed.
  1029. */
  1030. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1031. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1032. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1033. /* Mux pins for device runtime if populated */
  1034. if (oh->mux)
  1035. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1036. _add_initiator_dep(oh, mpu_oh);
  1037. _enable_clocks(oh);
  1038. r = _wait_target_ready(oh);
  1039. if (!r) {
  1040. oh->_state = _HWMOD_STATE_ENABLED;
  1041. /* Access the sysconfig only if the target is ready */
  1042. if (oh->class->sysc) {
  1043. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1044. _update_sysc_cache(oh);
  1045. _enable_sysc(oh);
  1046. }
  1047. } else {
  1048. _disable_clocks(oh);
  1049. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1050. oh->name, r);
  1051. }
  1052. return r;
  1053. }
  1054. /**
  1055. * _idle - idle an omap_hwmod
  1056. * @oh: struct omap_hwmod *
  1057. *
  1058. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1059. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1060. * state or returns 0.
  1061. */
  1062. static int _idle(struct omap_hwmod *oh)
  1063. {
  1064. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1065. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1066. "enabled state\n", oh->name);
  1067. return -EINVAL;
  1068. }
  1069. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1070. if (oh->class->sysc)
  1071. _idle_sysc(oh);
  1072. _del_initiator_dep(oh, mpu_oh);
  1073. _disable_clocks(oh);
  1074. /* Mux pins for device idle if populated */
  1075. if (oh->mux)
  1076. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1077. oh->_state = _HWMOD_STATE_IDLE;
  1078. return 0;
  1079. }
  1080. /**
  1081. * _shutdown - shutdown an omap_hwmod
  1082. * @oh: struct omap_hwmod *
  1083. *
  1084. * Shut down an omap_hwmod @oh. This should be called when the driver
  1085. * used for the hwmod is removed or unloaded or if the driver is not
  1086. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1087. * state or returns 0.
  1088. */
  1089. static int _shutdown(struct omap_hwmod *oh)
  1090. {
  1091. int ret;
  1092. u8 prev_state;
  1093. if (oh->_state != _HWMOD_STATE_IDLE &&
  1094. oh->_state != _HWMOD_STATE_ENABLED) {
  1095. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1096. "from idle, or enabled state\n", oh->name);
  1097. return -EINVAL;
  1098. }
  1099. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1100. if (oh->class->pre_shutdown) {
  1101. prev_state = oh->_state;
  1102. if (oh->_state == _HWMOD_STATE_IDLE)
  1103. _enable(oh);
  1104. ret = oh->class->pre_shutdown(oh);
  1105. if (ret) {
  1106. if (prev_state == _HWMOD_STATE_IDLE)
  1107. _idle(oh);
  1108. return ret;
  1109. }
  1110. }
  1111. if (oh->class->sysc)
  1112. _shutdown_sysc(oh);
  1113. /*
  1114. * If an IP contains only one HW reset line, then assert it
  1115. * before disabling the clocks and shutting down the IP.
  1116. */
  1117. if (oh->rst_lines_cnt == 1)
  1118. _assert_hardreset(oh, oh->rst_lines[0].name);
  1119. /* clocks and deps are already disabled in idle */
  1120. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1121. _del_initiator_dep(oh, mpu_oh);
  1122. /* XXX what about the other system initiators here? dma, dsp */
  1123. _disable_clocks(oh);
  1124. }
  1125. /* XXX Should this code also force-disable the optional clocks? */
  1126. /* Mux pins to safe mode or use populated off mode values */
  1127. if (oh->mux)
  1128. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1129. oh->_state = _HWMOD_STATE_DISABLED;
  1130. return 0;
  1131. }
  1132. /**
  1133. * _setup - do initial configuration of omap_hwmod
  1134. * @oh: struct omap_hwmod *
  1135. *
  1136. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1137. * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
  1138. * wrong state or returns 0.
  1139. */
  1140. static int _setup(struct omap_hwmod *oh, void *data)
  1141. {
  1142. int i, r;
  1143. u8 postsetup_state;
  1144. /* Set iclk autoidle mode */
  1145. if (oh->slaves_cnt > 0) {
  1146. for (i = 0; i < oh->slaves_cnt; i++) {
  1147. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1148. struct clk *c = os->_clk;
  1149. if (!c)
  1150. continue;
  1151. if (os->flags & OCPIF_SWSUP_IDLE) {
  1152. /* XXX omap_iclk_deny_idle(c); */
  1153. } else {
  1154. /* XXX omap_iclk_allow_idle(c); */
  1155. clk_enable(c);
  1156. }
  1157. }
  1158. }
  1159. oh->_state = _HWMOD_STATE_INITIALIZED;
  1160. /*
  1161. * In the case of hwmod with hardreset that should not be
  1162. * de-assert at boot time, we have to keep the module
  1163. * initialized, because we cannot enable it properly with the
  1164. * reset asserted. Exit without warning because that behavior is
  1165. * expected.
  1166. */
  1167. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1168. return 0;
  1169. r = _enable(oh);
  1170. if (r) {
  1171. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1172. oh->name, oh->_state);
  1173. return 0;
  1174. }
  1175. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1176. _reset(oh);
  1177. /*
  1178. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1179. * The _enable() function should be split to
  1180. * avoid the rewrite of the OCP_SYSCONFIG register.
  1181. */
  1182. if (oh->class->sysc) {
  1183. _update_sysc_cache(oh);
  1184. _enable_sysc(oh);
  1185. }
  1186. }
  1187. postsetup_state = oh->_postsetup_state;
  1188. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1189. postsetup_state = _HWMOD_STATE_ENABLED;
  1190. /*
  1191. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1192. * it should be set by the core code as a runtime flag during startup
  1193. */
  1194. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1195. (postsetup_state == _HWMOD_STATE_IDLE))
  1196. postsetup_state = _HWMOD_STATE_ENABLED;
  1197. if (postsetup_state == _HWMOD_STATE_IDLE)
  1198. _idle(oh);
  1199. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1200. _shutdown(oh);
  1201. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1202. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1203. oh->name, postsetup_state);
  1204. return 0;
  1205. }
  1206. /**
  1207. * _register - register a struct omap_hwmod
  1208. * @oh: struct omap_hwmod *
  1209. *
  1210. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1211. * already has been registered by the same name; -EINVAL if the
  1212. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1213. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1214. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1215. * success.
  1216. *
  1217. * XXX The data should be copied into bootmem, so the original data
  1218. * should be marked __initdata and freed after init. This would allow
  1219. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1220. * that the copy process would be relatively complex due to the large number
  1221. * of substructures.
  1222. */
  1223. static int __init _register(struct omap_hwmod *oh)
  1224. {
  1225. int ret, ms_id;
  1226. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1227. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1228. return -EINVAL;
  1229. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1230. if (_lookup(oh->name))
  1231. return -EEXIST;
  1232. ms_id = _find_mpu_port_index(oh);
  1233. if (!IS_ERR_VALUE(ms_id))
  1234. oh->_mpu_port_index = ms_id;
  1235. else
  1236. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1237. list_add_tail(&oh->node, &omap_hwmod_list);
  1238. spin_lock_init(&oh->_lock);
  1239. oh->_state = _HWMOD_STATE_REGISTERED;
  1240. ret = 0;
  1241. return ret;
  1242. }
  1243. /* Public functions */
  1244. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1245. {
  1246. if (oh->flags & HWMOD_16BIT_REG)
  1247. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1248. else
  1249. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1250. }
  1251. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1252. {
  1253. if (oh->flags & HWMOD_16BIT_REG)
  1254. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1255. else
  1256. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1257. }
  1258. /**
  1259. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1260. * @oh: struct omap_hwmod *
  1261. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1262. *
  1263. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1264. * local copy. Intended to be used by drivers that have some erratum
  1265. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1266. * -EINVAL if @oh is null, or passes along the return value from
  1267. * _set_slave_idlemode().
  1268. *
  1269. * XXX Does this function have any current users? If not, we should
  1270. * remove it; it is better to let the rest of the hwmod code handle this.
  1271. * Any users of this function should be scrutinized carefully.
  1272. */
  1273. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1274. {
  1275. u32 v;
  1276. int retval = 0;
  1277. if (!oh)
  1278. return -EINVAL;
  1279. v = oh->_sysc_cache;
  1280. retval = _set_slave_idlemode(oh, idlemode, &v);
  1281. if (!retval)
  1282. _write_sysconfig(v, oh);
  1283. return retval;
  1284. }
  1285. /**
  1286. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1287. * @name: name of the omap_hwmod to look up
  1288. *
  1289. * Given a @name of an omap_hwmod, return a pointer to the registered
  1290. * struct omap_hwmod *, or NULL upon error.
  1291. */
  1292. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1293. {
  1294. struct omap_hwmod *oh;
  1295. if (!name)
  1296. return NULL;
  1297. oh = _lookup(name);
  1298. return oh;
  1299. }
  1300. /**
  1301. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1302. * @fn: pointer to a callback function
  1303. * @data: void * data to pass to callback function
  1304. *
  1305. * Call @fn for each registered omap_hwmod, passing @data to each
  1306. * function. @fn must return 0 for success or any other value for
  1307. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1308. * will stop and the non-zero return value will be passed to the
  1309. * caller of omap_hwmod_for_each(). @fn is called with
  1310. * omap_hwmod_for_each() held.
  1311. */
  1312. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1313. void *data)
  1314. {
  1315. struct omap_hwmod *temp_oh;
  1316. int ret;
  1317. if (!fn)
  1318. return -EINVAL;
  1319. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1320. ret = (*fn)(temp_oh, data);
  1321. if (ret)
  1322. break;
  1323. }
  1324. return ret;
  1325. }
  1326. /**
  1327. * omap_hwmod_init - init omap_hwmod code and register hwmods
  1328. * @ohs: pointer to an array of omap_hwmods to register
  1329. *
  1330. * Intended to be called early in boot before the clock framework is
  1331. * initialized. If @ohs is not null, will register all omap_hwmods
  1332. * listed in @ohs that are valid for this chip. Returns -EINVAL if
  1333. * omap_hwmod_init() has already been called or 0 otherwise.
  1334. */
  1335. int __init omap_hwmod_init(struct omap_hwmod **ohs)
  1336. {
  1337. int r, i;
  1338. if (!ohs)
  1339. return 0;
  1340. i = 0;
  1341. do {
  1342. if (!omap_chip_is(ohs[i]->omap_chip))
  1343. continue;
  1344. r = _register(ohs[i]);
  1345. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1346. r);
  1347. } while (ohs[++i]);
  1348. return 0;
  1349. }
  1350. /*
  1351. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1352. *
  1353. * Must be called only from omap_hwmod_late_init so ioremap works properly.
  1354. * Assumes the caller takes care of locking if needed.
  1355. *
  1356. */
  1357. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1358. {
  1359. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1360. return 0;
  1361. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1362. if (!oh->_mpu_rt_va)
  1363. pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
  1364. __func__, oh->name);
  1365. return 0;
  1366. }
  1367. /**
  1368. * omap_hwmod_late_init - do some post-clock framework initialization
  1369. *
  1370. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1371. * to struct clk pointers for each registered omap_hwmod. Also calls
  1372. * _setup() on each hwmod. Returns 0.
  1373. */
  1374. static int __init omap_hwmod_late_init(void)
  1375. {
  1376. int r;
  1377. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1378. /* XXX check return value */
  1379. r = omap_hwmod_for_each(_init_clocks, NULL);
  1380. WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
  1381. mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
  1382. WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
  1383. MPU_INITIATOR_NAME);
  1384. omap_hwmod_for_each(_setup, NULL);
  1385. return 0;
  1386. }
  1387. core_initcall(omap_hwmod_late_init);
  1388. /**
  1389. * omap_hwmod_enable - enable an omap_hwmod
  1390. * @oh: struct omap_hwmod *
  1391. *
  1392. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1393. * Returns -EINVAL on error or passes along the return value from _enable().
  1394. */
  1395. int omap_hwmod_enable(struct omap_hwmod *oh)
  1396. {
  1397. int r;
  1398. unsigned long flags;
  1399. if (!oh)
  1400. return -EINVAL;
  1401. spin_lock_irqsave(&oh->_lock, flags);
  1402. r = _enable(oh);
  1403. spin_unlock_irqrestore(&oh->_lock, flags);
  1404. return r;
  1405. }
  1406. /**
  1407. * omap_hwmod_idle - idle an omap_hwmod
  1408. * @oh: struct omap_hwmod *
  1409. *
  1410. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1411. * Returns -EINVAL on error or passes along the return value from _idle().
  1412. */
  1413. int omap_hwmod_idle(struct omap_hwmod *oh)
  1414. {
  1415. unsigned long flags;
  1416. if (!oh)
  1417. return -EINVAL;
  1418. spin_lock_irqsave(&oh->_lock, flags);
  1419. _idle(oh);
  1420. spin_unlock_irqrestore(&oh->_lock, flags);
  1421. return 0;
  1422. }
  1423. /**
  1424. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1425. * @oh: struct omap_hwmod *
  1426. *
  1427. * Shutdown an omap_hwmod @oh. Intended to be called by
  1428. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1429. * the return value from _shutdown().
  1430. */
  1431. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1432. {
  1433. unsigned long flags;
  1434. if (!oh)
  1435. return -EINVAL;
  1436. spin_lock_irqsave(&oh->_lock, flags);
  1437. _shutdown(oh);
  1438. spin_unlock_irqrestore(&oh->_lock, flags);
  1439. return 0;
  1440. }
  1441. /**
  1442. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1443. * @oh: struct omap_hwmod *oh
  1444. *
  1445. * Intended to be called by the omap_device code.
  1446. */
  1447. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1448. {
  1449. unsigned long flags;
  1450. spin_lock_irqsave(&oh->_lock, flags);
  1451. _enable_clocks(oh);
  1452. spin_unlock_irqrestore(&oh->_lock, flags);
  1453. return 0;
  1454. }
  1455. /**
  1456. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1457. * @oh: struct omap_hwmod *oh
  1458. *
  1459. * Intended to be called by the omap_device code.
  1460. */
  1461. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1462. {
  1463. unsigned long flags;
  1464. spin_lock_irqsave(&oh->_lock, flags);
  1465. _disable_clocks(oh);
  1466. spin_unlock_irqrestore(&oh->_lock, flags);
  1467. return 0;
  1468. }
  1469. /**
  1470. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1471. * @oh: struct omap_hwmod *oh
  1472. *
  1473. * Intended to be called by drivers and core code when all posted
  1474. * writes to a device must complete before continuing further
  1475. * execution (for example, after clearing some device IRQSTATUS
  1476. * register bits)
  1477. *
  1478. * XXX what about targets with multiple OCP threads?
  1479. */
  1480. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1481. {
  1482. BUG_ON(!oh);
  1483. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1484. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1485. "device configuration\n", oh->name);
  1486. return;
  1487. }
  1488. /*
  1489. * Forces posted writes to complete on the OCP thread handling
  1490. * register writes
  1491. */
  1492. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1493. }
  1494. /**
  1495. * omap_hwmod_reset - reset the hwmod
  1496. * @oh: struct omap_hwmod *
  1497. *
  1498. * Under some conditions, a driver may wish to reset the entire device.
  1499. * Called from omap_device code. Returns -EINVAL on error or passes along
  1500. * the return value from _reset().
  1501. */
  1502. int omap_hwmod_reset(struct omap_hwmod *oh)
  1503. {
  1504. int r;
  1505. unsigned long flags;
  1506. if (!oh)
  1507. return -EINVAL;
  1508. spin_lock_irqsave(&oh->_lock, flags);
  1509. r = _reset(oh);
  1510. spin_unlock_irqrestore(&oh->_lock, flags);
  1511. return r;
  1512. }
  1513. /**
  1514. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1515. * @oh: struct omap_hwmod *
  1516. * @res: pointer to the first element of an array of struct resource to fill
  1517. *
  1518. * Count the number of struct resource array elements necessary to
  1519. * contain omap_hwmod @oh resources. Intended to be called by code
  1520. * that registers omap_devices. Intended to be used to determine the
  1521. * size of a dynamically-allocated struct resource array, before
  1522. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1523. * resource array elements needed.
  1524. *
  1525. * XXX This code is not optimized. It could attempt to merge adjacent
  1526. * resource IDs.
  1527. *
  1528. */
  1529. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1530. {
  1531. int ret, i;
  1532. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1533. for (i = 0; i < oh->slaves_cnt; i++)
  1534. ret += oh->slaves[i]->addr_cnt;
  1535. return ret;
  1536. }
  1537. /**
  1538. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1539. * @oh: struct omap_hwmod *
  1540. * @res: pointer to the first element of an array of struct resource to fill
  1541. *
  1542. * Fill the struct resource array @res with resource data from the
  1543. * omap_hwmod @oh. Intended to be called by code that registers
  1544. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1545. * number of array elements filled.
  1546. */
  1547. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1548. {
  1549. int i, j;
  1550. int r = 0;
  1551. /* For each IRQ, DMA, memory area, fill in array.*/
  1552. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1553. (res + r)->name = (oh->mpu_irqs + i)->name;
  1554. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1555. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1556. (res + r)->flags = IORESOURCE_IRQ;
  1557. r++;
  1558. }
  1559. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1560. (res + r)->name = (oh->sdma_reqs + i)->name;
  1561. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1562. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1563. (res + r)->flags = IORESOURCE_DMA;
  1564. r++;
  1565. }
  1566. for (i = 0; i < oh->slaves_cnt; i++) {
  1567. struct omap_hwmod_ocp_if *os;
  1568. os = oh->slaves[i];
  1569. for (j = 0; j < os->addr_cnt; j++) {
  1570. (res + r)->start = (os->addr + j)->pa_start;
  1571. (res + r)->end = (os->addr + j)->pa_end;
  1572. (res + r)->flags = IORESOURCE_MEM;
  1573. r++;
  1574. }
  1575. }
  1576. return r;
  1577. }
  1578. /**
  1579. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1580. * @oh: struct omap_hwmod *
  1581. *
  1582. * Return the powerdomain pointer associated with the OMAP module
  1583. * @oh's main clock. If @oh does not have a main clk, return the
  1584. * powerdomain associated with the interface clock associated with the
  1585. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1586. * instead?) Returns NULL on error, or a struct powerdomain * on
  1587. * success.
  1588. */
  1589. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1590. {
  1591. struct clk *c;
  1592. if (!oh)
  1593. return NULL;
  1594. if (oh->_clk) {
  1595. c = oh->_clk;
  1596. } else {
  1597. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1598. return NULL;
  1599. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1600. }
  1601. if (!c->clkdm)
  1602. return NULL;
  1603. return c->clkdm->pwrdm.ptr;
  1604. }
  1605. /**
  1606. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1607. * @oh: struct omap_hwmod *
  1608. *
  1609. * Returns the virtual address corresponding to the beginning of the
  1610. * module's register target, in the address range that is intended to
  1611. * be used by the MPU. Returns the virtual address upon success or NULL
  1612. * upon error.
  1613. */
  1614. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1615. {
  1616. if (!oh)
  1617. return NULL;
  1618. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1619. return NULL;
  1620. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1621. return NULL;
  1622. return oh->_mpu_rt_va;
  1623. }
  1624. /**
  1625. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1626. * @oh: struct omap_hwmod *
  1627. * @init_oh: struct omap_hwmod * (initiator)
  1628. *
  1629. * Add a sleep dependency between the initiator @init_oh and @oh.
  1630. * Intended to be called by DSP/Bridge code via platform_data for the
  1631. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1632. * code needs to add/del initiator dependencies dynamically
  1633. * before/after accessing a device. Returns the return value from
  1634. * _add_initiator_dep().
  1635. *
  1636. * XXX Keep a usecount in the clockdomain code
  1637. */
  1638. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1639. struct omap_hwmod *init_oh)
  1640. {
  1641. return _add_initiator_dep(oh, init_oh);
  1642. }
  1643. /*
  1644. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1645. * for context save/restore operations?
  1646. */
  1647. /**
  1648. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1649. * @oh: struct omap_hwmod *
  1650. * @init_oh: struct omap_hwmod * (initiator)
  1651. *
  1652. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1653. * Intended to be called by DSP/Bridge code via platform_data for the
  1654. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1655. * code needs to add/del initiator dependencies dynamically
  1656. * before/after accessing a device. Returns the return value from
  1657. * _del_initiator_dep().
  1658. *
  1659. * XXX Keep a usecount in the clockdomain code
  1660. */
  1661. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1662. struct omap_hwmod *init_oh)
  1663. {
  1664. return _del_initiator_dep(oh, init_oh);
  1665. }
  1666. /**
  1667. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1668. * @oh: struct omap_hwmod *
  1669. *
  1670. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1671. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1672. * registers to cause the PRCM to receive wakeup events from the
  1673. * module. Does not set any wakeup routing registers beyond this
  1674. * point - if the module is to wake up any other module or subsystem,
  1675. * that must be set separately. Called by omap_device code. Returns
  1676. * -EINVAL on error or 0 upon success.
  1677. */
  1678. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1679. {
  1680. unsigned long flags;
  1681. u32 v;
  1682. if (!oh->class->sysc ||
  1683. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1684. return -EINVAL;
  1685. spin_lock_irqsave(&oh->_lock, flags);
  1686. v = oh->_sysc_cache;
  1687. _enable_wakeup(oh, &v);
  1688. _write_sysconfig(v, oh);
  1689. spin_unlock_irqrestore(&oh->_lock, flags);
  1690. return 0;
  1691. }
  1692. /**
  1693. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1694. * @oh: struct omap_hwmod *
  1695. *
  1696. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1697. * from sending wakeups to the PRCM. Eventually this should clear
  1698. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1699. * from the module. Does not set any wakeup routing registers beyond
  1700. * this point - if the module is to wake up any other module or
  1701. * subsystem, that must be set separately. Called by omap_device
  1702. * code. Returns -EINVAL on error or 0 upon success.
  1703. */
  1704. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1705. {
  1706. unsigned long flags;
  1707. u32 v;
  1708. if (!oh->class->sysc ||
  1709. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1710. return -EINVAL;
  1711. spin_lock_irqsave(&oh->_lock, flags);
  1712. v = oh->_sysc_cache;
  1713. _disable_wakeup(oh, &v);
  1714. _write_sysconfig(v, oh);
  1715. spin_unlock_irqrestore(&oh->_lock, flags);
  1716. return 0;
  1717. }
  1718. /**
  1719. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1720. * contained in the hwmod module.
  1721. * @oh: struct omap_hwmod *
  1722. * @name: name of the reset line to lookup and assert
  1723. *
  1724. * Some IP like dsp, ipu or iva contain processor that require
  1725. * an HW reset line to be assert / deassert in order to enable fully
  1726. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1727. * yet supported on this OMAP; otherwise, passes along the return value
  1728. * from _assert_hardreset().
  1729. */
  1730. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1731. {
  1732. int ret;
  1733. unsigned long flags;
  1734. if (!oh)
  1735. return -EINVAL;
  1736. spin_lock_irqsave(&oh->_lock, flags);
  1737. ret = _assert_hardreset(oh, name);
  1738. spin_unlock_irqrestore(&oh->_lock, flags);
  1739. return ret;
  1740. }
  1741. /**
  1742. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1743. * contained in the hwmod module.
  1744. * @oh: struct omap_hwmod *
  1745. * @name: name of the reset line to look up and deassert
  1746. *
  1747. * Some IP like dsp, ipu or iva contain processor that require
  1748. * an HW reset line to be assert / deassert in order to enable fully
  1749. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1750. * yet supported on this OMAP; otherwise, passes along the return value
  1751. * from _deassert_hardreset().
  1752. */
  1753. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1754. {
  1755. int ret;
  1756. unsigned long flags;
  1757. if (!oh)
  1758. return -EINVAL;
  1759. spin_lock_irqsave(&oh->_lock, flags);
  1760. ret = _deassert_hardreset(oh, name);
  1761. spin_unlock_irqrestore(&oh->_lock, flags);
  1762. return ret;
  1763. }
  1764. /**
  1765. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1766. * contained in the hwmod module
  1767. * @oh: struct omap_hwmod *
  1768. * @name: name of the reset line to look up and read
  1769. *
  1770. * Return the current state of the hwmod @oh's reset line named @name:
  1771. * returns -EINVAL upon parameter error or if this operation
  1772. * is unsupported on the current OMAP; otherwise, passes along the return
  1773. * value from _read_hardreset().
  1774. */
  1775. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1776. {
  1777. int ret;
  1778. unsigned long flags;
  1779. if (!oh)
  1780. return -EINVAL;
  1781. spin_lock_irqsave(&oh->_lock, flags);
  1782. ret = _read_hardreset(oh, name);
  1783. spin_unlock_irqrestore(&oh->_lock, flags);
  1784. return ret;
  1785. }
  1786. /**
  1787. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1788. * @classname: struct omap_hwmod_class name to search for
  1789. * @fn: callback function pointer to call for each hwmod in class @classname
  1790. * @user: arbitrary context data to pass to the callback function
  1791. *
  1792. * For each omap_hwmod of class @classname, call @fn.
  1793. * If the callback function returns something other than
  1794. * zero, the iterator is terminated, and the callback function's return
  1795. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1796. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1797. */
  1798. int omap_hwmod_for_each_by_class(const char *classname,
  1799. int (*fn)(struct omap_hwmod *oh,
  1800. void *user),
  1801. void *user)
  1802. {
  1803. struct omap_hwmod *temp_oh;
  1804. int ret = 0;
  1805. if (!classname || !fn)
  1806. return -EINVAL;
  1807. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1808. __func__, classname);
  1809. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1810. if (!strcmp(temp_oh->class->name, classname)) {
  1811. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1812. __func__, temp_oh->name);
  1813. ret = (*fn)(temp_oh, user);
  1814. if (ret)
  1815. break;
  1816. }
  1817. }
  1818. if (ret)
  1819. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1820. __func__, ret);
  1821. return ret;
  1822. }
  1823. /**
  1824. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1825. * @oh: struct omap_hwmod *
  1826. * @state: state that _setup() should leave the hwmod in
  1827. *
  1828. * Sets the hwmod state that @oh will enter at the end of _setup() (called by
  1829. * omap_hwmod_late_init()). Only valid to call between calls to
  1830. * omap_hwmod_init() and omap_hwmod_late_init(). Returns 0 upon success or
  1831. * -EINVAL if there is a problem with the arguments or if the hwmod is
  1832. * in the wrong state.
  1833. */
  1834. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1835. {
  1836. int ret;
  1837. unsigned long flags;
  1838. if (!oh)
  1839. return -EINVAL;
  1840. if (state != _HWMOD_STATE_DISABLED &&
  1841. state != _HWMOD_STATE_ENABLED &&
  1842. state != _HWMOD_STATE_IDLE)
  1843. return -EINVAL;
  1844. spin_lock_irqsave(&oh->_lock, flags);
  1845. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1846. ret = -EINVAL;
  1847. goto ohsps_unlock;
  1848. }
  1849. oh->_postsetup_state = state;
  1850. ret = 0;
  1851. ohsps_unlock:
  1852. spin_unlock_irqrestore(&oh->_lock, flags);
  1853. return ret;
  1854. }
  1855. /**
  1856. * omap_hwmod_get_context_loss_count - get lost context count
  1857. * @oh: struct omap_hwmod *
  1858. *
  1859. * Query the powerdomain of of @oh to get the context loss
  1860. * count for this device.
  1861. *
  1862. * Returns the context loss count of the powerdomain assocated with @oh
  1863. * upon success, or zero if no powerdomain exists for @oh.
  1864. */
  1865. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  1866. {
  1867. struct powerdomain *pwrdm;
  1868. int ret = 0;
  1869. pwrdm = omap_hwmod_get_pwrdm(oh);
  1870. if (pwrdm)
  1871. ret = pwrdm_get_context_loss_count(pwrdm);
  1872. return ret;
  1873. }