rt2x00pci.c 9.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406
  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00pci
  19. Abstract: rt2x00 generic pci device routines.
  20. */
  21. #include <linux/dma-mapping.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <linux/slab.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00pci.h"
  28. /*
  29. * Register access.
  30. */
  31. int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
  32. const unsigned int offset,
  33. const struct rt2x00_field32 field,
  34. u32 *reg)
  35. {
  36. unsigned int i;
  37. if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
  38. return 0;
  39. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  40. rt2x00pci_register_read(rt2x00dev, offset, reg);
  41. if (!rt2x00_get_field32(*reg, field))
  42. return 1;
  43. udelay(REGISTER_BUSY_DELAY);
  44. }
  45. ERROR(rt2x00dev, "Indirect register access failed: "
  46. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  47. *reg = ~0;
  48. return 0;
  49. }
  50. EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
  51. /*
  52. * TX data handlers.
  53. */
  54. int rt2x00pci_write_tx_data(struct queue_entry *entry,
  55. struct txentry_desc *txdesc)
  56. {
  57. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  58. /*
  59. * This should not happen, we already checked the entry
  60. * was ours. When the hardware disagrees there has been
  61. * a queue corruption!
  62. */
  63. if (unlikely(rt2x00dev->ops->lib->get_entry_state(entry))) {
  64. ERROR(rt2x00dev,
  65. "Corrupt queue %d, accessing entry which is not ours.\n"
  66. "Please file bug report to %s.\n",
  67. entry->queue->qid, DRV_PROJECT);
  68. return -EINVAL;
  69. }
  70. /*
  71. * Call the driver's write_tx_datadesc function, if it exists.
  72. */
  73. if (rt2x00dev->ops->lib->write_tx_datadesc)
  74. rt2x00dev->ops->lib->write_tx_datadesc(entry, txdesc);
  75. return 0;
  76. }
  77. EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
  78. /*
  79. * TX/RX data handlers.
  80. */
  81. void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
  82. {
  83. struct data_queue *queue = rt2x00dev->rx;
  84. struct queue_entry *entry;
  85. struct queue_entry_priv_pci *entry_priv;
  86. struct skb_frame_desc *skbdesc;
  87. while (1) {
  88. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  89. entry_priv = entry->priv_data;
  90. if (rt2x00dev->ops->lib->get_entry_state(entry))
  91. break;
  92. /*
  93. * Fill in desc fields of the skb descriptor
  94. */
  95. skbdesc = get_skb_frame_desc(entry->skb);
  96. skbdesc->desc = entry_priv->desc;
  97. skbdesc->desc_len = entry->queue->desc_size;
  98. /*
  99. * Send the frame to rt2x00lib for further processing.
  100. */
  101. rt2x00lib_rxdone(rt2x00dev, entry);
  102. }
  103. }
  104. EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
  105. /*
  106. * Device initialization handlers.
  107. */
  108. static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
  109. struct data_queue *queue)
  110. {
  111. struct queue_entry_priv_pci *entry_priv;
  112. void *addr;
  113. dma_addr_t dma;
  114. unsigned int i;
  115. /*
  116. * Allocate DMA memory for descriptor and buffer.
  117. */
  118. addr = dma_alloc_coherent(rt2x00dev->dev,
  119. queue->limit * queue->desc_size,
  120. &dma, GFP_KERNEL | GFP_DMA);
  121. if (!addr)
  122. return -ENOMEM;
  123. memset(addr, 0, queue->limit * queue->desc_size);
  124. /*
  125. * Initialize all queue entries to contain valid addresses.
  126. */
  127. for (i = 0; i < queue->limit; i++) {
  128. entry_priv = queue->entries[i].priv_data;
  129. entry_priv->desc = addr + i * queue->desc_size;
  130. entry_priv->desc_dma = dma + i * queue->desc_size;
  131. }
  132. return 0;
  133. }
  134. static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
  135. struct data_queue *queue)
  136. {
  137. struct queue_entry_priv_pci *entry_priv =
  138. queue->entries[0].priv_data;
  139. if (entry_priv->desc)
  140. dma_free_coherent(rt2x00dev->dev,
  141. queue->limit * queue->desc_size,
  142. entry_priv->desc, entry_priv->desc_dma);
  143. entry_priv->desc = NULL;
  144. }
  145. int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
  146. {
  147. struct data_queue *queue;
  148. int status;
  149. /*
  150. * Allocate DMA
  151. */
  152. queue_for_each(rt2x00dev, queue) {
  153. status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
  154. if (status)
  155. goto exit;
  156. }
  157. /*
  158. * Register interrupt handler.
  159. */
  160. status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
  161. IRQF_SHARED, rt2x00dev->name, rt2x00dev);
  162. if (status) {
  163. ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
  164. rt2x00dev->irq, status);
  165. goto exit;
  166. }
  167. return 0;
  168. exit:
  169. queue_for_each(rt2x00dev, queue)
  170. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  171. return status;
  172. }
  173. EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
  174. void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
  175. {
  176. struct data_queue *queue;
  177. /*
  178. * Free irq line.
  179. */
  180. free_irq(rt2x00dev->irq, rt2x00dev);
  181. /*
  182. * Free DMA
  183. */
  184. queue_for_each(rt2x00dev, queue)
  185. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  186. }
  187. EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
  188. /*
  189. * PCI driver handlers.
  190. */
  191. static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
  192. {
  193. kfree(rt2x00dev->rf);
  194. rt2x00dev->rf = NULL;
  195. kfree(rt2x00dev->eeprom);
  196. rt2x00dev->eeprom = NULL;
  197. if (rt2x00dev->csr.base) {
  198. iounmap(rt2x00dev->csr.base);
  199. rt2x00dev->csr.base = NULL;
  200. }
  201. }
  202. static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
  203. {
  204. struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
  205. rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
  206. if (!rt2x00dev->csr.base)
  207. goto exit;
  208. rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
  209. if (!rt2x00dev->eeprom)
  210. goto exit;
  211. rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
  212. if (!rt2x00dev->rf)
  213. goto exit;
  214. return 0;
  215. exit:
  216. ERROR_PROBE("Failed to allocate registers.\n");
  217. rt2x00pci_free_reg(rt2x00dev);
  218. return -ENOMEM;
  219. }
  220. int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
  221. {
  222. struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
  223. struct ieee80211_hw *hw;
  224. struct rt2x00_dev *rt2x00dev;
  225. int retval;
  226. retval = pci_request_regions(pci_dev, pci_name(pci_dev));
  227. if (retval) {
  228. ERROR_PROBE("PCI request regions failed.\n");
  229. return retval;
  230. }
  231. retval = pci_enable_device(pci_dev);
  232. if (retval) {
  233. ERROR_PROBE("Enable device failed.\n");
  234. goto exit_release_regions;
  235. }
  236. pci_set_master(pci_dev);
  237. if (pci_set_mwi(pci_dev))
  238. ERROR_PROBE("MWI not available.\n");
  239. if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
  240. ERROR_PROBE("PCI DMA not supported.\n");
  241. retval = -EIO;
  242. goto exit_disable_device;
  243. }
  244. hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
  245. if (!hw) {
  246. ERROR_PROBE("Failed to allocate hardware.\n");
  247. retval = -ENOMEM;
  248. goto exit_disable_device;
  249. }
  250. pci_set_drvdata(pci_dev, hw);
  251. rt2x00dev = hw->priv;
  252. rt2x00dev->dev = &pci_dev->dev;
  253. rt2x00dev->ops = ops;
  254. rt2x00dev->hw = hw;
  255. rt2x00dev->irq = pci_dev->irq;
  256. rt2x00dev->name = pci_name(pci_dev);
  257. rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
  258. retval = rt2x00pci_alloc_reg(rt2x00dev);
  259. if (retval)
  260. goto exit_free_device;
  261. retval = rt2x00lib_probe_dev(rt2x00dev);
  262. if (retval)
  263. goto exit_free_reg;
  264. return 0;
  265. exit_free_reg:
  266. rt2x00pci_free_reg(rt2x00dev);
  267. exit_free_device:
  268. ieee80211_free_hw(hw);
  269. exit_disable_device:
  270. if (retval != -EBUSY)
  271. pci_disable_device(pci_dev);
  272. exit_release_regions:
  273. pci_release_regions(pci_dev);
  274. pci_set_drvdata(pci_dev, NULL);
  275. return retval;
  276. }
  277. EXPORT_SYMBOL_GPL(rt2x00pci_probe);
  278. void rt2x00pci_remove(struct pci_dev *pci_dev)
  279. {
  280. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  281. struct rt2x00_dev *rt2x00dev = hw->priv;
  282. /*
  283. * Free all allocated data.
  284. */
  285. rt2x00lib_remove_dev(rt2x00dev);
  286. rt2x00pci_free_reg(rt2x00dev);
  287. ieee80211_free_hw(hw);
  288. /*
  289. * Free the PCI device data.
  290. */
  291. pci_set_drvdata(pci_dev, NULL);
  292. pci_disable_device(pci_dev);
  293. pci_release_regions(pci_dev);
  294. }
  295. EXPORT_SYMBOL_GPL(rt2x00pci_remove);
  296. #ifdef CONFIG_PM
  297. int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
  298. {
  299. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  300. struct rt2x00_dev *rt2x00dev = hw->priv;
  301. int retval;
  302. retval = rt2x00lib_suspend(rt2x00dev, state);
  303. if (retval)
  304. return retval;
  305. pci_save_state(pci_dev);
  306. pci_disable_device(pci_dev);
  307. return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
  308. }
  309. EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
  310. int rt2x00pci_resume(struct pci_dev *pci_dev)
  311. {
  312. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  313. struct rt2x00_dev *rt2x00dev = hw->priv;
  314. if (pci_set_power_state(pci_dev, PCI_D0) ||
  315. pci_enable_device(pci_dev) ||
  316. pci_restore_state(pci_dev)) {
  317. ERROR(rt2x00dev, "Failed to resume device.\n");
  318. return -EIO;
  319. }
  320. return rt2x00lib_resume(rt2x00dev);
  321. }
  322. EXPORT_SYMBOL_GPL(rt2x00pci_resume);
  323. #endif /* CONFIG_PM */
  324. /*
  325. * rt2x00pci module information.
  326. */
  327. MODULE_AUTHOR(DRV_PROJECT);
  328. MODULE_VERSION(DRV_VERSION);
  329. MODULE_DESCRIPTION("rt2x00 pci library");
  330. MODULE_LICENSE("GPL");