tegra-kbc.c 19 KB

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  1. /*
  2. * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
  3. * keyboard controller
  4. *
  5. * Copyright (c) 2009-2011, NVIDIA Corporation.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/input.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/delay.h>
  25. #include <linux/io.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/clk.h>
  28. #include <linux/slab.h>
  29. #include <mach/clk.h>
  30. #include <mach/kbc.h>
  31. #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
  32. /* KBC row scan time and delay for beginning the row scan. */
  33. #define KBC_ROW_SCAN_TIME 16
  34. #define KBC_ROW_SCAN_DLY 5
  35. /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
  36. #define KBC_CYCLE_USEC 32
  37. /* KBC Registers */
  38. /* KBC Control Register */
  39. #define KBC_CONTROL_0 0x0
  40. #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
  41. #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
  42. #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
  43. #define KBC_CONTROL_KBC_EN (1 << 0)
  44. /* KBC Interrupt Register */
  45. #define KBC_INT_0 0x4
  46. #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
  47. #define KBC_ROW_CFG0_0 0x8
  48. #define KBC_COL_CFG0_0 0x18
  49. #define KBC_INIT_DLY_0 0x28
  50. #define KBC_RPT_DLY_0 0x2c
  51. #define KBC_KP_ENT0_0 0x30
  52. #define KBC_KP_ENT1_0 0x34
  53. #define KBC_ROW0_MASK_0 0x38
  54. #define KBC_ROW_SHIFT 3
  55. struct tegra_kbc {
  56. void __iomem *mmio;
  57. struct input_dev *idev;
  58. unsigned int irq;
  59. spinlock_t lock;
  60. unsigned int repoll_dly;
  61. unsigned long cp_dly_jiffies;
  62. bool use_fn_map;
  63. bool use_ghost_filter;
  64. const struct tegra_kbc_platform_data *pdata;
  65. unsigned short keycode[KBC_MAX_KEY * 2];
  66. unsigned short current_keys[KBC_MAX_KPENT];
  67. unsigned int num_pressed_keys;
  68. struct timer_list timer;
  69. struct clk *clk;
  70. };
  71. static const u32 tegra_kbc_default_keymap[] = {
  72. KEY(0, 2, KEY_W),
  73. KEY(0, 3, KEY_S),
  74. KEY(0, 4, KEY_A),
  75. KEY(0, 5, KEY_Z),
  76. KEY(0, 7, KEY_FN),
  77. KEY(1, 7, KEY_LEFTMETA),
  78. KEY(2, 6, KEY_RIGHTALT),
  79. KEY(2, 7, KEY_LEFTALT),
  80. KEY(3, 0, KEY_5),
  81. KEY(3, 1, KEY_4),
  82. KEY(3, 2, KEY_R),
  83. KEY(3, 3, KEY_E),
  84. KEY(3, 4, KEY_F),
  85. KEY(3, 5, KEY_D),
  86. KEY(3, 6, KEY_X),
  87. KEY(4, 0, KEY_7),
  88. KEY(4, 1, KEY_6),
  89. KEY(4, 2, KEY_T),
  90. KEY(4, 3, KEY_H),
  91. KEY(4, 4, KEY_G),
  92. KEY(4, 5, KEY_V),
  93. KEY(4, 6, KEY_C),
  94. KEY(4, 7, KEY_SPACE),
  95. KEY(5, 0, KEY_9),
  96. KEY(5, 1, KEY_8),
  97. KEY(5, 2, KEY_U),
  98. KEY(5, 3, KEY_Y),
  99. KEY(5, 4, KEY_J),
  100. KEY(5, 5, KEY_N),
  101. KEY(5, 6, KEY_B),
  102. KEY(5, 7, KEY_BACKSLASH),
  103. KEY(6, 0, KEY_MINUS),
  104. KEY(6, 1, KEY_0),
  105. KEY(6, 2, KEY_O),
  106. KEY(6, 3, KEY_I),
  107. KEY(6, 4, KEY_L),
  108. KEY(6, 5, KEY_K),
  109. KEY(6, 6, KEY_COMMA),
  110. KEY(6, 7, KEY_M),
  111. KEY(7, 1, KEY_EQUAL),
  112. KEY(7, 2, KEY_RIGHTBRACE),
  113. KEY(7, 3, KEY_ENTER),
  114. KEY(7, 7, KEY_MENU),
  115. KEY(8, 4, KEY_RIGHTSHIFT),
  116. KEY(8, 5, KEY_LEFTSHIFT),
  117. KEY(9, 5, KEY_RIGHTCTRL),
  118. KEY(9, 7, KEY_LEFTCTRL),
  119. KEY(11, 0, KEY_LEFTBRACE),
  120. KEY(11, 1, KEY_P),
  121. KEY(11, 2, KEY_APOSTROPHE),
  122. KEY(11, 3, KEY_SEMICOLON),
  123. KEY(11, 4, KEY_SLASH),
  124. KEY(11, 5, KEY_DOT),
  125. KEY(12, 0, KEY_F10),
  126. KEY(12, 1, KEY_F9),
  127. KEY(12, 2, KEY_BACKSPACE),
  128. KEY(12, 3, KEY_3),
  129. KEY(12, 4, KEY_2),
  130. KEY(12, 5, KEY_UP),
  131. KEY(12, 6, KEY_PRINT),
  132. KEY(12, 7, KEY_PAUSE),
  133. KEY(13, 0, KEY_INSERT),
  134. KEY(13, 1, KEY_DELETE),
  135. KEY(13, 3, KEY_PAGEUP),
  136. KEY(13, 4, KEY_PAGEDOWN),
  137. KEY(13, 5, KEY_RIGHT),
  138. KEY(13, 6, KEY_DOWN),
  139. KEY(13, 7, KEY_LEFT),
  140. KEY(14, 0, KEY_F11),
  141. KEY(14, 1, KEY_F12),
  142. KEY(14, 2, KEY_F8),
  143. KEY(14, 3, KEY_Q),
  144. KEY(14, 4, KEY_F4),
  145. KEY(14, 5, KEY_F3),
  146. KEY(14, 6, KEY_1),
  147. KEY(14, 7, KEY_F7),
  148. KEY(15, 0, KEY_ESC),
  149. KEY(15, 1, KEY_GRAVE),
  150. KEY(15, 2, KEY_F5),
  151. KEY(15, 3, KEY_TAB),
  152. KEY(15, 4, KEY_F1),
  153. KEY(15, 5, KEY_F2),
  154. KEY(15, 6, KEY_CAPSLOCK),
  155. KEY(15, 7, KEY_F6),
  156. /* Software Handled Function Keys */
  157. KEY(20, 0, KEY_KP7),
  158. KEY(21, 0, KEY_KP9),
  159. KEY(21, 1, KEY_KP8),
  160. KEY(21, 2, KEY_KP4),
  161. KEY(21, 4, KEY_KP1),
  162. KEY(22, 1, KEY_KPSLASH),
  163. KEY(22, 2, KEY_KP6),
  164. KEY(22, 3, KEY_KP5),
  165. KEY(22, 4, KEY_KP3),
  166. KEY(22, 5, KEY_KP2),
  167. KEY(22, 7, KEY_KP0),
  168. KEY(27, 1, KEY_KPASTERISK),
  169. KEY(27, 3, KEY_KPMINUS),
  170. KEY(27, 4, KEY_KPPLUS),
  171. KEY(27, 5, KEY_KPDOT),
  172. KEY(28, 5, KEY_VOLUMEUP),
  173. KEY(29, 3, KEY_HOME),
  174. KEY(29, 4, KEY_END),
  175. KEY(29, 5, KEY_BRIGHTNESSDOWN),
  176. KEY(29, 6, KEY_VOLUMEDOWN),
  177. KEY(29, 7, KEY_BRIGHTNESSUP),
  178. KEY(30, 0, KEY_NUMLOCK),
  179. KEY(30, 1, KEY_SCROLLLOCK),
  180. KEY(30, 2, KEY_MUTE),
  181. KEY(31, 4, KEY_HELP),
  182. };
  183. static const struct matrix_keymap_data tegra_kbc_default_keymap_data = {
  184. .keymap = tegra_kbc_default_keymap,
  185. .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
  186. };
  187. static void tegra_kbc_report_released_keys(struct input_dev *input,
  188. unsigned short old_keycodes[],
  189. unsigned int old_num_keys,
  190. unsigned short new_keycodes[],
  191. unsigned int new_num_keys)
  192. {
  193. unsigned int i, j;
  194. for (i = 0; i < old_num_keys; i++) {
  195. for (j = 0; j < new_num_keys; j++)
  196. if (old_keycodes[i] == new_keycodes[j])
  197. break;
  198. if (j == new_num_keys)
  199. input_report_key(input, old_keycodes[i], 0);
  200. }
  201. }
  202. static void tegra_kbc_report_pressed_keys(struct input_dev *input,
  203. unsigned char scancodes[],
  204. unsigned short keycodes[],
  205. unsigned int num_pressed_keys)
  206. {
  207. unsigned int i;
  208. for (i = 0; i < num_pressed_keys; i++) {
  209. input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
  210. input_report_key(input, keycodes[i], 1);
  211. }
  212. }
  213. static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
  214. {
  215. unsigned char scancodes[KBC_MAX_KPENT];
  216. unsigned short keycodes[KBC_MAX_KPENT];
  217. u32 val = 0;
  218. unsigned int i;
  219. unsigned int num_down = 0;
  220. unsigned long flags;
  221. bool fn_keypress = false;
  222. bool key_in_same_row = false;
  223. bool key_in_same_col = false;
  224. spin_lock_irqsave(&kbc->lock, flags);
  225. for (i = 0; i < KBC_MAX_KPENT; i++) {
  226. if ((i % 4) == 0)
  227. val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
  228. if (val & 0x80) {
  229. unsigned int col = val & 0x07;
  230. unsigned int row = (val >> 3) & 0x0f;
  231. unsigned char scancode =
  232. MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
  233. scancodes[num_down] = scancode;
  234. keycodes[num_down] = kbc->keycode[scancode];
  235. /* If driver uses Fn map, do not report the Fn key. */
  236. if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
  237. fn_keypress = true;
  238. else
  239. num_down++;
  240. }
  241. val >>= 8;
  242. }
  243. /*
  244. * Matrix keyboard designs are prone to keyboard ghosting.
  245. * Ghosting occurs if there are 3 keys such that -
  246. * any 2 of the 3 keys share a row, and any 2 of them share a column.
  247. * If so ignore the key presses for this iteration.
  248. */
  249. if ((kbc->use_ghost_filter) && (num_down >= 3)) {
  250. for (i = 0; i < num_down; i++) {
  251. unsigned int j;
  252. u8 curr_col = scancodes[i] & 0x07;
  253. u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
  254. /*
  255. * Find 2 keys such that one key is in the same row
  256. * and the other is in the same column as the i-th key.
  257. */
  258. for (j = i + 1; j < num_down; j++) {
  259. u8 col = scancodes[j] & 0x07;
  260. u8 row = scancodes[j] >> KBC_ROW_SHIFT;
  261. if (col == curr_col)
  262. key_in_same_col = true;
  263. if (row == curr_row)
  264. key_in_same_row = true;
  265. }
  266. }
  267. }
  268. /*
  269. * If the platform uses Fn keymaps, translate keys on a Fn keypress.
  270. * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
  271. */
  272. if (fn_keypress) {
  273. for (i = 0; i < num_down; i++) {
  274. scancodes[i] += KBC_MAX_KEY;
  275. keycodes[i] = kbc->keycode[scancodes[i]];
  276. }
  277. }
  278. spin_unlock_irqrestore(&kbc->lock, flags);
  279. /* Ignore the key presses for this iteration? */
  280. if (key_in_same_col && key_in_same_row)
  281. return;
  282. tegra_kbc_report_released_keys(kbc->idev,
  283. kbc->current_keys, kbc->num_pressed_keys,
  284. keycodes, num_down);
  285. tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
  286. input_sync(kbc->idev);
  287. memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
  288. kbc->num_pressed_keys = num_down;
  289. }
  290. static void tegra_kbc_keypress_timer(unsigned long data)
  291. {
  292. struct tegra_kbc *kbc = (struct tegra_kbc *)data;
  293. unsigned long flags;
  294. u32 val;
  295. unsigned int i;
  296. val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
  297. if (val) {
  298. unsigned long dly;
  299. tegra_kbc_report_keys(kbc);
  300. /*
  301. * If more than one keys are pressed we need not wait
  302. * for the repoll delay.
  303. */
  304. dly = (val == 1) ? kbc->repoll_dly : 1;
  305. mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
  306. } else {
  307. /* Release any pressed keys and exit the polling loop */
  308. for (i = 0; i < kbc->num_pressed_keys; i++)
  309. input_report_key(kbc->idev, kbc->current_keys[i], 0);
  310. input_sync(kbc->idev);
  311. kbc->num_pressed_keys = 0;
  312. /* All keys are released so enable the keypress interrupt */
  313. spin_lock_irqsave(&kbc->lock, flags);
  314. val = readl(kbc->mmio + KBC_CONTROL_0);
  315. val |= KBC_CONTROL_FIFO_CNT_INT_EN;
  316. writel(val, kbc->mmio + KBC_CONTROL_0);
  317. spin_unlock_irqrestore(&kbc->lock, flags);
  318. }
  319. }
  320. static irqreturn_t tegra_kbc_isr(int irq, void *args)
  321. {
  322. struct tegra_kbc *kbc = args;
  323. u32 val, ctl;
  324. /*
  325. * Until all keys are released, defer further processing to
  326. * the polling loop in tegra_kbc_keypress_timer
  327. */
  328. ctl = readl(kbc->mmio + KBC_CONTROL_0);
  329. ctl &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
  330. writel(ctl, kbc->mmio + KBC_CONTROL_0);
  331. /*
  332. * Quickly bail out & reenable interrupts if the fifo threshold
  333. * count interrupt wasn't the interrupt source
  334. */
  335. val = readl(kbc->mmio + KBC_INT_0);
  336. writel(val, kbc->mmio + KBC_INT_0);
  337. if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
  338. /*
  339. * Schedule timer to run when hardware is in continuous
  340. * polling mode.
  341. */
  342. mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
  343. } else {
  344. ctl |= KBC_CONTROL_FIFO_CNT_INT_EN;
  345. writel(ctl, kbc->mmio + KBC_CONTROL_0);
  346. }
  347. return IRQ_HANDLED;
  348. }
  349. static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
  350. {
  351. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  352. int i;
  353. unsigned int rst_val;
  354. /* Either mask all keys or none. */
  355. rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
  356. for (i = 0; i < KBC_MAX_ROW; i++)
  357. writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
  358. }
  359. static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
  360. {
  361. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  362. int i;
  363. for (i = 0; i < KBC_MAX_GPIO; i++) {
  364. u32 r_shft = 5 * (i % 6);
  365. u32 c_shft = 4 * (i % 8);
  366. u32 r_mask = 0x1f << r_shft;
  367. u32 c_mask = 0x0f << c_shft;
  368. u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
  369. u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
  370. u32 row_cfg = readl(kbc->mmio + r_offs);
  371. u32 col_cfg = readl(kbc->mmio + c_offs);
  372. row_cfg &= ~r_mask;
  373. col_cfg &= ~c_mask;
  374. if (pdata->pin_cfg[i].is_row)
  375. row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
  376. else
  377. col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
  378. writel(row_cfg, kbc->mmio + r_offs);
  379. writel(col_cfg, kbc->mmio + c_offs);
  380. }
  381. }
  382. static int tegra_kbc_start(struct tegra_kbc *kbc)
  383. {
  384. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  385. unsigned long flags;
  386. unsigned int debounce_cnt;
  387. u32 val = 0;
  388. clk_enable(kbc->clk);
  389. /* Reset the KBC controller to clear all previous status.*/
  390. tegra_periph_reset_assert(kbc->clk);
  391. udelay(100);
  392. tegra_periph_reset_deassert(kbc->clk);
  393. udelay(100);
  394. tegra_kbc_config_pins(kbc);
  395. tegra_kbc_setup_wakekeys(kbc, false);
  396. writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
  397. /* Keyboard debounce count is maximum of 12 bits. */
  398. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  399. val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
  400. val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
  401. val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
  402. val |= KBC_CONTROL_KBC_EN; /* enable */
  403. writel(val, kbc->mmio + KBC_CONTROL_0);
  404. /*
  405. * Compute the delay(ns) from interrupt mode to continuous polling
  406. * mode so the timer routine is scheduled appropriately.
  407. */
  408. val = readl(kbc->mmio + KBC_INIT_DLY_0);
  409. kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
  410. kbc->num_pressed_keys = 0;
  411. /*
  412. * Atomically clear out any remaining entries in the key FIFO
  413. * and enable keyboard interrupts.
  414. */
  415. spin_lock_irqsave(&kbc->lock, flags);
  416. while (1) {
  417. val = readl(kbc->mmio + KBC_INT_0);
  418. val >>= 4;
  419. if (!val)
  420. break;
  421. val = readl(kbc->mmio + KBC_KP_ENT0_0);
  422. val = readl(kbc->mmio + KBC_KP_ENT1_0);
  423. }
  424. writel(0x7, kbc->mmio + KBC_INT_0);
  425. spin_unlock_irqrestore(&kbc->lock, flags);
  426. enable_irq(kbc->irq);
  427. return 0;
  428. }
  429. static void tegra_kbc_stop(struct tegra_kbc *kbc)
  430. {
  431. unsigned long flags;
  432. u32 val;
  433. spin_lock_irqsave(&kbc->lock, flags);
  434. val = readl(kbc->mmio + KBC_CONTROL_0);
  435. val &= ~1;
  436. writel(val, kbc->mmio + KBC_CONTROL_0);
  437. spin_unlock_irqrestore(&kbc->lock, flags);
  438. disable_irq(kbc->irq);
  439. del_timer_sync(&kbc->timer);
  440. clk_disable(kbc->clk);
  441. }
  442. static int tegra_kbc_open(struct input_dev *dev)
  443. {
  444. struct tegra_kbc *kbc = input_get_drvdata(dev);
  445. return tegra_kbc_start(kbc);
  446. }
  447. static void tegra_kbc_close(struct input_dev *dev)
  448. {
  449. struct tegra_kbc *kbc = input_get_drvdata(dev);
  450. return tegra_kbc_stop(kbc);
  451. }
  452. static bool __devinit
  453. tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
  454. struct device *dev, unsigned int *num_rows)
  455. {
  456. int i;
  457. *num_rows = 0;
  458. for (i = 0; i < KBC_MAX_GPIO; i++) {
  459. const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
  460. if (pin_cfg->is_row) {
  461. if (pin_cfg->num >= KBC_MAX_ROW) {
  462. dev_err(dev,
  463. "pin_cfg[%d]: invalid row number %d\n",
  464. i, pin_cfg->num);
  465. return false;
  466. }
  467. (*num_rows)++;
  468. } else {
  469. if (pin_cfg->num >= KBC_MAX_COL) {
  470. dev_err(dev,
  471. "pin_cfg[%d]: invalid column number %d\n",
  472. i, pin_cfg->num);
  473. return false;
  474. }
  475. }
  476. }
  477. return true;
  478. }
  479. static int __devinit tegra_kbc_probe(struct platform_device *pdev)
  480. {
  481. const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
  482. const struct matrix_keymap_data *keymap_data;
  483. struct tegra_kbc *kbc;
  484. struct input_dev *input_dev;
  485. struct resource *res;
  486. int irq;
  487. int err;
  488. int num_rows = 0;
  489. unsigned int debounce_cnt;
  490. unsigned int scan_time_rows;
  491. if (!pdata)
  492. return -EINVAL;
  493. if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows))
  494. return -EINVAL;
  495. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  496. if (!res) {
  497. dev_err(&pdev->dev, "failed to get I/O memory\n");
  498. return -ENXIO;
  499. }
  500. irq = platform_get_irq(pdev, 0);
  501. if (irq < 0) {
  502. dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
  503. return -ENXIO;
  504. }
  505. kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
  506. input_dev = input_allocate_device();
  507. if (!kbc || !input_dev) {
  508. err = -ENOMEM;
  509. goto err_free_mem;
  510. }
  511. kbc->pdata = pdata;
  512. kbc->idev = input_dev;
  513. kbc->irq = irq;
  514. spin_lock_init(&kbc->lock);
  515. setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
  516. res = request_mem_region(res->start, resource_size(res), pdev->name);
  517. if (!res) {
  518. dev_err(&pdev->dev, "failed to request I/O memory\n");
  519. err = -EBUSY;
  520. goto err_free_mem;
  521. }
  522. kbc->mmio = ioremap(res->start, resource_size(res));
  523. if (!kbc->mmio) {
  524. dev_err(&pdev->dev, "failed to remap I/O memory\n");
  525. err = -ENXIO;
  526. goto err_free_mem_region;
  527. }
  528. kbc->clk = clk_get(&pdev->dev, NULL);
  529. if (IS_ERR(kbc->clk)) {
  530. dev_err(&pdev->dev, "failed to get keyboard clock\n");
  531. err = PTR_ERR(kbc->clk);
  532. goto err_iounmap;
  533. }
  534. /*
  535. * The time delay between two consecutive reads of the FIFO is
  536. * the sum of the repeat time and the time taken for scanning
  537. * the rows. There is an additional delay before the row scanning
  538. * starts. The repoll delay is computed in milliseconds.
  539. */
  540. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  541. scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
  542. kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
  543. kbc->repoll_dly = ((kbc->repoll_dly * KBC_CYCLE_USEC) + 999) / 1000;
  544. input_dev->name = pdev->name;
  545. input_dev->id.bustype = BUS_HOST;
  546. input_dev->dev.parent = &pdev->dev;
  547. input_dev->open = tegra_kbc_open;
  548. input_dev->close = tegra_kbc_close;
  549. input_set_drvdata(input_dev, kbc);
  550. input_dev->evbit[0] = BIT_MASK(EV_KEY);
  551. input_set_capability(input_dev, EV_MSC, MSC_SCAN);
  552. input_dev->keycode = kbc->keycode;
  553. input_dev->keycodesize = sizeof(kbc->keycode[0]);
  554. input_dev->keycodemax = KBC_MAX_KEY;
  555. if (pdata->use_fn_map)
  556. input_dev->keycodemax *= 2;
  557. kbc->use_fn_map = pdata->use_fn_map;
  558. kbc->use_ghost_filter = pdata->use_ghost_filter;
  559. keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
  560. matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
  561. input_dev->keycode, input_dev->keybit);
  562. err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,
  563. pdev->name, kbc);
  564. if (err) {
  565. dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
  566. goto err_put_clk;
  567. }
  568. disable_irq(kbc->irq);
  569. err = input_register_device(kbc->idev);
  570. if (err) {
  571. dev_err(&pdev->dev, "failed to register input device\n");
  572. goto err_free_irq;
  573. }
  574. platform_set_drvdata(pdev, kbc);
  575. device_init_wakeup(&pdev->dev, pdata->wakeup);
  576. return 0;
  577. err_free_irq:
  578. free_irq(kbc->irq, pdev);
  579. err_put_clk:
  580. clk_put(kbc->clk);
  581. err_iounmap:
  582. iounmap(kbc->mmio);
  583. err_free_mem_region:
  584. release_mem_region(res->start, resource_size(res));
  585. err_free_mem:
  586. input_free_device(kbc->idev);
  587. kfree(kbc);
  588. return err;
  589. }
  590. static int __devexit tegra_kbc_remove(struct platform_device *pdev)
  591. {
  592. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  593. struct resource *res;
  594. free_irq(kbc->irq, pdev);
  595. clk_put(kbc->clk);
  596. input_unregister_device(kbc->idev);
  597. iounmap(kbc->mmio);
  598. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  599. release_mem_region(res->start, resource_size(res));
  600. kfree(kbc);
  601. platform_set_drvdata(pdev, NULL);
  602. return 0;
  603. }
  604. #ifdef CONFIG_PM_SLEEP
  605. static int tegra_kbc_suspend(struct device *dev)
  606. {
  607. struct platform_device *pdev = to_platform_device(dev);
  608. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  609. if (device_may_wakeup(&pdev->dev)) {
  610. tegra_kbc_setup_wakekeys(kbc, true);
  611. enable_irq_wake(kbc->irq);
  612. /* Forcefully clear the interrupt status */
  613. writel(0x7, kbc->mmio + KBC_INT_0);
  614. msleep(30);
  615. } else {
  616. mutex_lock(&kbc->idev->mutex);
  617. if (kbc->idev->users)
  618. tegra_kbc_stop(kbc);
  619. mutex_unlock(&kbc->idev->mutex);
  620. }
  621. return 0;
  622. }
  623. static int tegra_kbc_resume(struct device *dev)
  624. {
  625. struct platform_device *pdev = to_platform_device(dev);
  626. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  627. int err = 0;
  628. if (device_may_wakeup(&pdev->dev)) {
  629. disable_irq_wake(kbc->irq);
  630. tegra_kbc_setup_wakekeys(kbc, false);
  631. } else {
  632. mutex_lock(&kbc->idev->mutex);
  633. if (kbc->idev->users)
  634. err = tegra_kbc_start(kbc);
  635. mutex_unlock(&kbc->idev->mutex);
  636. }
  637. return err;
  638. }
  639. #endif
  640. static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
  641. static struct platform_driver tegra_kbc_driver = {
  642. .probe = tegra_kbc_probe,
  643. .remove = __devexit_p(tegra_kbc_remove),
  644. .driver = {
  645. .name = "tegra-kbc",
  646. .owner = THIS_MODULE,
  647. .pm = &tegra_kbc_pm_ops,
  648. },
  649. };
  650. static void __exit tegra_kbc_exit(void)
  651. {
  652. platform_driver_unregister(&tegra_kbc_driver);
  653. }
  654. module_exit(tegra_kbc_exit);
  655. static int __init tegra_kbc_init(void)
  656. {
  657. return platform_driver_register(&tegra_kbc_driver);
  658. }
  659. module_init(tegra_kbc_init);
  660. MODULE_LICENSE("GPL");
  661. MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
  662. MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
  663. MODULE_ALIAS("platform:tegra-kbc");