hpsa.c 115 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  90. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  91. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  92. {0,}
  93. };
  94. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  95. /* board_id = Subsystem Device ID & Vendor ID
  96. * product = Marketing Name for the board
  97. * access = Address of the struct of function pointers
  98. */
  99. static struct board_type products[] = {
  100. {0x3241103C, "Smart Array P212", &SA5_access},
  101. {0x3243103C, "Smart Array P410", &SA5_access},
  102. {0x3245103C, "Smart Array P410i", &SA5_access},
  103. {0x3247103C, "Smart Array P411", &SA5_access},
  104. {0x3249103C, "Smart Array P812", &SA5_access},
  105. {0x324a103C, "Smart Array P712m", &SA5_access},
  106. {0x324b103C, "Smart Array P711m", &SA5_access},
  107. {0x3250103C, "Smart Array", &SA5_access},
  108. {0x3250113C, "Smart Array", &SA5_access},
  109. {0x3250123C, "Smart Array", &SA5_access},
  110. {0x3250133C, "Smart Array", &SA5_access},
  111. {0x3250143C, "Smart Array", &SA5_access},
  112. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  113. };
  114. static int number_of_controllers;
  115. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  116. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  117. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  118. static void start_io(struct ctlr_info *h);
  119. #ifdef CONFIG_COMPAT
  120. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  121. #endif
  122. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  123. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  124. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  125. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  126. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  127. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  128. int cmd_type);
  129. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  130. static void hpsa_scan_start(struct Scsi_Host *);
  131. static int hpsa_scan_finished(struct Scsi_Host *sh,
  132. unsigned long elapsed_time);
  133. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  134. int qdepth, int reason);
  135. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  136. static int hpsa_slave_alloc(struct scsi_device *sdev);
  137. static void hpsa_slave_destroy(struct scsi_device *sdev);
  138. static ssize_t raid_level_show(struct device *dev,
  139. struct device_attribute *attr, char *buf);
  140. static ssize_t lunid_show(struct device *dev,
  141. struct device_attribute *attr, char *buf);
  142. static ssize_t unique_id_show(struct device *dev,
  143. struct device_attribute *attr, char *buf);
  144. static ssize_t host_show_firmware_revision(struct device *dev,
  145. struct device_attribute *attr, char *buf);
  146. static ssize_t host_show_commands_outstanding(struct device *dev,
  147. struct device_attribute *attr, char *buf);
  148. static ssize_t host_show_transport_mode(struct device *dev,
  149. struct device_attribute *attr, char *buf);
  150. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  151. static ssize_t host_store_rescan(struct device *dev,
  152. struct device_attribute *attr, const char *buf, size_t count);
  153. static int check_for_unit_attention(struct ctlr_info *h,
  154. struct CommandList *c);
  155. static void check_ioctl_unit_attention(struct ctlr_info *h,
  156. struct CommandList *c);
  157. /* performant mode helper functions */
  158. static void calc_bucket_map(int *bucket, int num_buckets,
  159. int nsgs, int *bucket_map);
  160. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  161. static inline u32 next_command(struct ctlr_info *h);
  162. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  163. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  164. u64 *cfg_offset);
  165. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  166. unsigned long *memory_bar);
  167. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  168. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  169. void __iomem *vaddr, int wait_for_ready);
  170. #define BOARD_NOT_READY 0
  171. #define BOARD_READY 1
  172. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  173. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  174. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  175. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  176. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  177. host_show_firmware_revision, NULL);
  178. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  179. host_show_commands_outstanding, NULL);
  180. static DEVICE_ATTR(transport_mode, S_IRUGO,
  181. host_show_transport_mode, NULL);
  182. static struct device_attribute *hpsa_sdev_attrs[] = {
  183. &dev_attr_raid_level,
  184. &dev_attr_lunid,
  185. &dev_attr_unique_id,
  186. NULL,
  187. };
  188. static struct device_attribute *hpsa_shost_attrs[] = {
  189. &dev_attr_rescan,
  190. &dev_attr_firmware_revision,
  191. &dev_attr_commands_outstanding,
  192. &dev_attr_transport_mode,
  193. NULL,
  194. };
  195. static struct scsi_host_template hpsa_driver_template = {
  196. .module = THIS_MODULE,
  197. .name = "hpsa",
  198. .proc_name = "hpsa",
  199. .queuecommand = hpsa_scsi_queue_command,
  200. .scan_start = hpsa_scan_start,
  201. .scan_finished = hpsa_scan_finished,
  202. .change_queue_depth = hpsa_change_queue_depth,
  203. .this_id = -1,
  204. .use_clustering = ENABLE_CLUSTERING,
  205. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  206. .ioctl = hpsa_ioctl,
  207. .slave_alloc = hpsa_slave_alloc,
  208. .slave_destroy = hpsa_slave_destroy,
  209. #ifdef CONFIG_COMPAT
  210. .compat_ioctl = hpsa_compat_ioctl,
  211. #endif
  212. .sdev_attrs = hpsa_sdev_attrs,
  213. .shost_attrs = hpsa_shost_attrs,
  214. };
  215. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  216. {
  217. unsigned long *priv = shost_priv(sdev->host);
  218. return (struct ctlr_info *) *priv;
  219. }
  220. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  221. {
  222. unsigned long *priv = shost_priv(sh);
  223. return (struct ctlr_info *) *priv;
  224. }
  225. static int check_for_unit_attention(struct ctlr_info *h,
  226. struct CommandList *c)
  227. {
  228. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  229. return 0;
  230. switch (c->err_info->SenseInfo[12]) {
  231. case STATE_CHANGED:
  232. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  233. "detected, command retried\n", h->ctlr);
  234. break;
  235. case LUN_FAILED:
  236. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  237. "detected, action required\n", h->ctlr);
  238. break;
  239. case REPORT_LUNS_CHANGED:
  240. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  241. "changed, action required\n", h->ctlr);
  242. /*
  243. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  244. */
  245. break;
  246. case POWER_OR_RESET:
  247. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  248. "or device reset detected\n", h->ctlr);
  249. break;
  250. case UNIT_ATTENTION_CLEARED:
  251. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  252. "cleared by another initiator\n", h->ctlr);
  253. break;
  254. default:
  255. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  256. "unit attention detected\n", h->ctlr);
  257. break;
  258. }
  259. return 1;
  260. }
  261. static ssize_t host_store_rescan(struct device *dev,
  262. struct device_attribute *attr,
  263. const char *buf, size_t count)
  264. {
  265. struct ctlr_info *h;
  266. struct Scsi_Host *shost = class_to_shost(dev);
  267. h = shost_to_hba(shost);
  268. hpsa_scan_start(h->scsi_host);
  269. return count;
  270. }
  271. static ssize_t host_show_firmware_revision(struct device *dev,
  272. struct device_attribute *attr, char *buf)
  273. {
  274. struct ctlr_info *h;
  275. struct Scsi_Host *shost = class_to_shost(dev);
  276. unsigned char *fwrev;
  277. h = shost_to_hba(shost);
  278. if (!h->hba_inquiry_data)
  279. return 0;
  280. fwrev = &h->hba_inquiry_data[32];
  281. return snprintf(buf, 20, "%c%c%c%c\n",
  282. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  283. }
  284. static ssize_t host_show_commands_outstanding(struct device *dev,
  285. struct device_attribute *attr, char *buf)
  286. {
  287. struct Scsi_Host *shost = class_to_shost(dev);
  288. struct ctlr_info *h = shost_to_hba(shost);
  289. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  290. }
  291. static ssize_t host_show_transport_mode(struct device *dev,
  292. struct device_attribute *attr, char *buf)
  293. {
  294. struct ctlr_info *h;
  295. struct Scsi_Host *shost = class_to_shost(dev);
  296. h = shost_to_hba(shost);
  297. return snprintf(buf, 20, "%s\n",
  298. h->transMethod & CFGTBL_Trans_Performant ?
  299. "performant" : "simple");
  300. }
  301. /* Enqueuing and dequeuing functions for cmdlists. */
  302. static inline void addQ(struct list_head *list, struct CommandList *c)
  303. {
  304. list_add_tail(&c->list, list);
  305. }
  306. static inline u32 next_command(struct ctlr_info *h)
  307. {
  308. u32 a;
  309. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  310. return h->access.command_completed(h);
  311. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  312. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  313. (h->reply_pool_head)++;
  314. h->commands_outstanding--;
  315. } else {
  316. a = FIFO_EMPTY;
  317. }
  318. /* Check for wraparound */
  319. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  320. h->reply_pool_head = h->reply_pool;
  321. h->reply_pool_wraparound ^= 1;
  322. }
  323. return a;
  324. }
  325. /* set_performant_mode: Modify the tag for cciss performant
  326. * set bit 0 for pull model, bits 3-1 for block fetch
  327. * register number
  328. */
  329. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  330. {
  331. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  332. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  333. }
  334. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  335. struct CommandList *c)
  336. {
  337. unsigned long flags;
  338. set_performant_mode(h, c);
  339. spin_lock_irqsave(&h->lock, flags);
  340. addQ(&h->reqQ, c);
  341. h->Qdepth++;
  342. start_io(h);
  343. spin_unlock_irqrestore(&h->lock, flags);
  344. }
  345. static inline void removeQ(struct CommandList *c)
  346. {
  347. if (WARN_ON(list_empty(&c->list)))
  348. return;
  349. list_del_init(&c->list);
  350. }
  351. static inline int is_hba_lunid(unsigned char scsi3addr[])
  352. {
  353. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  354. }
  355. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  356. {
  357. return (scsi3addr[3] & 0xC0) == 0x40;
  358. }
  359. static inline int is_scsi_rev_5(struct ctlr_info *h)
  360. {
  361. if (!h->hba_inquiry_data)
  362. return 0;
  363. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  364. return 1;
  365. return 0;
  366. }
  367. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  368. "UNKNOWN"
  369. };
  370. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  371. static ssize_t raid_level_show(struct device *dev,
  372. struct device_attribute *attr, char *buf)
  373. {
  374. ssize_t l = 0;
  375. unsigned char rlevel;
  376. struct ctlr_info *h;
  377. struct scsi_device *sdev;
  378. struct hpsa_scsi_dev_t *hdev;
  379. unsigned long flags;
  380. sdev = to_scsi_device(dev);
  381. h = sdev_to_hba(sdev);
  382. spin_lock_irqsave(&h->lock, flags);
  383. hdev = sdev->hostdata;
  384. if (!hdev) {
  385. spin_unlock_irqrestore(&h->lock, flags);
  386. return -ENODEV;
  387. }
  388. /* Is this even a logical drive? */
  389. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  390. spin_unlock_irqrestore(&h->lock, flags);
  391. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  392. return l;
  393. }
  394. rlevel = hdev->raid_level;
  395. spin_unlock_irqrestore(&h->lock, flags);
  396. if (rlevel > RAID_UNKNOWN)
  397. rlevel = RAID_UNKNOWN;
  398. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  399. return l;
  400. }
  401. static ssize_t lunid_show(struct device *dev,
  402. struct device_attribute *attr, char *buf)
  403. {
  404. struct ctlr_info *h;
  405. struct scsi_device *sdev;
  406. struct hpsa_scsi_dev_t *hdev;
  407. unsigned long flags;
  408. unsigned char lunid[8];
  409. sdev = to_scsi_device(dev);
  410. h = sdev_to_hba(sdev);
  411. spin_lock_irqsave(&h->lock, flags);
  412. hdev = sdev->hostdata;
  413. if (!hdev) {
  414. spin_unlock_irqrestore(&h->lock, flags);
  415. return -ENODEV;
  416. }
  417. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  418. spin_unlock_irqrestore(&h->lock, flags);
  419. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  420. lunid[0], lunid[1], lunid[2], lunid[3],
  421. lunid[4], lunid[5], lunid[6], lunid[7]);
  422. }
  423. static ssize_t unique_id_show(struct device *dev,
  424. struct device_attribute *attr, char *buf)
  425. {
  426. struct ctlr_info *h;
  427. struct scsi_device *sdev;
  428. struct hpsa_scsi_dev_t *hdev;
  429. unsigned long flags;
  430. unsigned char sn[16];
  431. sdev = to_scsi_device(dev);
  432. h = sdev_to_hba(sdev);
  433. spin_lock_irqsave(&h->lock, flags);
  434. hdev = sdev->hostdata;
  435. if (!hdev) {
  436. spin_unlock_irqrestore(&h->lock, flags);
  437. return -ENODEV;
  438. }
  439. memcpy(sn, hdev->device_id, sizeof(sn));
  440. spin_unlock_irqrestore(&h->lock, flags);
  441. return snprintf(buf, 16 * 2 + 2,
  442. "%02X%02X%02X%02X%02X%02X%02X%02X"
  443. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  444. sn[0], sn[1], sn[2], sn[3],
  445. sn[4], sn[5], sn[6], sn[7],
  446. sn[8], sn[9], sn[10], sn[11],
  447. sn[12], sn[13], sn[14], sn[15]);
  448. }
  449. static int hpsa_find_target_lun(struct ctlr_info *h,
  450. unsigned char scsi3addr[], int bus, int *target, int *lun)
  451. {
  452. /* finds an unused bus, target, lun for a new physical device
  453. * assumes h->devlock is held
  454. */
  455. int i, found = 0;
  456. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  457. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  458. for (i = 0; i < h->ndevices; i++) {
  459. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  460. set_bit(h->dev[i]->target, lun_taken);
  461. }
  462. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  463. if (!test_bit(i, lun_taken)) {
  464. /* *bus = 1; */
  465. *target = i;
  466. *lun = 0;
  467. found = 1;
  468. break;
  469. }
  470. }
  471. return !found;
  472. }
  473. /* Add an entry into h->dev[] array. */
  474. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  475. struct hpsa_scsi_dev_t *device,
  476. struct hpsa_scsi_dev_t *added[], int *nadded)
  477. {
  478. /* assumes h->devlock is held */
  479. int n = h->ndevices;
  480. int i;
  481. unsigned char addr1[8], addr2[8];
  482. struct hpsa_scsi_dev_t *sd;
  483. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  484. dev_err(&h->pdev->dev, "too many devices, some will be "
  485. "inaccessible.\n");
  486. return -1;
  487. }
  488. /* physical devices do not have lun or target assigned until now. */
  489. if (device->lun != -1)
  490. /* Logical device, lun is already assigned. */
  491. goto lun_assigned;
  492. /* If this device a non-zero lun of a multi-lun device
  493. * byte 4 of the 8-byte LUN addr will contain the logical
  494. * unit no, zero otherise.
  495. */
  496. if (device->scsi3addr[4] == 0) {
  497. /* This is not a non-zero lun of a multi-lun device */
  498. if (hpsa_find_target_lun(h, device->scsi3addr,
  499. device->bus, &device->target, &device->lun) != 0)
  500. return -1;
  501. goto lun_assigned;
  502. }
  503. /* This is a non-zero lun of a multi-lun device.
  504. * Search through our list and find the device which
  505. * has the same 8 byte LUN address, excepting byte 4.
  506. * Assign the same bus and target for this new LUN.
  507. * Use the logical unit number from the firmware.
  508. */
  509. memcpy(addr1, device->scsi3addr, 8);
  510. addr1[4] = 0;
  511. for (i = 0; i < n; i++) {
  512. sd = h->dev[i];
  513. memcpy(addr2, sd->scsi3addr, 8);
  514. addr2[4] = 0;
  515. /* differ only in byte 4? */
  516. if (memcmp(addr1, addr2, 8) == 0) {
  517. device->bus = sd->bus;
  518. device->target = sd->target;
  519. device->lun = device->scsi3addr[4];
  520. break;
  521. }
  522. }
  523. if (device->lun == -1) {
  524. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  525. " suspect firmware bug or unsupported hardware "
  526. "configuration.\n");
  527. return -1;
  528. }
  529. lun_assigned:
  530. h->dev[n] = device;
  531. h->ndevices++;
  532. added[*nadded] = device;
  533. (*nadded)++;
  534. /* initially, (before registering with scsi layer) we don't
  535. * know our hostno and we don't want to print anything first
  536. * time anyway (the scsi layer's inquiries will show that info)
  537. */
  538. /* if (hostno != -1) */
  539. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  540. scsi_device_type(device->devtype), hostno,
  541. device->bus, device->target, device->lun);
  542. return 0;
  543. }
  544. /* Replace an entry from h->dev[] array. */
  545. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  546. int entry, struct hpsa_scsi_dev_t *new_entry,
  547. struct hpsa_scsi_dev_t *added[], int *nadded,
  548. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  549. {
  550. /* assumes h->devlock is held */
  551. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  552. removed[*nremoved] = h->dev[entry];
  553. (*nremoved)++;
  554. h->dev[entry] = new_entry;
  555. added[*nadded] = new_entry;
  556. (*nadded)++;
  557. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  558. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  559. new_entry->target, new_entry->lun);
  560. }
  561. /* Remove an entry from h->dev[] array. */
  562. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  563. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  564. {
  565. /* assumes h->devlock is held */
  566. int i;
  567. struct hpsa_scsi_dev_t *sd;
  568. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  569. sd = h->dev[entry];
  570. removed[*nremoved] = h->dev[entry];
  571. (*nremoved)++;
  572. for (i = entry; i < h->ndevices-1; i++)
  573. h->dev[i] = h->dev[i+1];
  574. h->ndevices--;
  575. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  576. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  577. sd->lun);
  578. }
  579. #define SCSI3ADDR_EQ(a, b) ( \
  580. (a)[7] == (b)[7] && \
  581. (a)[6] == (b)[6] && \
  582. (a)[5] == (b)[5] && \
  583. (a)[4] == (b)[4] && \
  584. (a)[3] == (b)[3] && \
  585. (a)[2] == (b)[2] && \
  586. (a)[1] == (b)[1] && \
  587. (a)[0] == (b)[0])
  588. static void fixup_botched_add(struct ctlr_info *h,
  589. struct hpsa_scsi_dev_t *added)
  590. {
  591. /* called when scsi_add_device fails in order to re-adjust
  592. * h->dev[] to match the mid layer's view.
  593. */
  594. unsigned long flags;
  595. int i, j;
  596. spin_lock_irqsave(&h->lock, flags);
  597. for (i = 0; i < h->ndevices; i++) {
  598. if (h->dev[i] == added) {
  599. for (j = i; j < h->ndevices-1; j++)
  600. h->dev[j] = h->dev[j+1];
  601. h->ndevices--;
  602. break;
  603. }
  604. }
  605. spin_unlock_irqrestore(&h->lock, flags);
  606. kfree(added);
  607. }
  608. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  609. struct hpsa_scsi_dev_t *dev2)
  610. {
  611. /* we compare everything except lun and target as these
  612. * are not yet assigned. Compare parts likely
  613. * to differ first
  614. */
  615. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  616. sizeof(dev1->scsi3addr)) != 0)
  617. return 0;
  618. if (memcmp(dev1->device_id, dev2->device_id,
  619. sizeof(dev1->device_id)) != 0)
  620. return 0;
  621. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  622. return 0;
  623. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  624. return 0;
  625. if (dev1->devtype != dev2->devtype)
  626. return 0;
  627. if (dev1->bus != dev2->bus)
  628. return 0;
  629. return 1;
  630. }
  631. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  632. * and return needle location in *index. If scsi3addr matches, but not
  633. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  634. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  635. */
  636. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  637. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  638. int *index)
  639. {
  640. int i;
  641. #define DEVICE_NOT_FOUND 0
  642. #define DEVICE_CHANGED 1
  643. #define DEVICE_SAME 2
  644. for (i = 0; i < haystack_size; i++) {
  645. if (haystack[i] == NULL) /* previously removed. */
  646. continue;
  647. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  648. *index = i;
  649. if (device_is_the_same(needle, haystack[i]))
  650. return DEVICE_SAME;
  651. else
  652. return DEVICE_CHANGED;
  653. }
  654. }
  655. *index = -1;
  656. return DEVICE_NOT_FOUND;
  657. }
  658. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  659. struct hpsa_scsi_dev_t *sd[], int nsds)
  660. {
  661. /* sd contains scsi3 addresses and devtypes, and inquiry
  662. * data. This function takes what's in sd to be the current
  663. * reality and updates h->dev[] to reflect that reality.
  664. */
  665. int i, entry, device_change, changes = 0;
  666. struct hpsa_scsi_dev_t *csd;
  667. unsigned long flags;
  668. struct hpsa_scsi_dev_t **added, **removed;
  669. int nadded, nremoved;
  670. struct Scsi_Host *sh = NULL;
  671. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  672. GFP_KERNEL);
  673. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  674. GFP_KERNEL);
  675. if (!added || !removed) {
  676. dev_warn(&h->pdev->dev, "out of memory in "
  677. "adjust_hpsa_scsi_table\n");
  678. goto free_and_out;
  679. }
  680. spin_lock_irqsave(&h->devlock, flags);
  681. /* find any devices in h->dev[] that are not in
  682. * sd[] and remove them from h->dev[], and for any
  683. * devices which have changed, remove the old device
  684. * info and add the new device info.
  685. */
  686. i = 0;
  687. nremoved = 0;
  688. nadded = 0;
  689. while (i < h->ndevices) {
  690. csd = h->dev[i];
  691. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  692. if (device_change == DEVICE_NOT_FOUND) {
  693. changes++;
  694. hpsa_scsi_remove_entry(h, hostno, i,
  695. removed, &nremoved);
  696. continue; /* remove ^^^, hence i not incremented */
  697. } else if (device_change == DEVICE_CHANGED) {
  698. changes++;
  699. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  700. added, &nadded, removed, &nremoved);
  701. /* Set it to NULL to prevent it from being freed
  702. * at the bottom of hpsa_update_scsi_devices()
  703. */
  704. sd[entry] = NULL;
  705. }
  706. i++;
  707. }
  708. /* Now, make sure every device listed in sd[] is also
  709. * listed in h->dev[], adding them if they aren't found
  710. */
  711. for (i = 0; i < nsds; i++) {
  712. if (!sd[i]) /* if already added above. */
  713. continue;
  714. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  715. h->ndevices, &entry);
  716. if (device_change == DEVICE_NOT_FOUND) {
  717. changes++;
  718. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  719. added, &nadded) != 0)
  720. break;
  721. sd[i] = NULL; /* prevent from being freed later. */
  722. } else if (device_change == DEVICE_CHANGED) {
  723. /* should never happen... */
  724. changes++;
  725. dev_warn(&h->pdev->dev,
  726. "device unexpectedly changed.\n");
  727. /* but if it does happen, we just ignore that device */
  728. }
  729. }
  730. spin_unlock_irqrestore(&h->devlock, flags);
  731. /* Don't notify scsi mid layer of any changes the first time through
  732. * (or if there are no changes) scsi_scan_host will do it later the
  733. * first time through.
  734. */
  735. if (hostno == -1 || !changes)
  736. goto free_and_out;
  737. sh = h->scsi_host;
  738. /* Notify scsi mid layer of any removed devices */
  739. for (i = 0; i < nremoved; i++) {
  740. struct scsi_device *sdev =
  741. scsi_device_lookup(sh, removed[i]->bus,
  742. removed[i]->target, removed[i]->lun);
  743. if (sdev != NULL) {
  744. scsi_remove_device(sdev);
  745. scsi_device_put(sdev);
  746. } else {
  747. /* We don't expect to get here.
  748. * future cmds to this device will get selection
  749. * timeout as if the device was gone.
  750. */
  751. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  752. " for removal.", hostno, removed[i]->bus,
  753. removed[i]->target, removed[i]->lun);
  754. }
  755. kfree(removed[i]);
  756. removed[i] = NULL;
  757. }
  758. /* Notify scsi mid layer of any added devices */
  759. for (i = 0; i < nadded; i++) {
  760. if (scsi_add_device(sh, added[i]->bus,
  761. added[i]->target, added[i]->lun) == 0)
  762. continue;
  763. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  764. "device not added.\n", hostno, added[i]->bus,
  765. added[i]->target, added[i]->lun);
  766. /* now we have to remove it from h->dev,
  767. * since it didn't get added to scsi mid layer
  768. */
  769. fixup_botched_add(h, added[i]);
  770. }
  771. free_and_out:
  772. kfree(added);
  773. kfree(removed);
  774. }
  775. /*
  776. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  777. * Assume's h->devlock is held.
  778. */
  779. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  780. int bus, int target, int lun)
  781. {
  782. int i;
  783. struct hpsa_scsi_dev_t *sd;
  784. for (i = 0; i < h->ndevices; i++) {
  785. sd = h->dev[i];
  786. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  787. return sd;
  788. }
  789. return NULL;
  790. }
  791. /* link sdev->hostdata to our per-device structure. */
  792. static int hpsa_slave_alloc(struct scsi_device *sdev)
  793. {
  794. struct hpsa_scsi_dev_t *sd;
  795. unsigned long flags;
  796. struct ctlr_info *h;
  797. h = sdev_to_hba(sdev);
  798. spin_lock_irqsave(&h->devlock, flags);
  799. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  800. sdev_id(sdev), sdev->lun);
  801. if (sd != NULL)
  802. sdev->hostdata = sd;
  803. spin_unlock_irqrestore(&h->devlock, flags);
  804. return 0;
  805. }
  806. static void hpsa_slave_destroy(struct scsi_device *sdev)
  807. {
  808. /* nothing to do. */
  809. }
  810. static void hpsa_scsi_setup(struct ctlr_info *h)
  811. {
  812. h->ndevices = 0;
  813. h->scsi_host = NULL;
  814. spin_lock_init(&h->devlock);
  815. }
  816. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  817. {
  818. int i;
  819. if (!h->cmd_sg_list)
  820. return;
  821. for (i = 0; i < h->nr_cmds; i++) {
  822. kfree(h->cmd_sg_list[i]);
  823. h->cmd_sg_list[i] = NULL;
  824. }
  825. kfree(h->cmd_sg_list);
  826. h->cmd_sg_list = NULL;
  827. }
  828. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  829. {
  830. int i;
  831. if (h->chainsize <= 0)
  832. return 0;
  833. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  834. GFP_KERNEL);
  835. if (!h->cmd_sg_list)
  836. return -ENOMEM;
  837. for (i = 0; i < h->nr_cmds; i++) {
  838. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  839. h->chainsize, GFP_KERNEL);
  840. if (!h->cmd_sg_list[i])
  841. goto clean;
  842. }
  843. return 0;
  844. clean:
  845. hpsa_free_sg_chain_blocks(h);
  846. return -ENOMEM;
  847. }
  848. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  849. struct CommandList *c)
  850. {
  851. struct SGDescriptor *chain_sg, *chain_block;
  852. u64 temp64;
  853. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  854. chain_block = h->cmd_sg_list[c->cmdindex];
  855. chain_sg->Ext = HPSA_SG_CHAIN;
  856. chain_sg->Len = sizeof(*chain_sg) *
  857. (c->Header.SGTotal - h->max_cmd_sg_entries);
  858. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  859. PCI_DMA_TODEVICE);
  860. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  861. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  862. }
  863. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  864. struct CommandList *c)
  865. {
  866. struct SGDescriptor *chain_sg;
  867. union u64bit temp64;
  868. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  869. return;
  870. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  871. temp64.val32.lower = chain_sg->Addr.lower;
  872. temp64.val32.upper = chain_sg->Addr.upper;
  873. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  874. }
  875. static void complete_scsi_command(struct CommandList *cp,
  876. int timeout, u32 tag)
  877. {
  878. struct scsi_cmnd *cmd;
  879. struct ctlr_info *h;
  880. struct ErrorInfo *ei;
  881. unsigned char sense_key;
  882. unsigned char asc; /* additional sense code */
  883. unsigned char ascq; /* additional sense code qualifier */
  884. ei = cp->err_info;
  885. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  886. h = cp->h;
  887. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  888. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  889. hpsa_unmap_sg_chain_block(h, cp);
  890. cmd->result = (DID_OK << 16); /* host byte */
  891. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  892. cmd->result |= ei->ScsiStatus;
  893. /* copy the sense data whether we need to or not. */
  894. memcpy(cmd->sense_buffer, ei->SenseInfo,
  895. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  896. SCSI_SENSE_BUFFERSIZE :
  897. ei->SenseLen);
  898. scsi_set_resid(cmd, ei->ResidualCnt);
  899. if (ei->CommandStatus == 0) {
  900. cmd->scsi_done(cmd);
  901. cmd_free(h, cp);
  902. return;
  903. }
  904. /* an error has occurred */
  905. switch (ei->CommandStatus) {
  906. case CMD_TARGET_STATUS:
  907. if (ei->ScsiStatus) {
  908. /* Get sense key */
  909. sense_key = 0xf & ei->SenseInfo[2];
  910. /* Get additional sense code */
  911. asc = ei->SenseInfo[12];
  912. /* Get addition sense code qualifier */
  913. ascq = ei->SenseInfo[13];
  914. }
  915. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  916. if (check_for_unit_attention(h, cp)) {
  917. cmd->result = DID_SOFT_ERROR << 16;
  918. break;
  919. }
  920. if (sense_key == ILLEGAL_REQUEST) {
  921. /*
  922. * SCSI REPORT_LUNS is commonly unsupported on
  923. * Smart Array. Suppress noisy complaint.
  924. */
  925. if (cp->Request.CDB[0] == REPORT_LUNS)
  926. break;
  927. /* If ASC/ASCQ indicate Logical Unit
  928. * Not Supported condition,
  929. */
  930. if ((asc == 0x25) && (ascq == 0x0)) {
  931. dev_warn(&h->pdev->dev, "cp %p "
  932. "has check condition\n", cp);
  933. break;
  934. }
  935. }
  936. if (sense_key == NOT_READY) {
  937. /* If Sense is Not Ready, Logical Unit
  938. * Not ready, Manual Intervention
  939. * required
  940. */
  941. if ((asc == 0x04) && (ascq == 0x03)) {
  942. dev_warn(&h->pdev->dev, "cp %p "
  943. "has check condition: unit "
  944. "not ready, manual "
  945. "intervention required\n", cp);
  946. break;
  947. }
  948. }
  949. if (sense_key == ABORTED_COMMAND) {
  950. /* Aborted command is retryable */
  951. dev_warn(&h->pdev->dev, "cp %p "
  952. "has check condition: aborted command: "
  953. "ASC: 0x%x, ASCQ: 0x%x\n",
  954. cp, asc, ascq);
  955. cmd->result = DID_SOFT_ERROR << 16;
  956. break;
  957. }
  958. /* Must be some other type of check condition */
  959. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  960. "unknown type: "
  961. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  962. "Returning result: 0x%x, "
  963. "cmd=[%02x %02x %02x %02x %02x "
  964. "%02x %02x %02x %02x %02x %02x "
  965. "%02x %02x %02x %02x %02x]\n",
  966. cp, sense_key, asc, ascq,
  967. cmd->result,
  968. cmd->cmnd[0], cmd->cmnd[1],
  969. cmd->cmnd[2], cmd->cmnd[3],
  970. cmd->cmnd[4], cmd->cmnd[5],
  971. cmd->cmnd[6], cmd->cmnd[7],
  972. cmd->cmnd[8], cmd->cmnd[9],
  973. cmd->cmnd[10], cmd->cmnd[11],
  974. cmd->cmnd[12], cmd->cmnd[13],
  975. cmd->cmnd[14], cmd->cmnd[15]);
  976. break;
  977. }
  978. /* Problem was not a check condition
  979. * Pass it up to the upper layers...
  980. */
  981. if (ei->ScsiStatus) {
  982. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  983. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  984. "Returning result: 0x%x\n",
  985. cp, ei->ScsiStatus,
  986. sense_key, asc, ascq,
  987. cmd->result);
  988. } else { /* scsi status is zero??? How??? */
  989. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  990. "Returning no connection.\n", cp),
  991. /* Ordinarily, this case should never happen,
  992. * but there is a bug in some released firmware
  993. * revisions that allows it to happen if, for
  994. * example, a 4100 backplane loses power and
  995. * the tape drive is in it. We assume that
  996. * it's a fatal error of some kind because we
  997. * can't show that it wasn't. We will make it
  998. * look like selection timeout since that is
  999. * the most common reason for this to occur,
  1000. * and it's severe enough.
  1001. */
  1002. cmd->result = DID_NO_CONNECT << 16;
  1003. }
  1004. break;
  1005. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1006. break;
  1007. case CMD_DATA_OVERRUN:
  1008. dev_warn(&h->pdev->dev, "cp %p has"
  1009. " completed with data overrun "
  1010. "reported\n", cp);
  1011. break;
  1012. case CMD_INVALID: {
  1013. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1014. print_cmd(cp); */
  1015. /* We get CMD_INVALID if you address a non-existent device
  1016. * instead of a selection timeout (no response). You will
  1017. * see this if you yank out a drive, then try to access it.
  1018. * This is kind of a shame because it means that any other
  1019. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1020. * missing target. */
  1021. cmd->result = DID_NO_CONNECT << 16;
  1022. }
  1023. break;
  1024. case CMD_PROTOCOL_ERR:
  1025. dev_warn(&h->pdev->dev, "cp %p has "
  1026. "protocol error \n", cp);
  1027. break;
  1028. case CMD_HARDWARE_ERR:
  1029. cmd->result = DID_ERROR << 16;
  1030. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1031. break;
  1032. case CMD_CONNECTION_LOST:
  1033. cmd->result = DID_ERROR << 16;
  1034. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1035. break;
  1036. case CMD_ABORTED:
  1037. cmd->result = DID_ABORT << 16;
  1038. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1039. cp, ei->ScsiStatus);
  1040. break;
  1041. case CMD_ABORT_FAILED:
  1042. cmd->result = DID_ERROR << 16;
  1043. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1044. break;
  1045. case CMD_UNSOLICITED_ABORT:
  1046. cmd->result = DID_RESET << 16;
  1047. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1048. "abort\n", cp);
  1049. break;
  1050. case CMD_TIMEOUT:
  1051. cmd->result = DID_TIME_OUT << 16;
  1052. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1053. break;
  1054. case CMD_UNABORTABLE:
  1055. cmd->result = DID_ERROR << 16;
  1056. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1057. break;
  1058. default:
  1059. cmd->result = DID_ERROR << 16;
  1060. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1061. cp, ei->CommandStatus);
  1062. }
  1063. cmd->scsi_done(cmd);
  1064. cmd_free(h, cp);
  1065. }
  1066. static int hpsa_scsi_detect(struct ctlr_info *h)
  1067. {
  1068. struct Scsi_Host *sh;
  1069. int error;
  1070. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1071. if (sh == NULL)
  1072. goto fail;
  1073. sh->io_port = 0;
  1074. sh->n_io_port = 0;
  1075. sh->this_id = -1;
  1076. sh->max_channel = 3;
  1077. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1078. sh->max_lun = HPSA_MAX_LUN;
  1079. sh->max_id = HPSA_MAX_LUN;
  1080. sh->can_queue = h->nr_cmds;
  1081. sh->cmd_per_lun = h->nr_cmds;
  1082. sh->sg_tablesize = h->maxsgentries;
  1083. h->scsi_host = sh;
  1084. sh->hostdata[0] = (unsigned long) h;
  1085. sh->irq = h->intr[h->intr_mode];
  1086. sh->unique_id = sh->irq;
  1087. error = scsi_add_host(sh, &h->pdev->dev);
  1088. if (error)
  1089. goto fail_host_put;
  1090. scsi_scan_host(sh);
  1091. return 0;
  1092. fail_host_put:
  1093. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1094. " failed for controller %d\n", h->ctlr);
  1095. scsi_host_put(sh);
  1096. return error;
  1097. fail:
  1098. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1099. " failed for controller %d\n", h->ctlr);
  1100. return -ENOMEM;
  1101. }
  1102. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1103. struct CommandList *c, int sg_used, int data_direction)
  1104. {
  1105. int i;
  1106. union u64bit addr64;
  1107. for (i = 0; i < sg_used; i++) {
  1108. addr64.val32.lower = c->SG[i].Addr.lower;
  1109. addr64.val32.upper = c->SG[i].Addr.upper;
  1110. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1111. data_direction);
  1112. }
  1113. }
  1114. static void hpsa_map_one(struct pci_dev *pdev,
  1115. struct CommandList *cp,
  1116. unsigned char *buf,
  1117. size_t buflen,
  1118. int data_direction)
  1119. {
  1120. u64 addr64;
  1121. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1122. cp->Header.SGList = 0;
  1123. cp->Header.SGTotal = 0;
  1124. return;
  1125. }
  1126. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1127. cp->SG[0].Addr.lower =
  1128. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1129. cp->SG[0].Addr.upper =
  1130. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1131. cp->SG[0].Len = buflen;
  1132. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1133. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1134. }
  1135. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1136. struct CommandList *c)
  1137. {
  1138. DECLARE_COMPLETION_ONSTACK(wait);
  1139. c->waiting = &wait;
  1140. enqueue_cmd_and_start_io(h, c);
  1141. wait_for_completion(&wait);
  1142. }
  1143. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1144. struct CommandList *c, int data_direction)
  1145. {
  1146. int retry_count = 0;
  1147. do {
  1148. memset(c->err_info, 0, sizeof(c->err_info));
  1149. hpsa_scsi_do_simple_cmd_core(h, c);
  1150. retry_count++;
  1151. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1152. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1153. }
  1154. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1155. {
  1156. struct ErrorInfo *ei;
  1157. struct device *d = &cp->h->pdev->dev;
  1158. ei = cp->err_info;
  1159. switch (ei->CommandStatus) {
  1160. case CMD_TARGET_STATUS:
  1161. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1162. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1163. ei->ScsiStatus);
  1164. if (ei->ScsiStatus == 0)
  1165. dev_warn(d, "SCSI status is abnormally zero. "
  1166. "(probably indicates selection timeout "
  1167. "reported incorrectly due to a known "
  1168. "firmware bug, circa July, 2001.)\n");
  1169. break;
  1170. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1171. dev_info(d, "UNDERRUN\n");
  1172. break;
  1173. case CMD_DATA_OVERRUN:
  1174. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1175. break;
  1176. case CMD_INVALID: {
  1177. /* controller unfortunately reports SCSI passthru's
  1178. * to non-existent targets as invalid commands.
  1179. */
  1180. dev_warn(d, "cp %p is reported invalid (probably means "
  1181. "target device no longer present)\n", cp);
  1182. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1183. print_cmd(cp); */
  1184. }
  1185. break;
  1186. case CMD_PROTOCOL_ERR:
  1187. dev_warn(d, "cp %p has protocol error \n", cp);
  1188. break;
  1189. case CMD_HARDWARE_ERR:
  1190. /* cmd->result = DID_ERROR << 16; */
  1191. dev_warn(d, "cp %p had hardware error\n", cp);
  1192. break;
  1193. case CMD_CONNECTION_LOST:
  1194. dev_warn(d, "cp %p had connection lost\n", cp);
  1195. break;
  1196. case CMD_ABORTED:
  1197. dev_warn(d, "cp %p was aborted\n", cp);
  1198. break;
  1199. case CMD_ABORT_FAILED:
  1200. dev_warn(d, "cp %p reports abort failed\n", cp);
  1201. break;
  1202. case CMD_UNSOLICITED_ABORT:
  1203. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1204. break;
  1205. case CMD_TIMEOUT:
  1206. dev_warn(d, "cp %p timed out\n", cp);
  1207. break;
  1208. case CMD_UNABORTABLE:
  1209. dev_warn(d, "Command unabortable\n");
  1210. break;
  1211. default:
  1212. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1213. ei->CommandStatus);
  1214. }
  1215. }
  1216. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1217. unsigned char page, unsigned char *buf,
  1218. unsigned char bufsize)
  1219. {
  1220. int rc = IO_OK;
  1221. struct CommandList *c;
  1222. struct ErrorInfo *ei;
  1223. c = cmd_special_alloc(h);
  1224. if (c == NULL) { /* trouble... */
  1225. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1226. return -ENOMEM;
  1227. }
  1228. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1229. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1230. ei = c->err_info;
  1231. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1232. hpsa_scsi_interpret_error(c);
  1233. rc = -1;
  1234. }
  1235. cmd_special_free(h, c);
  1236. return rc;
  1237. }
  1238. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1239. {
  1240. int rc = IO_OK;
  1241. struct CommandList *c;
  1242. struct ErrorInfo *ei;
  1243. c = cmd_special_alloc(h);
  1244. if (c == NULL) { /* trouble... */
  1245. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1246. return -ENOMEM;
  1247. }
  1248. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1249. hpsa_scsi_do_simple_cmd_core(h, c);
  1250. /* no unmap needed here because no data xfer. */
  1251. ei = c->err_info;
  1252. if (ei->CommandStatus != 0) {
  1253. hpsa_scsi_interpret_error(c);
  1254. rc = -1;
  1255. }
  1256. cmd_special_free(h, c);
  1257. return rc;
  1258. }
  1259. static void hpsa_get_raid_level(struct ctlr_info *h,
  1260. unsigned char *scsi3addr, unsigned char *raid_level)
  1261. {
  1262. int rc;
  1263. unsigned char *buf;
  1264. *raid_level = RAID_UNKNOWN;
  1265. buf = kzalloc(64, GFP_KERNEL);
  1266. if (!buf)
  1267. return;
  1268. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1269. if (rc == 0)
  1270. *raid_level = buf[8];
  1271. if (*raid_level > RAID_UNKNOWN)
  1272. *raid_level = RAID_UNKNOWN;
  1273. kfree(buf);
  1274. return;
  1275. }
  1276. /* Get the device id from inquiry page 0x83 */
  1277. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1278. unsigned char *device_id, int buflen)
  1279. {
  1280. int rc;
  1281. unsigned char *buf;
  1282. if (buflen > 16)
  1283. buflen = 16;
  1284. buf = kzalloc(64, GFP_KERNEL);
  1285. if (!buf)
  1286. return -1;
  1287. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1288. if (rc == 0)
  1289. memcpy(device_id, &buf[8], buflen);
  1290. kfree(buf);
  1291. return rc != 0;
  1292. }
  1293. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1294. struct ReportLUNdata *buf, int bufsize,
  1295. int extended_response)
  1296. {
  1297. int rc = IO_OK;
  1298. struct CommandList *c;
  1299. unsigned char scsi3addr[8];
  1300. struct ErrorInfo *ei;
  1301. c = cmd_special_alloc(h);
  1302. if (c == NULL) { /* trouble... */
  1303. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1304. return -1;
  1305. }
  1306. /* address the controller */
  1307. memset(scsi3addr, 0, sizeof(scsi3addr));
  1308. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1309. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1310. if (extended_response)
  1311. c->Request.CDB[1] = extended_response;
  1312. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1313. ei = c->err_info;
  1314. if (ei->CommandStatus != 0 &&
  1315. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1316. hpsa_scsi_interpret_error(c);
  1317. rc = -1;
  1318. }
  1319. cmd_special_free(h, c);
  1320. return rc;
  1321. }
  1322. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1323. struct ReportLUNdata *buf,
  1324. int bufsize, int extended_response)
  1325. {
  1326. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1327. }
  1328. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1329. struct ReportLUNdata *buf, int bufsize)
  1330. {
  1331. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1332. }
  1333. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1334. int bus, int target, int lun)
  1335. {
  1336. device->bus = bus;
  1337. device->target = target;
  1338. device->lun = lun;
  1339. }
  1340. static int hpsa_update_device_info(struct ctlr_info *h,
  1341. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1342. {
  1343. #define OBDR_TAPE_INQ_SIZE 49
  1344. unsigned char *inq_buff;
  1345. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1346. if (!inq_buff)
  1347. goto bail_out;
  1348. /* Do an inquiry to the device to see what it is. */
  1349. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1350. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1351. /* Inquiry failed (msg printed already) */
  1352. dev_err(&h->pdev->dev,
  1353. "hpsa_update_device_info: inquiry failed\n");
  1354. goto bail_out;
  1355. }
  1356. this_device->devtype = (inq_buff[0] & 0x1f);
  1357. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1358. memcpy(this_device->vendor, &inq_buff[8],
  1359. sizeof(this_device->vendor));
  1360. memcpy(this_device->model, &inq_buff[16],
  1361. sizeof(this_device->model));
  1362. memset(this_device->device_id, 0,
  1363. sizeof(this_device->device_id));
  1364. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1365. sizeof(this_device->device_id));
  1366. if (this_device->devtype == TYPE_DISK &&
  1367. is_logical_dev_addr_mode(scsi3addr))
  1368. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1369. else
  1370. this_device->raid_level = RAID_UNKNOWN;
  1371. kfree(inq_buff);
  1372. return 0;
  1373. bail_out:
  1374. kfree(inq_buff);
  1375. return 1;
  1376. }
  1377. static unsigned char *msa2xxx_model[] = {
  1378. "MSA2012",
  1379. "MSA2024",
  1380. "MSA2312",
  1381. "MSA2324",
  1382. NULL,
  1383. };
  1384. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1385. {
  1386. int i;
  1387. for (i = 0; msa2xxx_model[i]; i++)
  1388. if (strncmp(device->model, msa2xxx_model[i],
  1389. strlen(msa2xxx_model[i])) == 0)
  1390. return 1;
  1391. return 0;
  1392. }
  1393. /* Helper function to assign bus, target, lun mapping of devices.
  1394. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1395. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1396. * Logical drive target and lun are assigned at this time, but
  1397. * physical device lun and target assignment are deferred (assigned
  1398. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1399. */
  1400. static void figure_bus_target_lun(struct ctlr_info *h,
  1401. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1402. struct hpsa_scsi_dev_t *device)
  1403. {
  1404. u32 lunid;
  1405. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1406. /* logical device */
  1407. if (unlikely(is_scsi_rev_5(h))) {
  1408. /* p1210m, logical drives lun assignments
  1409. * match SCSI REPORT LUNS data.
  1410. */
  1411. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1412. *bus = 0;
  1413. *target = 0;
  1414. *lun = (lunid & 0x3fff) + 1;
  1415. } else {
  1416. /* not p1210m... */
  1417. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1418. if (is_msa2xxx(h, device)) {
  1419. /* msa2xxx way, put logicals on bus 1
  1420. * and match target/lun numbers box
  1421. * reports.
  1422. */
  1423. *bus = 1;
  1424. *target = (lunid >> 16) & 0x3fff;
  1425. *lun = lunid & 0x00ff;
  1426. } else {
  1427. /* Traditional smart array way. */
  1428. *bus = 0;
  1429. *lun = 0;
  1430. *target = lunid & 0x3fff;
  1431. }
  1432. }
  1433. } else {
  1434. /* physical device */
  1435. if (is_hba_lunid(lunaddrbytes))
  1436. if (unlikely(is_scsi_rev_5(h))) {
  1437. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1438. *target = 0;
  1439. *lun = 0;
  1440. return;
  1441. } else
  1442. *bus = 3; /* traditional smartarray */
  1443. else
  1444. *bus = 2; /* physical disk */
  1445. *target = -1;
  1446. *lun = -1; /* we will fill these in later. */
  1447. }
  1448. }
  1449. /*
  1450. * If there is no lun 0 on a target, linux won't find any devices.
  1451. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1452. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1453. * it for some reason. *tmpdevice is the target we're adding,
  1454. * this_device is a pointer into the current element of currentsd[]
  1455. * that we're building up in update_scsi_devices(), below.
  1456. * lunzerobits is a bitmap that tracks which targets already have a
  1457. * lun 0 assigned.
  1458. * Returns 1 if an enclosure was added, 0 if not.
  1459. */
  1460. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1461. struct hpsa_scsi_dev_t *tmpdevice,
  1462. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1463. int bus, int target, int lun, unsigned long lunzerobits[],
  1464. int *nmsa2xxx_enclosures)
  1465. {
  1466. unsigned char scsi3addr[8];
  1467. if (test_bit(target, lunzerobits))
  1468. return 0; /* There is already a lun 0 on this target. */
  1469. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1470. return 0; /* It's the logical targets that may lack lun 0. */
  1471. if (!is_msa2xxx(h, tmpdevice))
  1472. return 0; /* It's only the MSA2xxx that have this problem. */
  1473. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1474. return 0;
  1475. memset(scsi3addr, 0, 8);
  1476. scsi3addr[3] = target;
  1477. if (is_hba_lunid(scsi3addr))
  1478. return 0; /* Don't add the RAID controller here. */
  1479. if (is_scsi_rev_5(h))
  1480. return 0; /* p1210m doesn't need to do this. */
  1481. #define MAX_MSA2XXX_ENCLOSURES 32
  1482. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1483. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1484. "enclosures exceeded. Check your hardware "
  1485. "configuration.");
  1486. return 0;
  1487. }
  1488. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1489. return 0;
  1490. (*nmsa2xxx_enclosures)++;
  1491. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1492. set_bit(target, lunzerobits);
  1493. return 1;
  1494. }
  1495. /*
  1496. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1497. * logdev. The number of luns in physdev and logdev are returned in
  1498. * *nphysicals and *nlogicals, respectively.
  1499. * Returns 0 on success, -1 otherwise.
  1500. */
  1501. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1502. int reportlunsize,
  1503. struct ReportLUNdata *physdev, u32 *nphysicals,
  1504. struct ReportLUNdata *logdev, u32 *nlogicals)
  1505. {
  1506. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1507. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1508. return -1;
  1509. }
  1510. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1511. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1512. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1513. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1514. *nphysicals - HPSA_MAX_PHYS_LUN);
  1515. *nphysicals = HPSA_MAX_PHYS_LUN;
  1516. }
  1517. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1518. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1519. return -1;
  1520. }
  1521. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1522. /* Reject Logicals in excess of our max capability. */
  1523. if (*nlogicals > HPSA_MAX_LUN) {
  1524. dev_warn(&h->pdev->dev,
  1525. "maximum logical LUNs (%d) exceeded. "
  1526. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1527. *nlogicals - HPSA_MAX_LUN);
  1528. *nlogicals = HPSA_MAX_LUN;
  1529. }
  1530. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1531. dev_warn(&h->pdev->dev,
  1532. "maximum logical + physical LUNs (%d) exceeded. "
  1533. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1534. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1535. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1536. }
  1537. return 0;
  1538. }
  1539. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1540. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1541. struct ReportLUNdata *logdev_list)
  1542. {
  1543. /* Helper function, figure out where the LUN ID info is coming from
  1544. * given index i, lists of physical and logical devices, where in
  1545. * the list the raid controller is supposed to appear (first or last)
  1546. */
  1547. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1548. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1549. if (i == raid_ctlr_position)
  1550. return RAID_CTLR_LUNID;
  1551. if (i < logicals_start)
  1552. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1553. if (i < last_device)
  1554. return &logdev_list->LUN[i - nphysicals -
  1555. (raid_ctlr_position == 0)][0];
  1556. BUG();
  1557. return NULL;
  1558. }
  1559. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1560. {
  1561. /* the idea here is we could get notified
  1562. * that some devices have changed, so we do a report
  1563. * physical luns and report logical luns cmd, and adjust
  1564. * our list of devices accordingly.
  1565. *
  1566. * The scsi3addr's of devices won't change so long as the
  1567. * adapter is not reset. That means we can rescan and
  1568. * tell which devices we already know about, vs. new
  1569. * devices, vs. disappearing devices.
  1570. */
  1571. struct ReportLUNdata *physdev_list = NULL;
  1572. struct ReportLUNdata *logdev_list = NULL;
  1573. unsigned char *inq_buff = NULL;
  1574. u32 nphysicals = 0;
  1575. u32 nlogicals = 0;
  1576. u32 ndev_allocated = 0;
  1577. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1578. int ncurrent = 0;
  1579. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1580. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1581. int bus, target, lun;
  1582. int raid_ctlr_position;
  1583. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1584. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1585. GFP_KERNEL);
  1586. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1587. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1588. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1589. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1590. if (!currentsd || !physdev_list || !logdev_list ||
  1591. !inq_buff || !tmpdevice) {
  1592. dev_err(&h->pdev->dev, "out of memory\n");
  1593. goto out;
  1594. }
  1595. memset(lunzerobits, 0, sizeof(lunzerobits));
  1596. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1597. logdev_list, &nlogicals))
  1598. goto out;
  1599. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1600. * but each of them 4 times through different paths. The plus 1
  1601. * is for the RAID controller.
  1602. */
  1603. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1604. /* Allocate the per device structures */
  1605. for (i = 0; i < ndevs_to_allocate; i++) {
  1606. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1607. if (!currentsd[i]) {
  1608. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1609. __FILE__, __LINE__);
  1610. goto out;
  1611. }
  1612. ndev_allocated++;
  1613. }
  1614. if (unlikely(is_scsi_rev_5(h)))
  1615. raid_ctlr_position = 0;
  1616. else
  1617. raid_ctlr_position = nphysicals + nlogicals;
  1618. /* adjust our table of devices */
  1619. nmsa2xxx_enclosures = 0;
  1620. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1621. u8 *lunaddrbytes;
  1622. /* Figure out where the LUN ID info is coming from */
  1623. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1624. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1625. /* skip masked physical devices. */
  1626. if (lunaddrbytes[3] & 0xC0 &&
  1627. i < nphysicals + (raid_ctlr_position == 0))
  1628. continue;
  1629. /* Get device type, vendor, model, device id */
  1630. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1631. continue; /* skip it if we can't talk to it. */
  1632. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1633. tmpdevice);
  1634. this_device = currentsd[ncurrent];
  1635. /*
  1636. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1637. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1638. * is nonetheless an enclosure device there. We have to
  1639. * present that otherwise linux won't find anything if
  1640. * there is no lun 0.
  1641. */
  1642. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1643. lunaddrbytes, bus, target, lun, lunzerobits,
  1644. &nmsa2xxx_enclosures)) {
  1645. ncurrent++;
  1646. this_device = currentsd[ncurrent];
  1647. }
  1648. *this_device = *tmpdevice;
  1649. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1650. switch (this_device->devtype) {
  1651. case TYPE_ROM: {
  1652. /* We don't *really* support actual CD-ROM devices,
  1653. * just "One Button Disaster Recovery" tape drive
  1654. * which temporarily pretends to be a CD-ROM drive.
  1655. * So we check that the device is really an OBDR tape
  1656. * device by checking for "$DR-10" in bytes 43-48 of
  1657. * the inquiry data.
  1658. */
  1659. char obdr_sig[7];
  1660. #define OBDR_TAPE_SIG "$DR-10"
  1661. strncpy(obdr_sig, &inq_buff[43], 6);
  1662. obdr_sig[6] = '\0';
  1663. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1664. /* Not OBDR device, ignore it. */
  1665. break;
  1666. }
  1667. ncurrent++;
  1668. break;
  1669. case TYPE_DISK:
  1670. if (i < nphysicals)
  1671. break;
  1672. ncurrent++;
  1673. break;
  1674. case TYPE_TAPE:
  1675. case TYPE_MEDIUM_CHANGER:
  1676. ncurrent++;
  1677. break;
  1678. case TYPE_RAID:
  1679. /* Only present the Smartarray HBA as a RAID controller.
  1680. * If it's a RAID controller other than the HBA itself
  1681. * (an external RAID controller, MSA500 or similar)
  1682. * don't present it.
  1683. */
  1684. if (!is_hba_lunid(lunaddrbytes))
  1685. break;
  1686. ncurrent++;
  1687. break;
  1688. default:
  1689. break;
  1690. }
  1691. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1692. break;
  1693. }
  1694. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1695. out:
  1696. kfree(tmpdevice);
  1697. for (i = 0; i < ndev_allocated; i++)
  1698. kfree(currentsd[i]);
  1699. kfree(currentsd);
  1700. kfree(inq_buff);
  1701. kfree(physdev_list);
  1702. kfree(logdev_list);
  1703. }
  1704. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1705. * dma mapping and fills in the scatter gather entries of the
  1706. * hpsa command, cp.
  1707. */
  1708. static int hpsa_scatter_gather(struct ctlr_info *h,
  1709. struct CommandList *cp,
  1710. struct scsi_cmnd *cmd)
  1711. {
  1712. unsigned int len;
  1713. struct scatterlist *sg;
  1714. u64 addr64;
  1715. int use_sg, i, sg_index, chained;
  1716. struct SGDescriptor *curr_sg;
  1717. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1718. use_sg = scsi_dma_map(cmd);
  1719. if (use_sg < 0)
  1720. return use_sg;
  1721. if (!use_sg)
  1722. goto sglist_finished;
  1723. curr_sg = cp->SG;
  1724. chained = 0;
  1725. sg_index = 0;
  1726. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1727. if (i == h->max_cmd_sg_entries - 1 &&
  1728. use_sg > h->max_cmd_sg_entries) {
  1729. chained = 1;
  1730. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1731. sg_index = 0;
  1732. }
  1733. addr64 = (u64) sg_dma_address(sg);
  1734. len = sg_dma_len(sg);
  1735. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1736. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1737. curr_sg->Len = len;
  1738. curr_sg->Ext = 0; /* we are not chaining */
  1739. curr_sg++;
  1740. }
  1741. if (use_sg + chained > h->maxSG)
  1742. h->maxSG = use_sg + chained;
  1743. if (chained) {
  1744. cp->Header.SGList = h->max_cmd_sg_entries;
  1745. cp->Header.SGTotal = (u16) (use_sg + 1);
  1746. hpsa_map_sg_chain_block(h, cp);
  1747. return 0;
  1748. }
  1749. sglist_finished:
  1750. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1751. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1752. return 0;
  1753. }
  1754. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1755. void (*done)(struct scsi_cmnd *))
  1756. {
  1757. struct ctlr_info *h;
  1758. struct hpsa_scsi_dev_t *dev;
  1759. unsigned char scsi3addr[8];
  1760. struct CommandList *c;
  1761. unsigned long flags;
  1762. /* Get the ptr to our adapter structure out of cmd->host. */
  1763. h = sdev_to_hba(cmd->device);
  1764. dev = cmd->device->hostdata;
  1765. if (!dev) {
  1766. cmd->result = DID_NO_CONNECT << 16;
  1767. done(cmd);
  1768. return 0;
  1769. }
  1770. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1771. /* Need a lock as this is being allocated from the pool */
  1772. spin_lock_irqsave(&h->lock, flags);
  1773. c = cmd_alloc(h);
  1774. spin_unlock_irqrestore(&h->lock, flags);
  1775. if (c == NULL) { /* trouble... */
  1776. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1777. return SCSI_MLQUEUE_HOST_BUSY;
  1778. }
  1779. /* Fill in the command list header */
  1780. cmd->scsi_done = done; /* save this for use by completion code */
  1781. /* save c in case we have to abort it */
  1782. cmd->host_scribble = (unsigned char *) c;
  1783. c->cmd_type = CMD_SCSI;
  1784. c->scsi_cmd = cmd;
  1785. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1786. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1787. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1788. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1789. /* Fill in the request block... */
  1790. c->Request.Timeout = 0;
  1791. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1792. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1793. c->Request.CDBLen = cmd->cmd_len;
  1794. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1795. c->Request.Type.Type = TYPE_CMD;
  1796. c->Request.Type.Attribute = ATTR_SIMPLE;
  1797. switch (cmd->sc_data_direction) {
  1798. case DMA_TO_DEVICE:
  1799. c->Request.Type.Direction = XFER_WRITE;
  1800. break;
  1801. case DMA_FROM_DEVICE:
  1802. c->Request.Type.Direction = XFER_READ;
  1803. break;
  1804. case DMA_NONE:
  1805. c->Request.Type.Direction = XFER_NONE;
  1806. break;
  1807. case DMA_BIDIRECTIONAL:
  1808. /* This can happen if a buggy application does a scsi passthru
  1809. * and sets both inlen and outlen to non-zero. ( see
  1810. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1811. */
  1812. c->Request.Type.Direction = XFER_RSVD;
  1813. /* This is technically wrong, and hpsa controllers should
  1814. * reject it with CMD_INVALID, which is the most correct
  1815. * response, but non-fibre backends appear to let it
  1816. * slide by, and give the same results as if this field
  1817. * were set correctly. Either way is acceptable for
  1818. * our purposes here.
  1819. */
  1820. break;
  1821. default:
  1822. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1823. cmd->sc_data_direction);
  1824. BUG();
  1825. break;
  1826. }
  1827. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1828. cmd_free(h, c);
  1829. return SCSI_MLQUEUE_HOST_BUSY;
  1830. }
  1831. enqueue_cmd_and_start_io(h, c);
  1832. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1833. return 0;
  1834. }
  1835. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1836. static void hpsa_scan_start(struct Scsi_Host *sh)
  1837. {
  1838. struct ctlr_info *h = shost_to_hba(sh);
  1839. unsigned long flags;
  1840. /* wait until any scan already in progress is finished. */
  1841. while (1) {
  1842. spin_lock_irqsave(&h->scan_lock, flags);
  1843. if (h->scan_finished)
  1844. break;
  1845. spin_unlock_irqrestore(&h->scan_lock, flags);
  1846. wait_event(h->scan_wait_queue, h->scan_finished);
  1847. /* Note: We don't need to worry about a race between this
  1848. * thread and driver unload because the midlayer will
  1849. * have incremented the reference count, so unload won't
  1850. * happen if we're in here.
  1851. */
  1852. }
  1853. h->scan_finished = 0; /* mark scan as in progress */
  1854. spin_unlock_irqrestore(&h->scan_lock, flags);
  1855. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1856. spin_lock_irqsave(&h->scan_lock, flags);
  1857. h->scan_finished = 1; /* mark scan as finished. */
  1858. wake_up_all(&h->scan_wait_queue);
  1859. spin_unlock_irqrestore(&h->scan_lock, flags);
  1860. }
  1861. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1862. unsigned long elapsed_time)
  1863. {
  1864. struct ctlr_info *h = shost_to_hba(sh);
  1865. unsigned long flags;
  1866. int finished;
  1867. spin_lock_irqsave(&h->scan_lock, flags);
  1868. finished = h->scan_finished;
  1869. spin_unlock_irqrestore(&h->scan_lock, flags);
  1870. return finished;
  1871. }
  1872. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1873. int qdepth, int reason)
  1874. {
  1875. struct ctlr_info *h = sdev_to_hba(sdev);
  1876. if (reason != SCSI_QDEPTH_DEFAULT)
  1877. return -ENOTSUPP;
  1878. if (qdepth < 1)
  1879. qdepth = 1;
  1880. else
  1881. if (qdepth > h->nr_cmds)
  1882. qdepth = h->nr_cmds;
  1883. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1884. return sdev->queue_depth;
  1885. }
  1886. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1887. {
  1888. /* we are being forcibly unloaded, and may not refuse. */
  1889. scsi_remove_host(h->scsi_host);
  1890. scsi_host_put(h->scsi_host);
  1891. h->scsi_host = NULL;
  1892. }
  1893. static int hpsa_register_scsi(struct ctlr_info *h)
  1894. {
  1895. int rc;
  1896. rc = hpsa_scsi_detect(h);
  1897. if (rc != 0)
  1898. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1899. " hpsa_scsi_detect(), rc is %d\n", rc);
  1900. return rc;
  1901. }
  1902. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1903. unsigned char lunaddr[])
  1904. {
  1905. int rc = 0;
  1906. int count = 0;
  1907. int waittime = 1; /* seconds */
  1908. struct CommandList *c;
  1909. c = cmd_special_alloc(h);
  1910. if (!c) {
  1911. dev_warn(&h->pdev->dev, "out of memory in "
  1912. "wait_for_device_to_become_ready.\n");
  1913. return IO_ERROR;
  1914. }
  1915. /* Send test unit ready until device ready, or give up. */
  1916. while (count < HPSA_TUR_RETRY_LIMIT) {
  1917. /* Wait for a bit. do this first, because if we send
  1918. * the TUR right away, the reset will just abort it.
  1919. */
  1920. msleep(1000 * waittime);
  1921. count++;
  1922. /* Increase wait time with each try, up to a point. */
  1923. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1924. waittime = waittime * 2;
  1925. /* Send the Test Unit Ready */
  1926. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1927. hpsa_scsi_do_simple_cmd_core(h, c);
  1928. /* no unmap needed here because no data xfer. */
  1929. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1930. break;
  1931. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1932. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1933. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1934. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1935. break;
  1936. dev_warn(&h->pdev->dev, "waiting %d secs "
  1937. "for device to become ready.\n", waittime);
  1938. rc = 1; /* device not ready. */
  1939. }
  1940. if (rc)
  1941. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1942. else
  1943. dev_warn(&h->pdev->dev, "device is ready.\n");
  1944. cmd_special_free(h, c);
  1945. return rc;
  1946. }
  1947. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1948. * complaining. Doing a host- or bus-reset can't do anything good here.
  1949. */
  1950. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1951. {
  1952. int rc;
  1953. struct ctlr_info *h;
  1954. struct hpsa_scsi_dev_t *dev;
  1955. /* find the controller to which the command to be aborted was sent */
  1956. h = sdev_to_hba(scsicmd->device);
  1957. if (h == NULL) /* paranoia */
  1958. return FAILED;
  1959. dev = scsicmd->device->hostdata;
  1960. if (!dev) {
  1961. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1962. "device lookup failed.\n");
  1963. return FAILED;
  1964. }
  1965. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1966. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1967. /* send a reset to the SCSI LUN which the command was sent to */
  1968. rc = hpsa_send_reset(h, dev->scsi3addr);
  1969. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1970. return SUCCESS;
  1971. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1972. return FAILED;
  1973. }
  1974. /*
  1975. * For operations that cannot sleep, a command block is allocated at init,
  1976. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1977. * which ones are free or in use. Lock must be held when calling this.
  1978. * cmd_free() is the complement.
  1979. */
  1980. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1981. {
  1982. struct CommandList *c;
  1983. int i;
  1984. union u64bit temp64;
  1985. dma_addr_t cmd_dma_handle, err_dma_handle;
  1986. do {
  1987. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1988. if (i == h->nr_cmds)
  1989. return NULL;
  1990. } while (test_and_set_bit
  1991. (i & (BITS_PER_LONG - 1),
  1992. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1993. c = h->cmd_pool + i;
  1994. memset(c, 0, sizeof(*c));
  1995. cmd_dma_handle = h->cmd_pool_dhandle
  1996. + i * sizeof(*c);
  1997. c->err_info = h->errinfo_pool + i;
  1998. memset(c->err_info, 0, sizeof(*c->err_info));
  1999. err_dma_handle = h->errinfo_pool_dhandle
  2000. + i * sizeof(*c->err_info);
  2001. h->nr_allocs++;
  2002. c->cmdindex = i;
  2003. INIT_LIST_HEAD(&c->list);
  2004. c->busaddr = (u32) cmd_dma_handle;
  2005. temp64.val = (u64) err_dma_handle;
  2006. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2007. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2008. c->ErrDesc.Len = sizeof(*c->err_info);
  2009. c->h = h;
  2010. return c;
  2011. }
  2012. /* For operations that can wait for kmalloc to possibly sleep,
  2013. * this routine can be called. Lock need not be held to call
  2014. * cmd_special_alloc. cmd_special_free() is the complement.
  2015. */
  2016. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2017. {
  2018. struct CommandList *c;
  2019. union u64bit temp64;
  2020. dma_addr_t cmd_dma_handle, err_dma_handle;
  2021. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2022. if (c == NULL)
  2023. return NULL;
  2024. memset(c, 0, sizeof(*c));
  2025. c->cmdindex = -1;
  2026. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2027. &err_dma_handle);
  2028. if (c->err_info == NULL) {
  2029. pci_free_consistent(h->pdev,
  2030. sizeof(*c), c, cmd_dma_handle);
  2031. return NULL;
  2032. }
  2033. memset(c->err_info, 0, sizeof(*c->err_info));
  2034. INIT_LIST_HEAD(&c->list);
  2035. c->busaddr = (u32) cmd_dma_handle;
  2036. temp64.val = (u64) err_dma_handle;
  2037. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2038. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2039. c->ErrDesc.Len = sizeof(*c->err_info);
  2040. c->h = h;
  2041. return c;
  2042. }
  2043. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2044. {
  2045. int i;
  2046. i = c - h->cmd_pool;
  2047. clear_bit(i & (BITS_PER_LONG - 1),
  2048. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2049. h->nr_frees++;
  2050. }
  2051. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2052. {
  2053. union u64bit temp64;
  2054. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2055. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2056. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2057. c->err_info, (dma_addr_t) temp64.val);
  2058. pci_free_consistent(h->pdev, sizeof(*c),
  2059. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2060. }
  2061. #ifdef CONFIG_COMPAT
  2062. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2063. {
  2064. IOCTL32_Command_struct __user *arg32 =
  2065. (IOCTL32_Command_struct __user *) arg;
  2066. IOCTL_Command_struct arg64;
  2067. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2068. int err;
  2069. u32 cp;
  2070. memset(&arg64, 0, sizeof(arg64));
  2071. err = 0;
  2072. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2073. sizeof(arg64.LUN_info));
  2074. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2075. sizeof(arg64.Request));
  2076. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2077. sizeof(arg64.error_info));
  2078. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2079. err |= get_user(cp, &arg32->buf);
  2080. arg64.buf = compat_ptr(cp);
  2081. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2082. if (err)
  2083. return -EFAULT;
  2084. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2085. if (err)
  2086. return err;
  2087. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2088. sizeof(arg32->error_info));
  2089. if (err)
  2090. return -EFAULT;
  2091. return err;
  2092. }
  2093. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2094. int cmd, void *arg)
  2095. {
  2096. BIG_IOCTL32_Command_struct __user *arg32 =
  2097. (BIG_IOCTL32_Command_struct __user *) arg;
  2098. BIG_IOCTL_Command_struct arg64;
  2099. BIG_IOCTL_Command_struct __user *p =
  2100. compat_alloc_user_space(sizeof(arg64));
  2101. int err;
  2102. u32 cp;
  2103. memset(&arg64, 0, sizeof(arg64));
  2104. err = 0;
  2105. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2106. sizeof(arg64.LUN_info));
  2107. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2108. sizeof(arg64.Request));
  2109. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2110. sizeof(arg64.error_info));
  2111. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2112. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2113. err |= get_user(cp, &arg32->buf);
  2114. arg64.buf = compat_ptr(cp);
  2115. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2116. if (err)
  2117. return -EFAULT;
  2118. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2119. if (err)
  2120. return err;
  2121. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2122. sizeof(arg32->error_info));
  2123. if (err)
  2124. return -EFAULT;
  2125. return err;
  2126. }
  2127. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2128. {
  2129. switch (cmd) {
  2130. case CCISS_GETPCIINFO:
  2131. case CCISS_GETINTINFO:
  2132. case CCISS_SETINTINFO:
  2133. case CCISS_GETNODENAME:
  2134. case CCISS_SETNODENAME:
  2135. case CCISS_GETHEARTBEAT:
  2136. case CCISS_GETBUSTYPES:
  2137. case CCISS_GETFIRMVER:
  2138. case CCISS_GETDRIVVER:
  2139. case CCISS_REVALIDVOLS:
  2140. case CCISS_DEREGDISK:
  2141. case CCISS_REGNEWDISK:
  2142. case CCISS_REGNEWD:
  2143. case CCISS_RESCANDISK:
  2144. case CCISS_GETLUNINFO:
  2145. return hpsa_ioctl(dev, cmd, arg);
  2146. case CCISS_PASSTHRU32:
  2147. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2148. case CCISS_BIG_PASSTHRU32:
  2149. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2150. default:
  2151. return -ENOIOCTLCMD;
  2152. }
  2153. }
  2154. #endif
  2155. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2156. {
  2157. struct hpsa_pci_info pciinfo;
  2158. if (!argp)
  2159. return -EINVAL;
  2160. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2161. pciinfo.bus = h->pdev->bus->number;
  2162. pciinfo.dev_fn = h->pdev->devfn;
  2163. pciinfo.board_id = h->board_id;
  2164. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2165. return -EFAULT;
  2166. return 0;
  2167. }
  2168. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2169. {
  2170. DriverVer_type DriverVer;
  2171. unsigned char vmaj, vmin, vsubmin;
  2172. int rc;
  2173. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2174. &vmaj, &vmin, &vsubmin);
  2175. if (rc != 3) {
  2176. dev_info(&h->pdev->dev, "driver version string '%s' "
  2177. "unrecognized.", HPSA_DRIVER_VERSION);
  2178. vmaj = 0;
  2179. vmin = 0;
  2180. vsubmin = 0;
  2181. }
  2182. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2183. if (!argp)
  2184. return -EINVAL;
  2185. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2186. return -EFAULT;
  2187. return 0;
  2188. }
  2189. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2190. {
  2191. IOCTL_Command_struct iocommand;
  2192. struct CommandList *c;
  2193. char *buff = NULL;
  2194. union u64bit temp64;
  2195. if (!argp)
  2196. return -EINVAL;
  2197. if (!capable(CAP_SYS_RAWIO))
  2198. return -EPERM;
  2199. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2200. return -EFAULT;
  2201. if ((iocommand.buf_size < 1) &&
  2202. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2203. return -EINVAL;
  2204. }
  2205. if (iocommand.buf_size > 0) {
  2206. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2207. if (buff == NULL)
  2208. return -EFAULT;
  2209. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2210. /* Copy the data into the buffer we created */
  2211. if (copy_from_user(buff, iocommand.buf,
  2212. iocommand.buf_size)) {
  2213. kfree(buff);
  2214. return -EFAULT;
  2215. }
  2216. } else {
  2217. memset(buff, 0, iocommand.buf_size);
  2218. }
  2219. }
  2220. c = cmd_special_alloc(h);
  2221. if (c == NULL) {
  2222. kfree(buff);
  2223. return -ENOMEM;
  2224. }
  2225. /* Fill in the command type */
  2226. c->cmd_type = CMD_IOCTL_PEND;
  2227. /* Fill in Command Header */
  2228. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2229. if (iocommand.buf_size > 0) { /* buffer to fill */
  2230. c->Header.SGList = 1;
  2231. c->Header.SGTotal = 1;
  2232. } else { /* no buffers to fill */
  2233. c->Header.SGList = 0;
  2234. c->Header.SGTotal = 0;
  2235. }
  2236. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2237. /* use the kernel address the cmd block for tag */
  2238. c->Header.Tag.lower = c->busaddr;
  2239. /* Fill in Request block */
  2240. memcpy(&c->Request, &iocommand.Request,
  2241. sizeof(c->Request));
  2242. /* Fill in the scatter gather information */
  2243. if (iocommand.buf_size > 0) {
  2244. temp64.val = pci_map_single(h->pdev, buff,
  2245. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2246. c->SG[0].Addr.lower = temp64.val32.lower;
  2247. c->SG[0].Addr.upper = temp64.val32.upper;
  2248. c->SG[0].Len = iocommand.buf_size;
  2249. c->SG[0].Ext = 0; /* we are not chaining*/
  2250. }
  2251. hpsa_scsi_do_simple_cmd_core(h, c);
  2252. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2253. check_ioctl_unit_attention(h, c);
  2254. /* Copy the error information out */
  2255. memcpy(&iocommand.error_info, c->err_info,
  2256. sizeof(iocommand.error_info));
  2257. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2258. kfree(buff);
  2259. cmd_special_free(h, c);
  2260. return -EFAULT;
  2261. }
  2262. if (iocommand.Request.Type.Direction == XFER_READ &&
  2263. iocommand.buf_size > 0) {
  2264. /* Copy the data out of the buffer we created */
  2265. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2266. kfree(buff);
  2267. cmd_special_free(h, c);
  2268. return -EFAULT;
  2269. }
  2270. }
  2271. kfree(buff);
  2272. cmd_special_free(h, c);
  2273. return 0;
  2274. }
  2275. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2276. {
  2277. BIG_IOCTL_Command_struct *ioc;
  2278. struct CommandList *c;
  2279. unsigned char **buff = NULL;
  2280. int *buff_size = NULL;
  2281. union u64bit temp64;
  2282. BYTE sg_used = 0;
  2283. int status = 0;
  2284. int i;
  2285. u32 left;
  2286. u32 sz;
  2287. BYTE __user *data_ptr;
  2288. if (!argp)
  2289. return -EINVAL;
  2290. if (!capable(CAP_SYS_RAWIO))
  2291. return -EPERM;
  2292. ioc = (BIG_IOCTL_Command_struct *)
  2293. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2294. if (!ioc) {
  2295. status = -ENOMEM;
  2296. goto cleanup1;
  2297. }
  2298. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2299. status = -EFAULT;
  2300. goto cleanup1;
  2301. }
  2302. if ((ioc->buf_size < 1) &&
  2303. (ioc->Request.Type.Direction != XFER_NONE)) {
  2304. status = -EINVAL;
  2305. goto cleanup1;
  2306. }
  2307. /* Check kmalloc limits using all SGs */
  2308. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2309. status = -EINVAL;
  2310. goto cleanup1;
  2311. }
  2312. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2313. status = -EINVAL;
  2314. goto cleanup1;
  2315. }
  2316. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2317. if (!buff) {
  2318. status = -ENOMEM;
  2319. goto cleanup1;
  2320. }
  2321. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2322. if (!buff_size) {
  2323. status = -ENOMEM;
  2324. goto cleanup1;
  2325. }
  2326. left = ioc->buf_size;
  2327. data_ptr = ioc->buf;
  2328. while (left) {
  2329. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2330. buff_size[sg_used] = sz;
  2331. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2332. if (buff[sg_used] == NULL) {
  2333. status = -ENOMEM;
  2334. goto cleanup1;
  2335. }
  2336. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2337. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2338. status = -ENOMEM;
  2339. goto cleanup1;
  2340. }
  2341. } else
  2342. memset(buff[sg_used], 0, sz);
  2343. left -= sz;
  2344. data_ptr += sz;
  2345. sg_used++;
  2346. }
  2347. c = cmd_special_alloc(h);
  2348. if (c == NULL) {
  2349. status = -ENOMEM;
  2350. goto cleanup1;
  2351. }
  2352. c->cmd_type = CMD_IOCTL_PEND;
  2353. c->Header.ReplyQueue = 0;
  2354. c->Header.SGList = c->Header.SGTotal = sg_used;
  2355. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2356. c->Header.Tag.lower = c->busaddr;
  2357. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2358. if (ioc->buf_size > 0) {
  2359. int i;
  2360. for (i = 0; i < sg_used; i++) {
  2361. temp64.val = pci_map_single(h->pdev, buff[i],
  2362. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2363. c->SG[i].Addr.lower = temp64.val32.lower;
  2364. c->SG[i].Addr.upper = temp64.val32.upper;
  2365. c->SG[i].Len = buff_size[i];
  2366. /* we are not chaining */
  2367. c->SG[i].Ext = 0;
  2368. }
  2369. }
  2370. hpsa_scsi_do_simple_cmd_core(h, c);
  2371. if (sg_used)
  2372. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2373. check_ioctl_unit_attention(h, c);
  2374. /* Copy the error information out */
  2375. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2376. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2377. cmd_special_free(h, c);
  2378. status = -EFAULT;
  2379. goto cleanup1;
  2380. }
  2381. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2382. /* Copy the data out of the buffer we created */
  2383. BYTE __user *ptr = ioc->buf;
  2384. for (i = 0; i < sg_used; i++) {
  2385. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2386. cmd_special_free(h, c);
  2387. status = -EFAULT;
  2388. goto cleanup1;
  2389. }
  2390. ptr += buff_size[i];
  2391. }
  2392. }
  2393. cmd_special_free(h, c);
  2394. status = 0;
  2395. cleanup1:
  2396. if (buff) {
  2397. for (i = 0; i < sg_used; i++)
  2398. kfree(buff[i]);
  2399. kfree(buff);
  2400. }
  2401. kfree(buff_size);
  2402. kfree(ioc);
  2403. return status;
  2404. }
  2405. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2406. struct CommandList *c)
  2407. {
  2408. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2409. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2410. (void) check_for_unit_attention(h, c);
  2411. }
  2412. /*
  2413. * ioctl
  2414. */
  2415. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2416. {
  2417. struct ctlr_info *h;
  2418. void __user *argp = (void __user *)arg;
  2419. h = sdev_to_hba(dev);
  2420. switch (cmd) {
  2421. case CCISS_DEREGDISK:
  2422. case CCISS_REGNEWDISK:
  2423. case CCISS_REGNEWD:
  2424. hpsa_scan_start(h->scsi_host);
  2425. return 0;
  2426. case CCISS_GETPCIINFO:
  2427. return hpsa_getpciinfo_ioctl(h, argp);
  2428. case CCISS_GETDRIVVER:
  2429. return hpsa_getdrivver_ioctl(h, argp);
  2430. case CCISS_PASSTHRU:
  2431. return hpsa_passthru_ioctl(h, argp);
  2432. case CCISS_BIG_PASSTHRU:
  2433. return hpsa_big_passthru_ioctl(h, argp);
  2434. default:
  2435. return -ENOTTY;
  2436. }
  2437. }
  2438. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2439. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2440. int cmd_type)
  2441. {
  2442. int pci_dir = XFER_NONE;
  2443. c->cmd_type = CMD_IOCTL_PEND;
  2444. c->Header.ReplyQueue = 0;
  2445. if (buff != NULL && size > 0) {
  2446. c->Header.SGList = 1;
  2447. c->Header.SGTotal = 1;
  2448. } else {
  2449. c->Header.SGList = 0;
  2450. c->Header.SGTotal = 0;
  2451. }
  2452. c->Header.Tag.lower = c->busaddr;
  2453. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2454. c->Request.Type.Type = cmd_type;
  2455. if (cmd_type == TYPE_CMD) {
  2456. switch (cmd) {
  2457. case HPSA_INQUIRY:
  2458. /* are we trying to read a vital product page */
  2459. if (page_code != 0) {
  2460. c->Request.CDB[1] = 0x01;
  2461. c->Request.CDB[2] = page_code;
  2462. }
  2463. c->Request.CDBLen = 6;
  2464. c->Request.Type.Attribute = ATTR_SIMPLE;
  2465. c->Request.Type.Direction = XFER_READ;
  2466. c->Request.Timeout = 0;
  2467. c->Request.CDB[0] = HPSA_INQUIRY;
  2468. c->Request.CDB[4] = size & 0xFF;
  2469. break;
  2470. case HPSA_REPORT_LOG:
  2471. case HPSA_REPORT_PHYS:
  2472. /* Talking to controller so It's a physical command
  2473. mode = 00 target = 0. Nothing to write.
  2474. */
  2475. c->Request.CDBLen = 12;
  2476. c->Request.Type.Attribute = ATTR_SIMPLE;
  2477. c->Request.Type.Direction = XFER_READ;
  2478. c->Request.Timeout = 0;
  2479. c->Request.CDB[0] = cmd;
  2480. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2481. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2482. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2483. c->Request.CDB[9] = size & 0xFF;
  2484. break;
  2485. case HPSA_CACHE_FLUSH:
  2486. c->Request.CDBLen = 12;
  2487. c->Request.Type.Attribute = ATTR_SIMPLE;
  2488. c->Request.Type.Direction = XFER_WRITE;
  2489. c->Request.Timeout = 0;
  2490. c->Request.CDB[0] = BMIC_WRITE;
  2491. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2492. break;
  2493. case TEST_UNIT_READY:
  2494. c->Request.CDBLen = 6;
  2495. c->Request.Type.Attribute = ATTR_SIMPLE;
  2496. c->Request.Type.Direction = XFER_NONE;
  2497. c->Request.Timeout = 0;
  2498. break;
  2499. default:
  2500. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2501. BUG();
  2502. return;
  2503. }
  2504. } else if (cmd_type == TYPE_MSG) {
  2505. switch (cmd) {
  2506. case HPSA_DEVICE_RESET_MSG:
  2507. c->Request.CDBLen = 16;
  2508. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2509. c->Request.Type.Attribute = ATTR_SIMPLE;
  2510. c->Request.Type.Direction = XFER_NONE;
  2511. c->Request.Timeout = 0; /* Don't time out */
  2512. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2513. c->Request.CDB[1] = 0x03; /* Reset target above */
  2514. /* If bytes 4-7 are zero, it means reset the */
  2515. /* LunID device */
  2516. c->Request.CDB[4] = 0x00;
  2517. c->Request.CDB[5] = 0x00;
  2518. c->Request.CDB[6] = 0x00;
  2519. c->Request.CDB[7] = 0x00;
  2520. break;
  2521. default:
  2522. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2523. cmd);
  2524. BUG();
  2525. }
  2526. } else {
  2527. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2528. BUG();
  2529. }
  2530. switch (c->Request.Type.Direction) {
  2531. case XFER_READ:
  2532. pci_dir = PCI_DMA_FROMDEVICE;
  2533. break;
  2534. case XFER_WRITE:
  2535. pci_dir = PCI_DMA_TODEVICE;
  2536. break;
  2537. case XFER_NONE:
  2538. pci_dir = PCI_DMA_NONE;
  2539. break;
  2540. default:
  2541. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2542. }
  2543. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2544. return;
  2545. }
  2546. /*
  2547. * Map (physical) PCI mem into (virtual) kernel space
  2548. */
  2549. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2550. {
  2551. ulong page_base = ((ulong) base) & PAGE_MASK;
  2552. ulong page_offs = ((ulong) base) - page_base;
  2553. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2554. return page_remapped ? (page_remapped + page_offs) : NULL;
  2555. }
  2556. /* Takes cmds off the submission queue and sends them to the hardware,
  2557. * then puts them on the queue of cmds waiting for completion.
  2558. */
  2559. static void start_io(struct ctlr_info *h)
  2560. {
  2561. struct CommandList *c;
  2562. while (!list_empty(&h->reqQ)) {
  2563. c = list_entry(h->reqQ.next, struct CommandList, list);
  2564. /* can't do anything if fifo is full */
  2565. if ((h->access.fifo_full(h))) {
  2566. dev_warn(&h->pdev->dev, "fifo full\n");
  2567. break;
  2568. }
  2569. /* Get the first entry from the Request Q */
  2570. removeQ(c);
  2571. h->Qdepth--;
  2572. /* Tell the controller execute command */
  2573. h->access.submit_command(h, c);
  2574. /* Put job onto the completed Q */
  2575. addQ(&h->cmpQ, c);
  2576. }
  2577. }
  2578. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2579. {
  2580. return h->access.command_completed(h);
  2581. }
  2582. static inline bool interrupt_pending(struct ctlr_info *h)
  2583. {
  2584. return h->access.intr_pending(h);
  2585. }
  2586. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2587. {
  2588. return (h->access.intr_pending(h) == 0) ||
  2589. (h->interrupts_enabled == 0);
  2590. }
  2591. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2592. u32 raw_tag)
  2593. {
  2594. if (unlikely(tag_index >= h->nr_cmds)) {
  2595. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2596. return 1;
  2597. }
  2598. return 0;
  2599. }
  2600. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2601. {
  2602. removeQ(c);
  2603. if (likely(c->cmd_type == CMD_SCSI))
  2604. complete_scsi_command(c, 0, raw_tag);
  2605. else if (c->cmd_type == CMD_IOCTL_PEND)
  2606. complete(c->waiting);
  2607. }
  2608. static inline u32 hpsa_tag_contains_index(u32 tag)
  2609. {
  2610. return tag & DIRECT_LOOKUP_BIT;
  2611. }
  2612. static inline u32 hpsa_tag_to_index(u32 tag)
  2613. {
  2614. return tag >> DIRECT_LOOKUP_SHIFT;
  2615. }
  2616. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2617. {
  2618. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2619. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2620. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2621. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2622. return tag & ~HPSA_PERF_ERROR_BITS;
  2623. }
  2624. /* process completion of an indexed ("direct lookup") command */
  2625. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2626. u32 raw_tag)
  2627. {
  2628. u32 tag_index;
  2629. struct CommandList *c;
  2630. tag_index = hpsa_tag_to_index(raw_tag);
  2631. if (bad_tag(h, tag_index, raw_tag))
  2632. return next_command(h);
  2633. c = h->cmd_pool + tag_index;
  2634. finish_cmd(c, raw_tag);
  2635. return next_command(h);
  2636. }
  2637. /* process completion of a non-indexed command */
  2638. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2639. u32 raw_tag)
  2640. {
  2641. u32 tag;
  2642. struct CommandList *c = NULL;
  2643. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2644. list_for_each_entry(c, &h->cmpQ, list) {
  2645. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2646. finish_cmd(c, raw_tag);
  2647. return next_command(h);
  2648. }
  2649. }
  2650. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2651. return next_command(h);
  2652. }
  2653. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2654. {
  2655. struct ctlr_info *h = dev_id;
  2656. unsigned long flags;
  2657. u32 raw_tag;
  2658. if (interrupt_not_for_us(h))
  2659. return IRQ_NONE;
  2660. spin_lock_irqsave(&h->lock, flags);
  2661. while (interrupt_pending(h)) {
  2662. raw_tag = get_next_completion(h);
  2663. while (raw_tag != FIFO_EMPTY) {
  2664. if (hpsa_tag_contains_index(raw_tag))
  2665. raw_tag = process_indexed_cmd(h, raw_tag);
  2666. else
  2667. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2668. }
  2669. }
  2670. spin_unlock_irqrestore(&h->lock, flags);
  2671. return IRQ_HANDLED;
  2672. }
  2673. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2674. {
  2675. struct ctlr_info *h = dev_id;
  2676. unsigned long flags;
  2677. u32 raw_tag;
  2678. spin_lock_irqsave(&h->lock, flags);
  2679. raw_tag = get_next_completion(h);
  2680. while (raw_tag != FIFO_EMPTY) {
  2681. if (hpsa_tag_contains_index(raw_tag))
  2682. raw_tag = process_indexed_cmd(h, raw_tag);
  2683. else
  2684. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2685. }
  2686. spin_unlock_irqrestore(&h->lock, flags);
  2687. return IRQ_HANDLED;
  2688. }
  2689. /* Send a message CDB to the firmware. Careful, this only works
  2690. * in simple mode, not performant mode due to the tag lookup.
  2691. * We only ever use this immediately after a controller reset.
  2692. */
  2693. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2694. unsigned char type)
  2695. {
  2696. struct Command {
  2697. struct CommandListHeader CommandHeader;
  2698. struct RequestBlock Request;
  2699. struct ErrDescriptor ErrorDescriptor;
  2700. };
  2701. struct Command *cmd;
  2702. static const size_t cmd_sz = sizeof(*cmd) +
  2703. sizeof(cmd->ErrorDescriptor);
  2704. dma_addr_t paddr64;
  2705. uint32_t paddr32, tag;
  2706. void __iomem *vaddr;
  2707. int i, err;
  2708. vaddr = pci_ioremap_bar(pdev, 0);
  2709. if (vaddr == NULL)
  2710. return -ENOMEM;
  2711. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2712. * CCISS commands, so they must be allocated from the lower 4GiB of
  2713. * memory.
  2714. */
  2715. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2716. if (err) {
  2717. iounmap(vaddr);
  2718. return -ENOMEM;
  2719. }
  2720. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2721. if (cmd == NULL) {
  2722. iounmap(vaddr);
  2723. return -ENOMEM;
  2724. }
  2725. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2726. * although there's no guarantee, we assume that the address is at
  2727. * least 4-byte aligned (most likely, it's page-aligned).
  2728. */
  2729. paddr32 = paddr64;
  2730. cmd->CommandHeader.ReplyQueue = 0;
  2731. cmd->CommandHeader.SGList = 0;
  2732. cmd->CommandHeader.SGTotal = 0;
  2733. cmd->CommandHeader.Tag.lower = paddr32;
  2734. cmd->CommandHeader.Tag.upper = 0;
  2735. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2736. cmd->Request.CDBLen = 16;
  2737. cmd->Request.Type.Type = TYPE_MSG;
  2738. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2739. cmd->Request.Type.Direction = XFER_NONE;
  2740. cmd->Request.Timeout = 0; /* Don't time out */
  2741. cmd->Request.CDB[0] = opcode;
  2742. cmd->Request.CDB[1] = type;
  2743. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2744. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2745. cmd->ErrorDescriptor.Addr.upper = 0;
  2746. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2747. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2748. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2749. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2750. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2751. break;
  2752. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2753. }
  2754. iounmap(vaddr);
  2755. /* we leak the DMA buffer here ... no choice since the controller could
  2756. * still complete the command.
  2757. */
  2758. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2759. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2760. opcode, type);
  2761. return -ETIMEDOUT;
  2762. }
  2763. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2764. if (tag & HPSA_ERROR_BIT) {
  2765. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2766. opcode, type);
  2767. return -EIO;
  2768. }
  2769. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2770. opcode, type);
  2771. return 0;
  2772. }
  2773. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2774. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2775. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2776. void * __iomem vaddr, bool use_doorbell)
  2777. {
  2778. u16 pmcsr;
  2779. int pos;
  2780. if (use_doorbell) {
  2781. /* For everything after the P600, the PCI power state method
  2782. * of resetting the controller doesn't work, so we have this
  2783. * other way using the doorbell register.
  2784. */
  2785. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2786. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2787. msleep(1000);
  2788. } else { /* Try to do it the PCI power state way */
  2789. /* Quoting from the Open CISS Specification: "The Power
  2790. * Management Control/Status Register (CSR) controls the power
  2791. * state of the device. The normal operating state is D0,
  2792. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2793. * the controller, place the interface device in D3 then to D0,
  2794. * this causes a secondary PCI reset which will reset the
  2795. * controller." */
  2796. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2797. if (pos == 0) {
  2798. dev_err(&pdev->dev,
  2799. "hpsa_reset_controller: "
  2800. "PCI PM not supported\n");
  2801. return -ENODEV;
  2802. }
  2803. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2804. /* enter the D3hot power management state */
  2805. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2806. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2807. pmcsr |= PCI_D3hot;
  2808. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2809. msleep(500);
  2810. /* enter the D0 power management state */
  2811. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2812. pmcsr |= PCI_D0;
  2813. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2814. msleep(500);
  2815. }
  2816. return 0;
  2817. }
  2818. /* This does a hard reset of the controller using PCI power management
  2819. * states or the using the doorbell register.
  2820. */
  2821. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2822. {
  2823. u64 cfg_offset;
  2824. u32 cfg_base_addr;
  2825. u64 cfg_base_addr_index;
  2826. void __iomem *vaddr;
  2827. unsigned long paddr;
  2828. u32 misc_fw_support, active_transport;
  2829. int rc;
  2830. struct CfgTable __iomem *cfgtable;
  2831. bool use_doorbell;
  2832. u32 board_id;
  2833. u16 command_register;
  2834. /* For controllers as old as the P600, this is very nearly
  2835. * the same thing as
  2836. *
  2837. * pci_save_state(pci_dev);
  2838. * pci_set_power_state(pci_dev, PCI_D3hot);
  2839. * pci_set_power_state(pci_dev, PCI_D0);
  2840. * pci_restore_state(pci_dev);
  2841. *
  2842. * For controllers newer than the P600, the pci power state
  2843. * method of resetting doesn't work so we have another way
  2844. * using the doorbell register.
  2845. */
  2846. /* Exclude 640x boards. These are two pci devices in one slot
  2847. * which share a battery backed cache module. One controls the
  2848. * cache, the other accesses the cache through the one that controls
  2849. * it. If we reset the one controlling the cache, the other will
  2850. * likely not be happy. Just forbid resetting this conjoined mess.
  2851. * The 640x isn't really supported by hpsa anyway.
  2852. */
  2853. rc = hpsa_lookup_board_id(pdev, &board_id);
  2854. if (rc < 0) {
  2855. dev_warn(&pdev->dev, "Not resetting device.\n");
  2856. return -ENODEV;
  2857. }
  2858. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2859. return -ENOTSUPP;
  2860. /* Save the PCI command register */
  2861. pci_read_config_word(pdev, 4, &command_register);
  2862. /* Turn the board off. This is so that later pci_restore_state()
  2863. * won't turn the board on before the rest of config space is ready.
  2864. */
  2865. pci_disable_device(pdev);
  2866. pci_save_state(pdev);
  2867. /* find the first memory BAR, so we can find the cfg table */
  2868. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2869. if (rc)
  2870. return rc;
  2871. vaddr = remap_pci_mem(paddr, 0x250);
  2872. if (!vaddr)
  2873. return -ENOMEM;
  2874. /* find cfgtable in order to check if reset via doorbell is supported */
  2875. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2876. &cfg_base_addr_index, &cfg_offset);
  2877. if (rc)
  2878. goto unmap_vaddr;
  2879. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2880. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2881. if (!cfgtable) {
  2882. rc = -ENOMEM;
  2883. goto unmap_vaddr;
  2884. }
  2885. /* If reset via doorbell register is supported, use that. */
  2886. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2887. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2888. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2889. if (rc)
  2890. goto unmap_cfgtable;
  2891. pci_restore_state(pdev);
  2892. rc = pci_enable_device(pdev);
  2893. if (rc) {
  2894. dev_warn(&pdev->dev, "failed to enable device.\n");
  2895. goto unmap_cfgtable;
  2896. }
  2897. pci_write_config_word(pdev, 4, command_register);
  2898. /* Some devices (notably the HP Smart Array 5i Controller)
  2899. need a little pause here */
  2900. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2901. /* Wait for board to become not ready, then ready. */
  2902. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  2903. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  2904. if (rc)
  2905. dev_warn(&pdev->dev,
  2906. "failed waiting for board to become not ready\n");
  2907. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  2908. if (rc) {
  2909. dev_warn(&pdev->dev,
  2910. "failed waiting for board to become ready\n");
  2911. goto unmap_cfgtable;
  2912. }
  2913. dev_info(&pdev->dev, "board ready.\n");
  2914. /* Controller should be in simple mode at this point. If it's not,
  2915. * It means we're on one of those controllers which doesn't support
  2916. * the doorbell reset method and on which the PCI power management reset
  2917. * method doesn't work (P800, for example.)
  2918. * In those cases, don't try to proceed, as it generally doesn't work.
  2919. */
  2920. active_transport = readl(&cfgtable->TransportActive);
  2921. if (active_transport & PERFORMANT_MODE) {
  2922. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2923. " Ignoring controller.\n");
  2924. rc = -ENODEV;
  2925. }
  2926. unmap_cfgtable:
  2927. iounmap(cfgtable);
  2928. unmap_vaddr:
  2929. iounmap(vaddr);
  2930. return rc;
  2931. }
  2932. /*
  2933. * We cannot read the structure directly, for portability we must use
  2934. * the io functions.
  2935. * This is for debug only.
  2936. */
  2937. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2938. {
  2939. #ifdef HPSA_DEBUG
  2940. int i;
  2941. char temp_name[17];
  2942. dev_info(dev, "Controller Configuration information\n");
  2943. dev_info(dev, "------------------------------------\n");
  2944. for (i = 0; i < 4; i++)
  2945. temp_name[i] = readb(&(tb->Signature[i]));
  2946. temp_name[4] = '\0';
  2947. dev_info(dev, " Signature = %s\n", temp_name);
  2948. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2949. dev_info(dev, " Transport methods supported = 0x%x\n",
  2950. readl(&(tb->TransportSupport)));
  2951. dev_info(dev, " Transport methods active = 0x%x\n",
  2952. readl(&(tb->TransportActive)));
  2953. dev_info(dev, " Requested transport Method = 0x%x\n",
  2954. readl(&(tb->HostWrite.TransportRequest)));
  2955. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2956. readl(&(tb->HostWrite.CoalIntDelay)));
  2957. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2958. readl(&(tb->HostWrite.CoalIntCount)));
  2959. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2960. readl(&(tb->CmdsOutMax)));
  2961. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2962. for (i = 0; i < 16; i++)
  2963. temp_name[i] = readb(&(tb->ServerName[i]));
  2964. temp_name[16] = '\0';
  2965. dev_info(dev, " Server Name = %s\n", temp_name);
  2966. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2967. readl(&(tb->HeartBeat)));
  2968. #endif /* HPSA_DEBUG */
  2969. }
  2970. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2971. {
  2972. int i, offset, mem_type, bar_type;
  2973. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2974. return 0;
  2975. offset = 0;
  2976. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2977. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2978. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2979. offset += 4;
  2980. else {
  2981. mem_type = pci_resource_flags(pdev, i) &
  2982. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2983. switch (mem_type) {
  2984. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2985. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2986. offset += 4; /* 32 bit */
  2987. break;
  2988. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2989. offset += 8;
  2990. break;
  2991. default: /* reserved in PCI 2.2 */
  2992. dev_warn(&pdev->dev,
  2993. "base address is invalid\n");
  2994. return -1;
  2995. break;
  2996. }
  2997. }
  2998. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2999. return i + 1;
  3000. }
  3001. return -1;
  3002. }
  3003. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3004. * controllers that are capable. If not, we use IO-APIC mode.
  3005. */
  3006. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3007. {
  3008. #ifdef CONFIG_PCI_MSI
  3009. int err;
  3010. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3011. {0, 2}, {0, 3}
  3012. };
  3013. /* Some boards advertise MSI but don't really support it */
  3014. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3015. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3016. goto default_int_mode;
  3017. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3018. dev_info(&h->pdev->dev, "MSIX\n");
  3019. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3020. if (!err) {
  3021. h->intr[0] = hpsa_msix_entries[0].vector;
  3022. h->intr[1] = hpsa_msix_entries[1].vector;
  3023. h->intr[2] = hpsa_msix_entries[2].vector;
  3024. h->intr[3] = hpsa_msix_entries[3].vector;
  3025. h->msix_vector = 1;
  3026. return;
  3027. }
  3028. if (err > 0) {
  3029. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3030. "available\n", err);
  3031. goto default_int_mode;
  3032. } else {
  3033. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3034. err);
  3035. goto default_int_mode;
  3036. }
  3037. }
  3038. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3039. dev_info(&h->pdev->dev, "MSI\n");
  3040. if (!pci_enable_msi(h->pdev))
  3041. h->msi_vector = 1;
  3042. else
  3043. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3044. }
  3045. default_int_mode:
  3046. #endif /* CONFIG_PCI_MSI */
  3047. /* if we get here we're going to use the default interrupt mode */
  3048. h->intr[h->intr_mode] = h->pdev->irq;
  3049. }
  3050. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3051. {
  3052. int i;
  3053. u32 subsystem_vendor_id, subsystem_device_id;
  3054. subsystem_vendor_id = pdev->subsystem_vendor;
  3055. subsystem_device_id = pdev->subsystem_device;
  3056. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3057. subsystem_vendor_id;
  3058. for (i = 0; i < ARRAY_SIZE(products); i++)
  3059. if (*board_id == products[i].board_id)
  3060. return i;
  3061. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3062. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3063. !hpsa_allow_any) {
  3064. dev_warn(&pdev->dev, "unrecognized board ID: "
  3065. "0x%08x, ignoring.\n", *board_id);
  3066. return -ENODEV;
  3067. }
  3068. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3069. }
  3070. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3071. {
  3072. u16 command;
  3073. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3074. return ((command & PCI_COMMAND_MEMORY) == 0);
  3075. }
  3076. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3077. unsigned long *memory_bar)
  3078. {
  3079. int i;
  3080. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3081. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3082. /* addressing mode bits already removed */
  3083. *memory_bar = pci_resource_start(pdev, i);
  3084. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3085. *memory_bar);
  3086. return 0;
  3087. }
  3088. dev_warn(&pdev->dev, "no memory BAR found\n");
  3089. return -ENODEV;
  3090. }
  3091. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3092. void __iomem *vaddr, int wait_for_ready)
  3093. {
  3094. int i, iterations;
  3095. u32 scratchpad;
  3096. if (wait_for_ready)
  3097. iterations = HPSA_BOARD_READY_ITERATIONS;
  3098. else
  3099. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3100. for (i = 0; i < iterations; i++) {
  3101. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3102. if (wait_for_ready) {
  3103. if (scratchpad == HPSA_FIRMWARE_READY)
  3104. return 0;
  3105. } else {
  3106. if (scratchpad != HPSA_FIRMWARE_READY)
  3107. return 0;
  3108. }
  3109. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3110. }
  3111. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3112. return -ENODEV;
  3113. }
  3114. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3115. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3116. u64 *cfg_offset)
  3117. {
  3118. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3119. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3120. *cfg_base_addr &= (u32) 0x0000ffff;
  3121. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3122. if (*cfg_base_addr_index == -1) {
  3123. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3124. return -ENODEV;
  3125. }
  3126. return 0;
  3127. }
  3128. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3129. {
  3130. u64 cfg_offset;
  3131. u32 cfg_base_addr;
  3132. u64 cfg_base_addr_index;
  3133. u32 trans_offset;
  3134. int rc;
  3135. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3136. &cfg_base_addr_index, &cfg_offset);
  3137. if (rc)
  3138. return rc;
  3139. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3140. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3141. if (!h->cfgtable)
  3142. return -ENOMEM;
  3143. /* Find performant mode table. */
  3144. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3145. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3146. cfg_base_addr_index)+cfg_offset+trans_offset,
  3147. sizeof(*h->transtable));
  3148. if (!h->transtable)
  3149. return -ENOMEM;
  3150. return 0;
  3151. }
  3152. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3153. {
  3154. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3155. /* Limit commands in memory limited kdump scenario. */
  3156. if (reset_devices && h->max_commands > 32)
  3157. h->max_commands = 32;
  3158. if (h->max_commands < 16) {
  3159. dev_warn(&h->pdev->dev, "Controller reports "
  3160. "max supported commands of %d, an obvious lie. "
  3161. "Using 16. Ensure that firmware is up to date.\n",
  3162. h->max_commands);
  3163. h->max_commands = 16;
  3164. }
  3165. }
  3166. /* Interrogate the hardware for some limits:
  3167. * max commands, max SG elements without chaining, and with chaining,
  3168. * SG chain block size, etc.
  3169. */
  3170. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3171. {
  3172. hpsa_get_max_perf_mode_cmds(h);
  3173. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3174. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3175. /*
  3176. * Limit in-command s/g elements to 32 save dma'able memory.
  3177. * Howvever spec says if 0, use 31
  3178. */
  3179. h->max_cmd_sg_entries = 31;
  3180. if (h->maxsgentries > 512) {
  3181. h->max_cmd_sg_entries = 32;
  3182. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3183. h->maxsgentries--; /* save one for chain pointer */
  3184. } else {
  3185. h->maxsgentries = 31; /* default to traditional values */
  3186. h->chainsize = 0;
  3187. }
  3188. }
  3189. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3190. {
  3191. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3192. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3193. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3194. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3195. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3196. return false;
  3197. }
  3198. return true;
  3199. }
  3200. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3201. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3202. {
  3203. #ifdef CONFIG_X86
  3204. u32 prefetch;
  3205. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3206. prefetch |= 0x100;
  3207. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3208. #endif
  3209. }
  3210. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3211. * in a prefetch beyond physical memory.
  3212. */
  3213. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3214. {
  3215. u32 dma_prefetch;
  3216. if (h->board_id != 0x3225103C)
  3217. return;
  3218. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3219. dma_prefetch |= 0x8000;
  3220. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3221. }
  3222. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3223. {
  3224. int i;
  3225. u32 doorbell_value;
  3226. unsigned long flags;
  3227. /* under certain very rare conditions, this can take awhile.
  3228. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3229. * as we enter this code.)
  3230. */
  3231. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3232. spin_lock_irqsave(&h->lock, flags);
  3233. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3234. spin_unlock_irqrestore(&h->lock, flags);
  3235. if (!doorbell_value & CFGTBL_ChangeReq)
  3236. break;
  3237. /* delay and try again */
  3238. usleep_range(10000, 20000);
  3239. }
  3240. }
  3241. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3242. {
  3243. u32 trans_support;
  3244. trans_support = readl(&(h->cfgtable->TransportSupport));
  3245. if (!(trans_support & SIMPLE_MODE))
  3246. return -ENOTSUPP;
  3247. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3248. /* Update the field, and then ring the doorbell */
  3249. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3250. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3251. hpsa_wait_for_mode_change_ack(h);
  3252. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3253. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3254. dev_warn(&h->pdev->dev,
  3255. "unable to get board into simple mode\n");
  3256. return -ENODEV;
  3257. }
  3258. h->transMethod = CFGTBL_Trans_Simple;
  3259. return 0;
  3260. }
  3261. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3262. {
  3263. int prod_index, err;
  3264. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3265. if (prod_index < 0)
  3266. return -ENODEV;
  3267. h->product_name = products[prod_index].product_name;
  3268. h->access = *(products[prod_index].access);
  3269. if (hpsa_board_disabled(h->pdev)) {
  3270. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3271. return -ENODEV;
  3272. }
  3273. err = pci_enable_device(h->pdev);
  3274. if (err) {
  3275. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3276. return err;
  3277. }
  3278. err = pci_request_regions(h->pdev, "hpsa");
  3279. if (err) {
  3280. dev_err(&h->pdev->dev,
  3281. "cannot obtain PCI resources, aborting\n");
  3282. return err;
  3283. }
  3284. hpsa_interrupt_mode(h);
  3285. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3286. if (err)
  3287. goto err_out_free_res;
  3288. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3289. if (!h->vaddr) {
  3290. err = -ENOMEM;
  3291. goto err_out_free_res;
  3292. }
  3293. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3294. if (err)
  3295. goto err_out_free_res;
  3296. err = hpsa_find_cfgtables(h);
  3297. if (err)
  3298. goto err_out_free_res;
  3299. hpsa_find_board_params(h);
  3300. if (!hpsa_CISS_signature_present(h)) {
  3301. err = -ENODEV;
  3302. goto err_out_free_res;
  3303. }
  3304. hpsa_enable_scsi_prefetch(h);
  3305. hpsa_p600_dma_prefetch_quirk(h);
  3306. err = hpsa_enter_simple_mode(h);
  3307. if (err)
  3308. goto err_out_free_res;
  3309. return 0;
  3310. err_out_free_res:
  3311. if (h->transtable)
  3312. iounmap(h->transtable);
  3313. if (h->cfgtable)
  3314. iounmap(h->cfgtable);
  3315. if (h->vaddr)
  3316. iounmap(h->vaddr);
  3317. /*
  3318. * Deliberately omit pci_disable_device(): it does something nasty to
  3319. * Smart Array controllers that pci_enable_device does not undo
  3320. */
  3321. pci_release_regions(h->pdev);
  3322. return err;
  3323. }
  3324. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3325. {
  3326. int rc;
  3327. #define HBA_INQUIRY_BYTE_COUNT 64
  3328. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3329. if (!h->hba_inquiry_data)
  3330. return;
  3331. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3332. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3333. if (rc != 0) {
  3334. kfree(h->hba_inquiry_data);
  3335. h->hba_inquiry_data = NULL;
  3336. }
  3337. }
  3338. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3339. {
  3340. int rc, i;
  3341. if (!reset_devices)
  3342. return 0;
  3343. /* Reset the controller with a PCI power-cycle or via doorbell */
  3344. rc = hpsa_kdump_hard_reset_controller(pdev);
  3345. /* -ENOTSUPP here means we cannot reset the controller
  3346. * but it's already (and still) up and running in
  3347. * "performant mode". Or, it might be 640x, which can't reset
  3348. * due to concerns about shared bbwc between 6402/6404 pair.
  3349. */
  3350. if (rc == -ENOTSUPP)
  3351. return 0; /* just try to do the kdump anyhow. */
  3352. if (rc)
  3353. return -ENODEV;
  3354. /* Now try to get the controller to respond to a no-op */
  3355. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3356. if (hpsa_noop(pdev) == 0)
  3357. break;
  3358. else
  3359. dev_warn(&pdev->dev, "no-op failed%s\n",
  3360. (i < 11 ? "; re-trying" : ""));
  3361. }
  3362. return 0;
  3363. }
  3364. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3365. const struct pci_device_id *ent)
  3366. {
  3367. int dac, rc;
  3368. struct ctlr_info *h;
  3369. if (number_of_controllers == 0)
  3370. printk(KERN_INFO DRIVER_NAME "\n");
  3371. rc = hpsa_init_reset_devices(pdev);
  3372. if (rc)
  3373. return rc;
  3374. /* Command structures must be aligned on a 32-byte boundary because
  3375. * the 5 lower bits of the address are used by the hardware. and by
  3376. * the driver. See comments in hpsa.h for more info.
  3377. */
  3378. #define COMMANDLIST_ALIGNMENT 32
  3379. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3380. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3381. if (!h)
  3382. return -ENOMEM;
  3383. h->pdev = pdev;
  3384. h->busy_initializing = 1;
  3385. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3386. INIT_LIST_HEAD(&h->cmpQ);
  3387. INIT_LIST_HEAD(&h->reqQ);
  3388. spin_lock_init(&h->lock);
  3389. spin_lock_init(&h->scan_lock);
  3390. rc = hpsa_pci_init(h);
  3391. if (rc != 0)
  3392. goto clean1;
  3393. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3394. h->ctlr = number_of_controllers;
  3395. number_of_controllers++;
  3396. /* configure PCI DMA stuff */
  3397. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3398. if (rc == 0) {
  3399. dac = 1;
  3400. } else {
  3401. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3402. if (rc == 0) {
  3403. dac = 0;
  3404. } else {
  3405. dev_err(&pdev->dev, "no suitable DMA available\n");
  3406. goto clean1;
  3407. }
  3408. }
  3409. /* make sure the board interrupts are off */
  3410. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3411. if (h->msix_vector || h->msi_vector)
  3412. rc = request_irq(h->intr[h->intr_mode], do_hpsa_intr_msi,
  3413. IRQF_DISABLED, h->devname, h);
  3414. else
  3415. rc = request_irq(h->intr[h->intr_mode], do_hpsa_intr_intx,
  3416. IRQF_DISABLED, h->devname, h);
  3417. if (rc) {
  3418. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3419. h->intr[h->intr_mode], h->devname);
  3420. goto clean2;
  3421. }
  3422. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3423. h->devname, pdev->device,
  3424. h->intr[h->intr_mode], dac ? "" : " not");
  3425. h->cmd_pool_bits =
  3426. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3427. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3428. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3429. h->nr_cmds * sizeof(*h->cmd_pool),
  3430. &(h->cmd_pool_dhandle));
  3431. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3432. h->nr_cmds * sizeof(*h->errinfo_pool),
  3433. &(h->errinfo_pool_dhandle));
  3434. if ((h->cmd_pool_bits == NULL)
  3435. || (h->cmd_pool == NULL)
  3436. || (h->errinfo_pool == NULL)) {
  3437. dev_err(&pdev->dev, "out of memory");
  3438. rc = -ENOMEM;
  3439. goto clean4;
  3440. }
  3441. if (hpsa_allocate_sg_chain_blocks(h))
  3442. goto clean4;
  3443. init_waitqueue_head(&h->scan_wait_queue);
  3444. h->scan_finished = 1; /* no scan currently in progress */
  3445. pci_set_drvdata(pdev, h);
  3446. memset(h->cmd_pool_bits, 0,
  3447. ((h->nr_cmds + BITS_PER_LONG -
  3448. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3449. hpsa_scsi_setup(h);
  3450. /* Turn the interrupts on so we can service requests */
  3451. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3452. hpsa_put_ctlr_into_performant_mode(h);
  3453. hpsa_hba_inquiry(h);
  3454. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3455. h->busy_initializing = 0;
  3456. return 1;
  3457. clean4:
  3458. hpsa_free_sg_chain_blocks(h);
  3459. kfree(h->cmd_pool_bits);
  3460. if (h->cmd_pool)
  3461. pci_free_consistent(h->pdev,
  3462. h->nr_cmds * sizeof(struct CommandList),
  3463. h->cmd_pool, h->cmd_pool_dhandle);
  3464. if (h->errinfo_pool)
  3465. pci_free_consistent(h->pdev,
  3466. h->nr_cmds * sizeof(struct ErrorInfo),
  3467. h->errinfo_pool,
  3468. h->errinfo_pool_dhandle);
  3469. free_irq(h->intr[h->intr_mode], h);
  3470. clean2:
  3471. clean1:
  3472. h->busy_initializing = 0;
  3473. kfree(h);
  3474. return rc;
  3475. }
  3476. static void hpsa_flush_cache(struct ctlr_info *h)
  3477. {
  3478. char *flush_buf;
  3479. struct CommandList *c;
  3480. flush_buf = kzalloc(4, GFP_KERNEL);
  3481. if (!flush_buf)
  3482. return;
  3483. c = cmd_special_alloc(h);
  3484. if (!c) {
  3485. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3486. goto out_of_memory;
  3487. }
  3488. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3489. RAID_CTLR_LUNID, TYPE_CMD);
  3490. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3491. if (c->err_info->CommandStatus != 0)
  3492. dev_warn(&h->pdev->dev,
  3493. "error flushing cache on controller\n");
  3494. cmd_special_free(h, c);
  3495. out_of_memory:
  3496. kfree(flush_buf);
  3497. }
  3498. static void hpsa_shutdown(struct pci_dev *pdev)
  3499. {
  3500. struct ctlr_info *h;
  3501. h = pci_get_drvdata(pdev);
  3502. /* Turn board interrupts off and send the flush cache command
  3503. * sendcmd will turn off interrupt, and send the flush...
  3504. * To write all data in the battery backed cache to disks
  3505. */
  3506. hpsa_flush_cache(h);
  3507. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3508. free_irq(h->intr[h->intr_mode], h);
  3509. #ifdef CONFIG_PCI_MSI
  3510. if (h->msix_vector)
  3511. pci_disable_msix(h->pdev);
  3512. else if (h->msi_vector)
  3513. pci_disable_msi(h->pdev);
  3514. #endif /* CONFIG_PCI_MSI */
  3515. }
  3516. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3517. {
  3518. struct ctlr_info *h;
  3519. if (pci_get_drvdata(pdev) == NULL) {
  3520. dev_err(&pdev->dev, "unable to remove device \n");
  3521. return;
  3522. }
  3523. h = pci_get_drvdata(pdev);
  3524. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3525. hpsa_shutdown(pdev);
  3526. iounmap(h->vaddr);
  3527. iounmap(h->transtable);
  3528. iounmap(h->cfgtable);
  3529. hpsa_free_sg_chain_blocks(h);
  3530. pci_free_consistent(h->pdev,
  3531. h->nr_cmds * sizeof(struct CommandList),
  3532. h->cmd_pool, h->cmd_pool_dhandle);
  3533. pci_free_consistent(h->pdev,
  3534. h->nr_cmds * sizeof(struct ErrorInfo),
  3535. h->errinfo_pool, h->errinfo_pool_dhandle);
  3536. pci_free_consistent(h->pdev, h->reply_pool_size,
  3537. h->reply_pool, h->reply_pool_dhandle);
  3538. kfree(h->cmd_pool_bits);
  3539. kfree(h->blockFetchTable);
  3540. kfree(h->hba_inquiry_data);
  3541. /*
  3542. * Deliberately omit pci_disable_device(): it does something nasty to
  3543. * Smart Array controllers that pci_enable_device does not undo
  3544. */
  3545. pci_release_regions(pdev);
  3546. pci_set_drvdata(pdev, NULL);
  3547. kfree(h);
  3548. }
  3549. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3550. __attribute__((unused)) pm_message_t state)
  3551. {
  3552. return -ENOSYS;
  3553. }
  3554. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3555. {
  3556. return -ENOSYS;
  3557. }
  3558. static struct pci_driver hpsa_pci_driver = {
  3559. .name = "hpsa",
  3560. .probe = hpsa_init_one,
  3561. .remove = __devexit_p(hpsa_remove_one),
  3562. .id_table = hpsa_pci_device_id, /* id_table */
  3563. .shutdown = hpsa_shutdown,
  3564. .suspend = hpsa_suspend,
  3565. .resume = hpsa_resume,
  3566. };
  3567. /* Fill in bucket_map[], given nsgs (the max number of
  3568. * scatter gather elements supported) and bucket[],
  3569. * which is an array of 8 integers. The bucket[] array
  3570. * contains 8 different DMA transfer sizes (in 16
  3571. * byte increments) which the controller uses to fetch
  3572. * commands. This function fills in bucket_map[], which
  3573. * maps a given number of scatter gather elements to one of
  3574. * the 8 DMA transfer sizes. The point of it is to allow the
  3575. * controller to only do as much DMA as needed to fetch the
  3576. * command, with the DMA transfer size encoded in the lower
  3577. * bits of the command address.
  3578. */
  3579. static void calc_bucket_map(int bucket[], int num_buckets,
  3580. int nsgs, int *bucket_map)
  3581. {
  3582. int i, j, b, size;
  3583. /* even a command with 0 SGs requires 4 blocks */
  3584. #define MINIMUM_TRANSFER_BLOCKS 4
  3585. #define NUM_BUCKETS 8
  3586. /* Note, bucket_map must have nsgs+1 entries. */
  3587. for (i = 0; i <= nsgs; i++) {
  3588. /* Compute size of a command with i SG entries */
  3589. size = i + MINIMUM_TRANSFER_BLOCKS;
  3590. b = num_buckets; /* Assume the biggest bucket */
  3591. /* Find the bucket that is just big enough */
  3592. for (j = 0; j < 8; j++) {
  3593. if (bucket[j] >= size) {
  3594. b = j;
  3595. break;
  3596. }
  3597. }
  3598. /* for a command with i SG entries, use bucket b. */
  3599. bucket_map[i] = b;
  3600. }
  3601. }
  3602. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  3603. u32 use_short_tags)
  3604. {
  3605. int i;
  3606. unsigned long register_value;
  3607. /* This is a bit complicated. There are 8 registers on
  3608. * the controller which we write to to tell it 8 different
  3609. * sizes of commands which there may be. It's a way of
  3610. * reducing the DMA done to fetch each command. Encoded into
  3611. * each command's tag are 3 bits which communicate to the controller
  3612. * which of the eight sizes that command fits within. The size of
  3613. * each command depends on how many scatter gather entries there are.
  3614. * Each SG entry requires 16 bytes. The eight registers are programmed
  3615. * with the number of 16-byte blocks a command of that size requires.
  3616. * The smallest command possible requires 5 such 16 byte blocks.
  3617. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3618. * blocks. Note, this only extends to the SG entries contained
  3619. * within the command block, and does not extend to chained blocks
  3620. * of SG elements. bft[] contains the eight values we write to
  3621. * the registers. They are not evenly distributed, but have more
  3622. * sizes for small commands, and fewer sizes for larger commands.
  3623. */
  3624. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3625. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3626. /* 5 = 1 s/g entry or 4k
  3627. * 6 = 2 s/g entry or 8k
  3628. * 8 = 4 s/g entry or 16k
  3629. * 10 = 6 s/g entry or 24k
  3630. */
  3631. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3632. /* Controller spec: zero out this buffer. */
  3633. memset(h->reply_pool, 0, h->reply_pool_size);
  3634. h->reply_pool_head = h->reply_pool;
  3635. bft[7] = h->max_sg_entries + 4;
  3636. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3637. for (i = 0; i < 8; i++)
  3638. writel(bft[i], &h->transtable->BlockFetch[i]);
  3639. /* size of controller ring buffer */
  3640. writel(h->max_commands, &h->transtable->RepQSize);
  3641. writel(1, &h->transtable->RepQCount);
  3642. writel(0, &h->transtable->RepQCtrAddrLow32);
  3643. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3644. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3645. writel(0, &h->transtable->RepQAddr0High32);
  3646. writel(CFGTBL_Trans_Performant | use_short_tags,
  3647. &(h->cfgtable->HostWrite.TransportRequest));
  3648. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3649. hpsa_wait_for_mode_change_ack(h);
  3650. register_value = readl(&(h->cfgtable->TransportActive));
  3651. if (!(register_value & CFGTBL_Trans_Performant)) {
  3652. dev_warn(&h->pdev->dev, "unable to get board into"
  3653. " performant mode\n");
  3654. return;
  3655. }
  3656. /* Change the access methods to the performant access methods */
  3657. h->access = SA5_performant_access;
  3658. h->transMethod = CFGTBL_Trans_Performant;
  3659. }
  3660. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3661. {
  3662. u32 trans_support;
  3663. if (hpsa_simple_mode)
  3664. return;
  3665. trans_support = readl(&(h->cfgtable->TransportSupport));
  3666. if (!(trans_support & PERFORMANT_MODE))
  3667. return;
  3668. hpsa_get_max_perf_mode_cmds(h);
  3669. h->max_sg_entries = 32;
  3670. /* Performant mode ring buffer and supporting data structures */
  3671. h->reply_pool_size = h->max_commands * sizeof(u64);
  3672. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3673. &(h->reply_pool_dhandle));
  3674. /* Need a block fetch table for performant mode */
  3675. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3676. sizeof(u32)), GFP_KERNEL);
  3677. if ((h->reply_pool == NULL)
  3678. || (h->blockFetchTable == NULL))
  3679. goto clean_up;
  3680. hpsa_enter_performant_mode(h,
  3681. trans_support & CFGTBL_Trans_use_short_tags);
  3682. return;
  3683. clean_up:
  3684. if (h->reply_pool)
  3685. pci_free_consistent(h->pdev, h->reply_pool_size,
  3686. h->reply_pool, h->reply_pool_dhandle);
  3687. kfree(h->blockFetchTable);
  3688. }
  3689. /*
  3690. * This is it. Register the PCI driver information for the cards we control
  3691. * the OS will call our registered routines when it finds one of our cards.
  3692. */
  3693. static int __init hpsa_init(void)
  3694. {
  3695. return pci_register_driver(&hpsa_pci_driver);
  3696. }
  3697. static void __exit hpsa_cleanup(void)
  3698. {
  3699. pci_unregister_driver(&hpsa_pci_driver);
  3700. }
  3701. module_init(hpsa_init);
  3702. module_exit(hpsa_cleanup);