yenta_socket.c 40 KB

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  1. /*
  2. * Regular cardbus driver ("yenta_socket")
  3. *
  4. * (C) Copyright 1999, 2000 Linus Torvalds
  5. *
  6. * Changelog:
  7. * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
  8. * Dynamically adjust the size of the bridge resource
  9. *
  10. * May 2003: Dominik Brodowski <linux@brodo.de>
  11. * Merge pci_socket.c and yenta.c into one file
  12. */
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/workqueue.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/module.h>
  19. #include <linux/io.h>
  20. #include <pcmcia/cs_types.h>
  21. #include <pcmcia/ss.h>
  22. #include <pcmcia/cs.h>
  23. #include "yenta_socket.h"
  24. #include "i82365.h"
  25. static int disable_clkrun;
  26. module_param(disable_clkrun, bool, 0444);
  27. MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
  28. static int isa_probe = 1;
  29. module_param(isa_probe, bool, 0444);
  30. MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
  31. static int pwr_irqs_off;
  32. module_param(pwr_irqs_off, bool, 0644);
  33. MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
  34. static char o2_speedup[] = "default";
  35. module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
  36. MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
  37. "or 'default' (uses recommended behaviour for the detected bridge)");
  38. #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
  39. /* Don't ask.. */
  40. #define to_cycles(ns) ((ns)/120)
  41. #define to_ns(cycles) ((cycles)*120)
  42. /*
  43. * yenta PCI irq probing.
  44. * currently only used in the TI/EnE initialization code
  45. */
  46. #ifdef CONFIG_YENTA_TI
  47. static int yenta_probe_cb_irq(struct yenta_socket *socket);
  48. #endif
  49. static unsigned int override_bios;
  50. module_param(override_bios, uint, 0000);
  51. MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
  52. /*
  53. * Generate easy-to-use ways of reading a cardbus sockets
  54. * regular memory space ("cb_xxx"), configuration space
  55. * ("config_xxx") and compatibility space ("exca_xxxx")
  56. */
  57. static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
  58. {
  59. u32 val = readl(socket->base + reg);
  60. debug("%04x %08x\n", socket, reg, val);
  61. return val;
  62. }
  63. static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
  64. {
  65. debug("%04x %08x\n", socket, reg, val);
  66. writel(val, socket->base + reg);
  67. readl(socket->base + reg); /* avoid problems with PCI write posting */
  68. }
  69. static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
  70. {
  71. u8 val;
  72. pci_read_config_byte(socket->dev, offset, &val);
  73. debug("%04x %02x\n", socket, offset, val);
  74. return val;
  75. }
  76. static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
  77. {
  78. u16 val;
  79. pci_read_config_word(socket->dev, offset, &val);
  80. debug("%04x %04x\n", socket, offset, val);
  81. return val;
  82. }
  83. static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
  84. {
  85. u32 val;
  86. pci_read_config_dword(socket->dev, offset, &val);
  87. debug("%04x %08x\n", socket, offset, val);
  88. return val;
  89. }
  90. static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
  91. {
  92. debug("%04x %02x\n", socket, offset, val);
  93. pci_write_config_byte(socket->dev, offset, val);
  94. }
  95. static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
  96. {
  97. debug("%04x %04x\n", socket, offset, val);
  98. pci_write_config_word(socket->dev, offset, val);
  99. }
  100. static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
  101. {
  102. debug("%04x %08x\n", socket, offset, val);
  103. pci_write_config_dword(socket->dev, offset, val);
  104. }
  105. static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
  106. {
  107. u8 val = readb(socket->base + 0x800 + reg);
  108. debug("%04x %02x\n", socket, reg, val);
  109. return val;
  110. }
  111. static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
  112. {
  113. u16 val;
  114. val = readb(socket->base + 0x800 + reg);
  115. val |= readb(socket->base + 0x800 + reg + 1) << 8;
  116. debug("%04x %04x\n", socket, reg, val);
  117. return val;
  118. }
  119. static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
  120. {
  121. debug("%04x %02x\n", socket, reg, val);
  122. writeb(val, socket->base + 0x800 + reg);
  123. readb(socket->base + 0x800 + reg); /* PCI write posting... */
  124. }
  125. static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
  126. {
  127. debug("%04x %04x\n", socket, reg, val);
  128. writeb(val, socket->base + 0x800 + reg);
  129. writeb(val >> 8, socket->base + 0x800 + reg + 1);
  130. /* PCI write posting... */
  131. readb(socket->base + 0x800 + reg);
  132. readb(socket->base + 0x800 + reg + 1);
  133. }
  134. static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
  135. {
  136. struct pci_dev *dev = to_pci_dev(yentadev);
  137. struct yenta_socket *socket = pci_get_drvdata(dev);
  138. int offset = 0, i;
  139. offset = snprintf(buf, PAGE_SIZE, "CB registers:");
  140. for (i = 0; i < 0x24; i += 4) {
  141. unsigned val;
  142. if (!(i & 15))
  143. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
  144. val = cb_readl(socket, i);
  145. offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
  146. }
  147. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
  148. for (i = 0; i < 0x45; i++) {
  149. unsigned char val;
  150. if (!(i & 7)) {
  151. if (i & 8) {
  152. memcpy(buf + offset, " -", 2);
  153. offset += 2;
  154. } else
  155. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
  156. }
  157. val = exca_readb(socket, i);
  158. offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
  159. }
  160. buf[offset++] = '\n';
  161. return offset;
  162. }
  163. static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
  164. /*
  165. * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
  166. * on what kind of card is inserted..
  167. */
  168. static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
  169. {
  170. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  171. unsigned int val;
  172. u32 state = cb_readl(socket, CB_SOCKET_STATE);
  173. val = (state & CB_3VCARD) ? SS_3VCARD : 0;
  174. val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
  175. val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
  176. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
  177. if (state & CB_CBCARD) {
  178. val |= SS_CARDBUS;
  179. val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
  180. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
  181. val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
  182. } else if (state & CB_16BITCARD) {
  183. u8 status = exca_readb(socket, I365_STATUS);
  184. val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
  185. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  186. val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
  187. } else {
  188. val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
  189. val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
  190. }
  191. val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
  192. val |= (status & I365_CS_READY) ? SS_READY : 0;
  193. val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
  194. }
  195. *value = val;
  196. return 0;
  197. }
  198. static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
  199. {
  200. /* some birdges require to use the ExCA registers to power 16bit cards */
  201. if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
  202. (socket->flags & YENTA_16BIT_POWER_EXCA)) {
  203. u8 reg, old;
  204. reg = old = exca_readb(socket, I365_POWER);
  205. reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
  206. /* i82365SL-DF style */
  207. if (socket->flags & YENTA_16BIT_POWER_DF) {
  208. switch (state->Vcc) {
  209. case 33:
  210. reg |= I365_VCC_3V;
  211. break;
  212. case 50:
  213. reg |= I365_VCC_5V;
  214. break;
  215. default:
  216. reg = 0;
  217. break;
  218. }
  219. switch (state->Vpp) {
  220. case 33:
  221. case 50:
  222. reg |= I365_VPP1_5V;
  223. break;
  224. case 120:
  225. reg |= I365_VPP1_12V;
  226. break;
  227. }
  228. } else {
  229. /* i82365SL-B style */
  230. switch (state->Vcc) {
  231. case 50:
  232. reg |= I365_VCC_5V;
  233. break;
  234. default:
  235. reg = 0;
  236. break;
  237. }
  238. switch (state->Vpp) {
  239. case 50:
  240. reg |= I365_VPP1_5V | I365_VPP2_5V;
  241. break;
  242. case 120:
  243. reg |= I365_VPP1_12V | I365_VPP2_12V;
  244. break;
  245. }
  246. }
  247. if (reg != old)
  248. exca_writeb(socket, I365_POWER, reg);
  249. } else {
  250. u32 reg = 0; /* CB_SC_STPCLK? */
  251. switch (state->Vcc) {
  252. case 33:
  253. reg = CB_SC_VCC_3V;
  254. break;
  255. case 50:
  256. reg = CB_SC_VCC_5V;
  257. break;
  258. default:
  259. reg = 0;
  260. break;
  261. }
  262. switch (state->Vpp) {
  263. case 33:
  264. reg |= CB_SC_VPP_3V;
  265. break;
  266. case 50:
  267. reg |= CB_SC_VPP_5V;
  268. break;
  269. case 120:
  270. reg |= CB_SC_VPP_12V;
  271. break;
  272. }
  273. if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
  274. cb_writel(socket, CB_SOCKET_CONTROL, reg);
  275. }
  276. }
  277. static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
  278. {
  279. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  280. u16 bridge;
  281. /* if powering down: do it immediately */
  282. if (state->Vcc == 0)
  283. yenta_set_power(socket, state);
  284. socket->io_irq = state->io_irq;
  285. bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
  286. if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
  287. u8 intr;
  288. bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
  289. /* ISA interrupt control? */
  290. intr = exca_readb(socket, I365_INTCTL);
  291. intr = (intr & ~0xf);
  292. if (!socket->dev->irq) {
  293. intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
  294. bridge |= CB_BRIDGE_INTR;
  295. }
  296. exca_writeb(socket, I365_INTCTL, intr);
  297. } else {
  298. u8 reg;
  299. reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
  300. reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
  301. reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
  302. if (state->io_irq != socket->dev->irq) {
  303. reg |= state->io_irq;
  304. bridge |= CB_BRIDGE_INTR;
  305. }
  306. exca_writeb(socket, I365_INTCTL, reg);
  307. reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
  308. reg |= I365_PWR_NORESET;
  309. if (state->flags & SS_PWR_AUTO)
  310. reg |= I365_PWR_AUTO;
  311. if (state->flags & SS_OUTPUT_ENA)
  312. reg |= I365_PWR_OUT;
  313. if (exca_readb(socket, I365_POWER) != reg)
  314. exca_writeb(socket, I365_POWER, reg);
  315. /* CSC interrupt: no ISA irq for CSC */
  316. reg = exca_readb(socket, I365_CSCINT);
  317. reg &= I365_CSC_IRQ_MASK;
  318. reg |= I365_CSC_DETECT;
  319. if (state->flags & SS_IOCARD) {
  320. if (state->csc_mask & SS_STSCHG)
  321. reg |= I365_CSC_STSCHG;
  322. } else {
  323. if (state->csc_mask & SS_BATDEAD)
  324. reg |= I365_CSC_BVD1;
  325. if (state->csc_mask & SS_BATWARN)
  326. reg |= I365_CSC_BVD2;
  327. if (state->csc_mask & SS_READY)
  328. reg |= I365_CSC_READY;
  329. }
  330. exca_writeb(socket, I365_CSCINT, reg);
  331. exca_readb(socket, I365_CSC);
  332. if (sock->zoom_video)
  333. sock->zoom_video(sock, state->flags & SS_ZVCARD);
  334. }
  335. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  336. /* Socket event mask: get card insert/remove events.. */
  337. cb_writel(socket, CB_SOCKET_EVENT, -1);
  338. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  339. /* if powering up: do it as the last step when the socket is configured */
  340. if (state->Vcc != 0)
  341. yenta_set_power(socket, state);
  342. return 0;
  343. }
  344. static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
  345. {
  346. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  347. int map;
  348. unsigned char ioctl, addr, enable;
  349. map = io->map;
  350. if (map > 1)
  351. return -EINVAL;
  352. enable = I365_ENA_IO(map);
  353. addr = exca_readb(socket, I365_ADDRWIN);
  354. /* Disable the window before changing it.. */
  355. if (addr & enable) {
  356. addr &= ~enable;
  357. exca_writeb(socket, I365_ADDRWIN, addr);
  358. }
  359. exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
  360. exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
  361. ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
  362. if (io->flags & MAP_0WS)
  363. ioctl |= I365_IOCTL_0WS(map);
  364. if (io->flags & MAP_16BIT)
  365. ioctl |= I365_IOCTL_16BIT(map);
  366. if (io->flags & MAP_AUTOSZ)
  367. ioctl |= I365_IOCTL_IOCS16(map);
  368. exca_writeb(socket, I365_IOCTL, ioctl);
  369. if (io->flags & MAP_ACTIVE)
  370. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  371. return 0;
  372. }
  373. static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
  374. {
  375. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  376. struct pci_bus_region region;
  377. int map;
  378. unsigned char addr, enable;
  379. unsigned int start, stop, card_start;
  380. unsigned short word;
  381. pcibios_resource_to_bus(socket->dev, &region, mem->res);
  382. map = mem->map;
  383. start = region.start;
  384. stop = region.end;
  385. card_start = mem->card_start;
  386. if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
  387. (card_start >> 26) || mem->speed > 1000)
  388. return -EINVAL;
  389. enable = I365_ENA_MEM(map);
  390. addr = exca_readb(socket, I365_ADDRWIN);
  391. if (addr & enable) {
  392. addr &= ~enable;
  393. exca_writeb(socket, I365_ADDRWIN, addr);
  394. }
  395. exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
  396. word = (start >> 12) & 0x0fff;
  397. if (mem->flags & MAP_16BIT)
  398. word |= I365_MEM_16BIT;
  399. if (mem->flags & MAP_0WS)
  400. word |= I365_MEM_0WS;
  401. exca_writew(socket, I365_MEM(map) + I365_W_START, word);
  402. word = (stop >> 12) & 0x0fff;
  403. switch (to_cycles(mem->speed)) {
  404. case 0:
  405. break;
  406. case 1:
  407. word |= I365_MEM_WS0;
  408. break;
  409. case 2:
  410. word |= I365_MEM_WS1;
  411. break;
  412. default:
  413. word |= I365_MEM_WS1 | I365_MEM_WS0;
  414. break;
  415. }
  416. exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
  417. word = ((card_start - start) >> 12) & 0x3fff;
  418. if (mem->flags & MAP_WRPROT)
  419. word |= I365_MEM_WRPROT;
  420. if (mem->flags & MAP_ATTRIB)
  421. word |= I365_MEM_REG;
  422. exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
  423. if (mem->flags & MAP_ACTIVE)
  424. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  425. return 0;
  426. }
  427. static irqreturn_t yenta_interrupt(int irq, void *dev_id)
  428. {
  429. unsigned int events;
  430. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  431. u8 csc;
  432. u32 cb_event;
  433. /* Clear interrupt status for the event */
  434. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  435. cb_writel(socket, CB_SOCKET_EVENT, cb_event);
  436. csc = exca_readb(socket, I365_CSC);
  437. if (!(cb_event || csc))
  438. return IRQ_NONE;
  439. events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
  440. events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
  441. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  442. events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
  443. } else {
  444. events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
  445. events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
  446. events |= (csc & I365_CSC_READY) ? SS_READY : 0;
  447. }
  448. if (events)
  449. pcmcia_parse_events(&socket->socket, events);
  450. return IRQ_HANDLED;
  451. }
  452. static void yenta_interrupt_wrapper(unsigned long data)
  453. {
  454. struct yenta_socket *socket = (struct yenta_socket *) data;
  455. yenta_interrupt(0, (void *)socket);
  456. socket->poll_timer.expires = jiffies + HZ;
  457. add_timer(&socket->poll_timer);
  458. }
  459. static void yenta_clear_maps(struct yenta_socket *socket)
  460. {
  461. int i;
  462. struct resource res = { .start = 0, .end = 0x0fff };
  463. pccard_io_map io = { 0, 0, 0, 0, 1 };
  464. pccard_mem_map mem = { .res = &res, };
  465. yenta_set_socket(&socket->socket, &dead_socket);
  466. for (i = 0; i < 2; i++) {
  467. io.map = i;
  468. yenta_set_io_map(&socket->socket, &io);
  469. }
  470. for (i = 0; i < 5; i++) {
  471. mem.map = i;
  472. yenta_set_mem_map(&socket->socket, &mem);
  473. }
  474. }
  475. /* redoes voltage interrogation if required */
  476. static void yenta_interrogate(struct yenta_socket *socket)
  477. {
  478. u32 state;
  479. state = cb_readl(socket, CB_SOCKET_STATE);
  480. if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
  481. (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
  482. ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
  483. cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
  484. }
  485. /* Called at resume and initialization events */
  486. static int yenta_sock_init(struct pcmcia_socket *sock)
  487. {
  488. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  489. exca_writeb(socket, I365_GBLCTL, 0x00);
  490. exca_writeb(socket, I365_GENCTL, 0x00);
  491. /* Redo card voltage interrogation */
  492. yenta_interrogate(socket);
  493. yenta_clear_maps(socket);
  494. if (socket->type && socket->type->sock_init)
  495. socket->type->sock_init(socket);
  496. /* Re-enable CSC interrupts */
  497. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  498. return 0;
  499. }
  500. static int yenta_sock_suspend(struct pcmcia_socket *sock)
  501. {
  502. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  503. /* Disable CSC interrupts */
  504. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  505. return 0;
  506. }
  507. /*
  508. * Use an adaptive allocation for the memory resource,
  509. * sometimes the memory behind pci bridges is limited:
  510. * 1/8 of the size of the io window of the parent.
  511. * max 4 MB, min 16 kB. We try very hard to not get below
  512. * the "ACC" values, though.
  513. */
  514. #define BRIDGE_MEM_MAX (4*1024*1024)
  515. #define BRIDGE_MEM_ACC (128*1024)
  516. #define BRIDGE_MEM_MIN (16*1024)
  517. #define BRIDGE_IO_MAX 512
  518. #define BRIDGE_IO_ACC 256
  519. #define BRIDGE_IO_MIN 32
  520. #ifndef PCIBIOS_MIN_CARDBUS_IO
  521. #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
  522. #endif
  523. static int yenta_search_one_res(struct resource *root, struct resource *res,
  524. u32 min)
  525. {
  526. u32 align, size, start, end;
  527. if (res->flags & IORESOURCE_IO) {
  528. align = 1024;
  529. size = BRIDGE_IO_MAX;
  530. start = PCIBIOS_MIN_CARDBUS_IO;
  531. end = ~0U;
  532. } else {
  533. unsigned long avail = root->end - root->start;
  534. int i;
  535. size = BRIDGE_MEM_MAX;
  536. if (size > avail/8) {
  537. size = (avail+1)/8;
  538. /* round size down to next power of 2 */
  539. i = 0;
  540. while ((size /= 2) != 0)
  541. i++;
  542. size = 1 << i;
  543. }
  544. if (size < min)
  545. size = min;
  546. align = size;
  547. start = PCIBIOS_MIN_MEM;
  548. end = ~0U;
  549. }
  550. do {
  551. if (allocate_resource(root, res, size, start, end, align,
  552. NULL, NULL) == 0) {
  553. return 1;
  554. }
  555. size = size/2;
  556. align = size;
  557. } while (size >= min);
  558. return 0;
  559. }
  560. static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
  561. u32 min)
  562. {
  563. struct resource *root;
  564. int i;
  565. pci_bus_for_each_resource(socket->dev->bus, root, i) {
  566. if (!root)
  567. continue;
  568. if ((res->flags ^ root->flags) &
  569. (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
  570. continue; /* Wrong type */
  571. if (yenta_search_one_res(root, res, min))
  572. return 1;
  573. }
  574. return 0;
  575. }
  576. static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
  577. {
  578. struct pci_dev *dev = socket->dev;
  579. struct resource *res;
  580. struct pci_bus_region region;
  581. unsigned mask;
  582. res = dev->resource + PCI_BRIDGE_RESOURCES + nr;
  583. /* Already allocated? */
  584. if (res->parent)
  585. return 0;
  586. /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
  587. mask = ~0xfff;
  588. if (type & IORESOURCE_IO)
  589. mask = ~3;
  590. res->name = dev->subordinate->name;
  591. res->flags = type;
  592. region.start = config_readl(socket, addr_start) & mask;
  593. region.end = config_readl(socket, addr_end) | ~mask;
  594. if (region.start && region.end > region.start && !override_bios) {
  595. pcibios_bus_to_resource(dev, res, &region);
  596. if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
  597. return 0;
  598. dev_printk(KERN_INFO, &dev->dev,
  599. "Preassigned resource %d busy or not available, "
  600. "reconfiguring...\n",
  601. nr);
  602. }
  603. if (type & IORESOURCE_IO) {
  604. if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
  605. (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
  606. (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
  607. return 1;
  608. } else {
  609. if (type & IORESOURCE_PREFETCH) {
  610. if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
  611. (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
  612. (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
  613. return 1;
  614. /* Approximating prefetchable by non-prefetchable */
  615. res->flags = IORESOURCE_MEM;
  616. }
  617. if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
  618. (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
  619. (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
  620. return 1;
  621. }
  622. dev_printk(KERN_INFO, &dev->dev,
  623. "no resource of type %x available, trying to continue...\n",
  624. type);
  625. res->start = res->end = res->flags = 0;
  626. return 0;
  627. }
  628. /*
  629. * Allocate the bridge mappings for the device..
  630. */
  631. static void yenta_allocate_resources(struct yenta_socket *socket)
  632. {
  633. int program = 0;
  634. program += yenta_allocate_res(socket, 0, IORESOURCE_IO,
  635. PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
  636. program += yenta_allocate_res(socket, 1, IORESOURCE_IO,
  637. PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
  638. program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
  639. PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
  640. program += yenta_allocate_res(socket, 3, IORESOURCE_MEM,
  641. PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
  642. if (program)
  643. pci_setup_cardbus(socket->dev->subordinate);
  644. }
  645. /*
  646. * Free the bridge mappings for the device..
  647. */
  648. static void yenta_free_resources(struct yenta_socket *socket)
  649. {
  650. int i;
  651. for (i = 0; i < 4; i++) {
  652. struct resource *res;
  653. res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
  654. if (res->start != 0 && res->end != 0)
  655. release_resource(res);
  656. res->start = res->end = res->flags = 0;
  657. }
  658. }
  659. /*
  660. * Close it down - release our resources and go home..
  661. */
  662. static void __devexit yenta_close(struct pci_dev *dev)
  663. {
  664. struct yenta_socket *sock = pci_get_drvdata(dev);
  665. /* Remove the register attributes */
  666. device_remove_file(&dev->dev, &dev_attr_yenta_registers);
  667. /* we don't want a dying socket registered */
  668. pcmcia_unregister_socket(&sock->socket);
  669. /* Disable all events so we don't die in an IRQ storm */
  670. cb_writel(sock, CB_SOCKET_MASK, 0x0);
  671. exca_writeb(sock, I365_CSCINT, 0);
  672. if (sock->cb_irq)
  673. free_irq(sock->cb_irq, sock);
  674. else
  675. del_timer_sync(&sock->poll_timer);
  676. if (sock->base)
  677. iounmap(sock->base);
  678. yenta_free_resources(sock);
  679. pci_release_regions(dev);
  680. pci_disable_device(dev);
  681. pci_set_drvdata(dev, NULL);
  682. }
  683. static struct pccard_operations yenta_socket_operations = {
  684. .init = yenta_sock_init,
  685. .suspend = yenta_sock_suspend,
  686. .get_status = yenta_get_status,
  687. .set_socket = yenta_set_socket,
  688. .set_io_map = yenta_set_io_map,
  689. .set_mem_map = yenta_set_mem_map,
  690. };
  691. #ifdef CONFIG_YENTA_TI
  692. #include "ti113x.h"
  693. #endif
  694. #ifdef CONFIG_YENTA_RICOH
  695. #include "ricoh.h"
  696. #endif
  697. #ifdef CONFIG_YENTA_TOSHIBA
  698. #include "topic.h"
  699. #endif
  700. #ifdef CONFIG_YENTA_O2
  701. #include "o2micro.h"
  702. #endif
  703. enum {
  704. CARDBUS_TYPE_DEFAULT = -1,
  705. CARDBUS_TYPE_TI,
  706. CARDBUS_TYPE_TI113X,
  707. CARDBUS_TYPE_TI12XX,
  708. CARDBUS_TYPE_TI1250,
  709. CARDBUS_TYPE_RICOH,
  710. CARDBUS_TYPE_TOPIC95,
  711. CARDBUS_TYPE_TOPIC97,
  712. CARDBUS_TYPE_O2MICRO,
  713. CARDBUS_TYPE_ENE,
  714. };
  715. /*
  716. * Different cardbus controllers have slightly different
  717. * initialization sequences etc details. List them here..
  718. */
  719. static struct cardbus_type cardbus_type[] = {
  720. #ifdef CONFIG_YENTA_TI
  721. [CARDBUS_TYPE_TI] = {
  722. .override = ti_override,
  723. .save_state = ti_save_state,
  724. .restore_state = ti_restore_state,
  725. .sock_init = ti_init,
  726. },
  727. [CARDBUS_TYPE_TI113X] = {
  728. .override = ti113x_override,
  729. .save_state = ti_save_state,
  730. .restore_state = ti_restore_state,
  731. .sock_init = ti_init,
  732. },
  733. [CARDBUS_TYPE_TI12XX] = {
  734. .override = ti12xx_override,
  735. .save_state = ti_save_state,
  736. .restore_state = ti_restore_state,
  737. .sock_init = ti_init,
  738. },
  739. [CARDBUS_TYPE_TI1250] = {
  740. .override = ti1250_override,
  741. .save_state = ti_save_state,
  742. .restore_state = ti_restore_state,
  743. .sock_init = ti_init,
  744. },
  745. #endif
  746. #ifdef CONFIG_YENTA_RICOH
  747. [CARDBUS_TYPE_RICOH] = {
  748. .override = ricoh_override,
  749. .save_state = ricoh_save_state,
  750. .restore_state = ricoh_restore_state,
  751. },
  752. #endif
  753. #ifdef CONFIG_YENTA_TOSHIBA
  754. [CARDBUS_TYPE_TOPIC95] = {
  755. .override = topic95_override,
  756. },
  757. [CARDBUS_TYPE_TOPIC97] = {
  758. .override = topic97_override,
  759. },
  760. #endif
  761. #ifdef CONFIG_YENTA_O2
  762. [CARDBUS_TYPE_O2MICRO] = {
  763. .override = o2micro_override,
  764. .restore_state = o2micro_restore_state,
  765. },
  766. #endif
  767. #ifdef CONFIG_YENTA_TI
  768. [CARDBUS_TYPE_ENE] = {
  769. .override = ene_override,
  770. .save_state = ti_save_state,
  771. .restore_state = ti_restore_state,
  772. .sock_init = ti_init,
  773. },
  774. #endif
  775. };
  776. /*
  777. * Only probe "regular" interrupts, don't
  778. * touch dangerous spots like the mouse irq,
  779. * because there are mice that apparently
  780. * get really confused if they get fondled
  781. * too intimately.
  782. *
  783. * Default to 11, 10, 9, 7, 6, 5, 4, 3.
  784. */
  785. static u32 isa_interrupts = 0x0ef8;
  786. static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
  787. {
  788. int i;
  789. unsigned long val;
  790. u32 mask;
  791. u8 reg;
  792. /*
  793. * Probe for usable interrupts using the force
  794. * register to generate bogus card status events.
  795. */
  796. cb_writel(socket, CB_SOCKET_EVENT, -1);
  797. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  798. reg = exca_readb(socket, I365_CSCINT);
  799. exca_writeb(socket, I365_CSCINT, 0);
  800. val = probe_irq_on() & isa_irq_mask;
  801. for (i = 1; i < 16; i++) {
  802. if (!((val >> i) & 1))
  803. continue;
  804. exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
  805. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  806. udelay(100);
  807. cb_writel(socket, CB_SOCKET_EVENT, -1);
  808. }
  809. cb_writel(socket, CB_SOCKET_MASK, 0);
  810. exca_writeb(socket, I365_CSCINT, reg);
  811. mask = probe_irq_mask(val) & 0xffff;
  812. return mask;
  813. }
  814. /*
  815. * yenta PCI irq probing.
  816. * currently only used in the TI/EnE initialization code
  817. */
  818. #ifdef CONFIG_YENTA_TI
  819. /* interrupt handler, only used during probing */
  820. static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
  821. {
  822. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  823. u8 csc;
  824. u32 cb_event;
  825. /* Clear interrupt status for the event */
  826. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  827. cb_writel(socket, CB_SOCKET_EVENT, -1);
  828. csc = exca_readb(socket, I365_CSC);
  829. if (cb_event || csc) {
  830. socket->probe_status = 1;
  831. return IRQ_HANDLED;
  832. }
  833. return IRQ_NONE;
  834. }
  835. /* probes the PCI interrupt, use only on override functions */
  836. static int yenta_probe_cb_irq(struct yenta_socket *socket)
  837. {
  838. u8 reg;
  839. if (!socket->cb_irq)
  840. return -1;
  841. socket->probe_status = 0;
  842. if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
  843. dev_printk(KERN_WARNING, &socket->dev->dev,
  844. "request_irq() in yenta_probe_cb_irq() failed!\n");
  845. return -1;
  846. }
  847. /* generate interrupt, wait */
  848. reg = exca_readb(socket, I365_CSCINT);
  849. exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
  850. cb_writel(socket, CB_SOCKET_EVENT, -1);
  851. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  852. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  853. msleep(100);
  854. /* disable interrupts */
  855. cb_writel(socket, CB_SOCKET_MASK, 0);
  856. exca_writeb(socket, I365_CSCINT, reg);
  857. cb_writel(socket, CB_SOCKET_EVENT, -1);
  858. exca_readb(socket, I365_CSC);
  859. free_irq(socket->cb_irq, socket);
  860. return (int) socket->probe_status;
  861. }
  862. #endif /* CONFIG_YENTA_TI */
  863. /*
  864. * Set static data that doesn't need re-initializing..
  865. */
  866. static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
  867. {
  868. socket->socket.pci_irq = socket->cb_irq;
  869. if (isa_probe)
  870. socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
  871. else
  872. socket->socket.irq_mask = 0;
  873. dev_printk(KERN_INFO, &socket->dev->dev,
  874. "ISA IRQ mask 0x%04x, PCI irq %d\n",
  875. socket->socket.irq_mask, socket->cb_irq);
  876. }
  877. /*
  878. * Initialize the standard cardbus registers
  879. */
  880. static void yenta_config_init(struct yenta_socket *socket)
  881. {
  882. u16 bridge;
  883. struct pci_dev *dev = socket->dev;
  884. struct pci_bus_region region;
  885. pcibios_resource_to_bus(socket->dev, &region, &dev->resource[0]);
  886. config_writel(socket, CB_LEGACY_MODE_BASE, 0);
  887. config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
  888. config_writew(socket, PCI_COMMAND,
  889. PCI_COMMAND_IO |
  890. PCI_COMMAND_MEMORY |
  891. PCI_COMMAND_MASTER |
  892. PCI_COMMAND_WAIT);
  893. /* MAGIC NUMBERS! Fixme */
  894. config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
  895. config_writeb(socket, PCI_LATENCY_TIMER, 168);
  896. config_writel(socket, PCI_PRIMARY_BUS,
  897. (176 << 24) | /* sec. latency timer */
  898. (dev->subordinate->subordinate << 16) | /* subordinate bus */
  899. (dev->subordinate->secondary << 8) | /* secondary bus */
  900. dev->subordinate->primary); /* primary bus */
  901. /*
  902. * Set up the bridging state:
  903. * - enable write posting.
  904. * - memory window 0 prefetchable, window 1 non-prefetchable
  905. * - PCI interrupts enabled if a PCI interrupt exists..
  906. */
  907. bridge = config_readw(socket, CB_BRIDGE_CONTROL);
  908. bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
  909. bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
  910. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  911. }
  912. /**
  913. * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
  914. * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
  915. *
  916. * Checks if devices on the bus which the CardBus bridge bridges to would be
  917. * invisible during PCI scans because of a misconfigured subordinate number
  918. * of the parent brige - some BIOSes seem to be too lazy to set it right.
  919. * Does the fixup carefully by checking how far it can go without conflicts.
  920. * See http\://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
  921. */
  922. static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
  923. {
  924. struct list_head *tmp;
  925. unsigned char upper_limit;
  926. /*
  927. * We only check and fix the parent bridge: All systems which need
  928. * this fixup that have been reviewed are laptops and the only bridge
  929. * which needed fixing was the parent bridge of the CardBus bridge:
  930. */
  931. struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
  932. /* Check bus numbers are already set up correctly: */
  933. if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate)
  934. return; /* The subordinate number is ok, nothing to do */
  935. if (!bridge_to_fix->parent)
  936. return; /* Root bridges are ok */
  937. /* stay within the limits of the bus range of the parent: */
  938. upper_limit = bridge_to_fix->parent->subordinate;
  939. /* check the bus ranges of all silbling bridges to prevent overlap */
  940. list_for_each(tmp, &bridge_to_fix->parent->children) {
  941. struct pci_bus *silbling = pci_bus_b(tmp);
  942. /*
  943. * If the silbling has a higher secondary bus number
  944. * and it's secondary is equal or smaller than our
  945. * current upper limit, set the new upper limit to
  946. * the bus number below the silbling's range:
  947. */
  948. if (silbling->secondary > bridge_to_fix->subordinate
  949. && silbling->secondary <= upper_limit)
  950. upper_limit = silbling->secondary - 1;
  951. }
  952. /* Show that the wanted subordinate number is not possible: */
  953. if (cardbus_bridge->subordinate > upper_limit)
  954. dev_printk(KERN_WARNING, &cardbus_bridge->dev,
  955. "Upper limit for fixing this "
  956. "bridge's parent bridge: #%02x\n", upper_limit);
  957. /* If we have room to increase the bridge's subordinate number, */
  958. if (bridge_to_fix->subordinate < upper_limit) {
  959. /* use the highest number of the hidden bus, within limits */
  960. unsigned char subordinate_to_assign =
  961. min(cardbus_bridge->subordinate, upper_limit);
  962. dev_printk(KERN_INFO, &bridge_to_fix->dev,
  963. "Raising subordinate bus# of parent "
  964. "bus (#%02x) from #%02x to #%02x\n",
  965. bridge_to_fix->number,
  966. bridge_to_fix->subordinate, subordinate_to_assign);
  967. /* Save the new subordinate in the bus struct of the bridge */
  968. bridge_to_fix->subordinate = subordinate_to_assign;
  969. /* and update the PCI config space with the new subordinate */
  970. pci_write_config_byte(bridge_to_fix->self,
  971. PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate);
  972. }
  973. }
  974. /*
  975. * Initialize a cardbus controller. Make sure we have a usable
  976. * interrupt, and that we can map the cardbus area. Fill in the
  977. * socket information structure..
  978. */
  979. static int __devinit yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
  980. {
  981. struct yenta_socket *socket;
  982. int ret;
  983. /*
  984. * If we failed to assign proper bus numbers for this cardbus
  985. * controller during PCI probe, its subordinate pci_bus is NULL.
  986. * Bail out if so.
  987. */
  988. if (!dev->subordinate) {
  989. dev_printk(KERN_ERR, &dev->dev, "no bus associated! "
  990. "(try 'pci=assign-busses')\n");
  991. return -ENODEV;
  992. }
  993. socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
  994. if (!socket)
  995. return -ENOMEM;
  996. /* prepare pcmcia_socket */
  997. socket->socket.ops = &yenta_socket_operations;
  998. socket->socket.resource_ops = &pccard_nonstatic_ops;
  999. socket->socket.dev.parent = &dev->dev;
  1000. socket->socket.driver_data = socket;
  1001. socket->socket.owner = THIS_MODULE;
  1002. socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
  1003. socket->socket.map_size = 0x1000;
  1004. socket->socket.cb_dev = dev;
  1005. /* prepare struct yenta_socket */
  1006. socket->dev = dev;
  1007. pci_set_drvdata(dev, socket);
  1008. /*
  1009. * Do some basic sanity checking..
  1010. */
  1011. if (pci_enable_device(dev)) {
  1012. ret = -EBUSY;
  1013. goto free;
  1014. }
  1015. ret = pci_request_regions(dev, "yenta_socket");
  1016. if (ret)
  1017. goto disable;
  1018. if (!pci_resource_start(dev, 0)) {
  1019. dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n");
  1020. ret = -ENODEV;
  1021. goto release;
  1022. }
  1023. /*
  1024. * Ok, start setup.. Map the cardbus registers,
  1025. * and request the IRQ.
  1026. */
  1027. socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
  1028. if (!socket->base) {
  1029. ret = -ENOMEM;
  1030. goto release;
  1031. }
  1032. /*
  1033. * report the subsystem vendor and device for help debugging
  1034. * the irq stuff...
  1035. */
  1036. dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n",
  1037. dev->subsystem_vendor, dev->subsystem_device);
  1038. yenta_config_init(socket);
  1039. /* Disable all events */
  1040. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  1041. /* Set up the bridge regions.. */
  1042. yenta_allocate_resources(socket);
  1043. socket->cb_irq = dev->irq;
  1044. /* Do we have special options for the device? */
  1045. if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
  1046. id->driver_data < ARRAY_SIZE(cardbus_type)) {
  1047. socket->type = &cardbus_type[id->driver_data];
  1048. ret = socket->type->override(socket);
  1049. if (ret < 0)
  1050. goto unmap;
  1051. }
  1052. /* We must finish initialization here */
  1053. if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
  1054. /* No IRQ or request_irq failed. Poll */
  1055. socket->cb_irq = 0; /* But zero is a valid IRQ number. */
  1056. init_timer(&socket->poll_timer);
  1057. socket->poll_timer.function = yenta_interrupt_wrapper;
  1058. socket->poll_timer.data = (unsigned long)socket;
  1059. socket->poll_timer.expires = jiffies + HZ;
  1060. add_timer(&socket->poll_timer);
  1061. dev_printk(KERN_INFO, &dev->dev,
  1062. "no PCI IRQ, CardBus support disabled for this "
  1063. "socket.\n");
  1064. dev_printk(KERN_INFO, &dev->dev,
  1065. "check your BIOS CardBus, BIOS IRQ or ACPI "
  1066. "settings.\n");
  1067. } else {
  1068. socket->socket.features |= SS_CAP_CARDBUS;
  1069. }
  1070. /* Figure out what the dang thing can do for the PCMCIA layer... */
  1071. yenta_interrogate(socket);
  1072. yenta_get_socket_capabilities(socket, isa_interrupts);
  1073. dev_printk(KERN_INFO, &dev->dev,
  1074. "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
  1075. yenta_fixup_parent_bridge(dev->subordinate);
  1076. /* Register it with the pcmcia layer.. */
  1077. ret = pcmcia_register_socket(&socket->socket);
  1078. if (ret == 0) {
  1079. /* Add the yenta register attributes */
  1080. ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
  1081. if (ret == 0)
  1082. goto out;
  1083. /* error path... */
  1084. pcmcia_unregister_socket(&socket->socket);
  1085. }
  1086. unmap:
  1087. iounmap(socket->base);
  1088. release:
  1089. pci_release_regions(dev);
  1090. disable:
  1091. pci_disable_device(dev);
  1092. free:
  1093. kfree(socket);
  1094. out:
  1095. return ret;
  1096. }
  1097. #ifdef CONFIG_PM
  1098. static int yenta_dev_suspend_noirq(struct device *dev)
  1099. {
  1100. struct pci_dev *pdev = to_pci_dev(dev);
  1101. struct yenta_socket *socket = pci_get_drvdata(pdev);
  1102. int ret;
  1103. ret = pcmcia_socket_dev_suspend(dev);
  1104. if (!socket)
  1105. return ret;
  1106. if (socket->type && socket->type->save_state)
  1107. socket->type->save_state(socket);
  1108. pci_save_state(pdev);
  1109. pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
  1110. pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
  1111. pci_disable_device(pdev);
  1112. /*
  1113. * Some laptops (IBM T22) do not like us putting the Cardbus
  1114. * bridge into D3. At a guess, some other laptop will
  1115. * probably require this, so leave it commented out for now.
  1116. */
  1117. /* pci_set_power_state(dev, 3); */
  1118. return ret;
  1119. }
  1120. static int yenta_dev_resume_noirq(struct device *dev)
  1121. {
  1122. struct pci_dev *pdev = to_pci_dev(dev);
  1123. struct yenta_socket *socket = pci_get_drvdata(pdev);
  1124. int ret;
  1125. if (!socket)
  1126. return 0;
  1127. pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
  1128. pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
  1129. ret = pci_enable_device(pdev);
  1130. if (ret)
  1131. return ret;
  1132. pci_set_master(pdev);
  1133. if (socket->type && socket->type->restore_state)
  1134. socket->type->restore_state(socket);
  1135. pcmcia_socket_dev_early_resume(dev);
  1136. return 0;
  1137. }
  1138. static int yenta_dev_resume(struct device *dev)
  1139. {
  1140. pcmcia_socket_dev_late_resume(dev);
  1141. return 0;
  1142. }
  1143. static const struct dev_pm_ops yenta_pm_ops = {
  1144. .suspend_noirq = yenta_dev_suspend_noirq,
  1145. .resume_noirq = yenta_dev_resume_noirq,
  1146. .resume = yenta_dev_resume,
  1147. .freeze_noirq = yenta_dev_suspend_noirq,
  1148. .thaw_noirq = yenta_dev_resume_noirq,
  1149. .thaw = yenta_dev_resume,
  1150. .poweroff_noirq = yenta_dev_suspend_noirq,
  1151. .restore_noirq = yenta_dev_resume_noirq,
  1152. .restore = yenta_dev_resume,
  1153. };
  1154. #define YENTA_PM_OPS (&yenta_pm_ops)
  1155. #else
  1156. #define YENTA_PM_OPS NULL
  1157. #endif
  1158. #define CB_ID(vend, dev, type) \
  1159. { \
  1160. .vendor = vend, \
  1161. .device = dev, \
  1162. .subvendor = PCI_ANY_ID, \
  1163. .subdevice = PCI_ANY_ID, \
  1164. .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
  1165. .class_mask = ~0, \
  1166. .driver_data = CARDBUS_TYPE_##type, \
  1167. }
  1168. static struct pci_device_id yenta_table[] = {
  1169. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
  1170. /*
  1171. * TBD: Check if these TI variants can use more
  1172. * advanced overrides instead. (I can't get the
  1173. * data sheets for these devices. --rmk)
  1174. */
  1175. #ifdef CONFIG_YENTA_TI
  1176. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
  1177. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
  1178. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
  1179. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
  1180. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
  1181. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
  1182. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
  1183. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
  1184. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
  1185. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
  1186. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
  1187. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
  1188. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
  1189. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
  1190. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
  1191. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
  1192. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
  1193. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
  1194. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
  1195. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
  1196. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
  1197. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
  1198. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
  1199. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
  1200. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
  1201. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
  1202. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
  1203. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
  1204. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
  1205. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
  1206. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
  1207. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
  1208. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
  1209. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
  1210. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
  1211. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
  1212. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
  1213. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
  1214. #endif /* CONFIG_YENTA_TI */
  1215. #ifdef CONFIG_YENTA_RICOH
  1216. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
  1217. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
  1218. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
  1219. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
  1220. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
  1221. #endif
  1222. #ifdef CONFIG_YENTA_TOSHIBA
  1223. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
  1224. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
  1225. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
  1226. #endif
  1227. #ifdef CONFIG_YENTA_O2
  1228. CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
  1229. #endif
  1230. /* match any cardbus bridge */
  1231. CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
  1232. { /* all zeroes */ }
  1233. };
  1234. MODULE_DEVICE_TABLE(pci, yenta_table);
  1235. static struct pci_driver yenta_cardbus_driver = {
  1236. .name = "yenta_cardbus",
  1237. .id_table = yenta_table,
  1238. .probe = yenta_probe,
  1239. .remove = __devexit_p(yenta_close),
  1240. .driver.pm = YENTA_PM_OPS,
  1241. };
  1242. static int __init yenta_socket_init(void)
  1243. {
  1244. return pci_register_driver(&yenta_cardbus_driver);
  1245. }
  1246. static void __exit yenta_socket_exit(void)
  1247. {
  1248. pci_unregister_driver(&yenta_cardbus_driver);
  1249. }
  1250. module_init(yenta_socket_init);
  1251. module_exit(yenta_socket_exit);
  1252. MODULE_LICENSE("GPL");