qla_os.c 105 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/moduleparam.h>
  9. #include <linux/vmalloc.h>
  10. #include <linux/delay.h>
  11. #include <linux/kthread.h>
  12. #include <linux/mutex.h>
  13. #include <linux/kobject.h>
  14. #include <linux/slab.h>
  15. #include <scsi/scsi_tcq.h>
  16. #include <scsi/scsicam.h>
  17. #include <scsi/scsi_transport.h>
  18. #include <scsi/scsi_transport_fc.h>
  19. /*
  20. * Driver version
  21. */
  22. char qla2x00_version_str[40];
  23. static int apidev_major;
  24. /*
  25. * SRB allocation cache
  26. */
  27. static struct kmem_cache *srb_cachep;
  28. /*
  29. * CT6 CTX allocation cache
  30. */
  31. static struct kmem_cache *ctx_cachep;
  32. int ql2xlogintimeout = 20;
  33. module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
  34. MODULE_PARM_DESC(ql2xlogintimeout,
  35. "Login timeout value in seconds.");
  36. int qlport_down_retry;
  37. module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
  38. MODULE_PARM_DESC(qlport_down_retry,
  39. "Maximum number of command retries to a port that returns "
  40. "a PORT-DOWN status.");
  41. int ql2xplogiabsentdevice;
  42. module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  43. MODULE_PARM_DESC(ql2xplogiabsentdevice,
  44. "Option to enable PLOGI to devices that are not present after "
  45. "a Fabric scan. This is needed for several broken switches. "
  46. "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  47. int ql2xloginretrycount = 0;
  48. module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
  49. MODULE_PARM_DESC(ql2xloginretrycount,
  50. "Specify an alternate value for the NVRAM login retry count.");
  51. int ql2xallocfwdump = 1;
  52. module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
  53. MODULE_PARM_DESC(ql2xallocfwdump,
  54. "Option to enable allocation of memory for a firmware dump "
  55. "during HBA initialization. Memory allocation requirements "
  56. "vary by ISP type. Default is 1 - allocate memory.");
  57. int ql2xextended_error_logging;
  58. module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  59. MODULE_PARM_DESC(ql2xextended_error_logging,
  60. "Option to enable extended error logging, "
  61. "Default is 0 - no logging. 1 - log errors.");
  62. int ql2xshiftctondsd = 6;
  63. module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
  64. MODULE_PARM_DESC(ql2xshiftctondsd,
  65. "Set to control shifting of command type processing "
  66. "based on total number of SG elements.");
  67. static void qla2x00_free_device(scsi_qla_host_t *);
  68. int ql2xfdmienable=1;
  69. module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
  70. MODULE_PARM_DESC(ql2xfdmienable,
  71. "Enables FDMI registrations. "
  72. "0 - no FDMI. Default is 1 - perform FDMI.");
  73. #define MAX_Q_DEPTH 32
  74. static int ql2xmaxqdepth = MAX_Q_DEPTH;
  75. module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(ql2xmaxqdepth,
  77. "Maximum queue depth to report for target devices.");
  78. /* Do not change the value of this after module load */
  79. int ql2xenabledif = 1;
  80. module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
  81. MODULE_PARM_DESC(ql2xenabledif,
  82. " Enable T10-CRC-DIF "
  83. " Default is 0 - No DIF Support. 1 - Enable it");
  84. int ql2xenablehba_err_chk;
  85. module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
  86. MODULE_PARM_DESC(ql2xenablehba_err_chk,
  87. " Enable T10-CRC-DIF Error isolation by HBA"
  88. " Default is 0 - Error isolation disabled, 1 - Enable it");
  89. int ql2xiidmaenable=1;
  90. module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
  91. MODULE_PARM_DESC(ql2xiidmaenable,
  92. "Enables iIDMA settings "
  93. "Default is 1 - perform iIDMA. 0 - no iIDMA.");
  94. int ql2xmaxqueues = 1;
  95. module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
  96. MODULE_PARM_DESC(ql2xmaxqueues,
  97. "Enables MQ settings "
  98. "Default is 1 for single queue. Set it to number \
  99. of queues in MQ mode.");
  100. int ql2xmultique_tag;
  101. module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
  102. MODULE_PARM_DESC(ql2xmultique_tag,
  103. "Enables CPU affinity settings for the driver "
  104. "Default is 0 for no affinity of request and response IO. "
  105. "Set it to 1 to turn on the cpu affinity.");
  106. int ql2xfwloadbin;
  107. module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
  108. MODULE_PARM_DESC(ql2xfwloadbin,
  109. "Option to specify location from which to load ISP firmware:\n"
  110. " 2 -- load firmware via the request_firmware() (hotplug)\n"
  111. " interface.\n"
  112. " 1 -- load firmware from flash.\n"
  113. " 0 -- use default semantics.\n");
  114. int ql2xetsenable;
  115. module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
  116. MODULE_PARM_DESC(ql2xetsenable,
  117. "Enables firmware ETS burst."
  118. "Default is 0 - skip ETS enablement.");
  119. int ql2xdbwr;
  120. module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
  121. MODULE_PARM_DESC(ql2xdbwr,
  122. "Option to specify scheme for request queue posting\n"
  123. " 0 -- Regular doorbell.\n"
  124. " 1 -- CAMRAM doorbell (faster).\n");
  125. int ql2xdontresethba;
  126. module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
  127. MODULE_PARM_DESC(ql2xdontresethba,
  128. "Option to specify reset behaviour\n"
  129. " 0 (Default) -- Reset on failure.\n"
  130. " 1 -- Do not reset on failure.\n");
  131. int ql2xtargetreset = 1;
  132. module_param(ql2xtargetreset, int, S_IRUGO|S_IRUSR);
  133. MODULE_PARM_DESC(ql2xtargetreset,
  134. "Enable target reset."
  135. "Default is 1 - use hw defaults.");
  136. int ql2xasynctmfenable;
  137. module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
  138. MODULE_PARM_DESC(ql2xasynctmfenable,
  139. "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
  140. "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
  141. /*
  142. * SCSI host template entry points
  143. */
  144. static int qla2xxx_slave_configure(struct scsi_device * device);
  145. static int qla2xxx_slave_alloc(struct scsi_device *);
  146. static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
  147. static void qla2xxx_scan_start(struct Scsi_Host *);
  148. static void qla2xxx_slave_destroy(struct scsi_device *);
  149. static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
  150. void (*fn)(struct scsi_cmnd *));
  151. static int qla2xxx_eh_abort(struct scsi_cmnd *);
  152. static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
  153. static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
  154. static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
  155. static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
  156. static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
  157. static int qla2x00_change_queue_type(struct scsi_device *, int);
  158. struct scsi_host_template qla2xxx_driver_template = {
  159. .module = THIS_MODULE,
  160. .name = QLA2XXX_DRIVER_NAME,
  161. .queuecommand = qla2xxx_queuecommand,
  162. .eh_abort_handler = qla2xxx_eh_abort,
  163. .eh_device_reset_handler = qla2xxx_eh_device_reset,
  164. .eh_target_reset_handler = qla2xxx_eh_target_reset,
  165. .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
  166. .eh_host_reset_handler = qla2xxx_eh_host_reset,
  167. .slave_configure = qla2xxx_slave_configure,
  168. .slave_alloc = qla2xxx_slave_alloc,
  169. .slave_destroy = qla2xxx_slave_destroy,
  170. .scan_finished = qla2xxx_scan_finished,
  171. .scan_start = qla2xxx_scan_start,
  172. .change_queue_depth = qla2x00_change_queue_depth,
  173. .change_queue_type = qla2x00_change_queue_type,
  174. .this_id = -1,
  175. .cmd_per_lun = 3,
  176. .use_clustering = ENABLE_CLUSTERING,
  177. .sg_tablesize = SG_ALL,
  178. .max_sectors = 0xFFFF,
  179. .shost_attrs = qla2x00_host_attrs,
  180. };
  181. static struct scsi_transport_template *qla2xxx_transport_template = NULL;
  182. struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
  183. /* TODO Convert to inlines
  184. *
  185. * Timer routines
  186. */
  187. __inline__ void
  188. qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
  189. {
  190. init_timer(&vha->timer);
  191. vha->timer.expires = jiffies + interval * HZ;
  192. vha->timer.data = (unsigned long)vha;
  193. vha->timer.function = (void (*)(unsigned long))func;
  194. add_timer(&vha->timer);
  195. vha->timer_active = 1;
  196. }
  197. static inline void
  198. qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
  199. {
  200. /* Currently used for 82XX only. */
  201. if (vha->device_flags & DFLG_DEV_FAILED)
  202. return;
  203. mod_timer(&vha->timer, jiffies + interval * HZ);
  204. }
  205. static __inline__ void
  206. qla2x00_stop_timer(scsi_qla_host_t *vha)
  207. {
  208. del_timer_sync(&vha->timer);
  209. vha->timer_active = 0;
  210. }
  211. static int qla2x00_do_dpc(void *data);
  212. static void qla2x00_rst_aen(scsi_qla_host_t *);
  213. static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
  214. struct req_que **, struct rsp_que **);
  215. static void qla2x00_mem_free(struct qla_hw_data *);
  216. static void qla2x00_sp_free_dma(srb_t *);
  217. /* -------------------------------------------------------------------------- */
  218. static int qla2x00_alloc_queues(struct qla_hw_data *ha)
  219. {
  220. ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
  221. GFP_KERNEL);
  222. if (!ha->req_q_map) {
  223. qla_printk(KERN_WARNING, ha,
  224. "Unable to allocate memory for request queue ptrs\n");
  225. goto fail_req_map;
  226. }
  227. ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
  228. GFP_KERNEL);
  229. if (!ha->rsp_q_map) {
  230. qla_printk(KERN_WARNING, ha,
  231. "Unable to allocate memory for response queue ptrs\n");
  232. goto fail_rsp_map;
  233. }
  234. set_bit(0, ha->rsp_qid_map);
  235. set_bit(0, ha->req_qid_map);
  236. return 1;
  237. fail_rsp_map:
  238. kfree(ha->req_q_map);
  239. ha->req_q_map = NULL;
  240. fail_req_map:
  241. return -ENOMEM;
  242. }
  243. static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
  244. {
  245. if (req && req->ring)
  246. dma_free_coherent(&ha->pdev->dev,
  247. (req->length + 1) * sizeof(request_t),
  248. req->ring, req->dma);
  249. kfree(req);
  250. req = NULL;
  251. }
  252. static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
  253. {
  254. if (rsp && rsp->ring)
  255. dma_free_coherent(&ha->pdev->dev,
  256. (rsp->length + 1) * sizeof(response_t),
  257. rsp->ring, rsp->dma);
  258. kfree(rsp);
  259. rsp = NULL;
  260. }
  261. static void qla2x00_free_queues(struct qla_hw_data *ha)
  262. {
  263. struct req_que *req;
  264. struct rsp_que *rsp;
  265. int cnt;
  266. for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
  267. req = ha->req_q_map[cnt];
  268. qla2x00_free_req_que(ha, req);
  269. }
  270. kfree(ha->req_q_map);
  271. ha->req_q_map = NULL;
  272. for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
  273. rsp = ha->rsp_q_map[cnt];
  274. qla2x00_free_rsp_que(ha, rsp);
  275. }
  276. kfree(ha->rsp_q_map);
  277. ha->rsp_q_map = NULL;
  278. }
  279. static int qla25xx_setup_mode(struct scsi_qla_host *vha)
  280. {
  281. uint16_t options = 0;
  282. int ques, req, ret;
  283. struct qla_hw_data *ha = vha->hw;
  284. if (!(ha->fw_attributes & BIT_6)) {
  285. qla_printk(KERN_INFO, ha,
  286. "Firmware is not multi-queue capable\n");
  287. goto fail;
  288. }
  289. if (ql2xmultique_tag) {
  290. /* create a request queue for IO */
  291. options |= BIT_7;
  292. req = qla25xx_create_req_que(ha, options, 0, 0, -1,
  293. QLA_DEFAULT_QUE_QOS);
  294. if (!req) {
  295. qla_printk(KERN_WARNING, ha,
  296. "Can't create request queue\n");
  297. goto fail;
  298. }
  299. ha->wq = create_workqueue("qla2xxx_wq");
  300. vha->req = ha->req_q_map[req];
  301. options |= BIT_1;
  302. for (ques = 1; ques < ha->max_rsp_queues; ques++) {
  303. ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
  304. if (!ret) {
  305. qla_printk(KERN_WARNING, ha,
  306. "Response Queue create failed\n");
  307. goto fail2;
  308. }
  309. }
  310. ha->flags.cpu_affinity_enabled = 1;
  311. DEBUG2(qla_printk(KERN_INFO, ha,
  312. "CPU affinity mode enabled, no. of response"
  313. " queues:%d, no. of request queues:%d\n",
  314. ha->max_rsp_queues, ha->max_req_queues));
  315. }
  316. return 0;
  317. fail2:
  318. qla25xx_delete_queues(vha);
  319. destroy_workqueue(ha->wq);
  320. ha->wq = NULL;
  321. fail:
  322. ha->mqenable = 0;
  323. kfree(ha->req_q_map);
  324. kfree(ha->rsp_q_map);
  325. ha->max_req_queues = ha->max_rsp_queues = 1;
  326. return 1;
  327. }
  328. static char *
  329. qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
  330. {
  331. struct qla_hw_data *ha = vha->hw;
  332. static char *pci_bus_modes[] = {
  333. "33", "66", "100", "133",
  334. };
  335. uint16_t pci_bus;
  336. strcpy(str, "PCI");
  337. pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
  338. if (pci_bus) {
  339. strcat(str, "-X (");
  340. strcat(str, pci_bus_modes[pci_bus]);
  341. } else {
  342. pci_bus = (ha->pci_attr & BIT_8) >> 8;
  343. strcat(str, " (");
  344. strcat(str, pci_bus_modes[pci_bus]);
  345. }
  346. strcat(str, " MHz)");
  347. return (str);
  348. }
  349. static char *
  350. qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
  351. {
  352. static char *pci_bus_modes[] = { "33", "66", "100", "133", };
  353. struct qla_hw_data *ha = vha->hw;
  354. uint32_t pci_bus;
  355. int pcie_reg;
  356. pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  357. if (pcie_reg) {
  358. char lwstr[6];
  359. uint16_t pcie_lstat, lspeed, lwidth;
  360. pcie_reg += 0x12;
  361. pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
  362. lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
  363. lwidth = (pcie_lstat &
  364. (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
  365. strcpy(str, "PCIe (");
  366. if (lspeed == 1)
  367. strcat(str, "2.5GT/s ");
  368. else if (lspeed == 2)
  369. strcat(str, "5.0GT/s ");
  370. else
  371. strcat(str, "<unknown> ");
  372. snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
  373. strcat(str, lwstr);
  374. return str;
  375. }
  376. strcpy(str, "PCI");
  377. pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
  378. if (pci_bus == 0 || pci_bus == 8) {
  379. strcat(str, " (");
  380. strcat(str, pci_bus_modes[pci_bus >> 3]);
  381. } else {
  382. strcat(str, "-X ");
  383. if (pci_bus & BIT_2)
  384. strcat(str, "Mode 2");
  385. else
  386. strcat(str, "Mode 1");
  387. strcat(str, " (");
  388. strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
  389. }
  390. strcat(str, " MHz)");
  391. return str;
  392. }
  393. static char *
  394. qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
  395. {
  396. char un_str[10];
  397. struct qla_hw_data *ha = vha->hw;
  398. sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
  399. ha->fw_minor_version,
  400. ha->fw_subminor_version);
  401. if (ha->fw_attributes & BIT_9) {
  402. strcat(str, "FLX");
  403. return (str);
  404. }
  405. switch (ha->fw_attributes & 0xFF) {
  406. case 0x7:
  407. strcat(str, "EF");
  408. break;
  409. case 0x17:
  410. strcat(str, "TP");
  411. break;
  412. case 0x37:
  413. strcat(str, "IP");
  414. break;
  415. case 0x77:
  416. strcat(str, "VI");
  417. break;
  418. default:
  419. sprintf(un_str, "(%x)", ha->fw_attributes);
  420. strcat(str, un_str);
  421. break;
  422. }
  423. if (ha->fw_attributes & 0x100)
  424. strcat(str, "X");
  425. return (str);
  426. }
  427. static char *
  428. qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
  429. {
  430. struct qla_hw_data *ha = vha->hw;
  431. sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
  432. ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
  433. return str;
  434. }
  435. static inline srb_t *
  436. qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
  437. struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  438. {
  439. srb_t *sp;
  440. struct qla_hw_data *ha = vha->hw;
  441. sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
  442. if (!sp)
  443. return sp;
  444. atomic_set(&sp->ref_count, 1);
  445. sp->fcport = fcport;
  446. sp->cmd = cmd;
  447. sp->flags = 0;
  448. CMD_SP(cmd) = (void *)sp;
  449. cmd->scsi_done = done;
  450. sp->ctx = NULL;
  451. return sp;
  452. }
  453. static int
  454. qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  455. {
  456. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  457. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  458. struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
  459. struct qla_hw_data *ha = vha->hw;
  460. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  461. srb_t *sp;
  462. int rval;
  463. if (ha->flags.eeh_busy) {
  464. if (ha->flags.pci_channel_io_perm_failure)
  465. cmd->result = DID_NO_CONNECT << 16;
  466. else
  467. cmd->result = DID_REQUEUE << 16;
  468. goto qc24_fail_command;
  469. }
  470. rval = fc_remote_port_chkready(rport);
  471. if (rval) {
  472. cmd->result = rval;
  473. goto qc24_fail_command;
  474. }
  475. /* Close window on fcport/rport state-transitioning. */
  476. if (fcport->drport)
  477. goto qc24_target_busy;
  478. if (!vha->flags.difdix_supported &&
  479. scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
  480. DEBUG2(qla_printk(KERN_ERR, ha,
  481. "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
  482. cmd->cmnd[0]));
  483. cmd->result = DID_NO_CONNECT << 16;
  484. goto qc24_fail_command;
  485. }
  486. if (atomic_read(&fcport->state) != FCS_ONLINE) {
  487. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
  488. atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  489. cmd->result = DID_NO_CONNECT << 16;
  490. goto qc24_fail_command;
  491. }
  492. goto qc24_target_busy;
  493. }
  494. spin_unlock_irq(vha->host->host_lock);
  495. sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
  496. if (!sp)
  497. goto qc24_host_busy_lock;
  498. rval = ha->isp_ops->start_scsi(sp);
  499. if (rval != QLA_SUCCESS)
  500. goto qc24_host_busy_free_sp;
  501. spin_lock_irq(vha->host->host_lock);
  502. return 0;
  503. qc24_host_busy_free_sp:
  504. qla2x00_sp_free_dma(sp);
  505. mempool_free(sp, ha->srb_mempool);
  506. qc24_host_busy_lock:
  507. spin_lock_irq(vha->host->host_lock);
  508. return SCSI_MLQUEUE_HOST_BUSY;
  509. qc24_target_busy:
  510. return SCSI_MLQUEUE_TARGET_BUSY;
  511. qc24_fail_command:
  512. done(cmd);
  513. return 0;
  514. }
  515. /*
  516. * qla2x00_eh_wait_on_command
  517. * Waits for the command to be returned by the Firmware for some
  518. * max time.
  519. *
  520. * Input:
  521. * cmd = Scsi Command to wait on.
  522. *
  523. * Return:
  524. * Not Found : 0
  525. * Found : 1
  526. */
  527. static int
  528. qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
  529. {
  530. #define ABORT_POLLING_PERIOD 1000
  531. #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
  532. unsigned long wait_iter = ABORT_WAIT_ITER;
  533. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  534. struct qla_hw_data *ha = vha->hw;
  535. int ret = QLA_SUCCESS;
  536. if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
  537. DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
  538. return ret;
  539. }
  540. while (CMD_SP(cmd) && wait_iter--) {
  541. msleep(ABORT_POLLING_PERIOD);
  542. }
  543. if (CMD_SP(cmd))
  544. ret = QLA_FUNCTION_FAILED;
  545. return ret;
  546. }
  547. /*
  548. * qla2x00_wait_for_hba_online
  549. * Wait till the HBA is online after going through
  550. * <= MAX_RETRIES_OF_ISP_ABORT or
  551. * finally HBA is disabled ie marked offline
  552. *
  553. * Input:
  554. * ha - pointer to host adapter structure
  555. *
  556. * Note:
  557. * Does context switching-Release SPIN_LOCK
  558. * (if any) before calling this routine.
  559. *
  560. * Return:
  561. * Success (Adapter is online) : 0
  562. * Failed (Adapter is offline/disabled) : 1
  563. */
  564. int
  565. qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
  566. {
  567. int return_status;
  568. unsigned long wait_online;
  569. struct qla_hw_data *ha = vha->hw;
  570. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  571. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  572. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  573. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  574. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  575. ha->dpc_active) && time_before(jiffies, wait_online)) {
  576. msleep(1000);
  577. }
  578. if (base_vha->flags.online)
  579. return_status = QLA_SUCCESS;
  580. else
  581. return_status = QLA_FUNCTION_FAILED;
  582. return (return_status);
  583. }
  584. /*
  585. * qla2x00_wait_for_reset_ready
  586. * Wait till the HBA is online after going through
  587. * <= MAX_RETRIES_OF_ISP_ABORT or
  588. * finally HBA is disabled ie marked offline or flash
  589. * operations are in progress.
  590. *
  591. * Input:
  592. * ha - pointer to host adapter structure
  593. *
  594. * Note:
  595. * Does context switching-Release SPIN_LOCK
  596. * (if any) before calling this routine.
  597. *
  598. * Return:
  599. * Success (Adapter is online/no flash ops) : 0
  600. * Failed (Adapter is offline/disabled/flash ops in progress) : 1
  601. */
  602. int
  603. qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
  604. {
  605. int return_status;
  606. unsigned long wait_online;
  607. struct qla_hw_data *ha = vha->hw;
  608. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  609. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  610. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  611. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  612. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  613. ha->optrom_state != QLA_SWAITING ||
  614. ha->dpc_active) && time_before(jiffies, wait_online))
  615. msleep(1000);
  616. if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
  617. return_status = QLA_SUCCESS;
  618. else
  619. return_status = QLA_FUNCTION_FAILED;
  620. DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
  621. return return_status;
  622. }
  623. int
  624. qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
  625. {
  626. int return_status;
  627. unsigned long wait_reset;
  628. struct qla_hw_data *ha = vha->hw;
  629. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  630. wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  631. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  632. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  633. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  634. ha->dpc_active) && time_before(jiffies, wait_reset)) {
  635. msleep(1000);
  636. if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
  637. ha->flags.chip_reset_done)
  638. break;
  639. }
  640. if (ha->flags.chip_reset_done)
  641. return_status = QLA_SUCCESS;
  642. else
  643. return_status = QLA_FUNCTION_FAILED;
  644. return return_status;
  645. }
  646. /*
  647. * qla2x00_wait_for_loop_ready
  648. * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
  649. * to be in LOOP_READY state.
  650. * Input:
  651. * ha - pointer to host adapter structure
  652. *
  653. * Note:
  654. * Does context switching-Release SPIN_LOCK
  655. * (if any) before calling this routine.
  656. *
  657. *
  658. * Return:
  659. * Success (LOOP_READY) : 0
  660. * Failed (LOOP_NOT_READY) : 1
  661. */
  662. static inline int
  663. qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
  664. {
  665. int return_status = QLA_SUCCESS;
  666. unsigned long loop_timeout ;
  667. struct qla_hw_data *ha = vha->hw;
  668. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  669. /* wait for 5 min at the max for loop to be ready */
  670. loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  671. while ((!atomic_read(&base_vha->loop_down_timer) &&
  672. atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
  673. atomic_read(&base_vha->loop_state) != LOOP_READY) {
  674. if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  675. return_status = QLA_FUNCTION_FAILED;
  676. break;
  677. }
  678. msleep(1000);
  679. if (time_after_eq(jiffies, loop_timeout)) {
  680. return_status = QLA_FUNCTION_FAILED;
  681. break;
  682. }
  683. }
  684. return (return_status);
  685. }
  686. static void
  687. sp_get(struct srb *sp)
  688. {
  689. atomic_inc(&sp->ref_count);
  690. }
  691. /**************************************************************************
  692. * qla2xxx_eh_abort
  693. *
  694. * Description:
  695. * The abort function will abort the specified command.
  696. *
  697. * Input:
  698. * cmd = Linux SCSI command packet to be aborted.
  699. *
  700. * Returns:
  701. * Either SUCCESS or FAILED.
  702. *
  703. * Note:
  704. * Only return FAILED if command not returned by firmware.
  705. **************************************************************************/
  706. static int
  707. qla2xxx_eh_abort(struct scsi_cmnd *cmd)
  708. {
  709. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  710. srb_t *sp;
  711. int ret, i;
  712. unsigned int id, lun;
  713. unsigned long serial;
  714. unsigned long flags;
  715. int wait = 0;
  716. struct qla_hw_data *ha = vha->hw;
  717. struct req_que *req = vha->req;
  718. srb_t *spt;
  719. int got_ref = 0;
  720. fc_block_scsi_eh(cmd);
  721. if (!CMD_SP(cmd))
  722. return SUCCESS;
  723. ret = SUCCESS;
  724. id = cmd->device->id;
  725. lun = cmd->device->lun;
  726. serial = cmd->serial_number;
  727. spt = (srb_t *) CMD_SP(cmd);
  728. if (!spt)
  729. return SUCCESS;
  730. /* Check active list for command command. */
  731. spin_lock_irqsave(&ha->hardware_lock, flags);
  732. for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
  733. sp = req->outstanding_cmds[i];
  734. if (sp == NULL)
  735. continue;
  736. if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID) &&
  737. !IS_PROT_IO(sp))
  738. continue;
  739. if (sp->cmd != cmd)
  740. continue;
  741. DEBUG2(printk("%s(%ld): aborting sp %p from RISC."
  742. " pid=%ld.\n", __func__, vha->host_no, sp, serial));
  743. /* Get a reference to the sp and drop the lock.*/
  744. sp_get(sp);
  745. got_ref++;
  746. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  747. if (ha->isp_ops->abort_command(sp)) {
  748. DEBUG2(printk("%s(%ld): abort_command "
  749. "mbx failed.\n", __func__, vha->host_no));
  750. ret = FAILED;
  751. } else {
  752. DEBUG3(printk("%s(%ld): abort_command "
  753. "mbx success.\n", __func__, vha->host_no));
  754. wait = 1;
  755. }
  756. spin_lock_irqsave(&ha->hardware_lock, flags);
  757. break;
  758. }
  759. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  760. /* Wait for the command to be returned. */
  761. if (wait) {
  762. if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
  763. qla_printk(KERN_ERR, ha,
  764. "scsi(%ld:%d:%d): Abort handler timed out -- %lx "
  765. "%x.\n", vha->host_no, id, lun, serial, ret);
  766. ret = FAILED;
  767. }
  768. }
  769. if (got_ref)
  770. qla2x00_sp_compl(ha, sp);
  771. qla_printk(KERN_INFO, ha,
  772. "scsi(%ld:%d:%d): Abort command issued -- %d %lx %x.\n",
  773. vha->host_no, id, lun, wait, serial, ret);
  774. return ret;
  775. }
  776. enum nexus_wait_type {
  777. WAIT_HOST = 0,
  778. WAIT_TARGET,
  779. WAIT_LUN,
  780. };
  781. static int
  782. qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
  783. unsigned int l, srb_t *sp, enum nexus_wait_type type)
  784. {
  785. int cnt, match, status;
  786. unsigned long flags;
  787. struct qla_hw_data *ha = vha->hw;
  788. struct req_que *req;
  789. status = QLA_SUCCESS;
  790. if (!sp)
  791. return status;
  792. spin_lock_irqsave(&ha->hardware_lock, flags);
  793. req = vha->req;
  794. for (cnt = 1; status == QLA_SUCCESS &&
  795. cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  796. sp = req->outstanding_cmds[cnt];
  797. if (!sp)
  798. continue;
  799. if ((sp->ctx) && !IS_PROT_IO(sp))
  800. continue;
  801. if (vha->vp_idx != sp->fcport->vha->vp_idx)
  802. continue;
  803. match = 0;
  804. switch (type) {
  805. case WAIT_HOST:
  806. match = 1;
  807. break;
  808. case WAIT_TARGET:
  809. match = sp->cmd->device->id == t;
  810. break;
  811. case WAIT_LUN:
  812. match = (sp->cmd->device->id == t &&
  813. sp->cmd->device->lun == l);
  814. break;
  815. }
  816. if (!match)
  817. continue;
  818. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  819. status = qla2x00_eh_wait_on_command(sp->cmd);
  820. spin_lock_irqsave(&ha->hardware_lock, flags);
  821. }
  822. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  823. return status;
  824. }
  825. void qla82xx_wait_for_pending_commands(scsi_qla_host_t *vha)
  826. {
  827. int cnt;
  828. srb_t *sp;
  829. struct req_que *req = vha->req;
  830. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  831. "Waiting for pending commands\n"));
  832. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  833. sp = req->outstanding_cmds[cnt];
  834. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0,
  835. sp, WAIT_HOST) == QLA_SUCCESS) {
  836. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  837. "Done wait for pending commands\n"));
  838. }
  839. }
  840. }
  841. static char *reset_errors[] = {
  842. "HBA not online",
  843. "HBA not ready",
  844. "Task management failed",
  845. "Waiting for command completions",
  846. };
  847. static int
  848. __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
  849. struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
  850. {
  851. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  852. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  853. int err;
  854. fc_block_scsi_eh(cmd);
  855. if (!fcport)
  856. return FAILED;
  857. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
  858. vha->host_no, cmd->device->id, cmd->device->lun, name);
  859. err = 0;
  860. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  861. goto eh_reset_failed;
  862. err = 1;
  863. if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
  864. goto eh_reset_failed;
  865. err = 2;
  866. if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
  867. != QLA_SUCCESS)
  868. goto eh_reset_failed;
  869. err = 3;
  870. if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
  871. cmd->device->lun, (srb_t *) CMD_SP(cmd), type) != QLA_SUCCESS)
  872. goto eh_reset_failed;
  873. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
  874. vha->host_no, cmd->device->id, cmd->device->lun, name);
  875. return SUCCESS;
  876. eh_reset_failed:
  877. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
  878. , vha->host_no, cmd->device->id, cmd->device->lun, name,
  879. reset_errors[err]);
  880. return FAILED;
  881. }
  882. static int
  883. qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
  884. {
  885. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  886. struct qla_hw_data *ha = vha->hw;
  887. return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
  888. ha->isp_ops->lun_reset);
  889. }
  890. static int
  891. qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
  892. {
  893. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  894. struct qla_hw_data *ha = vha->hw;
  895. return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
  896. ha->isp_ops->target_reset);
  897. }
  898. /**************************************************************************
  899. * qla2xxx_eh_bus_reset
  900. *
  901. * Description:
  902. * The bus reset function will reset the bus and abort any executing
  903. * commands.
  904. *
  905. * Input:
  906. * cmd = Linux SCSI command packet of the command that cause the
  907. * bus reset.
  908. *
  909. * Returns:
  910. * SUCCESS/FAILURE (defined as macro in scsi.h).
  911. *
  912. **************************************************************************/
  913. static int
  914. qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
  915. {
  916. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  917. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  918. int ret = FAILED;
  919. unsigned int id, lun;
  920. unsigned long serial;
  921. srb_t *sp = (srb_t *) CMD_SP(cmd);
  922. fc_block_scsi_eh(cmd);
  923. id = cmd->device->id;
  924. lun = cmd->device->lun;
  925. serial = cmd->serial_number;
  926. if (!fcport)
  927. return ret;
  928. qla_printk(KERN_INFO, vha->hw,
  929. "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
  930. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
  931. DEBUG2(printk("%s failed:board disabled\n",__func__));
  932. goto eh_bus_reset_done;
  933. }
  934. if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
  935. if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
  936. ret = SUCCESS;
  937. }
  938. if (ret == FAILED)
  939. goto eh_bus_reset_done;
  940. /* Flush outstanding commands. */
  941. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) !=
  942. QLA_SUCCESS)
  943. ret = FAILED;
  944. eh_bus_reset_done:
  945. qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
  946. (ret == FAILED) ? "failed" : "succeded");
  947. return ret;
  948. }
  949. /**************************************************************************
  950. * qla2xxx_eh_host_reset
  951. *
  952. * Description:
  953. * The reset function will reset the Adapter.
  954. *
  955. * Input:
  956. * cmd = Linux SCSI command packet of the command that cause the
  957. * adapter reset.
  958. *
  959. * Returns:
  960. * Either SUCCESS or FAILED.
  961. *
  962. * Note:
  963. **************************************************************************/
  964. static int
  965. qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
  966. {
  967. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  968. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  969. struct qla_hw_data *ha = vha->hw;
  970. int ret = FAILED;
  971. unsigned int id, lun;
  972. unsigned long serial;
  973. srb_t *sp = (srb_t *) CMD_SP(cmd);
  974. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  975. fc_block_scsi_eh(cmd);
  976. id = cmd->device->id;
  977. lun = cmd->device->lun;
  978. serial = cmd->serial_number;
  979. if (!fcport)
  980. return ret;
  981. qla_printk(KERN_INFO, ha,
  982. "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
  983. if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
  984. goto eh_host_reset_lock;
  985. /*
  986. * Fixme-may be dpc thread is active and processing
  987. * loop_resync,so wait a while for it to
  988. * be completed and then issue big hammer.Otherwise
  989. * it may cause I/O failure as big hammer marks the
  990. * devices as lost kicking of the port_down_timer
  991. * while dpc is stuck for the mailbox to complete.
  992. */
  993. qla2x00_wait_for_loop_ready(vha);
  994. if (vha != base_vha) {
  995. if (qla2x00_vp_abort_isp(vha))
  996. goto eh_host_reset_lock;
  997. } else {
  998. if (IS_QLA82XX(vha->hw)) {
  999. if (!qla82xx_fcoe_ctx_reset(vha)) {
  1000. /* Ctx reset success */
  1001. ret = SUCCESS;
  1002. goto eh_host_reset_lock;
  1003. }
  1004. /* fall thru if ctx reset failed */
  1005. }
  1006. if (ha->wq)
  1007. flush_workqueue(ha->wq);
  1008. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  1009. if (ha->isp_ops->abort_isp(base_vha)) {
  1010. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  1011. /* failed. schedule dpc to try */
  1012. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  1013. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  1014. goto eh_host_reset_lock;
  1015. }
  1016. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  1017. }
  1018. /* Waiting for command to be returned to OS.*/
  1019. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) ==
  1020. QLA_SUCCESS)
  1021. ret = SUCCESS;
  1022. eh_host_reset_lock:
  1023. qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
  1024. (ret == FAILED) ? "failed" : "succeded");
  1025. return ret;
  1026. }
  1027. /*
  1028. * qla2x00_loop_reset
  1029. * Issue loop reset.
  1030. *
  1031. * Input:
  1032. * ha = adapter block pointer.
  1033. *
  1034. * Returns:
  1035. * 0 = success
  1036. */
  1037. int
  1038. qla2x00_loop_reset(scsi_qla_host_t *vha)
  1039. {
  1040. int ret;
  1041. struct fc_port *fcport;
  1042. struct qla_hw_data *ha = vha->hw;
  1043. if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
  1044. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1045. if (fcport->port_type != FCT_TARGET)
  1046. continue;
  1047. ret = ha->isp_ops->target_reset(fcport, 0, 0);
  1048. if (ret != QLA_SUCCESS) {
  1049. DEBUG2_3(printk("%s(%ld): bus_reset failed: "
  1050. "target_reset=%d d_id=%x.\n", __func__,
  1051. vha->host_no, ret, fcport->d_id.b24));
  1052. }
  1053. }
  1054. }
  1055. if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
  1056. ret = qla2x00_full_login_lip(vha);
  1057. if (ret != QLA_SUCCESS) {
  1058. DEBUG2_3(printk("%s(%ld): failed: "
  1059. "full_login_lip=%d.\n", __func__, vha->host_no,
  1060. ret));
  1061. }
  1062. atomic_set(&vha->loop_state, LOOP_DOWN);
  1063. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  1064. qla2x00_mark_all_devices_lost(vha, 0);
  1065. qla2x00_wait_for_loop_ready(vha);
  1066. }
  1067. if (ha->flags.enable_lip_reset) {
  1068. ret = qla2x00_lip_reset(vha);
  1069. if (ret != QLA_SUCCESS) {
  1070. DEBUG2_3(printk("%s(%ld): failed: "
  1071. "lip_reset=%d.\n", __func__, vha->host_no, ret));
  1072. } else
  1073. qla2x00_wait_for_loop_ready(vha);
  1074. }
  1075. /* Issue marker command only when we are going to start the I/O */
  1076. vha->marker_needed = 1;
  1077. return QLA_SUCCESS;
  1078. }
  1079. void
  1080. qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
  1081. {
  1082. int que, cnt;
  1083. unsigned long flags;
  1084. srb_t *sp;
  1085. struct srb_ctx *ctx;
  1086. struct qla_hw_data *ha = vha->hw;
  1087. struct req_que *req;
  1088. spin_lock_irqsave(&ha->hardware_lock, flags);
  1089. for (que = 0; que < ha->max_req_queues; que++) {
  1090. req = ha->req_q_map[que];
  1091. if (!req)
  1092. continue;
  1093. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  1094. sp = req->outstanding_cmds[cnt];
  1095. if (sp) {
  1096. req->outstanding_cmds[cnt] = NULL;
  1097. if (!sp->ctx ||
  1098. (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
  1099. IS_PROT_IO(sp)) {
  1100. sp->cmd->result = res;
  1101. qla2x00_sp_compl(ha, sp);
  1102. } else {
  1103. ctx = sp->ctx;
  1104. if (ctx->type == SRB_LOGIN_CMD ||
  1105. ctx->type == SRB_LOGOUT_CMD) {
  1106. ctx->u.iocb_cmd->free(sp);
  1107. } else {
  1108. struct fc_bsg_job *bsg_job =
  1109. ctx->u.bsg_job;
  1110. if (bsg_job->request->msgcode
  1111. == FC_BSG_HST_CT)
  1112. kfree(sp->fcport);
  1113. bsg_job->req->errors = 0;
  1114. bsg_job->reply->result = res;
  1115. bsg_job->job_done(bsg_job);
  1116. kfree(sp->ctx);
  1117. mempool_free(sp,
  1118. ha->srb_mempool);
  1119. }
  1120. }
  1121. }
  1122. }
  1123. }
  1124. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1125. }
  1126. static int
  1127. qla2xxx_slave_alloc(struct scsi_device *sdev)
  1128. {
  1129. struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
  1130. if (!rport || fc_remote_port_chkready(rport))
  1131. return -ENXIO;
  1132. sdev->hostdata = *(fc_port_t **)rport->dd_data;
  1133. return 0;
  1134. }
  1135. static int
  1136. qla2xxx_slave_configure(struct scsi_device *sdev)
  1137. {
  1138. scsi_qla_host_t *vha = shost_priv(sdev->host);
  1139. struct qla_hw_data *ha = vha->hw;
  1140. struct fc_rport *rport = starget_to_rport(sdev->sdev_target);
  1141. struct req_que *req = vha->req;
  1142. if (sdev->tagged_supported)
  1143. scsi_activate_tcq(sdev, req->max_q_depth);
  1144. else
  1145. scsi_deactivate_tcq(sdev, req->max_q_depth);
  1146. rport->dev_loss_tmo = ha->port_down_retry_count;
  1147. return 0;
  1148. }
  1149. static void
  1150. qla2xxx_slave_destroy(struct scsi_device *sdev)
  1151. {
  1152. sdev->hostdata = NULL;
  1153. }
  1154. static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
  1155. {
  1156. fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
  1157. if (!scsi_track_queue_full(sdev, qdepth))
  1158. return;
  1159. DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
  1160. "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
  1161. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1162. sdev->queue_depth));
  1163. }
  1164. static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
  1165. {
  1166. fc_port_t *fcport = sdev->hostdata;
  1167. struct scsi_qla_host *vha = fcport->vha;
  1168. struct qla_hw_data *ha = vha->hw;
  1169. struct req_que *req = NULL;
  1170. req = vha->req;
  1171. if (!req)
  1172. return;
  1173. if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
  1174. return;
  1175. if (sdev->ordered_tags)
  1176. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
  1177. else
  1178. scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
  1179. DEBUG2(qla_printk(KERN_INFO, ha,
  1180. "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
  1181. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1182. sdev->queue_depth));
  1183. }
  1184. static int
  1185. qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
  1186. {
  1187. switch (reason) {
  1188. case SCSI_QDEPTH_DEFAULT:
  1189. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1190. break;
  1191. case SCSI_QDEPTH_QFULL:
  1192. qla2x00_handle_queue_full(sdev, qdepth);
  1193. break;
  1194. case SCSI_QDEPTH_RAMP_UP:
  1195. qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
  1196. break;
  1197. default:
  1198. return -EOPNOTSUPP;
  1199. }
  1200. return sdev->queue_depth;
  1201. }
  1202. static int
  1203. qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
  1204. {
  1205. if (sdev->tagged_supported) {
  1206. scsi_set_tag_type(sdev, tag_type);
  1207. if (tag_type)
  1208. scsi_activate_tcq(sdev, sdev->queue_depth);
  1209. else
  1210. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  1211. } else
  1212. tag_type = 0;
  1213. return tag_type;
  1214. }
  1215. /**
  1216. * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
  1217. * @ha: HA context
  1218. *
  1219. * At exit, the @ha's flags.enable_64bit_addressing set to indicated
  1220. * supported addressing method.
  1221. */
  1222. static void
  1223. qla2x00_config_dma_addressing(struct qla_hw_data *ha)
  1224. {
  1225. /* Assume a 32bit DMA mask. */
  1226. ha->flags.enable_64bit_addressing = 0;
  1227. if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
  1228. /* Any upper-dword bits set? */
  1229. if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
  1230. !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
  1231. /* Ok, a 64bit DMA mask is applicable. */
  1232. ha->flags.enable_64bit_addressing = 1;
  1233. ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
  1234. ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
  1235. return;
  1236. }
  1237. }
  1238. dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
  1239. pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
  1240. }
  1241. static void
  1242. qla2x00_enable_intrs(struct qla_hw_data *ha)
  1243. {
  1244. unsigned long flags = 0;
  1245. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1246. spin_lock_irqsave(&ha->hardware_lock, flags);
  1247. ha->interrupts_on = 1;
  1248. /* enable risc and host interrupts */
  1249. WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
  1250. RD_REG_WORD(&reg->ictrl);
  1251. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1252. }
  1253. static void
  1254. qla2x00_disable_intrs(struct qla_hw_data *ha)
  1255. {
  1256. unsigned long flags = 0;
  1257. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1258. spin_lock_irqsave(&ha->hardware_lock, flags);
  1259. ha->interrupts_on = 0;
  1260. /* disable risc and host interrupts */
  1261. WRT_REG_WORD(&reg->ictrl, 0);
  1262. RD_REG_WORD(&reg->ictrl);
  1263. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1264. }
  1265. static void
  1266. qla24xx_enable_intrs(struct qla_hw_data *ha)
  1267. {
  1268. unsigned long flags = 0;
  1269. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1270. spin_lock_irqsave(&ha->hardware_lock, flags);
  1271. ha->interrupts_on = 1;
  1272. WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
  1273. RD_REG_DWORD(&reg->ictrl);
  1274. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1275. }
  1276. static void
  1277. qla24xx_disable_intrs(struct qla_hw_data *ha)
  1278. {
  1279. unsigned long flags = 0;
  1280. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1281. if (IS_NOPOLLING_TYPE(ha))
  1282. return;
  1283. spin_lock_irqsave(&ha->hardware_lock, flags);
  1284. ha->interrupts_on = 0;
  1285. WRT_REG_DWORD(&reg->ictrl, 0);
  1286. RD_REG_DWORD(&reg->ictrl);
  1287. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1288. }
  1289. static struct isp_operations qla2100_isp_ops = {
  1290. .pci_config = qla2100_pci_config,
  1291. .reset_chip = qla2x00_reset_chip,
  1292. .chip_diag = qla2x00_chip_diag,
  1293. .config_rings = qla2x00_config_rings,
  1294. .reset_adapter = qla2x00_reset_adapter,
  1295. .nvram_config = qla2x00_nvram_config,
  1296. .update_fw_options = qla2x00_update_fw_options,
  1297. .load_risc = qla2x00_load_risc,
  1298. .pci_info_str = qla2x00_pci_info_str,
  1299. .fw_version_str = qla2x00_fw_version_str,
  1300. .intr_handler = qla2100_intr_handler,
  1301. .enable_intrs = qla2x00_enable_intrs,
  1302. .disable_intrs = qla2x00_disable_intrs,
  1303. .abort_command = qla2x00_abort_command,
  1304. .target_reset = qla2x00_abort_target,
  1305. .lun_reset = qla2x00_lun_reset,
  1306. .fabric_login = qla2x00_login_fabric,
  1307. .fabric_logout = qla2x00_fabric_logout,
  1308. .calc_req_entries = qla2x00_calc_iocbs_32,
  1309. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1310. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1311. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1312. .read_nvram = qla2x00_read_nvram_data,
  1313. .write_nvram = qla2x00_write_nvram_data,
  1314. .fw_dump = qla2100_fw_dump,
  1315. .beacon_on = NULL,
  1316. .beacon_off = NULL,
  1317. .beacon_blink = NULL,
  1318. .read_optrom = qla2x00_read_optrom_data,
  1319. .write_optrom = qla2x00_write_optrom_data,
  1320. .get_flash_version = qla2x00_get_flash_version,
  1321. .start_scsi = qla2x00_start_scsi,
  1322. .abort_isp = qla2x00_abort_isp,
  1323. };
  1324. static struct isp_operations qla2300_isp_ops = {
  1325. .pci_config = qla2300_pci_config,
  1326. .reset_chip = qla2x00_reset_chip,
  1327. .chip_diag = qla2x00_chip_diag,
  1328. .config_rings = qla2x00_config_rings,
  1329. .reset_adapter = qla2x00_reset_adapter,
  1330. .nvram_config = qla2x00_nvram_config,
  1331. .update_fw_options = qla2x00_update_fw_options,
  1332. .load_risc = qla2x00_load_risc,
  1333. .pci_info_str = qla2x00_pci_info_str,
  1334. .fw_version_str = qla2x00_fw_version_str,
  1335. .intr_handler = qla2300_intr_handler,
  1336. .enable_intrs = qla2x00_enable_intrs,
  1337. .disable_intrs = qla2x00_disable_intrs,
  1338. .abort_command = qla2x00_abort_command,
  1339. .target_reset = qla2x00_abort_target,
  1340. .lun_reset = qla2x00_lun_reset,
  1341. .fabric_login = qla2x00_login_fabric,
  1342. .fabric_logout = qla2x00_fabric_logout,
  1343. .calc_req_entries = qla2x00_calc_iocbs_32,
  1344. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1345. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1346. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1347. .read_nvram = qla2x00_read_nvram_data,
  1348. .write_nvram = qla2x00_write_nvram_data,
  1349. .fw_dump = qla2300_fw_dump,
  1350. .beacon_on = qla2x00_beacon_on,
  1351. .beacon_off = qla2x00_beacon_off,
  1352. .beacon_blink = qla2x00_beacon_blink,
  1353. .read_optrom = qla2x00_read_optrom_data,
  1354. .write_optrom = qla2x00_write_optrom_data,
  1355. .get_flash_version = qla2x00_get_flash_version,
  1356. .start_scsi = qla2x00_start_scsi,
  1357. .abort_isp = qla2x00_abort_isp,
  1358. };
  1359. static struct isp_operations qla24xx_isp_ops = {
  1360. .pci_config = qla24xx_pci_config,
  1361. .reset_chip = qla24xx_reset_chip,
  1362. .chip_diag = qla24xx_chip_diag,
  1363. .config_rings = qla24xx_config_rings,
  1364. .reset_adapter = qla24xx_reset_adapter,
  1365. .nvram_config = qla24xx_nvram_config,
  1366. .update_fw_options = qla24xx_update_fw_options,
  1367. .load_risc = qla24xx_load_risc,
  1368. .pci_info_str = qla24xx_pci_info_str,
  1369. .fw_version_str = qla24xx_fw_version_str,
  1370. .intr_handler = qla24xx_intr_handler,
  1371. .enable_intrs = qla24xx_enable_intrs,
  1372. .disable_intrs = qla24xx_disable_intrs,
  1373. .abort_command = qla24xx_abort_command,
  1374. .target_reset = qla24xx_abort_target,
  1375. .lun_reset = qla24xx_lun_reset,
  1376. .fabric_login = qla24xx_login_fabric,
  1377. .fabric_logout = qla24xx_fabric_logout,
  1378. .calc_req_entries = NULL,
  1379. .build_iocbs = NULL,
  1380. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1381. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1382. .read_nvram = qla24xx_read_nvram_data,
  1383. .write_nvram = qla24xx_write_nvram_data,
  1384. .fw_dump = qla24xx_fw_dump,
  1385. .beacon_on = qla24xx_beacon_on,
  1386. .beacon_off = qla24xx_beacon_off,
  1387. .beacon_blink = qla24xx_beacon_blink,
  1388. .read_optrom = qla24xx_read_optrom_data,
  1389. .write_optrom = qla24xx_write_optrom_data,
  1390. .get_flash_version = qla24xx_get_flash_version,
  1391. .start_scsi = qla24xx_start_scsi,
  1392. .abort_isp = qla2x00_abort_isp,
  1393. };
  1394. static struct isp_operations qla25xx_isp_ops = {
  1395. .pci_config = qla25xx_pci_config,
  1396. .reset_chip = qla24xx_reset_chip,
  1397. .chip_diag = qla24xx_chip_diag,
  1398. .config_rings = qla24xx_config_rings,
  1399. .reset_adapter = qla24xx_reset_adapter,
  1400. .nvram_config = qla24xx_nvram_config,
  1401. .update_fw_options = qla24xx_update_fw_options,
  1402. .load_risc = qla24xx_load_risc,
  1403. .pci_info_str = qla24xx_pci_info_str,
  1404. .fw_version_str = qla24xx_fw_version_str,
  1405. .intr_handler = qla24xx_intr_handler,
  1406. .enable_intrs = qla24xx_enable_intrs,
  1407. .disable_intrs = qla24xx_disable_intrs,
  1408. .abort_command = qla24xx_abort_command,
  1409. .target_reset = qla24xx_abort_target,
  1410. .lun_reset = qla24xx_lun_reset,
  1411. .fabric_login = qla24xx_login_fabric,
  1412. .fabric_logout = qla24xx_fabric_logout,
  1413. .calc_req_entries = NULL,
  1414. .build_iocbs = NULL,
  1415. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1416. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1417. .read_nvram = qla25xx_read_nvram_data,
  1418. .write_nvram = qla25xx_write_nvram_data,
  1419. .fw_dump = qla25xx_fw_dump,
  1420. .beacon_on = qla24xx_beacon_on,
  1421. .beacon_off = qla24xx_beacon_off,
  1422. .beacon_blink = qla24xx_beacon_blink,
  1423. .read_optrom = qla25xx_read_optrom_data,
  1424. .write_optrom = qla24xx_write_optrom_data,
  1425. .get_flash_version = qla24xx_get_flash_version,
  1426. .start_scsi = qla24xx_dif_start_scsi,
  1427. .abort_isp = qla2x00_abort_isp,
  1428. };
  1429. static struct isp_operations qla81xx_isp_ops = {
  1430. .pci_config = qla25xx_pci_config,
  1431. .reset_chip = qla24xx_reset_chip,
  1432. .chip_diag = qla24xx_chip_diag,
  1433. .config_rings = qla24xx_config_rings,
  1434. .reset_adapter = qla24xx_reset_adapter,
  1435. .nvram_config = qla81xx_nvram_config,
  1436. .update_fw_options = qla81xx_update_fw_options,
  1437. .load_risc = qla81xx_load_risc,
  1438. .pci_info_str = qla24xx_pci_info_str,
  1439. .fw_version_str = qla24xx_fw_version_str,
  1440. .intr_handler = qla24xx_intr_handler,
  1441. .enable_intrs = qla24xx_enable_intrs,
  1442. .disable_intrs = qla24xx_disable_intrs,
  1443. .abort_command = qla24xx_abort_command,
  1444. .target_reset = qla24xx_abort_target,
  1445. .lun_reset = qla24xx_lun_reset,
  1446. .fabric_login = qla24xx_login_fabric,
  1447. .fabric_logout = qla24xx_fabric_logout,
  1448. .calc_req_entries = NULL,
  1449. .build_iocbs = NULL,
  1450. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1451. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1452. .read_nvram = NULL,
  1453. .write_nvram = NULL,
  1454. .fw_dump = qla81xx_fw_dump,
  1455. .beacon_on = qla24xx_beacon_on,
  1456. .beacon_off = qla24xx_beacon_off,
  1457. .beacon_blink = qla24xx_beacon_blink,
  1458. .read_optrom = qla25xx_read_optrom_data,
  1459. .write_optrom = qla24xx_write_optrom_data,
  1460. .get_flash_version = qla24xx_get_flash_version,
  1461. .start_scsi = qla24xx_dif_start_scsi,
  1462. .abort_isp = qla2x00_abort_isp,
  1463. };
  1464. static struct isp_operations qla82xx_isp_ops = {
  1465. .pci_config = qla82xx_pci_config,
  1466. .reset_chip = qla82xx_reset_chip,
  1467. .chip_diag = qla24xx_chip_diag,
  1468. .config_rings = qla82xx_config_rings,
  1469. .reset_adapter = qla24xx_reset_adapter,
  1470. .nvram_config = qla81xx_nvram_config,
  1471. .update_fw_options = qla24xx_update_fw_options,
  1472. .load_risc = qla82xx_load_risc,
  1473. .pci_info_str = qla82xx_pci_info_str,
  1474. .fw_version_str = qla24xx_fw_version_str,
  1475. .intr_handler = qla82xx_intr_handler,
  1476. .enable_intrs = qla82xx_enable_intrs,
  1477. .disable_intrs = qla82xx_disable_intrs,
  1478. .abort_command = qla24xx_abort_command,
  1479. .target_reset = qla24xx_abort_target,
  1480. .lun_reset = qla24xx_lun_reset,
  1481. .fabric_login = qla24xx_login_fabric,
  1482. .fabric_logout = qla24xx_fabric_logout,
  1483. .calc_req_entries = NULL,
  1484. .build_iocbs = NULL,
  1485. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1486. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1487. .read_nvram = qla24xx_read_nvram_data,
  1488. .write_nvram = qla24xx_write_nvram_data,
  1489. .fw_dump = qla24xx_fw_dump,
  1490. .beacon_on = qla24xx_beacon_on,
  1491. .beacon_off = qla24xx_beacon_off,
  1492. .beacon_blink = qla24xx_beacon_blink,
  1493. .read_optrom = qla82xx_read_optrom_data,
  1494. .write_optrom = qla82xx_write_optrom_data,
  1495. .get_flash_version = qla24xx_get_flash_version,
  1496. .start_scsi = qla82xx_start_scsi,
  1497. .abort_isp = qla82xx_abort_isp,
  1498. };
  1499. static inline void
  1500. qla2x00_set_isp_flags(struct qla_hw_data *ha)
  1501. {
  1502. ha->device_type = DT_EXTENDED_IDS;
  1503. switch (ha->pdev->device) {
  1504. case PCI_DEVICE_ID_QLOGIC_ISP2100:
  1505. ha->device_type |= DT_ISP2100;
  1506. ha->device_type &= ~DT_EXTENDED_IDS;
  1507. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1508. break;
  1509. case PCI_DEVICE_ID_QLOGIC_ISP2200:
  1510. ha->device_type |= DT_ISP2200;
  1511. ha->device_type &= ~DT_EXTENDED_IDS;
  1512. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1513. break;
  1514. case PCI_DEVICE_ID_QLOGIC_ISP2300:
  1515. ha->device_type |= DT_ISP2300;
  1516. ha->device_type |= DT_ZIO_SUPPORTED;
  1517. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1518. break;
  1519. case PCI_DEVICE_ID_QLOGIC_ISP2312:
  1520. ha->device_type |= DT_ISP2312;
  1521. ha->device_type |= DT_ZIO_SUPPORTED;
  1522. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1523. break;
  1524. case PCI_DEVICE_ID_QLOGIC_ISP2322:
  1525. ha->device_type |= DT_ISP2322;
  1526. ha->device_type |= DT_ZIO_SUPPORTED;
  1527. if (ha->pdev->subsystem_vendor == 0x1028 &&
  1528. ha->pdev->subsystem_device == 0x0170)
  1529. ha->device_type |= DT_OEM_001;
  1530. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1531. break;
  1532. case PCI_DEVICE_ID_QLOGIC_ISP6312:
  1533. ha->device_type |= DT_ISP6312;
  1534. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1535. break;
  1536. case PCI_DEVICE_ID_QLOGIC_ISP6322:
  1537. ha->device_type |= DT_ISP6322;
  1538. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1539. break;
  1540. case PCI_DEVICE_ID_QLOGIC_ISP2422:
  1541. ha->device_type |= DT_ISP2422;
  1542. ha->device_type |= DT_ZIO_SUPPORTED;
  1543. ha->device_type |= DT_FWI2;
  1544. ha->device_type |= DT_IIDMA;
  1545. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1546. break;
  1547. case PCI_DEVICE_ID_QLOGIC_ISP2432:
  1548. ha->device_type |= DT_ISP2432;
  1549. ha->device_type |= DT_ZIO_SUPPORTED;
  1550. ha->device_type |= DT_FWI2;
  1551. ha->device_type |= DT_IIDMA;
  1552. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1553. break;
  1554. case PCI_DEVICE_ID_QLOGIC_ISP8432:
  1555. ha->device_type |= DT_ISP8432;
  1556. ha->device_type |= DT_ZIO_SUPPORTED;
  1557. ha->device_type |= DT_FWI2;
  1558. ha->device_type |= DT_IIDMA;
  1559. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1560. break;
  1561. case PCI_DEVICE_ID_QLOGIC_ISP5422:
  1562. ha->device_type |= DT_ISP5422;
  1563. ha->device_type |= DT_FWI2;
  1564. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1565. break;
  1566. case PCI_DEVICE_ID_QLOGIC_ISP5432:
  1567. ha->device_type |= DT_ISP5432;
  1568. ha->device_type |= DT_FWI2;
  1569. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1570. break;
  1571. case PCI_DEVICE_ID_QLOGIC_ISP2532:
  1572. ha->device_type |= DT_ISP2532;
  1573. ha->device_type |= DT_ZIO_SUPPORTED;
  1574. ha->device_type |= DT_FWI2;
  1575. ha->device_type |= DT_IIDMA;
  1576. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1577. break;
  1578. case PCI_DEVICE_ID_QLOGIC_ISP8001:
  1579. ha->device_type |= DT_ISP8001;
  1580. ha->device_type |= DT_ZIO_SUPPORTED;
  1581. ha->device_type |= DT_FWI2;
  1582. ha->device_type |= DT_IIDMA;
  1583. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1584. break;
  1585. case PCI_DEVICE_ID_QLOGIC_ISP8021:
  1586. ha->device_type |= DT_ISP8021;
  1587. ha->device_type |= DT_ZIO_SUPPORTED;
  1588. ha->device_type |= DT_FWI2;
  1589. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1590. /* Initialize 82XX ISP flags */
  1591. qla82xx_init_flags(ha);
  1592. break;
  1593. }
  1594. if (IS_QLA82XX(ha))
  1595. ha->port_no = !(ha->portnum & 1);
  1596. else
  1597. /* Get adapter physical port no from interrupt pin register. */
  1598. pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
  1599. if (ha->port_no & 1)
  1600. ha->flags.port0 = 1;
  1601. else
  1602. ha->flags.port0 = 0;
  1603. }
  1604. static int
  1605. qla2x00_iospace_config(struct qla_hw_data *ha)
  1606. {
  1607. resource_size_t pio;
  1608. uint16_t msix;
  1609. int cpus;
  1610. if (IS_QLA82XX(ha))
  1611. return qla82xx_iospace_config(ha);
  1612. if (pci_request_selected_regions(ha->pdev, ha->bars,
  1613. QLA2XXX_DRIVER_NAME)) {
  1614. qla_printk(KERN_WARNING, ha,
  1615. "Failed to reserve PIO/MMIO regions (%s)\n",
  1616. pci_name(ha->pdev));
  1617. goto iospace_error_exit;
  1618. }
  1619. if (!(ha->bars & 1))
  1620. goto skip_pio;
  1621. /* We only need PIO for Flash operations on ISP2312 v2 chips. */
  1622. pio = pci_resource_start(ha->pdev, 0);
  1623. if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
  1624. if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
  1625. qla_printk(KERN_WARNING, ha,
  1626. "Invalid PCI I/O region size (%s)...\n",
  1627. pci_name(ha->pdev));
  1628. pio = 0;
  1629. }
  1630. } else {
  1631. qla_printk(KERN_WARNING, ha,
  1632. "region #0 not a PIO resource (%s)...\n",
  1633. pci_name(ha->pdev));
  1634. pio = 0;
  1635. }
  1636. ha->pio_address = pio;
  1637. skip_pio:
  1638. /* Use MMIO operations for all accesses. */
  1639. if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
  1640. qla_printk(KERN_ERR, ha,
  1641. "region #1 not an MMIO resource (%s), aborting\n",
  1642. pci_name(ha->pdev));
  1643. goto iospace_error_exit;
  1644. }
  1645. if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
  1646. qla_printk(KERN_ERR, ha,
  1647. "Invalid PCI mem region size (%s), aborting\n",
  1648. pci_name(ha->pdev));
  1649. goto iospace_error_exit;
  1650. }
  1651. ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
  1652. if (!ha->iobase) {
  1653. qla_printk(KERN_ERR, ha,
  1654. "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
  1655. goto iospace_error_exit;
  1656. }
  1657. /* Determine queue resources */
  1658. ha->max_req_queues = ha->max_rsp_queues = 1;
  1659. if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
  1660. (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
  1661. (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
  1662. goto mqiobase_exit;
  1663. ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
  1664. pci_resource_len(ha->pdev, 3));
  1665. if (ha->mqiobase) {
  1666. /* Read MSIX vector size of the board */
  1667. pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
  1668. ha->msix_count = msix;
  1669. /* Max queues are bounded by available msix vectors */
  1670. /* queue 0 uses two msix vectors */
  1671. if (ql2xmultique_tag) {
  1672. cpus = num_online_cpus();
  1673. ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
  1674. (cpus + 1) : (ha->msix_count - 1);
  1675. ha->max_req_queues = 2;
  1676. } else if (ql2xmaxqueues > 1) {
  1677. ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
  1678. QLA_MQ_SIZE : ql2xmaxqueues;
  1679. DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
  1680. " of request queues:%d\n", ha->max_req_queues));
  1681. }
  1682. qla_printk(KERN_INFO, ha,
  1683. "MSI-X vector count: %d\n", msix);
  1684. } else
  1685. qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
  1686. mqiobase_exit:
  1687. ha->msix_count = ha->max_rsp_queues + 1;
  1688. return (0);
  1689. iospace_error_exit:
  1690. return (-ENOMEM);
  1691. }
  1692. static void
  1693. qla2xxx_scan_start(struct Scsi_Host *shost)
  1694. {
  1695. scsi_qla_host_t *vha = shost_priv(shost);
  1696. if (vha->hw->flags.running_gold_fw)
  1697. return;
  1698. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1699. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1700. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1701. set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
  1702. }
  1703. static int
  1704. qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
  1705. {
  1706. scsi_qla_host_t *vha = shost_priv(shost);
  1707. if (!vha->host)
  1708. return 1;
  1709. if (time > vha->hw->loop_reset_delay * HZ)
  1710. return 1;
  1711. return atomic_read(&vha->loop_state) == LOOP_READY;
  1712. }
  1713. /*
  1714. * PCI driver interface
  1715. */
  1716. static int __devinit
  1717. qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
  1718. {
  1719. int ret = -ENODEV;
  1720. struct Scsi_Host *host;
  1721. scsi_qla_host_t *base_vha = NULL;
  1722. struct qla_hw_data *ha;
  1723. char pci_info[30];
  1724. char fw_str[30];
  1725. struct scsi_host_template *sht;
  1726. int bars, max_id, mem_only = 0;
  1727. uint16_t req_length = 0, rsp_length = 0;
  1728. struct req_que *req = NULL;
  1729. struct rsp_que *rsp = NULL;
  1730. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  1731. sht = &qla2xxx_driver_template;
  1732. if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
  1733. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
  1734. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
  1735. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
  1736. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
  1737. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
  1738. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
  1739. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
  1740. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1741. mem_only = 1;
  1742. }
  1743. if (mem_only) {
  1744. if (pci_enable_device_mem(pdev))
  1745. goto probe_out;
  1746. } else {
  1747. if (pci_enable_device(pdev))
  1748. goto probe_out;
  1749. }
  1750. /* This may fail but that's ok */
  1751. pci_enable_pcie_error_reporting(pdev);
  1752. ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
  1753. if (!ha) {
  1754. DEBUG(printk("Unable to allocate memory for ha\n"));
  1755. goto probe_out;
  1756. }
  1757. ha->pdev = pdev;
  1758. /* Clear our data area */
  1759. ha->bars = bars;
  1760. ha->mem_only = mem_only;
  1761. spin_lock_init(&ha->hardware_lock);
  1762. /* Set ISP-type information. */
  1763. qla2x00_set_isp_flags(ha);
  1764. /* Set EEH reset type to fundamental if required by hba */
  1765. if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
  1766. pdev->needs_freset = 1;
  1767. }
  1768. /* Configure PCI I/O space */
  1769. ret = qla2x00_iospace_config(ha);
  1770. if (ret)
  1771. goto probe_hw_failed;
  1772. qla_printk(KERN_INFO, ha,
  1773. "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
  1774. ha->iobase);
  1775. ha->prev_topology = 0;
  1776. ha->init_cb_size = sizeof(init_cb_t);
  1777. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  1778. ha->optrom_size = OPTROM_SIZE_2300;
  1779. /* Assign ISP specific operations. */
  1780. max_id = MAX_TARGETS_2200;
  1781. if (IS_QLA2100(ha)) {
  1782. max_id = MAX_TARGETS_2100;
  1783. ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
  1784. req_length = REQUEST_ENTRY_CNT_2100;
  1785. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1786. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1787. ha->gid_list_info_size = 4;
  1788. ha->flash_conf_off = ~0;
  1789. ha->flash_data_off = ~0;
  1790. ha->nvram_conf_off = ~0;
  1791. ha->nvram_data_off = ~0;
  1792. ha->isp_ops = &qla2100_isp_ops;
  1793. } else if (IS_QLA2200(ha)) {
  1794. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1795. req_length = REQUEST_ENTRY_CNT_2200;
  1796. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1797. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1798. ha->gid_list_info_size = 4;
  1799. ha->flash_conf_off = ~0;
  1800. ha->flash_data_off = ~0;
  1801. ha->nvram_conf_off = ~0;
  1802. ha->nvram_data_off = ~0;
  1803. ha->isp_ops = &qla2100_isp_ops;
  1804. } else if (IS_QLA23XX(ha)) {
  1805. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1806. req_length = REQUEST_ENTRY_CNT_2200;
  1807. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1808. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1809. ha->gid_list_info_size = 6;
  1810. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1811. ha->optrom_size = OPTROM_SIZE_2322;
  1812. ha->flash_conf_off = ~0;
  1813. ha->flash_data_off = ~0;
  1814. ha->nvram_conf_off = ~0;
  1815. ha->nvram_data_off = ~0;
  1816. ha->isp_ops = &qla2300_isp_ops;
  1817. } else if (IS_QLA24XX_TYPE(ha)) {
  1818. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1819. req_length = REQUEST_ENTRY_CNT_24XX;
  1820. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1821. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1822. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1823. ha->gid_list_info_size = 8;
  1824. ha->optrom_size = OPTROM_SIZE_24XX;
  1825. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
  1826. ha->isp_ops = &qla24xx_isp_ops;
  1827. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1828. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1829. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1830. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1831. } else if (IS_QLA25XX(ha)) {
  1832. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1833. req_length = REQUEST_ENTRY_CNT_24XX;
  1834. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1835. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1836. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1837. ha->gid_list_info_size = 8;
  1838. ha->optrom_size = OPTROM_SIZE_25XX;
  1839. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1840. ha->isp_ops = &qla25xx_isp_ops;
  1841. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1842. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1843. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1844. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1845. } else if (IS_QLA81XX(ha)) {
  1846. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1847. req_length = REQUEST_ENTRY_CNT_24XX;
  1848. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1849. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1850. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1851. ha->gid_list_info_size = 8;
  1852. ha->optrom_size = OPTROM_SIZE_81XX;
  1853. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1854. ha->isp_ops = &qla81xx_isp_ops;
  1855. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
  1856. ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
  1857. ha->nvram_conf_off = ~0;
  1858. ha->nvram_data_off = ~0;
  1859. } else if (IS_QLA82XX(ha)) {
  1860. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1861. req_length = REQUEST_ENTRY_CNT_82XX;
  1862. rsp_length = RESPONSE_ENTRY_CNT_82XX;
  1863. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1864. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1865. ha->gid_list_info_size = 8;
  1866. ha->optrom_size = OPTROM_SIZE_82XX;
  1867. ha->isp_ops = &qla82xx_isp_ops;
  1868. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1869. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1870. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1871. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1872. }
  1873. mutex_init(&ha->vport_lock);
  1874. init_completion(&ha->mbx_cmd_comp);
  1875. complete(&ha->mbx_cmd_comp);
  1876. init_completion(&ha->mbx_intr_comp);
  1877. init_completion(&ha->dcbx_comp);
  1878. set_bit(0, (unsigned long *) ha->vp_idx_map);
  1879. qla2x00_config_dma_addressing(ha);
  1880. ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
  1881. if (!ret) {
  1882. qla_printk(KERN_WARNING, ha,
  1883. "[ERROR] Failed to allocate memory for adapter\n");
  1884. goto probe_hw_failed;
  1885. }
  1886. req->max_q_depth = MAX_Q_DEPTH;
  1887. if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
  1888. req->max_q_depth = ql2xmaxqdepth;
  1889. base_vha = qla2x00_create_host(sht, ha);
  1890. if (!base_vha) {
  1891. qla_printk(KERN_WARNING, ha,
  1892. "[ERROR] Failed to allocate memory for scsi_host\n");
  1893. ret = -ENOMEM;
  1894. qla2x00_mem_free(ha);
  1895. qla2x00_free_req_que(ha, req);
  1896. qla2x00_free_rsp_que(ha, rsp);
  1897. goto probe_hw_failed;
  1898. }
  1899. pci_set_drvdata(pdev, base_vha);
  1900. host = base_vha->host;
  1901. base_vha->req = req;
  1902. host->can_queue = req->length + 128;
  1903. if (IS_QLA2XXX_MIDTYPE(ha))
  1904. base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
  1905. else
  1906. base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
  1907. base_vha->vp_idx;
  1908. if (IS_QLA2100(ha))
  1909. host->sg_tablesize = 32;
  1910. host->max_id = max_id;
  1911. host->this_id = 255;
  1912. host->cmd_per_lun = 3;
  1913. host->unique_id = host->host_no;
  1914. host->max_cmd_len = MAX_CMDSZ;
  1915. host->max_channel = MAX_BUSES - 1;
  1916. host->max_lun = MAX_LUNS;
  1917. host->transportt = qla2xxx_transport_template;
  1918. sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
  1919. /* Set up the irqs */
  1920. ret = qla2x00_request_irqs(ha, rsp);
  1921. if (ret)
  1922. goto probe_init_failed;
  1923. pci_save_state(pdev);
  1924. /* Alloc arrays of request and response ring ptrs */
  1925. que_init:
  1926. if (!qla2x00_alloc_queues(ha)) {
  1927. qla_printk(KERN_WARNING, ha,
  1928. "[ERROR] Failed to allocate memory for queue"
  1929. " pointers\n");
  1930. goto probe_init_failed;
  1931. }
  1932. ha->rsp_q_map[0] = rsp;
  1933. ha->req_q_map[0] = req;
  1934. rsp->req = req;
  1935. req->rsp = rsp;
  1936. set_bit(0, ha->req_qid_map);
  1937. set_bit(0, ha->rsp_qid_map);
  1938. /* FWI2-capable only. */
  1939. req->req_q_in = &ha->iobase->isp24.req_q_in;
  1940. req->req_q_out = &ha->iobase->isp24.req_q_out;
  1941. rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
  1942. rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
  1943. if (ha->mqenable) {
  1944. req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
  1945. req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
  1946. rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
  1947. rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
  1948. }
  1949. if (IS_QLA82XX(ha)) {
  1950. req->req_q_out = &ha->iobase->isp82.req_q_out[0];
  1951. rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
  1952. rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
  1953. }
  1954. if (qla2x00_initialize_adapter(base_vha)) {
  1955. qla_printk(KERN_WARNING, ha,
  1956. "Failed to initialize adapter\n");
  1957. DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
  1958. "Adapter flags %x.\n",
  1959. base_vha->host_no, base_vha->device_flags));
  1960. if (IS_QLA82XX(ha)) {
  1961. qla82xx_idc_lock(ha);
  1962. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  1963. QLA82XX_DEV_FAILED);
  1964. qla82xx_idc_unlock(ha);
  1965. qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
  1966. }
  1967. ret = -ENODEV;
  1968. goto probe_failed;
  1969. }
  1970. if (ha->mqenable) {
  1971. if (qla25xx_setup_mode(base_vha)) {
  1972. qla_printk(KERN_WARNING, ha,
  1973. "Can't create queues, falling back to single"
  1974. " queue mode\n");
  1975. goto que_init;
  1976. }
  1977. }
  1978. if (ha->flags.running_gold_fw)
  1979. goto skip_dpc;
  1980. /*
  1981. * Startup the kernel thread for this host adapter
  1982. */
  1983. ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
  1984. "%s_dpc", base_vha->host_str);
  1985. if (IS_ERR(ha->dpc_thread)) {
  1986. qla_printk(KERN_WARNING, ha,
  1987. "Unable to start DPC thread!\n");
  1988. ret = PTR_ERR(ha->dpc_thread);
  1989. goto probe_failed;
  1990. }
  1991. skip_dpc:
  1992. list_add_tail(&base_vha->list, &ha->vp_list);
  1993. base_vha->host->irq = ha->pdev->irq;
  1994. /* Initialized the timer */
  1995. qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
  1996. DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
  1997. base_vha->host_no, ha));
  1998. if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
  1999. if (ha->fw_attributes & BIT_4) {
  2000. base_vha->flags.difdix_supported = 1;
  2001. DEBUG18(qla_printk(KERN_INFO, ha,
  2002. "Registering for DIF/DIX type 1 and 3"
  2003. " protection.\n"));
  2004. scsi_host_set_prot(host,
  2005. SHOST_DIF_TYPE1_PROTECTION
  2006. | SHOST_DIF_TYPE3_PROTECTION
  2007. | SHOST_DIX_TYPE1_PROTECTION
  2008. | SHOST_DIX_TYPE3_PROTECTION);
  2009. scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
  2010. } else
  2011. base_vha->flags.difdix_supported = 0;
  2012. }
  2013. ha->isp_ops->enable_intrs(ha);
  2014. ret = scsi_add_host(host, &pdev->dev);
  2015. if (ret)
  2016. goto probe_failed;
  2017. base_vha->flags.init_done = 1;
  2018. base_vha->flags.online = 1;
  2019. scsi_scan_host(host);
  2020. qla2x00_alloc_sysfs_attr(base_vha);
  2021. qla2x00_init_host_attr(base_vha);
  2022. qla2x00_dfs_setup(base_vha);
  2023. qla_printk(KERN_INFO, ha, "\n"
  2024. " QLogic Fibre Channel HBA Driver: %s\n"
  2025. " QLogic %s - %s\n"
  2026. " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
  2027. qla2x00_version_str, ha->model_number,
  2028. ha->model_desc ? ha->model_desc : "", pdev->device,
  2029. ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
  2030. ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
  2031. ha->isp_ops->fw_version_str(base_vha, fw_str));
  2032. return 0;
  2033. probe_init_failed:
  2034. qla2x00_free_req_que(ha, req);
  2035. qla2x00_free_rsp_que(ha, rsp);
  2036. ha->max_req_queues = ha->max_rsp_queues = 0;
  2037. probe_failed:
  2038. if (base_vha->timer_active)
  2039. qla2x00_stop_timer(base_vha);
  2040. base_vha->flags.online = 0;
  2041. if (ha->dpc_thread) {
  2042. struct task_struct *t = ha->dpc_thread;
  2043. ha->dpc_thread = NULL;
  2044. kthread_stop(t);
  2045. }
  2046. qla2x00_free_device(base_vha);
  2047. scsi_host_put(base_vha->host);
  2048. probe_hw_failed:
  2049. if (IS_QLA82XX(ha)) {
  2050. qla82xx_idc_lock(ha);
  2051. qla82xx_clear_drv_active(ha);
  2052. qla82xx_idc_unlock(ha);
  2053. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2054. if (!ql2xdbwr)
  2055. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2056. } else {
  2057. if (ha->iobase)
  2058. iounmap(ha->iobase);
  2059. }
  2060. pci_release_selected_regions(ha->pdev, ha->bars);
  2061. kfree(ha);
  2062. ha = NULL;
  2063. probe_out:
  2064. pci_disable_device(pdev);
  2065. return ret;
  2066. }
  2067. static void
  2068. qla2x00_remove_one(struct pci_dev *pdev)
  2069. {
  2070. scsi_qla_host_t *base_vha, *vha, *temp;
  2071. struct qla_hw_data *ha;
  2072. base_vha = pci_get_drvdata(pdev);
  2073. ha = base_vha->hw;
  2074. list_for_each_entry_safe(vha, temp, &ha->vp_list, list) {
  2075. if (vha && vha->fc_vport)
  2076. fc_vport_terminate(vha->fc_vport);
  2077. }
  2078. set_bit(UNLOADING, &base_vha->dpc_flags);
  2079. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2080. qla2x00_dfs_remove(base_vha);
  2081. qla84xx_put_chip(base_vha);
  2082. /* Disable timer */
  2083. if (base_vha->timer_active)
  2084. qla2x00_stop_timer(base_vha);
  2085. base_vha->flags.online = 0;
  2086. /* Flush the work queue and remove it */
  2087. if (ha->wq) {
  2088. flush_workqueue(ha->wq);
  2089. destroy_workqueue(ha->wq);
  2090. ha->wq = NULL;
  2091. }
  2092. /* Kill the kernel thread for this host */
  2093. if (ha->dpc_thread) {
  2094. struct task_struct *t = ha->dpc_thread;
  2095. /*
  2096. * qla2xxx_wake_dpc checks for ->dpc_thread
  2097. * so we need to zero it out.
  2098. */
  2099. ha->dpc_thread = NULL;
  2100. kthread_stop(t);
  2101. }
  2102. qla2x00_free_sysfs_attr(base_vha);
  2103. fc_remove_host(base_vha->host);
  2104. scsi_remove_host(base_vha->host);
  2105. qla2x00_free_device(base_vha);
  2106. scsi_host_put(base_vha->host);
  2107. if (IS_QLA82XX(ha)) {
  2108. qla82xx_idc_lock(ha);
  2109. qla82xx_clear_drv_active(ha);
  2110. qla82xx_idc_unlock(ha);
  2111. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2112. if (!ql2xdbwr)
  2113. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2114. } else {
  2115. if (ha->iobase)
  2116. iounmap(ha->iobase);
  2117. if (ha->mqiobase)
  2118. iounmap(ha->mqiobase);
  2119. }
  2120. pci_release_selected_regions(ha->pdev, ha->bars);
  2121. kfree(ha);
  2122. ha = NULL;
  2123. pci_disable_pcie_error_reporting(pdev);
  2124. pci_disable_device(pdev);
  2125. pci_set_drvdata(pdev, NULL);
  2126. }
  2127. static void
  2128. qla2x00_free_device(scsi_qla_host_t *vha)
  2129. {
  2130. struct qla_hw_data *ha = vha->hw;
  2131. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  2132. /* Disable timer */
  2133. if (vha->timer_active)
  2134. qla2x00_stop_timer(vha);
  2135. /* Kill the kernel thread for this host */
  2136. if (ha->dpc_thread) {
  2137. struct task_struct *t = ha->dpc_thread;
  2138. /*
  2139. * qla2xxx_wake_dpc checks for ->dpc_thread
  2140. * so we need to zero it out.
  2141. */
  2142. ha->dpc_thread = NULL;
  2143. kthread_stop(t);
  2144. }
  2145. qla25xx_delete_queues(vha);
  2146. if (ha->flags.fce_enabled)
  2147. qla2x00_disable_fce_trace(vha, NULL, NULL);
  2148. if (ha->eft)
  2149. qla2x00_disable_eft_trace(vha);
  2150. /* Stop currently executing firmware. */
  2151. qla2x00_try_to_stop_firmware(vha);
  2152. vha->flags.online = 0;
  2153. /* turn-off interrupts on the card */
  2154. if (ha->interrupts_on) {
  2155. vha->flags.init_done = 0;
  2156. ha->isp_ops->disable_intrs(ha);
  2157. }
  2158. qla2x00_free_irqs(vha);
  2159. qla2x00_mem_free(ha);
  2160. qla2x00_free_queues(ha);
  2161. }
  2162. static inline void
  2163. qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
  2164. int defer)
  2165. {
  2166. struct fc_rport *rport;
  2167. scsi_qla_host_t *base_vha;
  2168. if (!fcport->rport)
  2169. return;
  2170. rport = fcport->rport;
  2171. if (defer) {
  2172. base_vha = pci_get_drvdata(vha->hw->pdev);
  2173. spin_lock_irq(vha->host->host_lock);
  2174. fcport->drport = rport;
  2175. spin_unlock_irq(vha->host->host_lock);
  2176. set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2177. qla2xxx_wake_dpc(base_vha);
  2178. } else
  2179. fc_remote_port_delete(rport);
  2180. }
  2181. /*
  2182. * qla2x00_mark_device_lost Updates fcport state when device goes offline.
  2183. *
  2184. * Input: ha = adapter block pointer. fcport = port structure pointer.
  2185. *
  2186. * Return: None.
  2187. *
  2188. * Context:
  2189. */
  2190. void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
  2191. int do_login, int defer)
  2192. {
  2193. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2194. vha->vp_idx == fcport->vp_idx) {
  2195. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2196. qla2x00_schedule_rport_del(vha, fcport, defer);
  2197. }
  2198. /*
  2199. * We may need to retry the login, so don't change the state of the
  2200. * port but do the retries.
  2201. */
  2202. if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
  2203. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2204. if (!do_login)
  2205. return;
  2206. if (fcport->login_retry == 0) {
  2207. fcport->login_retry = vha->hw->login_retry_count;
  2208. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2209. DEBUG(printk("scsi(%ld): Port login retry: "
  2210. "%02x%02x%02x%02x%02x%02x%02x%02x, "
  2211. "id = 0x%04x retry cnt=%d\n",
  2212. vha->host_no,
  2213. fcport->port_name[0],
  2214. fcport->port_name[1],
  2215. fcport->port_name[2],
  2216. fcport->port_name[3],
  2217. fcport->port_name[4],
  2218. fcport->port_name[5],
  2219. fcport->port_name[6],
  2220. fcport->port_name[7],
  2221. fcport->loop_id,
  2222. fcport->login_retry));
  2223. }
  2224. }
  2225. /*
  2226. * qla2x00_mark_all_devices_lost
  2227. * Updates fcport state when device goes offline.
  2228. *
  2229. * Input:
  2230. * ha = adapter block pointer.
  2231. * fcport = port structure pointer.
  2232. *
  2233. * Return:
  2234. * None.
  2235. *
  2236. * Context:
  2237. */
  2238. void
  2239. qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
  2240. {
  2241. fc_port_t *fcport;
  2242. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2243. if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
  2244. continue;
  2245. /*
  2246. * No point in marking the device as lost, if the device is
  2247. * already DEAD.
  2248. */
  2249. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
  2250. continue;
  2251. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2252. if (defer)
  2253. qla2x00_schedule_rport_del(vha, fcport, defer);
  2254. else if (vha->vp_idx == fcport->vp_idx)
  2255. qla2x00_schedule_rport_del(vha, fcport, defer);
  2256. }
  2257. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2258. }
  2259. }
  2260. /*
  2261. * qla2x00_mem_alloc
  2262. * Allocates adapter memory.
  2263. *
  2264. * Returns:
  2265. * 0 = success.
  2266. * !0 = failure.
  2267. */
  2268. static int
  2269. qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
  2270. struct req_que **req, struct rsp_que **rsp)
  2271. {
  2272. char name[16];
  2273. ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
  2274. &ha->init_cb_dma, GFP_KERNEL);
  2275. if (!ha->init_cb)
  2276. goto fail;
  2277. ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
  2278. &ha->gid_list_dma, GFP_KERNEL);
  2279. if (!ha->gid_list)
  2280. goto fail_free_init_cb;
  2281. ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
  2282. if (!ha->srb_mempool)
  2283. goto fail_free_gid_list;
  2284. if (IS_QLA82XX(ha)) {
  2285. /* Allocate cache for CT6 Ctx. */
  2286. if (!ctx_cachep) {
  2287. ctx_cachep = kmem_cache_create("qla2xxx_ctx",
  2288. sizeof(struct ct6_dsd), 0,
  2289. SLAB_HWCACHE_ALIGN, NULL);
  2290. if (!ctx_cachep)
  2291. goto fail_free_gid_list;
  2292. }
  2293. ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
  2294. ctx_cachep);
  2295. if (!ha->ctx_mempool)
  2296. goto fail_free_srb_mempool;
  2297. }
  2298. /* Get memory for cached NVRAM */
  2299. ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
  2300. if (!ha->nvram)
  2301. goto fail_free_ctx_mempool;
  2302. snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
  2303. ha->pdev->device);
  2304. ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2305. DMA_POOL_SIZE, 8, 0);
  2306. if (!ha->s_dma_pool)
  2307. goto fail_free_nvram;
  2308. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2309. ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2310. DSD_LIST_DMA_POOL_SIZE, 8, 0);
  2311. if (!ha->dl_dma_pool) {
  2312. qla_printk(KERN_WARNING, ha,
  2313. "Memory Allocation failed - dl_dma_pool\n");
  2314. goto fail_s_dma_pool;
  2315. }
  2316. ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2317. FCP_CMND_DMA_POOL_SIZE, 8, 0);
  2318. if (!ha->fcp_cmnd_dma_pool) {
  2319. qla_printk(KERN_WARNING, ha,
  2320. "Memory Allocation failed - fcp_cmnd_dma_pool\n");
  2321. goto fail_dl_dma_pool;
  2322. }
  2323. }
  2324. /* Allocate memory for SNS commands */
  2325. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2326. /* Get consistent memory allocated for SNS commands */
  2327. ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
  2328. sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
  2329. if (!ha->sns_cmd)
  2330. goto fail_dma_pool;
  2331. } else {
  2332. /* Get consistent memory allocated for MS IOCB */
  2333. ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2334. &ha->ms_iocb_dma);
  2335. if (!ha->ms_iocb)
  2336. goto fail_dma_pool;
  2337. /* Get consistent memory allocated for CT SNS commands */
  2338. ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
  2339. sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
  2340. if (!ha->ct_sns)
  2341. goto fail_free_ms_iocb;
  2342. }
  2343. /* Allocate memory for request ring */
  2344. *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
  2345. if (!*req) {
  2346. DEBUG(printk("Unable to allocate memory for req\n"));
  2347. goto fail_req;
  2348. }
  2349. (*req)->length = req_len;
  2350. (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2351. ((*req)->length + 1) * sizeof(request_t),
  2352. &(*req)->dma, GFP_KERNEL);
  2353. if (!(*req)->ring) {
  2354. DEBUG(printk("Unable to allocate memory for req_ring\n"));
  2355. goto fail_req_ring;
  2356. }
  2357. /* Allocate memory for response ring */
  2358. *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
  2359. if (!*rsp) {
  2360. qla_printk(KERN_WARNING, ha,
  2361. "Unable to allocate memory for rsp\n");
  2362. goto fail_rsp;
  2363. }
  2364. (*rsp)->hw = ha;
  2365. (*rsp)->length = rsp_len;
  2366. (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2367. ((*rsp)->length + 1) * sizeof(response_t),
  2368. &(*rsp)->dma, GFP_KERNEL);
  2369. if (!(*rsp)->ring) {
  2370. qla_printk(KERN_WARNING, ha,
  2371. "Unable to allocate memory for rsp_ring\n");
  2372. goto fail_rsp_ring;
  2373. }
  2374. (*req)->rsp = *rsp;
  2375. (*rsp)->req = *req;
  2376. /* Allocate memory for NVRAM data for vports */
  2377. if (ha->nvram_npiv_size) {
  2378. ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
  2379. ha->nvram_npiv_size, GFP_KERNEL);
  2380. if (!ha->npiv_info) {
  2381. qla_printk(KERN_WARNING, ha,
  2382. "Unable to allocate memory for npiv info\n");
  2383. goto fail_npiv_info;
  2384. }
  2385. } else
  2386. ha->npiv_info = NULL;
  2387. /* Get consistent memory allocated for EX-INIT-CB. */
  2388. if (IS_QLA8XXX_TYPE(ha)) {
  2389. ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2390. &ha->ex_init_cb_dma);
  2391. if (!ha->ex_init_cb)
  2392. goto fail_ex_init_cb;
  2393. }
  2394. INIT_LIST_HEAD(&ha->gbl_dsd_list);
  2395. /* Get consistent memory allocated for Async Port-Database. */
  2396. if (!IS_FWI2_CAPABLE(ha)) {
  2397. ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2398. &ha->async_pd_dma);
  2399. if (!ha->async_pd)
  2400. goto fail_async_pd;
  2401. }
  2402. INIT_LIST_HEAD(&ha->vp_list);
  2403. return 1;
  2404. fail_async_pd:
  2405. dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
  2406. fail_ex_init_cb:
  2407. kfree(ha->npiv_info);
  2408. fail_npiv_info:
  2409. dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
  2410. sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
  2411. (*rsp)->ring = NULL;
  2412. (*rsp)->dma = 0;
  2413. fail_rsp_ring:
  2414. kfree(*rsp);
  2415. fail_rsp:
  2416. dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
  2417. sizeof(request_t), (*req)->ring, (*req)->dma);
  2418. (*req)->ring = NULL;
  2419. (*req)->dma = 0;
  2420. fail_req_ring:
  2421. kfree(*req);
  2422. fail_req:
  2423. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2424. ha->ct_sns, ha->ct_sns_dma);
  2425. ha->ct_sns = NULL;
  2426. ha->ct_sns_dma = 0;
  2427. fail_free_ms_iocb:
  2428. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2429. ha->ms_iocb = NULL;
  2430. ha->ms_iocb_dma = 0;
  2431. fail_dma_pool:
  2432. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2433. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2434. ha->fcp_cmnd_dma_pool = NULL;
  2435. }
  2436. fail_dl_dma_pool:
  2437. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2438. dma_pool_destroy(ha->dl_dma_pool);
  2439. ha->dl_dma_pool = NULL;
  2440. }
  2441. fail_s_dma_pool:
  2442. dma_pool_destroy(ha->s_dma_pool);
  2443. ha->s_dma_pool = NULL;
  2444. fail_free_nvram:
  2445. kfree(ha->nvram);
  2446. ha->nvram = NULL;
  2447. fail_free_ctx_mempool:
  2448. mempool_destroy(ha->ctx_mempool);
  2449. ha->ctx_mempool = NULL;
  2450. fail_free_srb_mempool:
  2451. mempool_destroy(ha->srb_mempool);
  2452. ha->srb_mempool = NULL;
  2453. fail_free_gid_list:
  2454. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2455. ha->gid_list_dma);
  2456. ha->gid_list = NULL;
  2457. ha->gid_list_dma = 0;
  2458. fail_free_init_cb:
  2459. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
  2460. ha->init_cb_dma);
  2461. ha->init_cb = NULL;
  2462. ha->init_cb_dma = 0;
  2463. fail:
  2464. DEBUG(printk("%s: Memory allocation failure\n", __func__));
  2465. return -ENOMEM;
  2466. }
  2467. /*
  2468. * qla2x00_mem_free
  2469. * Frees all adapter allocated memory.
  2470. *
  2471. * Input:
  2472. * ha = adapter block pointer.
  2473. */
  2474. static void
  2475. qla2x00_mem_free(struct qla_hw_data *ha)
  2476. {
  2477. if (ha->srb_mempool)
  2478. mempool_destroy(ha->srb_mempool);
  2479. if (ha->fce)
  2480. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  2481. ha->fce_dma);
  2482. if (ha->fw_dump) {
  2483. if (ha->eft)
  2484. dma_free_coherent(&ha->pdev->dev,
  2485. ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
  2486. vfree(ha->fw_dump);
  2487. }
  2488. if (ha->dcbx_tlv)
  2489. dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
  2490. ha->dcbx_tlv, ha->dcbx_tlv_dma);
  2491. if (ha->xgmac_data)
  2492. dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
  2493. ha->xgmac_data, ha->xgmac_data_dma);
  2494. if (ha->sns_cmd)
  2495. dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
  2496. ha->sns_cmd, ha->sns_cmd_dma);
  2497. if (ha->ct_sns)
  2498. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2499. ha->ct_sns, ha->ct_sns_dma);
  2500. if (ha->sfp_data)
  2501. dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
  2502. if (ha->edc_data)
  2503. dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
  2504. if (ha->ms_iocb)
  2505. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2506. if (ha->ex_init_cb)
  2507. dma_pool_free(ha->s_dma_pool,
  2508. ha->ex_init_cb, ha->ex_init_cb_dma);
  2509. if (ha->async_pd)
  2510. dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
  2511. if (ha->s_dma_pool)
  2512. dma_pool_destroy(ha->s_dma_pool);
  2513. if (ha->gid_list)
  2514. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2515. ha->gid_list_dma);
  2516. if (IS_QLA82XX(ha)) {
  2517. if (!list_empty(&ha->gbl_dsd_list)) {
  2518. struct dsd_dma *dsd_ptr, *tdsd_ptr;
  2519. /* clean up allocated prev pool */
  2520. list_for_each_entry_safe(dsd_ptr,
  2521. tdsd_ptr, &ha->gbl_dsd_list, list) {
  2522. dma_pool_free(ha->dl_dma_pool,
  2523. dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
  2524. list_del(&dsd_ptr->list);
  2525. kfree(dsd_ptr);
  2526. }
  2527. }
  2528. }
  2529. if (ha->dl_dma_pool)
  2530. dma_pool_destroy(ha->dl_dma_pool);
  2531. if (ha->fcp_cmnd_dma_pool)
  2532. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2533. if (ha->ctx_mempool)
  2534. mempool_destroy(ha->ctx_mempool);
  2535. if (ha->init_cb)
  2536. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
  2537. ha->init_cb, ha->init_cb_dma);
  2538. vfree(ha->optrom_buffer);
  2539. kfree(ha->nvram);
  2540. kfree(ha->npiv_info);
  2541. ha->srb_mempool = NULL;
  2542. ha->ctx_mempool = NULL;
  2543. ha->eft = NULL;
  2544. ha->eft_dma = 0;
  2545. ha->sns_cmd = NULL;
  2546. ha->sns_cmd_dma = 0;
  2547. ha->ct_sns = NULL;
  2548. ha->ct_sns_dma = 0;
  2549. ha->ms_iocb = NULL;
  2550. ha->ms_iocb_dma = 0;
  2551. ha->init_cb = NULL;
  2552. ha->init_cb_dma = 0;
  2553. ha->ex_init_cb = NULL;
  2554. ha->ex_init_cb_dma = 0;
  2555. ha->async_pd = NULL;
  2556. ha->async_pd_dma = 0;
  2557. ha->s_dma_pool = NULL;
  2558. ha->dl_dma_pool = NULL;
  2559. ha->fcp_cmnd_dma_pool = NULL;
  2560. ha->gid_list = NULL;
  2561. ha->gid_list_dma = 0;
  2562. ha->fw_dump = NULL;
  2563. ha->fw_dumped = 0;
  2564. ha->fw_dump_reading = 0;
  2565. }
  2566. struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
  2567. struct qla_hw_data *ha)
  2568. {
  2569. struct Scsi_Host *host;
  2570. struct scsi_qla_host *vha = NULL;
  2571. host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
  2572. if (host == NULL) {
  2573. printk(KERN_WARNING
  2574. "qla2xxx: Couldn't allocate host from scsi layer!\n");
  2575. goto fail;
  2576. }
  2577. /* Clear our data area */
  2578. vha = shost_priv(host);
  2579. memset(vha, 0, sizeof(scsi_qla_host_t));
  2580. vha->host = host;
  2581. vha->host_no = host->host_no;
  2582. vha->hw = ha;
  2583. INIT_LIST_HEAD(&vha->vp_fcports);
  2584. INIT_LIST_HEAD(&vha->work_list);
  2585. INIT_LIST_HEAD(&vha->list);
  2586. spin_lock_init(&vha->work_lock);
  2587. sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
  2588. return vha;
  2589. fail:
  2590. return vha;
  2591. }
  2592. static struct qla_work_evt *
  2593. qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
  2594. {
  2595. struct qla_work_evt *e;
  2596. e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
  2597. if (!e)
  2598. return NULL;
  2599. INIT_LIST_HEAD(&e->list);
  2600. e->type = type;
  2601. e->flags = QLA_EVT_FLAG_FREE;
  2602. return e;
  2603. }
  2604. static int
  2605. qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
  2606. {
  2607. unsigned long flags;
  2608. spin_lock_irqsave(&vha->work_lock, flags);
  2609. list_add_tail(&e->list, &vha->work_list);
  2610. spin_unlock_irqrestore(&vha->work_lock, flags);
  2611. qla2xxx_wake_dpc(vha);
  2612. return QLA_SUCCESS;
  2613. }
  2614. int
  2615. qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
  2616. u32 data)
  2617. {
  2618. struct qla_work_evt *e;
  2619. e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
  2620. if (!e)
  2621. return QLA_FUNCTION_FAILED;
  2622. e->u.aen.code = code;
  2623. e->u.aen.data = data;
  2624. return qla2x00_post_work(vha, e);
  2625. }
  2626. int
  2627. qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
  2628. {
  2629. struct qla_work_evt *e;
  2630. e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
  2631. if (!e)
  2632. return QLA_FUNCTION_FAILED;
  2633. memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2634. return qla2x00_post_work(vha, e);
  2635. }
  2636. #define qla2x00_post_async_work(name, type) \
  2637. int qla2x00_post_async_##name##_work( \
  2638. struct scsi_qla_host *vha, \
  2639. fc_port_t *fcport, uint16_t *data) \
  2640. { \
  2641. struct qla_work_evt *e; \
  2642. \
  2643. e = qla2x00_alloc_work(vha, type); \
  2644. if (!e) \
  2645. return QLA_FUNCTION_FAILED; \
  2646. \
  2647. e->u.logio.fcport = fcport; \
  2648. if (data) { \
  2649. e->u.logio.data[0] = data[0]; \
  2650. e->u.logio.data[1] = data[1]; \
  2651. } \
  2652. return qla2x00_post_work(vha, e); \
  2653. }
  2654. qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
  2655. qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
  2656. qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
  2657. qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
  2658. qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
  2659. qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
  2660. int
  2661. qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
  2662. {
  2663. struct qla_work_evt *e;
  2664. e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
  2665. if (!e)
  2666. return QLA_FUNCTION_FAILED;
  2667. e->u.uevent.code = code;
  2668. return qla2x00_post_work(vha, e);
  2669. }
  2670. static void
  2671. qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
  2672. {
  2673. char event_string[40];
  2674. char *envp[] = { event_string, NULL };
  2675. switch (code) {
  2676. case QLA_UEVENT_CODE_FW_DUMP:
  2677. snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
  2678. vha->host_no);
  2679. break;
  2680. default:
  2681. /* do nothing */
  2682. break;
  2683. }
  2684. kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
  2685. }
  2686. void
  2687. qla2x00_do_work(struct scsi_qla_host *vha)
  2688. {
  2689. struct qla_work_evt *e, *tmp;
  2690. unsigned long flags;
  2691. LIST_HEAD(work);
  2692. spin_lock_irqsave(&vha->work_lock, flags);
  2693. list_splice_init(&vha->work_list, &work);
  2694. spin_unlock_irqrestore(&vha->work_lock, flags);
  2695. list_for_each_entry_safe(e, tmp, &work, list) {
  2696. list_del_init(&e->list);
  2697. switch (e->type) {
  2698. case QLA_EVT_AEN:
  2699. fc_host_post_event(vha->host, fc_get_event_number(),
  2700. e->u.aen.code, e->u.aen.data);
  2701. break;
  2702. case QLA_EVT_IDC_ACK:
  2703. qla81xx_idc_ack(vha, e->u.idc_ack.mb);
  2704. break;
  2705. case QLA_EVT_ASYNC_LOGIN:
  2706. qla2x00_async_login(vha, e->u.logio.fcport,
  2707. e->u.logio.data);
  2708. break;
  2709. case QLA_EVT_ASYNC_LOGIN_DONE:
  2710. qla2x00_async_login_done(vha, e->u.logio.fcport,
  2711. e->u.logio.data);
  2712. break;
  2713. case QLA_EVT_ASYNC_LOGOUT:
  2714. qla2x00_async_logout(vha, e->u.logio.fcport);
  2715. break;
  2716. case QLA_EVT_ASYNC_LOGOUT_DONE:
  2717. qla2x00_async_logout_done(vha, e->u.logio.fcport,
  2718. e->u.logio.data);
  2719. break;
  2720. case QLA_EVT_ASYNC_ADISC:
  2721. qla2x00_async_adisc(vha, e->u.logio.fcport,
  2722. e->u.logio.data);
  2723. break;
  2724. case QLA_EVT_ASYNC_ADISC_DONE:
  2725. qla2x00_async_adisc_done(vha, e->u.logio.fcport,
  2726. e->u.logio.data);
  2727. break;
  2728. case QLA_EVT_UEVENT:
  2729. qla2x00_uevent_emit(vha, e->u.uevent.code);
  2730. break;
  2731. }
  2732. if (e->flags & QLA_EVT_FLAG_FREE)
  2733. kfree(e);
  2734. }
  2735. }
  2736. /* Relogins all the fcports of a vport
  2737. * Context: dpc thread
  2738. */
  2739. void qla2x00_relogin(struct scsi_qla_host *vha)
  2740. {
  2741. fc_port_t *fcport;
  2742. int status;
  2743. uint16_t next_loopid = 0;
  2744. struct qla_hw_data *ha = vha->hw;
  2745. uint16_t data[2];
  2746. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2747. /*
  2748. * If the port is not ONLINE then try to login
  2749. * to it if we haven't run out of retries.
  2750. */
  2751. if (atomic_read(&fcport->state) != FCS_ONLINE &&
  2752. fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
  2753. fcport->login_retry--;
  2754. if (fcport->flags & FCF_FABRIC_DEVICE) {
  2755. if (fcport->flags & FCF_FCP2_DEVICE)
  2756. ha->isp_ops->fabric_logout(vha,
  2757. fcport->loop_id,
  2758. fcport->d_id.b.domain,
  2759. fcport->d_id.b.area,
  2760. fcport->d_id.b.al_pa);
  2761. if (IS_ALOGIO_CAPABLE(ha)) {
  2762. fcport->flags |= FCF_ASYNC_SENT;
  2763. data[0] = 0;
  2764. data[1] = QLA_LOGIO_LOGIN_RETRIED;
  2765. status = qla2x00_post_async_login_work(
  2766. vha, fcport, data);
  2767. if (status == QLA_SUCCESS)
  2768. continue;
  2769. /* Attempt a retry. */
  2770. status = 1;
  2771. } else
  2772. status = qla2x00_fabric_login(vha,
  2773. fcport, &next_loopid);
  2774. } else
  2775. status = qla2x00_local_device_login(vha,
  2776. fcport);
  2777. if (status == QLA_SUCCESS) {
  2778. fcport->old_loop_id = fcport->loop_id;
  2779. DEBUG(printk("scsi(%ld): port login OK: logged "
  2780. "in ID 0x%x\n", vha->host_no, fcport->loop_id));
  2781. qla2x00_update_fcport(vha, fcport);
  2782. } else if (status == 1) {
  2783. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2784. /* retry the login again */
  2785. DEBUG(printk("scsi(%ld): Retrying"
  2786. " %d login again loop_id 0x%x\n",
  2787. vha->host_no, fcport->login_retry,
  2788. fcport->loop_id));
  2789. } else {
  2790. fcport->login_retry = 0;
  2791. }
  2792. if (fcport->login_retry == 0 && status != QLA_SUCCESS)
  2793. fcport->loop_id = FC_NO_LOOP_ID;
  2794. }
  2795. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2796. break;
  2797. }
  2798. }
  2799. /**************************************************************************
  2800. * qla2x00_do_dpc
  2801. * This kernel thread is a task that is schedule by the interrupt handler
  2802. * to perform the background processing for interrupts.
  2803. *
  2804. * Notes:
  2805. * This task always run in the context of a kernel thread. It
  2806. * is kick-off by the driver's detect code and starts up
  2807. * up one per adapter. It immediately goes to sleep and waits for
  2808. * some fibre event. When either the interrupt handler or
  2809. * the timer routine detects a event it will one of the task
  2810. * bits then wake us up.
  2811. **************************************************************************/
  2812. static int
  2813. qla2x00_do_dpc(void *data)
  2814. {
  2815. int rval;
  2816. scsi_qla_host_t *base_vha;
  2817. struct qla_hw_data *ha;
  2818. ha = (struct qla_hw_data *)data;
  2819. base_vha = pci_get_drvdata(ha->pdev);
  2820. set_user_nice(current, -20);
  2821. while (!kthread_should_stop()) {
  2822. DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
  2823. set_current_state(TASK_INTERRUPTIBLE);
  2824. schedule();
  2825. __set_current_state(TASK_RUNNING);
  2826. DEBUG3(printk("qla2x00: DPC handler waking up\n"));
  2827. /* Initialization not yet finished. Don't do anything yet. */
  2828. if (!base_vha->flags.init_done)
  2829. continue;
  2830. if (ha->flags.eeh_busy) {
  2831. DEBUG17(qla_printk(KERN_WARNING, ha,
  2832. "qla2x00_do_dpc: dpc_flags: %lx\n",
  2833. base_vha->dpc_flags));
  2834. continue;
  2835. }
  2836. DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
  2837. ha->dpc_active = 1;
  2838. if (ha->flags.mbox_busy) {
  2839. ha->dpc_active = 0;
  2840. continue;
  2841. }
  2842. qla2x00_do_work(base_vha);
  2843. if (IS_QLA82XX(ha)) {
  2844. if (test_and_clear_bit(ISP_UNRECOVERABLE,
  2845. &base_vha->dpc_flags)) {
  2846. qla82xx_idc_lock(ha);
  2847. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  2848. QLA82XX_DEV_FAILED);
  2849. qla82xx_idc_unlock(ha);
  2850. qla_printk(KERN_INFO, ha,
  2851. "HW State: FAILED\n");
  2852. qla82xx_device_state_handler(base_vha);
  2853. continue;
  2854. }
  2855. if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
  2856. &base_vha->dpc_flags)) {
  2857. DEBUG(printk(KERN_INFO
  2858. "scsi(%ld): dpc: sched "
  2859. "qla82xx_fcoe_ctx_reset ha = %p\n",
  2860. base_vha->host_no, ha));
  2861. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2862. &base_vha->dpc_flags))) {
  2863. if (qla82xx_fcoe_ctx_reset(base_vha)) {
  2864. /* FCoE-ctx reset failed.
  2865. * Escalate to chip-reset
  2866. */
  2867. set_bit(ISP_ABORT_NEEDED,
  2868. &base_vha->dpc_flags);
  2869. }
  2870. clear_bit(ABORT_ISP_ACTIVE,
  2871. &base_vha->dpc_flags);
  2872. }
  2873. DEBUG(printk("scsi(%ld): dpc:"
  2874. " qla82xx_fcoe_ctx_reset end\n",
  2875. base_vha->host_no));
  2876. }
  2877. }
  2878. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  2879. &base_vha->dpc_flags)) {
  2880. DEBUG(printk("scsi(%ld): dpc: sched "
  2881. "qla2x00_abort_isp ha = %p\n",
  2882. base_vha->host_no, ha));
  2883. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2884. &base_vha->dpc_flags))) {
  2885. if (ha->isp_ops->abort_isp(base_vha)) {
  2886. /* failed. retry later */
  2887. set_bit(ISP_ABORT_NEEDED,
  2888. &base_vha->dpc_flags);
  2889. }
  2890. clear_bit(ABORT_ISP_ACTIVE,
  2891. &base_vha->dpc_flags);
  2892. }
  2893. DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
  2894. base_vha->host_no));
  2895. }
  2896. if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
  2897. qla2x00_update_fcports(base_vha);
  2898. clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2899. }
  2900. if (test_and_clear_bit(RESET_MARKER_NEEDED,
  2901. &base_vha->dpc_flags) &&
  2902. (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
  2903. DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
  2904. base_vha->host_no));
  2905. qla2x00_rst_aen(base_vha);
  2906. clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
  2907. }
  2908. /* Retry each device up to login retry count */
  2909. if ((test_and_clear_bit(RELOGIN_NEEDED,
  2910. &base_vha->dpc_flags)) &&
  2911. !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
  2912. atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
  2913. DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
  2914. base_vha->host_no));
  2915. qla2x00_relogin(base_vha);
  2916. DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
  2917. base_vha->host_no));
  2918. }
  2919. if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
  2920. &base_vha->dpc_flags)) {
  2921. DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
  2922. base_vha->host_no));
  2923. if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
  2924. &base_vha->dpc_flags))) {
  2925. rval = qla2x00_loop_resync(base_vha);
  2926. clear_bit(LOOP_RESYNC_ACTIVE,
  2927. &base_vha->dpc_flags);
  2928. }
  2929. DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
  2930. base_vha->host_no));
  2931. }
  2932. if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
  2933. atomic_read(&base_vha->loop_state) == LOOP_READY) {
  2934. clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
  2935. qla2xxx_flash_npiv_conf(base_vha);
  2936. }
  2937. if (!ha->interrupts_on)
  2938. ha->isp_ops->enable_intrs(ha);
  2939. if (test_and_clear_bit(BEACON_BLINK_NEEDED,
  2940. &base_vha->dpc_flags))
  2941. ha->isp_ops->beacon_blink(base_vha);
  2942. qla2x00_do_dpc_all_vps(base_vha);
  2943. ha->dpc_active = 0;
  2944. } /* End of while(1) */
  2945. DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
  2946. /*
  2947. * Make sure that nobody tries to wake us up again.
  2948. */
  2949. ha->dpc_active = 0;
  2950. /* Cleanup any residual CTX SRBs. */
  2951. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2952. return 0;
  2953. }
  2954. void
  2955. qla2xxx_wake_dpc(struct scsi_qla_host *vha)
  2956. {
  2957. struct qla_hw_data *ha = vha->hw;
  2958. struct task_struct *t = ha->dpc_thread;
  2959. if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
  2960. wake_up_process(t);
  2961. }
  2962. /*
  2963. * qla2x00_rst_aen
  2964. * Processes asynchronous reset.
  2965. *
  2966. * Input:
  2967. * ha = adapter block pointer.
  2968. */
  2969. static void
  2970. qla2x00_rst_aen(scsi_qla_host_t *vha)
  2971. {
  2972. if (vha->flags.online && !vha->flags.reset_active &&
  2973. !atomic_read(&vha->loop_down_timer) &&
  2974. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
  2975. do {
  2976. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2977. /*
  2978. * Issue marker command only when we are going to start
  2979. * the I/O.
  2980. */
  2981. vha->marker_needed = 1;
  2982. } while (!atomic_read(&vha->loop_down_timer) &&
  2983. (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
  2984. }
  2985. }
  2986. static void
  2987. qla2x00_sp_free_dma(srb_t *sp)
  2988. {
  2989. struct scsi_cmnd *cmd = sp->cmd;
  2990. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2991. if (sp->flags & SRB_DMA_VALID) {
  2992. scsi_dma_unmap(cmd);
  2993. sp->flags &= ~SRB_DMA_VALID;
  2994. }
  2995. if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
  2996. dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  2997. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  2998. sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
  2999. }
  3000. if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
  3001. /* List assured to be having elements */
  3002. qla2x00_clean_dsd_pool(ha, sp);
  3003. sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
  3004. }
  3005. if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
  3006. dma_pool_free(ha->dl_dma_pool, sp->ctx,
  3007. ((struct crc_context *)sp->ctx)->crc_ctx_dma);
  3008. sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
  3009. }
  3010. CMD_SP(cmd) = NULL;
  3011. }
  3012. void
  3013. qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
  3014. {
  3015. struct scsi_cmnd *cmd = sp->cmd;
  3016. qla2x00_sp_free_dma(sp);
  3017. if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
  3018. struct ct6_dsd *ctx = sp->ctx;
  3019. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
  3020. ctx->fcp_cmnd_dma);
  3021. list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
  3022. ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
  3023. ha->gbl_dsd_avail += ctx->dsd_use_cnt;
  3024. mempool_free(sp->ctx, ha->ctx_mempool);
  3025. sp->ctx = NULL;
  3026. }
  3027. mempool_free(sp, ha->srb_mempool);
  3028. cmd->scsi_done(cmd);
  3029. }
  3030. void
  3031. qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
  3032. {
  3033. if (atomic_read(&sp->ref_count) == 0) {
  3034. DEBUG2(qla_printk(KERN_WARNING, ha,
  3035. "SP reference-count to ZERO -- sp=%p\n", sp));
  3036. DEBUG2(BUG());
  3037. return;
  3038. }
  3039. if (!atomic_dec_and_test(&sp->ref_count))
  3040. return;
  3041. qla2x00_sp_final_compl(ha, sp);
  3042. }
  3043. /**************************************************************************
  3044. * qla2x00_timer
  3045. *
  3046. * Description:
  3047. * One second timer
  3048. *
  3049. * Context: Interrupt
  3050. ***************************************************************************/
  3051. void
  3052. qla2x00_timer(scsi_qla_host_t *vha)
  3053. {
  3054. unsigned long cpu_flags = 0;
  3055. fc_port_t *fcport;
  3056. int start_dpc = 0;
  3057. int index;
  3058. srb_t *sp;
  3059. int t;
  3060. uint16_t w;
  3061. struct qla_hw_data *ha = vha->hw;
  3062. struct req_que *req;
  3063. if (IS_QLA82XX(ha))
  3064. qla82xx_watchdog(vha);
  3065. /* Hardware read to raise pending EEH errors during mailbox waits. */
  3066. if (!pci_channel_offline(ha->pdev))
  3067. pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
  3068. /*
  3069. * Ports - Port down timer.
  3070. *
  3071. * Whenever, a port is in the LOST state we start decrementing its port
  3072. * down timer every second until it reaches zero. Once it reaches zero
  3073. * the port it marked DEAD.
  3074. */
  3075. t = 0;
  3076. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3077. if (fcport->port_type != FCT_TARGET)
  3078. continue;
  3079. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  3080. if (atomic_read(&fcport->port_down_timer) == 0)
  3081. continue;
  3082. if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
  3083. atomic_set(&fcport->state, FCS_DEVICE_DEAD);
  3084. DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
  3085. "%d remaining\n",
  3086. vha->host_no,
  3087. t, atomic_read(&fcport->port_down_timer)));
  3088. }
  3089. t++;
  3090. } /* End of for fcport */
  3091. /* Loop down handler. */
  3092. if (atomic_read(&vha->loop_down_timer) > 0 &&
  3093. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
  3094. && vha->flags.online) {
  3095. if (atomic_read(&vha->loop_down_timer) ==
  3096. vha->loop_down_abort_time) {
  3097. DEBUG(printk("scsi(%ld): Loop Down - aborting the "
  3098. "queues before time expire\n",
  3099. vha->host_no));
  3100. if (!IS_QLA2100(ha) && vha->link_down_timeout)
  3101. atomic_set(&vha->loop_state, LOOP_DEAD);
  3102. /*
  3103. * Schedule an ISP abort to return any FCP2-device
  3104. * commands.
  3105. */
  3106. /* NPIV - scan physical port only */
  3107. if (!vha->vp_idx) {
  3108. spin_lock_irqsave(&ha->hardware_lock,
  3109. cpu_flags);
  3110. req = ha->req_q_map[0];
  3111. for (index = 1;
  3112. index < MAX_OUTSTANDING_COMMANDS;
  3113. index++) {
  3114. fc_port_t *sfcp;
  3115. sp = req->outstanding_cmds[index];
  3116. if (!sp)
  3117. continue;
  3118. if (sp->ctx && !IS_PROT_IO(sp))
  3119. continue;
  3120. sfcp = sp->fcport;
  3121. if (!(sfcp->flags & FCF_FCP2_DEVICE))
  3122. continue;
  3123. set_bit(ISP_ABORT_NEEDED,
  3124. &vha->dpc_flags);
  3125. break;
  3126. }
  3127. spin_unlock_irqrestore(&ha->hardware_lock,
  3128. cpu_flags);
  3129. }
  3130. start_dpc++;
  3131. }
  3132. /* if the loop has been down for 4 minutes, reinit adapter */
  3133. if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
  3134. if (!(vha->device_flags & DFLG_NO_CABLE)) {
  3135. DEBUG(printk("scsi(%ld): Loop down - "
  3136. "aborting ISP.\n",
  3137. vha->host_no));
  3138. qla_printk(KERN_WARNING, ha,
  3139. "Loop down - aborting ISP.\n");
  3140. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3141. }
  3142. }
  3143. DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
  3144. vha->host_no,
  3145. atomic_read(&vha->loop_down_timer)));
  3146. }
  3147. /* Check if beacon LED needs to be blinked */
  3148. if (ha->beacon_blink_led == 1) {
  3149. set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
  3150. start_dpc++;
  3151. }
  3152. /* Process any deferred work. */
  3153. if (!list_empty(&vha->work_list))
  3154. start_dpc++;
  3155. /* Schedule the DPC routine if needed */
  3156. if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
  3157. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
  3158. test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
  3159. start_dpc ||
  3160. test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
  3161. test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
  3162. test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
  3163. test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
  3164. test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
  3165. test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
  3166. qla2xxx_wake_dpc(vha);
  3167. qla2x00_restart_timer(vha, WATCH_INTERVAL);
  3168. }
  3169. /* Firmware interface routines. */
  3170. #define FW_BLOBS 8
  3171. #define FW_ISP21XX 0
  3172. #define FW_ISP22XX 1
  3173. #define FW_ISP2300 2
  3174. #define FW_ISP2322 3
  3175. #define FW_ISP24XX 4
  3176. #define FW_ISP25XX 5
  3177. #define FW_ISP81XX 6
  3178. #define FW_ISP82XX 7
  3179. #define FW_FILE_ISP21XX "ql2100_fw.bin"
  3180. #define FW_FILE_ISP22XX "ql2200_fw.bin"
  3181. #define FW_FILE_ISP2300 "ql2300_fw.bin"
  3182. #define FW_FILE_ISP2322 "ql2322_fw.bin"
  3183. #define FW_FILE_ISP24XX "ql2400_fw.bin"
  3184. #define FW_FILE_ISP25XX "ql2500_fw.bin"
  3185. #define FW_FILE_ISP81XX "ql8100_fw.bin"
  3186. #define FW_FILE_ISP82XX "ql8200_fw.bin"
  3187. static DEFINE_MUTEX(qla_fw_lock);
  3188. static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
  3189. { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
  3190. { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
  3191. { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
  3192. { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
  3193. { .name = FW_FILE_ISP24XX, },
  3194. { .name = FW_FILE_ISP25XX, },
  3195. { .name = FW_FILE_ISP81XX, },
  3196. { .name = FW_FILE_ISP82XX, },
  3197. };
  3198. struct fw_blob *
  3199. qla2x00_request_firmware(scsi_qla_host_t *vha)
  3200. {
  3201. struct qla_hw_data *ha = vha->hw;
  3202. struct fw_blob *blob;
  3203. blob = NULL;
  3204. if (IS_QLA2100(ha)) {
  3205. blob = &qla_fw_blobs[FW_ISP21XX];
  3206. } else if (IS_QLA2200(ha)) {
  3207. blob = &qla_fw_blobs[FW_ISP22XX];
  3208. } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  3209. blob = &qla_fw_blobs[FW_ISP2300];
  3210. } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  3211. blob = &qla_fw_blobs[FW_ISP2322];
  3212. } else if (IS_QLA24XX_TYPE(ha)) {
  3213. blob = &qla_fw_blobs[FW_ISP24XX];
  3214. } else if (IS_QLA25XX(ha)) {
  3215. blob = &qla_fw_blobs[FW_ISP25XX];
  3216. } else if (IS_QLA81XX(ha)) {
  3217. blob = &qla_fw_blobs[FW_ISP81XX];
  3218. } else if (IS_QLA82XX(ha)) {
  3219. blob = &qla_fw_blobs[FW_ISP82XX];
  3220. }
  3221. mutex_lock(&qla_fw_lock);
  3222. if (blob->fw)
  3223. goto out;
  3224. if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
  3225. DEBUG2(printk("scsi(%ld): Failed to load firmware image "
  3226. "(%s).\n", vha->host_no, blob->name));
  3227. blob->fw = NULL;
  3228. blob = NULL;
  3229. goto out;
  3230. }
  3231. out:
  3232. mutex_unlock(&qla_fw_lock);
  3233. return blob;
  3234. }
  3235. static void
  3236. qla2x00_release_firmware(void)
  3237. {
  3238. int idx;
  3239. mutex_lock(&qla_fw_lock);
  3240. for (idx = 0; idx < FW_BLOBS; idx++)
  3241. if (qla_fw_blobs[idx].fw)
  3242. release_firmware(qla_fw_blobs[idx].fw);
  3243. mutex_unlock(&qla_fw_lock);
  3244. }
  3245. static pci_ers_result_t
  3246. qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  3247. {
  3248. scsi_qla_host_t *vha = pci_get_drvdata(pdev);
  3249. struct qla_hw_data *ha = vha->hw;
  3250. DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
  3251. state));
  3252. switch (state) {
  3253. case pci_channel_io_normal:
  3254. ha->flags.eeh_busy = 0;
  3255. return PCI_ERS_RESULT_CAN_RECOVER;
  3256. case pci_channel_io_frozen:
  3257. ha->flags.eeh_busy = 1;
  3258. qla2x00_free_irqs(vha);
  3259. pci_disable_device(pdev);
  3260. return PCI_ERS_RESULT_NEED_RESET;
  3261. case pci_channel_io_perm_failure:
  3262. ha->flags.pci_channel_io_perm_failure = 1;
  3263. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  3264. return PCI_ERS_RESULT_DISCONNECT;
  3265. }
  3266. return PCI_ERS_RESULT_NEED_RESET;
  3267. }
  3268. static pci_ers_result_t
  3269. qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
  3270. {
  3271. int risc_paused = 0;
  3272. uint32_t stat;
  3273. unsigned long flags;
  3274. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3275. struct qla_hw_data *ha = base_vha->hw;
  3276. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3277. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  3278. spin_lock_irqsave(&ha->hardware_lock, flags);
  3279. if (IS_QLA2100(ha) || IS_QLA2200(ha)){
  3280. stat = RD_REG_DWORD(&reg->hccr);
  3281. if (stat & HCCR_RISC_PAUSE)
  3282. risc_paused = 1;
  3283. } else if (IS_QLA23XX(ha)) {
  3284. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  3285. if (stat & HSR_RISC_PAUSED)
  3286. risc_paused = 1;
  3287. } else if (IS_FWI2_CAPABLE(ha)) {
  3288. stat = RD_REG_DWORD(&reg24->host_status);
  3289. if (stat & HSRX_RISC_PAUSED)
  3290. risc_paused = 1;
  3291. }
  3292. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3293. if (risc_paused) {
  3294. qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
  3295. "Dumping firmware!\n");
  3296. ha->isp_ops->fw_dump(base_vha, 0);
  3297. return PCI_ERS_RESULT_NEED_RESET;
  3298. } else
  3299. return PCI_ERS_RESULT_RECOVERED;
  3300. }
  3301. static pci_ers_result_t
  3302. qla2xxx_pci_slot_reset(struct pci_dev *pdev)
  3303. {
  3304. pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
  3305. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3306. struct qla_hw_data *ha = base_vha->hw;
  3307. struct rsp_que *rsp;
  3308. int rc, retries = 10;
  3309. DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
  3310. /* Workaround: qla2xxx driver which access hardware earlier
  3311. * needs error state to be pci_channel_io_online.
  3312. * Otherwise mailbox command timesout.
  3313. */
  3314. pdev->error_state = pci_channel_io_normal;
  3315. pci_restore_state(pdev);
  3316. /* pci_restore_state() clears the saved_state flag of the device
  3317. * save restored state which resets saved_state flag
  3318. */
  3319. pci_save_state(pdev);
  3320. if (ha->mem_only)
  3321. rc = pci_enable_device_mem(pdev);
  3322. else
  3323. rc = pci_enable_device(pdev);
  3324. if (rc) {
  3325. qla_printk(KERN_WARNING, ha,
  3326. "Can't re-enable PCI device after reset.\n");
  3327. return ret;
  3328. }
  3329. rsp = ha->rsp_q_map[0];
  3330. if (qla2x00_request_irqs(ha, rsp))
  3331. return ret;
  3332. if (ha->isp_ops->pci_config(base_vha))
  3333. return ret;
  3334. while (ha->flags.mbox_busy && retries--)
  3335. msleep(1000);
  3336. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3337. if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
  3338. ret = PCI_ERS_RESULT_RECOVERED;
  3339. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3340. DEBUG17(qla_printk(KERN_WARNING, ha,
  3341. "slot_reset-return:ret=%x\n", ret));
  3342. return ret;
  3343. }
  3344. static void
  3345. qla2xxx_pci_resume(struct pci_dev *pdev)
  3346. {
  3347. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3348. struct qla_hw_data *ha = base_vha->hw;
  3349. int ret;
  3350. DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
  3351. ret = qla2x00_wait_for_hba_online(base_vha);
  3352. if (ret != QLA_SUCCESS) {
  3353. qla_printk(KERN_ERR, ha,
  3354. "the device failed to resume I/O "
  3355. "from slot/link_reset");
  3356. }
  3357. pci_cleanup_aer_uncorrect_error_status(pdev);
  3358. ha->flags.eeh_busy = 0;
  3359. }
  3360. static struct pci_error_handlers qla2xxx_err_handler = {
  3361. .error_detected = qla2xxx_pci_error_detected,
  3362. .mmio_enabled = qla2xxx_pci_mmio_enabled,
  3363. .slot_reset = qla2xxx_pci_slot_reset,
  3364. .resume = qla2xxx_pci_resume,
  3365. };
  3366. static struct pci_device_id qla2xxx_pci_tbl[] = {
  3367. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
  3368. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
  3369. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
  3370. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
  3371. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
  3372. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
  3373. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
  3374. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
  3375. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
  3376. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
  3377. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
  3378. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
  3379. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
  3380. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
  3381. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
  3382. { 0 },
  3383. };
  3384. MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
  3385. static struct pci_driver qla2xxx_pci_driver = {
  3386. .name = QLA2XXX_DRIVER_NAME,
  3387. .driver = {
  3388. .owner = THIS_MODULE,
  3389. },
  3390. .id_table = qla2xxx_pci_tbl,
  3391. .probe = qla2x00_probe_one,
  3392. .remove = qla2x00_remove_one,
  3393. .err_handler = &qla2xxx_err_handler,
  3394. };
  3395. static struct file_operations apidev_fops = {
  3396. .owner = THIS_MODULE,
  3397. };
  3398. /**
  3399. * qla2x00_module_init - Module initialization.
  3400. **/
  3401. static int __init
  3402. qla2x00_module_init(void)
  3403. {
  3404. int ret = 0;
  3405. /* Allocate cache for SRBs. */
  3406. srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
  3407. SLAB_HWCACHE_ALIGN, NULL);
  3408. if (srb_cachep == NULL) {
  3409. printk(KERN_ERR
  3410. "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
  3411. return -ENOMEM;
  3412. }
  3413. /* Derive version string. */
  3414. strcpy(qla2x00_version_str, QLA2XXX_VERSION);
  3415. if (ql2xextended_error_logging)
  3416. strcat(qla2x00_version_str, "-debug");
  3417. qla2xxx_transport_template =
  3418. fc_attach_transport(&qla2xxx_transport_functions);
  3419. if (!qla2xxx_transport_template) {
  3420. kmem_cache_destroy(srb_cachep);
  3421. return -ENODEV;
  3422. }
  3423. apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
  3424. if (apidev_major < 0) {
  3425. printk(KERN_WARNING "qla2xxx: Unable to register char device "
  3426. "%s\n", QLA2XXX_APIDEV);
  3427. }
  3428. qla2xxx_transport_vport_template =
  3429. fc_attach_transport(&qla2xxx_transport_vport_functions);
  3430. if (!qla2xxx_transport_vport_template) {
  3431. kmem_cache_destroy(srb_cachep);
  3432. fc_release_transport(qla2xxx_transport_template);
  3433. return -ENODEV;
  3434. }
  3435. printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
  3436. qla2x00_version_str);
  3437. ret = pci_register_driver(&qla2xxx_pci_driver);
  3438. if (ret) {
  3439. kmem_cache_destroy(srb_cachep);
  3440. fc_release_transport(qla2xxx_transport_template);
  3441. fc_release_transport(qla2xxx_transport_vport_template);
  3442. }
  3443. return ret;
  3444. }
  3445. /**
  3446. * qla2x00_module_exit - Module cleanup.
  3447. **/
  3448. static void __exit
  3449. qla2x00_module_exit(void)
  3450. {
  3451. unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
  3452. pci_unregister_driver(&qla2xxx_pci_driver);
  3453. qla2x00_release_firmware();
  3454. kmem_cache_destroy(srb_cachep);
  3455. if (ctx_cachep)
  3456. kmem_cache_destroy(ctx_cachep);
  3457. fc_release_transport(qla2xxx_transport_template);
  3458. fc_release_transport(qla2xxx_transport_vport_template);
  3459. }
  3460. module_init(qla2x00_module_init);
  3461. module_exit(qla2x00_module_exit);
  3462. MODULE_AUTHOR("QLogic Corporation");
  3463. MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
  3464. MODULE_LICENSE("GPL");
  3465. MODULE_VERSION(QLA2XXX_VERSION);
  3466. MODULE_FIRMWARE(FW_FILE_ISP21XX);
  3467. MODULE_FIRMWARE(FW_FILE_ISP22XX);
  3468. MODULE_FIRMWARE(FW_FILE_ISP2300);
  3469. MODULE_FIRMWARE(FW_FILE_ISP2322);
  3470. MODULE_FIRMWARE(FW_FILE_ISP24XX);
  3471. MODULE_FIRMWARE(FW_FILE_ISP25XX);