x86.c 57 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include "kvm.h"
  17. #include "x86.h"
  18. #include "x86_emulate.h"
  19. #include "segment_descriptor.h"
  20. #include "irq.h"
  21. #include <linux/kvm.h>
  22. #include <linux/fs.h>
  23. #include <linux/vmalloc.h>
  24. #include <linux/module.h>
  25. #include <asm/uaccess.h>
  26. #include <asm/msr.h>
  27. #define MAX_IO_MSRS 256
  28. #define CR0_RESERVED_BITS \
  29. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  30. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  31. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  32. #define CR4_RESERVED_BITS \
  33. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  34. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  35. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  36. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  37. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  38. #define EFER_RESERVED_BITS 0xfffffffffffff2fe
  39. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  40. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  41. struct kvm_x86_ops *kvm_x86_ops;
  42. struct kvm_stats_debugfs_item debugfs_entries[] = {
  43. { "pf_fixed", VCPU_STAT(pf_fixed) },
  44. { "pf_guest", VCPU_STAT(pf_guest) },
  45. { "tlb_flush", VCPU_STAT(tlb_flush) },
  46. { "invlpg", VCPU_STAT(invlpg) },
  47. { "exits", VCPU_STAT(exits) },
  48. { "io_exits", VCPU_STAT(io_exits) },
  49. { "mmio_exits", VCPU_STAT(mmio_exits) },
  50. { "signal_exits", VCPU_STAT(signal_exits) },
  51. { "irq_window", VCPU_STAT(irq_window_exits) },
  52. { "halt_exits", VCPU_STAT(halt_exits) },
  53. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  54. { "request_irq", VCPU_STAT(request_irq_exits) },
  55. { "irq_exits", VCPU_STAT(irq_exits) },
  56. { "host_state_reload", VCPU_STAT(host_state_reload) },
  57. { "efer_reload", VCPU_STAT(efer_reload) },
  58. { "fpu_reload", VCPU_STAT(fpu_reload) },
  59. { "insn_emulation", VCPU_STAT(insn_emulation) },
  60. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  61. { NULL }
  62. };
  63. unsigned long segment_base(u16 selector)
  64. {
  65. struct descriptor_table gdt;
  66. struct segment_descriptor *d;
  67. unsigned long table_base;
  68. unsigned long v;
  69. if (selector == 0)
  70. return 0;
  71. asm("sgdt %0" : "=m"(gdt));
  72. table_base = gdt.base;
  73. if (selector & 4) { /* from ldt */
  74. u16 ldt_selector;
  75. asm("sldt %0" : "=g"(ldt_selector));
  76. table_base = segment_base(ldt_selector);
  77. }
  78. d = (struct segment_descriptor *)(table_base + (selector & ~7));
  79. v = d->base_low | ((unsigned long)d->base_mid << 16) |
  80. ((unsigned long)d->base_high << 24);
  81. #ifdef CONFIG_X86_64
  82. if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  83. v |= ((unsigned long) \
  84. ((struct segment_descriptor_64 *)d)->base_higher) << 32;
  85. #endif
  86. return v;
  87. }
  88. EXPORT_SYMBOL_GPL(segment_base);
  89. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  90. {
  91. if (irqchip_in_kernel(vcpu->kvm))
  92. return vcpu->apic_base;
  93. else
  94. return vcpu->apic_base;
  95. }
  96. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  97. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  98. {
  99. /* TODO: reserve bits check */
  100. if (irqchip_in_kernel(vcpu->kvm))
  101. kvm_lapic_set_base(vcpu, data);
  102. else
  103. vcpu->apic_base = data;
  104. }
  105. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  106. static void inject_gp(struct kvm_vcpu *vcpu)
  107. {
  108. kvm_x86_ops->inject_gp(vcpu, 0);
  109. }
  110. /*
  111. * Load the pae pdptrs. Return true is they are all valid.
  112. */
  113. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  114. {
  115. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  116. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  117. int i;
  118. int ret;
  119. u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
  120. mutex_lock(&vcpu->kvm->lock);
  121. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  122. offset * sizeof(u64), sizeof(pdpte));
  123. if (ret < 0) {
  124. ret = 0;
  125. goto out;
  126. }
  127. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  128. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  129. ret = 0;
  130. goto out;
  131. }
  132. }
  133. ret = 1;
  134. memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
  135. out:
  136. mutex_unlock(&vcpu->kvm->lock);
  137. return ret;
  138. }
  139. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  140. {
  141. if (cr0 & CR0_RESERVED_BITS) {
  142. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  143. cr0, vcpu->cr0);
  144. inject_gp(vcpu);
  145. return;
  146. }
  147. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  148. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  149. inject_gp(vcpu);
  150. return;
  151. }
  152. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  153. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  154. "and a clear PE flag\n");
  155. inject_gp(vcpu);
  156. return;
  157. }
  158. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  159. #ifdef CONFIG_X86_64
  160. if ((vcpu->shadow_efer & EFER_LME)) {
  161. int cs_db, cs_l;
  162. if (!is_pae(vcpu)) {
  163. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  164. "in long mode while PAE is disabled\n");
  165. inject_gp(vcpu);
  166. return;
  167. }
  168. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  169. if (cs_l) {
  170. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  171. "in long mode while CS.L == 1\n");
  172. inject_gp(vcpu);
  173. return;
  174. }
  175. } else
  176. #endif
  177. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
  178. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  179. "reserved bits\n");
  180. inject_gp(vcpu);
  181. return;
  182. }
  183. }
  184. kvm_x86_ops->set_cr0(vcpu, cr0);
  185. vcpu->cr0 = cr0;
  186. mutex_lock(&vcpu->kvm->lock);
  187. kvm_mmu_reset_context(vcpu);
  188. mutex_unlock(&vcpu->kvm->lock);
  189. return;
  190. }
  191. EXPORT_SYMBOL_GPL(set_cr0);
  192. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  193. {
  194. set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
  195. }
  196. EXPORT_SYMBOL_GPL(lmsw);
  197. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  198. {
  199. if (cr4 & CR4_RESERVED_BITS) {
  200. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  201. inject_gp(vcpu);
  202. return;
  203. }
  204. if (is_long_mode(vcpu)) {
  205. if (!(cr4 & X86_CR4_PAE)) {
  206. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  207. "in long mode\n");
  208. inject_gp(vcpu);
  209. return;
  210. }
  211. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  212. && !load_pdptrs(vcpu, vcpu->cr3)) {
  213. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  214. inject_gp(vcpu);
  215. return;
  216. }
  217. if (cr4 & X86_CR4_VMXE) {
  218. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  219. inject_gp(vcpu);
  220. return;
  221. }
  222. kvm_x86_ops->set_cr4(vcpu, cr4);
  223. vcpu->cr4 = cr4;
  224. mutex_lock(&vcpu->kvm->lock);
  225. kvm_mmu_reset_context(vcpu);
  226. mutex_unlock(&vcpu->kvm->lock);
  227. }
  228. EXPORT_SYMBOL_GPL(set_cr4);
  229. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  230. {
  231. if (is_long_mode(vcpu)) {
  232. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  233. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  234. inject_gp(vcpu);
  235. return;
  236. }
  237. } else {
  238. if (is_pae(vcpu)) {
  239. if (cr3 & CR3_PAE_RESERVED_BITS) {
  240. printk(KERN_DEBUG
  241. "set_cr3: #GP, reserved bits\n");
  242. inject_gp(vcpu);
  243. return;
  244. }
  245. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  246. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  247. "reserved bits\n");
  248. inject_gp(vcpu);
  249. return;
  250. }
  251. }
  252. /*
  253. * We don't check reserved bits in nonpae mode, because
  254. * this isn't enforced, and VMware depends on this.
  255. */
  256. }
  257. mutex_lock(&vcpu->kvm->lock);
  258. /*
  259. * Does the new cr3 value map to physical memory? (Note, we
  260. * catch an invalid cr3 even in real-mode, because it would
  261. * cause trouble later on when we turn on paging anyway.)
  262. *
  263. * A real CPU would silently accept an invalid cr3 and would
  264. * attempt to use it - with largely undefined (and often hard
  265. * to debug) behavior on the guest side.
  266. */
  267. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  268. inject_gp(vcpu);
  269. else {
  270. vcpu->cr3 = cr3;
  271. vcpu->mmu.new_cr3(vcpu);
  272. }
  273. mutex_unlock(&vcpu->kvm->lock);
  274. }
  275. EXPORT_SYMBOL_GPL(set_cr3);
  276. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  277. {
  278. if (cr8 & CR8_RESERVED_BITS) {
  279. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  280. inject_gp(vcpu);
  281. return;
  282. }
  283. if (irqchip_in_kernel(vcpu->kvm))
  284. kvm_lapic_set_tpr(vcpu, cr8);
  285. else
  286. vcpu->cr8 = cr8;
  287. }
  288. EXPORT_SYMBOL_GPL(set_cr8);
  289. unsigned long get_cr8(struct kvm_vcpu *vcpu)
  290. {
  291. if (irqchip_in_kernel(vcpu->kvm))
  292. return kvm_lapic_get_cr8(vcpu);
  293. else
  294. return vcpu->cr8;
  295. }
  296. EXPORT_SYMBOL_GPL(get_cr8);
  297. /*
  298. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  299. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  300. *
  301. * This list is modified at module load time to reflect the
  302. * capabilities of the host cpu.
  303. */
  304. static u32 msrs_to_save[] = {
  305. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  306. MSR_K6_STAR,
  307. #ifdef CONFIG_X86_64
  308. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  309. #endif
  310. MSR_IA32_TIME_STAMP_COUNTER,
  311. };
  312. static unsigned num_msrs_to_save;
  313. static u32 emulated_msrs[] = {
  314. MSR_IA32_MISC_ENABLE,
  315. };
  316. #ifdef CONFIG_X86_64
  317. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  318. {
  319. if (efer & EFER_RESERVED_BITS) {
  320. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  321. efer);
  322. inject_gp(vcpu);
  323. return;
  324. }
  325. if (is_paging(vcpu)
  326. && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  327. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  328. inject_gp(vcpu);
  329. return;
  330. }
  331. kvm_x86_ops->set_efer(vcpu, efer);
  332. efer &= ~EFER_LMA;
  333. efer |= vcpu->shadow_efer & EFER_LMA;
  334. vcpu->shadow_efer = efer;
  335. }
  336. #endif
  337. /*
  338. * Writes msr value into into the appropriate "register".
  339. * Returns 0 on success, non-0 otherwise.
  340. * Assumes vcpu_load() was already called.
  341. */
  342. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  343. {
  344. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  345. }
  346. /*
  347. * Adapt set_msr() to msr_io()'s calling convention
  348. */
  349. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  350. {
  351. return kvm_set_msr(vcpu, index, *data);
  352. }
  353. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  354. {
  355. switch (msr) {
  356. #ifdef CONFIG_X86_64
  357. case MSR_EFER:
  358. set_efer(vcpu, data);
  359. break;
  360. #endif
  361. case MSR_IA32_MC0_STATUS:
  362. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  363. __FUNCTION__, data);
  364. break;
  365. case MSR_IA32_MCG_STATUS:
  366. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  367. __FUNCTION__, data);
  368. break;
  369. case MSR_IA32_UCODE_REV:
  370. case MSR_IA32_UCODE_WRITE:
  371. case 0x200 ... 0x2ff: /* MTRRs */
  372. break;
  373. case MSR_IA32_APICBASE:
  374. kvm_set_apic_base(vcpu, data);
  375. break;
  376. case MSR_IA32_MISC_ENABLE:
  377. vcpu->ia32_misc_enable_msr = data;
  378. break;
  379. default:
  380. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
  381. return 1;
  382. }
  383. return 0;
  384. }
  385. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  386. /*
  387. * Reads an msr value (of 'msr_index') into 'pdata'.
  388. * Returns 0 on success, non-0 otherwise.
  389. * Assumes vcpu_load() was already called.
  390. */
  391. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  392. {
  393. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  394. }
  395. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  396. {
  397. u64 data;
  398. switch (msr) {
  399. case 0xc0010010: /* SYSCFG */
  400. case 0xc0010015: /* HWCR */
  401. case MSR_IA32_PLATFORM_ID:
  402. case MSR_IA32_P5_MC_ADDR:
  403. case MSR_IA32_P5_MC_TYPE:
  404. case MSR_IA32_MC0_CTL:
  405. case MSR_IA32_MCG_STATUS:
  406. case MSR_IA32_MCG_CAP:
  407. case MSR_IA32_MC0_MISC:
  408. case MSR_IA32_MC0_MISC+4:
  409. case MSR_IA32_MC0_MISC+8:
  410. case MSR_IA32_MC0_MISC+12:
  411. case MSR_IA32_MC0_MISC+16:
  412. case MSR_IA32_UCODE_REV:
  413. case MSR_IA32_PERF_STATUS:
  414. case MSR_IA32_EBL_CR_POWERON:
  415. /* MTRR registers */
  416. case 0xfe:
  417. case 0x200 ... 0x2ff:
  418. data = 0;
  419. break;
  420. case 0xcd: /* fsb frequency */
  421. data = 3;
  422. break;
  423. case MSR_IA32_APICBASE:
  424. data = kvm_get_apic_base(vcpu);
  425. break;
  426. case MSR_IA32_MISC_ENABLE:
  427. data = vcpu->ia32_misc_enable_msr;
  428. break;
  429. #ifdef CONFIG_X86_64
  430. case MSR_EFER:
  431. data = vcpu->shadow_efer;
  432. break;
  433. #endif
  434. default:
  435. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  436. return 1;
  437. }
  438. *pdata = data;
  439. return 0;
  440. }
  441. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  442. /*
  443. * Read or write a bunch of msrs. All parameters are kernel addresses.
  444. *
  445. * @return number of msrs set successfully.
  446. */
  447. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  448. struct kvm_msr_entry *entries,
  449. int (*do_msr)(struct kvm_vcpu *vcpu,
  450. unsigned index, u64 *data))
  451. {
  452. int i;
  453. vcpu_load(vcpu);
  454. for (i = 0; i < msrs->nmsrs; ++i)
  455. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  456. break;
  457. vcpu_put(vcpu);
  458. return i;
  459. }
  460. /*
  461. * Read or write a bunch of msrs. Parameters are user addresses.
  462. *
  463. * @return number of msrs set successfully.
  464. */
  465. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  466. int (*do_msr)(struct kvm_vcpu *vcpu,
  467. unsigned index, u64 *data),
  468. int writeback)
  469. {
  470. struct kvm_msrs msrs;
  471. struct kvm_msr_entry *entries;
  472. int r, n;
  473. unsigned size;
  474. r = -EFAULT;
  475. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  476. goto out;
  477. r = -E2BIG;
  478. if (msrs.nmsrs >= MAX_IO_MSRS)
  479. goto out;
  480. r = -ENOMEM;
  481. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  482. entries = vmalloc(size);
  483. if (!entries)
  484. goto out;
  485. r = -EFAULT;
  486. if (copy_from_user(entries, user_msrs->entries, size))
  487. goto out_free;
  488. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  489. if (r < 0)
  490. goto out_free;
  491. r = -EFAULT;
  492. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  493. goto out_free;
  494. r = n;
  495. out_free:
  496. vfree(entries);
  497. out:
  498. return r;
  499. }
  500. /*
  501. * Make sure that a cpu that is being hot-unplugged does not have any vcpus
  502. * cached on it.
  503. */
  504. void decache_vcpus_on_cpu(int cpu)
  505. {
  506. struct kvm *vm;
  507. struct kvm_vcpu *vcpu;
  508. int i;
  509. spin_lock(&kvm_lock);
  510. list_for_each_entry(vm, &vm_list, vm_list)
  511. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  512. vcpu = vm->vcpus[i];
  513. if (!vcpu)
  514. continue;
  515. /*
  516. * If the vcpu is locked, then it is running on some
  517. * other cpu and therefore it is not cached on the
  518. * cpu in question.
  519. *
  520. * If it's not locked, check the last cpu it executed
  521. * on.
  522. */
  523. if (mutex_trylock(&vcpu->mutex)) {
  524. if (vcpu->cpu == cpu) {
  525. kvm_x86_ops->vcpu_decache(vcpu);
  526. vcpu->cpu = -1;
  527. }
  528. mutex_unlock(&vcpu->mutex);
  529. }
  530. }
  531. spin_unlock(&kvm_lock);
  532. }
  533. int kvm_dev_ioctl_check_extension(long ext)
  534. {
  535. int r;
  536. switch (ext) {
  537. case KVM_CAP_IRQCHIP:
  538. case KVM_CAP_HLT:
  539. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  540. case KVM_CAP_USER_MEMORY:
  541. case KVM_CAP_SET_TSS_ADDR:
  542. r = 1;
  543. break;
  544. default:
  545. r = 0;
  546. break;
  547. }
  548. return r;
  549. }
  550. long kvm_arch_dev_ioctl(struct file *filp,
  551. unsigned int ioctl, unsigned long arg)
  552. {
  553. void __user *argp = (void __user *)arg;
  554. long r;
  555. switch (ioctl) {
  556. case KVM_GET_MSR_INDEX_LIST: {
  557. struct kvm_msr_list __user *user_msr_list = argp;
  558. struct kvm_msr_list msr_list;
  559. unsigned n;
  560. r = -EFAULT;
  561. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  562. goto out;
  563. n = msr_list.nmsrs;
  564. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  565. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  566. goto out;
  567. r = -E2BIG;
  568. if (n < num_msrs_to_save)
  569. goto out;
  570. r = -EFAULT;
  571. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  572. num_msrs_to_save * sizeof(u32)))
  573. goto out;
  574. if (copy_to_user(user_msr_list->indices
  575. + num_msrs_to_save * sizeof(u32),
  576. &emulated_msrs,
  577. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  578. goto out;
  579. r = 0;
  580. break;
  581. }
  582. default:
  583. r = -EINVAL;
  584. }
  585. out:
  586. return r;
  587. }
  588. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  589. {
  590. kvm_x86_ops->vcpu_load(vcpu, cpu);
  591. }
  592. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  593. {
  594. kvm_x86_ops->vcpu_put(vcpu);
  595. }
  596. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  597. {
  598. u64 efer;
  599. int i;
  600. struct kvm_cpuid_entry *e, *entry;
  601. rdmsrl(MSR_EFER, efer);
  602. entry = NULL;
  603. for (i = 0; i < vcpu->cpuid_nent; ++i) {
  604. e = &vcpu->cpuid_entries[i];
  605. if (e->function == 0x80000001) {
  606. entry = e;
  607. break;
  608. }
  609. }
  610. if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
  611. entry->edx &= ~(1 << 20);
  612. printk(KERN_INFO "kvm: guest NX capability removed\n");
  613. }
  614. }
  615. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  616. struct kvm_cpuid *cpuid,
  617. struct kvm_cpuid_entry __user *entries)
  618. {
  619. int r;
  620. r = -E2BIG;
  621. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  622. goto out;
  623. r = -EFAULT;
  624. if (copy_from_user(&vcpu->cpuid_entries, entries,
  625. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  626. goto out;
  627. vcpu->cpuid_nent = cpuid->nent;
  628. cpuid_fix_nx_cap(vcpu);
  629. return 0;
  630. out:
  631. return r;
  632. }
  633. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  634. struct kvm_lapic_state *s)
  635. {
  636. vcpu_load(vcpu);
  637. memcpy(s->regs, vcpu->apic->regs, sizeof *s);
  638. vcpu_put(vcpu);
  639. return 0;
  640. }
  641. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  642. struct kvm_lapic_state *s)
  643. {
  644. vcpu_load(vcpu);
  645. memcpy(vcpu->apic->regs, s->regs, sizeof *s);
  646. kvm_apic_post_state_restore(vcpu);
  647. vcpu_put(vcpu);
  648. return 0;
  649. }
  650. long kvm_arch_vcpu_ioctl(struct file *filp,
  651. unsigned int ioctl, unsigned long arg)
  652. {
  653. struct kvm_vcpu *vcpu = filp->private_data;
  654. void __user *argp = (void __user *)arg;
  655. int r;
  656. switch (ioctl) {
  657. case KVM_GET_LAPIC: {
  658. struct kvm_lapic_state lapic;
  659. memset(&lapic, 0, sizeof lapic);
  660. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  661. if (r)
  662. goto out;
  663. r = -EFAULT;
  664. if (copy_to_user(argp, &lapic, sizeof lapic))
  665. goto out;
  666. r = 0;
  667. break;
  668. }
  669. case KVM_SET_LAPIC: {
  670. struct kvm_lapic_state lapic;
  671. r = -EFAULT;
  672. if (copy_from_user(&lapic, argp, sizeof lapic))
  673. goto out;
  674. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  675. if (r)
  676. goto out;
  677. r = 0;
  678. break;
  679. }
  680. case KVM_SET_CPUID: {
  681. struct kvm_cpuid __user *cpuid_arg = argp;
  682. struct kvm_cpuid cpuid;
  683. r = -EFAULT;
  684. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  685. goto out;
  686. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  687. if (r)
  688. goto out;
  689. break;
  690. }
  691. case KVM_GET_MSRS:
  692. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  693. break;
  694. case KVM_SET_MSRS:
  695. r = msr_io(vcpu, argp, do_set_msr, 0);
  696. break;
  697. default:
  698. r = -EINVAL;
  699. }
  700. out:
  701. return r;
  702. }
  703. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  704. {
  705. int ret;
  706. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  707. return -1;
  708. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  709. return ret;
  710. }
  711. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  712. u32 kvm_nr_mmu_pages)
  713. {
  714. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  715. return -EINVAL;
  716. mutex_lock(&kvm->lock);
  717. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  718. kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
  719. mutex_unlock(&kvm->lock);
  720. return 0;
  721. }
  722. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  723. {
  724. return kvm->n_alloc_mmu_pages;
  725. }
  726. /*
  727. * Set a new alias region. Aliases map a portion of physical memory into
  728. * another portion. This is useful for memory windows, for example the PC
  729. * VGA region.
  730. */
  731. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  732. struct kvm_memory_alias *alias)
  733. {
  734. int r, n;
  735. struct kvm_mem_alias *p;
  736. r = -EINVAL;
  737. /* General sanity checks */
  738. if (alias->memory_size & (PAGE_SIZE - 1))
  739. goto out;
  740. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  741. goto out;
  742. if (alias->slot >= KVM_ALIAS_SLOTS)
  743. goto out;
  744. if (alias->guest_phys_addr + alias->memory_size
  745. < alias->guest_phys_addr)
  746. goto out;
  747. if (alias->target_phys_addr + alias->memory_size
  748. < alias->target_phys_addr)
  749. goto out;
  750. mutex_lock(&kvm->lock);
  751. p = &kvm->aliases[alias->slot];
  752. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  753. p->npages = alias->memory_size >> PAGE_SHIFT;
  754. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  755. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  756. if (kvm->aliases[n - 1].npages)
  757. break;
  758. kvm->naliases = n;
  759. kvm_mmu_zap_all(kvm);
  760. mutex_unlock(&kvm->lock);
  761. return 0;
  762. out:
  763. return r;
  764. }
  765. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  766. {
  767. int r;
  768. r = 0;
  769. switch (chip->chip_id) {
  770. case KVM_IRQCHIP_PIC_MASTER:
  771. memcpy(&chip->chip.pic,
  772. &pic_irqchip(kvm)->pics[0],
  773. sizeof(struct kvm_pic_state));
  774. break;
  775. case KVM_IRQCHIP_PIC_SLAVE:
  776. memcpy(&chip->chip.pic,
  777. &pic_irqchip(kvm)->pics[1],
  778. sizeof(struct kvm_pic_state));
  779. break;
  780. case KVM_IRQCHIP_IOAPIC:
  781. memcpy(&chip->chip.ioapic,
  782. ioapic_irqchip(kvm),
  783. sizeof(struct kvm_ioapic_state));
  784. break;
  785. default:
  786. r = -EINVAL;
  787. break;
  788. }
  789. return r;
  790. }
  791. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  792. {
  793. int r;
  794. r = 0;
  795. switch (chip->chip_id) {
  796. case KVM_IRQCHIP_PIC_MASTER:
  797. memcpy(&pic_irqchip(kvm)->pics[0],
  798. &chip->chip.pic,
  799. sizeof(struct kvm_pic_state));
  800. break;
  801. case KVM_IRQCHIP_PIC_SLAVE:
  802. memcpy(&pic_irqchip(kvm)->pics[1],
  803. &chip->chip.pic,
  804. sizeof(struct kvm_pic_state));
  805. break;
  806. case KVM_IRQCHIP_IOAPIC:
  807. memcpy(ioapic_irqchip(kvm),
  808. &chip->chip.ioapic,
  809. sizeof(struct kvm_ioapic_state));
  810. break;
  811. default:
  812. r = -EINVAL;
  813. break;
  814. }
  815. kvm_pic_update_irq(pic_irqchip(kvm));
  816. return r;
  817. }
  818. long kvm_arch_vm_ioctl(struct file *filp,
  819. unsigned int ioctl, unsigned long arg)
  820. {
  821. struct kvm *kvm = filp->private_data;
  822. void __user *argp = (void __user *)arg;
  823. int r = -EINVAL;
  824. switch (ioctl) {
  825. case KVM_SET_TSS_ADDR:
  826. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  827. if (r < 0)
  828. goto out;
  829. break;
  830. case KVM_SET_MEMORY_REGION: {
  831. struct kvm_memory_region kvm_mem;
  832. struct kvm_userspace_memory_region kvm_userspace_mem;
  833. r = -EFAULT;
  834. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  835. goto out;
  836. kvm_userspace_mem.slot = kvm_mem.slot;
  837. kvm_userspace_mem.flags = kvm_mem.flags;
  838. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  839. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  840. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  841. if (r)
  842. goto out;
  843. break;
  844. }
  845. case KVM_SET_NR_MMU_PAGES:
  846. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  847. if (r)
  848. goto out;
  849. break;
  850. case KVM_GET_NR_MMU_PAGES:
  851. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  852. break;
  853. case KVM_SET_MEMORY_ALIAS: {
  854. struct kvm_memory_alias alias;
  855. r = -EFAULT;
  856. if (copy_from_user(&alias, argp, sizeof alias))
  857. goto out;
  858. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  859. if (r)
  860. goto out;
  861. break;
  862. }
  863. case KVM_CREATE_IRQCHIP:
  864. r = -ENOMEM;
  865. kvm->vpic = kvm_create_pic(kvm);
  866. if (kvm->vpic) {
  867. r = kvm_ioapic_init(kvm);
  868. if (r) {
  869. kfree(kvm->vpic);
  870. kvm->vpic = NULL;
  871. goto out;
  872. }
  873. } else
  874. goto out;
  875. break;
  876. case KVM_IRQ_LINE: {
  877. struct kvm_irq_level irq_event;
  878. r = -EFAULT;
  879. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  880. goto out;
  881. if (irqchip_in_kernel(kvm)) {
  882. mutex_lock(&kvm->lock);
  883. if (irq_event.irq < 16)
  884. kvm_pic_set_irq(pic_irqchip(kvm),
  885. irq_event.irq,
  886. irq_event.level);
  887. kvm_ioapic_set_irq(kvm->vioapic,
  888. irq_event.irq,
  889. irq_event.level);
  890. mutex_unlock(&kvm->lock);
  891. r = 0;
  892. }
  893. break;
  894. }
  895. case KVM_GET_IRQCHIP: {
  896. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  897. struct kvm_irqchip chip;
  898. r = -EFAULT;
  899. if (copy_from_user(&chip, argp, sizeof chip))
  900. goto out;
  901. r = -ENXIO;
  902. if (!irqchip_in_kernel(kvm))
  903. goto out;
  904. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  905. if (r)
  906. goto out;
  907. r = -EFAULT;
  908. if (copy_to_user(argp, &chip, sizeof chip))
  909. goto out;
  910. r = 0;
  911. break;
  912. }
  913. case KVM_SET_IRQCHIP: {
  914. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  915. struct kvm_irqchip chip;
  916. r = -EFAULT;
  917. if (copy_from_user(&chip, argp, sizeof chip))
  918. goto out;
  919. r = -ENXIO;
  920. if (!irqchip_in_kernel(kvm))
  921. goto out;
  922. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  923. if (r)
  924. goto out;
  925. r = 0;
  926. break;
  927. }
  928. default:
  929. ;
  930. }
  931. out:
  932. return r;
  933. }
  934. static void kvm_init_msr_list(void)
  935. {
  936. u32 dummy[2];
  937. unsigned i, j;
  938. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  939. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  940. continue;
  941. if (j < i)
  942. msrs_to_save[j] = msrs_to_save[i];
  943. j++;
  944. }
  945. num_msrs_to_save = j;
  946. }
  947. /*
  948. * Only apic need an MMIO device hook, so shortcut now..
  949. */
  950. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  951. gpa_t addr)
  952. {
  953. struct kvm_io_device *dev;
  954. if (vcpu->apic) {
  955. dev = &vcpu->apic->dev;
  956. if (dev->in_range(dev, addr))
  957. return dev;
  958. }
  959. return NULL;
  960. }
  961. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  962. gpa_t addr)
  963. {
  964. struct kvm_io_device *dev;
  965. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  966. if (dev == NULL)
  967. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  968. return dev;
  969. }
  970. int emulator_read_std(unsigned long addr,
  971. void *val,
  972. unsigned int bytes,
  973. struct kvm_vcpu *vcpu)
  974. {
  975. void *data = val;
  976. while (bytes) {
  977. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  978. unsigned offset = addr & (PAGE_SIZE-1);
  979. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  980. int ret;
  981. if (gpa == UNMAPPED_GVA)
  982. return X86EMUL_PROPAGATE_FAULT;
  983. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  984. if (ret < 0)
  985. return X86EMUL_UNHANDLEABLE;
  986. bytes -= tocopy;
  987. data += tocopy;
  988. addr += tocopy;
  989. }
  990. return X86EMUL_CONTINUE;
  991. }
  992. EXPORT_SYMBOL_GPL(emulator_read_std);
  993. static int emulator_write_std(unsigned long addr,
  994. const void *val,
  995. unsigned int bytes,
  996. struct kvm_vcpu *vcpu)
  997. {
  998. pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
  999. return X86EMUL_UNHANDLEABLE;
  1000. }
  1001. static int emulator_read_emulated(unsigned long addr,
  1002. void *val,
  1003. unsigned int bytes,
  1004. struct kvm_vcpu *vcpu)
  1005. {
  1006. struct kvm_io_device *mmio_dev;
  1007. gpa_t gpa;
  1008. if (vcpu->mmio_read_completed) {
  1009. memcpy(val, vcpu->mmio_data, bytes);
  1010. vcpu->mmio_read_completed = 0;
  1011. return X86EMUL_CONTINUE;
  1012. }
  1013. gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  1014. /* For APIC access vmexit */
  1015. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1016. goto mmio;
  1017. if (emulator_read_std(addr, val, bytes, vcpu)
  1018. == X86EMUL_CONTINUE)
  1019. return X86EMUL_CONTINUE;
  1020. if (gpa == UNMAPPED_GVA)
  1021. return X86EMUL_PROPAGATE_FAULT;
  1022. mmio:
  1023. /*
  1024. * Is this MMIO handled locally?
  1025. */
  1026. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1027. if (mmio_dev) {
  1028. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1029. return X86EMUL_CONTINUE;
  1030. }
  1031. vcpu->mmio_needed = 1;
  1032. vcpu->mmio_phys_addr = gpa;
  1033. vcpu->mmio_size = bytes;
  1034. vcpu->mmio_is_write = 0;
  1035. return X86EMUL_UNHANDLEABLE;
  1036. }
  1037. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1038. const void *val, int bytes)
  1039. {
  1040. int ret;
  1041. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1042. if (ret < 0)
  1043. return 0;
  1044. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1045. return 1;
  1046. }
  1047. static int emulator_write_emulated_onepage(unsigned long addr,
  1048. const void *val,
  1049. unsigned int bytes,
  1050. struct kvm_vcpu *vcpu)
  1051. {
  1052. struct kvm_io_device *mmio_dev;
  1053. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  1054. if (gpa == UNMAPPED_GVA) {
  1055. kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
  1056. return X86EMUL_PROPAGATE_FAULT;
  1057. }
  1058. /* For APIC access vmexit */
  1059. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1060. goto mmio;
  1061. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1062. return X86EMUL_CONTINUE;
  1063. mmio:
  1064. /*
  1065. * Is this MMIO handled locally?
  1066. */
  1067. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1068. if (mmio_dev) {
  1069. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1070. return X86EMUL_CONTINUE;
  1071. }
  1072. vcpu->mmio_needed = 1;
  1073. vcpu->mmio_phys_addr = gpa;
  1074. vcpu->mmio_size = bytes;
  1075. vcpu->mmio_is_write = 1;
  1076. memcpy(vcpu->mmio_data, val, bytes);
  1077. return X86EMUL_CONTINUE;
  1078. }
  1079. int emulator_write_emulated(unsigned long addr,
  1080. const void *val,
  1081. unsigned int bytes,
  1082. struct kvm_vcpu *vcpu)
  1083. {
  1084. /* Crossing a page boundary? */
  1085. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1086. int rc, now;
  1087. now = -addr & ~PAGE_MASK;
  1088. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1089. if (rc != X86EMUL_CONTINUE)
  1090. return rc;
  1091. addr += now;
  1092. val += now;
  1093. bytes -= now;
  1094. }
  1095. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1096. }
  1097. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1098. static int emulator_cmpxchg_emulated(unsigned long addr,
  1099. const void *old,
  1100. const void *new,
  1101. unsigned int bytes,
  1102. struct kvm_vcpu *vcpu)
  1103. {
  1104. static int reported;
  1105. if (!reported) {
  1106. reported = 1;
  1107. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1108. }
  1109. return emulator_write_emulated(addr, new, bytes, vcpu);
  1110. }
  1111. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1112. {
  1113. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1114. }
  1115. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1116. {
  1117. return X86EMUL_CONTINUE;
  1118. }
  1119. int emulate_clts(struct kvm_vcpu *vcpu)
  1120. {
  1121. kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
  1122. return X86EMUL_CONTINUE;
  1123. }
  1124. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1125. {
  1126. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1127. switch (dr) {
  1128. case 0 ... 3:
  1129. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1130. return X86EMUL_CONTINUE;
  1131. default:
  1132. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1133. return X86EMUL_UNHANDLEABLE;
  1134. }
  1135. }
  1136. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1137. {
  1138. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1139. int exception;
  1140. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1141. if (exception) {
  1142. /* FIXME: better handling */
  1143. return X86EMUL_UNHANDLEABLE;
  1144. }
  1145. return X86EMUL_CONTINUE;
  1146. }
  1147. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1148. {
  1149. static int reported;
  1150. u8 opcodes[4];
  1151. unsigned long rip = vcpu->rip;
  1152. unsigned long rip_linear;
  1153. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1154. if (reported)
  1155. return;
  1156. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1157. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1158. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1159. reported = 1;
  1160. }
  1161. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1162. struct x86_emulate_ops emulate_ops = {
  1163. .read_std = emulator_read_std,
  1164. .write_std = emulator_write_std,
  1165. .read_emulated = emulator_read_emulated,
  1166. .write_emulated = emulator_write_emulated,
  1167. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1168. };
  1169. int emulate_instruction(struct kvm_vcpu *vcpu,
  1170. struct kvm_run *run,
  1171. unsigned long cr2,
  1172. u16 error_code,
  1173. int no_decode)
  1174. {
  1175. int r;
  1176. vcpu->mmio_fault_cr2 = cr2;
  1177. kvm_x86_ops->cache_regs(vcpu);
  1178. vcpu->mmio_is_write = 0;
  1179. vcpu->pio.string = 0;
  1180. if (!no_decode) {
  1181. int cs_db, cs_l;
  1182. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1183. vcpu->emulate_ctxt.vcpu = vcpu;
  1184. vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1185. vcpu->emulate_ctxt.cr2 = cr2;
  1186. vcpu->emulate_ctxt.mode =
  1187. (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
  1188. ? X86EMUL_MODE_REAL : cs_l
  1189. ? X86EMUL_MODE_PROT64 : cs_db
  1190. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1191. if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1192. vcpu->emulate_ctxt.cs_base = 0;
  1193. vcpu->emulate_ctxt.ds_base = 0;
  1194. vcpu->emulate_ctxt.es_base = 0;
  1195. vcpu->emulate_ctxt.ss_base = 0;
  1196. } else {
  1197. vcpu->emulate_ctxt.cs_base =
  1198. get_segment_base(vcpu, VCPU_SREG_CS);
  1199. vcpu->emulate_ctxt.ds_base =
  1200. get_segment_base(vcpu, VCPU_SREG_DS);
  1201. vcpu->emulate_ctxt.es_base =
  1202. get_segment_base(vcpu, VCPU_SREG_ES);
  1203. vcpu->emulate_ctxt.ss_base =
  1204. get_segment_base(vcpu, VCPU_SREG_SS);
  1205. }
  1206. vcpu->emulate_ctxt.gs_base =
  1207. get_segment_base(vcpu, VCPU_SREG_GS);
  1208. vcpu->emulate_ctxt.fs_base =
  1209. get_segment_base(vcpu, VCPU_SREG_FS);
  1210. r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
  1211. ++vcpu->stat.insn_emulation;
  1212. if (r) {
  1213. ++vcpu->stat.insn_emulation_fail;
  1214. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1215. return EMULATE_DONE;
  1216. return EMULATE_FAIL;
  1217. }
  1218. }
  1219. r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
  1220. if (vcpu->pio.string)
  1221. return EMULATE_DO_MMIO;
  1222. if ((r || vcpu->mmio_is_write) && run) {
  1223. run->exit_reason = KVM_EXIT_MMIO;
  1224. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1225. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1226. run->mmio.len = vcpu->mmio_size;
  1227. run->mmio.is_write = vcpu->mmio_is_write;
  1228. }
  1229. if (r) {
  1230. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1231. return EMULATE_DONE;
  1232. if (!vcpu->mmio_needed) {
  1233. kvm_report_emulation_failure(vcpu, "mmio");
  1234. return EMULATE_FAIL;
  1235. }
  1236. return EMULATE_DO_MMIO;
  1237. }
  1238. kvm_x86_ops->decache_regs(vcpu);
  1239. kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
  1240. if (vcpu->mmio_is_write) {
  1241. vcpu->mmio_needed = 0;
  1242. return EMULATE_DO_MMIO;
  1243. }
  1244. return EMULATE_DONE;
  1245. }
  1246. EXPORT_SYMBOL_GPL(emulate_instruction);
  1247. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1248. {
  1249. int i;
  1250. for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
  1251. if (vcpu->pio.guest_pages[i]) {
  1252. kvm_release_page(vcpu->pio.guest_pages[i]);
  1253. vcpu->pio.guest_pages[i] = NULL;
  1254. }
  1255. }
  1256. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1257. {
  1258. void *p = vcpu->pio_data;
  1259. void *q;
  1260. unsigned bytes;
  1261. int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
  1262. q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1263. PAGE_KERNEL);
  1264. if (!q) {
  1265. free_pio_guest_pages(vcpu);
  1266. return -ENOMEM;
  1267. }
  1268. q += vcpu->pio.guest_page_offset;
  1269. bytes = vcpu->pio.size * vcpu->pio.cur_count;
  1270. if (vcpu->pio.in)
  1271. memcpy(q, p, bytes);
  1272. else
  1273. memcpy(p, q, bytes);
  1274. q -= vcpu->pio.guest_page_offset;
  1275. vunmap(q);
  1276. free_pio_guest_pages(vcpu);
  1277. return 0;
  1278. }
  1279. int complete_pio(struct kvm_vcpu *vcpu)
  1280. {
  1281. struct kvm_pio_request *io = &vcpu->pio;
  1282. long delta;
  1283. int r;
  1284. kvm_x86_ops->cache_regs(vcpu);
  1285. if (!io->string) {
  1286. if (io->in)
  1287. memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
  1288. io->size);
  1289. } else {
  1290. if (io->in) {
  1291. r = pio_copy_data(vcpu);
  1292. if (r) {
  1293. kvm_x86_ops->cache_regs(vcpu);
  1294. return r;
  1295. }
  1296. }
  1297. delta = 1;
  1298. if (io->rep) {
  1299. delta *= io->cur_count;
  1300. /*
  1301. * The size of the register should really depend on
  1302. * current address size.
  1303. */
  1304. vcpu->regs[VCPU_REGS_RCX] -= delta;
  1305. }
  1306. if (io->down)
  1307. delta = -delta;
  1308. delta *= io->size;
  1309. if (io->in)
  1310. vcpu->regs[VCPU_REGS_RDI] += delta;
  1311. else
  1312. vcpu->regs[VCPU_REGS_RSI] += delta;
  1313. }
  1314. kvm_x86_ops->decache_regs(vcpu);
  1315. io->count -= io->cur_count;
  1316. io->cur_count = 0;
  1317. return 0;
  1318. }
  1319. static void kernel_pio(struct kvm_io_device *pio_dev,
  1320. struct kvm_vcpu *vcpu,
  1321. void *pd)
  1322. {
  1323. /* TODO: String I/O for in kernel device */
  1324. mutex_lock(&vcpu->kvm->lock);
  1325. if (vcpu->pio.in)
  1326. kvm_iodevice_read(pio_dev, vcpu->pio.port,
  1327. vcpu->pio.size,
  1328. pd);
  1329. else
  1330. kvm_iodevice_write(pio_dev, vcpu->pio.port,
  1331. vcpu->pio.size,
  1332. pd);
  1333. mutex_unlock(&vcpu->kvm->lock);
  1334. }
  1335. static void pio_string_write(struct kvm_io_device *pio_dev,
  1336. struct kvm_vcpu *vcpu)
  1337. {
  1338. struct kvm_pio_request *io = &vcpu->pio;
  1339. void *pd = vcpu->pio_data;
  1340. int i;
  1341. mutex_lock(&vcpu->kvm->lock);
  1342. for (i = 0; i < io->cur_count; i++) {
  1343. kvm_iodevice_write(pio_dev, io->port,
  1344. io->size,
  1345. pd);
  1346. pd += io->size;
  1347. }
  1348. mutex_unlock(&vcpu->kvm->lock);
  1349. }
  1350. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1351. gpa_t addr)
  1352. {
  1353. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1354. }
  1355. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1356. int size, unsigned port)
  1357. {
  1358. struct kvm_io_device *pio_dev;
  1359. vcpu->run->exit_reason = KVM_EXIT_IO;
  1360. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1361. vcpu->run->io.size = vcpu->pio.size = size;
  1362. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1363. vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
  1364. vcpu->run->io.port = vcpu->pio.port = port;
  1365. vcpu->pio.in = in;
  1366. vcpu->pio.string = 0;
  1367. vcpu->pio.down = 0;
  1368. vcpu->pio.guest_page_offset = 0;
  1369. vcpu->pio.rep = 0;
  1370. kvm_x86_ops->cache_regs(vcpu);
  1371. memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
  1372. kvm_x86_ops->decache_regs(vcpu);
  1373. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1374. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1375. if (pio_dev) {
  1376. kernel_pio(pio_dev, vcpu, vcpu->pio_data);
  1377. complete_pio(vcpu);
  1378. return 1;
  1379. }
  1380. return 0;
  1381. }
  1382. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1383. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1384. int size, unsigned long count, int down,
  1385. gva_t address, int rep, unsigned port)
  1386. {
  1387. unsigned now, in_page;
  1388. int i, ret = 0;
  1389. int nr_pages = 1;
  1390. struct page *page;
  1391. struct kvm_io_device *pio_dev;
  1392. vcpu->run->exit_reason = KVM_EXIT_IO;
  1393. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1394. vcpu->run->io.size = vcpu->pio.size = size;
  1395. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1396. vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
  1397. vcpu->run->io.port = vcpu->pio.port = port;
  1398. vcpu->pio.in = in;
  1399. vcpu->pio.string = 1;
  1400. vcpu->pio.down = down;
  1401. vcpu->pio.guest_page_offset = offset_in_page(address);
  1402. vcpu->pio.rep = rep;
  1403. if (!count) {
  1404. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1405. return 1;
  1406. }
  1407. if (!down)
  1408. in_page = PAGE_SIZE - offset_in_page(address);
  1409. else
  1410. in_page = offset_in_page(address) + size;
  1411. now = min(count, (unsigned long)in_page / size);
  1412. if (!now) {
  1413. /*
  1414. * String I/O straddles page boundary. Pin two guest pages
  1415. * so that we satisfy atomicity constraints. Do just one
  1416. * transaction to avoid complexity.
  1417. */
  1418. nr_pages = 2;
  1419. now = 1;
  1420. }
  1421. if (down) {
  1422. /*
  1423. * String I/O in reverse. Yuck. Kill the guest, fix later.
  1424. */
  1425. pr_unimpl(vcpu, "guest string pio down\n");
  1426. inject_gp(vcpu);
  1427. return 1;
  1428. }
  1429. vcpu->run->io.count = now;
  1430. vcpu->pio.cur_count = now;
  1431. if (vcpu->pio.cur_count == vcpu->pio.count)
  1432. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1433. for (i = 0; i < nr_pages; ++i) {
  1434. mutex_lock(&vcpu->kvm->lock);
  1435. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  1436. vcpu->pio.guest_pages[i] = page;
  1437. mutex_unlock(&vcpu->kvm->lock);
  1438. if (!page) {
  1439. inject_gp(vcpu);
  1440. free_pio_guest_pages(vcpu);
  1441. return 1;
  1442. }
  1443. }
  1444. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1445. if (!vcpu->pio.in) {
  1446. /* string PIO write */
  1447. ret = pio_copy_data(vcpu);
  1448. if (ret >= 0 && pio_dev) {
  1449. pio_string_write(pio_dev, vcpu);
  1450. complete_pio(vcpu);
  1451. if (vcpu->pio.count == 0)
  1452. ret = 1;
  1453. }
  1454. } else if (pio_dev)
  1455. pr_unimpl(vcpu, "no string pio read support yet, "
  1456. "port %x size %d count %ld\n",
  1457. port, size, count);
  1458. return ret;
  1459. }
  1460. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  1461. int kvm_arch_init(void *opaque)
  1462. {
  1463. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  1464. kvm_init_msr_list();
  1465. if (kvm_x86_ops) {
  1466. printk(KERN_ERR "kvm: already loaded the other module\n");
  1467. return -EEXIST;
  1468. }
  1469. if (!ops->cpu_has_kvm_support()) {
  1470. printk(KERN_ERR "kvm: no hardware support\n");
  1471. return -EOPNOTSUPP;
  1472. }
  1473. if (ops->disabled_by_bios()) {
  1474. printk(KERN_ERR "kvm: disabled by bios\n");
  1475. return -EOPNOTSUPP;
  1476. }
  1477. kvm_x86_ops = ops;
  1478. return 0;
  1479. }
  1480. void kvm_arch_exit(void)
  1481. {
  1482. kvm_x86_ops = NULL;
  1483. }
  1484. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  1485. {
  1486. ++vcpu->stat.halt_exits;
  1487. if (irqchip_in_kernel(vcpu->kvm)) {
  1488. vcpu->mp_state = VCPU_MP_STATE_HALTED;
  1489. kvm_vcpu_block(vcpu);
  1490. if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
  1491. return -EINTR;
  1492. return 1;
  1493. } else {
  1494. vcpu->run->exit_reason = KVM_EXIT_HLT;
  1495. return 0;
  1496. }
  1497. }
  1498. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  1499. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  1500. {
  1501. unsigned long nr, a0, a1, a2, a3, ret;
  1502. kvm_x86_ops->cache_regs(vcpu);
  1503. nr = vcpu->regs[VCPU_REGS_RAX];
  1504. a0 = vcpu->regs[VCPU_REGS_RBX];
  1505. a1 = vcpu->regs[VCPU_REGS_RCX];
  1506. a2 = vcpu->regs[VCPU_REGS_RDX];
  1507. a3 = vcpu->regs[VCPU_REGS_RSI];
  1508. if (!is_long_mode(vcpu)) {
  1509. nr &= 0xFFFFFFFF;
  1510. a0 &= 0xFFFFFFFF;
  1511. a1 &= 0xFFFFFFFF;
  1512. a2 &= 0xFFFFFFFF;
  1513. a3 &= 0xFFFFFFFF;
  1514. }
  1515. switch (nr) {
  1516. default:
  1517. ret = -KVM_ENOSYS;
  1518. break;
  1519. }
  1520. vcpu->regs[VCPU_REGS_RAX] = ret;
  1521. kvm_x86_ops->decache_regs(vcpu);
  1522. return 0;
  1523. }
  1524. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  1525. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  1526. {
  1527. char instruction[3];
  1528. int ret = 0;
  1529. mutex_lock(&vcpu->kvm->lock);
  1530. /*
  1531. * Blow out the MMU to ensure that no other VCPU has an active mapping
  1532. * to ensure that the updated hypercall appears atomically across all
  1533. * VCPUs.
  1534. */
  1535. kvm_mmu_zap_all(vcpu->kvm);
  1536. kvm_x86_ops->cache_regs(vcpu);
  1537. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  1538. if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
  1539. != X86EMUL_CONTINUE)
  1540. ret = -EFAULT;
  1541. mutex_unlock(&vcpu->kvm->lock);
  1542. return ret;
  1543. }
  1544. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  1545. {
  1546. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  1547. }
  1548. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  1549. {
  1550. struct descriptor_table dt = { limit, base };
  1551. kvm_x86_ops->set_gdt(vcpu, &dt);
  1552. }
  1553. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  1554. {
  1555. struct descriptor_table dt = { limit, base };
  1556. kvm_x86_ops->set_idt(vcpu, &dt);
  1557. }
  1558. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  1559. unsigned long *rflags)
  1560. {
  1561. lmsw(vcpu, msw);
  1562. *rflags = kvm_x86_ops->get_rflags(vcpu);
  1563. }
  1564. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  1565. {
  1566. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1567. switch (cr) {
  1568. case 0:
  1569. return vcpu->cr0;
  1570. case 2:
  1571. return vcpu->cr2;
  1572. case 3:
  1573. return vcpu->cr3;
  1574. case 4:
  1575. return vcpu->cr4;
  1576. default:
  1577. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  1578. return 0;
  1579. }
  1580. }
  1581. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  1582. unsigned long *rflags)
  1583. {
  1584. switch (cr) {
  1585. case 0:
  1586. set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
  1587. *rflags = kvm_x86_ops->get_rflags(vcpu);
  1588. break;
  1589. case 2:
  1590. vcpu->cr2 = val;
  1591. break;
  1592. case 3:
  1593. set_cr3(vcpu, val);
  1594. break;
  1595. case 4:
  1596. set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
  1597. break;
  1598. default:
  1599. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  1600. }
  1601. }
  1602. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  1603. {
  1604. int i;
  1605. u32 function;
  1606. struct kvm_cpuid_entry *e, *best;
  1607. kvm_x86_ops->cache_regs(vcpu);
  1608. function = vcpu->regs[VCPU_REGS_RAX];
  1609. vcpu->regs[VCPU_REGS_RAX] = 0;
  1610. vcpu->regs[VCPU_REGS_RBX] = 0;
  1611. vcpu->regs[VCPU_REGS_RCX] = 0;
  1612. vcpu->regs[VCPU_REGS_RDX] = 0;
  1613. best = NULL;
  1614. for (i = 0; i < vcpu->cpuid_nent; ++i) {
  1615. e = &vcpu->cpuid_entries[i];
  1616. if (e->function == function) {
  1617. best = e;
  1618. break;
  1619. }
  1620. /*
  1621. * Both basic or both extended?
  1622. */
  1623. if (((e->function ^ function) & 0x80000000) == 0)
  1624. if (!best || e->function > best->function)
  1625. best = e;
  1626. }
  1627. if (best) {
  1628. vcpu->regs[VCPU_REGS_RAX] = best->eax;
  1629. vcpu->regs[VCPU_REGS_RBX] = best->ebx;
  1630. vcpu->regs[VCPU_REGS_RCX] = best->ecx;
  1631. vcpu->regs[VCPU_REGS_RDX] = best->edx;
  1632. }
  1633. kvm_x86_ops->decache_regs(vcpu);
  1634. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1635. }
  1636. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  1637. /*
  1638. * Check if userspace requested an interrupt window, and that the
  1639. * interrupt window is open.
  1640. *
  1641. * No need to exit to userspace if we already have an interrupt queued.
  1642. */
  1643. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  1644. struct kvm_run *kvm_run)
  1645. {
  1646. return (!vcpu->irq_summary &&
  1647. kvm_run->request_interrupt_window &&
  1648. vcpu->interrupt_window_open &&
  1649. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  1650. }
  1651. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  1652. struct kvm_run *kvm_run)
  1653. {
  1654. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  1655. kvm_run->cr8 = get_cr8(vcpu);
  1656. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  1657. if (irqchip_in_kernel(vcpu->kvm))
  1658. kvm_run->ready_for_interrupt_injection = 1;
  1659. else
  1660. kvm_run->ready_for_interrupt_injection =
  1661. (vcpu->interrupt_window_open &&
  1662. vcpu->irq_summary == 0);
  1663. }
  1664. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  1665. {
  1666. int r;
  1667. if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
  1668. pr_debug("vcpu %d received sipi with vector # %x\n",
  1669. vcpu->vcpu_id, vcpu->sipi_vector);
  1670. kvm_lapic_reset(vcpu);
  1671. r = kvm_x86_ops->vcpu_reset(vcpu);
  1672. if (r)
  1673. return r;
  1674. vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
  1675. }
  1676. preempted:
  1677. if (vcpu->guest_debug.enabled)
  1678. kvm_x86_ops->guest_debug_pre(vcpu);
  1679. again:
  1680. r = kvm_mmu_reload(vcpu);
  1681. if (unlikely(r))
  1682. goto out;
  1683. kvm_inject_pending_timer_irqs(vcpu);
  1684. preempt_disable();
  1685. kvm_x86_ops->prepare_guest_switch(vcpu);
  1686. kvm_load_guest_fpu(vcpu);
  1687. local_irq_disable();
  1688. if (signal_pending(current)) {
  1689. local_irq_enable();
  1690. preempt_enable();
  1691. r = -EINTR;
  1692. kvm_run->exit_reason = KVM_EXIT_INTR;
  1693. ++vcpu->stat.signal_exits;
  1694. goto out;
  1695. }
  1696. if (irqchip_in_kernel(vcpu->kvm))
  1697. kvm_x86_ops->inject_pending_irq(vcpu);
  1698. else if (!vcpu->mmio_read_completed)
  1699. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  1700. vcpu->guest_mode = 1;
  1701. kvm_guest_enter();
  1702. if (vcpu->requests)
  1703. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  1704. kvm_x86_ops->tlb_flush(vcpu);
  1705. kvm_x86_ops->run(vcpu, kvm_run);
  1706. vcpu->guest_mode = 0;
  1707. local_irq_enable();
  1708. ++vcpu->stat.exits;
  1709. /*
  1710. * We must have an instruction between local_irq_enable() and
  1711. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  1712. * the interrupt shadow. The stat.exits increment will do nicely.
  1713. * But we need to prevent reordering, hence this barrier():
  1714. */
  1715. barrier();
  1716. kvm_guest_exit();
  1717. preempt_enable();
  1718. /*
  1719. * Profile KVM exit RIPs:
  1720. */
  1721. if (unlikely(prof_on == KVM_PROFILING)) {
  1722. kvm_x86_ops->cache_regs(vcpu);
  1723. profile_hit(KVM_PROFILING, (void *)vcpu->rip);
  1724. }
  1725. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  1726. if (r > 0) {
  1727. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  1728. r = -EINTR;
  1729. kvm_run->exit_reason = KVM_EXIT_INTR;
  1730. ++vcpu->stat.request_irq_exits;
  1731. goto out;
  1732. }
  1733. if (!need_resched())
  1734. goto again;
  1735. }
  1736. out:
  1737. if (r > 0) {
  1738. kvm_resched(vcpu);
  1739. goto preempted;
  1740. }
  1741. post_kvm_run_save(vcpu, kvm_run);
  1742. return r;
  1743. }
  1744. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  1745. {
  1746. int r;
  1747. sigset_t sigsaved;
  1748. vcpu_load(vcpu);
  1749. if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
  1750. kvm_vcpu_block(vcpu);
  1751. vcpu_put(vcpu);
  1752. return -EAGAIN;
  1753. }
  1754. if (vcpu->sigset_active)
  1755. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  1756. /* re-sync apic's tpr */
  1757. if (!irqchip_in_kernel(vcpu->kvm))
  1758. set_cr8(vcpu, kvm_run->cr8);
  1759. if (vcpu->pio.cur_count) {
  1760. r = complete_pio(vcpu);
  1761. if (r)
  1762. goto out;
  1763. }
  1764. #if CONFIG_HAS_IOMEM
  1765. if (vcpu->mmio_needed) {
  1766. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  1767. vcpu->mmio_read_completed = 1;
  1768. vcpu->mmio_needed = 0;
  1769. r = emulate_instruction(vcpu, kvm_run,
  1770. vcpu->mmio_fault_cr2, 0, 1);
  1771. if (r == EMULATE_DO_MMIO) {
  1772. /*
  1773. * Read-modify-write. Back to userspace.
  1774. */
  1775. r = 0;
  1776. goto out;
  1777. }
  1778. }
  1779. #endif
  1780. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
  1781. kvm_x86_ops->cache_regs(vcpu);
  1782. vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
  1783. kvm_x86_ops->decache_regs(vcpu);
  1784. }
  1785. r = __vcpu_run(vcpu, kvm_run);
  1786. out:
  1787. if (vcpu->sigset_active)
  1788. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  1789. vcpu_put(vcpu);
  1790. return r;
  1791. }
  1792. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  1793. {
  1794. vcpu_load(vcpu);
  1795. kvm_x86_ops->cache_regs(vcpu);
  1796. regs->rax = vcpu->regs[VCPU_REGS_RAX];
  1797. regs->rbx = vcpu->regs[VCPU_REGS_RBX];
  1798. regs->rcx = vcpu->regs[VCPU_REGS_RCX];
  1799. regs->rdx = vcpu->regs[VCPU_REGS_RDX];
  1800. regs->rsi = vcpu->regs[VCPU_REGS_RSI];
  1801. regs->rdi = vcpu->regs[VCPU_REGS_RDI];
  1802. regs->rsp = vcpu->regs[VCPU_REGS_RSP];
  1803. regs->rbp = vcpu->regs[VCPU_REGS_RBP];
  1804. #ifdef CONFIG_X86_64
  1805. regs->r8 = vcpu->regs[VCPU_REGS_R8];
  1806. regs->r9 = vcpu->regs[VCPU_REGS_R9];
  1807. regs->r10 = vcpu->regs[VCPU_REGS_R10];
  1808. regs->r11 = vcpu->regs[VCPU_REGS_R11];
  1809. regs->r12 = vcpu->regs[VCPU_REGS_R12];
  1810. regs->r13 = vcpu->regs[VCPU_REGS_R13];
  1811. regs->r14 = vcpu->regs[VCPU_REGS_R14];
  1812. regs->r15 = vcpu->regs[VCPU_REGS_R15];
  1813. #endif
  1814. regs->rip = vcpu->rip;
  1815. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  1816. /*
  1817. * Don't leak debug flags in case they were set for guest debugging
  1818. */
  1819. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  1820. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  1821. vcpu_put(vcpu);
  1822. return 0;
  1823. }
  1824. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  1825. {
  1826. vcpu_load(vcpu);
  1827. vcpu->regs[VCPU_REGS_RAX] = regs->rax;
  1828. vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
  1829. vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
  1830. vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
  1831. vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
  1832. vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
  1833. vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
  1834. vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
  1835. #ifdef CONFIG_X86_64
  1836. vcpu->regs[VCPU_REGS_R8] = regs->r8;
  1837. vcpu->regs[VCPU_REGS_R9] = regs->r9;
  1838. vcpu->regs[VCPU_REGS_R10] = regs->r10;
  1839. vcpu->regs[VCPU_REGS_R11] = regs->r11;
  1840. vcpu->regs[VCPU_REGS_R12] = regs->r12;
  1841. vcpu->regs[VCPU_REGS_R13] = regs->r13;
  1842. vcpu->regs[VCPU_REGS_R14] = regs->r14;
  1843. vcpu->regs[VCPU_REGS_R15] = regs->r15;
  1844. #endif
  1845. vcpu->rip = regs->rip;
  1846. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  1847. kvm_x86_ops->decache_regs(vcpu);
  1848. vcpu_put(vcpu);
  1849. return 0;
  1850. }
  1851. static void get_segment(struct kvm_vcpu *vcpu,
  1852. struct kvm_segment *var, int seg)
  1853. {
  1854. return kvm_x86_ops->get_segment(vcpu, var, seg);
  1855. }
  1856. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  1857. {
  1858. struct kvm_segment cs;
  1859. get_segment(vcpu, &cs, VCPU_SREG_CS);
  1860. *db = cs.db;
  1861. *l = cs.l;
  1862. }
  1863. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  1864. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  1865. struct kvm_sregs *sregs)
  1866. {
  1867. struct descriptor_table dt;
  1868. int pending_vec;
  1869. vcpu_load(vcpu);
  1870. get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  1871. get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  1872. get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  1873. get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  1874. get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  1875. get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  1876. get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  1877. get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  1878. kvm_x86_ops->get_idt(vcpu, &dt);
  1879. sregs->idt.limit = dt.limit;
  1880. sregs->idt.base = dt.base;
  1881. kvm_x86_ops->get_gdt(vcpu, &dt);
  1882. sregs->gdt.limit = dt.limit;
  1883. sregs->gdt.base = dt.base;
  1884. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1885. sregs->cr0 = vcpu->cr0;
  1886. sregs->cr2 = vcpu->cr2;
  1887. sregs->cr3 = vcpu->cr3;
  1888. sregs->cr4 = vcpu->cr4;
  1889. sregs->cr8 = get_cr8(vcpu);
  1890. sregs->efer = vcpu->shadow_efer;
  1891. sregs->apic_base = kvm_get_apic_base(vcpu);
  1892. if (irqchip_in_kernel(vcpu->kvm)) {
  1893. memset(sregs->interrupt_bitmap, 0,
  1894. sizeof sregs->interrupt_bitmap);
  1895. pending_vec = kvm_x86_ops->get_irq(vcpu);
  1896. if (pending_vec >= 0)
  1897. set_bit(pending_vec,
  1898. (unsigned long *)sregs->interrupt_bitmap);
  1899. } else
  1900. memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
  1901. sizeof sregs->interrupt_bitmap);
  1902. vcpu_put(vcpu);
  1903. return 0;
  1904. }
  1905. static void set_segment(struct kvm_vcpu *vcpu,
  1906. struct kvm_segment *var, int seg)
  1907. {
  1908. return kvm_x86_ops->set_segment(vcpu, var, seg);
  1909. }
  1910. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  1911. struct kvm_sregs *sregs)
  1912. {
  1913. int mmu_reset_needed = 0;
  1914. int i, pending_vec, max_bits;
  1915. struct descriptor_table dt;
  1916. vcpu_load(vcpu);
  1917. dt.limit = sregs->idt.limit;
  1918. dt.base = sregs->idt.base;
  1919. kvm_x86_ops->set_idt(vcpu, &dt);
  1920. dt.limit = sregs->gdt.limit;
  1921. dt.base = sregs->gdt.base;
  1922. kvm_x86_ops->set_gdt(vcpu, &dt);
  1923. vcpu->cr2 = sregs->cr2;
  1924. mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
  1925. vcpu->cr3 = sregs->cr3;
  1926. set_cr8(vcpu, sregs->cr8);
  1927. mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
  1928. #ifdef CONFIG_X86_64
  1929. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  1930. #endif
  1931. kvm_set_apic_base(vcpu, sregs->apic_base);
  1932. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1933. mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
  1934. vcpu->cr0 = sregs->cr0;
  1935. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  1936. mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
  1937. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  1938. if (!is_long_mode(vcpu) && is_pae(vcpu))
  1939. load_pdptrs(vcpu, vcpu->cr3);
  1940. if (mmu_reset_needed)
  1941. kvm_mmu_reset_context(vcpu);
  1942. if (!irqchip_in_kernel(vcpu->kvm)) {
  1943. memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
  1944. sizeof vcpu->irq_pending);
  1945. vcpu->irq_summary = 0;
  1946. for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
  1947. if (vcpu->irq_pending[i])
  1948. __set_bit(i, &vcpu->irq_summary);
  1949. } else {
  1950. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  1951. pending_vec = find_first_bit(
  1952. (const unsigned long *)sregs->interrupt_bitmap,
  1953. max_bits);
  1954. /* Only pending external irq is handled here */
  1955. if (pending_vec < max_bits) {
  1956. kvm_x86_ops->set_irq(vcpu, pending_vec);
  1957. pr_debug("Set back pending irq %d\n",
  1958. pending_vec);
  1959. }
  1960. }
  1961. set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  1962. set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  1963. set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  1964. set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  1965. set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  1966. set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  1967. set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  1968. set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  1969. vcpu_put(vcpu);
  1970. return 0;
  1971. }
  1972. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  1973. struct kvm_debug_guest *dbg)
  1974. {
  1975. int r;
  1976. vcpu_load(vcpu);
  1977. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  1978. vcpu_put(vcpu);
  1979. return r;
  1980. }
  1981. /*
  1982. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  1983. * we have asm/x86/processor.h
  1984. */
  1985. struct fxsave {
  1986. u16 cwd;
  1987. u16 swd;
  1988. u16 twd;
  1989. u16 fop;
  1990. u64 rip;
  1991. u64 rdp;
  1992. u32 mxcsr;
  1993. u32 mxcsr_mask;
  1994. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  1995. #ifdef CONFIG_X86_64
  1996. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  1997. #else
  1998. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  1999. #endif
  2000. };
  2001. /*
  2002. * Translate a guest virtual address to a guest physical address.
  2003. */
  2004. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  2005. struct kvm_translation *tr)
  2006. {
  2007. unsigned long vaddr = tr->linear_address;
  2008. gpa_t gpa;
  2009. vcpu_load(vcpu);
  2010. mutex_lock(&vcpu->kvm->lock);
  2011. gpa = vcpu->mmu.gva_to_gpa(vcpu, vaddr);
  2012. tr->physical_address = gpa;
  2013. tr->valid = gpa != UNMAPPED_GVA;
  2014. tr->writeable = 1;
  2015. tr->usermode = 0;
  2016. mutex_unlock(&vcpu->kvm->lock);
  2017. vcpu_put(vcpu);
  2018. return 0;
  2019. }
  2020. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2021. {
  2022. struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
  2023. vcpu_load(vcpu);
  2024. memcpy(fpu->fpr, fxsave->st_space, 128);
  2025. fpu->fcw = fxsave->cwd;
  2026. fpu->fsw = fxsave->swd;
  2027. fpu->ftwx = fxsave->twd;
  2028. fpu->last_opcode = fxsave->fop;
  2029. fpu->last_ip = fxsave->rip;
  2030. fpu->last_dp = fxsave->rdp;
  2031. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  2032. vcpu_put(vcpu);
  2033. return 0;
  2034. }
  2035. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2036. {
  2037. struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
  2038. vcpu_load(vcpu);
  2039. memcpy(fxsave->st_space, fpu->fpr, 128);
  2040. fxsave->cwd = fpu->fcw;
  2041. fxsave->swd = fpu->fsw;
  2042. fxsave->twd = fpu->ftwx;
  2043. fxsave->fop = fpu->last_opcode;
  2044. fxsave->rip = fpu->last_ip;
  2045. fxsave->rdp = fpu->last_dp;
  2046. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  2047. vcpu_put(vcpu);
  2048. return 0;
  2049. }
  2050. void fx_init(struct kvm_vcpu *vcpu)
  2051. {
  2052. unsigned after_mxcsr_mask;
  2053. /* Initialize guest FPU by resetting ours and saving into guest's */
  2054. preempt_disable();
  2055. fx_save(&vcpu->host_fx_image);
  2056. fpu_init();
  2057. fx_save(&vcpu->guest_fx_image);
  2058. fx_restore(&vcpu->host_fx_image);
  2059. preempt_enable();
  2060. vcpu->cr0 |= X86_CR0_ET;
  2061. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  2062. vcpu->guest_fx_image.mxcsr = 0x1f80;
  2063. memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
  2064. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  2065. }
  2066. EXPORT_SYMBOL_GPL(fx_init);
  2067. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  2068. {
  2069. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  2070. return;
  2071. vcpu->guest_fpu_loaded = 1;
  2072. fx_save(&vcpu->host_fx_image);
  2073. fx_restore(&vcpu->guest_fx_image);
  2074. }
  2075. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  2076. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  2077. {
  2078. if (!vcpu->guest_fpu_loaded)
  2079. return;
  2080. vcpu->guest_fpu_loaded = 0;
  2081. fx_save(&vcpu->guest_fx_image);
  2082. fx_restore(&vcpu->host_fx_image);
  2083. ++vcpu->stat.fpu_reload;
  2084. }
  2085. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  2086. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  2087. {
  2088. kvm_x86_ops->vcpu_free(vcpu);
  2089. }
  2090. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  2091. unsigned int id)
  2092. {
  2093. int r;
  2094. struct kvm_vcpu *vcpu = kvm_x86_ops->vcpu_create(kvm, id);
  2095. if (IS_ERR(vcpu)) {
  2096. r = -ENOMEM;
  2097. goto fail;
  2098. }
  2099. /* We do fxsave: this must be aligned. */
  2100. BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF);
  2101. vcpu_load(vcpu);
  2102. r = kvm_arch_vcpu_reset(vcpu);
  2103. if (r == 0)
  2104. r = kvm_mmu_setup(vcpu);
  2105. vcpu_put(vcpu);
  2106. if (r < 0)
  2107. goto free_vcpu;
  2108. return vcpu;
  2109. free_vcpu:
  2110. kvm_x86_ops->vcpu_free(vcpu);
  2111. fail:
  2112. return ERR_PTR(r);
  2113. }
  2114. void kvm_arch_vcpu_destory(struct kvm_vcpu *vcpu)
  2115. {
  2116. vcpu_load(vcpu);
  2117. kvm_mmu_unload(vcpu);
  2118. vcpu_put(vcpu);
  2119. kvm_x86_ops->vcpu_free(vcpu);
  2120. }
  2121. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  2122. {
  2123. return kvm_x86_ops->vcpu_reset(vcpu);
  2124. }
  2125. void kvm_arch_hardware_enable(void *garbage)
  2126. {
  2127. kvm_x86_ops->hardware_enable(garbage);
  2128. }
  2129. void kvm_arch_hardware_disable(void *garbage)
  2130. {
  2131. kvm_x86_ops->hardware_disable(garbage);
  2132. }
  2133. int kvm_arch_hardware_setup(void)
  2134. {
  2135. return kvm_x86_ops->hardware_setup();
  2136. }
  2137. void kvm_arch_hardware_unsetup(void)
  2138. {
  2139. kvm_x86_ops->hardware_unsetup();
  2140. }
  2141. void kvm_arch_check_processor_compat(void *rtn)
  2142. {
  2143. kvm_x86_ops->check_processor_compatibility(rtn);
  2144. }
  2145. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  2146. {
  2147. struct page *page;
  2148. struct kvm *kvm;
  2149. int r;
  2150. BUG_ON(vcpu->kvm == NULL);
  2151. kvm = vcpu->kvm;
  2152. vcpu->mmu.root_hpa = INVALID_PAGE;
  2153. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  2154. vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
  2155. else
  2156. vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED;
  2157. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  2158. if (!page) {
  2159. r = -ENOMEM;
  2160. goto fail;
  2161. }
  2162. vcpu->pio_data = page_address(page);
  2163. r = kvm_mmu_create(vcpu);
  2164. if (r < 0)
  2165. goto fail_free_pio_data;
  2166. if (irqchip_in_kernel(kvm)) {
  2167. r = kvm_create_lapic(vcpu);
  2168. if (r < 0)
  2169. goto fail_mmu_destroy;
  2170. }
  2171. return 0;
  2172. fail_mmu_destroy:
  2173. kvm_mmu_destroy(vcpu);
  2174. fail_free_pio_data:
  2175. free_page((unsigned long)vcpu->pio_data);
  2176. fail:
  2177. return r;
  2178. }
  2179. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  2180. {
  2181. kvm_free_lapic(vcpu);
  2182. kvm_mmu_destroy(vcpu);
  2183. free_page((unsigned long)vcpu->pio_data);
  2184. }
  2185. struct kvm *kvm_arch_create_vm(void)
  2186. {
  2187. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  2188. if (!kvm)
  2189. return ERR_PTR(-ENOMEM);
  2190. INIT_LIST_HEAD(&kvm->active_mmu_pages);
  2191. return kvm;
  2192. }
  2193. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  2194. {
  2195. vcpu_load(vcpu);
  2196. kvm_mmu_unload(vcpu);
  2197. vcpu_put(vcpu);
  2198. }
  2199. static void kvm_free_vcpus(struct kvm *kvm)
  2200. {
  2201. unsigned int i;
  2202. /*
  2203. * Unpin any mmu pages first.
  2204. */
  2205. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  2206. if (kvm->vcpus[i])
  2207. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  2208. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  2209. if (kvm->vcpus[i]) {
  2210. kvm_arch_vcpu_free(kvm->vcpus[i]);
  2211. kvm->vcpus[i] = NULL;
  2212. }
  2213. }
  2214. }
  2215. void kvm_arch_destroy_vm(struct kvm *kvm)
  2216. {
  2217. kfree(kvm->vpic);
  2218. kfree(kvm->vioapic);
  2219. kvm_free_vcpus(kvm);
  2220. kvm_free_physmem(kvm);
  2221. kfree(kvm);
  2222. }