rt2500usb.c 61 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2500usb
  19. Abstract: rt2500usb device specific routines.
  20. Supported chipsets: RT2570.
  21. */
  22. #include <linux/delay.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/slab.h>
  28. #include <linux/usb.h>
  29. #include "rt2x00.h"
  30. #include "rt2x00usb.h"
  31. #include "rt2500usb.h"
  32. /*
  33. * Allow hardware encryption to be disabled.
  34. */
  35. static int modparam_nohwcrypt;
  36. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  37. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  38. /*
  39. * Register access.
  40. * All access to the CSR registers will go through the methods
  41. * rt2500usb_register_read and rt2500usb_register_write.
  42. * BBP and RF register require indirect register access,
  43. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  44. * These indirect registers work with busy bits,
  45. * and we will try maximal REGISTER_BUSY_COUNT times to access
  46. * the register while taking a REGISTER_BUSY_DELAY us delay
  47. * between each attampt. When the busy bit is still set at that time,
  48. * the access attempt is considered to have failed,
  49. * and we will print an error.
  50. * If the csr_mutex is already held then the _lock variants must
  51. * be used instead.
  52. */
  53. static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  54. const unsigned int offset,
  55. u16 *value)
  56. {
  57. __le16 reg;
  58. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  59. USB_VENDOR_REQUEST_IN, offset,
  60. &reg, sizeof(reg), REGISTER_TIMEOUT);
  61. *value = le16_to_cpu(reg);
  62. }
  63. static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  64. const unsigned int offset,
  65. u16 *value)
  66. {
  67. __le16 reg;
  68. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  69. USB_VENDOR_REQUEST_IN, offset,
  70. &reg, sizeof(reg), REGISTER_TIMEOUT);
  71. *value = le16_to_cpu(reg);
  72. }
  73. static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  74. const unsigned int offset,
  75. void *value, const u16 length)
  76. {
  77. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  78. USB_VENDOR_REQUEST_IN, offset,
  79. value, length,
  80. REGISTER_TIMEOUT16(length));
  81. }
  82. static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  83. const unsigned int offset,
  84. u16 value)
  85. {
  86. __le16 reg = cpu_to_le16(value);
  87. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  88. USB_VENDOR_REQUEST_OUT, offset,
  89. &reg, sizeof(reg), REGISTER_TIMEOUT);
  90. }
  91. static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  92. const unsigned int offset,
  93. u16 value)
  94. {
  95. __le16 reg = cpu_to_le16(value);
  96. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  97. USB_VENDOR_REQUEST_OUT, offset,
  98. &reg, sizeof(reg), REGISTER_TIMEOUT);
  99. }
  100. static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
  101. const unsigned int offset,
  102. void *value, const u16 length)
  103. {
  104. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  105. USB_VENDOR_REQUEST_OUT, offset,
  106. value, length,
  107. REGISTER_TIMEOUT16(length));
  108. }
  109. static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
  110. const unsigned int offset,
  111. struct rt2x00_field16 field,
  112. u16 *reg)
  113. {
  114. unsigned int i;
  115. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  116. rt2500usb_register_read_lock(rt2x00dev, offset, reg);
  117. if (!rt2x00_get_field16(*reg, field))
  118. return 1;
  119. udelay(REGISTER_BUSY_DELAY);
  120. }
  121. ERROR(rt2x00dev, "Indirect register access failed: "
  122. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  123. *reg = ~0;
  124. return 0;
  125. }
  126. #define WAIT_FOR_BBP(__dev, __reg) \
  127. rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
  128. #define WAIT_FOR_RF(__dev, __reg) \
  129. rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
  130. static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
  131. const unsigned int word, const u8 value)
  132. {
  133. u16 reg;
  134. mutex_lock(&rt2x00dev->csr_mutex);
  135. /*
  136. * Wait until the BBP becomes available, afterwards we
  137. * can safely write the new data into the register.
  138. */
  139. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  140. reg = 0;
  141. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  142. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  143. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  144. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  145. }
  146. mutex_unlock(&rt2x00dev->csr_mutex);
  147. }
  148. static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
  149. const unsigned int word, u8 *value)
  150. {
  151. u16 reg;
  152. mutex_lock(&rt2x00dev->csr_mutex);
  153. /*
  154. * Wait until the BBP becomes available, afterwards we
  155. * can safely write the read request into the register.
  156. * After the data has been written, we wait until hardware
  157. * returns the correct value, if at any time the register
  158. * doesn't become available in time, reg will be 0xffffffff
  159. * which means we return 0xff to the caller.
  160. */
  161. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  162. reg = 0;
  163. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  164. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  165. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  166. if (WAIT_FOR_BBP(rt2x00dev, &reg))
  167. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
  168. }
  169. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  170. mutex_unlock(&rt2x00dev->csr_mutex);
  171. }
  172. static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
  173. const unsigned int word, const u32 value)
  174. {
  175. u16 reg;
  176. mutex_lock(&rt2x00dev->csr_mutex);
  177. /*
  178. * Wait until the RF becomes available, afterwards we
  179. * can safely write the new data into the register.
  180. */
  181. if (WAIT_FOR_RF(rt2x00dev, &reg)) {
  182. reg = 0;
  183. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  184. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
  185. reg = 0;
  186. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  187. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  188. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  189. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  190. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
  191. rt2x00_rf_write(rt2x00dev, word, value);
  192. }
  193. mutex_unlock(&rt2x00dev->csr_mutex);
  194. }
  195. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  196. static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  197. const unsigned int offset,
  198. u32 *value)
  199. {
  200. rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
  201. }
  202. static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  203. const unsigned int offset,
  204. u32 value)
  205. {
  206. rt2500usb_register_write(rt2x00dev, offset, value);
  207. }
  208. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  209. .owner = THIS_MODULE,
  210. .csr = {
  211. .read = _rt2500usb_register_read,
  212. .write = _rt2500usb_register_write,
  213. .flags = RT2X00DEBUGFS_OFFSET,
  214. .word_base = CSR_REG_BASE,
  215. .word_size = sizeof(u16),
  216. .word_count = CSR_REG_SIZE / sizeof(u16),
  217. },
  218. .eeprom = {
  219. .read = rt2x00_eeprom_read,
  220. .write = rt2x00_eeprom_write,
  221. .word_base = EEPROM_BASE,
  222. .word_size = sizeof(u16),
  223. .word_count = EEPROM_SIZE / sizeof(u16),
  224. },
  225. .bbp = {
  226. .read = rt2500usb_bbp_read,
  227. .write = rt2500usb_bbp_write,
  228. .word_base = BBP_BASE,
  229. .word_size = sizeof(u8),
  230. .word_count = BBP_SIZE / sizeof(u8),
  231. },
  232. .rf = {
  233. .read = rt2x00_rf_read,
  234. .write = rt2500usb_rf_write,
  235. .word_base = RF_BASE,
  236. .word_size = sizeof(u32),
  237. .word_count = RF_SIZE / sizeof(u32),
  238. },
  239. };
  240. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  241. static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
  242. {
  243. u16 reg;
  244. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  245. return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
  246. }
  247. #ifdef CONFIG_RT2X00_LIB_LEDS
  248. static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
  249. enum led_brightness brightness)
  250. {
  251. struct rt2x00_led *led =
  252. container_of(led_cdev, struct rt2x00_led, led_dev);
  253. unsigned int enabled = brightness != LED_OFF;
  254. u16 reg;
  255. rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
  256. if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
  257. rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
  258. else if (led->type == LED_TYPE_ACTIVITY)
  259. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
  260. rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
  261. }
  262. static int rt2500usb_blink_set(struct led_classdev *led_cdev,
  263. unsigned long *delay_on,
  264. unsigned long *delay_off)
  265. {
  266. struct rt2x00_led *led =
  267. container_of(led_cdev, struct rt2x00_led, led_dev);
  268. u16 reg;
  269. rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
  270. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
  271. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
  272. rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
  273. return 0;
  274. }
  275. static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
  276. struct rt2x00_led *led,
  277. enum led_type type)
  278. {
  279. led->rt2x00dev = rt2x00dev;
  280. led->type = type;
  281. led->led_dev.brightness_set = rt2500usb_brightness_set;
  282. led->led_dev.blink_set = rt2500usb_blink_set;
  283. led->flags = LED_INITIALIZED;
  284. }
  285. #endif /* CONFIG_RT2X00_LIB_LEDS */
  286. /*
  287. * Configuration handlers.
  288. */
  289. /*
  290. * rt2500usb does not differentiate between shared and pairwise
  291. * keys, so we should use the same function for both key types.
  292. */
  293. static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
  294. struct rt2x00lib_crypto *crypto,
  295. struct ieee80211_key_conf *key)
  296. {
  297. u32 mask;
  298. u16 reg;
  299. enum cipher curr_cipher;
  300. if (crypto->cmd == SET_KEY) {
  301. /*
  302. * Disallow to set WEP key other than with index 0,
  303. * it is known that not work at least on some hardware.
  304. * SW crypto will be used in that case.
  305. */
  306. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  307. key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
  308. key->keyidx != 0)
  309. return -EOPNOTSUPP;
  310. /*
  311. * Pairwise key will always be entry 0, but this
  312. * could collide with a shared key on the same
  313. * position...
  314. */
  315. mask = TXRX_CSR0_KEY_ID.bit_mask;
  316. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  317. curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
  318. reg &= mask;
  319. if (reg && reg == mask)
  320. return -ENOSPC;
  321. reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  322. key->hw_key_idx += reg ? ffz(reg) : 0;
  323. /*
  324. * Hardware requires that all keys use the same cipher
  325. * (e.g. TKIP-only, AES-only, but not TKIP+AES).
  326. * If this is not the first key, compare the cipher with the
  327. * first one and fall back to SW crypto if not the same.
  328. */
  329. if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
  330. return -EOPNOTSUPP;
  331. rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
  332. crypto->key, sizeof(crypto->key));
  333. /*
  334. * The driver does not support the IV/EIV generation
  335. * in hardware. However it demands the data to be provided
  336. * both separately as well as inside the frame.
  337. * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
  338. * to ensure rt2x00lib will not strip the data from the
  339. * frame after the copy, now we must tell mac80211
  340. * to generate the IV/EIV data.
  341. */
  342. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  343. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  344. }
  345. /*
  346. * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
  347. * a particular key is valid.
  348. */
  349. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  350. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
  351. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  352. mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  353. if (crypto->cmd == SET_KEY)
  354. mask |= 1 << key->hw_key_idx;
  355. else if (crypto->cmd == DISABLE_KEY)
  356. mask &= ~(1 << key->hw_key_idx);
  357. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
  358. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  359. return 0;
  360. }
  361. static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
  362. const unsigned int filter_flags)
  363. {
  364. u16 reg;
  365. /*
  366. * Start configuration steps.
  367. * Note that the version error will always be dropped
  368. * and broadcast frames will always be accepted since
  369. * there is no filter for it at this time.
  370. */
  371. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  372. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  373. !(filter_flags & FIF_FCSFAIL));
  374. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  375. !(filter_flags & FIF_PLCPFAIL));
  376. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  377. !(filter_flags & FIF_CONTROL));
  378. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
  379. !(filter_flags & FIF_PROMISC_IN_BSS));
  380. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  381. !(filter_flags & FIF_PROMISC_IN_BSS) &&
  382. !rt2x00dev->intf_ap_count);
  383. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  384. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  385. !(filter_flags & FIF_ALLMULTI));
  386. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  387. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  388. }
  389. static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
  390. struct rt2x00_intf *intf,
  391. struct rt2x00intf_conf *conf,
  392. const unsigned int flags)
  393. {
  394. unsigned int bcn_preload;
  395. u16 reg;
  396. if (flags & CONFIG_UPDATE_TYPE) {
  397. /*
  398. * Enable beacon config
  399. */
  400. bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
  401. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  402. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
  403. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
  404. 2 * (conf->type != NL80211_IFTYPE_STATION));
  405. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  406. /*
  407. * Enable synchronisation.
  408. */
  409. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  410. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  411. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  412. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  413. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  414. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
  415. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  416. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  417. }
  418. if (flags & CONFIG_UPDATE_MAC)
  419. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
  420. (3 * sizeof(__le16)));
  421. if (flags & CONFIG_UPDATE_BSSID)
  422. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
  423. (3 * sizeof(__le16)));
  424. }
  425. static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
  426. struct rt2x00lib_erp *erp,
  427. u32 changed)
  428. {
  429. u16 reg;
  430. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  431. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  432. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
  433. !!erp->short_preamble);
  434. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  435. }
  436. if (changed & BSS_CHANGED_BASIC_RATES)
  437. rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
  438. erp->basic_rates);
  439. if (changed & BSS_CHANGED_BEACON_INT) {
  440. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  441. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
  442. erp->beacon_int * 4);
  443. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  444. }
  445. if (changed & BSS_CHANGED_ERP_SLOT) {
  446. rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
  447. rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
  448. rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
  449. }
  450. }
  451. static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
  452. struct antenna_setup *ant)
  453. {
  454. u8 r2;
  455. u8 r14;
  456. u16 csr5;
  457. u16 csr6;
  458. /*
  459. * We should never come here because rt2x00lib is supposed
  460. * to catch this and send us the correct antenna explicitely.
  461. */
  462. BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
  463. ant->tx == ANTENNA_SW_DIVERSITY);
  464. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  465. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  466. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  467. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  468. /*
  469. * Configure the TX antenna.
  470. */
  471. switch (ant->tx) {
  472. case ANTENNA_HW_DIVERSITY:
  473. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  474. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  475. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  476. break;
  477. case ANTENNA_A:
  478. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  479. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  480. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  481. break;
  482. case ANTENNA_B:
  483. default:
  484. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  485. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  486. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  487. break;
  488. }
  489. /*
  490. * Configure the RX antenna.
  491. */
  492. switch (ant->rx) {
  493. case ANTENNA_HW_DIVERSITY:
  494. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  495. break;
  496. case ANTENNA_A:
  497. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  498. break;
  499. case ANTENNA_B:
  500. default:
  501. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  502. break;
  503. }
  504. /*
  505. * RT2525E and RT5222 need to flip TX I/Q
  506. */
  507. if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
  508. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  509. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  510. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  511. /*
  512. * RT2525E does not need RX I/Q Flip.
  513. */
  514. if (rt2x00_rf(rt2x00dev, RF2525E))
  515. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  516. } else {
  517. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  518. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  519. }
  520. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  521. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  522. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  523. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  524. }
  525. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  526. struct rf_channel *rf, const int txpower)
  527. {
  528. /*
  529. * Set TXpower.
  530. */
  531. rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  532. /*
  533. * For RT2525E we should first set the channel to half band higher.
  534. */
  535. if (rt2x00_rf(rt2x00dev, RF2525E)) {
  536. static const u32 vals[] = {
  537. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  538. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  539. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  540. 0x00000902, 0x00000906
  541. };
  542. rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
  543. if (rf->rf4)
  544. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  545. }
  546. rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
  547. rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
  548. rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
  549. if (rf->rf4)
  550. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  551. }
  552. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  553. const int txpower)
  554. {
  555. u32 rf3;
  556. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  557. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  558. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  559. }
  560. static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
  561. struct rt2x00lib_conf *libconf)
  562. {
  563. enum dev_state state =
  564. (libconf->conf->flags & IEEE80211_CONF_PS) ?
  565. STATE_SLEEP : STATE_AWAKE;
  566. u16 reg;
  567. if (state == STATE_SLEEP) {
  568. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  569. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
  570. rt2x00dev->beacon_int - 20);
  571. rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
  572. libconf->conf->listen_interval - 1);
  573. /* We must first disable autowake before it can be enabled */
  574. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  575. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  576. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
  577. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  578. } else {
  579. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  580. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  581. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  582. }
  583. rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
  584. }
  585. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  586. struct rt2x00lib_conf *libconf,
  587. const unsigned int flags)
  588. {
  589. if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
  590. rt2500usb_config_channel(rt2x00dev, &libconf->rf,
  591. libconf->conf->power_level);
  592. if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
  593. !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
  594. rt2500usb_config_txpower(rt2x00dev,
  595. libconf->conf->power_level);
  596. if (flags & IEEE80211_CONF_CHANGE_PS)
  597. rt2500usb_config_ps(rt2x00dev, libconf);
  598. }
  599. /*
  600. * Link tuning
  601. */
  602. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
  603. struct link_qual *qual)
  604. {
  605. u16 reg;
  606. /*
  607. * Update FCS error count from register.
  608. */
  609. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  610. qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  611. /*
  612. * Update False CCA count from register.
  613. */
  614. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  615. qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  616. }
  617. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
  618. struct link_qual *qual)
  619. {
  620. u16 eeprom;
  621. u16 value;
  622. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  623. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  624. rt2500usb_bbp_write(rt2x00dev, 24, value);
  625. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  626. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  627. rt2500usb_bbp_write(rt2x00dev, 25, value);
  628. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  629. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  630. rt2500usb_bbp_write(rt2x00dev, 61, value);
  631. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  632. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  633. rt2500usb_bbp_write(rt2x00dev, 17, value);
  634. qual->vgc_level = value;
  635. }
  636. /*
  637. * Initialization functions.
  638. */
  639. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  640. {
  641. u16 reg;
  642. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  643. USB_MODE_TEST, REGISTER_TIMEOUT);
  644. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  645. 0x00f0, REGISTER_TIMEOUT);
  646. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  647. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  648. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  649. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  650. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  651. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  652. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  653. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  654. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  655. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  656. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  657. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  658. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  659. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  660. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  661. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  662. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  663. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  664. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  665. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  666. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  667. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  668. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  669. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  670. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  671. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  672. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  673. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  674. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  675. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  676. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  677. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  678. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  679. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  680. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  681. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  682. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  683. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  684. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  685. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  686. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  687. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
  688. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  689. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  690. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  691. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  692. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  693. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  694. return -EBUSY;
  695. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  696. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  697. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  698. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  699. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  700. if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
  701. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  702. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
  703. } else {
  704. reg = 0;
  705. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
  706. rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
  707. }
  708. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  709. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  710. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  711. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  712. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  713. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  714. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  715. rt2x00dev->rx->data_size);
  716. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  717. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  718. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
  719. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  720. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
  721. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  722. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  723. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  724. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  725. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  726. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  727. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  728. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  729. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  730. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  731. return 0;
  732. }
  733. static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
  734. {
  735. unsigned int i;
  736. u8 value;
  737. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  738. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  739. if ((value != 0xff) && (value != 0x00))
  740. return 0;
  741. udelay(REGISTER_BUSY_DELAY);
  742. }
  743. ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
  744. return -EACCES;
  745. }
  746. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  747. {
  748. unsigned int i;
  749. u16 eeprom;
  750. u8 value;
  751. u8 reg_id;
  752. if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
  753. return -EACCES;
  754. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  755. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  756. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  757. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  758. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  759. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  760. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  761. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  762. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  763. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  764. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  765. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  766. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  767. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  768. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  769. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  770. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  771. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  772. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  773. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  774. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  775. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  776. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  777. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  778. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  779. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  780. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  781. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  782. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  783. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  784. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  785. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  786. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  787. if (eeprom != 0xffff && eeprom != 0x0000) {
  788. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  789. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  790. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  791. }
  792. }
  793. return 0;
  794. }
  795. /*
  796. * Device state switch handlers.
  797. */
  798. static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
  799. enum dev_state state)
  800. {
  801. u16 reg;
  802. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  803. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
  804. (state == STATE_RADIO_RX_OFF));
  805. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  806. }
  807. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  808. {
  809. /*
  810. * Initialize all registers.
  811. */
  812. if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
  813. rt2500usb_init_bbp(rt2x00dev)))
  814. return -EIO;
  815. return 0;
  816. }
  817. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  818. {
  819. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  820. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  821. /*
  822. * Disable synchronisation.
  823. */
  824. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  825. rt2x00usb_disable_radio(rt2x00dev);
  826. }
  827. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  828. enum dev_state state)
  829. {
  830. u16 reg;
  831. u16 reg2;
  832. unsigned int i;
  833. char put_to_sleep;
  834. char bbp_state;
  835. char rf_state;
  836. put_to_sleep = (state != STATE_AWAKE);
  837. reg = 0;
  838. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  839. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  840. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  841. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  842. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  843. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  844. /*
  845. * Device is not guaranteed to be in the requested state yet.
  846. * We must wait until the register indicates that the
  847. * device has entered the correct state.
  848. */
  849. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  850. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  851. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  852. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  853. if (bbp_state == state && rf_state == state)
  854. return 0;
  855. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  856. msleep(30);
  857. }
  858. return -EBUSY;
  859. }
  860. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  861. enum dev_state state)
  862. {
  863. int retval = 0;
  864. switch (state) {
  865. case STATE_RADIO_ON:
  866. retval = rt2500usb_enable_radio(rt2x00dev);
  867. break;
  868. case STATE_RADIO_OFF:
  869. rt2500usb_disable_radio(rt2x00dev);
  870. break;
  871. case STATE_RADIO_RX_ON:
  872. case STATE_RADIO_RX_OFF:
  873. rt2500usb_toggle_rx(rt2x00dev, state);
  874. break;
  875. case STATE_RADIO_IRQ_ON:
  876. case STATE_RADIO_IRQ_ON_ISR:
  877. case STATE_RADIO_IRQ_OFF:
  878. case STATE_RADIO_IRQ_OFF_ISR:
  879. /* No support, but no error either */
  880. break;
  881. case STATE_DEEP_SLEEP:
  882. case STATE_SLEEP:
  883. case STATE_STANDBY:
  884. case STATE_AWAKE:
  885. retval = rt2500usb_set_state(rt2x00dev, state);
  886. break;
  887. default:
  888. retval = -ENOTSUPP;
  889. break;
  890. }
  891. if (unlikely(retval))
  892. ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
  893. state, retval);
  894. return retval;
  895. }
  896. /*
  897. * TX descriptor initialization
  898. */
  899. static void rt2500usb_write_tx_desc(struct queue_entry *entry,
  900. struct txentry_desc *txdesc)
  901. {
  902. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  903. __le32 *txd = (__le32 *) entry->skb->data;
  904. u32 word;
  905. /*
  906. * Start writing the descriptor words.
  907. */
  908. rt2x00_desc_read(txd, 0, &word);
  909. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
  910. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  911. test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
  912. rt2x00_set_field32(&word, TXD_W0_ACK,
  913. test_bit(ENTRY_TXD_ACK, &txdesc->flags));
  914. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  915. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
  916. rt2x00_set_field32(&word, TXD_W0_OFDM,
  917. (txdesc->rate_mode == RATE_MODE_OFDM));
  918. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  919. test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
  920. rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
  921. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
  922. rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
  923. rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
  924. rt2x00_desc_write(txd, 0, word);
  925. rt2x00_desc_read(txd, 1, &word);
  926. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
  927. rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
  928. rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
  929. rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
  930. rt2x00_desc_write(txd, 1, word);
  931. rt2x00_desc_read(txd, 2, &word);
  932. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
  933. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
  934. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
  935. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
  936. rt2x00_desc_write(txd, 2, word);
  937. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
  938. _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
  939. _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
  940. }
  941. /*
  942. * Register descriptor details in skb frame descriptor.
  943. */
  944. skbdesc->flags |= SKBDESC_DESC_IN_SKB;
  945. skbdesc->desc = txd;
  946. skbdesc->desc_len = TXD_DESC_SIZE;
  947. }
  948. /*
  949. * TX data initialization
  950. */
  951. static void rt2500usb_beacondone(struct urb *urb);
  952. static void rt2500usb_write_beacon(struct queue_entry *entry,
  953. struct txentry_desc *txdesc)
  954. {
  955. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  956. struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
  957. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  958. int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
  959. int length;
  960. u16 reg, reg0;
  961. /*
  962. * Disable beaconing while we are reloading the beacon data,
  963. * otherwise we might be sending out invalid data.
  964. */
  965. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  966. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  967. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  968. /*
  969. * Add space for the descriptor in front of the skb.
  970. */
  971. skb_push(entry->skb, TXD_DESC_SIZE);
  972. memset(entry->skb->data, 0, TXD_DESC_SIZE);
  973. /*
  974. * Write the TX descriptor for the beacon.
  975. */
  976. rt2500usb_write_tx_desc(entry, txdesc);
  977. /*
  978. * Dump beacon to userspace through debugfs.
  979. */
  980. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
  981. /*
  982. * USB devices cannot blindly pass the skb->len as the
  983. * length of the data to usb_fill_bulk_urb. Pass the skb
  984. * to the driver to determine what the length should be.
  985. */
  986. length = rt2x00dev->ops->lib->get_tx_data_len(entry);
  987. usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
  988. entry->skb->data, length, rt2500usb_beacondone,
  989. entry);
  990. /*
  991. * Second we need to create the guardian byte.
  992. * We only need a single byte, so lets recycle
  993. * the 'flags' field we are not using for beacons.
  994. */
  995. bcn_priv->guardian_data = 0;
  996. usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
  997. &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
  998. entry);
  999. /*
  1000. * Send out the guardian byte.
  1001. */
  1002. usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
  1003. /*
  1004. * Enable beaconing again.
  1005. */
  1006. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  1007. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  1008. reg0 = reg;
  1009. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  1010. /*
  1011. * Beacon generation will fail initially.
  1012. * To prevent this we need to change the TXRX_CSR19
  1013. * register several times (reg0 is the same as reg
  1014. * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
  1015. * and 1 in reg).
  1016. */
  1017. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1018. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1019. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1020. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1021. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1022. }
  1023. static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
  1024. {
  1025. int length;
  1026. /*
  1027. * The length _must_ be a multiple of 2,
  1028. * but it must _not_ be a multiple of the USB packet size.
  1029. */
  1030. length = roundup(entry->skb->len, 2);
  1031. length += (2 * !(length % entry->queue->usb_maxpacket));
  1032. return length;
  1033. }
  1034. static void rt2500usb_kill_tx_queue(struct data_queue *queue)
  1035. {
  1036. if (queue->qid == QID_BEACON)
  1037. rt2500usb_register_write(queue->rt2x00dev, TXRX_CSR19, 0);
  1038. rt2x00usb_kill_tx_queue(queue);
  1039. }
  1040. /*
  1041. * RX control handlers
  1042. */
  1043. static void rt2500usb_fill_rxdone(struct queue_entry *entry,
  1044. struct rxdone_entry_desc *rxdesc)
  1045. {
  1046. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  1047. struct queue_entry_priv_usb *entry_priv = entry->priv_data;
  1048. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  1049. __le32 *rxd =
  1050. (__le32 *)(entry->skb->data +
  1051. (entry_priv->urb->actual_length -
  1052. entry->queue->desc_size));
  1053. u32 word0;
  1054. u32 word1;
  1055. /*
  1056. * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
  1057. * frame data in rt2x00usb.
  1058. */
  1059. memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
  1060. rxd = (__le32 *)skbdesc->desc;
  1061. /*
  1062. * It is now safe to read the descriptor on all architectures.
  1063. */
  1064. rt2x00_desc_read(rxd, 0, &word0);
  1065. rt2x00_desc_read(rxd, 1, &word1);
  1066. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  1067. rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
  1068. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  1069. rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  1070. rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
  1071. if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
  1072. rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
  1073. if (rxdesc->cipher != CIPHER_NONE) {
  1074. _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
  1075. _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
  1076. rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
  1077. /* ICV is located at the end of frame */
  1078. rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
  1079. if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
  1080. rxdesc->flags |= RX_FLAG_DECRYPTED;
  1081. else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
  1082. rxdesc->flags |= RX_FLAG_MMIC_ERROR;
  1083. }
  1084. /*
  1085. * Obtain the status about this packet.
  1086. * When frame was received with an OFDM bitrate,
  1087. * the signal is the PLCP value. If it was received with
  1088. * a CCK bitrate the signal is the rate in 100kbit/s.
  1089. */
  1090. rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  1091. rxdesc->rssi =
  1092. rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
  1093. rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  1094. if (rt2x00_get_field32(word0, RXD_W0_OFDM))
  1095. rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
  1096. else
  1097. rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
  1098. if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
  1099. rxdesc->dev_flags |= RXDONE_MY_BSS;
  1100. /*
  1101. * Adjust the skb memory window to the frame boundaries.
  1102. */
  1103. skb_trim(entry->skb, rxdesc->size);
  1104. }
  1105. /*
  1106. * Interrupt functions.
  1107. */
  1108. static void rt2500usb_beacondone(struct urb *urb)
  1109. {
  1110. struct queue_entry *entry = (struct queue_entry *)urb->context;
  1111. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  1112. if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
  1113. return;
  1114. /*
  1115. * Check if this was the guardian beacon,
  1116. * if that was the case we need to send the real beacon now.
  1117. * Otherwise we should free the sk_buffer, the device
  1118. * should be doing the rest of the work now.
  1119. */
  1120. if (bcn_priv->guardian_urb == urb) {
  1121. usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
  1122. } else if (bcn_priv->urb == urb) {
  1123. dev_kfree_skb(entry->skb);
  1124. entry->skb = NULL;
  1125. }
  1126. }
  1127. /*
  1128. * Device probe functions.
  1129. */
  1130. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  1131. {
  1132. u16 word;
  1133. u8 *mac;
  1134. u8 bbp;
  1135. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1136. /*
  1137. * Start validation of the data that has been read.
  1138. */
  1139. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1140. if (!is_valid_ether_addr(mac)) {
  1141. random_ether_addr(mac);
  1142. EEPROM(rt2x00dev, "MAC: %pM\n", mac);
  1143. }
  1144. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1145. if (word == 0xffff) {
  1146. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1147. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
  1148. ANTENNA_SW_DIVERSITY);
  1149. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
  1150. ANTENNA_SW_DIVERSITY);
  1151. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
  1152. LED_MODE_DEFAULT);
  1153. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1154. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1155. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1156. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1157. EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
  1158. }
  1159. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1160. if (word == 0xffff) {
  1161. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1162. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1163. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1164. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1165. EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
  1166. }
  1167. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1168. if (word == 0xffff) {
  1169. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1170. DEFAULT_RSSI_OFFSET);
  1171. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1172. EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
  1173. }
  1174. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1175. if (word == 0xffff) {
  1176. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1177. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1178. EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1179. }
  1180. /*
  1181. * Switch lower vgc bound to current BBP R17 value,
  1182. * lower the value a bit for better quality.
  1183. */
  1184. rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
  1185. bbp -= 6;
  1186. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1187. if (word == 0xffff) {
  1188. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1189. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1190. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1191. EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1192. } else {
  1193. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1194. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1195. }
  1196. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1197. if (word == 0xffff) {
  1198. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1199. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1200. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1201. EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1202. }
  1203. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1204. if (word == 0xffff) {
  1205. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1206. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1207. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1208. EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1209. }
  1210. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1211. if (word == 0xffff) {
  1212. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1213. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1214. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1215. EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1216. }
  1217. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1218. if (word == 0xffff) {
  1219. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1220. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1221. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1222. EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1223. }
  1224. return 0;
  1225. }
  1226. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1227. {
  1228. u16 reg;
  1229. u16 value;
  1230. u16 eeprom;
  1231. /*
  1232. * Read EEPROM word for configuration.
  1233. */
  1234. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1235. /*
  1236. * Identify RF chipset.
  1237. */
  1238. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1239. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1240. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1241. if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
  1242. ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
  1243. return -ENODEV;
  1244. }
  1245. if (!rt2x00_rf(rt2x00dev, RF2522) &&
  1246. !rt2x00_rf(rt2x00dev, RF2523) &&
  1247. !rt2x00_rf(rt2x00dev, RF2524) &&
  1248. !rt2x00_rf(rt2x00dev, RF2525) &&
  1249. !rt2x00_rf(rt2x00dev, RF2525E) &&
  1250. !rt2x00_rf(rt2x00dev, RF5222)) {
  1251. ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
  1252. return -ENODEV;
  1253. }
  1254. /*
  1255. * Identify default antenna configuration.
  1256. */
  1257. rt2x00dev->default_ant.tx =
  1258. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1259. rt2x00dev->default_ant.rx =
  1260. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1261. /*
  1262. * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
  1263. * I am not 100% sure about this, but the legacy drivers do not
  1264. * indicate antenna swapping in software is required when
  1265. * diversity is enabled.
  1266. */
  1267. if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
  1268. rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
  1269. if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
  1270. rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
  1271. /*
  1272. * Store led mode, for correct led behaviour.
  1273. */
  1274. #ifdef CONFIG_RT2X00_LIB_LEDS
  1275. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1276. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
  1277. if (value == LED_MODE_TXRX_ACTIVITY ||
  1278. value == LED_MODE_DEFAULT ||
  1279. value == LED_MODE_ASUS)
  1280. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
  1281. LED_TYPE_ACTIVITY);
  1282. #endif /* CONFIG_RT2X00_LIB_LEDS */
  1283. /*
  1284. * Detect if this device has an hardware controlled radio.
  1285. */
  1286. if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
  1287. __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
  1288. /*
  1289. * Read the RSSI <-> dBm offset information.
  1290. */
  1291. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1292. rt2x00dev->rssi_offset =
  1293. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1294. return 0;
  1295. }
  1296. /*
  1297. * RF value list for RF2522
  1298. * Supports: 2.4 GHz
  1299. */
  1300. static const struct rf_channel rf_vals_bg_2522[] = {
  1301. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1302. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1303. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1304. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1305. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1306. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1307. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1308. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1309. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1310. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1311. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1312. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1313. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1314. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1315. };
  1316. /*
  1317. * RF value list for RF2523
  1318. * Supports: 2.4 GHz
  1319. */
  1320. static const struct rf_channel rf_vals_bg_2523[] = {
  1321. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1322. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1323. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1324. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1325. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1326. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1327. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1328. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1329. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1330. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1331. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1332. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1333. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1334. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1335. };
  1336. /*
  1337. * RF value list for RF2524
  1338. * Supports: 2.4 GHz
  1339. */
  1340. static const struct rf_channel rf_vals_bg_2524[] = {
  1341. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1342. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1343. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1344. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1345. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1346. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1347. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1348. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1349. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1350. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1351. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1352. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1353. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1354. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1355. };
  1356. /*
  1357. * RF value list for RF2525
  1358. * Supports: 2.4 GHz
  1359. */
  1360. static const struct rf_channel rf_vals_bg_2525[] = {
  1361. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1362. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1363. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1364. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1365. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1366. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1367. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1368. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1369. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1370. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1371. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1372. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1373. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1374. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1375. };
  1376. /*
  1377. * RF value list for RF2525e
  1378. * Supports: 2.4 GHz
  1379. */
  1380. static const struct rf_channel rf_vals_bg_2525e[] = {
  1381. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1382. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1383. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1384. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1385. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1386. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1387. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1388. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1389. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1390. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1391. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1392. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1393. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1394. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1395. };
  1396. /*
  1397. * RF value list for RF5222
  1398. * Supports: 2.4 GHz & 5.2 GHz
  1399. */
  1400. static const struct rf_channel rf_vals_5222[] = {
  1401. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1402. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1403. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1404. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1405. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1406. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1407. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1408. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1409. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1410. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1411. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1412. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1413. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1414. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1415. /* 802.11 UNI / HyperLan 2 */
  1416. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1417. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1418. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1419. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1420. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1421. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1422. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1423. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1424. /* 802.11 HyperLan 2 */
  1425. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1426. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1427. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1428. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1429. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1430. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1431. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1432. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1433. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1434. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1435. /* 802.11 UNII */
  1436. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1437. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1438. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1439. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1440. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1441. };
  1442. static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1443. {
  1444. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1445. struct channel_info *info;
  1446. char *tx_power;
  1447. unsigned int i;
  1448. /*
  1449. * Initialize all hw fields.
  1450. *
  1451. * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
  1452. * capable of sending the buffered frames out after the DTIM
  1453. * transmission using rt2x00lib_beacondone. This will send out
  1454. * multicast and broadcast traffic immediately instead of buffering it
  1455. * infinitly and thus dropping it after some time.
  1456. */
  1457. rt2x00dev->hw->flags =
  1458. IEEE80211_HW_RX_INCLUDES_FCS |
  1459. IEEE80211_HW_SIGNAL_DBM |
  1460. IEEE80211_HW_SUPPORTS_PS |
  1461. IEEE80211_HW_PS_NULLFUNC_STACK;
  1462. SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
  1463. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1464. rt2x00_eeprom_addr(rt2x00dev,
  1465. EEPROM_MAC_ADDR_0));
  1466. /*
  1467. * Initialize hw_mode information.
  1468. */
  1469. spec->supported_bands = SUPPORT_BAND_2GHZ;
  1470. spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
  1471. if (rt2x00_rf(rt2x00dev, RF2522)) {
  1472. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1473. spec->channels = rf_vals_bg_2522;
  1474. } else if (rt2x00_rf(rt2x00dev, RF2523)) {
  1475. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1476. spec->channels = rf_vals_bg_2523;
  1477. } else if (rt2x00_rf(rt2x00dev, RF2524)) {
  1478. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1479. spec->channels = rf_vals_bg_2524;
  1480. } else if (rt2x00_rf(rt2x00dev, RF2525)) {
  1481. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1482. spec->channels = rf_vals_bg_2525;
  1483. } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
  1484. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1485. spec->channels = rf_vals_bg_2525e;
  1486. } else if (rt2x00_rf(rt2x00dev, RF5222)) {
  1487. spec->supported_bands |= SUPPORT_BAND_5GHZ;
  1488. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1489. spec->channels = rf_vals_5222;
  1490. }
  1491. /*
  1492. * Create channel information array
  1493. */
  1494. info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
  1495. if (!info)
  1496. return -ENOMEM;
  1497. spec->channels_info = info;
  1498. tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1499. for (i = 0; i < 14; i++) {
  1500. info[i].max_power = MAX_TXPOWER;
  1501. info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
  1502. }
  1503. if (spec->num_channels > 14) {
  1504. for (i = 14; i < spec->num_channels; i++) {
  1505. info[i].max_power = MAX_TXPOWER;
  1506. info[i].default_power1 = DEFAULT_TXPOWER;
  1507. }
  1508. }
  1509. return 0;
  1510. }
  1511. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1512. {
  1513. int retval;
  1514. /*
  1515. * Allocate eeprom data.
  1516. */
  1517. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1518. if (retval)
  1519. return retval;
  1520. retval = rt2500usb_init_eeprom(rt2x00dev);
  1521. if (retval)
  1522. return retval;
  1523. /*
  1524. * Initialize hw specifications.
  1525. */
  1526. retval = rt2500usb_probe_hw_mode(rt2x00dev);
  1527. if (retval)
  1528. return retval;
  1529. /*
  1530. * This device requires the atim queue
  1531. */
  1532. __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  1533. __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
  1534. if (!modparam_nohwcrypt) {
  1535. __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
  1536. __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
  1537. }
  1538. __set_bit(DRIVER_SUPPORT_WATCHDOG, &rt2x00dev->flags);
  1539. /*
  1540. * Set the rssi offset.
  1541. */
  1542. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1543. return 0;
  1544. }
  1545. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1546. .tx = rt2x00mac_tx,
  1547. .start = rt2x00mac_start,
  1548. .stop = rt2x00mac_stop,
  1549. .add_interface = rt2x00mac_add_interface,
  1550. .remove_interface = rt2x00mac_remove_interface,
  1551. .config = rt2x00mac_config,
  1552. .configure_filter = rt2x00mac_configure_filter,
  1553. .set_tim = rt2x00mac_set_tim,
  1554. .set_key = rt2x00mac_set_key,
  1555. .sw_scan_start = rt2x00mac_sw_scan_start,
  1556. .sw_scan_complete = rt2x00mac_sw_scan_complete,
  1557. .get_stats = rt2x00mac_get_stats,
  1558. .bss_info_changed = rt2x00mac_bss_info_changed,
  1559. .conf_tx = rt2x00mac_conf_tx,
  1560. .rfkill_poll = rt2x00mac_rfkill_poll,
  1561. .flush = rt2x00mac_flush,
  1562. };
  1563. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1564. .probe_hw = rt2500usb_probe_hw,
  1565. .initialize = rt2x00usb_initialize,
  1566. .uninitialize = rt2x00usb_uninitialize,
  1567. .clear_entry = rt2x00usb_clear_entry,
  1568. .set_device_state = rt2500usb_set_device_state,
  1569. .rfkill_poll = rt2500usb_rfkill_poll,
  1570. .link_stats = rt2500usb_link_stats,
  1571. .reset_tuner = rt2500usb_reset_tuner,
  1572. .watchdog = rt2x00usb_watchdog,
  1573. .write_tx_desc = rt2500usb_write_tx_desc,
  1574. .write_beacon = rt2500usb_write_beacon,
  1575. .get_tx_data_len = rt2500usb_get_tx_data_len,
  1576. .kick_tx_queue = rt2x00usb_kick_tx_queue,
  1577. .kill_tx_queue = rt2500usb_kill_tx_queue,
  1578. .fill_rxdone = rt2500usb_fill_rxdone,
  1579. .config_shared_key = rt2500usb_config_key,
  1580. .config_pairwise_key = rt2500usb_config_key,
  1581. .config_filter = rt2500usb_config_filter,
  1582. .config_intf = rt2500usb_config_intf,
  1583. .config_erp = rt2500usb_config_erp,
  1584. .config_ant = rt2500usb_config_ant,
  1585. .config = rt2500usb_config,
  1586. };
  1587. static const struct data_queue_desc rt2500usb_queue_rx = {
  1588. .entry_num = 32,
  1589. .data_size = DATA_FRAME_SIZE,
  1590. .desc_size = RXD_DESC_SIZE,
  1591. .priv_size = sizeof(struct queue_entry_priv_usb),
  1592. };
  1593. static const struct data_queue_desc rt2500usb_queue_tx = {
  1594. .entry_num = 32,
  1595. .data_size = DATA_FRAME_SIZE,
  1596. .desc_size = TXD_DESC_SIZE,
  1597. .priv_size = sizeof(struct queue_entry_priv_usb),
  1598. };
  1599. static const struct data_queue_desc rt2500usb_queue_bcn = {
  1600. .entry_num = 1,
  1601. .data_size = MGMT_FRAME_SIZE,
  1602. .desc_size = TXD_DESC_SIZE,
  1603. .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
  1604. };
  1605. static const struct data_queue_desc rt2500usb_queue_atim = {
  1606. .entry_num = 8,
  1607. .data_size = DATA_FRAME_SIZE,
  1608. .desc_size = TXD_DESC_SIZE,
  1609. .priv_size = sizeof(struct queue_entry_priv_usb),
  1610. };
  1611. static const struct rt2x00_ops rt2500usb_ops = {
  1612. .name = KBUILD_MODNAME,
  1613. .max_sta_intf = 1,
  1614. .max_ap_intf = 1,
  1615. .eeprom_size = EEPROM_SIZE,
  1616. .rf_size = RF_SIZE,
  1617. .tx_queues = NUM_TX_QUEUES,
  1618. .extra_tx_headroom = TXD_DESC_SIZE,
  1619. .rx = &rt2500usb_queue_rx,
  1620. .tx = &rt2500usb_queue_tx,
  1621. .bcn = &rt2500usb_queue_bcn,
  1622. .atim = &rt2500usb_queue_atim,
  1623. .lib = &rt2500usb_rt2x00_ops,
  1624. .hw = &rt2500usb_mac80211_ops,
  1625. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1626. .debugfs = &rt2500usb_rt2x00debug,
  1627. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1628. };
  1629. /*
  1630. * rt2500usb module information.
  1631. */
  1632. static struct usb_device_id rt2500usb_device_table[] = {
  1633. /* ASUS */
  1634. { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1635. { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
  1636. /* Belkin */
  1637. { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
  1638. { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
  1639. { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1640. /* Cisco Systems */
  1641. { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
  1642. { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
  1643. { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1644. /* CNet */
  1645. { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
  1646. /* Conceptronic */
  1647. { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
  1648. /* D-LINK */
  1649. { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
  1650. /* Gigabyte */
  1651. { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
  1652. { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
  1653. /* Hercules */
  1654. { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
  1655. /* Melco */
  1656. { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
  1657. { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
  1658. { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
  1659. { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
  1660. { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
  1661. /* MSI */
  1662. { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
  1663. { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
  1664. { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
  1665. /* Ralink */
  1666. { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1667. { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
  1668. { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
  1669. { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1670. /* Sagem */
  1671. { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
  1672. /* Siemens */
  1673. { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
  1674. /* SMC */
  1675. { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
  1676. /* Spairon */
  1677. { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
  1678. /* SURECOM */
  1679. { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
  1680. /* Trust */
  1681. { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1682. /* VTech */
  1683. { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
  1684. /* Zinwell */
  1685. { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
  1686. { 0, }
  1687. };
  1688. MODULE_AUTHOR(DRV_PROJECT);
  1689. MODULE_VERSION(DRV_VERSION);
  1690. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1691. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1692. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1693. MODULE_LICENSE("GPL");
  1694. static struct usb_driver rt2500usb_driver = {
  1695. .name = KBUILD_MODNAME,
  1696. .id_table = rt2500usb_device_table,
  1697. .probe = rt2x00usb_probe,
  1698. .disconnect = rt2x00usb_disconnect,
  1699. .suspend = rt2x00usb_suspend,
  1700. .resume = rt2x00usb_resume,
  1701. };
  1702. static int __init rt2500usb_init(void)
  1703. {
  1704. return usb_register(&rt2500usb_driver);
  1705. }
  1706. static void __exit rt2500usb_exit(void)
  1707. {
  1708. usb_deregister(&rt2500usb_driver);
  1709. }
  1710. module_init(rt2500usb_init);
  1711. module_exit(rt2500usb_exit);