mwl8k.c 108 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Module parameters */
  30. static unsigned ap_mode_default;
  31. module_param(ap_mode_default, bool, 0);
  32. MODULE_PARM_DESC(ap_mode_default,
  33. "Set to 1 to make ap mode the default instead of sta mode");
  34. /* Register definitions */
  35. #define MWL8K_HIU_GEN_PTR 0x00000c10
  36. #define MWL8K_MODE_STA 0x0000005a
  37. #define MWL8K_MODE_AP 0x000000a5
  38. #define MWL8K_HIU_INT_CODE 0x00000c14
  39. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  40. #define MWL8K_FWAP_READY 0xf1f2f4a5
  41. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  42. #define MWL8K_HIU_SCRATCH 0x00000c40
  43. /* Host->device communications */
  44. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  45. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  46. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  47. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  49. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  50. #define MWL8K_H2A_INT_RESET (1 << 15)
  51. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  52. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  53. /* Device->host communications */
  54. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  55. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  56. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  57. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  59. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  60. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  61. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  62. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  63. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  64. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  65. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  66. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  67. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  68. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  69. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  70. MWL8K_A2H_INT_CHNL_SWITCHED | \
  71. MWL8K_A2H_INT_QUEUE_EMPTY | \
  72. MWL8K_A2H_INT_RADAR_DETECT | \
  73. MWL8K_A2H_INT_RADIO_ON | \
  74. MWL8K_A2H_INT_RADIO_OFF | \
  75. MWL8K_A2H_INT_MAC_EVENT | \
  76. MWL8K_A2H_INT_OPC_DONE | \
  77. MWL8K_A2H_INT_RX_READY | \
  78. MWL8K_A2H_INT_TX_DONE)
  79. #define MWL8K_RX_QUEUES 1
  80. #define MWL8K_TX_QUEUES 4
  81. struct rxd_ops {
  82. int rxd_size;
  83. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  84. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  85. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  86. __le16 *qos, s8 *noise);
  87. };
  88. struct mwl8k_device_info {
  89. char *part_name;
  90. char *helper_image;
  91. char *fw_image_sta;
  92. char *fw_image_ap;
  93. struct rxd_ops *ap_rxd_ops;
  94. u32 fw_api_ap;
  95. };
  96. struct mwl8k_rx_queue {
  97. int rxd_count;
  98. /* hw receives here */
  99. int head;
  100. /* refill descs here */
  101. int tail;
  102. void *rxd;
  103. dma_addr_t rxd_dma;
  104. struct {
  105. struct sk_buff *skb;
  106. DEFINE_DMA_UNMAP_ADDR(dma);
  107. } *buf;
  108. };
  109. struct mwl8k_tx_queue {
  110. /* hw transmits here */
  111. int head;
  112. /* sw appends here */
  113. int tail;
  114. unsigned int len;
  115. struct mwl8k_tx_desc *txd;
  116. dma_addr_t txd_dma;
  117. struct sk_buff **skb;
  118. };
  119. struct mwl8k_priv {
  120. struct ieee80211_hw *hw;
  121. struct pci_dev *pdev;
  122. struct mwl8k_device_info *device_info;
  123. void __iomem *sram;
  124. void __iomem *regs;
  125. /* firmware */
  126. const struct firmware *fw_helper;
  127. const struct firmware *fw_ucode;
  128. /* hardware/firmware parameters */
  129. bool ap_fw;
  130. struct rxd_ops *rxd_ops;
  131. struct ieee80211_supported_band band_24;
  132. struct ieee80211_channel channels_24[14];
  133. struct ieee80211_rate rates_24[14];
  134. struct ieee80211_supported_band band_50;
  135. struct ieee80211_channel channels_50[4];
  136. struct ieee80211_rate rates_50[9];
  137. u32 ap_macids_supported;
  138. u32 sta_macids_supported;
  139. /* firmware access */
  140. struct mutex fw_mutex;
  141. struct task_struct *fw_mutex_owner;
  142. int fw_mutex_depth;
  143. struct completion *hostcmd_wait;
  144. /* lock held over TX and TX reap */
  145. spinlock_t tx_lock;
  146. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  147. struct completion *tx_wait;
  148. /* List of interfaces. */
  149. u32 macids_used;
  150. struct list_head vif_list;
  151. /* power management status cookie from firmware */
  152. u32 *cookie;
  153. dma_addr_t cookie_dma;
  154. u16 num_mcaddrs;
  155. u8 hw_rev;
  156. u32 fw_rev;
  157. /*
  158. * Running count of TX packets in flight, to avoid
  159. * iterating over the transmit rings each time.
  160. */
  161. int pending_tx_pkts;
  162. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  163. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  164. bool radio_on;
  165. bool radio_short_preamble;
  166. bool sniffer_enabled;
  167. bool wmm_enabled;
  168. /* XXX need to convert this to handle multiple interfaces */
  169. bool capture_beacon;
  170. u8 capture_bssid[ETH_ALEN];
  171. struct sk_buff *beacon_skb;
  172. /*
  173. * This FJ worker has to be global as it is scheduled from the
  174. * RX handler. At this point we don't know which interface it
  175. * belongs to until the list of bssids waiting to complete join
  176. * is checked.
  177. */
  178. struct work_struct finalize_join_worker;
  179. /* Tasklet to perform TX reclaim. */
  180. struct tasklet_struct poll_tx_task;
  181. /* Tasklet to perform RX. */
  182. struct tasklet_struct poll_rx_task;
  183. /* Most recently reported noise in dBm */
  184. s8 noise;
  185. /*
  186. * preserve the queue configurations so they can be restored if/when
  187. * the firmware image is swapped.
  188. */
  189. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
  190. /* async firmware loading state */
  191. unsigned fw_state;
  192. char *fw_pref;
  193. char *fw_alt;
  194. struct completion firmware_loading_complete;
  195. };
  196. /* Per interface specific private data */
  197. struct mwl8k_vif {
  198. struct list_head list;
  199. struct ieee80211_vif *vif;
  200. /* Firmware macid for this vif. */
  201. int macid;
  202. /* Non AMPDU sequence number assigned by driver. */
  203. u16 seqno;
  204. };
  205. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  206. struct mwl8k_sta {
  207. /* Index into station database. Returned by UPDATE_STADB. */
  208. u8 peer_id;
  209. };
  210. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  211. static const struct ieee80211_channel mwl8k_channels_24[] = {
  212. { .center_freq = 2412, .hw_value = 1, },
  213. { .center_freq = 2417, .hw_value = 2, },
  214. { .center_freq = 2422, .hw_value = 3, },
  215. { .center_freq = 2427, .hw_value = 4, },
  216. { .center_freq = 2432, .hw_value = 5, },
  217. { .center_freq = 2437, .hw_value = 6, },
  218. { .center_freq = 2442, .hw_value = 7, },
  219. { .center_freq = 2447, .hw_value = 8, },
  220. { .center_freq = 2452, .hw_value = 9, },
  221. { .center_freq = 2457, .hw_value = 10, },
  222. { .center_freq = 2462, .hw_value = 11, },
  223. { .center_freq = 2467, .hw_value = 12, },
  224. { .center_freq = 2472, .hw_value = 13, },
  225. { .center_freq = 2484, .hw_value = 14, },
  226. };
  227. static const struct ieee80211_rate mwl8k_rates_24[] = {
  228. { .bitrate = 10, .hw_value = 2, },
  229. { .bitrate = 20, .hw_value = 4, },
  230. { .bitrate = 55, .hw_value = 11, },
  231. { .bitrate = 110, .hw_value = 22, },
  232. { .bitrate = 220, .hw_value = 44, },
  233. { .bitrate = 60, .hw_value = 12, },
  234. { .bitrate = 90, .hw_value = 18, },
  235. { .bitrate = 120, .hw_value = 24, },
  236. { .bitrate = 180, .hw_value = 36, },
  237. { .bitrate = 240, .hw_value = 48, },
  238. { .bitrate = 360, .hw_value = 72, },
  239. { .bitrate = 480, .hw_value = 96, },
  240. { .bitrate = 540, .hw_value = 108, },
  241. { .bitrate = 720, .hw_value = 144, },
  242. };
  243. static const struct ieee80211_channel mwl8k_channels_50[] = {
  244. { .center_freq = 5180, .hw_value = 36, },
  245. { .center_freq = 5200, .hw_value = 40, },
  246. { .center_freq = 5220, .hw_value = 44, },
  247. { .center_freq = 5240, .hw_value = 48, },
  248. };
  249. static const struct ieee80211_rate mwl8k_rates_50[] = {
  250. { .bitrate = 60, .hw_value = 12, },
  251. { .bitrate = 90, .hw_value = 18, },
  252. { .bitrate = 120, .hw_value = 24, },
  253. { .bitrate = 180, .hw_value = 36, },
  254. { .bitrate = 240, .hw_value = 48, },
  255. { .bitrate = 360, .hw_value = 72, },
  256. { .bitrate = 480, .hw_value = 96, },
  257. { .bitrate = 540, .hw_value = 108, },
  258. { .bitrate = 720, .hw_value = 144, },
  259. };
  260. /* Set or get info from Firmware */
  261. #define MWL8K_CMD_GET 0x0000
  262. #define MWL8K_CMD_SET 0x0001
  263. #define MWL8K_CMD_SET_LIST 0x0002
  264. /* Firmware command codes */
  265. #define MWL8K_CMD_CODE_DNLD 0x0001
  266. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  267. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  268. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  269. #define MWL8K_CMD_GET_STAT 0x0014
  270. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  271. #define MWL8K_CMD_RF_TX_POWER 0x001e
  272. #define MWL8K_CMD_TX_POWER 0x001f
  273. #define MWL8K_CMD_RF_ANTENNA 0x0020
  274. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  275. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  276. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  277. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  278. #define MWL8K_CMD_SET_AID 0x010d
  279. #define MWL8K_CMD_SET_RATE 0x0110
  280. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  281. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  282. #define MWL8K_CMD_SET_SLOT 0x0114
  283. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  284. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  285. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  286. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  287. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  288. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  289. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  290. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  291. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  292. #define MWL8K_CMD_UPDATE_STADB 0x1123
  293. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  294. {
  295. u16 command = le16_to_cpu(cmd);
  296. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  297. snprintf(buf, bufsize, "%s", #x);\
  298. return buf;\
  299. } while (0)
  300. switch (command & ~0x8000) {
  301. MWL8K_CMDNAME(CODE_DNLD);
  302. MWL8K_CMDNAME(GET_HW_SPEC);
  303. MWL8K_CMDNAME(SET_HW_SPEC);
  304. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  305. MWL8K_CMDNAME(GET_STAT);
  306. MWL8K_CMDNAME(RADIO_CONTROL);
  307. MWL8K_CMDNAME(RF_TX_POWER);
  308. MWL8K_CMDNAME(TX_POWER);
  309. MWL8K_CMDNAME(RF_ANTENNA);
  310. MWL8K_CMDNAME(SET_BEACON);
  311. MWL8K_CMDNAME(SET_PRE_SCAN);
  312. MWL8K_CMDNAME(SET_POST_SCAN);
  313. MWL8K_CMDNAME(SET_RF_CHANNEL);
  314. MWL8K_CMDNAME(SET_AID);
  315. MWL8K_CMDNAME(SET_RATE);
  316. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  317. MWL8K_CMDNAME(RTS_THRESHOLD);
  318. MWL8K_CMDNAME(SET_SLOT);
  319. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  320. MWL8K_CMDNAME(SET_WMM_MODE);
  321. MWL8K_CMDNAME(MIMO_CONFIG);
  322. MWL8K_CMDNAME(USE_FIXED_RATE);
  323. MWL8K_CMDNAME(ENABLE_SNIFFER);
  324. MWL8K_CMDNAME(SET_MAC_ADDR);
  325. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  326. MWL8K_CMDNAME(BSS_START);
  327. MWL8K_CMDNAME(SET_NEW_STN);
  328. MWL8K_CMDNAME(UPDATE_STADB);
  329. default:
  330. snprintf(buf, bufsize, "0x%x", cmd);
  331. }
  332. #undef MWL8K_CMDNAME
  333. return buf;
  334. }
  335. /* Hardware and firmware reset */
  336. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  337. {
  338. iowrite32(MWL8K_H2A_INT_RESET,
  339. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  340. iowrite32(MWL8K_H2A_INT_RESET,
  341. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  342. msleep(20);
  343. }
  344. /* Release fw image */
  345. static void mwl8k_release_fw(const struct firmware **fw)
  346. {
  347. if (*fw == NULL)
  348. return;
  349. release_firmware(*fw);
  350. *fw = NULL;
  351. }
  352. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  353. {
  354. mwl8k_release_fw(&priv->fw_ucode);
  355. mwl8k_release_fw(&priv->fw_helper);
  356. }
  357. /* states for asynchronous f/w loading */
  358. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  359. enum {
  360. FW_STATE_INIT = 0,
  361. FW_STATE_LOADING_PREF,
  362. FW_STATE_LOADING_ALT,
  363. FW_STATE_ERROR,
  364. };
  365. /* Request fw image */
  366. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  367. const char *fname, const struct firmware **fw,
  368. bool nowait)
  369. {
  370. /* release current image */
  371. if (*fw != NULL)
  372. mwl8k_release_fw(fw);
  373. if (nowait)
  374. return request_firmware_nowait(THIS_MODULE, 1, fname,
  375. &priv->pdev->dev, GFP_KERNEL,
  376. priv, mwl8k_fw_state_machine);
  377. else
  378. return request_firmware(fw, fname, &priv->pdev->dev);
  379. }
  380. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  381. bool nowait)
  382. {
  383. struct mwl8k_device_info *di = priv->device_info;
  384. int rc;
  385. if (di->helper_image != NULL) {
  386. if (nowait)
  387. rc = mwl8k_request_fw(priv, di->helper_image,
  388. &priv->fw_helper, true);
  389. else
  390. rc = mwl8k_request_fw(priv, di->helper_image,
  391. &priv->fw_helper, false);
  392. if (rc)
  393. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  394. pci_name(priv->pdev), di->helper_image);
  395. if (rc || nowait)
  396. return rc;
  397. }
  398. if (nowait) {
  399. /*
  400. * if we get here, no helper image is needed. Skip the
  401. * FW_STATE_INIT state.
  402. */
  403. priv->fw_state = FW_STATE_LOADING_PREF;
  404. rc = mwl8k_request_fw(priv, fw_image,
  405. &priv->fw_ucode,
  406. true);
  407. } else
  408. rc = mwl8k_request_fw(priv, fw_image,
  409. &priv->fw_ucode, false);
  410. if (rc) {
  411. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  412. pci_name(priv->pdev), fw_image);
  413. mwl8k_release_fw(&priv->fw_helper);
  414. return rc;
  415. }
  416. return 0;
  417. }
  418. struct mwl8k_cmd_pkt {
  419. __le16 code;
  420. __le16 length;
  421. __u8 seq_num;
  422. __u8 macid;
  423. __le16 result;
  424. char payload[0];
  425. } __packed;
  426. /*
  427. * Firmware loading.
  428. */
  429. static int
  430. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  431. {
  432. void __iomem *regs = priv->regs;
  433. dma_addr_t dma_addr;
  434. int loops;
  435. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  436. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  437. return -ENOMEM;
  438. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  439. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  440. iowrite32(MWL8K_H2A_INT_DOORBELL,
  441. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  442. iowrite32(MWL8K_H2A_INT_DUMMY,
  443. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  444. loops = 1000;
  445. do {
  446. u32 int_code;
  447. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  448. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  449. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  450. break;
  451. }
  452. cond_resched();
  453. udelay(1);
  454. } while (--loops);
  455. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  456. return loops ? 0 : -ETIMEDOUT;
  457. }
  458. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  459. const u8 *data, size_t length)
  460. {
  461. struct mwl8k_cmd_pkt *cmd;
  462. int done;
  463. int rc = 0;
  464. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  465. if (cmd == NULL)
  466. return -ENOMEM;
  467. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  468. cmd->seq_num = 0;
  469. cmd->macid = 0;
  470. cmd->result = 0;
  471. done = 0;
  472. while (length) {
  473. int block_size = length > 256 ? 256 : length;
  474. memcpy(cmd->payload, data + done, block_size);
  475. cmd->length = cpu_to_le16(block_size);
  476. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  477. sizeof(*cmd) + block_size);
  478. if (rc)
  479. break;
  480. done += block_size;
  481. length -= block_size;
  482. }
  483. if (!rc) {
  484. cmd->length = 0;
  485. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  486. }
  487. kfree(cmd);
  488. return rc;
  489. }
  490. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  491. const u8 *data, size_t length)
  492. {
  493. unsigned char *buffer;
  494. int may_continue, rc = 0;
  495. u32 done, prev_block_size;
  496. buffer = kmalloc(1024, GFP_KERNEL);
  497. if (buffer == NULL)
  498. return -ENOMEM;
  499. done = 0;
  500. prev_block_size = 0;
  501. may_continue = 1000;
  502. while (may_continue > 0) {
  503. u32 block_size;
  504. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  505. if (block_size & 1) {
  506. block_size &= ~1;
  507. may_continue--;
  508. } else {
  509. done += prev_block_size;
  510. length -= prev_block_size;
  511. }
  512. if (block_size > 1024 || block_size > length) {
  513. rc = -EOVERFLOW;
  514. break;
  515. }
  516. if (length == 0) {
  517. rc = 0;
  518. break;
  519. }
  520. if (block_size == 0) {
  521. rc = -EPROTO;
  522. may_continue--;
  523. udelay(1);
  524. continue;
  525. }
  526. prev_block_size = block_size;
  527. memcpy(buffer, data + done, block_size);
  528. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  529. if (rc)
  530. break;
  531. }
  532. if (!rc && length != 0)
  533. rc = -EREMOTEIO;
  534. kfree(buffer);
  535. return rc;
  536. }
  537. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  538. {
  539. struct mwl8k_priv *priv = hw->priv;
  540. const struct firmware *fw = priv->fw_ucode;
  541. int rc;
  542. int loops;
  543. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  544. const struct firmware *helper = priv->fw_helper;
  545. if (helper == NULL) {
  546. printk(KERN_ERR "%s: helper image needed but none "
  547. "given\n", pci_name(priv->pdev));
  548. return -EINVAL;
  549. }
  550. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  551. if (rc) {
  552. printk(KERN_ERR "%s: unable to load firmware "
  553. "helper image\n", pci_name(priv->pdev));
  554. return rc;
  555. }
  556. msleep(5);
  557. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  558. } else {
  559. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  560. }
  561. if (rc) {
  562. printk(KERN_ERR "%s: unable to load firmware image\n",
  563. pci_name(priv->pdev));
  564. return rc;
  565. }
  566. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  567. loops = 500000;
  568. do {
  569. u32 ready_code;
  570. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  571. if (ready_code == MWL8K_FWAP_READY) {
  572. priv->ap_fw = 1;
  573. break;
  574. } else if (ready_code == MWL8K_FWSTA_READY) {
  575. priv->ap_fw = 0;
  576. break;
  577. }
  578. cond_resched();
  579. udelay(1);
  580. } while (--loops);
  581. return loops ? 0 : -ETIMEDOUT;
  582. }
  583. /* DMA header used by firmware and hardware. */
  584. struct mwl8k_dma_data {
  585. __le16 fwlen;
  586. struct ieee80211_hdr wh;
  587. char data[0];
  588. } __packed;
  589. /* Routines to add/remove DMA header from skb. */
  590. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  591. {
  592. struct mwl8k_dma_data *tr;
  593. int hdrlen;
  594. tr = (struct mwl8k_dma_data *)skb->data;
  595. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  596. if (hdrlen != sizeof(tr->wh)) {
  597. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  598. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  599. *((__le16 *)(tr->data - 2)) = qos;
  600. } else {
  601. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  602. }
  603. }
  604. if (hdrlen != sizeof(*tr))
  605. skb_pull(skb, sizeof(*tr) - hdrlen);
  606. }
  607. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  608. {
  609. struct ieee80211_hdr *wh;
  610. int hdrlen;
  611. struct mwl8k_dma_data *tr;
  612. /*
  613. * Add a firmware DMA header; the firmware requires that we
  614. * present a 2-byte payload length followed by a 4-address
  615. * header (without QoS field), followed (optionally) by any
  616. * WEP/ExtIV header (but only filled in for CCMP).
  617. */
  618. wh = (struct ieee80211_hdr *)skb->data;
  619. hdrlen = ieee80211_hdrlen(wh->frame_control);
  620. if (hdrlen != sizeof(*tr))
  621. skb_push(skb, sizeof(*tr) - hdrlen);
  622. if (ieee80211_is_data_qos(wh->frame_control))
  623. hdrlen -= 2;
  624. tr = (struct mwl8k_dma_data *)skb->data;
  625. if (wh != &tr->wh)
  626. memmove(&tr->wh, wh, hdrlen);
  627. if (hdrlen != sizeof(tr->wh))
  628. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  629. /*
  630. * Firmware length is the length of the fully formed "802.11
  631. * payload". That is, everything except for the 802.11 header.
  632. * This includes all crypto material including the MIC.
  633. */
  634. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  635. }
  636. /*
  637. * Packet reception for 88w8366 AP firmware.
  638. */
  639. struct mwl8k_rxd_8366_ap {
  640. __le16 pkt_len;
  641. __u8 sq2;
  642. __u8 rate;
  643. __le32 pkt_phys_addr;
  644. __le32 next_rxd_phys_addr;
  645. __le16 qos_control;
  646. __le16 htsig2;
  647. __le32 hw_rssi_info;
  648. __le32 hw_noise_floor_info;
  649. __u8 noise_floor;
  650. __u8 pad0[3];
  651. __u8 rssi;
  652. __u8 rx_status;
  653. __u8 channel;
  654. __u8 rx_ctrl;
  655. } __packed;
  656. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  657. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  658. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  659. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  660. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  661. {
  662. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  663. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  664. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  665. }
  666. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  667. {
  668. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  669. rxd->pkt_len = cpu_to_le16(len);
  670. rxd->pkt_phys_addr = cpu_to_le32(addr);
  671. wmb();
  672. rxd->rx_ctrl = 0;
  673. }
  674. static int
  675. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  676. __le16 *qos, s8 *noise)
  677. {
  678. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  679. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  680. return -1;
  681. rmb();
  682. memset(status, 0, sizeof(*status));
  683. status->signal = -rxd->rssi;
  684. *noise = -rxd->noise_floor;
  685. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  686. status->flag |= RX_FLAG_HT;
  687. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  688. status->flag |= RX_FLAG_40MHZ;
  689. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  690. } else {
  691. int i;
  692. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  693. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  694. status->rate_idx = i;
  695. break;
  696. }
  697. }
  698. }
  699. if (rxd->channel > 14) {
  700. status->band = IEEE80211_BAND_5GHZ;
  701. if (!(status->flag & RX_FLAG_HT))
  702. status->rate_idx -= 5;
  703. } else {
  704. status->band = IEEE80211_BAND_2GHZ;
  705. }
  706. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  707. *qos = rxd->qos_control;
  708. return le16_to_cpu(rxd->pkt_len);
  709. }
  710. static struct rxd_ops rxd_8366_ap_ops = {
  711. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  712. .rxd_init = mwl8k_rxd_8366_ap_init,
  713. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  714. .rxd_process = mwl8k_rxd_8366_ap_process,
  715. };
  716. /*
  717. * Packet reception for STA firmware.
  718. */
  719. struct mwl8k_rxd_sta {
  720. __le16 pkt_len;
  721. __u8 link_quality;
  722. __u8 noise_level;
  723. __le32 pkt_phys_addr;
  724. __le32 next_rxd_phys_addr;
  725. __le16 qos_control;
  726. __le16 rate_info;
  727. __le32 pad0[4];
  728. __u8 rssi;
  729. __u8 channel;
  730. __le16 pad1;
  731. __u8 rx_ctrl;
  732. __u8 rx_status;
  733. __u8 pad2[2];
  734. } __packed;
  735. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  736. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  737. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  738. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  739. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  740. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  741. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  742. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  743. {
  744. struct mwl8k_rxd_sta *rxd = _rxd;
  745. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  746. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  747. }
  748. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  749. {
  750. struct mwl8k_rxd_sta *rxd = _rxd;
  751. rxd->pkt_len = cpu_to_le16(len);
  752. rxd->pkt_phys_addr = cpu_to_le32(addr);
  753. wmb();
  754. rxd->rx_ctrl = 0;
  755. }
  756. static int
  757. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  758. __le16 *qos, s8 *noise)
  759. {
  760. struct mwl8k_rxd_sta *rxd = _rxd;
  761. u16 rate_info;
  762. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  763. return -1;
  764. rmb();
  765. rate_info = le16_to_cpu(rxd->rate_info);
  766. memset(status, 0, sizeof(*status));
  767. status->signal = -rxd->rssi;
  768. *noise = -rxd->noise_level;
  769. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  770. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  771. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  772. status->flag |= RX_FLAG_SHORTPRE;
  773. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  774. status->flag |= RX_FLAG_40MHZ;
  775. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  776. status->flag |= RX_FLAG_SHORT_GI;
  777. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  778. status->flag |= RX_FLAG_HT;
  779. if (rxd->channel > 14) {
  780. status->band = IEEE80211_BAND_5GHZ;
  781. if (!(status->flag & RX_FLAG_HT))
  782. status->rate_idx -= 5;
  783. } else {
  784. status->band = IEEE80211_BAND_2GHZ;
  785. }
  786. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  787. *qos = rxd->qos_control;
  788. return le16_to_cpu(rxd->pkt_len);
  789. }
  790. static struct rxd_ops rxd_sta_ops = {
  791. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  792. .rxd_init = mwl8k_rxd_sta_init,
  793. .rxd_refill = mwl8k_rxd_sta_refill,
  794. .rxd_process = mwl8k_rxd_sta_process,
  795. };
  796. #define MWL8K_RX_DESCS 256
  797. #define MWL8K_RX_MAXSZ 3800
  798. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  799. {
  800. struct mwl8k_priv *priv = hw->priv;
  801. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  802. int size;
  803. int i;
  804. rxq->rxd_count = 0;
  805. rxq->head = 0;
  806. rxq->tail = 0;
  807. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  808. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  809. if (rxq->rxd == NULL) {
  810. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  811. return -ENOMEM;
  812. }
  813. memset(rxq->rxd, 0, size);
  814. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  815. if (rxq->buf == NULL) {
  816. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  817. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  818. return -ENOMEM;
  819. }
  820. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  821. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  822. int desc_size;
  823. void *rxd;
  824. int nexti;
  825. dma_addr_t next_dma_addr;
  826. desc_size = priv->rxd_ops->rxd_size;
  827. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  828. nexti = i + 1;
  829. if (nexti == MWL8K_RX_DESCS)
  830. nexti = 0;
  831. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  832. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  833. }
  834. return 0;
  835. }
  836. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  837. {
  838. struct mwl8k_priv *priv = hw->priv;
  839. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  840. int refilled;
  841. refilled = 0;
  842. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  843. struct sk_buff *skb;
  844. dma_addr_t addr;
  845. int rx;
  846. void *rxd;
  847. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  848. if (skb == NULL)
  849. break;
  850. addr = pci_map_single(priv->pdev, skb->data,
  851. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  852. rxq->rxd_count++;
  853. rx = rxq->tail++;
  854. if (rxq->tail == MWL8K_RX_DESCS)
  855. rxq->tail = 0;
  856. rxq->buf[rx].skb = skb;
  857. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  858. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  859. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  860. refilled++;
  861. }
  862. return refilled;
  863. }
  864. /* Must be called only when the card's reception is completely halted */
  865. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  866. {
  867. struct mwl8k_priv *priv = hw->priv;
  868. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  869. int i;
  870. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  871. if (rxq->buf[i].skb != NULL) {
  872. pci_unmap_single(priv->pdev,
  873. dma_unmap_addr(&rxq->buf[i], dma),
  874. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  875. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  876. kfree_skb(rxq->buf[i].skb);
  877. rxq->buf[i].skb = NULL;
  878. }
  879. }
  880. kfree(rxq->buf);
  881. rxq->buf = NULL;
  882. pci_free_consistent(priv->pdev,
  883. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  884. rxq->rxd, rxq->rxd_dma);
  885. rxq->rxd = NULL;
  886. }
  887. /*
  888. * Scan a list of BSSIDs to process for finalize join.
  889. * Allows for extension to process multiple BSSIDs.
  890. */
  891. static inline int
  892. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  893. {
  894. return priv->capture_beacon &&
  895. ieee80211_is_beacon(wh->frame_control) &&
  896. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  897. }
  898. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  899. struct sk_buff *skb)
  900. {
  901. struct mwl8k_priv *priv = hw->priv;
  902. priv->capture_beacon = false;
  903. memset(priv->capture_bssid, 0, ETH_ALEN);
  904. /*
  905. * Use GFP_ATOMIC as rxq_process is called from
  906. * the primary interrupt handler, memory allocation call
  907. * must not sleep.
  908. */
  909. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  910. if (priv->beacon_skb != NULL)
  911. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  912. }
  913. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  914. {
  915. struct mwl8k_priv *priv = hw->priv;
  916. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  917. int processed;
  918. processed = 0;
  919. while (rxq->rxd_count && limit--) {
  920. struct sk_buff *skb;
  921. void *rxd;
  922. int pkt_len;
  923. struct ieee80211_rx_status status;
  924. __le16 qos;
  925. skb = rxq->buf[rxq->head].skb;
  926. if (skb == NULL)
  927. break;
  928. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  929. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  930. &priv->noise);
  931. if (pkt_len < 0)
  932. break;
  933. rxq->buf[rxq->head].skb = NULL;
  934. pci_unmap_single(priv->pdev,
  935. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  936. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  937. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  938. rxq->head++;
  939. if (rxq->head == MWL8K_RX_DESCS)
  940. rxq->head = 0;
  941. rxq->rxd_count--;
  942. skb_put(skb, pkt_len);
  943. mwl8k_remove_dma_header(skb, qos);
  944. /*
  945. * Check for a pending join operation. Save a
  946. * copy of the beacon and schedule a tasklet to
  947. * send a FINALIZE_JOIN command to the firmware.
  948. */
  949. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  950. mwl8k_save_beacon(hw, skb);
  951. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  952. ieee80211_rx_irqsafe(hw, skb);
  953. processed++;
  954. }
  955. return processed;
  956. }
  957. /*
  958. * Packet transmission.
  959. */
  960. #define MWL8K_TXD_STATUS_OK 0x00000001
  961. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  962. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  963. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  964. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  965. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  966. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  967. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  968. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  969. #define MWL8K_QOS_EOSP 0x0010
  970. struct mwl8k_tx_desc {
  971. __le32 status;
  972. __u8 data_rate;
  973. __u8 tx_priority;
  974. __le16 qos_control;
  975. __le32 pkt_phys_addr;
  976. __le16 pkt_len;
  977. __u8 dest_MAC_addr[ETH_ALEN];
  978. __le32 next_txd_phys_addr;
  979. __le32 reserved;
  980. __le16 rate_info;
  981. __u8 peer_id;
  982. __u8 tx_frag_cnt;
  983. } __packed;
  984. #define MWL8K_TX_DESCS 128
  985. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  986. {
  987. struct mwl8k_priv *priv = hw->priv;
  988. struct mwl8k_tx_queue *txq = priv->txq + index;
  989. int size;
  990. int i;
  991. txq->len = 0;
  992. txq->head = 0;
  993. txq->tail = 0;
  994. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  995. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  996. if (txq->txd == NULL) {
  997. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  998. return -ENOMEM;
  999. }
  1000. memset(txq->txd, 0, size);
  1001. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  1002. if (txq->skb == NULL) {
  1003. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  1004. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1005. return -ENOMEM;
  1006. }
  1007. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  1008. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1009. struct mwl8k_tx_desc *tx_desc;
  1010. int nexti;
  1011. tx_desc = txq->txd + i;
  1012. nexti = (i + 1) % MWL8K_TX_DESCS;
  1013. tx_desc->status = 0;
  1014. tx_desc->next_txd_phys_addr =
  1015. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1016. }
  1017. return 0;
  1018. }
  1019. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1020. {
  1021. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1022. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1023. iowrite32(MWL8K_H2A_INT_DUMMY,
  1024. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1025. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1026. }
  1027. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1028. {
  1029. struct mwl8k_priv *priv = hw->priv;
  1030. int i;
  1031. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  1032. struct mwl8k_tx_queue *txq = priv->txq + i;
  1033. int fw_owned = 0;
  1034. int drv_owned = 0;
  1035. int unused = 0;
  1036. int desc;
  1037. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1038. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1039. u32 status;
  1040. status = le32_to_cpu(tx_desc->status);
  1041. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1042. fw_owned++;
  1043. else
  1044. drv_owned++;
  1045. if (tx_desc->pkt_len == 0)
  1046. unused++;
  1047. }
  1048. wiphy_err(hw->wiphy,
  1049. "txq[%d] len=%d head=%d tail=%d "
  1050. "fw_owned=%d drv_owned=%d unused=%d\n",
  1051. i,
  1052. txq->len, txq->head, txq->tail,
  1053. fw_owned, drv_owned, unused);
  1054. }
  1055. }
  1056. /*
  1057. * Must be called with priv->fw_mutex held and tx queues stopped.
  1058. */
  1059. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1060. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1061. {
  1062. struct mwl8k_priv *priv = hw->priv;
  1063. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1064. int retry;
  1065. int rc;
  1066. might_sleep();
  1067. /*
  1068. * The TX queues are stopped at this point, so this test
  1069. * doesn't need to take ->tx_lock.
  1070. */
  1071. if (!priv->pending_tx_pkts)
  1072. return 0;
  1073. retry = 0;
  1074. rc = 0;
  1075. spin_lock_bh(&priv->tx_lock);
  1076. priv->tx_wait = &tx_wait;
  1077. while (!rc) {
  1078. int oldcount;
  1079. unsigned long timeout;
  1080. oldcount = priv->pending_tx_pkts;
  1081. spin_unlock_bh(&priv->tx_lock);
  1082. timeout = wait_for_completion_timeout(&tx_wait,
  1083. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1084. spin_lock_bh(&priv->tx_lock);
  1085. if (timeout) {
  1086. WARN_ON(priv->pending_tx_pkts);
  1087. if (retry) {
  1088. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1089. }
  1090. break;
  1091. }
  1092. if (priv->pending_tx_pkts < oldcount) {
  1093. wiphy_notice(hw->wiphy,
  1094. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1095. oldcount, priv->pending_tx_pkts);
  1096. retry = 1;
  1097. continue;
  1098. }
  1099. priv->tx_wait = NULL;
  1100. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1101. MWL8K_TX_WAIT_TIMEOUT_MS);
  1102. mwl8k_dump_tx_rings(hw);
  1103. rc = -ETIMEDOUT;
  1104. }
  1105. spin_unlock_bh(&priv->tx_lock);
  1106. return rc;
  1107. }
  1108. #define MWL8K_TXD_SUCCESS(status) \
  1109. ((status) & (MWL8K_TXD_STATUS_OK | \
  1110. MWL8K_TXD_STATUS_OK_RETRY | \
  1111. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1112. static int
  1113. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1114. {
  1115. struct mwl8k_priv *priv = hw->priv;
  1116. struct mwl8k_tx_queue *txq = priv->txq + index;
  1117. int processed;
  1118. processed = 0;
  1119. while (txq->len > 0 && limit--) {
  1120. int tx;
  1121. struct mwl8k_tx_desc *tx_desc;
  1122. unsigned long addr;
  1123. int size;
  1124. struct sk_buff *skb;
  1125. struct ieee80211_tx_info *info;
  1126. u32 status;
  1127. tx = txq->head;
  1128. tx_desc = txq->txd + tx;
  1129. status = le32_to_cpu(tx_desc->status);
  1130. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1131. if (!force)
  1132. break;
  1133. tx_desc->status &=
  1134. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1135. }
  1136. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1137. BUG_ON(txq->len == 0);
  1138. txq->len--;
  1139. priv->pending_tx_pkts--;
  1140. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1141. size = le16_to_cpu(tx_desc->pkt_len);
  1142. skb = txq->skb[tx];
  1143. txq->skb[tx] = NULL;
  1144. BUG_ON(skb == NULL);
  1145. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1146. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1147. /* Mark descriptor as unused */
  1148. tx_desc->pkt_phys_addr = 0;
  1149. tx_desc->pkt_len = 0;
  1150. info = IEEE80211_SKB_CB(skb);
  1151. ieee80211_tx_info_clear_status(info);
  1152. if (MWL8K_TXD_SUCCESS(status))
  1153. info->flags |= IEEE80211_TX_STAT_ACK;
  1154. ieee80211_tx_status_irqsafe(hw, skb);
  1155. processed++;
  1156. }
  1157. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1158. ieee80211_wake_queue(hw, index);
  1159. return processed;
  1160. }
  1161. /* must be called only when the card's transmit is completely halted */
  1162. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1163. {
  1164. struct mwl8k_priv *priv = hw->priv;
  1165. struct mwl8k_tx_queue *txq = priv->txq + index;
  1166. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1167. kfree(txq->skb);
  1168. txq->skb = NULL;
  1169. pci_free_consistent(priv->pdev,
  1170. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1171. txq->txd, txq->txd_dma);
  1172. txq->txd = NULL;
  1173. }
  1174. static int
  1175. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1176. {
  1177. struct mwl8k_priv *priv = hw->priv;
  1178. struct ieee80211_tx_info *tx_info;
  1179. struct mwl8k_vif *mwl8k_vif;
  1180. struct ieee80211_hdr *wh;
  1181. struct mwl8k_tx_queue *txq;
  1182. struct mwl8k_tx_desc *tx;
  1183. dma_addr_t dma;
  1184. u32 txstatus;
  1185. u8 txdatarate;
  1186. u16 qos;
  1187. wh = (struct ieee80211_hdr *)skb->data;
  1188. if (ieee80211_is_data_qos(wh->frame_control))
  1189. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1190. else
  1191. qos = 0;
  1192. mwl8k_add_dma_header(skb);
  1193. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1194. tx_info = IEEE80211_SKB_CB(skb);
  1195. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1196. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1197. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1198. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1199. mwl8k_vif->seqno += 0x10;
  1200. }
  1201. /* Setup firmware control bit fields for each frame type. */
  1202. txstatus = 0;
  1203. txdatarate = 0;
  1204. if (ieee80211_is_mgmt(wh->frame_control) ||
  1205. ieee80211_is_ctl(wh->frame_control)) {
  1206. txdatarate = 0;
  1207. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1208. } else if (ieee80211_is_data(wh->frame_control)) {
  1209. txdatarate = 1;
  1210. if (is_multicast_ether_addr(wh->addr1))
  1211. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1212. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1213. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1214. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1215. else
  1216. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1217. }
  1218. dma = pci_map_single(priv->pdev, skb->data,
  1219. skb->len, PCI_DMA_TODEVICE);
  1220. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1221. wiphy_debug(hw->wiphy,
  1222. "failed to dma map skb, dropping TX frame.\n");
  1223. dev_kfree_skb(skb);
  1224. return NETDEV_TX_OK;
  1225. }
  1226. spin_lock_bh(&priv->tx_lock);
  1227. txq = priv->txq + index;
  1228. BUG_ON(txq->skb[txq->tail] != NULL);
  1229. txq->skb[txq->tail] = skb;
  1230. tx = txq->txd + txq->tail;
  1231. tx->data_rate = txdatarate;
  1232. tx->tx_priority = index;
  1233. tx->qos_control = cpu_to_le16(qos);
  1234. tx->pkt_phys_addr = cpu_to_le32(dma);
  1235. tx->pkt_len = cpu_to_le16(skb->len);
  1236. tx->rate_info = 0;
  1237. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1238. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1239. else
  1240. tx->peer_id = 0;
  1241. wmb();
  1242. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1243. txq->len++;
  1244. priv->pending_tx_pkts++;
  1245. txq->tail++;
  1246. if (txq->tail == MWL8K_TX_DESCS)
  1247. txq->tail = 0;
  1248. if (txq->head == txq->tail)
  1249. ieee80211_stop_queue(hw, index);
  1250. mwl8k_tx_start(priv);
  1251. spin_unlock_bh(&priv->tx_lock);
  1252. return NETDEV_TX_OK;
  1253. }
  1254. /*
  1255. * Firmware access.
  1256. *
  1257. * We have the following requirements for issuing firmware commands:
  1258. * - Some commands require that the packet transmit path is idle when
  1259. * the command is issued. (For simplicity, we'll just quiesce the
  1260. * transmit path for every command.)
  1261. * - There are certain sequences of commands that need to be issued to
  1262. * the hardware sequentially, with no other intervening commands.
  1263. *
  1264. * This leads to an implementation of a "firmware lock" as a mutex that
  1265. * can be taken recursively, and which is taken by both the low-level
  1266. * command submission function (mwl8k_post_cmd) as well as any users of
  1267. * that function that require issuing of an atomic sequence of commands,
  1268. * and quiesces the transmit path whenever it's taken.
  1269. */
  1270. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1271. {
  1272. struct mwl8k_priv *priv = hw->priv;
  1273. if (priv->fw_mutex_owner != current) {
  1274. int rc;
  1275. mutex_lock(&priv->fw_mutex);
  1276. ieee80211_stop_queues(hw);
  1277. rc = mwl8k_tx_wait_empty(hw);
  1278. if (rc) {
  1279. ieee80211_wake_queues(hw);
  1280. mutex_unlock(&priv->fw_mutex);
  1281. return rc;
  1282. }
  1283. priv->fw_mutex_owner = current;
  1284. }
  1285. priv->fw_mutex_depth++;
  1286. return 0;
  1287. }
  1288. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1289. {
  1290. struct mwl8k_priv *priv = hw->priv;
  1291. if (!--priv->fw_mutex_depth) {
  1292. ieee80211_wake_queues(hw);
  1293. priv->fw_mutex_owner = NULL;
  1294. mutex_unlock(&priv->fw_mutex);
  1295. }
  1296. }
  1297. /*
  1298. * Command processing.
  1299. */
  1300. /* Timeout firmware commands after 10s */
  1301. #define MWL8K_CMD_TIMEOUT_MS 10000
  1302. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1303. {
  1304. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1305. struct mwl8k_priv *priv = hw->priv;
  1306. void __iomem *regs = priv->regs;
  1307. dma_addr_t dma_addr;
  1308. unsigned int dma_size;
  1309. int rc;
  1310. unsigned long timeout = 0;
  1311. u8 buf[32];
  1312. cmd->result = (__force __le16) 0xffff;
  1313. dma_size = le16_to_cpu(cmd->length);
  1314. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1315. PCI_DMA_BIDIRECTIONAL);
  1316. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1317. return -ENOMEM;
  1318. rc = mwl8k_fw_lock(hw);
  1319. if (rc) {
  1320. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1321. PCI_DMA_BIDIRECTIONAL);
  1322. return rc;
  1323. }
  1324. priv->hostcmd_wait = &cmd_wait;
  1325. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1326. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1327. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1328. iowrite32(MWL8K_H2A_INT_DUMMY,
  1329. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1330. timeout = wait_for_completion_timeout(&cmd_wait,
  1331. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1332. priv->hostcmd_wait = NULL;
  1333. mwl8k_fw_unlock(hw);
  1334. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1335. PCI_DMA_BIDIRECTIONAL);
  1336. if (!timeout) {
  1337. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1338. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1339. MWL8K_CMD_TIMEOUT_MS);
  1340. rc = -ETIMEDOUT;
  1341. } else {
  1342. int ms;
  1343. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1344. rc = cmd->result ? -EINVAL : 0;
  1345. if (rc)
  1346. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1347. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1348. le16_to_cpu(cmd->result));
  1349. else if (ms > 2000)
  1350. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1351. mwl8k_cmd_name(cmd->code,
  1352. buf, sizeof(buf)),
  1353. ms);
  1354. }
  1355. return rc;
  1356. }
  1357. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1358. struct ieee80211_vif *vif,
  1359. struct mwl8k_cmd_pkt *cmd)
  1360. {
  1361. if (vif != NULL)
  1362. cmd->macid = MWL8K_VIF(vif)->macid;
  1363. return mwl8k_post_cmd(hw, cmd);
  1364. }
  1365. /*
  1366. * Setup code shared between STA and AP firmware images.
  1367. */
  1368. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1369. {
  1370. struct mwl8k_priv *priv = hw->priv;
  1371. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1372. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1373. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1374. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1375. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1376. priv->band_24.channels = priv->channels_24;
  1377. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1378. priv->band_24.bitrates = priv->rates_24;
  1379. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1380. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1381. }
  1382. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1383. {
  1384. struct mwl8k_priv *priv = hw->priv;
  1385. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1386. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1387. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1388. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1389. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1390. priv->band_50.channels = priv->channels_50;
  1391. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1392. priv->band_50.bitrates = priv->rates_50;
  1393. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1394. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1395. }
  1396. /*
  1397. * CMD_GET_HW_SPEC (STA version).
  1398. */
  1399. struct mwl8k_cmd_get_hw_spec_sta {
  1400. struct mwl8k_cmd_pkt header;
  1401. __u8 hw_rev;
  1402. __u8 host_interface;
  1403. __le16 num_mcaddrs;
  1404. __u8 perm_addr[ETH_ALEN];
  1405. __le16 region_code;
  1406. __le32 fw_rev;
  1407. __le32 ps_cookie;
  1408. __le32 caps;
  1409. __u8 mcs_bitmap[16];
  1410. __le32 rx_queue_ptr;
  1411. __le32 num_tx_queues;
  1412. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1413. __le32 caps2;
  1414. __le32 num_tx_desc_per_queue;
  1415. __le32 total_rxd;
  1416. } __packed;
  1417. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1418. #define MWL8K_CAP_GREENFIELD 0x08000000
  1419. #define MWL8K_CAP_AMPDU 0x04000000
  1420. #define MWL8K_CAP_RX_STBC 0x01000000
  1421. #define MWL8K_CAP_TX_STBC 0x00800000
  1422. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1423. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1424. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1425. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1426. #define MWL8K_CAP_DELAY_BA 0x00003000
  1427. #define MWL8K_CAP_MIMO 0x00000200
  1428. #define MWL8K_CAP_40MHZ 0x00000100
  1429. #define MWL8K_CAP_BAND_MASK 0x00000007
  1430. #define MWL8K_CAP_5GHZ 0x00000004
  1431. #define MWL8K_CAP_2GHZ4 0x00000001
  1432. static void
  1433. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1434. struct ieee80211_supported_band *band, u32 cap)
  1435. {
  1436. int rx_streams;
  1437. int tx_streams;
  1438. band->ht_cap.ht_supported = 1;
  1439. if (cap & MWL8K_CAP_MAX_AMSDU)
  1440. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1441. if (cap & MWL8K_CAP_GREENFIELD)
  1442. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1443. if (cap & MWL8K_CAP_AMPDU) {
  1444. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1445. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1446. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1447. }
  1448. if (cap & MWL8K_CAP_RX_STBC)
  1449. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1450. if (cap & MWL8K_CAP_TX_STBC)
  1451. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1452. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1453. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1454. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1455. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1456. if (cap & MWL8K_CAP_DELAY_BA)
  1457. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1458. if (cap & MWL8K_CAP_40MHZ)
  1459. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1460. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1461. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1462. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1463. if (rx_streams >= 2)
  1464. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1465. if (rx_streams >= 3)
  1466. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1467. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1468. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1469. if (rx_streams != tx_streams) {
  1470. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1471. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1472. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1473. }
  1474. }
  1475. static void
  1476. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1477. {
  1478. struct mwl8k_priv *priv = hw->priv;
  1479. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1480. mwl8k_setup_2ghz_band(hw);
  1481. if (caps & MWL8K_CAP_MIMO)
  1482. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1483. }
  1484. if (caps & MWL8K_CAP_5GHZ) {
  1485. mwl8k_setup_5ghz_band(hw);
  1486. if (caps & MWL8K_CAP_MIMO)
  1487. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1488. }
  1489. }
  1490. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1491. {
  1492. struct mwl8k_priv *priv = hw->priv;
  1493. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1494. int rc;
  1495. int i;
  1496. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1497. if (cmd == NULL)
  1498. return -ENOMEM;
  1499. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1500. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1501. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1502. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1503. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1504. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1505. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1506. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1507. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1508. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1509. rc = mwl8k_post_cmd(hw, &cmd->header);
  1510. if (!rc) {
  1511. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1512. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1513. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1514. priv->hw_rev = cmd->hw_rev;
  1515. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1516. priv->ap_macids_supported = 0x00000000;
  1517. priv->sta_macids_supported = 0x00000001;
  1518. }
  1519. kfree(cmd);
  1520. return rc;
  1521. }
  1522. /*
  1523. * CMD_GET_HW_SPEC (AP version).
  1524. */
  1525. struct mwl8k_cmd_get_hw_spec_ap {
  1526. struct mwl8k_cmd_pkt header;
  1527. __u8 hw_rev;
  1528. __u8 host_interface;
  1529. __le16 num_wcb;
  1530. __le16 num_mcaddrs;
  1531. __u8 perm_addr[ETH_ALEN];
  1532. __le16 region_code;
  1533. __le16 num_antenna;
  1534. __le32 fw_rev;
  1535. __le32 wcbbase0;
  1536. __le32 rxwrptr;
  1537. __le32 rxrdptr;
  1538. __le32 ps_cookie;
  1539. __le32 wcbbase1;
  1540. __le32 wcbbase2;
  1541. __le32 wcbbase3;
  1542. __le32 fw_api_version;
  1543. } __packed;
  1544. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1545. {
  1546. struct mwl8k_priv *priv = hw->priv;
  1547. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1548. int rc;
  1549. u32 api_version;
  1550. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1551. if (cmd == NULL)
  1552. return -ENOMEM;
  1553. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1554. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1555. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1556. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1557. rc = mwl8k_post_cmd(hw, &cmd->header);
  1558. if (!rc) {
  1559. int off;
  1560. api_version = le32_to_cpu(cmd->fw_api_version);
  1561. if (priv->device_info->fw_api_ap != api_version) {
  1562. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  1563. " Expected %d got %d.\n", MWL8K_NAME,
  1564. priv->device_info->part_name,
  1565. priv->device_info->fw_api_ap,
  1566. api_version);
  1567. rc = -EINVAL;
  1568. goto done;
  1569. }
  1570. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1571. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1572. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1573. priv->hw_rev = cmd->hw_rev;
  1574. mwl8k_setup_2ghz_band(hw);
  1575. priv->ap_macids_supported = 0x000000ff;
  1576. priv->sta_macids_supported = 0x00000000;
  1577. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1578. iowrite32(priv->txq[0].txd_dma, priv->sram + off);
  1579. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1580. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1581. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1582. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1583. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1584. iowrite32(priv->txq[1].txd_dma, priv->sram + off);
  1585. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1586. iowrite32(priv->txq[2].txd_dma, priv->sram + off);
  1587. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1588. iowrite32(priv->txq[3].txd_dma, priv->sram + off);
  1589. }
  1590. done:
  1591. kfree(cmd);
  1592. return rc;
  1593. }
  1594. /*
  1595. * CMD_SET_HW_SPEC.
  1596. */
  1597. struct mwl8k_cmd_set_hw_spec {
  1598. struct mwl8k_cmd_pkt header;
  1599. __u8 hw_rev;
  1600. __u8 host_interface;
  1601. __le16 num_mcaddrs;
  1602. __u8 perm_addr[ETH_ALEN];
  1603. __le16 region_code;
  1604. __le32 fw_rev;
  1605. __le32 ps_cookie;
  1606. __le32 caps;
  1607. __le32 rx_queue_ptr;
  1608. __le32 num_tx_queues;
  1609. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1610. __le32 flags;
  1611. __le32 num_tx_desc_per_queue;
  1612. __le32 total_rxd;
  1613. } __packed;
  1614. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1615. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1616. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1617. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1618. {
  1619. struct mwl8k_priv *priv = hw->priv;
  1620. struct mwl8k_cmd_set_hw_spec *cmd;
  1621. int rc;
  1622. int i;
  1623. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1624. if (cmd == NULL)
  1625. return -ENOMEM;
  1626. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1627. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1628. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1629. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1630. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1631. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1632. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1633. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1634. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1635. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1636. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1637. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1638. rc = mwl8k_post_cmd(hw, &cmd->header);
  1639. kfree(cmd);
  1640. return rc;
  1641. }
  1642. /*
  1643. * CMD_MAC_MULTICAST_ADR.
  1644. */
  1645. struct mwl8k_cmd_mac_multicast_adr {
  1646. struct mwl8k_cmd_pkt header;
  1647. __le16 action;
  1648. __le16 numaddr;
  1649. __u8 addr[0][ETH_ALEN];
  1650. };
  1651. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1652. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1653. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1654. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1655. static struct mwl8k_cmd_pkt *
  1656. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1657. struct netdev_hw_addr_list *mc_list)
  1658. {
  1659. struct mwl8k_priv *priv = hw->priv;
  1660. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1661. int size;
  1662. int mc_count = 0;
  1663. if (mc_list)
  1664. mc_count = netdev_hw_addr_list_count(mc_list);
  1665. if (allmulti || mc_count > priv->num_mcaddrs) {
  1666. allmulti = 1;
  1667. mc_count = 0;
  1668. }
  1669. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1670. cmd = kzalloc(size, GFP_ATOMIC);
  1671. if (cmd == NULL)
  1672. return NULL;
  1673. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1674. cmd->header.length = cpu_to_le16(size);
  1675. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1676. MWL8K_ENABLE_RX_BROADCAST);
  1677. if (allmulti) {
  1678. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1679. } else if (mc_count) {
  1680. struct netdev_hw_addr *ha;
  1681. int i = 0;
  1682. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1683. cmd->numaddr = cpu_to_le16(mc_count);
  1684. netdev_hw_addr_list_for_each(ha, mc_list) {
  1685. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1686. }
  1687. }
  1688. return &cmd->header;
  1689. }
  1690. /*
  1691. * CMD_GET_STAT.
  1692. */
  1693. struct mwl8k_cmd_get_stat {
  1694. struct mwl8k_cmd_pkt header;
  1695. __le32 stats[64];
  1696. } __packed;
  1697. #define MWL8K_STAT_ACK_FAILURE 9
  1698. #define MWL8K_STAT_RTS_FAILURE 12
  1699. #define MWL8K_STAT_FCS_ERROR 24
  1700. #define MWL8K_STAT_RTS_SUCCESS 11
  1701. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1702. struct ieee80211_low_level_stats *stats)
  1703. {
  1704. struct mwl8k_cmd_get_stat *cmd;
  1705. int rc;
  1706. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1707. if (cmd == NULL)
  1708. return -ENOMEM;
  1709. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1710. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1711. rc = mwl8k_post_cmd(hw, &cmd->header);
  1712. if (!rc) {
  1713. stats->dot11ACKFailureCount =
  1714. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1715. stats->dot11RTSFailureCount =
  1716. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1717. stats->dot11FCSErrorCount =
  1718. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1719. stats->dot11RTSSuccessCount =
  1720. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1721. }
  1722. kfree(cmd);
  1723. return rc;
  1724. }
  1725. /*
  1726. * CMD_RADIO_CONTROL.
  1727. */
  1728. struct mwl8k_cmd_radio_control {
  1729. struct mwl8k_cmd_pkt header;
  1730. __le16 action;
  1731. __le16 control;
  1732. __le16 radio_on;
  1733. } __packed;
  1734. static int
  1735. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1736. {
  1737. struct mwl8k_priv *priv = hw->priv;
  1738. struct mwl8k_cmd_radio_control *cmd;
  1739. int rc;
  1740. if (enable == priv->radio_on && !force)
  1741. return 0;
  1742. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1743. if (cmd == NULL)
  1744. return -ENOMEM;
  1745. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1746. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1747. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1748. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1749. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1750. rc = mwl8k_post_cmd(hw, &cmd->header);
  1751. kfree(cmd);
  1752. if (!rc)
  1753. priv->radio_on = enable;
  1754. return rc;
  1755. }
  1756. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1757. {
  1758. return mwl8k_cmd_radio_control(hw, 0, 0);
  1759. }
  1760. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1761. {
  1762. return mwl8k_cmd_radio_control(hw, 1, 0);
  1763. }
  1764. static int
  1765. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1766. {
  1767. struct mwl8k_priv *priv = hw->priv;
  1768. priv->radio_short_preamble = short_preamble;
  1769. return mwl8k_cmd_radio_control(hw, 1, 1);
  1770. }
  1771. /*
  1772. * CMD_RF_TX_POWER.
  1773. */
  1774. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  1775. struct mwl8k_cmd_rf_tx_power {
  1776. struct mwl8k_cmd_pkt header;
  1777. __le16 action;
  1778. __le16 support_level;
  1779. __le16 current_level;
  1780. __le16 reserved;
  1781. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  1782. } __packed;
  1783. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1784. {
  1785. struct mwl8k_cmd_rf_tx_power *cmd;
  1786. int rc;
  1787. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1788. if (cmd == NULL)
  1789. return -ENOMEM;
  1790. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1791. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1792. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1793. cmd->support_level = cpu_to_le16(dBm);
  1794. rc = mwl8k_post_cmd(hw, &cmd->header);
  1795. kfree(cmd);
  1796. return rc;
  1797. }
  1798. /*
  1799. * CMD_TX_POWER.
  1800. */
  1801. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  1802. struct mwl8k_cmd_tx_power {
  1803. struct mwl8k_cmd_pkt header;
  1804. __le16 action;
  1805. __le16 band;
  1806. __le16 channel;
  1807. __le16 bw;
  1808. __le16 sub_ch;
  1809. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1810. } __attribute__((packed));
  1811. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  1812. struct ieee80211_conf *conf,
  1813. unsigned short pwr)
  1814. {
  1815. struct ieee80211_channel *channel = conf->channel;
  1816. struct mwl8k_cmd_tx_power *cmd;
  1817. int rc;
  1818. int i;
  1819. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1820. if (cmd == NULL)
  1821. return -ENOMEM;
  1822. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  1823. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1824. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  1825. if (channel->band == IEEE80211_BAND_2GHZ)
  1826. cmd->band = cpu_to_le16(0x1);
  1827. else if (channel->band == IEEE80211_BAND_5GHZ)
  1828. cmd->band = cpu_to_le16(0x4);
  1829. cmd->channel = channel->hw_value;
  1830. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1831. conf->channel_type == NL80211_CHAN_HT20) {
  1832. cmd->bw = cpu_to_le16(0x2);
  1833. } else {
  1834. cmd->bw = cpu_to_le16(0x4);
  1835. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1836. cmd->sub_ch = cpu_to_le16(0x3);
  1837. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1838. cmd->sub_ch = cpu_to_le16(0x1);
  1839. }
  1840. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  1841. cmd->power_level_list[i] = cpu_to_le16(pwr);
  1842. rc = mwl8k_post_cmd(hw, &cmd->header);
  1843. kfree(cmd);
  1844. return rc;
  1845. }
  1846. /*
  1847. * CMD_RF_ANTENNA.
  1848. */
  1849. struct mwl8k_cmd_rf_antenna {
  1850. struct mwl8k_cmd_pkt header;
  1851. __le16 antenna;
  1852. __le16 mode;
  1853. } __packed;
  1854. #define MWL8K_RF_ANTENNA_RX 1
  1855. #define MWL8K_RF_ANTENNA_TX 2
  1856. static int
  1857. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1858. {
  1859. struct mwl8k_cmd_rf_antenna *cmd;
  1860. int rc;
  1861. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1862. if (cmd == NULL)
  1863. return -ENOMEM;
  1864. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1865. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1866. cmd->antenna = cpu_to_le16(antenna);
  1867. cmd->mode = cpu_to_le16(mask);
  1868. rc = mwl8k_post_cmd(hw, &cmd->header);
  1869. kfree(cmd);
  1870. return rc;
  1871. }
  1872. /*
  1873. * CMD_SET_BEACON.
  1874. */
  1875. struct mwl8k_cmd_set_beacon {
  1876. struct mwl8k_cmd_pkt header;
  1877. __le16 beacon_len;
  1878. __u8 beacon[0];
  1879. };
  1880. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1881. struct ieee80211_vif *vif, u8 *beacon, int len)
  1882. {
  1883. struct mwl8k_cmd_set_beacon *cmd;
  1884. int rc;
  1885. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1886. if (cmd == NULL)
  1887. return -ENOMEM;
  1888. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1889. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1890. cmd->beacon_len = cpu_to_le16(len);
  1891. memcpy(cmd->beacon, beacon, len);
  1892. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1893. kfree(cmd);
  1894. return rc;
  1895. }
  1896. /*
  1897. * CMD_SET_PRE_SCAN.
  1898. */
  1899. struct mwl8k_cmd_set_pre_scan {
  1900. struct mwl8k_cmd_pkt header;
  1901. } __packed;
  1902. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1903. {
  1904. struct mwl8k_cmd_set_pre_scan *cmd;
  1905. int rc;
  1906. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1907. if (cmd == NULL)
  1908. return -ENOMEM;
  1909. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1910. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1911. rc = mwl8k_post_cmd(hw, &cmd->header);
  1912. kfree(cmd);
  1913. return rc;
  1914. }
  1915. /*
  1916. * CMD_SET_POST_SCAN.
  1917. */
  1918. struct mwl8k_cmd_set_post_scan {
  1919. struct mwl8k_cmd_pkt header;
  1920. __le32 isibss;
  1921. __u8 bssid[ETH_ALEN];
  1922. } __packed;
  1923. static int
  1924. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1925. {
  1926. struct mwl8k_cmd_set_post_scan *cmd;
  1927. int rc;
  1928. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1929. if (cmd == NULL)
  1930. return -ENOMEM;
  1931. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1932. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1933. cmd->isibss = 0;
  1934. memcpy(cmd->bssid, mac, ETH_ALEN);
  1935. rc = mwl8k_post_cmd(hw, &cmd->header);
  1936. kfree(cmd);
  1937. return rc;
  1938. }
  1939. /*
  1940. * CMD_SET_RF_CHANNEL.
  1941. */
  1942. struct mwl8k_cmd_set_rf_channel {
  1943. struct mwl8k_cmd_pkt header;
  1944. __le16 action;
  1945. __u8 current_channel;
  1946. __le32 channel_flags;
  1947. } __packed;
  1948. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1949. struct ieee80211_conf *conf)
  1950. {
  1951. struct ieee80211_channel *channel = conf->channel;
  1952. struct mwl8k_cmd_set_rf_channel *cmd;
  1953. int rc;
  1954. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1955. if (cmd == NULL)
  1956. return -ENOMEM;
  1957. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1958. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1959. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1960. cmd->current_channel = channel->hw_value;
  1961. if (channel->band == IEEE80211_BAND_2GHZ)
  1962. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1963. else if (channel->band == IEEE80211_BAND_5GHZ)
  1964. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1965. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1966. conf->channel_type == NL80211_CHAN_HT20)
  1967. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1968. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1969. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1970. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1971. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1972. rc = mwl8k_post_cmd(hw, &cmd->header);
  1973. kfree(cmd);
  1974. return rc;
  1975. }
  1976. /*
  1977. * CMD_SET_AID.
  1978. */
  1979. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1980. #define MWL8K_FRAME_PROT_11G 0x07
  1981. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1982. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1983. struct mwl8k_cmd_update_set_aid {
  1984. struct mwl8k_cmd_pkt header;
  1985. __le16 aid;
  1986. /* AP's MAC address (BSSID) */
  1987. __u8 bssid[ETH_ALEN];
  1988. __le16 protection_mode;
  1989. __u8 supp_rates[14];
  1990. } __packed;
  1991. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1992. {
  1993. int i;
  1994. int j;
  1995. /*
  1996. * Clear nonstandard rates 4 and 13.
  1997. */
  1998. mask &= 0x1fef;
  1999. for (i = 0, j = 0; i < 14; i++) {
  2000. if (mask & (1 << i))
  2001. rates[j++] = mwl8k_rates_24[i].hw_value;
  2002. }
  2003. }
  2004. static int
  2005. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2006. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2007. {
  2008. struct mwl8k_cmd_update_set_aid *cmd;
  2009. u16 prot_mode;
  2010. int rc;
  2011. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2012. if (cmd == NULL)
  2013. return -ENOMEM;
  2014. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2015. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2016. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2017. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2018. if (vif->bss_conf.use_cts_prot) {
  2019. prot_mode = MWL8K_FRAME_PROT_11G;
  2020. } else {
  2021. switch (vif->bss_conf.ht_operation_mode &
  2022. IEEE80211_HT_OP_MODE_PROTECTION) {
  2023. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2024. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2025. break;
  2026. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2027. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2028. break;
  2029. default:
  2030. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2031. break;
  2032. }
  2033. }
  2034. cmd->protection_mode = cpu_to_le16(prot_mode);
  2035. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2036. rc = mwl8k_post_cmd(hw, &cmd->header);
  2037. kfree(cmd);
  2038. return rc;
  2039. }
  2040. /*
  2041. * CMD_SET_RATE.
  2042. */
  2043. struct mwl8k_cmd_set_rate {
  2044. struct mwl8k_cmd_pkt header;
  2045. __u8 legacy_rates[14];
  2046. /* Bitmap for supported MCS codes. */
  2047. __u8 mcs_set[16];
  2048. __u8 reserved[16];
  2049. } __packed;
  2050. static int
  2051. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2052. u32 legacy_rate_mask, u8 *mcs_rates)
  2053. {
  2054. struct mwl8k_cmd_set_rate *cmd;
  2055. int rc;
  2056. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2057. if (cmd == NULL)
  2058. return -ENOMEM;
  2059. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2060. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2061. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2062. memcpy(cmd->mcs_set, mcs_rates, 16);
  2063. rc = mwl8k_post_cmd(hw, &cmd->header);
  2064. kfree(cmd);
  2065. return rc;
  2066. }
  2067. /*
  2068. * CMD_FINALIZE_JOIN.
  2069. */
  2070. #define MWL8K_FJ_BEACON_MAXLEN 128
  2071. struct mwl8k_cmd_finalize_join {
  2072. struct mwl8k_cmd_pkt header;
  2073. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2074. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2075. } __packed;
  2076. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2077. int framelen, int dtim)
  2078. {
  2079. struct mwl8k_cmd_finalize_join *cmd;
  2080. struct ieee80211_mgmt *payload = frame;
  2081. int payload_len;
  2082. int rc;
  2083. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2084. if (cmd == NULL)
  2085. return -ENOMEM;
  2086. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2087. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2088. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2089. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2090. if (payload_len < 0)
  2091. payload_len = 0;
  2092. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2093. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2094. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2095. rc = mwl8k_post_cmd(hw, &cmd->header);
  2096. kfree(cmd);
  2097. return rc;
  2098. }
  2099. /*
  2100. * CMD_SET_RTS_THRESHOLD.
  2101. */
  2102. struct mwl8k_cmd_set_rts_threshold {
  2103. struct mwl8k_cmd_pkt header;
  2104. __le16 action;
  2105. __le16 threshold;
  2106. } __packed;
  2107. static int
  2108. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2109. {
  2110. struct mwl8k_cmd_set_rts_threshold *cmd;
  2111. int rc;
  2112. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2113. if (cmd == NULL)
  2114. return -ENOMEM;
  2115. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2116. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2117. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2118. cmd->threshold = cpu_to_le16(rts_thresh);
  2119. rc = mwl8k_post_cmd(hw, &cmd->header);
  2120. kfree(cmd);
  2121. return rc;
  2122. }
  2123. /*
  2124. * CMD_SET_SLOT.
  2125. */
  2126. struct mwl8k_cmd_set_slot {
  2127. struct mwl8k_cmd_pkt header;
  2128. __le16 action;
  2129. __u8 short_slot;
  2130. } __packed;
  2131. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2132. {
  2133. struct mwl8k_cmd_set_slot *cmd;
  2134. int rc;
  2135. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2136. if (cmd == NULL)
  2137. return -ENOMEM;
  2138. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2139. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2140. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2141. cmd->short_slot = short_slot_time;
  2142. rc = mwl8k_post_cmd(hw, &cmd->header);
  2143. kfree(cmd);
  2144. return rc;
  2145. }
  2146. /*
  2147. * CMD_SET_EDCA_PARAMS.
  2148. */
  2149. struct mwl8k_cmd_set_edca_params {
  2150. struct mwl8k_cmd_pkt header;
  2151. /* See MWL8K_SET_EDCA_XXX below */
  2152. __le16 action;
  2153. /* TX opportunity in units of 32 us */
  2154. __le16 txop;
  2155. union {
  2156. struct {
  2157. /* Log exponent of max contention period: 0...15 */
  2158. __le32 log_cw_max;
  2159. /* Log exponent of min contention period: 0...15 */
  2160. __le32 log_cw_min;
  2161. /* Adaptive interframe spacing in units of 32us */
  2162. __u8 aifs;
  2163. /* TX queue to configure */
  2164. __u8 txq;
  2165. } ap;
  2166. struct {
  2167. /* Log exponent of max contention period: 0...15 */
  2168. __u8 log_cw_max;
  2169. /* Log exponent of min contention period: 0...15 */
  2170. __u8 log_cw_min;
  2171. /* Adaptive interframe spacing in units of 32us */
  2172. __u8 aifs;
  2173. /* TX queue to configure */
  2174. __u8 txq;
  2175. } sta;
  2176. };
  2177. } __packed;
  2178. #define MWL8K_SET_EDCA_CW 0x01
  2179. #define MWL8K_SET_EDCA_TXOP 0x02
  2180. #define MWL8K_SET_EDCA_AIFS 0x04
  2181. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2182. MWL8K_SET_EDCA_TXOP | \
  2183. MWL8K_SET_EDCA_AIFS)
  2184. static int
  2185. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2186. __u16 cw_min, __u16 cw_max,
  2187. __u8 aifs, __u16 txop)
  2188. {
  2189. struct mwl8k_priv *priv = hw->priv;
  2190. struct mwl8k_cmd_set_edca_params *cmd;
  2191. int rc;
  2192. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2193. if (cmd == NULL)
  2194. return -ENOMEM;
  2195. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2196. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2197. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2198. cmd->txop = cpu_to_le16(txop);
  2199. if (priv->ap_fw) {
  2200. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2201. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2202. cmd->ap.aifs = aifs;
  2203. cmd->ap.txq = qnum;
  2204. } else {
  2205. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2206. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2207. cmd->sta.aifs = aifs;
  2208. cmd->sta.txq = qnum;
  2209. }
  2210. rc = mwl8k_post_cmd(hw, &cmd->header);
  2211. kfree(cmd);
  2212. return rc;
  2213. }
  2214. /*
  2215. * CMD_SET_WMM_MODE.
  2216. */
  2217. struct mwl8k_cmd_set_wmm_mode {
  2218. struct mwl8k_cmd_pkt header;
  2219. __le16 action;
  2220. } __packed;
  2221. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2222. {
  2223. struct mwl8k_priv *priv = hw->priv;
  2224. struct mwl8k_cmd_set_wmm_mode *cmd;
  2225. int rc;
  2226. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2227. if (cmd == NULL)
  2228. return -ENOMEM;
  2229. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2230. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2231. cmd->action = cpu_to_le16(!!enable);
  2232. rc = mwl8k_post_cmd(hw, &cmd->header);
  2233. kfree(cmd);
  2234. if (!rc)
  2235. priv->wmm_enabled = enable;
  2236. return rc;
  2237. }
  2238. /*
  2239. * CMD_MIMO_CONFIG.
  2240. */
  2241. struct mwl8k_cmd_mimo_config {
  2242. struct mwl8k_cmd_pkt header;
  2243. __le32 action;
  2244. __u8 rx_antenna_map;
  2245. __u8 tx_antenna_map;
  2246. } __packed;
  2247. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2248. {
  2249. struct mwl8k_cmd_mimo_config *cmd;
  2250. int rc;
  2251. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2252. if (cmd == NULL)
  2253. return -ENOMEM;
  2254. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2255. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2256. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2257. cmd->rx_antenna_map = rx;
  2258. cmd->tx_antenna_map = tx;
  2259. rc = mwl8k_post_cmd(hw, &cmd->header);
  2260. kfree(cmd);
  2261. return rc;
  2262. }
  2263. /*
  2264. * CMD_USE_FIXED_RATE (STA version).
  2265. */
  2266. struct mwl8k_cmd_use_fixed_rate_sta {
  2267. struct mwl8k_cmd_pkt header;
  2268. __le32 action;
  2269. __le32 allow_rate_drop;
  2270. __le32 num_rates;
  2271. struct {
  2272. __le32 is_ht_rate;
  2273. __le32 enable_retry;
  2274. __le32 rate;
  2275. __le32 retry_count;
  2276. } rate_entry[8];
  2277. __le32 rate_type;
  2278. __le32 reserved1;
  2279. __le32 reserved2;
  2280. } __packed;
  2281. #define MWL8K_USE_AUTO_RATE 0x0002
  2282. #define MWL8K_UCAST_RATE 0
  2283. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2284. {
  2285. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2286. int rc;
  2287. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2288. if (cmd == NULL)
  2289. return -ENOMEM;
  2290. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2291. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2292. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2293. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2294. rc = mwl8k_post_cmd(hw, &cmd->header);
  2295. kfree(cmd);
  2296. return rc;
  2297. }
  2298. /*
  2299. * CMD_USE_FIXED_RATE (AP version).
  2300. */
  2301. struct mwl8k_cmd_use_fixed_rate_ap {
  2302. struct mwl8k_cmd_pkt header;
  2303. __le32 action;
  2304. __le32 allow_rate_drop;
  2305. __le32 num_rates;
  2306. struct mwl8k_rate_entry_ap {
  2307. __le32 is_ht_rate;
  2308. __le32 enable_retry;
  2309. __le32 rate;
  2310. __le32 retry_count;
  2311. } rate_entry[4];
  2312. u8 multicast_rate;
  2313. u8 multicast_rate_type;
  2314. u8 management_rate;
  2315. } __packed;
  2316. static int
  2317. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2318. {
  2319. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2320. int rc;
  2321. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2322. if (cmd == NULL)
  2323. return -ENOMEM;
  2324. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2325. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2326. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2327. cmd->multicast_rate = mcast;
  2328. cmd->management_rate = mgmt;
  2329. rc = mwl8k_post_cmd(hw, &cmd->header);
  2330. kfree(cmd);
  2331. return rc;
  2332. }
  2333. /*
  2334. * CMD_ENABLE_SNIFFER.
  2335. */
  2336. struct mwl8k_cmd_enable_sniffer {
  2337. struct mwl8k_cmd_pkt header;
  2338. __le32 action;
  2339. } __packed;
  2340. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2341. {
  2342. struct mwl8k_cmd_enable_sniffer *cmd;
  2343. int rc;
  2344. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2345. if (cmd == NULL)
  2346. return -ENOMEM;
  2347. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2348. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2349. cmd->action = cpu_to_le32(!!enable);
  2350. rc = mwl8k_post_cmd(hw, &cmd->header);
  2351. kfree(cmd);
  2352. return rc;
  2353. }
  2354. /*
  2355. * CMD_SET_MAC_ADDR.
  2356. */
  2357. struct mwl8k_cmd_set_mac_addr {
  2358. struct mwl8k_cmd_pkt header;
  2359. union {
  2360. struct {
  2361. __le16 mac_type;
  2362. __u8 mac_addr[ETH_ALEN];
  2363. } mbss;
  2364. __u8 mac_addr[ETH_ALEN];
  2365. };
  2366. } __packed;
  2367. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2368. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2369. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2370. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2371. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2372. struct ieee80211_vif *vif, u8 *mac)
  2373. {
  2374. struct mwl8k_priv *priv = hw->priv;
  2375. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2376. struct mwl8k_cmd_set_mac_addr *cmd;
  2377. int mac_type;
  2378. int rc;
  2379. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2380. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2381. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2382. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2383. else
  2384. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2385. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2386. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2387. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2388. else
  2389. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2390. }
  2391. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2392. if (cmd == NULL)
  2393. return -ENOMEM;
  2394. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2395. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2396. if (priv->ap_fw) {
  2397. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2398. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2399. } else {
  2400. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2401. }
  2402. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2403. kfree(cmd);
  2404. return rc;
  2405. }
  2406. /*
  2407. * CMD_SET_RATEADAPT_MODE.
  2408. */
  2409. struct mwl8k_cmd_set_rate_adapt_mode {
  2410. struct mwl8k_cmd_pkt header;
  2411. __le16 action;
  2412. __le16 mode;
  2413. } __packed;
  2414. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2415. {
  2416. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2417. int rc;
  2418. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2419. if (cmd == NULL)
  2420. return -ENOMEM;
  2421. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2422. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2423. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2424. cmd->mode = cpu_to_le16(mode);
  2425. rc = mwl8k_post_cmd(hw, &cmd->header);
  2426. kfree(cmd);
  2427. return rc;
  2428. }
  2429. /*
  2430. * CMD_BSS_START.
  2431. */
  2432. struct mwl8k_cmd_bss_start {
  2433. struct mwl8k_cmd_pkt header;
  2434. __le32 enable;
  2435. } __packed;
  2436. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2437. struct ieee80211_vif *vif, int enable)
  2438. {
  2439. struct mwl8k_cmd_bss_start *cmd;
  2440. int rc;
  2441. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2442. if (cmd == NULL)
  2443. return -ENOMEM;
  2444. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2445. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2446. cmd->enable = cpu_to_le32(enable);
  2447. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2448. kfree(cmd);
  2449. return rc;
  2450. }
  2451. /*
  2452. * CMD_SET_NEW_STN.
  2453. */
  2454. struct mwl8k_cmd_set_new_stn {
  2455. struct mwl8k_cmd_pkt header;
  2456. __le16 aid;
  2457. __u8 mac_addr[6];
  2458. __le16 stn_id;
  2459. __le16 action;
  2460. __le16 rsvd;
  2461. __le32 legacy_rates;
  2462. __u8 ht_rates[4];
  2463. __le16 cap_info;
  2464. __le16 ht_capabilities_info;
  2465. __u8 mac_ht_param_info;
  2466. __u8 rev;
  2467. __u8 control_channel;
  2468. __u8 add_channel;
  2469. __le16 op_mode;
  2470. __le16 stbc;
  2471. __u8 add_qos_info;
  2472. __u8 is_qos_sta;
  2473. __le32 fw_sta_ptr;
  2474. } __packed;
  2475. #define MWL8K_STA_ACTION_ADD 0
  2476. #define MWL8K_STA_ACTION_REMOVE 2
  2477. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2478. struct ieee80211_vif *vif,
  2479. struct ieee80211_sta *sta)
  2480. {
  2481. struct mwl8k_cmd_set_new_stn *cmd;
  2482. u32 rates;
  2483. int rc;
  2484. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2485. if (cmd == NULL)
  2486. return -ENOMEM;
  2487. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2488. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2489. cmd->aid = cpu_to_le16(sta->aid);
  2490. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2491. cmd->stn_id = cpu_to_le16(sta->aid);
  2492. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2493. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2494. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2495. else
  2496. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2497. cmd->legacy_rates = cpu_to_le32(rates);
  2498. if (sta->ht_cap.ht_supported) {
  2499. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2500. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2501. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2502. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2503. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2504. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2505. ((sta->ht_cap.ampdu_density & 7) << 2);
  2506. cmd->is_qos_sta = 1;
  2507. }
  2508. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2509. kfree(cmd);
  2510. return rc;
  2511. }
  2512. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2513. struct ieee80211_vif *vif)
  2514. {
  2515. struct mwl8k_cmd_set_new_stn *cmd;
  2516. int rc;
  2517. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2518. if (cmd == NULL)
  2519. return -ENOMEM;
  2520. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2521. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2522. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2523. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2524. kfree(cmd);
  2525. return rc;
  2526. }
  2527. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2528. struct ieee80211_vif *vif, u8 *addr)
  2529. {
  2530. struct mwl8k_cmd_set_new_stn *cmd;
  2531. int rc;
  2532. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2533. if (cmd == NULL)
  2534. return -ENOMEM;
  2535. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2536. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2537. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2538. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2539. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2540. kfree(cmd);
  2541. return rc;
  2542. }
  2543. /*
  2544. * CMD_UPDATE_STADB.
  2545. */
  2546. struct ewc_ht_info {
  2547. __le16 control1;
  2548. __le16 control2;
  2549. __le16 control3;
  2550. } __packed;
  2551. struct peer_capability_info {
  2552. /* Peer type - AP vs. STA. */
  2553. __u8 peer_type;
  2554. /* Basic 802.11 capabilities from assoc resp. */
  2555. __le16 basic_caps;
  2556. /* Set if peer supports 802.11n high throughput (HT). */
  2557. __u8 ht_support;
  2558. /* Valid if HT is supported. */
  2559. __le16 ht_caps;
  2560. __u8 extended_ht_caps;
  2561. struct ewc_ht_info ewc_info;
  2562. /* Legacy rate table. Intersection of our rates and peer rates. */
  2563. __u8 legacy_rates[12];
  2564. /* HT rate table. Intersection of our rates and peer rates. */
  2565. __u8 ht_rates[16];
  2566. __u8 pad[16];
  2567. /* If set, interoperability mode, no proprietary extensions. */
  2568. __u8 interop;
  2569. __u8 pad2;
  2570. __u8 station_id;
  2571. __le16 amsdu_enabled;
  2572. } __packed;
  2573. struct mwl8k_cmd_update_stadb {
  2574. struct mwl8k_cmd_pkt header;
  2575. /* See STADB_ACTION_TYPE */
  2576. __le32 action;
  2577. /* Peer MAC address */
  2578. __u8 peer_addr[ETH_ALEN];
  2579. __le32 reserved;
  2580. /* Peer info - valid during add/update. */
  2581. struct peer_capability_info peer_info;
  2582. } __packed;
  2583. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2584. #define MWL8K_STA_DB_DEL_ENTRY 2
  2585. /* Peer Entry flags - used to define the type of the peer node */
  2586. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2587. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2588. struct ieee80211_vif *vif,
  2589. struct ieee80211_sta *sta)
  2590. {
  2591. struct mwl8k_cmd_update_stadb *cmd;
  2592. struct peer_capability_info *p;
  2593. u32 rates;
  2594. int rc;
  2595. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2596. if (cmd == NULL)
  2597. return -ENOMEM;
  2598. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2599. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2600. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2601. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2602. p = &cmd->peer_info;
  2603. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2604. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2605. p->ht_support = sta->ht_cap.ht_supported;
  2606. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  2607. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2608. ((sta->ht_cap.ampdu_density & 7) << 2);
  2609. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2610. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2611. else
  2612. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2613. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2614. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2615. p->interop = 1;
  2616. p->amsdu_enabled = 0;
  2617. rc = mwl8k_post_cmd(hw, &cmd->header);
  2618. kfree(cmd);
  2619. return rc ? rc : p->station_id;
  2620. }
  2621. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2622. struct ieee80211_vif *vif, u8 *addr)
  2623. {
  2624. struct mwl8k_cmd_update_stadb *cmd;
  2625. int rc;
  2626. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2627. if (cmd == NULL)
  2628. return -ENOMEM;
  2629. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2630. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2631. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2632. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2633. rc = mwl8k_post_cmd(hw, &cmd->header);
  2634. kfree(cmd);
  2635. return rc;
  2636. }
  2637. /*
  2638. * Interrupt handling.
  2639. */
  2640. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2641. {
  2642. struct ieee80211_hw *hw = dev_id;
  2643. struct mwl8k_priv *priv = hw->priv;
  2644. u32 status;
  2645. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2646. if (!status)
  2647. return IRQ_NONE;
  2648. if (status & MWL8K_A2H_INT_TX_DONE) {
  2649. status &= ~MWL8K_A2H_INT_TX_DONE;
  2650. tasklet_schedule(&priv->poll_tx_task);
  2651. }
  2652. if (status & MWL8K_A2H_INT_RX_READY) {
  2653. status &= ~MWL8K_A2H_INT_RX_READY;
  2654. tasklet_schedule(&priv->poll_rx_task);
  2655. }
  2656. if (status)
  2657. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2658. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2659. if (priv->hostcmd_wait != NULL)
  2660. complete(priv->hostcmd_wait);
  2661. }
  2662. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2663. if (!mutex_is_locked(&priv->fw_mutex) &&
  2664. priv->radio_on && priv->pending_tx_pkts)
  2665. mwl8k_tx_start(priv);
  2666. }
  2667. return IRQ_HANDLED;
  2668. }
  2669. static void mwl8k_tx_poll(unsigned long data)
  2670. {
  2671. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2672. struct mwl8k_priv *priv = hw->priv;
  2673. int limit;
  2674. int i;
  2675. limit = 32;
  2676. spin_lock_bh(&priv->tx_lock);
  2677. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2678. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2679. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2680. complete(priv->tx_wait);
  2681. priv->tx_wait = NULL;
  2682. }
  2683. spin_unlock_bh(&priv->tx_lock);
  2684. if (limit) {
  2685. writel(~MWL8K_A2H_INT_TX_DONE,
  2686. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2687. } else {
  2688. tasklet_schedule(&priv->poll_tx_task);
  2689. }
  2690. }
  2691. static void mwl8k_rx_poll(unsigned long data)
  2692. {
  2693. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2694. struct mwl8k_priv *priv = hw->priv;
  2695. int limit;
  2696. limit = 32;
  2697. limit -= rxq_process(hw, 0, limit);
  2698. limit -= rxq_refill(hw, 0, limit);
  2699. if (limit) {
  2700. writel(~MWL8K_A2H_INT_RX_READY,
  2701. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2702. } else {
  2703. tasklet_schedule(&priv->poll_rx_task);
  2704. }
  2705. }
  2706. /*
  2707. * Core driver operations.
  2708. */
  2709. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2710. {
  2711. struct mwl8k_priv *priv = hw->priv;
  2712. int index = skb_get_queue_mapping(skb);
  2713. int rc;
  2714. if (!priv->radio_on) {
  2715. wiphy_debug(hw->wiphy,
  2716. "dropped TX frame since radio disabled\n");
  2717. dev_kfree_skb(skb);
  2718. return NETDEV_TX_OK;
  2719. }
  2720. rc = mwl8k_txq_xmit(hw, index, skb);
  2721. return rc;
  2722. }
  2723. static int mwl8k_start(struct ieee80211_hw *hw)
  2724. {
  2725. struct mwl8k_priv *priv = hw->priv;
  2726. int rc;
  2727. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2728. IRQF_SHARED, MWL8K_NAME, hw);
  2729. if (rc) {
  2730. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  2731. return -EIO;
  2732. }
  2733. /* Enable TX reclaim and RX tasklets. */
  2734. tasklet_enable(&priv->poll_tx_task);
  2735. tasklet_enable(&priv->poll_rx_task);
  2736. /* Enable interrupts */
  2737. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2738. rc = mwl8k_fw_lock(hw);
  2739. if (!rc) {
  2740. rc = mwl8k_cmd_radio_enable(hw);
  2741. if (!priv->ap_fw) {
  2742. if (!rc)
  2743. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2744. if (!rc)
  2745. rc = mwl8k_cmd_set_pre_scan(hw);
  2746. if (!rc)
  2747. rc = mwl8k_cmd_set_post_scan(hw,
  2748. "\x00\x00\x00\x00\x00\x00");
  2749. }
  2750. if (!rc)
  2751. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2752. if (!rc)
  2753. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2754. mwl8k_fw_unlock(hw);
  2755. }
  2756. if (rc) {
  2757. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2758. free_irq(priv->pdev->irq, hw);
  2759. tasklet_disable(&priv->poll_tx_task);
  2760. tasklet_disable(&priv->poll_rx_task);
  2761. }
  2762. return rc;
  2763. }
  2764. static void mwl8k_stop(struct ieee80211_hw *hw)
  2765. {
  2766. struct mwl8k_priv *priv = hw->priv;
  2767. int i;
  2768. mwl8k_cmd_radio_disable(hw);
  2769. ieee80211_stop_queues(hw);
  2770. /* Disable interrupts */
  2771. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2772. free_irq(priv->pdev->irq, hw);
  2773. /* Stop finalize join worker */
  2774. cancel_work_sync(&priv->finalize_join_worker);
  2775. if (priv->beacon_skb != NULL)
  2776. dev_kfree_skb(priv->beacon_skb);
  2777. /* Stop TX reclaim and RX tasklets. */
  2778. tasklet_disable(&priv->poll_tx_task);
  2779. tasklet_disable(&priv->poll_rx_task);
  2780. /* Return all skbs to mac80211 */
  2781. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2782. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2783. }
  2784. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  2785. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2786. struct ieee80211_vif *vif)
  2787. {
  2788. struct mwl8k_priv *priv = hw->priv;
  2789. struct mwl8k_vif *mwl8k_vif;
  2790. u32 macids_supported;
  2791. int macid, rc;
  2792. struct mwl8k_device_info *di;
  2793. /*
  2794. * Reject interface creation if sniffer mode is active, as
  2795. * STA operation is mutually exclusive with hardware sniffer
  2796. * mode. (Sniffer mode is only used on STA firmware.)
  2797. */
  2798. if (priv->sniffer_enabled) {
  2799. wiphy_info(hw->wiphy,
  2800. "unable to create STA interface because sniffer mode is enabled\n");
  2801. return -EINVAL;
  2802. }
  2803. di = priv->device_info;
  2804. switch (vif->type) {
  2805. case NL80211_IFTYPE_AP:
  2806. if (!priv->ap_fw && di->fw_image_ap) {
  2807. /* we must load the ap fw to meet this request */
  2808. if (!list_empty(&priv->vif_list))
  2809. return -EBUSY;
  2810. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  2811. if (rc)
  2812. return rc;
  2813. }
  2814. macids_supported = priv->ap_macids_supported;
  2815. break;
  2816. case NL80211_IFTYPE_STATION:
  2817. if (priv->ap_fw && di->fw_image_sta) {
  2818. /* we must load the sta fw to meet this request */
  2819. if (!list_empty(&priv->vif_list))
  2820. return -EBUSY;
  2821. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  2822. if (rc)
  2823. return rc;
  2824. }
  2825. macids_supported = priv->sta_macids_supported;
  2826. break;
  2827. default:
  2828. return -EINVAL;
  2829. }
  2830. macid = ffs(macids_supported & ~priv->macids_used);
  2831. if (!macid--)
  2832. return -EBUSY;
  2833. /* Setup driver private area. */
  2834. mwl8k_vif = MWL8K_VIF(vif);
  2835. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2836. mwl8k_vif->vif = vif;
  2837. mwl8k_vif->macid = macid;
  2838. mwl8k_vif->seqno = 0;
  2839. /* Set the mac address. */
  2840. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2841. if (priv->ap_fw)
  2842. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2843. priv->macids_used |= 1 << mwl8k_vif->macid;
  2844. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2845. return 0;
  2846. }
  2847. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2848. struct ieee80211_vif *vif)
  2849. {
  2850. struct mwl8k_priv *priv = hw->priv;
  2851. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2852. if (priv->ap_fw)
  2853. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2854. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2855. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2856. list_del(&mwl8k_vif->list);
  2857. }
  2858. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2859. {
  2860. struct ieee80211_conf *conf = &hw->conf;
  2861. struct mwl8k_priv *priv = hw->priv;
  2862. int rc;
  2863. if (conf->flags & IEEE80211_CONF_IDLE) {
  2864. mwl8k_cmd_radio_disable(hw);
  2865. return 0;
  2866. }
  2867. rc = mwl8k_fw_lock(hw);
  2868. if (rc)
  2869. return rc;
  2870. rc = mwl8k_cmd_radio_enable(hw);
  2871. if (rc)
  2872. goto out;
  2873. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2874. if (rc)
  2875. goto out;
  2876. if (conf->power_level > 18)
  2877. conf->power_level = 18;
  2878. if (priv->ap_fw) {
  2879. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  2880. if (rc)
  2881. goto out;
  2882. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2883. if (!rc)
  2884. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2885. } else {
  2886. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2887. if (rc)
  2888. goto out;
  2889. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2890. }
  2891. out:
  2892. mwl8k_fw_unlock(hw);
  2893. return rc;
  2894. }
  2895. static void
  2896. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2897. struct ieee80211_bss_conf *info, u32 changed)
  2898. {
  2899. struct mwl8k_priv *priv = hw->priv;
  2900. u32 ap_legacy_rates;
  2901. u8 ap_mcs_rates[16];
  2902. int rc;
  2903. if (mwl8k_fw_lock(hw))
  2904. return;
  2905. /*
  2906. * No need to capture a beacon if we're no longer associated.
  2907. */
  2908. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2909. priv->capture_beacon = false;
  2910. /*
  2911. * Get the AP's legacy and MCS rates.
  2912. */
  2913. if (vif->bss_conf.assoc) {
  2914. struct ieee80211_sta *ap;
  2915. rcu_read_lock();
  2916. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2917. if (ap == NULL) {
  2918. rcu_read_unlock();
  2919. goto out;
  2920. }
  2921. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2922. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2923. } else {
  2924. ap_legacy_rates =
  2925. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2926. }
  2927. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2928. rcu_read_unlock();
  2929. }
  2930. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2931. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2932. if (rc)
  2933. goto out;
  2934. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2935. if (rc)
  2936. goto out;
  2937. }
  2938. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2939. rc = mwl8k_set_radio_preamble(hw,
  2940. vif->bss_conf.use_short_preamble);
  2941. if (rc)
  2942. goto out;
  2943. }
  2944. if (changed & BSS_CHANGED_ERP_SLOT) {
  2945. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2946. if (rc)
  2947. goto out;
  2948. }
  2949. if (vif->bss_conf.assoc &&
  2950. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2951. BSS_CHANGED_HT))) {
  2952. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2953. if (rc)
  2954. goto out;
  2955. }
  2956. if (vif->bss_conf.assoc &&
  2957. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2958. /*
  2959. * Finalize the join. Tell rx handler to process
  2960. * next beacon from our BSSID.
  2961. */
  2962. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2963. priv->capture_beacon = true;
  2964. }
  2965. out:
  2966. mwl8k_fw_unlock(hw);
  2967. }
  2968. static void
  2969. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2970. struct ieee80211_bss_conf *info, u32 changed)
  2971. {
  2972. int rc;
  2973. if (mwl8k_fw_lock(hw))
  2974. return;
  2975. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2976. rc = mwl8k_set_radio_preamble(hw,
  2977. vif->bss_conf.use_short_preamble);
  2978. if (rc)
  2979. goto out;
  2980. }
  2981. if (changed & BSS_CHANGED_BASIC_RATES) {
  2982. int idx;
  2983. int rate;
  2984. /*
  2985. * Use lowest supported basic rate for multicasts
  2986. * and management frames (such as probe responses --
  2987. * beacons will always go out at 1 Mb/s).
  2988. */
  2989. idx = ffs(vif->bss_conf.basic_rates);
  2990. if (idx)
  2991. idx--;
  2992. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2993. rate = mwl8k_rates_24[idx].hw_value;
  2994. else
  2995. rate = mwl8k_rates_50[idx].hw_value;
  2996. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2997. }
  2998. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2999. struct sk_buff *skb;
  3000. skb = ieee80211_beacon_get(hw, vif);
  3001. if (skb != NULL) {
  3002. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  3003. kfree_skb(skb);
  3004. }
  3005. }
  3006. if (changed & BSS_CHANGED_BEACON_ENABLED)
  3007. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  3008. out:
  3009. mwl8k_fw_unlock(hw);
  3010. }
  3011. static void
  3012. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3013. struct ieee80211_bss_conf *info, u32 changed)
  3014. {
  3015. struct mwl8k_priv *priv = hw->priv;
  3016. if (!priv->ap_fw)
  3017. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  3018. else
  3019. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  3020. }
  3021. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  3022. struct netdev_hw_addr_list *mc_list)
  3023. {
  3024. struct mwl8k_cmd_pkt *cmd;
  3025. /*
  3026. * Synthesize and return a command packet that programs the
  3027. * hardware multicast address filter. At this point we don't
  3028. * know whether FIF_ALLMULTI is being requested, but if it is,
  3029. * we'll end up throwing this packet away and creating a new
  3030. * one in mwl8k_configure_filter().
  3031. */
  3032. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  3033. return (unsigned long)cmd;
  3034. }
  3035. static int
  3036. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  3037. unsigned int changed_flags,
  3038. unsigned int *total_flags)
  3039. {
  3040. struct mwl8k_priv *priv = hw->priv;
  3041. /*
  3042. * Hardware sniffer mode is mutually exclusive with STA
  3043. * operation, so refuse to enable sniffer mode if a STA
  3044. * interface is active.
  3045. */
  3046. if (!list_empty(&priv->vif_list)) {
  3047. if (net_ratelimit())
  3048. wiphy_info(hw->wiphy,
  3049. "not enabling sniffer mode because STA interface is active\n");
  3050. return 0;
  3051. }
  3052. if (!priv->sniffer_enabled) {
  3053. if (mwl8k_cmd_enable_sniffer(hw, 1))
  3054. return 0;
  3055. priv->sniffer_enabled = true;
  3056. }
  3057. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  3058. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  3059. FIF_OTHER_BSS;
  3060. return 1;
  3061. }
  3062. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  3063. {
  3064. if (!list_empty(&priv->vif_list))
  3065. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  3066. return NULL;
  3067. }
  3068. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  3069. unsigned int changed_flags,
  3070. unsigned int *total_flags,
  3071. u64 multicast)
  3072. {
  3073. struct mwl8k_priv *priv = hw->priv;
  3074. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  3075. /*
  3076. * AP firmware doesn't allow fine-grained control over
  3077. * the receive filter.
  3078. */
  3079. if (priv->ap_fw) {
  3080. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3081. kfree(cmd);
  3082. return;
  3083. }
  3084. /*
  3085. * Enable hardware sniffer mode if FIF_CONTROL or
  3086. * FIF_OTHER_BSS is requested.
  3087. */
  3088. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  3089. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  3090. kfree(cmd);
  3091. return;
  3092. }
  3093. /* Clear unsupported feature flags */
  3094. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3095. if (mwl8k_fw_lock(hw)) {
  3096. kfree(cmd);
  3097. return;
  3098. }
  3099. if (priv->sniffer_enabled) {
  3100. mwl8k_cmd_enable_sniffer(hw, 0);
  3101. priv->sniffer_enabled = false;
  3102. }
  3103. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  3104. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  3105. /*
  3106. * Disable the BSS filter.
  3107. */
  3108. mwl8k_cmd_set_pre_scan(hw);
  3109. } else {
  3110. struct mwl8k_vif *mwl8k_vif;
  3111. const u8 *bssid;
  3112. /*
  3113. * Enable the BSS filter.
  3114. *
  3115. * If there is an active STA interface, use that
  3116. * interface's BSSID, otherwise use a dummy one
  3117. * (where the OUI part needs to be nonzero for
  3118. * the BSSID to be accepted by POST_SCAN).
  3119. */
  3120. mwl8k_vif = mwl8k_first_vif(priv);
  3121. if (mwl8k_vif != NULL)
  3122. bssid = mwl8k_vif->vif->bss_conf.bssid;
  3123. else
  3124. bssid = "\x01\x00\x00\x00\x00\x00";
  3125. mwl8k_cmd_set_post_scan(hw, bssid);
  3126. }
  3127. }
  3128. /*
  3129. * If FIF_ALLMULTI is being requested, throw away the command
  3130. * packet that ->prepare_multicast() built and replace it with
  3131. * a command packet that enables reception of all multicast
  3132. * packets.
  3133. */
  3134. if (*total_flags & FIF_ALLMULTI) {
  3135. kfree(cmd);
  3136. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3137. }
  3138. if (cmd != NULL) {
  3139. mwl8k_post_cmd(hw, cmd);
  3140. kfree(cmd);
  3141. }
  3142. mwl8k_fw_unlock(hw);
  3143. }
  3144. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3145. {
  3146. return mwl8k_cmd_set_rts_threshold(hw, value);
  3147. }
  3148. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3149. struct ieee80211_vif *vif,
  3150. struct ieee80211_sta *sta)
  3151. {
  3152. struct mwl8k_priv *priv = hw->priv;
  3153. if (priv->ap_fw)
  3154. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3155. else
  3156. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3157. }
  3158. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3159. struct ieee80211_vif *vif,
  3160. struct ieee80211_sta *sta)
  3161. {
  3162. struct mwl8k_priv *priv = hw->priv;
  3163. int ret;
  3164. if (!priv->ap_fw) {
  3165. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3166. if (ret >= 0) {
  3167. MWL8K_STA(sta)->peer_id = ret;
  3168. return 0;
  3169. }
  3170. return ret;
  3171. }
  3172. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3173. }
  3174. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3175. const struct ieee80211_tx_queue_params *params)
  3176. {
  3177. struct mwl8k_priv *priv = hw->priv;
  3178. int rc;
  3179. rc = mwl8k_fw_lock(hw);
  3180. if (!rc) {
  3181. BUG_ON(queue > MWL8K_TX_QUEUES - 1);
  3182. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  3183. if (!priv->wmm_enabled)
  3184. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3185. if (!rc)
  3186. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3187. params->cw_min,
  3188. params->cw_max,
  3189. params->aifs,
  3190. params->txop);
  3191. mwl8k_fw_unlock(hw);
  3192. }
  3193. return rc;
  3194. }
  3195. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3196. struct ieee80211_low_level_stats *stats)
  3197. {
  3198. return mwl8k_cmd_get_stat(hw, stats);
  3199. }
  3200. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  3201. struct survey_info *survey)
  3202. {
  3203. struct mwl8k_priv *priv = hw->priv;
  3204. struct ieee80211_conf *conf = &hw->conf;
  3205. if (idx != 0)
  3206. return -ENOENT;
  3207. survey->channel = conf->channel;
  3208. survey->filled = SURVEY_INFO_NOISE_DBM;
  3209. survey->noise = priv->noise;
  3210. return 0;
  3211. }
  3212. static int
  3213. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3214. enum ieee80211_ampdu_mlme_action action,
  3215. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3216. {
  3217. switch (action) {
  3218. case IEEE80211_AMPDU_RX_START:
  3219. case IEEE80211_AMPDU_RX_STOP:
  3220. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3221. return -ENOTSUPP;
  3222. return 0;
  3223. default:
  3224. return -ENOTSUPP;
  3225. }
  3226. }
  3227. static const struct ieee80211_ops mwl8k_ops = {
  3228. .tx = mwl8k_tx,
  3229. .start = mwl8k_start,
  3230. .stop = mwl8k_stop,
  3231. .add_interface = mwl8k_add_interface,
  3232. .remove_interface = mwl8k_remove_interface,
  3233. .config = mwl8k_config,
  3234. .bss_info_changed = mwl8k_bss_info_changed,
  3235. .prepare_multicast = mwl8k_prepare_multicast,
  3236. .configure_filter = mwl8k_configure_filter,
  3237. .set_rts_threshold = mwl8k_set_rts_threshold,
  3238. .sta_add = mwl8k_sta_add,
  3239. .sta_remove = mwl8k_sta_remove,
  3240. .conf_tx = mwl8k_conf_tx,
  3241. .get_stats = mwl8k_get_stats,
  3242. .get_survey = mwl8k_get_survey,
  3243. .ampdu_action = mwl8k_ampdu_action,
  3244. };
  3245. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3246. {
  3247. struct mwl8k_priv *priv =
  3248. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3249. struct sk_buff *skb = priv->beacon_skb;
  3250. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3251. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3252. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3253. mgmt->u.beacon.variable, len);
  3254. int dtim_period = 1;
  3255. if (tim && tim[1] >= 2)
  3256. dtim_period = tim[3];
  3257. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3258. dev_kfree_skb(skb);
  3259. priv->beacon_skb = NULL;
  3260. }
  3261. enum {
  3262. MWL8363 = 0,
  3263. MWL8687,
  3264. MWL8366,
  3265. };
  3266. #define MWL8K_8366_AP_FW_API 1
  3267. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  3268. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  3269. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3270. [MWL8363] = {
  3271. .part_name = "88w8363",
  3272. .helper_image = "mwl8k/helper_8363.fw",
  3273. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  3274. },
  3275. [MWL8687] = {
  3276. .part_name = "88w8687",
  3277. .helper_image = "mwl8k/helper_8687.fw",
  3278. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  3279. },
  3280. [MWL8366] = {
  3281. .part_name = "88w8366",
  3282. .helper_image = "mwl8k/helper_8366.fw",
  3283. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  3284. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  3285. .fw_api_ap = MWL8K_8366_AP_FW_API,
  3286. .ap_rxd_ops = &rxd_8366_ap_ops,
  3287. },
  3288. };
  3289. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3290. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3291. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3292. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3293. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3294. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3295. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  3296. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3297. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3298. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3299. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3300. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3301. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3302. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3303. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3304. { },
  3305. };
  3306. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3307. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  3308. {
  3309. int rc;
  3310. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  3311. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  3312. priv->fw_pref, priv->fw_alt);
  3313. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  3314. if (rc) {
  3315. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  3316. pci_name(priv->pdev), priv->fw_alt);
  3317. return rc;
  3318. }
  3319. return 0;
  3320. }
  3321. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  3322. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  3323. {
  3324. struct mwl8k_priv *priv = context;
  3325. struct mwl8k_device_info *di = priv->device_info;
  3326. int rc;
  3327. switch (priv->fw_state) {
  3328. case FW_STATE_INIT:
  3329. if (!fw) {
  3330. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  3331. pci_name(priv->pdev), di->helper_image);
  3332. goto fail;
  3333. }
  3334. priv->fw_helper = fw;
  3335. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  3336. true);
  3337. if (rc && priv->fw_alt) {
  3338. rc = mwl8k_request_alt_fw(priv);
  3339. if (rc)
  3340. goto fail;
  3341. priv->fw_state = FW_STATE_LOADING_ALT;
  3342. } else if (rc)
  3343. goto fail;
  3344. else
  3345. priv->fw_state = FW_STATE_LOADING_PREF;
  3346. break;
  3347. case FW_STATE_LOADING_PREF:
  3348. if (!fw) {
  3349. if (priv->fw_alt) {
  3350. rc = mwl8k_request_alt_fw(priv);
  3351. if (rc)
  3352. goto fail;
  3353. priv->fw_state = FW_STATE_LOADING_ALT;
  3354. } else
  3355. goto fail;
  3356. } else {
  3357. priv->fw_ucode = fw;
  3358. rc = mwl8k_firmware_load_success(priv);
  3359. if (rc)
  3360. goto fail;
  3361. else
  3362. complete(&priv->firmware_loading_complete);
  3363. }
  3364. break;
  3365. case FW_STATE_LOADING_ALT:
  3366. if (!fw) {
  3367. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  3368. pci_name(priv->pdev), di->helper_image);
  3369. goto fail;
  3370. }
  3371. priv->fw_ucode = fw;
  3372. rc = mwl8k_firmware_load_success(priv);
  3373. if (rc)
  3374. goto fail;
  3375. else
  3376. complete(&priv->firmware_loading_complete);
  3377. break;
  3378. default:
  3379. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  3380. MWL8K_NAME, priv->fw_state);
  3381. BUG_ON(1);
  3382. }
  3383. return;
  3384. fail:
  3385. priv->fw_state = FW_STATE_ERROR;
  3386. complete(&priv->firmware_loading_complete);
  3387. device_release_driver(&priv->pdev->dev);
  3388. mwl8k_release_firmware(priv);
  3389. }
  3390. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  3391. bool nowait)
  3392. {
  3393. struct mwl8k_priv *priv = hw->priv;
  3394. int rc;
  3395. /* Reset firmware and hardware */
  3396. mwl8k_hw_reset(priv);
  3397. /* Ask userland hotplug daemon for the device firmware */
  3398. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  3399. if (rc) {
  3400. wiphy_err(hw->wiphy, "Firmware files not found\n");
  3401. return rc;
  3402. }
  3403. if (nowait)
  3404. return rc;
  3405. /* Load firmware into hardware */
  3406. rc = mwl8k_load_firmware(hw);
  3407. if (rc)
  3408. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3409. /* Reclaim memory once firmware is successfully loaded */
  3410. mwl8k_release_firmware(priv);
  3411. return rc;
  3412. }
  3413. /* initialize hw after successfully loading a firmware image */
  3414. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  3415. {
  3416. struct mwl8k_priv *priv = hw->priv;
  3417. int rc = 0;
  3418. int i;
  3419. if (priv->ap_fw) {
  3420. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3421. if (priv->rxd_ops == NULL) {
  3422. wiphy_err(hw->wiphy,
  3423. "Driver does not have AP firmware image support for this hardware\n");
  3424. goto err_stop_firmware;
  3425. }
  3426. } else {
  3427. priv->rxd_ops = &rxd_sta_ops;
  3428. }
  3429. priv->sniffer_enabled = false;
  3430. priv->wmm_enabled = false;
  3431. priv->pending_tx_pkts = 0;
  3432. rc = mwl8k_rxq_init(hw, 0);
  3433. if (rc)
  3434. goto err_stop_firmware;
  3435. rxq_refill(hw, 0, INT_MAX);
  3436. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3437. rc = mwl8k_txq_init(hw, i);
  3438. if (rc)
  3439. goto err_free_queues;
  3440. }
  3441. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3442. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3443. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3444. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3445. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3446. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3447. IRQF_SHARED, MWL8K_NAME, hw);
  3448. if (rc) {
  3449. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3450. goto err_free_queues;
  3451. }
  3452. /*
  3453. * Temporarily enable interrupts. Initial firmware host
  3454. * commands use interrupts and avoid polling. Disable
  3455. * interrupts when done.
  3456. */
  3457. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3458. /* Get config data, mac addrs etc */
  3459. if (priv->ap_fw) {
  3460. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3461. if (!rc)
  3462. rc = mwl8k_cmd_set_hw_spec(hw);
  3463. } else {
  3464. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3465. }
  3466. if (rc) {
  3467. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  3468. goto err_free_irq;
  3469. }
  3470. /* Turn radio off */
  3471. rc = mwl8k_cmd_radio_disable(hw);
  3472. if (rc) {
  3473. wiphy_err(hw->wiphy, "Cannot disable\n");
  3474. goto err_free_irq;
  3475. }
  3476. /* Clear MAC address */
  3477. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3478. if (rc) {
  3479. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  3480. goto err_free_irq;
  3481. }
  3482. /* Disable interrupts */
  3483. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3484. free_irq(priv->pdev->irq, hw);
  3485. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  3486. priv->device_info->part_name,
  3487. priv->hw_rev, hw->wiphy->perm_addr,
  3488. priv->ap_fw ? "AP" : "STA",
  3489. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3490. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3491. return 0;
  3492. err_free_irq:
  3493. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3494. free_irq(priv->pdev->irq, hw);
  3495. err_free_queues:
  3496. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3497. mwl8k_txq_deinit(hw, i);
  3498. mwl8k_rxq_deinit(hw, 0);
  3499. err_stop_firmware:
  3500. mwl8k_hw_reset(priv);
  3501. return rc;
  3502. }
  3503. /*
  3504. * invoke mwl8k_reload_firmware to change the firmware image after the device
  3505. * has already been registered
  3506. */
  3507. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  3508. {
  3509. int i, rc = 0;
  3510. struct mwl8k_priv *priv = hw->priv;
  3511. mwl8k_stop(hw);
  3512. mwl8k_rxq_deinit(hw, 0);
  3513. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3514. mwl8k_txq_deinit(hw, i);
  3515. rc = mwl8k_init_firmware(hw, fw_image, false);
  3516. if (rc)
  3517. goto fail;
  3518. rc = mwl8k_probe_hw(hw);
  3519. if (rc)
  3520. goto fail;
  3521. rc = mwl8k_start(hw);
  3522. if (rc)
  3523. goto fail;
  3524. rc = mwl8k_config(hw, ~0);
  3525. if (rc)
  3526. goto fail;
  3527. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3528. rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
  3529. if (rc)
  3530. goto fail;
  3531. }
  3532. return rc;
  3533. fail:
  3534. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  3535. return rc;
  3536. }
  3537. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  3538. {
  3539. struct ieee80211_hw *hw = priv->hw;
  3540. int i, rc;
  3541. rc = mwl8k_load_firmware(hw);
  3542. mwl8k_release_firmware(priv);
  3543. if (rc) {
  3544. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3545. return rc;
  3546. }
  3547. /*
  3548. * Extra headroom is the size of the required DMA header
  3549. * minus the size of the smallest 802.11 frame (CTS frame).
  3550. */
  3551. hw->extra_tx_headroom =
  3552. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3553. hw->channel_change_time = 10;
  3554. hw->queues = MWL8K_TX_QUEUES;
  3555. /* Set rssi values to dBm */
  3556. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3557. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3558. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3559. priv->macids_used = 0;
  3560. INIT_LIST_HEAD(&priv->vif_list);
  3561. /* Set default radio state and preamble */
  3562. priv->radio_on = 0;
  3563. priv->radio_short_preamble = 0;
  3564. /* Finalize join worker */
  3565. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3566. /* TX reclaim and RX tasklets. */
  3567. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3568. tasklet_disable(&priv->poll_tx_task);
  3569. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3570. tasklet_disable(&priv->poll_rx_task);
  3571. /* Power management cookie */
  3572. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3573. if (priv->cookie == NULL)
  3574. return -ENOMEM;
  3575. mutex_init(&priv->fw_mutex);
  3576. priv->fw_mutex_owner = NULL;
  3577. priv->fw_mutex_depth = 0;
  3578. priv->hostcmd_wait = NULL;
  3579. spin_lock_init(&priv->tx_lock);
  3580. priv->tx_wait = NULL;
  3581. rc = mwl8k_probe_hw(hw);
  3582. if (rc)
  3583. goto err_free_cookie;
  3584. hw->wiphy->interface_modes = 0;
  3585. if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
  3586. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3587. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  3588. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3589. rc = ieee80211_register_hw(hw);
  3590. if (rc) {
  3591. wiphy_err(hw->wiphy, "Cannot register device\n");
  3592. goto err_unprobe_hw;
  3593. }
  3594. return 0;
  3595. err_unprobe_hw:
  3596. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3597. mwl8k_txq_deinit(hw, i);
  3598. mwl8k_rxq_deinit(hw, 0);
  3599. err_free_cookie:
  3600. if (priv->cookie != NULL)
  3601. pci_free_consistent(priv->pdev, 4,
  3602. priv->cookie, priv->cookie_dma);
  3603. return rc;
  3604. }
  3605. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3606. const struct pci_device_id *id)
  3607. {
  3608. static int printed_version;
  3609. struct ieee80211_hw *hw;
  3610. struct mwl8k_priv *priv;
  3611. struct mwl8k_device_info *di;
  3612. int rc;
  3613. if (!printed_version) {
  3614. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3615. printed_version = 1;
  3616. }
  3617. rc = pci_enable_device(pdev);
  3618. if (rc) {
  3619. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3620. MWL8K_NAME);
  3621. return rc;
  3622. }
  3623. rc = pci_request_regions(pdev, MWL8K_NAME);
  3624. if (rc) {
  3625. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3626. MWL8K_NAME);
  3627. goto err_disable_device;
  3628. }
  3629. pci_set_master(pdev);
  3630. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3631. if (hw == NULL) {
  3632. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3633. rc = -ENOMEM;
  3634. goto err_free_reg;
  3635. }
  3636. SET_IEEE80211_DEV(hw, &pdev->dev);
  3637. pci_set_drvdata(pdev, hw);
  3638. priv = hw->priv;
  3639. priv->hw = hw;
  3640. priv->pdev = pdev;
  3641. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3642. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3643. if (priv->sram == NULL) {
  3644. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  3645. goto err_iounmap;
  3646. }
  3647. /*
  3648. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3649. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3650. */
  3651. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3652. if (priv->regs == NULL) {
  3653. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3654. if (priv->regs == NULL) {
  3655. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  3656. goto err_iounmap;
  3657. }
  3658. }
  3659. /*
  3660. * Choose the initial fw image depending on user input. If a second
  3661. * image is available, make it the alternative image that will be
  3662. * loaded if the first one fails.
  3663. */
  3664. init_completion(&priv->firmware_loading_complete);
  3665. di = priv->device_info;
  3666. if (ap_mode_default && di->fw_image_ap) {
  3667. priv->fw_pref = di->fw_image_ap;
  3668. priv->fw_alt = di->fw_image_sta;
  3669. } else if (!ap_mode_default && di->fw_image_sta) {
  3670. priv->fw_pref = di->fw_image_sta;
  3671. priv->fw_alt = di->fw_image_ap;
  3672. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  3673. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  3674. priv->fw_pref = di->fw_image_sta;
  3675. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  3676. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  3677. priv->fw_pref = di->fw_image_ap;
  3678. }
  3679. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  3680. if (rc)
  3681. goto err_stop_firmware;
  3682. return rc;
  3683. err_stop_firmware:
  3684. mwl8k_hw_reset(priv);
  3685. err_iounmap:
  3686. if (priv->regs != NULL)
  3687. pci_iounmap(pdev, priv->regs);
  3688. if (priv->sram != NULL)
  3689. pci_iounmap(pdev, priv->sram);
  3690. pci_set_drvdata(pdev, NULL);
  3691. ieee80211_free_hw(hw);
  3692. err_free_reg:
  3693. pci_release_regions(pdev);
  3694. err_disable_device:
  3695. pci_disable_device(pdev);
  3696. return rc;
  3697. }
  3698. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3699. {
  3700. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3701. }
  3702. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3703. {
  3704. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3705. struct mwl8k_priv *priv;
  3706. int i;
  3707. if (hw == NULL)
  3708. return;
  3709. priv = hw->priv;
  3710. wait_for_completion(&priv->firmware_loading_complete);
  3711. if (priv->fw_state == FW_STATE_ERROR) {
  3712. mwl8k_hw_reset(priv);
  3713. goto unmap;
  3714. }
  3715. ieee80211_stop_queues(hw);
  3716. ieee80211_unregister_hw(hw);
  3717. /* Remove TX reclaim and RX tasklets. */
  3718. tasklet_kill(&priv->poll_tx_task);
  3719. tasklet_kill(&priv->poll_rx_task);
  3720. /* Stop hardware */
  3721. mwl8k_hw_reset(priv);
  3722. /* Return all skbs to mac80211 */
  3723. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3724. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3725. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3726. mwl8k_txq_deinit(hw, i);
  3727. mwl8k_rxq_deinit(hw, 0);
  3728. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3729. unmap:
  3730. pci_iounmap(pdev, priv->regs);
  3731. pci_iounmap(pdev, priv->sram);
  3732. pci_set_drvdata(pdev, NULL);
  3733. ieee80211_free_hw(hw);
  3734. pci_release_regions(pdev);
  3735. pci_disable_device(pdev);
  3736. }
  3737. static struct pci_driver mwl8k_driver = {
  3738. .name = MWL8K_NAME,
  3739. .id_table = mwl8k_pci_id_table,
  3740. .probe = mwl8k_probe,
  3741. .remove = __devexit_p(mwl8k_remove),
  3742. .shutdown = __devexit_p(mwl8k_shutdown),
  3743. };
  3744. static int __init mwl8k_init(void)
  3745. {
  3746. return pci_register_driver(&mwl8k_driver);
  3747. }
  3748. static void __exit mwl8k_exit(void)
  3749. {
  3750. pci_unregister_driver(&mwl8k_driver);
  3751. }
  3752. module_init(mwl8k_init);
  3753. module_exit(mwl8k_exit);
  3754. MODULE_DESCRIPTION(MWL8K_DESC);
  3755. MODULE_VERSION(MWL8K_VERSION);
  3756. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3757. MODULE_LICENSE("GPL");