phy_common.h 13 KB

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  1. #ifndef LINUX_B43_PHY_COMMON_H_
  2. #define LINUX_B43_PHY_COMMON_H_
  3. #include <linux/types.h>
  4. #include <linux/nl80211.h>
  5. struct b43_wldev;
  6. /* Complex number using 2 32-bit signed integers */
  7. struct b43_c32 { s32 i, q; };
  8. #define CORDIC_CONVERT(value) (((value) >= 0) ? \
  9. ((((value) >> 15) + 1) >> 1) : \
  10. -((((-(value)) >> 15) + 1) >> 1))
  11. /* PHY register routing bits */
  12. #define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
  13. #define B43_PHYROUTE_BASE 0x0000 /* Base registers */
  14. #define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
  15. #define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
  16. #define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
  17. /* CCK (B-PHY) registers. */
  18. #define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
  19. /* N-PHY registers. */
  20. #define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
  21. /* N-PHY BMODE registers. */
  22. #define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
  23. /* OFDM (A-PHY) registers. */
  24. #define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
  25. /* Extended G-PHY registers. */
  26. #define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
  27. /* Masks for the PHY versioning registers. */
  28. #define B43_PHYVER_ANALOG 0xF000
  29. #define B43_PHYVER_ANALOG_SHIFT 12
  30. #define B43_PHYVER_TYPE 0x0F00
  31. #define B43_PHYVER_TYPE_SHIFT 8
  32. #define B43_PHYVER_VERSION 0x00FF
  33. /**
  34. * enum b43_interference_mitigation - Interference Mitigation mode
  35. *
  36. * @B43_INTERFMODE_NONE: Disabled
  37. * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
  38. * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
  39. * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
  40. */
  41. enum b43_interference_mitigation {
  42. B43_INTERFMODE_NONE,
  43. B43_INTERFMODE_NONWLAN,
  44. B43_INTERFMODE_MANUALWLAN,
  45. B43_INTERFMODE_AUTOWLAN,
  46. };
  47. /* Antenna identifiers */
  48. enum {
  49. B43_ANTENNA0 = 0, /* Antenna 0 */
  50. B43_ANTENNA1 = 1, /* Antenna 1 */
  51. B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */
  52. B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */
  53. B43_ANTENNA2 = 4,
  54. B43_ANTENNA3 = 8,
  55. B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
  56. B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
  57. };
  58. /**
  59. * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
  60. *
  61. * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
  62. * @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
  63. */
  64. enum b43_txpwr_result {
  65. B43_TXPWR_RES_NEED_ADJUST,
  66. B43_TXPWR_RES_DONE,
  67. };
  68. /**
  69. * struct b43_phy_operations - Function pointers for PHY ops.
  70. *
  71. * @allocate: Allocate and initialise the PHY data structures.
  72. * Must not be NULL.
  73. * @free: Destroy and free the PHY data structures.
  74. * Must not be NULL.
  75. *
  76. * @prepare_structs: Prepare the PHY data structures.
  77. * The data structures allocated in @allocate are
  78. * initialized here.
  79. * Must not be NULL.
  80. * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
  81. * do some early early PHY hardware init.
  82. * Can be NULL, if not required.
  83. * @init: Initialize the PHY.
  84. * Must not be NULL.
  85. * @exit: Shutdown the PHY.
  86. * Can be NULL, if not required.
  87. *
  88. * @phy_read: Read from a PHY register.
  89. * Must not be NULL.
  90. * @phy_write: Write to a PHY register.
  91. * Must not be NULL.
  92. * @phy_maskset: Maskset a PHY register, taking shortcuts.
  93. * If it is NULL, a generic algorithm is used.
  94. * @radio_read: Read from a Radio register.
  95. * Must not be NULL.
  96. * @radio_write: Write to a Radio register.
  97. * Must not be NULL.
  98. *
  99. * @supports_hwpctl: Returns a boolean whether Hardware Power Control
  100. * is supported or not.
  101. * If NULL, hwpctl is assumed to be never supported.
  102. * @software_rfkill: Turn the radio ON or OFF.
  103. * Possible state values are
  104. * RFKILL_STATE_SOFT_BLOCKED or
  105. * RFKILL_STATE_UNBLOCKED
  106. * Must not be NULL.
  107. * @switch_analog: Turn the Analog on/off.
  108. * Must not be NULL.
  109. * @switch_channel: Switch the radio to another channel.
  110. * Must not be NULL.
  111. * @get_default_chan: Just returns the default channel number.
  112. * Must not be NULL.
  113. * @set_rx_antenna: Set the antenna used for RX.
  114. * Can be NULL, if not supported.
  115. * @interf_mitigation: Switch the Interference Mitigation mode.
  116. * Can be NULL, if not supported.
  117. *
  118. * @recalc_txpower: Recalculate the transmission power parameters.
  119. * This callback has to recalculate the TX power settings,
  120. * but does not need to write them to the hardware, yet.
  121. * Returns enum b43_txpwr_result to indicate whether the hardware
  122. * needs to be adjusted.
  123. * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
  124. * will be called later.
  125. * If the parameter "ignore_tssi" is true, the TSSI values should
  126. * be ignored and a recalculation of the power settings should be
  127. * done even if the TSSI values did not change.
  128. * This function may sleep, but should not.
  129. * Must not be NULL.
  130. * @adjust_txpower: Write the previously calculated TX power settings
  131. * (from @recalc_txpower) to the hardware.
  132. * This function may sleep.
  133. * Can be NULL, if (and ONLY if) @recalc_txpower _always_
  134. * returns B43_TXPWR_RES_DONE.
  135. *
  136. * @pwork_15sec: Periodic work. Called every 15 seconds.
  137. * Can be NULL, if not required.
  138. * @pwork_60sec: Periodic work. Called every 60 seconds.
  139. * Can be NULL, if not required.
  140. */
  141. struct b43_phy_operations {
  142. /* Initialisation */
  143. int (*allocate)(struct b43_wldev *dev);
  144. void (*free)(struct b43_wldev *dev);
  145. void (*prepare_structs)(struct b43_wldev *dev);
  146. int (*prepare_hardware)(struct b43_wldev *dev);
  147. int (*init)(struct b43_wldev *dev);
  148. void (*exit)(struct b43_wldev *dev);
  149. /* Register access */
  150. u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
  151. void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
  152. void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
  153. u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
  154. void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
  155. /* Radio */
  156. bool (*supports_hwpctl)(struct b43_wldev *dev);
  157. void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
  158. void (*switch_analog)(struct b43_wldev *dev, bool on);
  159. int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
  160. unsigned int (*get_default_chan)(struct b43_wldev *dev);
  161. void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
  162. int (*interf_mitigation)(struct b43_wldev *dev,
  163. enum b43_interference_mitigation new_mode);
  164. /* Transmission power adjustment */
  165. enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
  166. bool ignore_tssi);
  167. void (*adjust_txpower)(struct b43_wldev *dev);
  168. /* Misc */
  169. void (*pwork_15sec)(struct b43_wldev *dev);
  170. void (*pwork_60sec)(struct b43_wldev *dev);
  171. };
  172. struct b43_phy_a;
  173. struct b43_phy_g;
  174. struct b43_phy_n;
  175. struct b43_phy_lp;
  176. struct b43_phy {
  177. /* Hardware operation callbacks. */
  178. const struct b43_phy_operations *ops;
  179. /* Most hardware context information is stored in the standard-
  180. * specific data structures pointed to by the pointers below.
  181. * Only one of them is valid (the currently enabled PHY). */
  182. #ifdef CONFIG_B43_DEBUG
  183. /* No union for debug build to force NULL derefs in buggy code. */
  184. struct {
  185. #else
  186. union {
  187. #endif
  188. /* A-PHY specific information */
  189. struct b43_phy_a *a;
  190. /* G-PHY specific information */
  191. struct b43_phy_g *g;
  192. /* N-PHY specific information */
  193. struct b43_phy_n *n;
  194. /* LP-PHY specific information */
  195. struct b43_phy_lp *lp;
  196. };
  197. /* Band support flags. */
  198. bool supports_2ghz;
  199. bool supports_5ghz;
  200. /* HT info */
  201. bool is_40mhz;
  202. /* GMODE bit enabled? */
  203. bool gmode;
  204. /* Analog Type */
  205. u8 analog;
  206. /* B43_PHYTYPE_ */
  207. u8 type;
  208. /* PHY revision number. */
  209. u8 rev;
  210. /* Radio versioning */
  211. u16 radio_manuf; /* Radio manufacturer */
  212. u16 radio_ver; /* Radio version */
  213. u8 radio_rev; /* Radio revision */
  214. /* Software state of the radio */
  215. bool radio_on;
  216. /* Desired TX power level (in dBm).
  217. * This is set by the user and adjusted in b43_phy_xmitpower(). */
  218. int desired_txpower;
  219. /* Hardware Power Control enabled? */
  220. bool hardware_power_control;
  221. /* The time (in absolute jiffies) when the next TX power output
  222. * check is needed. */
  223. unsigned long next_txpwr_check_time;
  224. /* Current channel */
  225. unsigned int channel;
  226. u16 channel_freq;
  227. enum nl80211_channel_type channel_type;
  228. /* PHY TX errors counter. */
  229. atomic_t txerr_cnt;
  230. #ifdef CONFIG_B43_DEBUG
  231. /* PHY registers locked (w.r.t. firmware) */
  232. bool phy_locked;
  233. /* Radio registers locked (w.r.t. firmware) */
  234. bool radio_locked;
  235. #endif /* B43_DEBUG */
  236. };
  237. /**
  238. * b43_phy_allocate - Allocate PHY structs
  239. * Allocate the PHY data structures, based on the current dev->phy.type
  240. */
  241. int b43_phy_allocate(struct b43_wldev *dev);
  242. /**
  243. * b43_phy_free - Free PHY structs
  244. */
  245. void b43_phy_free(struct b43_wldev *dev);
  246. /**
  247. * b43_phy_init - Initialise the PHY
  248. */
  249. int b43_phy_init(struct b43_wldev *dev);
  250. /**
  251. * b43_phy_exit - Cleanup PHY
  252. */
  253. void b43_phy_exit(struct b43_wldev *dev);
  254. /**
  255. * b43_has_hardware_pctl - Hardware Power Control supported?
  256. * Returns a boolean, whether hardware power control is supported.
  257. */
  258. bool b43_has_hardware_pctl(struct b43_wldev *dev);
  259. /**
  260. * b43_phy_read - 16bit PHY register read access
  261. */
  262. u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
  263. /**
  264. * b43_phy_write - 16bit PHY register write access
  265. */
  266. void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
  267. /**
  268. * b43_phy_copy - copy contents of 16bit PHY register to another
  269. */
  270. void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
  271. /**
  272. * b43_phy_mask - Mask a PHY register with a mask
  273. */
  274. void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
  275. /**
  276. * b43_phy_set - OR a PHY register with a bitmap
  277. */
  278. void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
  279. /**
  280. * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
  281. */
  282. void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
  283. /**
  284. * b43_radio_read - 16bit Radio register read access
  285. */
  286. u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
  287. #define b43_radio_read16 b43_radio_read /* DEPRECATED */
  288. /**
  289. * b43_radio_write - 16bit Radio register write access
  290. */
  291. void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
  292. #define b43_radio_write16 b43_radio_write /* DEPRECATED */
  293. /**
  294. * b43_radio_mask - Mask a 16bit radio register with a mask
  295. */
  296. void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
  297. /**
  298. * b43_radio_set - OR a 16bit radio register with a bitmap
  299. */
  300. void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
  301. /**
  302. * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
  303. */
  304. void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
  305. /**
  306. * b43_radio_lock - Lock firmware radio register access
  307. */
  308. void b43_radio_lock(struct b43_wldev *dev);
  309. /**
  310. * b43_radio_unlock - Unlock firmware radio register access
  311. */
  312. void b43_radio_unlock(struct b43_wldev *dev);
  313. /**
  314. * b43_phy_lock - Lock firmware PHY register access
  315. */
  316. void b43_phy_lock(struct b43_wldev *dev);
  317. /**
  318. * b43_phy_unlock - Unlock firmware PHY register access
  319. */
  320. void b43_phy_unlock(struct b43_wldev *dev);
  321. /**
  322. * b43_switch_channel - Switch to another channel
  323. */
  324. int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
  325. /**
  326. * B43_DEFAULT_CHANNEL - Switch to the default channel.
  327. */
  328. #define B43_DEFAULT_CHANNEL UINT_MAX
  329. /**
  330. * b43_software_rfkill - Turn the radio ON or OFF in software.
  331. */
  332. void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
  333. /**
  334. * b43_phy_txpower_check - Check TX power output.
  335. *
  336. * Compare the current TX power output to the desired power emission
  337. * and schedule an adjustment in case it mismatches.
  338. *
  339. * @flags: OR'ed enum b43_phy_txpower_check_flags flags.
  340. * See the docs below.
  341. */
  342. void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
  343. /**
  344. * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
  345. *
  346. * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
  347. * the check now.
  348. * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
  349. * TSSI did not change.
  350. */
  351. enum b43_phy_txpower_check_flags {
  352. B43_TXPWR_IGNORE_TIME = (1 << 0),
  353. B43_TXPWR_IGNORE_TSSI = (1 << 1),
  354. };
  355. struct work_struct;
  356. void b43_phy_txpower_adjust_work(struct work_struct *work);
  357. /**
  358. * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
  359. *
  360. * @shm_offset: The SHM address to read the values from.
  361. *
  362. * Returns the average of the 4 TSSI values, or a negative error code.
  363. */
  364. int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
  365. /**
  366. * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
  367. *
  368. * It does the switching based on the PHY0 core register.
  369. * Do _not_ call this directly. Only use it as a switch_analog callback
  370. * for struct b43_phy_operations.
  371. */
  372. void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
  373. struct b43_c32 b43_cordic(int theta);
  374. #endif /* LINUX_B43_PHY_COMMON_H_ */