hw.c 6.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185
  1. /*
  2. * Copyright (c) 2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <asm/unaligned.h>
  17. #include "ath.h"
  18. #include "reg.h"
  19. #define REG_READ (common->ops->read)
  20. #define REG_WRITE (common->ops->write)
  21. /**
  22. * ath_hw_set_bssid_mask - filter out bssids we listen
  23. *
  24. * @common: the ath_common struct for the device.
  25. *
  26. * BSSID masking is a method used by AR5212 and newer hardware to inform PCU
  27. * which bits of the interface's MAC address should be looked at when trying
  28. * to decide which packets to ACK. In station mode and AP mode with a single
  29. * BSS every bit matters since we lock to only one BSS. In AP mode with
  30. * multiple BSSes (virtual interfaces) not every bit matters because hw must
  31. * accept frames for all BSSes and so we tweak some bits of our mac address
  32. * in order to have multiple BSSes.
  33. *
  34. * NOTE: This is a simple filter and does *not* filter out all
  35. * relevant frames. Some frames that are not for us might get ACKed from us
  36. * by PCU because they just match the mask.
  37. *
  38. * When handling multiple BSSes you can get the BSSID mask by computing the
  39. * set of ~ ( MAC XOR BSSID ) for all bssids we handle.
  40. *
  41. * When you do this you are essentially computing the common bits of all your
  42. * BSSes. Later it is assumed the harware will "and" (&) the BSSID mask with
  43. * the MAC address to obtain the relevant bits and compare the result with
  44. * (frame's BSSID & mask) to see if they match.
  45. *
  46. * Simple example: on your card you have have two BSSes you have created with
  47. * BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
  48. * There is another BSSID-03 but you are not part of it. For simplicity's sake,
  49. * assuming only 4 bits for a mac address and for BSSIDs you can then have:
  50. *
  51. * \
  52. * MAC: 0001 |
  53. * BSSID-01: 0100 | --> Belongs to us
  54. * BSSID-02: 1001 |
  55. * /
  56. * -------------------
  57. * BSSID-03: 0110 | --> External
  58. * -------------------
  59. *
  60. * Our bssid_mask would then be:
  61. *
  62. * On loop iteration for BSSID-01:
  63. * ~(0001 ^ 0100) -> ~(0101)
  64. * -> 1010
  65. * bssid_mask = 1010
  66. *
  67. * On loop iteration for BSSID-02:
  68. * bssid_mask &= ~(0001 ^ 1001)
  69. * bssid_mask = (1010) & ~(0001 ^ 1001)
  70. * bssid_mask = (1010) & ~(1001)
  71. * bssid_mask = (1010) & (0110)
  72. * bssid_mask = 0010
  73. *
  74. * A bssid_mask of 0010 means "only pay attention to the second least
  75. * significant bit". This is because its the only bit common
  76. * amongst the MAC and all BSSIDs we support. To findout what the real
  77. * common bit is we can simply "&" the bssid_mask now with any BSSID we have
  78. * or our MAC address (we assume the hardware uses the MAC address).
  79. *
  80. * Now, suppose there's an incoming frame for BSSID-03:
  81. *
  82. * IFRAME-01: 0110
  83. *
  84. * An easy eye-inspeciton of this already should tell you that this frame
  85. * will not pass our check. This is beacuse the bssid_mask tells the
  86. * hardware to only look at the second least significant bit and the
  87. * common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
  88. * as 1, which does not match 0.
  89. *
  90. * So with IFRAME-01 we *assume* the hardware will do:
  91. *
  92. * allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
  93. * --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
  94. * --> allow = (0010) == 0000 ? 1 : 0;
  95. * --> allow = 0
  96. *
  97. * Lets now test a frame that should work:
  98. *
  99. * IFRAME-02: 0001 (we should allow)
  100. *
  101. * allow = (0001 & 1010) == 1010
  102. *
  103. * allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
  104. * --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
  105. * --> allow = (0010) == (0010)
  106. * --> allow = 1
  107. *
  108. * Other examples:
  109. *
  110. * IFRAME-03: 0100 --> allowed
  111. * IFRAME-04: 1001 --> allowed
  112. * IFRAME-05: 1101 --> allowed but its not for us!!!
  113. *
  114. */
  115. void ath_hw_setbssidmask(struct ath_common *common)
  116. {
  117. void *ah = common->ah;
  118. REG_WRITE(ah, get_unaligned_le32(common->bssidmask), AR_BSSMSKL);
  119. REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU);
  120. }
  121. EXPORT_SYMBOL(ath_hw_setbssidmask);
  122. /**
  123. * ath_hw_cycle_counters_update - common function to update cycle counters
  124. *
  125. * @common: the ath_common struct for the device.
  126. *
  127. * This function is used to update all cycle counters in one place.
  128. * It has to be called while holding common->cc_lock!
  129. */
  130. void ath_hw_cycle_counters_update(struct ath_common *common)
  131. {
  132. u32 cycles, busy, rx, tx;
  133. void *ah = common->ah;
  134. /* freeze */
  135. REG_WRITE(ah, AR_MIBC_FMC, AR_MIBC);
  136. /* read */
  137. cycles = REG_READ(ah, AR_CCCNT);
  138. busy = REG_READ(ah, AR_RCCNT);
  139. rx = REG_READ(ah, AR_RFCNT);
  140. tx = REG_READ(ah, AR_TFCNT);
  141. /* clear */
  142. REG_WRITE(ah, 0, AR_CCCNT);
  143. REG_WRITE(ah, 0, AR_RFCNT);
  144. REG_WRITE(ah, 0, AR_RCCNT);
  145. REG_WRITE(ah, 0, AR_TFCNT);
  146. /* unfreeze */
  147. REG_WRITE(ah, 0, AR_MIBC);
  148. /* update all cycle counters here */
  149. common->cc_ani.cycles += cycles;
  150. common->cc_ani.rx_busy += busy;
  151. common->cc_ani.rx_frame += rx;
  152. common->cc_ani.tx_frame += tx;
  153. common->cc_survey.cycles += cycles;
  154. common->cc_survey.rx_busy += busy;
  155. common->cc_survey.rx_frame += rx;
  156. common->cc_survey.tx_frame += tx;
  157. }
  158. EXPORT_SYMBOL(ath_hw_cycle_counters_update);
  159. int32_t ath_hw_get_listen_time(struct ath_common *common)
  160. {
  161. struct ath_cycle_counters *cc = &common->cc_ani;
  162. int32_t listen_time;
  163. listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
  164. (common->clockrate * 1000);
  165. memset(cc, 0, sizeof(*cc));
  166. return listen_time;
  167. }
  168. EXPORT_SYMBOL(ath_hw_get_listen_time);