falcon_boards.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722
  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2007-2009 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/rtnetlink.h>
  10. #include "net_driver.h"
  11. #include "phy.h"
  12. #include "efx.h"
  13. #include "nic.h"
  14. #include "regs.h"
  15. #include "io.h"
  16. #include "workarounds.h"
  17. /* Macros for unpacking the board revision */
  18. /* The revision info is in host byte order. */
  19. #define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
  20. #define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
  21. #define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
  22. /* Board types */
  23. #define FALCON_BOARD_SFE4001 0x01
  24. #define FALCON_BOARD_SFE4002 0x02
  25. #define FALCON_BOARD_SFE4003 0x03
  26. #define FALCON_BOARD_SFN4112F 0x52
  27. /* Board temperature is about 15°C above ambient when air flow is
  28. * limited. */
  29. #define FALCON_BOARD_TEMP_BIAS 15
  30. /* SFC4000 datasheet says: 'The maximum permitted junction temperature
  31. * is 125°C; the thermal design of the environment for the SFC4000
  32. * should aim to keep this well below 100°C.' */
  33. #define FALCON_JUNC_TEMP_MAX 90
  34. /*****************************************************************************
  35. * Support for LM87 sensor chip used on several boards
  36. */
  37. #define LM87_REG_ALARMS1 0x41
  38. #define LM87_REG_ALARMS2 0x42
  39. #define LM87_IN_LIMITS(nr, _min, _max) \
  40. 0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
  41. #define LM87_AIN_LIMITS(nr, _min, _max) \
  42. 0x3B + (nr), _max, 0x1A + (nr), _min
  43. #define LM87_TEMP_INT_LIMITS(_min, _max) \
  44. 0x39, _max, 0x3A, _min
  45. #define LM87_TEMP_EXT1_LIMITS(_min, _max) \
  46. 0x37, _max, 0x38, _min
  47. #define LM87_ALARM_TEMP_INT 0x10
  48. #define LM87_ALARM_TEMP_EXT1 0x20
  49. #if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
  50. static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
  51. const u8 *reg_values)
  52. {
  53. struct falcon_board *board = falcon_board(efx);
  54. struct i2c_client *client = i2c_new_device(&board->i2c_adap, info);
  55. int rc;
  56. if (!client)
  57. return -EIO;
  58. while (*reg_values) {
  59. u8 reg = *reg_values++;
  60. u8 value = *reg_values++;
  61. rc = i2c_smbus_write_byte_data(client, reg, value);
  62. if (rc)
  63. goto err;
  64. }
  65. board->hwmon_client = client;
  66. return 0;
  67. err:
  68. i2c_unregister_device(client);
  69. return rc;
  70. }
  71. static void efx_fini_lm87(struct efx_nic *efx)
  72. {
  73. i2c_unregister_device(falcon_board(efx)->hwmon_client);
  74. }
  75. static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
  76. {
  77. struct i2c_client *client = falcon_board(efx)->hwmon_client;
  78. s32 alarms1, alarms2;
  79. /* If link is up then do not monitor temperature */
  80. if (EFX_WORKAROUND_7884(efx) && efx->link_state.up)
  81. return 0;
  82. alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
  83. alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
  84. if (alarms1 < 0)
  85. return alarms1;
  86. if (alarms2 < 0)
  87. return alarms2;
  88. alarms1 &= mask;
  89. alarms2 &= mask >> 8;
  90. if (alarms1 || alarms2) {
  91. netif_err(efx, hw, efx->net_dev,
  92. "LM87 detected a hardware failure (status %02x:%02x)"
  93. "%s%s%s\n",
  94. alarms1, alarms2,
  95. (alarms1 & LM87_ALARM_TEMP_INT) ?
  96. "; board is overheating" : "",
  97. (alarms1 & LM87_ALARM_TEMP_EXT1) ?
  98. "; controller is overheating" : "",
  99. (alarms1 & ~(LM87_ALARM_TEMP_INT | LM87_ALARM_TEMP_EXT1)
  100. || alarms2) ?
  101. "; electrical fault" : "");
  102. return -ERANGE;
  103. }
  104. return 0;
  105. }
  106. #else /* !CONFIG_SENSORS_LM87 */
  107. static inline int
  108. efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
  109. const u8 *reg_values)
  110. {
  111. return 0;
  112. }
  113. static inline void efx_fini_lm87(struct efx_nic *efx)
  114. {
  115. }
  116. static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
  117. {
  118. return 0;
  119. }
  120. #endif /* CONFIG_SENSORS_LM87 */
  121. /*****************************************************************************
  122. * Support for the SFE4001 NIC.
  123. *
  124. * The SFE4001 does not power-up fully at reset due to its high power
  125. * consumption. We control its power via a PCA9539 I/O expander.
  126. * It also has a MAX6647 temperature monitor which we expose to
  127. * the lm90 driver.
  128. *
  129. * This also provides minimal support for reflashing the PHY, which is
  130. * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
  131. * On SFE4001 rev A2 and later this is connected to the 3V3X output of
  132. * the IO-expander.
  133. * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
  134. * exclusive with the network device being open.
  135. */
  136. /**************************************************************************
  137. * Support for I2C IO Expander device on SFE4001
  138. */
  139. #define PCA9539 0x74
  140. #define P0_IN 0x00
  141. #define P0_OUT 0x02
  142. #define P0_INVERT 0x04
  143. #define P0_CONFIG 0x06
  144. #define P0_EN_1V0X_LBN 0
  145. #define P0_EN_1V0X_WIDTH 1
  146. #define P0_EN_1V2_LBN 1
  147. #define P0_EN_1V2_WIDTH 1
  148. #define P0_EN_2V5_LBN 2
  149. #define P0_EN_2V5_WIDTH 1
  150. #define P0_EN_3V3X_LBN 3
  151. #define P0_EN_3V3X_WIDTH 1
  152. #define P0_EN_5V_LBN 4
  153. #define P0_EN_5V_WIDTH 1
  154. #define P0_SHORTEN_JTAG_LBN 5
  155. #define P0_SHORTEN_JTAG_WIDTH 1
  156. #define P0_X_TRST_LBN 6
  157. #define P0_X_TRST_WIDTH 1
  158. #define P0_DSP_RESET_LBN 7
  159. #define P0_DSP_RESET_WIDTH 1
  160. #define P1_IN 0x01
  161. #define P1_OUT 0x03
  162. #define P1_INVERT 0x05
  163. #define P1_CONFIG 0x07
  164. #define P1_AFE_PWD_LBN 0
  165. #define P1_AFE_PWD_WIDTH 1
  166. #define P1_DSP_PWD25_LBN 1
  167. #define P1_DSP_PWD25_WIDTH 1
  168. #define P1_RESERVED_LBN 2
  169. #define P1_RESERVED_WIDTH 2
  170. #define P1_SPARE_LBN 4
  171. #define P1_SPARE_WIDTH 4
  172. /* Temperature Sensor */
  173. #define MAX664X_REG_RSL 0x02
  174. #define MAX664X_REG_WLHO 0x0B
  175. static void sfe4001_poweroff(struct efx_nic *efx)
  176. {
  177. struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
  178. struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
  179. /* Turn off all power rails and disable outputs */
  180. i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
  181. i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
  182. i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
  183. /* Clear any over-temperature alert */
  184. i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  185. }
  186. static int sfe4001_poweron(struct efx_nic *efx)
  187. {
  188. struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
  189. struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
  190. unsigned int i, j;
  191. int rc;
  192. u8 out;
  193. /* Clear any previous over-temperature alert */
  194. rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  195. if (rc < 0)
  196. return rc;
  197. /* Enable port 0 and port 1 outputs on IO expander */
  198. rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
  199. if (rc)
  200. return rc;
  201. rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
  202. 0xff & ~(1 << P1_SPARE_LBN));
  203. if (rc)
  204. goto fail_on;
  205. /* If PHY power is on, turn it all off and wait 1 second to
  206. * ensure a full reset.
  207. */
  208. rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
  209. if (rc < 0)
  210. goto fail_on;
  211. out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
  212. (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
  213. (0 << P0_EN_1V0X_LBN));
  214. if (rc != out) {
  215. netif_info(efx, hw, efx->net_dev, "power-cycling PHY\n");
  216. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  217. if (rc)
  218. goto fail_on;
  219. schedule_timeout_uninterruptible(HZ);
  220. }
  221. for (i = 0; i < 20; ++i) {
  222. /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
  223. out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
  224. (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
  225. (1 << P0_X_TRST_LBN));
  226. if (efx->phy_mode & PHY_MODE_SPECIAL)
  227. out |= 1 << P0_EN_3V3X_LBN;
  228. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  229. if (rc)
  230. goto fail_on;
  231. msleep(10);
  232. /* Turn on 1V power rail */
  233. out &= ~(1 << P0_EN_1V0X_LBN);
  234. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  235. if (rc)
  236. goto fail_on;
  237. netif_info(efx, hw, efx->net_dev,
  238. "waiting for DSP boot (attempt %d)...\n", i);
  239. /* In flash config mode, DSP does not turn on AFE, so
  240. * just wait 1 second.
  241. */
  242. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  243. schedule_timeout_uninterruptible(HZ);
  244. return 0;
  245. }
  246. for (j = 0; j < 10; ++j) {
  247. msleep(100);
  248. /* Check DSP has asserted AFE power line */
  249. rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
  250. if (rc < 0)
  251. goto fail_on;
  252. if (rc & (1 << P1_AFE_PWD_LBN))
  253. return 0;
  254. }
  255. }
  256. netif_info(efx, hw, efx->net_dev, "timed out waiting for DSP boot\n");
  257. rc = -ETIMEDOUT;
  258. fail_on:
  259. sfe4001_poweroff(efx);
  260. return rc;
  261. }
  262. static ssize_t show_phy_flash_cfg(struct device *dev,
  263. struct device_attribute *attr, char *buf)
  264. {
  265. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  266. return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
  267. }
  268. static ssize_t set_phy_flash_cfg(struct device *dev,
  269. struct device_attribute *attr,
  270. const char *buf, size_t count)
  271. {
  272. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  273. enum efx_phy_mode old_mode, new_mode;
  274. int err;
  275. rtnl_lock();
  276. old_mode = efx->phy_mode;
  277. if (count == 0 || *buf == '0')
  278. new_mode = old_mode & ~PHY_MODE_SPECIAL;
  279. else
  280. new_mode = PHY_MODE_SPECIAL;
  281. if (old_mode == new_mode) {
  282. err = 0;
  283. } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
  284. err = -EBUSY;
  285. } else {
  286. /* Reset the PHY, reconfigure the MAC and enable/disable
  287. * MAC stats accordingly. */
  288. efx->phy_mode = new_mode;
  289. if (new_mode & PHY_MODE_SPECIAL)
  290. falcon_stop_nic_stats(efx);
  291. err = sfe4001_poweron(efx);
  292. if (!err)
  293. err = efx_reconfigure_port(efx);
  294. if (!(new_mode & PHY_MODE_SPECIAL))
  295. falcon_start_nic_stats(efx);
  296. }
  297. rtnl_unlock();
  298. return err ? err : count;
  299. }
  300. static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
  301. static void sfe4001_fini(struct efx_nic *efx)
  302. {
  303. struct falcon_board *board = falcon_board(efx);
  304. netif_info(efx, drv, efx->net_dev, "%s\n", __func__);
  305. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  306. sfe4001_poweroff(efx);
  307. i2c_unregister_device(board->ioexp_client);
  308. i2c_unregister_device(board->hwmon_client);
  309. }
  310. static int sfe4001_check_hw(struct efx_nic *efx)
  311. {
  312. s32 status;
  313. /* If XAUI link is up then do not monitor */
  314. if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
  315. return 0;
  316. /* Check the powered status of the PHY. Lack of power implies that
  317. * the MAX6647 has shut down power to it, probably due to a temp.
  318. * alarm. Reading the power status rather than the MAX6647 status
  319. * directly because the later is read-to-clear and would thus
  320. * start to power up the PHY again when polled, causing us to blip
  321. * the power undesirably.
  322. * We know we can read from the IO expander because we did
  323. * it during power-on. Assume failure now is bad news. */
  324. status = i2c_smbus_read_byte_data(falcon_board(efx)->ioexp_client, P1_IN);
  325. if (status >= 0 &&
  326. (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
  327. return 0;
  328. /* Use board power control, not PHY power control */
  329. sfe4001_poweroff(efx);
  330. efx->phy_mode = PHY_MODE_OFF;
  331. return (status < 0) ? -EIO : -ERANGE;
  332. }
  333. static struct i2c_board_info sfe4001_hwmon_info = {
  334. I2C_BOARD_INFO("max6647", 0x4e),
  335. };
  336. /* This board uses an I2C expander to provider power to the PHY, which needs to
  337. * be turned on before the PHY can be used.
  338. * Context: Process context, rtnl lock held
  339. */
  340. static int sfe4001_init(struct efx_nic *efx)
  341. {
  342. struct falcon_board *board = falcon_board(efx);
  343. int rc;
  344. #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
  345. board->hwmon_client =
  346. i2c_new_device(&board->i2c_adap, &sfe4001_hwmon_info);
  347. #else
  348. board->hwmon_client =
  349. i2c_new_dummy(&board->i2c_adap, sfe4001_hwmon_info.addr);
  350. #endif
  351. if (!board->hwmon_client)
  352. return -EIO;
  353. /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
  354. rc = i2c_smbus_write_byte_data(board->hwmon_client,
  355. MAX664X_REG_WLHO, 90);
  356. if (rc)
  357. goto fail_hwmon;
  358. board->ioexp_client = i2c_new_dummy(&board->i2c_adap, PCA9539);
  359. if (!board->ioexp_client) {
  360. rc = -EIO;
  361. goto fail_hwmon;
  362. }
  363. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  364. /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
  365. * will fail. */
  366. falcon_stop_nic_stats(efx);
  367. }
  368. rc = sfe4001_poweron(efx);
  369. if (rc)
  370. goto fail_ioexp;
  371. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  372. if (rc)
  373. goto fail_on;
  374. netif_info(efx, hw, efx->net_dev, "PHY is powered on\n");
  375. return 0;
  376. fail_on:
  377. sfe4001_poweroff(efx);
  378. fail_ioexp:
  379. i2c_unregister_device(board->ioexp_client);
  380. fail_hwmon:
  381. i2c_unregister_device(board->hwmon_client);
  382. return rc;
  383. }
  384. /*****************************************************************************
  385. * Support for the SFE4002
  386. *
  387. */
  388. static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
  389. static const u8 sfe4002_lm87_regs[] = {
  390. LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
  391. LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
  392. LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
  393. LM87_IN_LIMITS(3, 0xac, 0xd4), /* 5V: 5.0V +/- 10% */
  394. LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
  395. LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
  396. LM87_AIN_LIMITS(0, 0x98, 0xbb), /* AIN1: 1.66V +/- 10% */
  397. LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
  398. LM87_TEMP_INT_LIMITS(0, 80 + FALCON_BOARD_TEMP_BIAS),
  399. LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
  400. 0
  401. };
  402. static struct i2c_board_info sfe4002_hwmon_info = {
  403. I2C_BOARD_INFO("lm87", 0x2e),
  404. .platform_data = &sfe4002_lm87_channel,
  405. };
  406. /****************************************************************************/
  407. /* LED allocations. Note that on rev A0 boards the schematic and the reality
  408. * differ: red and green are swapped. Below is the fixed (A1) layout (there
  409. * are only 3 A0 boards in existence, so no real reason to make this
  410. * conditional).
  411. */
  412. #define SFE4002_FAULT_LED (2) /* Red */
  413. #define SFE4002_RX_LED (0) /* Green */
  414. #define SFE4002_TX_LED (1) /* Amber */
  415. static void sfe4002_init_phy(struct efx_nic *efx)
  416. {
  417. /* Set the TX and RX LEDs to reflect status and activity, and the
  418. * fault LED off */
  419. falcon_qt202x_set_led(efx, SFE4002_TX_LED,
  420. QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
  421. falcon_qt202x_set_led(efx, SFE4002_RX_LED,
  422. QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
  423. falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
  424. }
  425. static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  426. {
  427. falcon_qt202x_set_led(
  428. efx, SFE4002_FAULT_LED,
  429. (mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
  430. }
  431. static int sfe4002_check_hw(struct efx_nic *efx)
  432. {
  433. struct falcon_board *board = falcon_board(efx);
  434. /* A0 board rev. 4002s report a temperature fault the whole time
  435. * (bad sensor) so we mask it out. */
  436. unsigned alarm_mask =
  437. (board->major == 0 && board->minor == 0) ?
  438. ~LM87_ALARM_TEMP_EXT1 : ~0;
  439. return efx_check_lm87(efx, alarm_mask);
  440. }
  441. static int sfe4002_init(struct efx_nic *efx)
  442. {
  443. return efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
  444. }
  445. /*****************************************************************************
  446. * Support for the SFN4112F
  447. *
  448. */
  449. static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
  450. static const u8 sfn4112f_lm87_regs[] = {
  451. LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
  452. LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
  453. LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
  454. LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
  455. LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
  456. LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
  457. LM87_TEMP_INT_LIMITS(0, 60 + FALCON_BOARD_TEMP_BIAS),
  458. LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
  459. 0
  460. };
  461. static struct i2c_board_info sfn4112f_hwmon_info = {
  462. I2C_BOARD_INFO("lm87", 0x2e),
  463. .platform_data = &sfn4112f_lm87_channel,
  464. };
  465. #define SFN4112F_ACT_LED 0
  466. #define SFN4112F_LINK_LED 1
  467. static void sfn4112f_init_phy(struct efx_nic *efx)
  468. {
  469. falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
  470. QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
  471. falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
  472. QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
  473. }
  474. static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  475. {
  476. int reg;
  477. switch (mode) {
  478. case EFX_LED_OFF:
  479. reg = QUAKE_LED_OFF;
  480. break;
  481. case EFX_LED_ON:
  482. reg = QUAKE_LED_ON;
  483. break;
  484. default:
  485. reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
  486. break;
  487. }
  488. falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
  489. }
  490. static int sfn4112f_check_hw(struct efx_nic *efx)
  491. {
  492. /* Mask out unused sensors */
  493. return efx_check_lm87(efx, ~0x48);
  494. }
  495. static int sfn4112f_init(struct efx_nic *efx)
  496. {
  497. return efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
  498. }
  499. /*****************************************************************************
  500. * Support for the SFE4003
  501. *
  502. */
  503. static u8 sfe4003_lm87_channel = 0x03; /* use AIN not FAN inputs */
  504. static const u8 sfe4003_lm87_regs[] = {
  505. LM87_IN_LIMITS(0, 0x67, 0x7f), /* 2.5V: 1.5V +/- 10% */
  506. LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
  507. LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
  508. LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
  509. LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
  510. LM87_TEMP_INT_LIMITS(0, 70 + FALCON_BOARD_TEMP_BIAS),
  511. 0
  512. };
  513. static struct i2c_board_info sfe4003_hwmon_info = {
  514. I2C_BOARD_INFO("lm87", 0x2e),
  515. .platform_data = &sfe4003_lm87_channel,
  516. };
  517. /* Board-specific LED info. */
  518. #define SFE4003_RED_LED_GPIO 11
  519. #define SFE4003_LED_ON 1
  520. #define SFE4003_LED_OFF 0
  521. static void sfe4003_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  522. {
  523. struct falcon_board *board = falcon_board(efx);
  524. /* The LEDs were not wired to GPIOs before A3 */
  525. if (board->minor < 3 && board->major == 0)
  526. return;
  527. falcon_txc_set_gpio_val(
  528. efx, SFE4003_RED_LED_GPIO,
  529. (mode == EFX_LED_ON) ? SFE4003_LED_ON : SFE4003_LED_OFF);
  530. }
  531. static void sfe4003_init_phy(struct efx_nic *efx)
  532. {
  533. struct falcon_board *board = falcon_board(efx);
  534. /* The LEDs were not wired to GPIOs before A3 */
  535. if (board->minor < 3 && board->major == 0)
  536. return;
  537. falcon_txc_set_gpio_dir(efx, SFE4003_RED_LED_GPIO, TXC_GPIO_DIR_OUTPUT);
  538. falcon_txc_set_gpio_val(efx, SFE4003_RED_LED_GPIO, SFE4003_LED_OFF);
  539. }
  540. static int sfe4003_check_hw(struct efx_nic *efx)
  541. {
  542. struct falcon_board *board = falcon_board(efx);
  543. /* A0/A1/A2 board rev. 4003s report a temperature fault the whole time
  544. * (bad sensor) so we mask it out. */
  545. unsigned alarm_mask =
  546. (board->major == 0 && board->minor <= 2) ?
  547. ~LM87_ALARM_TEMP_EXT1 : ~0;
  548. return efx_check_lm87(efx, alarm_mask);
  549. }
  550. static int sfe4003_init(struct efx_nic *efx)
  551. {
  552. return efx_init_lm87(efx, &sfe4003_hwmon_info, sfe4003_lm87_regs);
  553. }
  554. static const struct falcon_board_type board_types[] = {
  555. {
  556. .id = FALCON_BOARD_SFE4001,
  557. .ref_model = "SFE4001",
  558. .gen_type = "10GBASE-T adapter",
  559. .init = sfe4001_init,
  560. .init_phy = efx_port_dummy_op_void,
  561. .fini = sfe4001_fini,
  562. .set_id_led = tenxpress_set_id_led,
  563. .monitor = sfe4001_check_hw,
  564. },
  565. {
  566. .id = FALCON_BOARD_SFE4002,
  567. .ref_model = "SFE4002",
  568. .gen_type = "XFP adapter",
  569. .init = sfe4002_init,
  570. .init_phy = sfe4002_init_phy,
  571. .fini = efx_fini_lm87,
  572. .set_id_led = sfe4002_set_id_led,
  573. .monitor = sfe4002_check_hw,
  574. },
  575. {
  576. .id = FALCON_BOARD_SFE4003,
  577. .ref_model = "SFE4003",
  578. .gen_type = "10GBASE-CX4 adapter",
  579. .init = sfe4003_init,
  580. .init_phy = sfe4003_init_phy,
  581. .fini = efx_fini_lm87,
  582. .set_id_led = sfe4003_set_id_led,
  583. .monitor = sfe4003_check_hw,
  584. },
  585. {
  586. .id = FALCON_BOARD_SFN4112F,
  587. .ref_model = "SFN4112F",
  588. .gen_type = "SFP+ adapter",
  589. .init = sfn4112f_init,
  590. .init_phy = sfn4112f_init_phy,
  591. .fini = efx_fini_lm87,
  592. .set_id_led = sfn4112f_set_id_led,
  593. .monitor = sfn4112f_check_hw,
  594. },
  595. };
  596. int falcon_probe_board(struct efx_nic *efx, u16 revision_info)
  597. {
  598. struct falcon_board *board = falcon_board(efx);
  599. u8 type_id = FALCON_BOARD_TYPE(revision_info);
  600. int i;
  601. board->major = FALCON_BOARD_MAJOR(revision_info);
  602. board->minor = FALCON_BOARD_MINOR(revision_info);
  603. for (i = 0; i < ARRAY_SIZE(board_types); i++)
  604. if (board_types[i].id == type_id)
  605. board->type = &board_types[i];
  606. if (board->type) {
  607. netif_info(efx, probe, efx->net_dev, "board is %s rev %c%d\n",
  608. (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
  609. ? board->type->ref_model : board->type->gen_type,
  610. 'A' + board->major, board->minor);
  611. return 0;
  612. } else {
  613. netif_err(efx, probe, efx->net_dev, "unknown board type %d\n",
  614. type_id);
  615. return -ENODEV;
  616. }
  617. }