qlcnic_init.c 42 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808
  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/netdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/slab.h>
  27. #include <linux/if_vlan.h>
  28. #include "qlcnic.h"
  29. struct crb_addr_pair {
  30. u32 addr;
  31. u32 data;
  32. };
  33. #define QLCNIC_MAX_CRB_XFORM 60
  34. static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  35. #define crb_addr_transform(name) \
  36. (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  37. QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  38. #define QLCNIC_ADDR_ERROR (0xffffffff)
  39. static void
  40. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  41. struct qlcnic_host_rds_ring *rds_ring);
  42. static int
  43. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
  44. static void crb_addr_transform_setup(void)
  45. {
  46. crb_addr_transform(XDMA);
  47. crb_addr_transform(TIMR);
  48. crb_addr_transform(SRE);
  49. crb_addr_transform(SQN3);
  50. crb_addr_transform(SQN2);
  51. crb_addr_transform(SQN1);
  52. crb_addr_transform(SQN0);
  53. crb_addr_transform(SQS3);
  54. crb_addr_transform(SQS2);
  55. crb_addr_transform(SQS1);
  56. crb_addr_transform(SQS0);
  57. crb_addr_transform(RPMX7);
  58. crb_addr_transform(RPMX6);
  59. crb_addr_transform(RPMX5);
  60. crb_addr_transform(RPMX4);
  61. crb_addr_transform(RPMX3);
  62. crb_addr_transform(RPMX2);
  63. crb_addr_transform(RPMX1);
  64. crb_addr_transform(RPMX0);
  65. crb_addr_transform(ROMUSB);
  66. crb_addr_transform(SN);
  67. crb_addr_transform(QMN);
  68. crb_addr_transform(QMS);
  69. crb_addr_transform(PGNI);
  70. crb_addr_transform(PGND);
  71. crb_addr_transform(PGN3);
  72. crb_addr_transform(PGN2);
  73. crb_addr_transform(PGN1);
  74. crb_addr_transform(PGN0);
  75. crb_addr_transform(PGSI);
  76. crb_addr_transform(PGSD);
  77. crb_addr_transform(PGS3);
  78. crb_addr_transform(PGS2);
  79. crb_addr_transform(PGS1);
  80. crb_addr_transform(PGS0);
  81. crb_addr_transform(PS);
  82. crb_addr_transform(PH);
  83. crb_addr_transform(NIU);
  84. crb_addr_transform(I2Q);
  85. crb_addr_transform(EG);
  86. crb_addr_transform(MN);
  87. crb_addr_transform(MS);
  88. crb_addr_transform(CAS2);
  89. crb_addr_transform(CAS1);
  90. crb_addr_transform(CAS0);
  91. crb_addr_transform(CAM);
  92. crb_addr_transform(C2C1);
  93. crb_addr_transform(C2C0);
  94. crb_addr_transform(SMB);
  95. crb_addr_transform(OCM0);
  96. crb_addr_transform(I2C0);
  97. }
  98. void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  99. {
  100. struct qlcnic_recv_context *recv_ctx;
  101. struct qlcnic_host_rds_ring *rds_ring;
  102. struct qlcnic_rx_buffer *rx_buf;
  103. int i, ring;
  104. recv_ctx = &adapter->recv_ctx;
  105. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  106. rds_ring = &recv_ctx->rds_rings[ring];
  107. for (i = 0; i < rds_ring->num_desc; ++i) {
  108. rx_buf = &(rds_ring->rx_buf_arr[i]);
  109. if (rx_buf->skb == NULL)
  110. continue;
  111. pci_unmap_single(adapter->pdev,
  112. rx_buf->dma,
  113. rds_ring->dma_size,
  114. PCI_DMA_FROMDEVICE);
  115. dev_kfree_skb_any(rx_buf->skb);
  116. }
  117. }
  118. }
  119. void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
  120. {
  121. struct qlcnic_recv_context *recv_ctx;
  122. struct qlcnic_host_rds_ring *rds_ring;
  123. struct qlcnic_rx_buffer *rx_buf;
  124. int i, ring;
  125. recv_ctx = &adapter->recv_ctx;
  126. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  127. rds_ring = &recv_ctx->rds_rings[ring];
  128. INIT_LIST_HEAD(&rds_ring->free_list);
  129. rx_buf = rds_ring->rx_buf_arr;
  130. for (i = 0; i < rds_ring->num_desc; i++) {
  131. list_add_tail(&rx_buf->list,
  132. &rds_ring->free_list);
  133. rx_buf++;
  134. }
  135. }
  136. }
  137. void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
  138. {
  139. struct qlcnic_cmd_buffer *cmd_buf;
  140. struct qlcnic_skb_frag *buffrag;
  141. int i, j;
  142. struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
  143. cmd_buf = tx_ring->cmd_buf_arr;
  144. for (i = 0; i < tx_ring->num_desc; i++) {
  145. buffrag = cmd_buf->frag_array;
  146. if (buffrag->dma) {
  147. pci_unmap_single(adapter->pdev, buffrag->dma,
  148. buffrag->length, PCI_DMA_TODEVICE);
  149. buffrag->dma = 0ULL;
  150. }
  151. for (j = 0; j < cmd_buf->frag_count; j++) {
  152. buffrag++;
  153. if (buffrag->dma) {
  154. pci_unmap_page(adapter->pdev, buffrag->dma,
  155. buffrag->length,
  156. PCI_DMA_TODEVICE);
  157. buffrag->dma = 0ULL;
  158. }
  159. }
  160. if (cmd_buf->skb) {
  161. dev_kfree_skb_any(cmd_buf->skb);
  162. cmd_buf->skb = NULL;
  163. }
  164. cmd_buf++;
  165. }
  166. }
  167. void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
  168. {
  169. struct qlcnic_recv_context *recv_ctx;
  170. struct qlcnic_host_rds_ring *rds_ring;
  171. struct qlcnic_host_tx_ring *tx_ring;
  172. int ring;
  173. recv_ctx = &adapter->recv_ctx;
  174. if (recv_ctx->rds_rings == NULL)
  175. goto skip_rds;
  176. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  177. rds_ring = &recv_ctx->rds_rings[ring];
  178. vfree(rds_ring->rx_buf_arr);
  179. rds_ring->rx_buf_arr = NULL;
  180. }
  181. kfree(recv_ctx->rds_rings);
  182. skip_rds:
  183. if (adapter->tx_ring == NULL)
  184. return;
  185. tx_ring = adapter->tx_ring;
  186. vfree(tx_ring->cmd_buf_arr);
  187. tx_ring->cmd_buf_arr = NULL;
  188. kfree(adapter->tx_ring);
  189. adapter->tx_ring = NULL;
  190. }
  191. int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
  192. {
  193. struct qlcnic_recv_context *recv_ctx;
  194. struct qlcnic_host_rds_ring *rds_ring;
  195. struct qlcnic_host_sds_ring *sds_ring;
  196. struct qlcnic_host_tx_ring *tx_ring;
  197. struct qlcnic_rx_buffer *rx_buf;
  198. int ring, i, size;
  199. struct qlcnic_cmd_buffer *cmd_buf_arr;
  200. struct net_device *netdev = adapter->netdev;
  201. size = sizeof(struct qlcnic_host_tx_ring);
  202. tx_ring = kzalloc(size, GFP_KERNEL);
  203. if (tx_ring == NULL) {
  204. dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
  205. return -ENOMEM;
  206. }
  207. adapter->tx_ring = tx_ring;
  208. tx_ring->num_desc = adapter->num_txd;
  209. tx_ring->txq = netdev_get_tx_queue(netdev, 0);
  210. cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
  211. if (cmd_buf_arr == NULL) {
  212. dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
  213. goto err_out;
  214. }
  215. memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
  216. tx_ring->cmd_buf_arr = cmd_buf_arr;
  217. recv_ctx = &adapter->recv_ctx;
  218. size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
  219. rds_ring = kzalloc(size, GFP_KERNEL);
  220. if (rds_ring == NULL) {
  221. dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
  222. goto err_out;
  223. }
  224. recv_ctx->rds_rings = rds_ring;
  225. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  226. rds_ring = &recv_ctx->rds_rings[ring];
  227. switch (ring) {
  228. case RCV_RING_NORMAL:
  229. rds_ring->num_desc = adapter->num_rxd;
  230. rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
  231. rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
  232. break;
  233. case RCV_RING_JUMBO:
  234. rds_ring->num_desc = adapter->num_jumbo_rxd;
  235. rds_ring->dma_size =
  236. QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
  237. if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  238. rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
  239. rds_ring->skb_size =
  240. rds_ring->dma_size + NET_IP_ALIGN;
  241. break;
  242. }
  243. rds_ring->rx_buf_arr = (struct qlcnic_rx_buffer *)
  244. vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
  245. if (rds_ring->rx_buf_arr == NULL) {
  246. dev_err(&netdev->dev, "Failed to allocate "
  247. "rx buffer ring %d\n", ring);
  248. goto err_out;
  249. }
  250. memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
  251. INIT_LIST_HEAD(&rds_ring->free_list);
  252. /*
  253. * Now go through all of them, set reference handles
  254. * and put them in the queues.
  255. */
  256. rx_buf = rds_ring->rx_buf_arr;
  257. for (i = 0; i < rds_ring->num_desc; i++) {
  258. list_add_tail(&rx_buf->list,
  259. &rds_ring->free_list);
  260. rx_buf->ref_handle = i;
  261. rx_buf++;
  262. }
  263. spin_lock_init(&rds_ring->lock);
  264. }
  265. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  266. sds_ring = &recv_ctx->sds_rings[ring];
  267. sds_ring->irq = adapter->msix_entries[ring].vector;
  268. sds_ring->adapter = adapter;
  269. sds_ring->num_desc = adapter->num_rxd;
  270. for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
  271. INIT_LIST_HEAD(&sds_ring->free_list[i]);
  272. }
  273. return 0;
  274. err_out:
  275. qlcnic_free_sw_resources(adapter);
  276. return -ENOMEM;
  277. }
  278. /*
  279. * Utility to translate from internal Phantom CRB address
  280. * to external PCI CRB address.
  281. */
  282. static u32 qlcnic_decode_crb_addr(u32 addr)
  283. {
  284. int i;
  285. u32 base_addr, offset, pci_base;
  286. crb_addr_transform_setup();
  287. pci_base = QLCNIC_ADDR_ERROR;
  288. base_addr = addr & 0xfff00000;
  289. offset = addr & 0x000fffff;
  290. for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
  291. if (crb_addr_xform[i] == base_addr) {
  292. pci_base = i << 20;
  293. break;
  294. }
  295. }
  296. if (pci_base == QLCNIC_ADDR_ERROR)
  297. return pci_base;
  298. else
  299. return pci_base + offset;
  300. }
  301. #define QLCNIC_MAX_ROM_WAIT_USEC 100
  302. static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
  303. {
  304. long timeout = 0;
  305. long done = 0;
  306. cond_resched();
  307. while (done == 0) {
  308. done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
  309. done &= 2;
  310. if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
  311. dev_err(&adapter->pdev->dev,
  312. "Timeout reached waiting for rom done");
  313. return -EIO;
  314. }
  315. udelay(1);
  316. }
  317. return 0;
  318. }
  319. static int do_rom_fast_read(struct qlcnic_adapter *adapter,
  320. int addr, int *valp)
  321. {
  322. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
  323. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  324. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
  325. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  326. if (qlcnic_wait_rom_done(adapter)) {
  327. dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
  328. return -EIO;
  329. }
  330. /* reset abyte_cnt and dummy_byte_cnt */
  331. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
  332. udelay(10);
  333. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  334. *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
  335. return 0;
  336. }
  337. static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  338. u8 *bytes, size_t size)
  339. {
  340. int addridx;
  341. int ret = 0;
  342. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  343. int v;
  344. ret = do_rom_fast_read(adapter, addridx, &v);
  345. if (ret != 0)
  346. break;
  347. *(__le32 *)bytes = cpu_to_le32(v);
  348. bytes += 4;
  349. }
  350. return ret;
  351. }
  352. int
  353. qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  354. u8 *bytes, size_t size)
  355. {
  356. int ret;
  357. ret = qlcnic_rom_lock(adapter);
  358. if (ret < 0)
  359. return ret;
  360. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  361. qlcnic_rom_unlock(adapter);
  362. return ret;
  363. }
  364. int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp)
  365. {
  366. int ret;
  367. if (qlcnic_rom_lock(adapter) != 0)
  368. return -EIO;
  369. ret = do_rom_fast_read(adapter, addr, valp);
  370. qlcnic_rom_unlock(adapter);
  371. return ret;
  372. }
  373. int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
  374. {
  375. int addr, val;
  376. int i, n, init_delay;
  377. struct crb_addr_pair *buf;
  378. unsigned offset;
  379. u32 off;
  380. struct pci_dev *pdev = adapter->pdev;
  381. QLCWR32(adapter, CRB_CMDPEG_STATE, 0);
  382. QLCWR32(adapter, CRB_RCVPEG_STATE, 0);
  383. qlcnic_rom_lock(adapter);
  384. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
  385. qlcnic_rom_unlock(adapter);
  386. /* Init HW CRB block */
  387. if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
  388. qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
  389. dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
  390. return -EIO;
  391. }
  392. offset = n & 0xffffU;
  393. n = (n >> 16) & 0xffffU;
  394. if (n >= 1024) {
  395. dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
  396. return -EIO;
  397. }
  398. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  399. if (buf == NULL) {
  400. dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
  401. return -ENOMEM;
  402. }
  403. for (i = 0; i < n; i++) {
  404. if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
  405. qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
  406. kfree(buf);
  407. return -EIO;
  408. }
  409. buf[i].addr = addr;
  410. buf[i].data = val;
  411. }
  412. for (i = 0; i < n; i++) {
  413. off = qlcnic_decode_crb_addr(buf[i].addr);
  414. if (off == QLCNIC_ADDR_ERROR) {
  415. dev_err(&pdev->dev, "CRB init value out of range %x\n",
  416. buf[i].addr);
  417. continue;
  418. }
  419. off += QLCNIC_PCI_CRBSPACE;
  420. if (off & 1)
  421. continue;
  422. /* skipping cold reboot MAGIC */
  423. if (off == QLCNIC_CAM_RAM(0x1fc))
  424. continue;
  425. if (off == (QLCNIC_CRB_I2C0 + 0x1c))
  426. continue;
  427. if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
  428. continue;
  429. if (off == (ROMUSB_GLB + 0xa8))
  430. continue;
  431. if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
  432. continue;
  433. if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
  434. continue;
  435. if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
  436. continue;
  437. if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
  438. continue;
  439. /* skip the function enable register */
  440. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
  441. continue;
  442. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
  443. continue;
  444. if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
  445. continue;
  446. init_delay = 1;
  447. /* After writing this register, HW needs time for CRB */
  448. /* to quiet down (else crb_window returns 0xffffffff) */
  449. if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
  450. init_delay = 1000;
  451. QLCWR32(adapter, off, buf[i].data);
  452. msleep(init_delay);
  453. }
  454. kfree(buf);
  455. /* Initialize protocol process engine */
  456. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
  457. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
  458. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
  459. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
  460. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
  461. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
  462. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
  463. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
  464. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
  465. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
  466. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
  467. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
  468. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
  469. msleep(1);
  470. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
  471. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
  472. return 0;
  473. }
  474. static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
  475. {
  476. u32 val;
  477. int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
  478. do {
  479. val = QLCRD32(adapter, CRB_CMDPEG_STATE);
  480. switch (val) {
  481. case PHAN_INITIALIZE_COMPLETE:
  482. case PHAN_INITIALIZE_ACK:
  483. return 0;
  484. case PHAN_INITIALIZE_FAILED:
  485. goto out_err;
  486. default:
  487. break;
  488. }
  489. msleep(QLCNIC_CMDPEG_CHECK_DELAY);
  490. } while (--retries);
  491. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
  492. out_err:
  493. dev_err(&adapter->pdev->dev, "Command Peg initialization not "
  494. "complete, state: 0x%x.\n", val);
  495. return -EIO;
  496. }
  497. static int
  498. qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
  499. {
  500. u32 val;
  501. int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
  502. do {
  503. val = QLCRD32(adapter, CRB_RCVPEG_STATE);
  504. if (val == PHAN_PEG_RCV_INITIALIZED)
  505. return 0;
  506. msleep(QLCNIC_RCVPEG_CHECK_DELAY);
  507. } while (--retries);
  508. if (!retries) {
  509. dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
  510. "complete, state: 0x%x.\n", val);
  511. return -EIO;
  512. }
  513. return 0;
  514. }
  515. int
  516. qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
  517. {
  518. int err;
  519. err = qlcnic_cmd_peg_ready(adapter);
  520. if (err)
  521. return err;
  522. err = qlcnic_receive_peg_ready(adapter);
  523. if (err)
  524. return err;
  525. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
  526. return err;
  527. }
  528. int
  529. qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
  530. int timeo;
  531. u32 val;
  532. val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
  533. val = QLC_DEV_GET_DRV(val, adapter->portnum);
  534. if ((val & 0x3) != QLCNIC_TYPE_NIC) {
  535. dev_err(&adapter->pdev->dev,
  536. "Not an Ethernet NIC func=%u\n", val);
  537. return -EIO;
  538. }
  539. adapter->physical_port = (val >> 2);
  540. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
  541. timeo = QLCNIC_INIT_TIMEOUT_SECS;
  542. adapter->dev_init_timeo = timeo;
  543. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
  544. timeo = QLCNIC_RESET_TIMEOUT_SECS;
  545. adapter->reset_ack_timeo = timeo;
  546. return 0;
  547. }
  548. int
  549. qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
  550. {
  551. u32 ver = -1, min_ver;
  552. qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET, (int *)&ver);
  553. ver = QLCNIC_DECODE_VERSION(ver);
  554. min_ver = QLCNIC_MIN_FW_VERSION;
  555. if (ver < min_ver) {
  556. dev_err(&adapter->pdev->dev,
  557. "firmware version %d.%d.%d unsupported."
  558. "Min supported version %d.%d.%d\n",
  559. _major(ver), _minor(ver), _build(ver),
  560. _major(min_ver), _minor(min_ver), _build(min_ver));
  561. return -EINVAL;
  562. }
  563. return 0;
  564. }
  565. static int
  566. qlcnic_has_mn(struct qlcnic_adapter *adapter)
  567. {
  568. u32 capability;
  569. capability = 0;
  570. capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
  571. if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
  572. return 1;
  573. return 0;
  574. }
  575. static
  576. struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
  577. {
  578. u32 i;
  579. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  580. __le32 entries = cpu_to_le32(directory->num_entries);
  581. for (i = 0; i < entries; i++) {
  582. __le32 offs = cpu_to_le32(directory->findex) +
  583. (i * cpu_to_le32(directory->entry_size));
  584. __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
  585. if (tab_type == section)
  586. return (struct uni_table_desc *) &unirom[offs];
  587. }
  588. return NULL;
  589. }
  590. #define FILEHEADER_SIZE (14 * 4)
  591. static int
  592. qlcnic_validate_header(struct qlcnic_adapter *adapter)
  593. {
  594. const u8 *unirom = adapter->fw->data;
  595. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  596. __le32 fw_file_size = adapter->fw->size;
  597. __le32 entries;
  598. __le32 entry_size;
  599. __le32 tab_size;
  600. if (fw_file_size < FILEHEADER_SIZE)
  601. return -EINVAL;
  602. entries = cpu_to_le32(directory->num_entries);
  603. entry_size = cpu_to_le32(directory->entry_size);
  604. tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
  605. if (fw_file_size < tab_size)
  606. return -EINVAL;
  607. return 0;
  608. }
  609. static int
  610. qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
  611. {
  612. struct uni_table_desc *tab_desc;
  613. struct uni_data_desc *descr;
  614. const u8 *unirom = adapter->fw->data;
  615. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  616. QLCNIC_UNI_BOOTLD_IDX_OFF));
  617. __le32 offs;
  618. __le32 tab_size;
  619. __le32 data_size;
  620. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
  621. if (!tab_desc)
  622. return -EINVAL;
  623. tab_size = cpu_to_le32(tab_desc->findex) +
  624. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  625. if (adapter->fw->size < tab_size)
  626. return -EINVAL;
  627. offs = cpu_to_le32(tab_desc->findex) +
  628. (cpu_to_le32(tab_desc->entry_size) * (idx));
  629. descr = (struct uni_data_desc *)&unirom[offs];
  630. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  631. if (adapter->fw->size < data_size)
  632. return -EINVAL;
  633. return 0;
  634. }
  635. static int
  636. qlcnic_validate_fw(struct qlcnic_adapter *adapter)
  637. {
  638. struct uni_table_desc *tab_desc;
  639. struct uni_data_desc *descr;
  640. const u8 *unirom = adapter->fw->data;
  641. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  642. QLCNIC_UNI_FIRMWARE_IDX_OFF));
  643. __le32 offs;
  644. __le32 tab_size;
  645. __le32 data_size;
  646. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
  647. if (!tab_desc)
  648. return -EINVAL;
  649. tab_size = cpu_to_le32(tab_desc->findex) +
  650. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  651. if (adapter->fw->size < tab_size)
  652. return -EINVAL;
  653. offs = cpu_to_le32(tab_desc->findex) +
  654. (cpu_to_le32(tab_desc->entry_size) * (idx));
  655. descr = (struct uni_data_desc *)&unirom[offs];
  656. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  657. if (adapter->fw->size < data_size)
  658. return -EINVAL;
  659. return 0;
  660. }
  661. static int
  662. qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
  663. {
  664. struct uni_table_desc *ptab_descr;
  665. const u8 *unirom = adapter->fw->data;
  666. int mn_present = qlcnic_has_mn(adapter);
  667. __le32 entries;
  668. __le32 entry_size;
  669. __le32 tab_size;
  670. u32 i;
  671. ptab_descr = qlcnic_get_table_desc(unirom,
  672. QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
  673. if (!ptab_descr)
  674. return -EINVAL;
  675. entries = cpu_to_le32(ptab_descr->num_entries);
  676. entry_size = cpu_to_le32(ptab_descr->entry_size);
  677. tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
  678. if (adapter->fw->size < tab_size)
  679. return -EINVAL;
  680. nomn:
  681. for (i = 0; i < entries; i++) {
  682. __le32 flags, file_chiprev, offs;
  683. u8 chiprev = adapter->ahw.revision_id;
  684. u32 flagbit;
  685. offs = cpu_to_le32(ptab_descr->findex) +
  686. (i * cpu_to_le32(ptab_descr->entry_size));
  687. flags = cpu_to_le32(*((int *)&unirom[offs] +
  688. QLCNIC_UNI_FLAGS_OFF));
  689. file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
  690. QLCNIC_UNI_CHIP_REV_OFF));
  691. flagbit = mn_present ? 1 : 2;
  692. if ((chiprev == file_chiprev) &&
  693. ((1ULL << flagbit) & flags)) {
  694. adapter->file_prd_off = offs;
  695. return 0;
  696. }
  697. }
  698. if (mn_present) {
  699. mn_present = 0;
  700. goto nomn;
  701. }
  702. return -EINVAL;
  703. }
  704. static int
  705. qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
  706. {
  707. if (qlcnic_validate_header(adapter)) {
  708. dev_err(&adapter->pdev->dev,
  709. "unified image: header validation failed\n");
  710. return -EINVAL;
  711. }
  712. if (qlcnic_validate_product_offs(adapter)) {
  713. dev_err(&adapter->pdev->dev,
  714. "unified image: product validation failed\n");
  715. return -EINVAL;
  716. }
  717. if (qlcnic_validate_bootld(adapter)) {
  718. dev_err(&adapter->pdev->dev,
  719. "unified image: bootld validation failed\n");
  720. return -EINVAL;
  721. }
  722. if (qlcnic_validate_fw(adapter)) {
  723. dev_err(&adapter->pdev->dev,
  724. "unified image: firmware validation failed\n");
  725. return -EINVAL;
  726. }
  727. return 0;
  728. }
  729. static
  730. struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
  731. u32 section, u32 idx_offset)
  732. {
  733. const u8 *unirom = adapter->fw->data;
  734. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  735. idx_offset));
  736. struct uni_table_desc *tab_desc;
  737. __le32 offs;
  738. tab_desc = qlcnic_get_table_desc(unirom, section);
  739. if (tab_desc == NULL)
  740. return NULL;
  741. offs = cpu_to_le32(tab_desc->findex) +
  742. (cpu_to_le32(tab_desc->entry_size) * idx);
  743. return (struct uni_data_desc *)&unirom[offs];
  744. }
  745. static u8 *
  746. qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
  747. {
  748. u32 offs = QLCNIC_BOOTLD_START;
  749. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  750. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  751. QLCNIC_UNI_DIR_SECT_BOOTLD,
  752. QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
  753. return (u8 *)&adapter->fw->data[offs];
  754. }
  755. static u8 *
  756. qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
  757. {
  758. u32 offs = QLCNIC_IMAGE_START;
  759. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  760. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  761. QLCNIC_UNI_DIR_SECT_FW,
  762. QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
  763. return (u8 *)&adapter->fw->data[offs];
  764. }
  765. static __le32
  766. qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
  767. {
  768. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  769. return cpu_to_le32((qlcnic_get_data_desc(adapter,
  770. QLCNIC_UNI_DIR_SECT_FW,
  771. QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
  772. else
  773. return cpu_to_le32(
  774. *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
  775. }
  776. static __le32
  777. qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
  778. {
  779. struct uni_data_desc *fw_data_desc;
  780. const struct firmware *fw = adapter->fw;
  781. __le32 major, minor, sub;
  782. const u8 *ver_str;
  783. int i, ret;
  784. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  785. return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
  786. fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
  787. QLCNIC_UNI_FIRMWARE_IDX_OFF);
  788. ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
  789. cpu_to_le32(fw_data_desc->size) - 17;
  790. for (i = 0; i < 12; i++) {
  791. if (!strncmp(&ver_str[i], "REV=", 4)) {
  792. ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
  793. &major, &minor, &sub);
  794. if (ret != 3)
  795. return 0;
  796. else
  797. return major + (minor << 8) + (sub << 16);
  798. }
  799. }
  800. return 0;
  801. }
  802. static __le32
  803. qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
  804. {
  805. const struct firmware *fw = adapter->fw;
  806. __le32 bios_ver, prd_off = adapter->file_prd_off;
  807. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  808. return cpu_to_le32(
  809. *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
  810. bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
  811. + QLCNIC_UNI_BIOS_VERSION_OFF));
  812. return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
  813. }
  814. static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
  815. {
  816. if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
  817. dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
  818. qlcnic_pcie_sem_unlock(adapter, 2);
  819. }
  820. static int
  821. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
  822. {
  823. u32 heartbeat, ret = -EIO;
  824. int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
  825. adapter->heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  826. do {
  827. msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
  828. heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  829. if (heartbeat != adapter->heartbeat) {
  830. ret = QLCNIC_RCODE_SUCCESS;
  831. break;
  832. }
  833. } while (--retries);
  834. return ret;
  835. }
  836. int
  837. qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
  838. {
  839. if (qlcnic_check_fw_hearbeat(adapter)) {
  840. qlcnic_rom_lock_recovery(adapter);
  841. return 1;
  842. }
  843. if (adapter->need_fw_reset)
  844. return 1;
  845. if (adapter->fw)
  846. return 1;
  847. return 0;
  848. }
  849. static const char *fw_name[] = {
  850. QLCNIC_UNIFIED_ROMIMAGE_NAME,
  851. QLCNIC_FLASH_ROMIMAGE_NAME,
  852. };
  853. int
  854. qlcnic_load_firmware(struct qlcnic_adapter *adapter)
  855. {
  856. u64 *ptr64;
  857. u32 i, flashaddr, size;
  858. const struct firmware *fw = adapter->fw;
  859. struct pci_dev *pdev = adapter->pdev;
  860. dev_info(&pdev->dev, "loading firmware from %s\n",
  861. fw_name[adapter->fw_type]);
  862. if (fw) {
  863. __le64 data;
  864. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  865. ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
  866. flashaddr = QLCNIC_BOOTLD_START;
  867. for (i = 0; i < size; i++) {
  868. data = cpu_to_le64(ptr64[i]);
  869. if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
  870. return -EIO;
  871. flashaddr += 8;
  872. }
  873. size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
  874. ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
  875. flashaddr = QLCNIC_IMAGE_START;
  876. for (i = 0; i < size; i++) {
  877. data = cpu_to_le64(ptr64[i]);
  878. if (qlcnic_pci_mem_write_2M(adapter,
  879. flashaddr, data))
  880. return -EIO;
  881. flashaddr += 8;
  882. }
  883. size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
  884. if (size) {
  885. data = cpu_to_le64(ptr64[i]);
  886. if (qlcnic_pci_mem_write_2M(adapter,
  887. flashaddr, data))
  888. return -EIO;
  889. }
  890. } else {
  891. u64 data;
  892. u32 hi, lo;
  893. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  894. flashaddr = QLCNIC_BOOTLD_START;
  895. for (i = 0; i < size; i++) {
  896. if (qlcnic_rom_fast_read(adapter,
  897. flashaddr, (int *)&lo) != 0)
  898. return -EIO;
  899. if (qlcnic_rom_fast_read(adapter,
  900. flashaddr + 4, (int *)&hi) != 0)
  901. return -EIO;
  902. data = (((u64)hi << 32) | lo);
  903. if (qlcnic_pci_mem_write_2M(adapter,
  904. flashaddr, data))
  905. return -EIO;
  906. flashaddr += 8;
  907. }
  908. }
  909. msleep(1);
  910. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
  911. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
  912. return 0;
  913. }
  914. static int
  915. qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
  916. {
  917. __le32 val;
  918. u32 ver, bios, min_size;
  919. struct pci_dev *pdev = adapter->pdev;
  920. const struct firmware *fw = adapter->fw;
  921. u8 fw_type = adapter->fw_type;
  922. if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
  923. if (qlcnic_validate_unified_romimage(adapter))
  924. return -EINVAL;
  925. min_size = QLCNIC_UNI_FW_MIN_SIZE;
  926. } else {
  927. val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
  928. if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
  929. return -EINVAL;
  930. min_size = QLCNIC_FW_MIN_SIZE;
  931. }
  932. if (fw->size < min_size)
  933. return -EINVAL;
  934. val = qlcnic_get_fw_version(adapter);
  935. ver = QLCNIC_DECODE_VERSION(val);
  936. if (ver < QLCNIC_MIN_FW_VERSION) {
  937. dev_err(&pdev->dev,
  938. "%s: firmware version %d.%d.%d unsupported\n",
  939. fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
  940. return -EINVAL;
  941. }
  942. val = qlcnic_get_bios_version(adapter);
  943. qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
  944. if ((__force u32)val != bios) {
  945. dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
  946. fw_name[fw_type]);
  947. return -EINVAL;
  948. }
  949. QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
  950. return 0;
  951. }
  952. static void
  953. qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
  954. {
  955. u8 fw_type;
  956. switch (adapter->fw_type) {
  957. case QLCNIC_UNKNOWN_ROMIMAGE:
  958. fw_type = QLCNIC_UNIFIED_ROMIMAGE;
  959. break;
  960. case QLCNIC_UNIFIED_ROMIMAGE:
  961. default:
  962. fw_type = QLCNIC_FLASH_ROMIMAGE;
  963. break;
  964. }
  965. adapter->fw_type = fw_type;
  966. }
  967. void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
  968. {
  969. struct pci_dev *pdev = adapter->pdev;
  970. int rc;
  971. adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
  972. next:
  973. qlcnic_get_next_fwtype(adapter);
  974. if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
  975. adapter->fw = NULL;
  976. } else {
  977. rc = request_firmware(&adapter->fw,
  978. fw_name[adapter->fw_type], &pdev->dev);
  979. if (rc != 0)
  980. goto next;
  981. rc = qlcnic_validate_firmware(adapter);
  982. if (rc != 0) {
  983. release_firmware(adapter->fw);
  984. msleep(1);
  985. goto next;
  986. }
  987. }
  988. }
  989. void
  990. qlcnic_release_firmware(struct qlcnic_adapter *adapter)
  991. {
  992. if (adapter->fw)
  993. release_firmware(adapter->fw);
  994. adapter->fw = NULL;
  995. }
  996. static void
  997. qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
  998. struct qlcnic_fw_msg *msg)
  999. {
  1000. u32 cable_OUI;
  1001. u16 cable_len;
  1002. u16 link_speed;
  1003. u8 link_status, module, duplex, autoneg;
  1004. struct net_device *netdev = adapter->netdev;
  1005. adapter->has_link_events = 1;
  1006. cable_OUI = msg->body[1] & 0xffffffff;
  1007. cable_len = (msg->body[1] >> 32) & 0xffff;
  1008. link_speed = (msg->body[1] >> 48) & 0xffff;
  1009. link_status = msg->body[2] & 0xff;
  1010. duplex = (msg->body[2] >> 16) & 0xff;
  1011. autoneg = (msg->body[2] >> 24) & 0xff;
  1012. module = (msg->body[2] >> 8) & 0xff;
  1013. if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
  1014. dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
  1015. "length %d\n", cable_OUI, cable_len);
  1016. else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
  1017. dev_info(&netdev->dev, "unsupported cable length %d\n",
  1018. cable_len);
  1019. qlcnic_advert_link_change(adapter, link_status);
  1020. if (duplex == LINKEVENT_FULL_DUPLEX)
  1021. adapter->link_duplex = DUPLEX_FULL;
  1022. else
  1023. adapter->link_duplex = DUPLEX_HALF;
  1024. adapter->module_type = module;
  1025. adapter->link_autoneg = autoneg;
  1026. adapter->link_speed = link_speed;
  1027. }
  1028. static void
  1029. qlcnic_handle_fw_message(int desc_cnt, int index,
  1030. struct qlcnic_host_sds_ring *sds_ring)
  1031. {
  1032. struct qlcnic_fw_msg msg;
  1033. struct status_desc *desc;
  1034. int i = 0, opcode;
  1035. while (desc_cnt > 0 && i < 8) {
  1036. desc = &sds_ring->desc_head[index];
  1037. msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
  1038. msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
  1039. index = get_next_index(index, sds_ring->num_desc);
  1040. desc_cnt--;
  1041. }
  1042. opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
  1043. switch (opcode) {
  1044. case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
  1045. qlcnic_handle_linkevent(sds_ring->adapter, &msg);
  1046. break;
  1047. default:
  1048. break;
  1049. }
  1050. }
  1051. static int
  1052. qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
  1053. struct qlcnic_host_rds_ring *rds_ring,
  1054. struct qlcnic_rx_buffer *buffer)
  1055. {
  1056. struct sk_buff *skb;
  1057. dma_addr_t dma;
  1058. struct pci_dev *pdev = adapter->pdev;
  1059. skb = dev_alloc_skb(rds_ring->skb_size);
  1060. if (!skb) {
  1061. adapter->stats.skb_alloc_failure++;
  1062. return -ENOMEM;
  1063. }
  1064. skb_reserve(skb, NET_IP_ALIGN);
  1065. dma = pci_map_single(pdev, skb->data,
  1066. rds_ring->dma_size, PCI_DMA_FROMDEVICE);
  1067. if (pci_dma_mapping_error(pdev, dma)) {
  1068. adapter->stats.rx_dma_map_error++;
  1069. dev_kfree_skb_any(skb);
  1070. return -ENOMEM;
  1071. }
  1072. buffer->skb = skb;
  1073. buffer->dma = dma;
  1074. return 0;
  1075. }
  1076. static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
  1077. struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
  1078. {
  1079. struct qlcnic_rx_buffer *buffer;
  1080. struct sk_buff *skb;
  1081. buffer = &rds_ring->rx_buf_arr[index];
  1082. if (unlikely(buffer->skb == NULL)) {
  1083. WARN_ON(1);
  1084. return NULL;
  1085. }
  1086. pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
  1087. PCI_DMA_FROMDEVICE);
  1088. skb = buffer->skb;
  1089. if (likely(adapter->rx_csum && (cksum == STATUS_CKSUM_OK ||
  1090. cksum == STATUS_CKSUM_LOOP))) {
  1091. adapter->stats.csummed++;
  1092. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1093. } else {
  1094. skb_checksum_none_assert(skb);
  1095. }
  1096. skb->dev = adapter->netdev;
  1097. buffer->skb = NULL;
  1098. return skb;
  1099. }
  1100. static int
  1101. qlcnic_check_rx_tagging(struct qlcnic_adapter *adapter, struct sk_buff *skb,
  1102. u16 *vlan_tag)
  1103. {
  1104. struct ethhdr *eth_hdr;
  1105. if (!__vlan_get_tag(skb, vlan_tag)) {
  1106. eth_hdr = (struct ethhdr *) skb->data;
  1107. memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
  1108. skb_pull(skb, VLAN_HLEN);
  1109. }
  1110. if (!adapter->pvid)
  1111. return 0;
  1112. if (*vlan_tag == adapter->pvid) {
  1113. /* Outer vlan tag. Packet should follow non-vlan path */
  1114. *vlan_tag = 0xffff;
  1115. return 0;
  1116. }
  1117. if (adapter->flags & QLCNIC_TAGGING_ENABLED)
  1118. return 0;
  1119. return -EINVAL;
  1120. }
  1121. static struct qlcnic_rx_buffer *
  1122. qlcnic_process_rcv(struct qlcnic_adapter *adapter,
  1123. struct qlcnic_host_sds_ring *sds_ring,
  1124. int ring, u64 sts_data0)
  1125. {
  1126. struct net_device *netdev = adapter->netdev;
  1127. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1128. struct qlcnic_rx_buffer *buffer;
  1129. struct sk_buff *skb;
  1130. struct qlcnic_host_rds_ring *rds_ring;
  1131. int index, length, cksum, pkt_offset;
  1132. u16 vid = 0xffff;
  1133. if (unlikely(ring >= adapter->max_rds_rings))
  1134. return NULL;
  1135. rds_ring = &recv_ctx->rds_rings[ring];
  1136. index = qlcnic_get_sts_refhandle(sts_data0);
  1137. if (unlikely(index >= rds_ring->num_desc))
  1138. return NULL;
  1139. buffer = &rds_ring->rx_buf_arr[index];
  1140. length = qlcnic_get_sts_totallength(sts_data0);
  1141. cksum = qlcnic_get_sts_status(sts_data0);
  1142. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1143. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1144. if (!skb)
  1145. return buffer;
  1146. if (length > rds_ring->skb_size)
  1147. skb_put(skb, rds_ring->skb_size);
  1148. else
  1149. skb_put(skb, length);
  1150. if (pkt_offset)
  1151. skb_pull(skb, pkt_offset);
  1152. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1153. adapter->stats.rxdropped++;
  1154. dev_kfree_skb(skb);
  1155. return buffer;
  1156. }
  1157. skb->protocol = eth_type_trans(skb, netdev);
  1158. if ((vid != 0xffff) && adapter->vlgrp)
  1159. vlan_gro_receive(&sds_ring->napi, adapter->vlgrp, vid, skb);
  1160. else
  1161. napi_gro_receive(&sds_ring->napi, skb);
  1162. adapter->stats.rx_pkts++;
  1163. adapter->stats.rxbytes += length;
  1164. return buffer;
  1165. }
  1166. #define QLC_TCP_HDR_SIZE 20
  1167. #define QLC_TCP_TS_OPTION_SIZE 12
  1168. #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
  1169. static struct qlcnic_rx_buffer *
  1170. qlcnic_process_lro(struct qlcnic_adapter *adapter,
  1171. struct qlcnic_host_sds_ring *sds_ring,
  1172. int ring, u64 sts_data0, u64 sts_data1)
  1173. {
  1174. struct net_device *netdev = adapter->netdev;
  1175. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1176. struct qlcnic_rx_buffer *buffer;
  1177. struct sk_buff *skb;
  1178. struct qlcnic_host_rds_ring *rds_ring;
  1179. struct iphdr *iph;
  1180. struct tcphdr *th;
  1181. bool push, timestamp;
  1182. int l2_hdr_offset, l4_hdr_offset;
  1183. int index;
  1184. u16 lro_length, length, data_offset;
  1185. u32 seq_number;
  1186. u16 vid = 0xffff;
  1187. if (unlikely(ring > adapter->max_rds_rings))
  1188. return NULL;
  1189. rds_ring = &recv_ctx->rds_rings[ring];
  1190. index = qlcnic_get_lro_sts_refhandle(sts_data0);
  1191. if (unlikely(index > rds_ring->num_desc))
  1192. return NULL;
  1193. buffer = &rds_ring->rx_buf_arr[index];
  1194. timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
  1195. lro_length = qlcnic_get_lro_sts_length(sts_data0);
  1196. l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
  1197. l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
  1198. push = qlcnic_get_lro_sts_push_flag(sts_data0);
  1199. seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
  1200. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
  1201. if (!skb)
  1202. return buffer;
  1203. if (timestamp)
  1204. data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
  1205. else
  1206. data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
  1207. skb_put(skb, lro_length + data_offset);
  1208. skb_pull(skb, l2_hdr_offset);
  1209. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1210. adapter->stats.rxdropped++;
  1211. dev_kfree_skb(skb);
  1212. return buffer;
  1213. }
  1214. skb->protocol = eth_type_trans(skb, netdev);
  1215. iph = (struct iphdr *)skb->data;
  1216. th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
  1217. length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
  1218. iph->tot_len = htons(length);
  1219. iph->check = 0;
  1220. iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
  1221. th->psh = push;
  1222. th->seq = htonl(seq_number);
  1223. length = skb->len;
  1224. if ((vid != 0xffff) && adapter->vlgrp)
  1225. vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vid);
  1226. else
  1227. netif_receive_skb(skb);
  1228. adapter->stats.lro_pkts++;
  1229. adapter->stats.lrobytes += length;
  1230. return buffer;
  1231. }
  1232. int
  1233. qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
  1234. {
  1235. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1236. struct list_head *cur;
  1237. struct status_desc *desc;
  1238. struct qlcnic_rx_buffer *rxbuf;
  1239. u64 sts_data0, sts_data1;
  1240. int count = 0;
  1241. int opcode, ring, desc_cnt;
  1242. u32 consumer = sds_ring->consumer;
  1243. while (count < max) {
  1244. desc = &sds_ring->desc_head[consumer];
  1245. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1246. if (!(sts_data0 & STATUS_OWNER_HOST))
  1247. break;
  1248. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1249. opcode = qlcnic_get_sts_opcode(sts_data0);
  1250. switch (opcode) {
  1251. case QLCNIC_RXPKT_DESC:
  1252. case QLCNIC_OLD_RXPKT_DESC:
  1253. case QLCNIC_SYN_OFFLOAD:
  1254. ring = qlcnic_get_sts_type(sts_data0);
  1255. rxbuf = qlcnic_process_rcv(adapter, sds_ring,
  1256. ring, sts_data0);
  1257. break;
  1258. case QLCNIC_LRO_DESC:
  1259. ring = qlcnic_get_lro_sts_type(sts_data0);
  1260. sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
  1261. rxbuf = qlcnic_process_lro(adapter, sds_ring,
  1262. ring, sts_data0, sts_data1);
  1263. break;
  1264. case QLCNIC_RESPONSE_DESC:
  1265. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1266. default:
  1267. goto skip;
  1268. }
  1269. WARN_ON(desc_cnt > 1);
  1270. if (likely(rxbuf))
  1271. list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
  1272. else
  1273. adapter->stats.null_rxbuf++;
  1274. skip:
  1275. for (; desc_cnt > 0; desc_cnt--) {
  1276. desc = &sds_ring->desc_head[consumer];
  1277. desc->status_desc_data[0] =
  1278. cpu_to_le64(STATUS_OWNER_PHANTOM);
  1279. consumer = get_next_index(consumer, sds_ring->num_desc);
  1280. }
  1281. count++;
  1282. }
  1283. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1284. struct qlcnic_host_rds_ring *rds_ring =
  1285. &adapter->recv_ctx.rds_rings[ring];
  1286. if (!list_empty(&sds_ring->free_list[ring])) {
  1287. list_for_each(cur, &sds_ring->free_list[ring]) {
  1288. rxbuf = list_entry(cur,
  1289. struct qlcnic_rx_buffer, list);
  1290. qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
  1291. }
  1292. spin_lock(&rds_ring->lock);
  1293. list_splice_tail_init(&sds_ring->free_list[ring],
  1294. &rds_ring->free_list);
  1295. spin_unlock(&rds_ring->lock);
  1296. }
  1297. qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
  1298. }
  1299. if (count) {
  1300. sds_ring->consumer = consumer;
  1301. writel(consumer, sds_ring->crb_sts_consumer);
  1302. }
  1303. return count;
  1304. }
  1305. void
  1306. qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
  1307. struct qlcnic_host_rds_ring *rds_ring)
  1308. {
  1309. struct rcv_desc *pdesc;
  1310. struct qlcnic_rx_buffer *buffer;
  1311. int producer, count = 0;
  1312. struct list_head *head;
  1313. producer = rds_ring->producer;
  1314. head = &rds_ring->free_list;
  1315. while (!list_empty(head)) {
  1316. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1317. if (!buffer->skb) {
  1318. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1319. break;
  1320. }
  1321. count++;
  1322. list_del(&buffer->list);
  1323. /* make a rcv descriptor */
  1324. pdesc = &rds_ring->desc_head[producer];
  1325. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1326. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1327. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1328. producer = get_next_index(producer, rds_ring->num_desc);
  1329. }
  1330. if (count) {
  1331. rds_ring->producer = producer;
  1332. writel((producer-1) & (rds_ring->num_desc-1),
  1333. rds_ring->crb_rcv_producer);
  1334. }
  1335. }
  1336. static void
  1337. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  1338. struct qlcnic_host_rds_ring *rds_ring)
  1339. {
  1340. struct rcv_desc *pdesc;
  1341. struct qlcnic_rx_buffer *buffer;
  1342. int producer, count = 0;
  1343. struct list_head *head;
  1344. if (!spin_trylock(&rds_ring->lock))
  1345. return;
  1346. producer = rds_ring->producer;
  1347. head = &rds_ring->free_list;
  1348. while (!list_empty(head)) {
  1349. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1350. if (!buffer->skb) {
  1351. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1352. break;
  1353. }
  1354. count++;
  1355. list_del(&buffer->list);
  1356. /* make a rcv descriptor */
  1357. pdesc = &rds_ring->desc_head[producer];
  1358. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1359. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1360. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1361. producer = get_next_index(producer, rds_ring->num_desc);
  1362. }
  1363. if (count) {
  1364. rds_ring->producer = producer;
  1365. writel((producer - 1) & (rds_ring->num_desc - 1),
  1366. rds_ring->crb_rcv_producer);
  1367. }
  1368. spin_unlock(&rds_ring->lock);
  1369. }
  1370. static void dump_skb(struct sk_buff *skb)
  1371. {
  1372. int i;
  1373. unsigned char *data = skb->data;
  1374. for (i = 0; i < skb->len; i++) {
  1375. printk("%02x ", data[i]);
  1376. if ((i & 0x0f) == 8)
  1377. printk("\n");
  1378. }
  1379. }
  1380. static struct qlcnic_rx_buffer *
  1381. qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
  1382. struct qlcnic_host_sds_ring *sds_ring,
  1383. int ring, u64 sts_data0)
  1384. {
  1385. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1386. struct qlcnic_rx_buffer *buffer;
  1387. struct sk_buff *skb;
  1388. struct qlcnic_host_rds_ring *rds_ring;
  1389. int index, length, cksum, pkt_offset;
  1390. if (unlikely(ring >= adapter->max_rds_rings))
  1391. return NULL;
  1392. rds_ring = &recv_ctx->rds_rings[ring];
  1393. index = qlcnic_get_sts_refhandle(sts_data0);
  1394. if (unlikely(index >= rds_ring->num_desc))
  1395. return NULL;
  1396. buffer = &rds_ring->rx_buf_arr[index];
  1397. length = qlcnic_get_sts_totallength(sts_data0);
  1398. cksum = qlcnic_get_sts_status(sts_data0);
  1399. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1400. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1401. if (!skb)
  1402. return buffer;
  1403. if (length > rds_ring->skb_size)
  1404. skb_put(skb, rds_ring->skb_size);
  1405. else
  1406. skb_put(skb, length);
  1407. if (pkt_offset)
  1408. skb_pull(skb, pkt_offset);
  1409. if (!qlcnic_check_loopback_buff(skb->data))
  1410. adapter->diag_cnt++;
  1411. else
  1412. dump_skb(skb);
  1413. dev_kfree_skb_any(skb);
  1414. adapter->stats.rx_pkts++;
  1415. adapter->stats.rxbytes += length;
  1416. return buffer;
  1417. }
  1418. void
  1419. qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
  1420. {
  1421. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1422. struct status_desc *desc;
  1423. struct qlcnic_rx_buffer *rxbuf;
  1424. u64 sts_data0;
  1425. int opcode, ring, desc_cnt;
  1426. u32 consumer = sds_ring->consumer;
  1427. desc = &sds_ring->desc_head[consumer];
  1428. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1429. if (!(sts_data0 & STATUS_OWNER_HOST))
  1430. return;
  1431. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1432. opcode = qlcnic_get_sts_opcode(sts_data0);
  1433. ring = qlcnic_get_sts_type(sts_data0);
  1434. rxbuf = qlcnic_process_rcv_diag(adapter, sds_ring,
  1435. ring, sts_data0);
  1436. desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
  1437. consumer = get_next_index(consumer, sds_ring->num_desc);
  1438. sds_ring->consumer = consumer;
  1439. writel(consumer, sds_ring->crb_sts_consumer);
  1440. }
  1441. void
  1442. qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2,
  1443. u8 alt_mac, u8 *mac)
  1444. {
  1445. u32 mac_low, mac_high;
  1446. int i;
  1447. mac_low = QLCRD32(adapter, off1);
  1448. mac_high = QLCRD32(adapter, off2);
  1449. if (alt_mac) {
  1450. mac_low |= (mac_low >> 16) | (mac_high << 16);
  1451. mac_high >>= 16;
  1452. }
  1453. for (i = 0; i < 2; i++)
  1454. mac[i] = (u8)(mac_high >> ((1 - i) * 8));
  1455. for (i = 2; i < 6; i++)
  1456. mac[i] = (u8)(mac_low >> ((5 - i) * 8));
  1457. }