bnx2x_stats.c 44 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2010 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #include "bnx2x_cmn.h"
  18. #include "bnx2x_stats.h"
  19. /* Statistics */
  20. /****************************************************************************
  21. * Macros
  22. ****************************************************************************/
  23. /* sum[hi:lo] += add[hi:lo] */
  24. #define ADD_64(s_hi, a_hi, s_lo, a_lo) \
  25. do { \
  26. s_lo += a_lo; \
  27. s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \
  28. } while (0)
  29. /* difference = minuend - subtrahend */
  30. #define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \
  31. do { \
  32. if (m_lo < s_lo) { \
  33. /* underflow */ \
  34. d_hi = m_hi - s_hi; \
  35. if (d_hi > 0) { \
  36. /* we can 'loan' 1 */ \
  37. d_hi--; \
  38. d_lo = m_lo + (UINT_MAX - s_lo) + 1; \
  39. } else { \
  40. /* m_hi <= s_hi */ \
  41. d_hi = 0; \
  42. d_lo = 0; \
  43. } \
  44. } else { \
  45. /* m_lo >= s_lo */ \
  46. if (m_hi < s_hi) { \
  47. d_hi = 0; \
  48. d_lo = 0; \
  49. } else { \
  50. /* m_hi >= s_hi */ \
  51. d_hi = m_hi - s_hi; \
  52. d_lo = m_lo - s_lo; \
  53. } \
  54. } \
  55. } while (0)
  56. #define UPDATE_STAT64(s, t) \
  57. do { \
  58. DIFF_64(diff.hi, new->s##_hi, pstats->mac_stx[0].t##_hi, \
  59. diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \
  60. pstats->mac_stx[0].t##_hi = new->s##_hi; \
  61. pstats->mac_stx[0].t##_lo = new->s##_lo; \
  62. ADD_64(pstats->mac_stx[1].t##_hi, diff.hi, \
  63. pstats->mac_stx[1].t##_lo, diff.lo); \
  64. } while (0)
  65. #define UPDATE_STAT64_NIG(s, t) \
  66. do { \
  67. DIFF_64(diff.hi, new->s##_hi, old->s##_hi, \
  68. diff.lo, new->s##_lo, old->s##_lo); \
  69. ADD_64(estats->t##_hi, diff.hi, \
  70. estats->t##_lo, diff.lo); \
  71. } while (0)
  72. /* sum[hi:lo] += add */
  73. #define ADD_EXTEND_64(s_hi, s_lo, a) \
  74. do { \
  75. s_lo += a; \
  76. s_hi += (s_lo < a) ? 1 : 0; \
  77. } while (0)
  78. #define UPDATE_EXTEND_STAT(s) \
  79. do { \
  80. ADD_EXTEND_64(pstats->mac_stx[1].s##_hi, \
  81. pstats->mac_stx[1].s##_lo, \
  82. new->s); \
  83. } while (0)
  84. #define UPDATE_EXTEND_TSTAT(s, t) \
  85. do { \
  86. diff = le32_to_cpu(tclient->s) - le32_to_cpu(old_tclient->s); \
  87. old_tclient->s = tclient->s; \
  88. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  89. } while (0)
  90. #define UPDATE_EXTEND_USTAT(s, t) \
  91. do { \
  92. diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
  93. old_uclient->s = uclient->s; \
  94. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  95. } while (0)
  96. #define UPDATE_EXTEND_XSTAT(s, t) \
  97. do { \
  98. diff = le32_to_cpu(xclient->s) - le32_to_cpu(old_xclient->s); \
  99. old_xclient->s = xclient->s; \
  100. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  101. } while (0)
  102. /* minuend -= subtrahend */
  103. #define SUB_64(m_hi, s_hi, m_lo, s_lo) \
  104. do { \
  105. DIFF_64(m_hi, m_hi, s_hi, m_lo, m_lo, s_lo); \
  106. } while (0)
  107. /* minuend[hi:lo] -= subtrahend */
  108. #define SUB_EXTEND_64(m_hi, m_lo, s) \
  109. do { \
  110. SUB_64(m_hi, 0, m_lo, s); \
  111. } while (0)
  112. #define SUB_EXTEND_USTAT(s, t) \
  113. do { \
  114. diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
  115. SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  116. } while (0)
  117. /*
  118. * General service functions
  119. */
  120. static inline long bnx2x_hilo(u32 *hiref)
  121. {
  122. u32 lo = *(hiref + 1);
  123. #if (BITS_PER_LONG == 64)
  124. u32 hi = *hiref;
  125. return HILO_U64(hi, lo);
  126. #else
  127. return lo;
  128. #endif
  129. }
  130. /*
  131. * Init service functions
  132. */
  133. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  134. {
  135. if (!bp->stats_pending) {
  136. struct common_query_ramrod_data ramrod_data = {0};
  137. int i, rc;
  138. spin_lock_bh(&bp->stats_lock);
  139. ramrod_data.drv_counter = bp->stats_counter++;
  140. ramrod_data.collect_port = bp->port.pmf ? 1 : 0;
  141. for_each_queue(bp, i)
  142. ramrod_data.ctr_id_vector |= (1 << bp->fp[i].cl_id);
  143. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  144. ((u32 *)&ramrod_data)[1],
  145. ((u32 *)&ramrod_data)[0], 1);
  146. if (rc == 0)
  147. bp->stats_pending = 1;
  148. spin_unlock_bh(&bp->stats_lock);
  149. }
  150. }
  151. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  152. {
  153. struct dmae_command *dmae = &bp->stats_dmae;
  154. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  155. *stats_comp = DMAE_COMP_VAL;
  156. if (CHIP_REV_IS_SLOW(bp))
  157. return;
  158. /* loader */
  159. if (bp->executer_idx) {
  160. int loader_idx = PMF_DMAE_C(bp);
  161. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  162. true, DMAE_COMP_GRC);
  163. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  164. memset(dmae, 0, sizeof(struct dmae_command));
  165. dmae->opcode = opcode;
  166. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  167. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  168. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  169. sizeof(struct dmae_command) *
  170. (loader_idx + 1)) >> 2;
  171. dmae->dst_addr_hi = 0;
  172. dmae->len = sizeof(struct dmae_command) >> 2;
  173. if (CHIP_IS_E1(bp))
  174. dmae->len--;
  175. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  176. dmae->comp_addr_hi = 0;
  177. dmae->comp_val = 1;
  178. *stats_comp = 0;
  179. bnx2x_post_dmae(bp, dmae, loader_idx);
  180. } else if (bp->func_stx) {
  181. *stats_comp = 0;
  182. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  183. }
  184. }
  185. static int bnx2x_stats_comp(struct bnx2x *bp)
  186. {
  187. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  188. int cnt = 10;
  189. might_sleep();
  190. while (*stats_comp != DMAE_COMP_VAL) {
  191. if (!cnt) {
  192. BNX2X_ERR("timeout waiting for stats finished\n");
  193. break;
  194. }
  195. cnt--;
  196. msleep(1);
  197. }
  198. return 1;
  199. }
  200. /*
  201. * Statistics service functions
  202. */
  203. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  204. {
  205. struct dmae_command *dmae;
  206. u32 opcode;
  207. int loader_idx = PMF_DMAE_C(bp);
  208. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  209. /* sanity */
  210. if (!IS_MF(bp) || !bp->port.pmf || !bp->port.port_stx) {
  211. BNX2X_ERR("BUG!\n");
  212. return;
  213. }
  214. bp->executer_idx = 0;
  215. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  216. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  217. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  218. dmae->src_addr_lo = bp->port.port_stx >> 2;
  219. dmae->src_addr_hi = 0;
  220. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  221. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  222. dmae->len = DMAE_LEN32_RD_MAX;
  223. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  224. dmae->comp_addr_hi = 0;
  225. dmae->comp_val = 1;
  226. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  227. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  228. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  229. dmae->src_addr_hi = 0;
  230. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  231. DMAE_LEN32_RD_MAX * 4);
  232. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  233. DMAE_LEN32_RD_MAX * 4);
  234. dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX;
  235. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  236. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  237. dmae->comp_val = DMAE_COMP_VAL;
  238. *stats_comp = 0;
  239. bnx2x_hw_stats_post(bp);
  240. bnx2x_stats_comp(bp);
  241. }
  242. static void bnx2x_port_stats_init(struct bnx2x *bp)
  243. {
  244. struct dmae_command *dmae;
  245. int port = BP_PORT(bp);
  246. u32 opcode;
  247. int loader_idx = PMF_DMAE_C(bp);
  248. u32 mac_addr;
  249. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  250. /* sanity */
  251. if (!bp->link_vars.link_up || !bp->port.pmf) {
  252. BNX2X_ERR("BUG!\n");
  253. return;
  254. }
  255. bp->executer_idx = 0;
  256. /* MCP */
  257. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  258. true, DMAE_COMP_GRC);
  259. if (bp->port.port_stx) {
  260. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  261. dmae->opcode = opcode;
  262. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  263. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  264. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  265. dmae->dst_addr_hi = 0;
  266. dmae->len = sizeof(struct host_port_stats) >> 2;
  267. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  268. dmae->comp_addr_hi = 0;
  269. dmae->comp_val = 1;
  270. }
  271. if (bp->func_stx) {
  272. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  273. dmae->opcode = opcode;
  274. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  275. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  276. dmae->dst_addr_lo = bp->func_stx >> 2;
  277. dmae->dst_addr_hi = 0;
  278. dmae->len = sizeof(struct host_func_stats) >> 2;
  279. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  280. dmae->comp_addr_hi = 0;
  281. dmae->comp_val = 1;
  282. }
  283. /* MAC */
  284. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  285. true, DMAE_COMP_GRC);
  286. if (bp->link_vars.mac_type == MAC_TYPE_BMAC) {
  287. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  288. NIG_REG_INGRESS_BMAC0_MEM);
  289. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  290. BIGMAC_REGISTER_TX_STAT_GTBYT */
  291. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  292. dmae->opcode = opcode;
  293. if (CHIP_IS_E1x(bp)) {
  294. dmae->src_addr_lo = (mac_addr +
  295. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  296. dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  297. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  298. } else {
  299. dmae->src_addr_lo = (mac_addr +
  300. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  301. dmae->len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  302. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  303. }
  304. dmae->src_addr_hi = 0;
  305. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  306. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  307. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  308. dmae->comp_addr_hi = 0;
  309. dmae->comp_val = 1;
  310. /* BIGMAC_REGISTER_RX_STAT_GR64 ..
  311. BIGMAC_REGISTER_RX_STAT_GRIPJ */
  312. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  313. dmae->opcode = opcode;
  314. dmae->src_addr_hi = 0;
  315. if (CHIP_IS_E1x(bp)) {
  316. dmae->src_addr_lo = (mac_addr +
  317. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  318. dmae->dst_addr_lo =
  319. U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  320. offsetof(struct bmac1_stats, rx_stat_gr64_lo));
  321. dmae->dst_addr_hi =
  322. U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  323. offsetof(struct bmac1_stats, rx_stat_gr64_lo));
  324. dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  325. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  326. } else {
  327. dmae->src_addr_lo =
  328. (mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  329. dmae->dst_addr_lo =
  330. U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  331. offsetof(struct bmac2_stats, rx_stat_gr64_lo));
  332. dmae->dst_addr_hi =
  333. U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  334. offsetof(struct bmac2_stats, rx_stat_gr64_lo));
  335. dmae->len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  336. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  337. }
  338. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  339. dmae->comp_addr_hi = 0;
  340. dmae->comp_val = 1;
  341. } else if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  342. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  343. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  344. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  345. dmae->opcode = opcode;
  346. dmae->src_addr_lo = (mac_addr +
  347. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  348. dmae->src_addr_hi = 0;
  349. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  350. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  351. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  352. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  353. dmae->comp_addr_hi = 0;
  354. dmae->comp_val = 1;
  355. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  356. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  357. dmae->opcode = opcode;
  358. dmae->src_addr_lo = (mac_addr +
  359. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  360. dmae->src_addr_hi = 0;
  361. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  362. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  363. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  364. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  365. dmae->len = 1;
  366. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  367. dmae->comp_addr_hi = 0;
  368. dmae->comp_val = 1;
  369. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  370. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  371. dmae->opcode = opcode;
  372. dmae->src_addr_lo = (mac_addr +
  373. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  374. dmae->src_addr_hi = 0;
  375. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  376. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  377. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  378. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  379. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  380. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  381. dmae->comp_addr_hi = 0;
  382. dmae->comp_val = 1;
  383. }
  384. /* NIG */
  385. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  386. dmae->opcode = opcode;
  387. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  388. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  389. dmae->src_addr_hi = 0;
  390. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  391. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  392. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  393. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  394. dmae->comp_addr_hi = 0;
  395. dmae->comp_val = 1;
  396. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  397. dmae->opcode = opcode;
  398. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  399. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  400. dmae->src_addr_hi = 0;
  401. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  402. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  403. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  404. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  405. dmae->len = (2*sizeof(u32)) >> 2;
  406. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  407. dmae->comp_addr_hi = 0;
  408. dmae->comp_val = 1;
  409. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  410. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  411. true, DMAE_COMP_PCI);
  412. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  413. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  414. dmae->src_addr_hi = 0;
  415. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  416. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  417. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  418. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  419. dmae->len = (2*sizeof(u32)) >> 2;
  420. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  421. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  422. dmae->comp_val = DMAE_COMP_VAL;
  423. *stats_comp = 0;
  424. }
  425. static void bnx2x_func_stats_init(struct bnx2x *bp)
  426. {
  427. struct dmae_command *dmae = &bp->stats_dmae;
  428. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  429. /* sanity */
  430. if (!bp->func_stx) {
  431. BNX2X_ERR("BUG!\n");
  432. return;
  433. }
  434. bp->executer_idx = 0;
  435. memset(dmae, 0, sizeof(struct dmae_command));
  436. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  437. true, DMAE_COMP_PCI);
  438. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  439. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  440. dmae->dst_addr_lo = bp->func_stx >> 2;
  441. dmae->dst_addr_hi = 0;
  442. dmae->len = sizeof(struct host_func_stats) >> 2;
  443. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  444. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  445. dmae->comp_val = DMAE_COMP_VAL;
  446. *stats_comp = 0;
  447. }
  448. static void bnx2x_stats_start(struct bnx2x *bp)
  449. {
  450. if (bp->port.pmf)
  451. bnx2x_port_stats_init(bp);
  452. else if (bp->func_stx)
  453. bnx2x_func_stats_init(bp);
  454. bnx2x_hw_stats_post(bp);
  455. bnx2x_storm_stats_post(bp);
  456. }
  457. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  458. {
  459. bnx2x_stats_comp(bp);
  460. bnx2x_stats_pmf_update(bp);
  461. bnx2x_stats_start(bp);
  462. }
  463. static void bnx2x_stats_restart(struct bnx2x *bp)
  464. {
  465. bnx2x_stats_comp(bp);
  466. bnx2x_stats_start(bp);
  467. }
  468. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  469. {
  470. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  471. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  472. struct {
  473. u32 lo;
  474. u32 hi;
  475. } diff;
  476. if (CHIP_IS_E1x(bp)) {
  477. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  478. /* the macros below will use "bmac1_stats" type */
  479. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  480. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  481. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  482. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  483. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  484. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  485. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  486. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  487. UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
  488. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  489. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  490. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  491. UPDATE_STAT64(tx_stat_gt127,
  492. tx_stat_etherstatspkts65octetsto127octets);
  493. UPDATE_STAT64(tx_stat_gt255,
  494. tx_stat_etherstatspkts128octetsto255octets);
  495. UPDATE_STAT64(tx_stat_gt511,
  496. tx_stat_etherstatspkts256octetsto511octets);
  497. UPDATE_STAT64(tx_stat_gt1023,
  498. tx_stat_etherstatspkts512octetsto1023octets);
  499. UPDATE_STAT64(tx_stat_gt1518,
  500. tx_stat_etherstatspkts1024octetsto1522octets);
  501. UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
  502. UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
  503. UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
  504. UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
  505. UPDATE_STAT64(tx_stat_gterr,
  506. tx_stat_dot3statsinternalmactransmiterrors);
  507. UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
  508. } else {
  509. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  510. /* the macros below will use "bmac2_stats" type */
  511. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  512. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  513. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  514. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  515. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  516. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  517. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  518. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  519. UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
  520. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  521. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  522. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  523. UPDATE_STAT64(tx_stat_gt127,
  524. tx_stat_etherstatspkts65octetsto127octets);
  525. UPDATE_STAT64(tx_stat_gt255,
  526. tx_stat_etherstatspkts128octetsto255octets);
  527. UPDATE_STAT64(tx_stat_gt511,
  528. tx_stat_etherstatspkts256octetsto511octets);
  529. UPDATE_STAT64(tx_stat_gt1023,
  530. tx_stat_etherstatspkts512octetsto1023octets);
  531. UPDATE_STAT64(tx_stat_gt1518,
  532. tx_stat_etherstatspkts1024octetsto1522octets);
  533. UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
  534. UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
  535. UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
  536. UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
  537. UPDATE_STAT64(tx_stat_gterr,
  538. tx_stat_dot3statsinternalmactransmiterrors);
  539. UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
  540. }
  541. estats->pause_frames_received_hi =
  542. pstats->mac_stx[1].rx_stat_bmac_xpf_hi;
  543. estats->pause_frames_received_lo =
  544. pstats->mac_stx[1].rx_stat_bmac_xpf_lo;
  545. estats->pause_frames_sent_hi =
  546. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  547. estats->pause_frames_sent_lo =
  548. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  549. }
  550. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  551. {
  552. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  553. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  554. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  555. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  556. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  557. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  558. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  559. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  560. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  561. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  562. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  563. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  564. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  565. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  566. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  567. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  568. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  569. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  570. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  571. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  572. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  573. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  574. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  575. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  576. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  577. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  578. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  579. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  580. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  581. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  582. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  583. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  584. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  585. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  586. estats->pause_frames_received_hi =
  587. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  588. estats->pause_frames_received_lo =
  589. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  590. ADD_64(estats->pause_frames_received_hi,
  591. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  592. estats->pause_frames_received_lo,
  593. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  594. estats->pause_frames_sent_hi =
  595. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  596. estats->pause_frames_sent_lo =
  597. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  598. ADD_64(estats->pause_frames_sent_hi,
  599. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  600. estats->pause_frames_sent_lo,
  601. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  602. }
  603. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  604. {
  605. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  606. struct nig_stats *old = &(bp->port.old_nig_stats);
  607. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  608. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  609. struct {
  610. u32 lo;
  611. u32 hi;
  612. } diff;
  613. if (bp->link_vars.mac_type == MAC_TYPE_BMAC)
  614. bnx2x_bmac_stats_update(bp);
  615. else if (bp->link_vars.mac_type == MAC_TYPE_EMAC)
  616. bnx2x_emac_stats_update(bp);
  617. else { /* unreached */
  618. BNX2X_ERR("stats updated by DMAE but no MAC active\n");
  619. return -1;
  620. }
  621. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  622. new->brb_discard - old->brb_discard);
  623. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  624. new->brb_truncate - old->brb_truncate);
  625. UPDATE_STAT64_NIG(egress_mac_pkt0,
  626. etherstatspkts1024octetsto1522octets);
  627. UPDATE_STAT64_NIG(egress_mac_pkt1, etherstatspktsover1522octets);
  628. memcpy(old, new, sizeof(struct nig_stats));
  629. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  630. sizeof(struct mac_stx));
  631. estats->brb_drop_hi = pstats->brb_drop_hi;
  632. estats->brb_drop_lo = pstats->brb_drop_lo;
  633. pstats->host_port_stats_start = ++pstats->host_port_stats_end;
  634. if (!BP_NOMCP(bp)) {
  635. u32 nig_timer_max =
  636. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  637. if (nig_timer_max != estats->nig_timer_max) {
  638. estats->nig_timer_max = nig_timer_max;
  639. BNX2X_ERR("NIG timer max (%u)\n",
  640. estats->nig_timer_max);
  641. }
  642. }
  643. return 0;
  644. }
  645. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  646. {
  647. struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
  648. struct tstorm_per_port_stats *tport =
  649. &stats->tstorm_common.port_statistics;
  650. struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
  651. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  652. int i;
  653. u16 cur_stats_counter;
  654. /* Make sure we use the value of the counter
  655. * used for sending the last stats ramrod.
  656. */
  657. spin_lock_bh(&bp->stats_lock);
  658. cur_stats_counter = bp->stats_counter - 1;
  659. spin_unlock_bh(&bp->stats_lock);
  660. memcpy(&(fstats->total_bytes_received_hi),
  661. &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
  662. sizeof(struct host_func_stats) - 2*sizeof(u32));
  663. estats->error_bytes_received_hi = 0;
  664. estats->error_bytes_received_lo = 0;
  665. estats->etherstatsoverrsizepkts_hi = 0;
  666. estats->etherstatsoverrsizepkts_lo = 0;
  667. estats->no_buff_discard_hi = 0;
  668. estats->no_buff_discard_lo = 0;
  669. for_each_queue(bp, i) {
  670. struct bnx2x_fastpath *fp = &bp->fp[i];
  671. int cl_id = fp->cl_id;
  672. struct tstorm_per_client_stats *tclient =
  673. &stats->tstorm_common.client_statistics[cl_id];
  674. struct tstorm_per_client_stats *old_tclient = &fp->old_tclient;
  675. struct ustorm_per_client_stats *uclient =
  676. &stats->ustorm_common.client_statistics[cl_id];
  677. struct ustorm_per_client_stats *old_uclient = &fp->old_uclient;
  678. struct xstorm_per_client_stats *xclient =
  679. &stats->xstorm_common.client_statistics[cl_id];
  680. struct xstorm_per_client_stats *old_xclient = &fp->old_xclient;
  681. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  682. u32 diff;
  683. /* are storm stats valid? */
  684. if (le16_to_cpu(xclient->stats_counter) != cur_stats_counter) {
  685. DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm"
  686. " xstorm counter (0x%x) != stats_counter (0x%x)\n",
  687. i, xclient->stats_counter, cur_stats_counter + 1);
  688. return -1;
  689. }
  690. if (le16_to_cpu(tclient->stats_counter) != cur_stats_counter) {
  691. DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm"
  692. " tstorm counter (0x%x) != stats_counter (0x%x)\n",
  693. i, tclient->stats_counter, cur_stats_counter + 1);
  694. return -2;
  695. }
  696. if (le16_to_cpu(uclient->stats_counter) != cur_stats_counter) {
  697. DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm"
  698. " ustorm counter (0x%x) != stats_counter (0x%x)\n",
  699. i, uclient->stats_counter, cur_stats_counter + 1);
  700. return -4;
  701. }
  702. qstats->total_bytes_received_hi =
  703. le32_to_cpu(tclient->rcv_broadcast_bytes.hi);
  704. qstats->total_bytes_received_lo =
  705. le32_to_cpu(tclient->rcv_broadcast_bytes.lo);
  706. ADD_64(qstats->total_bytes_received_hi,
  707. le32_to_cpu(tclient->rcv_multicast_bytes.hi),
  708. qstats->total_bytes_received_lo,
  709. le32_to_cpu(tclient->rcv_multicast_bytes.lo));
  710. ADD_64(qstats->total_bytes_received_hi,
  711. le32_to_cpu(tclient->rcv_unicast_bytes.hi),
  712. qstats->total_bytes_received_lo,
  713. le32_to_cpu(tclient->rcv_unicast_bytes.lo));
  714. SUB_64(qstats->total_bytes_received_hi,
  715. le32_to_cpu(uclient->bcast_no_buff_bytes.hi),
  716. qstats->total_bytes_received_lo,
  717. le32_to_cpu(uclient->bcast_no_buff_bytes.lo));
  718. SUB_64(qstats->total_bytes_received_hi,
  719. le32_to_cpu(uclient->mcast_no_buff_bytes.hi),
  720. qstats->total_bytes_received_lo,
  721. le32_to_cpu(uclient->mcast_no_buff_bytes.lo));
  722. SUB_64(qstats->total_bytes_received_hi,
  723. le32_to_cpu(uclient->ucast_no_buff_bytes.hi),
  724. qstats->total_bytes_received_lo,
  725. le32_to_cpu(uclient->ucast_no_buff_bytes.lo));
  726. qstats->valid_bytes_received_hi =
  727. qstats->total_bytes_received_hi;
  728. qstats->valid_bytes_received_lo =
  729. qstats->total_bytes_received_lo;
  730. qstats->error_bytes_received_hi =
  731. le32_to_cpu(tclient->rcv_error_bytes.hi);
  732. qstats->error_bytes_received_lo =
  733. le32_to_cpu(tclient->rcv_error_bytes.lo);
  734. ADD_64(qstats->total_bytes_received_hi,
  735. qstats->error_bytes_received_hi,
  736. qstats->total_bytes_received_lo,
  737. qstats->error_bytes_received_lo);
  738. UPDATE_EXTEND_TSTAT(rcv_unicast_pkts,
  739. total_unicast_packets_received);
  740. UPDATE_EXTEND_TSTAT(rcv_multicast_pkts,
  741. total_multicast_packets_received);
  742. UPDATE_EXTEND_TSTAT(rcv_broadcast_pkts,
  743. total_broadcast_packets_received);
  744. UPDATE_EXTEND_TSTAT(packets_too_big_discard,
  745. etherstatsoverrsizepkts);
  746. UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard);
  747. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  748. total_unicast_packets_received);
  749. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  750. total_multicast_packets_received);
  751. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  752. total_broadcast_packets_received);
  753. UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard);
  754. UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard);
  755. UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard);
  756. qstats->total_bytes_transmitted_hi =
  757. le32_to_cpu(xclient->unicast_bytes_sent.hi);
  758. qstats->total_bytes_transmitted_lo =
  759. le32_to_cpu(xclient->unicast_bytes_sent.lo);
  760. ADD_64(qstats->total_bytes_transmitted_hi,
  761. le32_to_cpu(xclient->multicast_bytes_sent.hi),
  762. qstats->total_bytes_transmitted_lo,
  763. le32_to_cpu(xclient->multicast_bytes_sent.lo));
  764. ADD_64(qstats->total_bytes_transmitted_hi,
  765. le32_to_cpu(xclient->broadcast_bytes_sent.hi),
  766. qstats->total_bytes_transmitted_lo,
  767. le32_to_cpu(xclient->broadcast_bytes_sent.lo));
  768. UPDATE_EXTEND_XSTAT(unicast_pkts_sent,
  769. total_unicast_packets_transmitted);
  770. UPDATE_EXTEND_XSTAT(multicast_pkts_sent,
  771. total_multicast_packets_transmitted);
  772. UPDATE_EXTEND_XSTAT(broadcast_pkts_sent,
  773. total_broadcast_packets_transmitted);
  774. old_tclient->checksum_discard = tclient->checksum_discard;
  775. old_tclient->ttl0_discard = tclient->ttl0_discard;
  776. ADD_64(fstats->total_bytes_received_hi,
  777. qstats->total_bytes_received_hi,
  778. fstats->total_bytes_received_lo,
  779. qstats->total_bytes_received_lo);
  780. ADD_64(fstats->total_bytes_transmitted_hi,
  781. qstats->total_bytes_transmitted_hi,
  782. fstats->total_bytes_transmitted_lo,
  783. qstats->total_bytes_transmitted_lo);
  784. ADD_64(fstats->total_unicast_packets_received_hi,
  785. qstats->total_unicast_packets_received_hi,
  786. fstats->total_unicast_packets_received_lo,
  787. qstats->total_unicast_packets_received_lo);
  788. ADD_64(fstats->total_multicast_packets_received_hi,
  789. qstats->total_multicast_packets_received_hi,
  790. fstats->total_multicast_packets_received_lo,
  791. qstats->total_multicast_packets_received_lo);
  792. ADD_64(fstats->total_broadcast_packets_received_hi,
  793. qstats->total_broadcast_packets_received_hi,
  794. fstats->total_broadcast_packets_received_lo,
  795. qstats->total_broadcast_packets_received_lo);
  796. ADD_64(fstats->total_unicast_packets_transmitted_hi,
  797. qstats->total_unicast_packets_transmitted_hi,
  798. fstats->total_unicast_packets_transmitted_lo,
  799. qstats->total_unicast_packets_transmitted_lo);
  800. ADD_64(fstats->total_multicast_packets_transmitted_hi,
  801. qstats->total_multicast_packets_transmitted_hi,
  802. fstats->total_multicast_packets_transmitted_lo,
  803. qstats->total_multicast_packets_transmitted_lo);
  804. ADD_64(fstats->total_broadcast_packets_transmitted_hi,
  805. qstats->total_broadcast_packets_transmitted_hi,
  806. fstats->total_broadcast_packets_transmitted_lo,
  807. qstats->total_broadcast_packets_transmitted_lo);
  808. ADD_64(fstats->valid_bytes_received_hi,
  809. qstats->valid_bytes_received_hi,
  810. fstats->valid_bytes_received_lo,
  811. qstats->valid_bytes_received_lo);
  812. ADD_64(estats->error_bytes_received_hi,
  813. qstats->error_bytes_received_hi,
  814. estats->error_bytes_received_lo,
  815. qstats->error_bytes_received_lo);
  816. ADD_64(estats->etherstatsoverrsizepkts_hi,
  817. qstats->etherstatsoverrsizepkts_hi,
  818. estats->etherstatsoverrsizepkts_lo,
  819. qstats->etherstatsoverrsizepkts_lo);
  820. ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi,
  821. estats->no_buff_discard_lo, qstats->no_buff_discard_lo);
  822. }
  823. ADD_64(fstats->total_bytes_received_hi,
  824. estats->rx_stat_ifhcinbadoctets_hi,
  825. fstats->total_bytes_received_lo,
  826. estats->rx_stat_ifhcinbadoctets_lo);
  827. memcpy(estats, &(fstats->total_bytes_received_hi),
  828. sizeof(struct host_func_stats) - 2*sizeof(u32));
  829. ADD_64(estats->etherstatsoverrsizepkts_hi,
  830. estats->rx_stat_dot3statsframestoolong_hi,
  831. estats->etherstatsoverrsizepkts_lo,
  832. estats->rx_stat_dot3statsframestoolong_lo);
  833. ADD_64(estats->error_bytes_received_hi,
  834. estats->rx_stat_ifhcinbadoctets_hi,
  835. estats->error_bytes_received_lo,
  836. estats->rx_stat_ifhcinbadoctets_lo);
  837. if (bp->port.pmf) {
  838. estats->mac_filter_discard =
  839. le32_to_cpu(tport->mac_filter_discard);
  840. estats->xxoverflow_discard =
  841. le32_to_cpu(tport->xxoverflow_discard);
  842. estats->brb_truncate_discard =
  843. le32_to_cpu(tport->brb_truncate_discard);
  844. estats->mac_discard = le32_to_cpu(tport->mac_discard);
  845. }
  846. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  847. bp->stats_pending = 0;
  848. return 0;
  849. }
  850. static void bnx2x_net_stats_update(struct bnx2x *bp)
  851. {
  852. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  853. struct net_device_stats *nstats = &bp->dev->stats;
  854. unsigned long tmp;
  855. int i;
  856. nstats->rx_packets =
  857. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  858. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  859. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  860. nstats->tx_packets =
  861. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  862. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  863. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  864. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  865. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  866. tmp = estats->mac_discard;
  867. for_each_queue(bp, i)
  868. tmp += le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
  869. nstats->rx_dropped = tmp;
  870. nstats->tx_dropped = 0;
  871. nstats->multicast =
  872. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  873. nstats->collisions =
  874. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  875. nstats->rx_length_errors =
  876. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  877. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  878. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  879. bnx2x_hilo(&estats->brb_truncate_hi);
  880. nstats->rx_crc_errors =
  881. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  882. nstats->rx_frame_errors =
  883. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  884. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  885. nstats->rx_missed_errors = estats->xxoverflow_discard;
  886. nstats->rx_errors = nstats->rx_length_errors +
  887. nstats->rx_over_errors +
  888. nstats->rx_crc_errors +
  889. nstats->rx_frame_errors +
  890. nstats->rx_fifo_errors +
  891. nstats->rx_missed_errors;
  892. nstats->tx_aborted_errors =
  893. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  894. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  895. nstats->tx_carrier_errors =
  896. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  897. nstats->tx_fifo_errors = 0;
  898. nstats->tx_heartbeat_errors = 0;
  899. nstats->tx_window_errors = 0;
  900. nstats->tx_errors = nstats->tx_aborted_errors +
  901. nstats->tx_carrier_errors +
  902. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  903. }
  904. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  905. {
  906. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  907. int i;
  908. estats->driver_xoff = 0;
  909. estats->rx_err_discard_pkt = 0;
  910. estats->rx_skb_alloc_failed = 0;
  911. estats->hw_csum_err = 0;
  912. for_each_queue(bp, i) {
  913. struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
  914. estats->driver_xoff += qstats->driver_xoff;
  915. estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt;
  916. estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed;
  917. estats->hw_csum_err += qstats->hw_csum_err;
  918. }
  919. }
  920. static void bnx2x_stats_update(struct bnx2x *bp)
  921. {
  922. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  923. if (*stats_comp != DMAE_COMP_VAL)
  924. return;
  925. if (bp->port.pmf)
  926. bnx2x_hw_stats_update(bp);
  927. if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
  928. BNX2X_ERR("storm stats were not updated for 3 times\n");
  929. bnx2x_panic();
  930. return;
  931. }
  932. bnx2x_net_stats_update(bp);
  933. bnx2x_drv_stats_update(bp);
  934. if (netif_msg_timer(bp)) {
  935. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  936. int i;
  937. printk(KERN_DEBUG "%s: brb drops %u brb truncate %u\n",
  938. bp->dev->name,
  939. estats->brb_drop_lo, estats->brb_truncate_lo);
  940. for_each_queue(bp, i) {
  941. struct bnx2x_fastpath *fp = &bp->fp[i];
  942. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  943. printk(KERN_DEBUG "%s: rx usage(%4u) *rx_cons_sb(%u)"
  944. " rx pkt(%lu) rx calls(%lu %lu)\n",
  945. fp->name, (le16_to_cpu(*fp->rx_cons_sb) -
  946. fp->rx_comp_cons),
  947. le16_to_cpu(*fp->rx_cons_sb),
  948. bnx2x_hilo(&qstats->
  949. total_unicast_packets_received_hi),
  950. fp->rx_calls, fp->rx_pkt);
  951. }
  952. for_each_queue(bp, i) {
  953. struct bnx2x_fastpath *fp = &bp->fp[i];
  954. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  955. struct netdev_queue *txq =
  956. netdev_get_tx_queue(bp->dev, i);
  957. printk(KERN_DEBUG "%s: tx avail(%4u) *tx_cons_sb(%u)"
  958. " tx pkt(%lu) tx calls (%lu)"
  959. " %s (Xoff events %u)\n",
  960. fp->name, bnx2x_tx_avail(fp),
  961. le16_to_cpu(*fp->tx_cons_sb),
  962. bnx2x_hilo(&qstats->
  963. total_unicast_packets_transmitted_hi),
  964. fp->tx_pkt,
  965. (netif_tx_queue_stopped(txq) ? "Xoff" : "Xon"),
  966. qstats->driver_xoff);
  967. }
  968. }
  969. bnx2x_hw_stats_post(bp);
  970. bnx2x_storm_stats_post(bp);
  971. }
  972. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  973. {
  974. struct dmae_command *dmae;
  975. u32 opcode;
  976. int loader_idx = PMF_DMAE_C(bp);
  977. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  978. bp->executer_idx = 0;
  979. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  980. if (bp->port.port_stx) {
  981. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  982. if (bp->func_stx)
  983. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  984. opcode, DMAE_COMP_GRC);
  985. else
  986. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  987. opcode, DMAE_COMP_PCI);
  988. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  989. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  990. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  991. dmae->dst_addr_hi = 0;
  992. dmae->len = sizeof(struct host_port_stats) >> 2;
  993. if (bp->func_stx) {
  994. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  995. dmae->comp_addr_hi = 0;
  996. dmae->comp_val = 1;
  997. } else {
  998. dmae->comp_addr_lo =
  999. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1000. dmae->comp_addr_hi =
  1001. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1002. dmae->comp_val = DMAE_COMP_VAL;
  1003. *stats_comp = 0;
  1004. }
  1005. }
  1006. if (bp->func_stx) {
  1007. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1008. dmae->opcode =
  1009. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1010. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1011. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1012. dmae->dst_addr_lo = bp->func_stx >> 2;
  1013. dmae->dst_addr_hi = 0;
  1014. dmae->len = sizeof(struct host_func_stats) >> 2;
  1015. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1016. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1017. dmae->comp_val = DMAE_COMP_VAL;
  1018. *stats_comp = 0;
  1019. }
  1020. }
  1021. static void bnx2x_stats_stop(struct bnx2x *bp)
  1022. {
  1023. int update = 0;
  1024. bnx2x_stats_comp(bp);
  1025. if (bp->port.pmf)
  1026. update = (bnx2x_hw_stats_update(bp) == 0);
  1027. update |= (bnx2x_storm_stats_update(bp) == 0);
  1028. if (update) {
  1029. bnx2x_net_stats_update(bp);
  1030. if (bp->port.pmf)
  1031. bnx2x_port_stats_stop(bp);
  1032. bnx2x_hw_stats_post(bp);
  1033. bnx2x_stats_comp(bp);
  1034. }
  1035. }
  1036. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1037. {
  1038. }
  1039. static const struct {
  1040. void (*action)(struct bnx2x *bp);
  1041. enum bnx2x_stats_state next_state;
  1042. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1043. /* state event */
  1044. {
  1045. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1046. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1047. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1048. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1049. },
  1050. {
  1051. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1052. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1053. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1054. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1055. }
  1056. };
  1057. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1058. {
  1059. enum bnx2x_stats_state state;
  1060. if (unlikely(bp->panic))
  1061. return;
  1062. /* Protect a state change flow */
  1063. spin_lock_bh(&bp->stats_lock);
  1064. state = bp->stats_state;
  1065. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1066. spin_unlock_bh(&bp->stats_lock);
  1067. bnx2x_stats_stm[state][event].action(bp);
  1068. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1069. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1070. state, event, bp->stats_state);
  1071. }
  1072. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1073. {
  1074. struct dmae_command *dmae;
  1075. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1076. /* sanity */
  1077. if (!bp->port.pmf || !bp->port.port_stx) {
  1078. BNX2X_ERR("BUG!\n");
  1079. return;
  1080. }
  1081. bp->executer_idx = 0;
  1082. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1083. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1084. true, DMAE_COMP_PCI);
  1085. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1086. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1087. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1088. dmae->dst_addr_hi = 0;
  1089. dmae->len = sizeof(struct host_port_stats) >> 2;
  1090. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1091. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1092. dmae->comp_val = DMAE_COMP_VAL;
  1093. *stats_comp = 0;
  1094. bnx2x_hw_stats_post(bp);
  1095. bnx2x_stats_comp(bp);
  1096. }
  1097. static void bnx2x_func_stats_base_init(struct bnx2x *bp)
  1098. {
  1099. int vn, vn_max = IS_MF(bp) ? E1HVN_MAX : E1VN_MAX;
  1100. u32 func_stx;
  1101. /* sanity */
  1102. if (!bp->port.pmf || !bp->func_stx) {
  1103. BNX2X_ERR("BUG!\n");
  1104. return;
  1105. }
  1106. /* save our func_stx */
  1107. func_stx = bp->func_stx;
  1108. for (vn = VN_0; vn < vn_max; vn++) {
  1109. int mb_idx = !CHIP_IS_E2(bp) ? 2*vn + BP_PORT(bp) : vn;
  1110. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1111. bnx2x_func_stats_init(bp);
  1112. bnx2x_hw_stats_post(bp);
  1113. bnx2x_stats_comp(bp);
  1114. }
  1115. /* restore our func_stx */
  1116. bp->func_stx = func_stx;
  1117. }
  1118. static void bnx2x_func_stats_base_update(struct bnx2x *bp)
  1119. {
  1120. struct dmae_command *dmae = &bp->stats_dmae;
  1121. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1122. /* sanity */
  1123. if (!bp->func_stx) {
  1124. BNX2X_ERR("BUG!\n");
  1125. return;
  1126. }
  1127. bp->executer_idx = 0;
  1128. memset(dmae, 0, sizeof(struct dmae_command));
  1129. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  1130. true, DMAE_COMP_PCI);
  1131. dmae->src_addr_lo = bp->func_stx >> 2;
  1132. dmae->src_addr_hi = 0;
  1133. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base));
  1134. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base));
  1135. dmae->len = sizeof(struct host_func_stats) >> 2;
  1136. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1137. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1138. dmae->comp_val = DMAE_COMP_VAL;
  1139. *stats_comp = 0;
  1140. bnx2x_hw_stats_post(bp);
  1141. bnx2x_stats_comp(bp);
  1142. }
  1143. void bnx2x_stats_init(struct bnx2x *bp)
  1144. {
  1145. int port = BP_PORT(bp);
  1146. int mb_idx = BP_FW_MB_IDX(bp);
  1147. int i;
  1148. struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
  1149. bp->stats_pending = 0;
  1150. bp->executer_idx = 0;
  1151. bp->stats_counter = 0;
  1152. /* port and func stats for management */
  1153. if (!BP_NOMCP(bp)) {
  1154. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1155. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1156. } else {
  1157. bp->port.port_stx = 0;
  1158. bp->func_stx = 0;
  1159. }
  1160. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1161. bp->port.port_stx, bp->func_stx);
  1162. /* port stats */
  1163. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1164. bp->port.old_nig_stats.brb_discard =
  1165. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1166. bp->port.old_nig_stats.brb_truncate =
  1167. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1168. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1169. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1170. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1171. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1172. /* function stats */
  1173. for_each_queue(bp, i) {
  1174. struct bnx2x_fastpath *fp = &bp->fp[i];
  1175. memset(&fp->old_tclient, 0,
  1176. sizeof(struct tstorm_per_client_stats));
  1177. memset(&fp->old_uclient, 0,
  1178. sizeof(struct ustorm_per_client_stats));
  1179. memset(&fp->old_xclient, 0,
  1180. sizeof(struct xstorm_per_client_stats));
  1181. memset(&fp->eth_q_stats, 0, sizeof(struct bnx2x_eth_q_stats));
  1182. }
  1183. for_each_queue(bp, i) {
  1184. /* Set initial stats counter in the stats ramrod data to -1 */
  1185. int cl_id = bp->fp[i].cl_id;
  1186. stats->xstorm_common.client_statistics[cl_id].
  1187. stats_counter = 0xffff;
  1188. stats->ustorm_common.client_statistics[cl_id].
  1189. stats_counter = 0xffff;
  1190. stats->tstorm_common.client_statistics[cl_id].
  1191. stats_counter = 0xffff;
  1192. }
  1193. memset(&bp->dev->stats, 0, sizeof(struct net_device_stats));
  1194. memset(&bp->eth_stats, 0, sizeof(struct bnx2x_eth_stats));
  1195. bp->stats_state = STATS_STATE_DISABLED;
  1196. if (bp->port.pmf) {
  1197. if (bp->port.port_stx)
  1198. bnx2x_port_stats_base_init(bp);
  1199. if (bp->func_stx)
  1200. bnx2x_func_stats_base_init(bp);
  1201. } else if (bp->func_stx)
  1202. bnx2x_func_stats_base_update(bp);
  1203. }