bnad_ethtool.c 33 KB

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  1. /*
  2. * Linux network driver for Brocade Converged Network Adapter.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License (GPL) Version 2 as
  6. * published by the Free Software Foundation
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. /*
  14. * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15. * All rights reserved
  16. * www.brocade.com
  17. */
  18. #include "cna.h"
  19. #include <linux/netdevice.h>
  20. #include <linux/skbuff.h>
  21. #include <linux/ethtool.h>
  22. #include <linux/rtnetlink.h>
  23. #include "bna.h"
  24. #include "bnad.h"
  25. #define BNAD_NUM_TXF_COUNTERS 12
  26. #define BNAD_NUM_RXF_COUNTERS 10
  27. #define BNAD_NUM_CQ_COUNTERS 3
  28. #define BNAD_NUM_RXQ_COUNTERS 6
  29. #define BNAD_NUM_TXQ_COUNTERS 5
  30. #define BNAD_ETHTOOL_STATS_NUM \
  31. (sizeof(struct rtnl_link_stats64) / sizeof(u64) + \
  32. sizeof(struct bnad_drv_stats) / sizeof(u64) + \
  33. offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64))
  34. static char *bnad_net_stats_strings[BNAD_ETHTOOL_STATS_NUM] = {
  35. "rx_packets",
  36. "tx_packets",
  37. "rx_bytes",
  38. "tx_bytes",
  39. "rx_errors",
  40. "tx_errors",
  41. "rx_dropped",
  42. "tx_dropped",
  43. "multicast",
  44. "collisions",
  45. "rx_length_errors",
  46. "rx_over_errors",
  47. "rx_crc_errors",
  48. "rx_frame_errors",
  49. "rx_fifo_errors",
  50. "rx_missed_errors",
  51. "tx_aborted_errors",
  52. "tx_carrier_errors",
  53. "tx_fifo_errors",
  54. "tx_heartbeat_errors",
  55. "tx_window_errors",
  56. "rx_compressed",
  57. "tx_compressed",
  58. "netif_queue_stop",
  59. "netif_queue_wakeup",
  60. "tso4",
  61. "tso6",
  62. "tso_err",
  63. "tcpcsum_offload",
  64. "udpcsum_offload",
  65. "csum_help",
  66. "csum_help_err",
  67. "hw_stats_updates",
  68. "netif_rx_schedule",
  69. "netif_rx_complete",
  70. "netif_rx_dropped",
  71. "link_toggle",
  72. "cee_up",
  73. "rxp_info_alloc_failed",
  74. "mbox_intr_disabled",
  75. "mbox_intr_enabled",
  76. "tx_unmap_q_alloc_failed",
  77. "rx_unmap_q_alloc_failed",
  78. "rxbuf_alloc_failed",
  79. "mac_frame_64",
  80. "mac_frame_65_127",
  81. "mac_frame_128_255",
  82. "mac_frame_256_511",
  83. "mac_frame_512_1023",
  84. "mac_frame_1024_1518",
  85. "mac_frame_1518_1522",
  86. "mac_rx_bytes",
  87. "mac_rx_packets",
  88. "mac_rx_fcs_error",
  89. "mac_rx_multicast",
  90. "mac_rx_broadcast",
  91. "mac_rx_control_frames",
  92. "mac_rx_pause",
  93. "mac_rx_unknown_opcode",
  94. "mac_rx_alignment_error",
  95. "mac_rx_frame_length_error",
  96. "mac_rx_code_error",
  97. "mac_rx_carrier_sense_error",
  98. "mac_rx_undersize",
  99. "mac_rx_oversize",
  100. "mac_rx_fragments",
  101. "mac_rx_jabber",
  102. "mac_rx_drop",
  103. "mac_tx_bytes",
  104. "mac_tx_packets",
  105. "mac_tx_multicast",
  106. "mac_tx_broadcast",
  107. "mac_tx_pause",
  108. "mac_tx_deferral",
  109. "mac_tx_excessive_deferral",
  110. "mac_tx_single_collision",
  111. "mac_tx_muliple_collision",
  112. "mac_tx_late_collision",
  113. "mac_tx_excessive_collision",
  114. "mac_tx_total_collision",
  115. "mac_tx_pause_honored",
  116. "mac_tx_drop",
  117. "mac_tx_jabber",
  118. "mac_tx_fcs_error",
  119. "mac_tx_control_frame",
  120. "mac_tx_oversize",
  121. "mac_tx_undersize",
  122. "mac_tx_fragments",
  123. "bpc_tx_pause_0",
  124. "bpc_tx_pause_1",
  125. "bpc_tx_pause_2",
  126. "bpc_tx_pause_3",
  127. "bpc_tx_pause_4",
  128. "bpc_tx_pause_5",
  129. "bpc_tx_pause_6",
  130. "bpc_tx_pause_7",
  131. "bpc_tx_zero_pause_0",
  132. "bpc_tx_zero_pause_1",
  133. "bpc_tx_zero_pause_2",
  134. "bpc_tx_zero_pause_3",
  135. "bpc_tx_zero_pause_4",
  136. "bpc_tx_zero_pause_5",
  137. "bpc_tx_zero_pause_6",
  138. "bpc_tx_zero_pause_7",
  139. "bpc_tx_first_pause_0",
  140. "bpc_tx_first_pause_1",
  141. "bpc_tx_first_pause_2",
  142. "bpc_tx_first_pause_3",
  143. "bpc_tx_first_pause_4",
  144. "bpc_tx_first_pause_5",
  145. "bpc_tx_first_pause_6",
  146. "bpc_tx_first_pause_7",
  147. "bpc_rx_pause_0",
  148. "bpc_rx_pause_1",
  149. "bpc_rx_pause_2",
  150. "bpc_rx_pause_3",
  151. "bpc_rx_pause_4",
  152. "bpc_rx_pause_5",
  153. "bpc_rx_pause_6",
  154. "bpc_rx_pause_7",
  155. "bpc_rx_zero_pause_0",
  156. "bpc_rx_zero_pause_1",
  157. "bpc_rx_zero_pause_2",
  158. "bpc_rx_zero_pause_3",
  159. "bpc_rx_zero_pause_4",
  160. "bpc_rx_zero_pause_5",
  161. "bpc_rx_zero_pause_6",
  162. "bpc_rx_zero_pause_7",
  163. "bpc_rx_first_pause_0",
  164. "bpc_rx_first_pause_1",
  165. "bpc_rx_first_pause_2",
  166. "bpc_rx_first_pause_3",
  167. "bpc_rx_first_pause_4",
  168. "bpc_rx_first_pause_5",
  169. "bpc_rx_first_pause_6",
  170. "bpc_rx_first_pause_7",
  171. "rad_rx_frames",
  172. "rad_rx_octets",
  173. "rad_rx_vlan_frames",
  174. "rad_rx_ucast",
  175. "rad_rx_ucast_octets",
  176. "rad_rx_ucast_vlan",
  177. "rad_rx_mcast",
  178. "rad_rx_mcast_octets",
  179. "rad_rx_mcast_vlan",
  180. "rad_rx_bcast",
  181. "rad_rx_bcast_octets",
  182. "rad_rx_bcast_vlan",
  183. "rad_rx_drops",
  184. "fc_rx_ucast_octets",
  185. "fc_rx_ucast",
  186. "fc_rx_ucast_vlan",
  187. "fc_rx_mcast_octets",
  188. "fc_rx_mcast",
  189. "fc_rx_mcast_vlan",
  190. "fc_rx_bcast_octets",
  191. "fc_rx_bcast",
  192. "fc_rx_bcast_vlan",
  193. "fc_tx_ucast_octets",
  194. "fc_tx_ucast",
  195. "fc_tx_ucast_vlan",
  196. "fc_tx_mcast_octets",
  197. "fc_tx_mcast",
  198. "fc_tx_mcast_vlan",
  199. "fc_tx_bcast_octets",
  200. "fc_tx_bcast",
  201. "fc_tx_bcast_vlan",
  202. "fc_tx_parity_errors",
  203. "fc_tx_timeout",
  204. "fc_tx_fid_parity_errors",
  205. };
  206. static int
  207. bnad_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
  208. {
  209. cmd->supported = SUPPORTED_10000baseT_Full;
  210. cmd->advertising = ADVERTISED_10000baseT_Full;
  211. cmd->autoneg = AUTONEG_DISABLE;
  212. cmd->supported |= SUPPORTED_FIBRE;
  213. cmd->advertising |= ADVERTISED_FIBRE;
  214. cmd->port = PORT_FIBRE;
  215. cmd->phy_address = 0;
  216. if (netif_carrier_ok(netdev)) {
  217. cmd->speed = SPEED_10000;
  218. cmd->duplex = DUPLEX_FULL;
  219. } else {
  220. cmd->speed = -1;
  221. cmd->duplex = -1;
  222. }
  223. cmd->transceiver = XCVR_EXTERNAL;
  224. cmd->maxtxpkt = 0;
  225. cmd->maxrxpkt = 0;
  226. return 0;
  227. }
  228. static int
  229. bnad_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
  230. {
  231. /* 10G full duplex setting supported only */
  232. if (cmd->autoneg == AUTONEG_ENABLE)
  233. return -EOPNOTSUPP; else {
  234. if ((cmd->speed == SPEED_10000) && (cmd->duplex == DUPLEX_FULL))
  235. return 0;
  236. }
  237. return -EOPNOTSUPP;
  238. }
  239. static void
  240. bnad_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
  241. {
  242. struct bnad *bnad = netdev_priv(netdev);
  243. struct bfa_ioc_attr *ioc_attr;
  244. unsigned long flags;
  245. strcpy(drvinfo->driver, BNAD_NAME);
  246. strcpy(drvinfo->version, BNAD_VERSION);
  247. ioc_attr = kzalloc(sizeof(*ioc_attr), GFP_KERNEL);
  248. if (ioc_attr) {
  249. memset(ioc_attr, 0, sizeof(*ioc_attr));
  250. spin_lock_irqsave(&bnad->bna_lock, flags);
  251. bfa_nw_ioc_get_attr(&bnad->bna.device.ioc, ioc_attr);
  252. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  253. strncpy(drvinfo->fw_version, ioc_attr->adapter_attr.fw_ver,
  254. sizeof(drvinfo->fw_version) - 1);
  255. kfree(ioc_attr);
  256. }
  257. strncpy(drvinfo->bus_info, pci_name(bnad->pcidev), ETHTOOL_BUSINFO_LEN);
  258. }
  259. static int
  260. get_regs(struct bnad *bnad, u32 * regs)
  261. {
  262. int num = 0, i;
  263. u32 reg_addr;
  264. unsigned long flags;
  265. #define BNAD_GET_REG(addr) \
  266. do { \
  267. if (regs) \
  268. regs[num++] = readl(bnad->bar0 + (addr)); \
  269. else \
  270. num++; \
  271. } while (0)
  272. spin_lock_irqsave(&bnad->bna_lock, flags);
  273. /* DMA Block Internal Registers */
  274. BNAD_GET_REG(DMA_CTRL_REG0);
  275. BNAD_GET_REG(DMA_CTRL_REG1);
  276. BNAD_GET_REG(DMA_ERR_INT_STATUS);
  277. BNAD_GET_REG(DMA_ERR_INT_ENABLE);
  278. BNAD_GET_REG(DMA_ERR_INT_STATUS_SET);
  279. /* APP Block Register Address Offset from BAR0 */
  280. BNAD_GET_REG(HOSTFN0_INT_STATUS);
  281. BNAD_GET_REG(HOSTFN0_INT_MASK);
  282. BNAD_GET_REG(HOST_PAGE_NUM_FN0);
  283. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN0);
  284. BNAD_GET_REG(FN0_PCIE_ERR_REG);
  285. BNAD_GET_REG(FN0_ERR_TYPE_STATUS_REG);
  286. BNAD_GET_REG(FN0_ERR_TYPE_MSK_STATUS_REG);
  287. BNAD_GET_REG(HOSTFN1_INT_STATUS);
  288. BNAD_GET_REG(HOSTFN1_INT_MASK);
  289. BNAD_GET_REG(HOST_PAGE_NUM_FN1);
  290. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN1);
  291. BNAD_GET_REG(FN1_PCIE_ERR_REG);
  292. BNAD_GET_REG(FN1_ERR_TYPE_STATUS_REG);
  293. BNAD_GET_REG(FN1_ERR_TYPE_MSK_STATUS_REG);
  294. BNAD_GET_REG(PCIE_MISC_REG);
  295. BNAD_GET_REG(HOST_SEM0_REG);
  296. BNAD_GET_REG(HOST_SEM1_REG);
  297. BNAD_GET_REG(HOST_SEM2_REG);
  298. BNAD_GET_REG(HOST_SEM3_REG);
  299. BNAD_GET_REG(HOST_SEM0_INFO_REG);
  300. BNAD_GET_REG(HOST_SEM1_INFO_REG);
  301. BNAD_GET_REG(HOST_SEM2_INFO_REG);
  302. BNAD_GET_REG(HOST_SEM3_INFO_REG);
  303. BNAD_GET_REG(TEMPSENSE_CNTL_REG);
  304. BNAD_GET_REG(TEMPSENSE_STAT_REG);
  305. BNAD_GET_REG(APP_LOCAL_ERR_STAT);
  306. BNAD_GET_REG(APP_LOCAL_ERR_MSK);
  307. BNAD_GET_REG(PCIE_LNK_ERR_STAT);
  308. BNAD_GET_REG(PCIE_LNK_ERR_MSK);
  309. BNAD_GET_REG(FCOE_FIP_ETH_TYPE);
  310. BNAD_GET_REG(RESV_ETH_TYPE);
  311. BNAD_GET_REG(HOSTFN2_INT_STATUS);
  312. BNAD_GET_REG(HOSTFN2_INT_MASK);
  313. BNAD_GET_REG(HOST_PAGE_NUM_FN2);
  314. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN2);
  315. BNAD_GET_REG(FN2_PCIE_ERR_REG);
  316. BNAD_GET_REG(FN2_ERR_TYPE_STATUS_REG);
  317. BNAD_GET_REG(FN2_ERR_TYPE_MSK_STATUS_REG);
  318. BNAD_GET_REG(HOSTFN3_INT_STATUS);
  319. BNAD_GET_REG(HOSTFN3_INT_MASK);
  320. BNAD_GET_REG(HOST_PAGE_NUM_FN3);
  321. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN3);
  322. BNAD_GET_REG(FN3_PCIE_ERR_REG);
  323. BNAD_GET_REG(FN3_ERR_TYPE_STATUS_REG);
  324. BNAD_GET_REG(FN3_ERR_TYPE_MSK_STATUS_REG);
  325. /* Host Command Status Registers */
  326. reg_addr = HOST_CMDSTS0_CLR_REG;
  327. for (i = 0; i < 16; i++) {
  328. BNAD_GET_REG(reg_addr);
  329. BNAD_GET_REG(reg_addr + 4);
  330. BNAD_GET_REG(reg_addr + 8);
  331. reg_addr += 0x10;
  332. }
  333. /* Function ID register */
  334. BNAD_GET_REG(FNC_ID_REG);
  335. /* Function personality register */
  336. BNAD_GET_REG(FNC_PERS_REG);
  337. /* Operation mode register */
  338. BNAD_GET_REG(OP_MODE);
  339. /* LPU0 Registers */
  340. BNAD_GET_REG(LPU0_MBOX_CTL_REG);
  341. BNAD_GET_REG(LPU0_MBOX_CMD_REG);
  342. BNAD_GET_REG(LPU0_MBOX_LINK_0REG);
  343. BNAD_GET_REG(LPU1_MBOX_LINK_0REG);
  344. BNAD_GET_REG(LPU0_MBOX_STATUS_0REG);
  345. BNAD_GET_REG(LPU1_MBOX_STATUS_0REG);
  346. BNAD_GET_REG(LPU0_ERR_STATUS_REG);
  347. BNAD_GET_REG(LPU0_ERR_SET_REG);
  348. /* LPU1 Registers */
  349. BNAD_GET_REG(LPU1_MBOX_CTL_REG);
  350. BNAD_GET_REG(LPU1_MBOX_CMD_REG);
  351. BNAD_GET_REG(LPU0_MBOX_LINK_1REG);
  352. BNAD_GET_REG(LPU1_MBOX_LINK_1REG);
  353. BNAD_GET_REG(LPU0_MBOX_STATUS_1REG);
  354. BNAD_GET_REG(LPU1_MBOX_STATUS_1REG);
  355. BNAD_GET_REG(LPU1_ERR_STATUS_REG);
  356. BNAD_GET_REG(LPU1_ERR_SET_REG);
  357. /* PSS Registers */
  358. BNAD_GET_REG(PSS_CTL_REG);
  359. BNAD_GET_REG(PSS_ERR_STATUS_REG);
  360. BNAD_GET_REG(ERR_STATUS_SET);
  361. BNAD_GET_REG(PSS_RAM_ERR_STATUS_REG);
  362. /* Catapult CPQ Registers */
  363. BNAD_GET_REG(HOSTFN0_LPU0_MBOX0_CMD_STAT);
  364. BNAD_GET_REG(HOSTFN0_LPU1_MBOX0_CMD_STAT);
  365. BNAD_GET_REG(LPU0_HOSTFN0_MBOX0_CMD_STAT);
  366. BNAD_GET_REG(LPU1_HOSTFN0_MBOX0_CMD_STAT);
  367. BNAD_GET_REG(HOSTFN0_LPU0_MBOX1_CMD_STAT);
  368. BNAD_GET_REG(HOSTFN0_LPU1_MBOX1_CMD_STAT);
  369. BNAD_GET_REG(LPU0_HOSTFN0_MBOX1_CMD_STAT);
  370. BNAD_GET_REG(LPU1_HOSTFN0_MBOX1_CMD_STAT);
  371. BNAD_GET_REG(HOSTFN1_LPU0_MBOX0_CMD_STAT);
  372. BNAD_GET_REG(HOSTFN1_LPU1_MBOX0_CMD_STAT);
  373. BNAD_GET_REG(LPU0_HOSTFN1_MBOX0_CMD_STAT);
  374. BNAD_GET_REG(LPU1_HOSTFN1_MBOX0_CMD_STAT);
  375. BNAD_GET_REG(HOSTFN1_LPU0_MBOX1_CMD_STAT);
  376. BNAD_GET_REG(HOSTFN1_LPU1_MBOX1_CMD_STAT);
  377. BNAD_GET_REG(LPU0_HOSTFN1_MBOX1_CMD_STAT);
  378. BNAD_GET_REG(LPU1_HOSTFN1_MBOX1_CMD_STAT);
  379. BNAD_GET_REG(HOSTFN2_LPU0_MBOX0_CMD_STAT);
  380. BNAD_GET_REG(HOSTFN2_LPU1_MBOX0_CMD_STAT);
  381. BNAD_GET_REG(LPU0_HOSTFN2_MBOX0_CMD_STAT);
  382. BNAD_GET_REG(LPU1_HOSTFN2_MBOX0_CMD_STAT);
  383. BNAD_GET_REG(HOSTFN2_LPU0_MBOX1_CMD_STAT);
  384. BNAD_GET_REG(HOSTFN2_LPU1_MBOX1_CMD_STAT);
  385. BNAD_GET_REG(LPU0_HOSTFN2_MBOX1_CMD_STAT);
  386. BNAD_GET_REG(LPU1_HOSTFN2_MBOX1_CMD_STAT);
  387. BNAD_GET_REG(HOSTFN3_LPU0_MBOX0_CMD_STAT);
  388. BNAD_GET_REG(HOSTFN3_LPU1_MBOX0_CMD_STAT);
  389. BNAD_GET_REG(LPU0_HOSTFN3_MBOX0_CMD_STAT);
  390. BNAD_GET_REG(LPU1_HOSTFN3_MBOX0_CMD_STAT);
  391. BNAD_GET_REG(HOSTFN3_LPU0_MBOX1_CMD_STAT);
  392. BNAD_GET_REG(HOSTFN3_LPU1_MBOX1_CMD_STAT);
  393. BNAD_GET_REG(LPU0_HOSTFN3_MBOX1_CMD_STAT);
  394. BNAD_GET_REG(LPU1_HOSTFN3_MBOX1_CMD_STAT);
  395. /* Host Function Force Parity Error Registers */
  396. BNAD_GET_REG(HOSTFN0_LPU_FORCE_PERR);
  397. BNAD_GET_REG(HOSTFN1_LPU_FORCE_PERR);
  398. BNAD_GET_REG(HOSTFN2_LPU_FORCE_PERR);
  399. BNAD_GET_REG(HOSTFN3_LPU_FORCE_PERR);
  400. /* LL Port[0|1] Halt Mask Registers */
  401. BNAD_GET_REG(LL_HALT_MSK_P0);
  402. BNAD_GET_REG(LL_HALT_MSK_P1);
  403. /* LL Port[0|1] Error Mask Registers */
  404. BNAD_GET_REG(LL_ERR_MSK_P0);
  405. BNAD_GET_REG(LL_ERR_MSK_P1);
  406. /* EMC FLI Registers */
  407. BNAD_GET_REG(FLI_CMD_REG);
  408. BNAD_GET_REG(FLI_ADDR_REG);
  409. BNAD_GET_REG(FLI_CTL_REG);
  410. BNAD_GET_REG(FLI_WRDATA_REG);
  411. BNAD_GET_REG(FLI_RDDATA_REG);
  412. BNAD_GET_REG(FLI_DEV_STATUS_REG);
  413. BNAD_GET_REG(FLI_SIG_WD_REG);
  414. BNAD_GET_REG(FLI_DEV_VENDOR_REG);
  415. BNAD_GET_REG(FLI_ERR_STATUS_REG);
  416. /* RxAdm 0 Registers */
  417. BNAD_GET_REG(RAD0_CTL_REG);
  418. BNAD_GET_REG(RAD0_PE_PARM_REG);
  419. BNAD_GET_REG(RAD0_BCN_REG);
  420. BNAD_GET_REG(RAD0_DEFAULT_REG);
  421. BNAD_GET_REG(RAD0_PROMISC_REG);
  422. BNAD_GET_REG(RAD0_BCNQ_REG);
  423. BNAD_GET_REG(RAD0_DEFAULTQ_REG);
  424. BNAD_GET_REG(RAD0_ERR_STS);
  425. BNAD_GET_REG(RAD0_SET_ERR_STS);
  426. BNAD_GET_REG(RAD0_ERR_INT_EN);
  427. BNAD_GET_REG(RAD0_FIRST_ERR);
  428. BNAD_GET_REG(RAD0_FORCE_ERR);
  429. BNAD_GET_REG(RAD0_MAC_MAN_1H);
  430. BNAD_GET_REG(RAD0_MAC_MAN_1L);
  431. BNAD_GET_REG(RAD0_MAC_MAN_2H);
  432. BNAD_GET_REG(RAD0_MAC_MAN_2L);
  433. BNAD_GET_REG(RAD0_MAC_MAN_3H);
  434. BNAD_GET_REG(RAD0_MAC_MAN_3L);
  435. BNAD_GET_REG(RAD0_MAC_MAN_4H);
  436. BNAD_GET_REG(RAD0_MAC_MAN_4L);
  437. BNAD_GET_REG(RAD0_LAST4_IP);
  438. /* RxAdm 1 Registers */
  439. BNAD_GET_REG(RAD1_CTL_REG);
  440. BNAD_GET_REG(RAD1_PE_PARM_REG);
  441. BNAD_GET_REG(RAD1_BCN_REG);
  442. BNAD_GET_REG(RAD1_DEFAULT_REG);
  443. BNAD_GET_REG(RAD1_PROMISC_REG);
  444. BNAD_GET_REG(RAD1_BCNQ_REG);
  445. BNAD_GET_REG(RAD1_DEFAULTQ_REG);
  446. BNAD_GET_REG(RAD1_ERR_STS);
  447. BNAD_GET_REG(RAD1_SET_ERR_STS);
  448. BNAD_GET_REG(RAD1_ERR_INT_EN);
  449. /* TxA0 Registers */
  450. BNAD_GET_REG(TXA0_CTRL_REG);
  451. /* TxA0 TSO Sequence # Registers (RO) */
  452. for (i = 0; i < 8; i++) {
  453. BNAD_GET_REG(TXA0_TSO_TCP_SEQ_REG(i));
  454. BNAD_GET_REG(TXA0_TSO_IP_INFO_REG(i));
  455. }
  456. /* TxA1 Registers */
  457. BNAD_GET_REG(TXA1_CTRL_REG);
  458. /* TxA1 TSO Sequence # Registers (RO) */
  459. for (i = 0; i < 8; i++) {
  460. BNAD_GET_REG(TXA1_TSO_TCP_SEQ_REG(i));
  461. BNAD_GET_REG(TXA1_TSO_IP_INFO_REG(i));
  462. }
  463. /* RxA Registers */
  464. BNAD_GET_REG(RXA0_CTL_REG);
  465. BNAD_GET_REG(RXA1_CTL_REG);
  466. /* PLB0 Registers */
  467. BNAD_GET_REG(PLB0_ECM_TIMER_REG);
  468. BNAD_GET_REG(PLB0_RL_CTL);
  469. for (i = 0; i < 8; i++)
  470. BNAD_GET_REG(PLB0_RL_MAX_BC(i));
  471. BNAD_GET_REG(PLB0_RL_TU_PRIO);
  472. for (i = 0; i < 8; i++)
  473. BNAD_GET_REG(PLB0_RL_BYTE_CNT(i));
  474. BNAD_GET_REG(PLB0_RL_MIN_REG);
  475. BNAD_GET_REG(PLB0_RL_MAX_REG);
  476. BNAD_GET_REG(PLB0_EMS_ADD_REG);
  477. /* PLB1 Registers */
  478. BNAD_GET_REG(PLB1_ECM_TIMER_REG);
  479. BNAD_GET_REG(PLB1_RL_CTL);
  480. for (i = 0; i < 8; i++)
  481. BNAD_GET_REG(PLB1_RL_MAX_BC(i));
  482. BNAD_GET_REG(PLB1_RL_TU_PRIO);
  483. for (i = 0; i < 8; i++)
  484. BNAD_GET_REG(PLB1_RL_BYTE_CNT(i));
  485. BNAD_GET_REG(PLB1_RL_MIN_REG);
  486. BNAD_GET_REG(PLB1_RL_MAX_REG);
  487. BNAD_GET_REG(PLB1_EMS_ADD_REG);
  488. /* HQM Control Register */
  489. BNAD_GET_REG(HQM0_CTL_REG);
  490. BNAD_GET_REG(HQM0_RXQ_STOP_SEM);
  491. BNAD_GET_REG(HQM0_TXQ_STOP_SEM);
  492. BNAD_GET_REG(HQM1_CTL_REG);
  493. BNAD_GET_REG(HQM1_RXQ_STOP_SEM);
  494. BNAD_GET_REG(HQM1_TXQ_STOP_SEM);
  495. /* LUT Registers */
  496. BNAD_GET_REG(LUT0_ERR_STS);
  497. BNAD_GET_REG(LUT0_SET_ERR_STS);
  498. BNAD_GET_REG(LUT1_ERR_STS);
  499. BNAD_GET_REG(LUT1_SET_ERR_STS);
  500. /* TRC Registers */
  501. BNAD_GET_REG(TRC_CTL_REG);
  502. BNAD_GET_REG(TRC_MODS_REG);
  503. BNAD_GET_REG(TRC_TRGC_REG);
  504. BNAD_GET_REG(TRC_CNT1_REG);
  505. BNAD_GET_REG(TRC_CNT2_REG);
  506. BNAD_GET_REG(TRC_NXTS_REG);
  507. BNAD_GET_REG(TRC_DIRR_REG);
  508. for (i = 0; i < 10; i++)
  509. BNAD_GET_REG(TRC_TRGM_REG(i));
  510. for (i = 0; i < 10; i++)
  511. BNAD_GET_REG(TRC_NXTM_REG(i));
  512. for (i = 0; i < 10; i++)
  513. BNAD_GET_REG(TRC_STRM_REG(i));
  514. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  515. #undef BNAD_GET_REG
  516. return num;
  517. }
  518. static int
  519. bnad_get_regs_len(struct net_device *netdev)
  520. {
  521. int ret = get_regs(netdev_priv(netdev), NULL) * sizeof(u32);
  522. return ret;
  523. }
  524. static void
  525. bnad_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *buf)
  526. {
  527. memset(buf, 0, bnad_get_regs_len(netdev));
  528. get_regs(netdev_priv(netdev), buf);
  529. }
  530. static void
  531. bnad_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wolinfo)
  532. {
  533. wolinfo->supported = 0;
  534. wolinfo->wolopts = 0;
  535. }
  536. static int
  537. bnad_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
  538. {
  539. struct bnad *bnad = netdev_priv(netdev);
  540. unsigned long flags;
  541. /* Lock rqd. to access bnad->bna_lock */
  542. spin_lock_irqsave(&bnad->bna_lock, flags);
  543. coalesce->use_adaptive_rx_coalesce =
  544. (bnad->cfg_flags & BNAD_CF_DIM_ENABLED) ? true : false;
  545. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  546. coalesce->rx_coalesce_usecs = bnad->rx_coalescing_timeo *
  547. BFI_COALESCING_TIMER_UNIT;
  548. coalesce->tx_coalesce_usecs = bnad->tx_coalescing_timeo *
  549. BFI_COALESCING_TIMER_UNIT;
  550. coalesce->tx_max_coalesced_frames = BFI_TX_INTERPKT_COUNT;
  551. return 0;
  552. }
  553. static int
  554. bnad_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
  555. {
  556. struct bnad *bnad = netdev_priv(netdev);
  557. unsigned long flags;
  558. int dim_timer_del = 0;
  559. if (coalesce->rx_coalesce_usecs == 0 ||
  560. coalesce->rx_coalesce_usecs >
  561. BFI_MAX_COALESCING_TIMEO * BFI_COALESCING_TIMER_UNIT)
  562. return -EINVAL;
  563. if (coalesce->tx_coalesce_usecs == 0 ||
  564. coalesce->tx_coalesce_usecs >
  565. BFI_MAX_COALESCING_TIMEO * BFI_COALESCING_TIMER_UNIT)
  566. return -EINVAL;
  567. mutex_lock(&bnad->conf_mutex);
  568. /*
  569. * Do not need to store rx_coalesce_usecs here
  570. * Every time DIM is disabled, we can get it from the
  571. * stack.
  572. */
  573. spin_lock_irqsave(&bnad->bna_lock, flags);
  574. if (coalesce->use_adaptive_rx_coalesce) {
  575. if (!(bnad->cfg_flags & BNAD_CF_DIM_ENABLED)) {
  576. bnad->cfg_flags |= BNAD_CF_DIM_ENABLED;
  577. bnad_dim_timer_start(bnad);
  578. }
  579. } else {
  580. if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED) {
  581. bnad->cfg_flags &= ~BNAD_CF_DIM_ENABLED;
  582. dim_timer_del = bnad_dim_timer_running(bnad);
  583. if (dim_timer_del) {
  584. clear_bit(BNAD_RF_DIM_TIMER_RUNNING,
  585. &bnad->run_flags);
  586. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  587. del_timer_sync(&bnad->dim_timer);
  588. spin_lock_irqsave(&bnad->bna_lock, flags);
  589. }
  590. bnad_rx_coalescing_timeo_set(bnad);
  591. }
  592. }
  593. if (bnad->tx_coalescing_timeo != coalesce->tx_coalesce_usecs /
  594. BFI_COALESCING_TIMER_UNIT) {
  595. bnad->tx_coalescing_timeo = coalesce->tx_coalesce_usecs /
  596. BFI_COALESCING_TIMER_UNIT;
  597. bnad_tx_coalescing_timeo_set(bnad);
  598. }
  599. if (bnad->rx_coalescing_timeo != coalesce->rx_coalesce_usecs /
  600. BFI_COALESCING_TIMER_UNIT) {
  601. bnad->rx_coalescing_timeo = coalesce->rx_coalesce_usecs /
  602. BFI_COALESCING_TIMER_UNIT;
  603. if (!(bnad->cfg_flags & BNAD_CF_DIM_ENABLED))
  604. bnad_rx_coalescing_timeo_set(bnad);
  605. }
  606. /* Add Tx Inter-pkt DMA count? */
  607. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  608. mutex_unlock(&bnad->conf_mutex);
  609. return 0;
  610. }
  611. static void
  612. bnad_get_ringparam(struct net_device *netdev,
  613. struct ethtool_ringparam *ringparam)
  614. {
  615. struct bnad *bnad = netdev_priv(netdev);
  616. ringparam->rx_max_pending = BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq;
  617. ringparam->rx_mini_max_pending = 0;
  618. ringparam->rx_jumbo_max_pending = 0;
  619. ringparam->tx_max_pending = BNAD_MAX_Q_DEPTH;
  620. ringparam->rx_pending = bnad->rxq_depth;
  621. ringparam->rx_mini_max_pending = 0;
  622. ringparam->rx_jumbo_max_pending = 0;
  623. ringparam->tx_pending = bnad->txq_depth;
  624. }
  625. static int
  626. bnad_set_ringparam(struct net_device *netdev,
  627. struct ethtool_ringparam *ringparam)
  628. {
  629. int i, current_err, err = 0;
  630. struct bnad *bnad = netdev_priv(netdev);
  631. mutex_lock(&bnad->conf_mutex);
  632. if (ringparam->rx_pending == bnad->rxq_depth &&
  633. ringparam->tx_pending == bnad->txq_depth) {
  634. mutex_unlock(&bnad->conf_mutex);
  635. return 0;
  636. }
  637. if (ringparam->rx_pending < BNAD_MIN_Q_DEPTH ||
  638. ringparam->rx_pending > BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq ||
  639. !BNA_POWER_OF_2(ringparam->rx_pending)) {
  640. mutex_unlock(&bnad->conf_mutex);
  641. return -EINVAL;
  642. }
  643. if (ringparam->tx_pending < BNAD_MIN_Q_DEPTH ||
  644. ringparam->tx_pending > BNAD_MAX_Q_DEPTH ||
  645. !BNA_POWER_OF_2(ringparam->tx_pending)) {
  646. mutex_unlock(&bnad->conf_mutex);
  647. return -EINVAL;
  648. }
  649. if (ringparam->rx_pending != bnad->rxq_depth) {
  650. bnad->rxq_depth = ringparam->rx_pending;
  651. for (i = 0; i < bnad->num_rx; i++) {
  652. if (!bnad->rx_info[i].rx)
  653. continue;
  654. bnad_cleanup_rx(bnad, i);
  655. current_err = bnad_setup_rx(bnad, i);
  656. if (current_err && !err)
  657. err = current_err;
  658. }
  659. }
  660. if (ringparam->tx_pending != bnad->txq_depth) {
  661. bnad->txq_depth = ringparam->tx_pending;
  662. for (i = 0; i < bnad->num_tx; i++) {
  663. if (!bnad->tx_info[i].tx)
  664. continue;
  665. bnad_cleanup_tx(bnad, i);
  666. current_err = bnad_setup_tx(bnad, i);
  667. if (current_err && !err)
  668. err = current_err;
  669. }
  670. }
  671. mutex_unlock(&bnad->conf_mutex);
  672. return err;
  673. }
  674. static void
  675. bnad_get_pauseparam(struct net_device *netdev,
  676. struct ethtool_pauseparam *pauseparam)
  677. {
  678. struct bnad *bnad = netdev_priv(netdev);
  679. pauseparam->autoneg = 0;
  680. pauseparam->rx_pause = bnad->bna.port.pause_config.rx_pause;
  681. pauseparam->tx_pause = bnad->bna.port.pause_config.tx_pause;
  682. }
  683. static int
  684. bnad_set_pauseparam(struct net_device *netdev,
  685. struct ethtool_pauseparam *pauseparam)
  686. {
  687. struct bnad *bnad = netdev_priv(netdev);
  688. struct bna_pause_config pause_config;
  689. unsigned long flags;
  690. if (pauseparam->autoneg == AUTONEG_ENABLE)
  691. return -EINVAL;
  692. mutex_lock(&bnad->conf_mutex);
  693. if (pauseparam->rx_pause != bnad->bna.port.pause_config.rx_pause ||
  694. pauseparam->tx_pause != bnad->bna.port.pause_config.tx_pause) {
  695. pause_config.rx_pause = pauseparam->rx_pause;
  696. pause_config.tx_pause = pauseparam->tx_pause;
  697. spin_lock_irqsave(&bnad->bna_lock, flags);
  698. bna_port_pause_config(&bnad->bna.port, &pause_config, NULL);
  699. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  700. }
  701. mutex_unlock(&bnad->conf_mutex);
  702. return 0;
  703. }
  704. static u32
  705. bnad_get_rx_csum(struct net_device *netdev)
  706. {
  707. u32 rx_csum;
  708. struct bnad *bnad = netdev_priv(netdev);
  709. rx_csum = bnad->rx_csum;
  710. return rx_csum;
  711. }
  712. static int
  713. bnad_set_rx_csum(struct net_device *netdev, u32 rx_csum)
  714. {
  715. struct bnad *bnad = netdev_priv(netdev);
  716. mutex_lock(&bnad->conf_mutex);
  717. bnad->rx_csum = rx_csum;
  718. mutex_unlock(&bnad->conf_mutex);
  719. return 0;
  720. }
  721. static int
  722. bnad_set_tx_csum(struct net_device *netdev, u32 tx_csum)
  723. {
  724. struct bnad *bnad = netdev_priv(netdev);
  725. mutex_lock(&bnad->conf_mutex);
  726. if (tx_csum) {
  727. netdev->features |= NETIF_F_IP_CSUM;
  728. netdev->features |= NETIF_F_IPV6_CSUM;
  729. } else {
  730. netdev->features &= ~NETIF_F_IP_CSUM;
  731. netdev->features &= ~NETIF_F_IPV6_CSUM;
  732. }
  733. mutex_unlock(&bnad->conf_mutex);
  734. return 0;
  735. }
  736. static int
  737. bnad_set_tso(struct net_device *netdev, u32 tso)
  738. {
  739. struct bnad *bnad = netdev_priv(netdev);
  740. mutex_lock(&bnad->conf_mutex);
  741. if (tso) {
  742. netdev->features |= NETIF_F_TSO;
  743. netdev->features |= NETIF_F_TSO6;
  744. } else {
  745. netdev->features &= ~NETIF_F_TSO;
  746. netdev->features &= ~NETIF_F_TSO6;
  747. }
  748. mutex_unlock(&bnad->conf_mutex);
  749. return 0;
  750. }
  751. static void
  752. bnad_get_strings(struct net_device *netdev, u32 stringset, u8 * string)
  753. {
  754. struct bnad *bnad = netdev_priv(netdev);
  755. int i, j, q_num;
  756. u64 bmap;
  757. mutex_lock(&bnad->conf_mutex);
  758. switch (stringset) {
  759. case ETH_SS_STATS:
  760. for (i = 0; i < BNAD_ETHTOOL_STATS_NUM; i++) {
  761. BUG_ON(!(strlen(bnad_net_stats_strings[i]) <
  762. ETH_GSTRING_LEN));
  763. memcpy(string, bnad_net_stats_strings[i],
  764. ETH_GSTRING_LEN);
  765. string += ETH_GSTRING_LEN;
  766. }
  767. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  768. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  769. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  770. if (bmap & 1) {
  771. sprintf(string, "txf%d_ucast_octets", i);
  772. string += ETH_GSTRING_LEN;
  773. sprintf(string, "txf%d_ucast", i);
  774. string += ETH_GSTRING_LEN;
  775. sprintf(string, "txf%d_ucast_vlan", i);
  776. string += ETH_GSTRING_LEN;
  777. sprintf(string, "txf%d_mcast_octets", i);
  778. string += ETH_GSTRING_LEN;
  779. sprintf(string, "txf%d_mcast", i);
  780. string += ETH_GSTRING_LEN;
  781. sprintf(string, "txf%d_mcast_vlan", i);
  782. string += ETH_GSTRING_LEN;
  783. sprintf(string, "txf%d_bcast_octets", i);
  784. string += ETH_GSTRING_LEN;
  785. sprintf(string, "txf%d_bcast", i);
  786. string += ETH_GSTRING_LEN;
  787. sprintf(string, "txf%d_bcast_vlan", i);
  788. string += ETH_GSTRING_LEN;
  789. sprintf(string, "txf%d_errors", i);
  790. string += ETH_GSTRING_LEN;
  791. sprintf(string, "txf%d_filter_vlan", i);
  792. string += ETH_GSTRING_LEN;
  793. sprintf(string, "txf%d_filter_mac_sa", i);
  794. string += ETH_GSTRING_LEN;
  795. }
  796. bmap >>= 1;
  797. }
  798. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  799. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  800. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  801. if (bmap & 1) {
  802. sprintf(string, "rxf%d_ucast_octets", i);
  803. string += ETH_GSTRING_LEN;
  804. sprintf(string, "rxf%d_ucast", i);
  805. string += ETH_GSTRING_LEN;
  806. sprintf(string, "rxf%d_ucast_vlan", i);
  807. string += ETH_GSTRING_LEN;
  808. sprintf(string, "rxf%d_mcast_octets", i);
  809. string += ETH_GSTRING_LEN;
  810. sprintf(string, "rxf%d_mcast", i);
  811. string += ETH_GSTRING_LEN;
  812. sprintf(string, "rxf%d_mcast_vlan", i);
  813. string += ETH_GSTRING_LEN;
  814. sprintf(string, "rxf%d_bcast_octets", i);
  815. string += ETH_GSTRING_LEN;
  816. sprintf(string, "rxf%d_bcast", i);
  817. string += ETH_GSTRING_LEN;
  818. sprintf(string, "rxf%d_bcast_vlan", i);
  819. string += ETH_GSTRING_LEN;
  820. sprintf(string, "rxf%d_frame_drops", i);
  821. string += ETH_GSTRING_LEN;
  822. }
  823. bmap >>= 1;
  824. }
  825. q_num = 0;
  826. for (i = 0; i < bnad->num_rx; i++) {
  827. if (!bnad->rx_info[i].rx)
  828. continue;
  829. for (j = 0; j < bnad->num_rxp_per_rx; j++) {
  830. sprintf(string, "cq%d_producer_index", q_num);
  831. string += ETH_GSTRING_LEN;
  832. sprintf(string, "cq%d_consumer_index", q_num);
  833. string += ETH_GSTRING_LEN;
  834. sprintf(string, "cq%d_hw_producer_index",
  835. q_num);
  836. string += ETH_GSTRING_LEN;
  837. q_num++;
  838. }
  839. }
  840. q_num = 0;
  841. for (i = 0; i < bnad->num_rx; i++) {
  842. if (!bnad->rx_info[i].rx)
  843. continue;
  844. for (j = 0; j < bnad->num_rxp_per_rx; j++) {
  845. sprintf(string, "rxq%d_packets", q_num);
  846. string += ETH_GSTRING_LEN;
  847. sprintf(string, "rxq%d_bytes", q_num);
  848. string += ETH_GSTRING_LEN;
  849. sprintf(string, "rxq%d_packets_with_error",
  850. q_num);
  851. string += ETH_GSTRING_LEN;
  852. sprintf(string, "rxq%d_allocbuf_failed", q_num);
  853. string += ETH_GSTRING_LEN;
  854. sprintf(string, "rxq%d_producer_index", q_num);
  855. string += ETH_GSTRING_LEN;
  856. sprintf(string, "rxq%d_consumer_index", q_num);
  857. string += ETH_GSTRING_LEN;
  858. q_num++;
  859. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  860. bnad->rx_info[i].rx_ctrl[j].ccb->
  861. rcb[1] &&
  862. bnad->rx_info[i].rx_ctrl[j].ccb->
  863. rcb[1]->rxq) {
  864. sprintf(string, "rxq%d_packets", q_num);
  865. string += ETH_GSTRING_LEN;
  866. sprintf(string, "rxq%d_bytes", q_num);
  867. string += ETH_GSTRING_LEN;
  868. sprintf(string,
  869. "rxq%d_packets_with_error", q_num);
  870. string += ETH_GSTRING_LEN;
  871. sprintf(string, "rxq%d_allocbuf_failed",
  872. q_num);
  873. string += ETH_GSTRING_LEN;
  874. sprintf(string, "rxq%d_producer_index",
  875. q_num);
  876. string += ETH_GSTRING_LEN;
  877. sprintf(string, "rxq%d_consumer_index",
  878. q_num);
  879. string += ETH_GSTRING_LEN;
  880. q_num++;
  881. }
  882. }
  883. }
  884. q_num = 0;
  885. for (i = 0; i < bnad->num_tx; i++) {
  886. if (!bnad->tx_info[i].tx)
  887. continue;
  888. for (j = 0; j < bnad->num_txq_per_tx; j++) {
  889. sprintf(string, "txq%d_packets", q_num);
  890. string += ETH_GSTRING_LEN;
  891. sprintf(string, "txq%d_bytes", q_num);
  892. string += ETH_GSTRING_LEN;
  893. sprintf(string, "txq%d_producer_index", q_num);
  894. string += ETH_GSTRING_LEN;
  895. sprintf(string, "txq%d_consumer_index", q_num);
  896. string += ETH_GSTRING_LEN;
  897. sprintf(string, "txq%d_hw_consumer_index",
  898. q_num);
  899. string += ETH_GSTRING_LEN;
  900. q_num++;
  901. }
  902. }
  903. break;
  904. default:
  905. break;
  906. }
  907. mutex_unlock(&bnad->conf_mutex);
  908. }
  909. static int
  910. bnad_get_stats_count_locked(struct net_device *netdev)
  911. {
  912. struct bnad *bnad = netdev_priv(netdev);
  913. int i, j, count, rxf_active_num = 0, txf_active_num = 0;
  914. u64 bmap;
  915. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  916. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  917. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  918. if (bmap & 1)
  919. txf_active_num++;
  920. bmap >>= 1;
  921. }
  922. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  923. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  924. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  925. if (bmap & 1)
  926. rxf_active_num++;
  927. bmap >>= 1;
  928. }
  929. count = BNAD_ETHTOOL_STATS_NUM +
  930. txf_active_num * BNAD_NUM_TXF_COUNTERS +
  931. rxf_active_num * BNAD_NUM_RXF_COUNTERS;
  932. for (i = 0; i < bnad->num_rx; i++) {
  933. if (!bnad->rx_info[i].rx)
  934. continue;
  935. count += bnad->num_rxp_per_rx * BNAD_NUM_CQ_COUNTERS;
  936. count += bnad->num_rxp_per_rx * BNAD_NUM_RXQ_COUNTERS;
  937. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  938. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  939. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
  940. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1]->rxq)
  941. count += BNAD_NUM_RXQ_COUNTERS;
  942. }
  943. for (i = 0; i < bnad->num_tx; i++) {
  944. if (!bnad->tx_info[i].tx)
  945. continue;
  946. count += bnad->num_txq_per_tx * BNAD_NUM_TXQ_COUNTERS;
  947. }
  948. return count;
  949. }
  950. static int
  951. bnad_per_q_stats_fill(struct bnad *bnad, u64 *buf, int bi)
  952. {
  953. int i, j;
  954. struct bna_rcb *rcb = NULL;
  955. struct bna_tcb *tcb = NULL;
  956. for (i = 0; i < bnad->num_rx; i++) {
  957. if (!bnad->rx_info[i].rx)
  958. continue;
  959. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  960. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  961. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
  962. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0]->rxq) {
  963. buf[bi++] = bnad->rx_info[i].rx_ctrl[j].
  964. ccb->producer_index;
  965. buf[bi++] = 0; /* ccb->consumer_index */
  966. buf[bi++] = *(bnad->rx_info[i].rx_ctrl[j].
  967. ccb->hw_producer_index);
  968. }
  969. }
  970. for (i = 0; i < bnad->num_rx; i++) {
  971. if (!bnad->rx_info[i].rx)
  972. continue;
  973. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  974. if (bnad->rx_info[i].rx_ctrl[j].ccb) {
  975. if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
  976. bnad->rx_info[i].rx_ctrl[j].ccb->
  977. rcb[0]->rxq) {
  978. rcb = bnad->rx_info[i].rx_ctrl[j].
  979. ccb->rcb[0];
  980. buf[bi++] = rcb->rxq->rx_packets;
  981. buf[bi++] = rcb->rxq->rx_bytes;
  982. buf[bi++] = rcb->rxq->
  983. rx_packets_with_error;
  984. buf[bi++] = rcb->rxq->
  985. rxbuf_alloc_failed;
  986. buf[bi++] = rcb->producer_index;
  987. buf[bi++] = rcb->consumer_index;
  988. }
  989. if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
  990. bnad->rx_info[i].rx_ctrl[j].ccb->
  991. rcb[1]->rxq) {
  992. rcb = bnad->rx_info[i].rx_ctrl[j].
  993. ccb->rcb[1];
  994. buf[bi++] = rcb->rxq->rx_packets;
  995. buf[bi++] = rcb->rxq->rx_bytes;
  996. buf[bi++] = rcb->rxq->
  997. rx_packets_with_error;
  998. buf[bi++] = rcb->rxq->
  999. rxbuf_alloc_failed;
  1000. buf[bi++] = rcb->producer_index;
  1001. buf[bi++] = rcb->consumer_index;
  1002. }
  1003. }
  1004. }
  1005. for (i = 0; i < bnad->num_tx; i++) {
  1006. if (!bnad->tx_info[i].tx)
  1007. continue;
  1008. for (j = 0; j < bnad->num_txq_per_tx; j++)
  1009. if (bnad->tx_info[i].tcb[j] &&
  1010. bnad->tx_info[i].tcb[j]->txq) {
  1011. tcb = bnad->tx_info[i].tcb[j];
  1012. buf[bi++] = tcb->txq->tx_packets;
  1013. buf[bi++] = tcb->txq->tx_bytes;
  1014. buf[bi++] = tcb->producer_index;
  1015. buf[bi++] = tcb->consumer_index;
  1016. buf[bi++] = *(tcb->hw_consumer_index);
  1017. }
  1018. }
  1019. return bi;
  1020. }
  1021. static void
  1022. bnad_get_ethtool_stats(struct net_device *netdev, struct ethtool_stats *stats,
  1023. u64 *buf)
  1024. {
  1025. struct bnad *bnad = netdev_priv(netdev);
  1026. int i, j, bi;
  1027. unsigned long flags;
  1028. struct rtnl_link_stats64 *net_stats64;
  1029. u64 *stats64;
  1030. u64 bmap;
  1031. mutex_lock(&bnad->conf_mutex);
  1032. if (bnad_get_stats_count_locked(netdev) != stats->n_stats) {
  1033. mutex_unlock(&bnad->conf_mutex);
  1034. return;
  1035. }
  1036. /*
  1037. * Used bna_lock to sync reads from bna_stats, which is written
  1038. * under the same lock
  1039. */
  1040. spin_lock_irqsave(&bnad->bna_lock, flags);
  1041. bi = 0;
  1042. memset(buf, 0, stats->n_stats * sizeof(u64));
  1043. net_stats64 = (struct rtnl_link_stats64 *)buf;
  1044. bnad_netdev_qstats_fill(bnad, net_stats64);
  1045. bnad_netdev_hwstats_fill(bnad, net_stats64);
  1046. bi = sizeof(*net_stats64) / sizeof(u64);
  1047. /* Fill driver stats into ethtool buffers */
  1048. stats64 = (u64 *)&bnad->stats.drv_stats;
  1049. for (i = 0; i < sizeof(struct bnad_drv_stats) / sizeof(u64); i++)
  1050. buf[bi++] = stats64[i];
  1051. /* Fill hardware stats excluding the rxf/txf into ethtool bufs */
  1052. stats64 = (u64 *) bnad->stats.bna_stats->hw_stats;
  1053. for (i = 0;
  1054. i < offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64);
  1055. i++)
  1056. buf[bi++] = stats64[i];
  1057. /* Fill txf stats into ethtool buffers */
  1058. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  1059. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  1060. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  1061. if (bmap & 1) {
  1062. stats64 = (u64 *)&bnad->stats.bna_stats->
  1063. hw_stats->txf_stats[i];
  1064. for (j = 0; j < sizeof(struct bfi_ll_stats_txf) /
  1065. sizeof(u64); j++)
  1066. buf[bi++] = stats64[j];
  1067. }
  1068. bmap >>= 1;
  1069. }
  1070. /* Fill rxf stats into ethtool buffers */
  1071. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  1072. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  1073. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  1074. if (bmap & 1) {
  1075. stats64 = (u64 *)&bnad->stats.bna_stats->
  1076. hw_stats->rxf_stats[i];
  1077. for (j = 0; j < sizeof(struct bfi_ll_stats_rxf) /
  1078. sizeof(u64); j++)
  1079. buf[bi++] = stats64[j];
  1080. }
  1081. bmap >>= 1;
  1082. }
  1083. /* Fill per Q stats into ethtool buffers */
  1084. bi = bnad_per_q_stats_fill(bnad, buf, bi);
  1085. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  1086. mutex_unlock(&bnad->conf_mutex);
  1087. }
  1088. static int
  1089. bnad_get_sset_count(struct net_device *netdev, int sset)
  1090. {
  1091. switch (sset) {
  1092. case ETH_SS_STATS:
  1093. return bnad_get_stats_count_locked(netdev);
  1094. default:
  1095. return -EOPNOTSUPP;
  1096. }
  1097. }
  1098. static struct ethtool_ops bnad_ethtool_ops = {
  1099. .get_settings = bnad_get_settings,
  1100. .set_settings = bnad_set_settings,
  1101. .get_drvinfo = bnad_get_drvinfo,
  1102. .get_regs_len = bnad_get_regs_len,
  1103. .get_regs = bnad_get_regs,
  1104. .get_wol = bnad_get_wol,
  1105. .get_link = ethtool_op_get_link,
  1106. .get_coalesce = bnad_get_coalesce,
  1107. .set_coalesce = bnad_set_coalesce,
  1108. .get_ringparam = bnad_get_ringparam,
  1109. .set_ringparam = bnad_set_ringparam,
  1110. .get_pauseparam = bnad_get_pauseparam,
  1111. .set_pauseparam = bnad_set_pauseparam,
  1112. .get_rx_csum = bnad_get_rx_csum,
  1113. .set_rx_csum = bnad_set_rx_csum,
  1114. .get_tx_csum = ethtool_op_get_tx_csum,
  1115. .set_tx_csum = bnad_set_tx_csum,
  1116. .get_sg = ethtool_op_get_sg,
  1117. .set_sg = ethtool_op_set_sg,
  1118. .get_tso = ethtool_op_get_tso,
  1119. .set_tso = bnad_set_tso,
  1120. .get_strings = bnad_get_strings,
  1121. .get_ethtool_stats = bnad_get_ethtool_stats,
  1122. .get_sset_count = bnad_get_sset_count
  1123. };
  1124. void
  1125. bnad_set_ethtool_ops(struct net_device *netdev)
  1126. {
  1127. SET_ETHTOOL_OPS(netdev, &bnad_ethtool_ops);
  1128. }