sdhci-pci.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981
  1. /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2. *
  3. * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or (at
  8. * your option) any later version.
  9. *
  10. * Thanks to the following companies for their support:
  11. *
  12. * - JMicron (hardware and technical support)
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/highmem.h>
  16. #include <linux/pci.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/slab.h>
  19. #include <linux/device.h>
  20. #include <linux/mmc/host.h>
  21. #include <asm/scatterlist.h>
  22. #include <asm/io.h>
  23. #include "sdhci.h"
  24. /*
  25. * PCI registers
  26. */
  27. #define PCI_SDHCI_IFPIO 0x00
  28. #define PCI_SDHCI_IFDMA 0x01
  29. #define PCI_SDHCI_IFVENDOR 0x02
  30. #define PCI_SLOT_INFO 0x40 /* 8 bits */
  31. #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
  32. #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
  33. #define MAX_SLOTS 8
  34. struct sdhci_pci_chip;
  35. struct sdhci_pci_slot;
  36. struct sdhci_pci_fixes {
  37. unsigned int quirks;
  38. int (*probe)(struct sdhci_pci_chip*);
  39. int (*probe_slot)(struct sdhci_pci_slot*);
  40. void (*remove_slot)(struct sdhci_pci_slot*, int);
  41. int (*suspend)(struct sdhci_pci_chip*,
  42. pm_message_t);
  43. int (*resume)(struct sdhci_pci_chip*);
  44. };
  45. struct sdhci_pci_slot {
  46. struct sdhci_pci_chip *chip;
  47. struct sdhci_host *host;
  48. int pci_bar;
  49. };
  50. struct sdhci_pci_chip {
  51. struct pci_dev *pdev;
  52. unsigned int quirks;
  53. const struct sdhci_pci_fixes *fixes;
  54. int num_slots; /* Slots on controller */
  55. struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
  56. };
  57. /*****************************************************************************\
  58. * *
  59. * Hardware specific quirk handling *
  60. * *
  61. \*****************************************************************************/
  62. static int ricoh_probe(struct sdhci_pci_chip *chip)
  63. {
  64. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
  65. chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
  66. chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  67. return 0;
  68. }
  69. static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
  70. {
  71. slot->host->caps =
  72. ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
  73. & SDHCI_TIMEOUT_CLK_MASK) |
  74. ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
  75. & SDHCI_CLOCK_BASE_MASK) |
  76. SDHCI_TIMEOUT_CLK_UNIT |
  77. SDHCI_CAN_VDD_330 |
  78. SDHCI_CAN_DO_SDMA;
  79. return 0;
  80. }
  81. static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
  82. {
  83. /* Apply a delay to allow controller to settle */
  84. /* Otherwise it becomes confused if card state changed
  85. during suspend */
  86. msleep(500);
  87. return 0;
  88. }
  89. static const struct sdhci_pci_fixes sdhci_ricoh = {
  90. .probe = ricoh_probe,
  91. .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
  92. SDHCI_QUIRK_FORCE_DMA |
  93. SDHCI_QUIRK_CLOCK_BEFORE_RESET,
  94. };
  95. static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
  96. .probe_slot = ricoh_mmc_probe_slot,
  97. .resume = ricoh_mmc_resume,
  98. .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
  99. SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  100. SDHCI_QUIRK_NO_CARD_NO_RESET |
  101. SDHCI_QUIRK_MISSING_CAPS
  102. };
  103. static const struct sdhci_pci_fixes sdhci_ene_712 = {
  104. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  105. SDHCI_QUIRK_BROKEN_DMA,
  106. };
  107. static const struct sdhci_pci_fixes sdhci_ene_714 = {
  108. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  109. SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  110. SDHCI_QUIRK_BROKEN_DMA,
  111. };
  112. static const struct sdhci_pci_fixes sdhci_cafe = {
  113. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
  114. SDHCI_QUIRK_NO_BUSY_IRQ |
  115. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
  116. };
  117. /*
  118. * ADMA operation is disabled for Moorestown platform due to
  119. * hardware bugs.
  120. */
  121. static int mrst_hc1_probe(struct sdhci_pci_chip *chip)
  122. {
  123. /*
  124. * slots number is fixed here for MRST as SDIO3 is never used and has
  125. * hardware bugs.
  126. */
  127. chip->num_slots = 1;
  128. return 0;
  129. }
  130. static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
  131. .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
  132. };
  133. static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1 = {
  134. .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
  135. .probe = mrst_hc1_probe,
  136. };
  137. static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
  138. .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  139. };
  140. static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc_sdio = {
  141. .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  142. };
  143. static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
  144. {
  145. u8 scratch;
  146. int ret;
  147. ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
  148. if (ret)
  149. return ret;
  150. /*
  151. * Turn PMOS on [bit 0], set over current detection to 2.4 V
  152. * [bit 1:2] and enable over current debouncing [bit 6].
  153. */
  154. if (on)
  155. scratch |= 0x47;
  156. else
  157. scratch &= ~0x47;
  158. ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
  159. if (ret)
  160. return ret;
  161. return 0;
  162. }
  163. static int jmicron_probe(struct sdhci_pci_chip *chip)
  164. {
  165. int ret;
  166. if (chip->pdev->revision == 0) {
  167. chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
  168. SDHCI_QUIRK_32BIT_DMA_SIZE |
  169. SDHCI_QUIRK_32BIT_ADMA_SIZE |
  170. SDHCI_QUIRK_RESET_AFTER_REQUEST |
  171. SDHCI_QUIRK_BROKEN_SMALL_PIO;
  172. }
  173. /*
  174. * JMicron chips can have two interfaces to the same hardware
  175. * in order to work around limitations in Microsoft's driver.
  176. * We need to make sure we only bind to one of them.
  177. *
  178. * This code assumes two things:
  179. *
  180. * 1. The PCI code adds subfunctions in order.
  181. *
  182. * 2. The MMC interface has a lower subfunction number
  183. * than the SD interface.
  184. */
  185. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
  186. struct pci_dev *sd_dev;
  187. sd_dev = NULL;
  188. while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
  189. PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
  190. if ((PCI_SLOT(chip->pdev->devfn) ==
  191. PCI_SLOT(sd_dev->devfn)) &&
  192. (chip->pdev->bus == sd_dev->bus))
  193. break;
  194. }
  195. if (sd_dev) {
  196. pci_dev_put(sd_dev);
  197. dev_info(&chip->pdev->dev, "Refusing to bind to "
  198. "secondary interface.\n");
  199. return -ENODEV;
  200. }
  201. }
  202. /*
  203. * JMicron chips need a bit of a nudge to enable the power
  204. * output pins.
  205. */
  206. ret = jmicron_pmos(chip, 1);
  207. if (ret) {
  208. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  209. return ret;
  210. }
  211. return 0;
  212. }
  213. static void jmicron_enable_mmc(struct sdhci_host *host, int on)
  214. {
  215. u8 scratch;
  216. scratch = readb(host->ioaddr + 0xC0);
  217. if (on)
  218. scratch |= 0x01;
  219. else
  220. scratch &= ~0x01;
  221. writeb(scratch, host->ioaddr + 0xC0);
  222. }
  223. static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
  224. {
  225. if (slot->chip->pdev->revision == 0) {
  226. u16 version;
  227. version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
  228. version = (version & SDHCI_VENDOR_VER_MASK) >>
  229. SDHCI_VENDOR_VER_SHIFT;
  230. /*
  231. * Older versions of the chip have lots of nasty glitches
  232. * in the ADMA engine. It's best just to avoid it
  233. * completely.
  234. */
  235. if (version < 0xAC)
  236. slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
  237. }
  238. /*
  239. * The secondary interface requires a bit set to get the
  240. * interrupts.
  241. */
  242. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  243. jmicron_enable_mmc(slot->host, 1);
  244. return 0;
  245. }
  246. static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
  247. {
  248. if (dead)
  249. return;
  250. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  251. jmicron_enable_mmc(slot->host, 0);
  252. }
  253. static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
  254. {
  255. int i;
  256. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  257. for (i = 0;i < chip->num_slots;i++)
  258. jmicron_enable_mmc(chip->slots[i]->host, 0);
  259. }
  260. return 0;
  261. }
  262. static int jmicron_resume(struct sdhci_pci_chip *chip)
  263. {
  264. int ret, i;
  265. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  266. for (i = 0;i < chip->num_slots;i++)
  267. jmicron_enable_mmc(chip->slots[i]->host, 1);
  268. }
  269. ret = jmicron_pmos(chip, 1);
  270. if (ret) {
  271. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  272. return ret;
  273. }
  274. return 0;
  275. }
  276. static const struct sdhci_pci_fixes sdhci_jmicron = {
  277. .probe = jmicron_probe,
  278. .probe_slot = jmicron_probe_slot,
  279. .remove_slot = jmicron_remove_slot,
  280. .suspend = jmicron_suspend,
  281. .resume = jmicron_resume,
  282. };
  283. /* SysKonnect CardBus2SDIO extra registers */
  284. #define SYSKT_CTRL 0x200
  285. #define SYSKT_RDFIFO_STAT 0x204
  286. #define SYSKT_WRFIFO_STAT 0x208
  287. #define SYSKT_POWER_DATA 0x20c
  288. #define SYSKT_POWER_330 0xef
  289. #define SYSKT_POWER_300 0xf8
  290. #define SYSKT_POWER_184 0xcc
  291. #define SYSKT_POWER_CMD 0x20d
  292. #define SYSKT_POWER_START (1 << 7)
  293. #define SYSKT_POWER_STATUS 0x20e
  294. #define SYSKT_POWER_STATUS_OK (1 << 0)
  295. #define SYSKT_BOARD_REV 0x210
  296. #define SYSKT_CHIP_REV 0x211
  297. #define SYSKT_CONF_DATA 0x212
  298. #define SYSKT_CONF_DATA_1V8 (1 << 2)
  299. #define SYSKT_CONF_DATA_2V5 (1 << 1)
  300. #define SYSKT_CONF_DATA_3V3 (1 << 0)
  301. static int syskt_probe(struct sdhci_pci_chip *chip)
  302. {
  303. if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  304. chip->pdev->class &= ~0x0000FF;
  305. chip->pdev->class |= PCI_SDHCI_IFDMA;
  306. }
  307. return 0;
  308. }
  309. static int syskt_probe_slot(struct sdhci_pci_slot *slot)
  310. {
  311. int tm, ps;
  312. u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
  313. u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
  314. dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
  315. "board rev %d.%d, chip rev %d.%d\n",
  316. board_rev >> 4, board_rev & 0xf,
  317. chip_rev >> 4, chip_rev & 0xf);
  318. if (chip_rev >= 0x20)
  319. slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
  320. writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
  321. writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
  322. udelay(50);
  323. tm = 10; /* Wait max 1 ms */
  324. do {
  325. ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
  326. if (ps & SYSKT_POWER_STATUS_OK)
  327. break;
  328. udelay(100);
  329. } while (--tm);
  330. if (!tm) {
  331. dev_err(&slot->chip->pdev->dev,
  332. "power regulator never stabilized");
  333. writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
  334. return -ENODEV;
  335. }
  336. return 0;
  337. }
  338. static const struct sdhci_pci_fixes sdhci_syskt = {
  339. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
  340. .probe = syskt_probe,
  341. .probe_slot = syskt_probe_slot,
  342. };
  343. static int via_probe(struct sdhci_pci_chip *chip)
  344. {
  345. if (chip->pdev->revision == 0x10)
  346. chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
  347. return 0;
  348. }
  349. static const struct sdhci_pci_fixes sdhci_via = {
  350. .probe = via_probe,
  351. };
  352. static const struct pci_device_id pci_ids[] __devinitdata = {
  353. {
  354. .vendor = PCI_VENDOR_ID_RICOH,
  355. .device = PCI_DEVICE_ID_RICOH_R5C822,
  356. .subvendor = PCI_ANY_ID,
  357. .subdevice = PCI_ANY_ID,
  358. .driver_data = (kernel_ulong_t)&sdhci_ricoh,
  359. },
  360. {
  361. .vendor = PCI_VENDOR_ID_RICOH,
  362. .device = 0x843,
  363. .subvendor = PCI_ANY_ID,
  364. .subdevice = PCI_ANY_ID,
  365. .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
  366. },
  367. {
  368. .vendor = PCI_VENDOR_ID_RICOH,
  369. .device = 0xe822,
  370. .subvendor = PCI_ANY_ID,
  371. .subdevice = PCI_ANY_ID,
  372. .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
  373. },
  374. {
  375. .vendor = PCI_VENDOR_ID_ENE,
  376. .device = PCI_DEVICE_ID_ENE_CB712_SD,
  377. .subvendor = PCI_ANY_ID,
  378. .subdevice = PCI_ANY_ID,
  379. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  380. },
  381. {
  382. .vendor = PCI_VENDOR_ID_ENE,
  383. .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
  384. .subvendor = PCI_ANY_ID,
  385. .subdevice = PCI_ANY_ID,
  386. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  387. },
  388. {
  389. .vendor = PCI_VENDOR_ID_ENE,
  390. .device = PCI_DEVICE_ID_ENE_CB714_SD,
  391. .subvendor = PCI_ANY_ID,
  392. .subdevice = PCI_ANY_ID,
  393. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  394. },
  395. {
  396. .vendor = PCI_VENDOR_ID_ENE,
  397. .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
  398. .subvendor = PCI_ANY_ID,
  399. .subdevice = PCI_ANY_ID,
  400. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  401. },
  402. {
  403. .vendor = PCI_VENDOR_ID_MARVELL,
  404. .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
  405. .subvendor = PCI_ANY_ID,
  406. .subdevice = PCI_ANY_ID,
  407. .driver_data = (kernel_ulong_t)&sdhci_cafe,
  408. },
  409. {
  410. .vendor = PCI_VENDOR_ID_JMICRON,
  411. .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
  412. .subvendor = PCI_ANY_ID,
  413. .subdevice = PCI_ANY_ID,
  414. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  415. },
  416. {
  417. .vendor = PCI_VENDOR_ID_JMICRON,
  418. .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
  419. .subvendor = PCI_ANY_ID,
  420. .subdevice = PCI_ANY_ID,
  421. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  422. },
  423. {
  424. .vendor = PCI_VENDOR_ID_SYSKONNECT,
  425. .device = 0x8000,
  426. .subvendor = PCI_ANY_ID,
  427. .subdevice = PCI_ANY_ID,
  428. .driver_data = (kernel_ulong_t)&sdhci_syskt,
  429. },
  430. {
  431. .vendor = PCI_VENDOR_ID_VIA,
  432. .device = 0x95d0,
  433. .subvendor = PCI_ANY_ID,
  434. .subdevice = PCI_ANY_ID,
  435. .driver_data = (kernel_ulong_t)&sdhci_via,
  436. },
  437. {
  438. .vendor = PCI_VENDOR_ID_INTEL,
  439. .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
  440. .subvendor = PCI_ANY_ID,
  441. .subdevice = PCI_ANY_ID,
  442. .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
  443. },
  444. {
  445. .vendor = PCI_VENDOR_ID_INTEL,
  446. .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
  447. .subvendor = PCI_ANY_ID,
  448. .subdevice = PCI_ANY_ID,
  449. .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1,
  450. },
  451. {
  452. .vendor = PCI_VENDOR_ID_INTEL,
  453. .device = PCI_DEVICE_ID_INTEL_MFD_SD,
  454. .subvendor = PCI_ANY_ID,
  455. .subdevice = PCI_ANY_ID,
  456. .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
  457. },
  458. {
  459. .vendor = PCI_VENDOR_ID_INTEL,
  460. .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
  461. .subvendor = PCI_ANY_ID,
  462. .subdevice = PCI_ANY_ID,
  463. .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
  464. },
  465. {
  466. .vendor = PCI_VENDOR_ID_INTEL,
  467. .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
  468. .subvendor = PCI_ANY_ID,
  469. .subdevice = PCI_ANY_ID,
  470. .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
  471. },
  472. {
  473. .vendor = PCI_VENDOR_ID_INTEL,
  474. .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
  475. .subvendor = PCI_ANY_ID,
  476. .subdevice = PCI_ANY_ID,
  477. .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
  478. },
  479. {
  480. .vendor = PCI_VENDOR_ID_INTEL,
  481. .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
  482. .subvendor = PCI_ANY_ID,
  483. .subdevice = PCI_ANY_ID,
  484. .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
  485. },
  486. { /* Generic SD host controller */
  487. PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  488. },
  489. { /* end: all zeroes */ },
  490. };
  491. MODULE_DEVICE_TABLE(pci, pci_ids);
  492. /*****************************************************************************\
  493. * *
  494. * SDHCI core callbacks *
  495. * *
  496. \*****************************************************************************/
  497. static int sdhci_pci_enable_dma(struct sdhci_host *host)
  498. {
  499. struct sdhci_pci_slot *slot;
  500. struct pci_dev *pdev;
  501. int ret;
  502. slot = sdhci_priv(host);
  503. pdev = slot->chip->pdev;
  504. if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
  505. ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
  506. (host->flags & SDHCI_USE_SDMA)) {
  507. dev_warn(&pdev->dev, "Will use DMA mode even though HW "
  508. "doesn't fully claim to support it.\n");
  509. }
  510. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  511. if (ret)
  512. return ret;
  513. pci_set_master(pdev);
  514. return 0;
  515. }
  516. static struct sdhci_ops sdhci_pci_ops = {
  517. .enable_dma = sdhci_pci_enable_dma,
  518. };
  519. /*****************************************************************************\
  520. * *
  521. * Suspend/resume *
  522. * *
  523. \*****************************************************************************/
  524. #ifdef CONFIG_PM
  525. static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
  526. {
  527. struct sdhci_pci_chip *chip;
  528. struct sdhci_pci_slot *slot;
  529. mmc_pm_flag_t pm_flags = 0;
  530. int i, ret;
  531. chip = pci_get_drvdata(pdev);
  532. if (!chip)
  533. return 0;
  534. for (i = 0;i < chip->num_slots;i++) {
  535. slot = chip->slots[i];
  536. if (!slot)
  537. continue;
  538. ret = sdhci_suspend_host(slot->host, state);
  539. if (ret) {
  540. for (i--;i >= 0;i--)
  541. sdhci_resume_host(chip->slots[i]->host);
  542. return ret;
  543. }
  544. pm_flags |= slot->host->mmc->pm_flags;
  545. }
  546. if (chip->fixes && chip->fixes->suspend) {
  547. ret = chip->fixes->suspend(chip, state);
  548. if (ret) {
  549. for (i = chip->num_slots - 1;i >= 0;i--)
  550. sdhci_resume_host(chip->slots[i]->host);
  551. return ret;
  552. }
  553. }
  554. pci_save_state(pdev);
  555. if (pm_flags & MMC_PM_KEEP_POWER) {
  556. if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
  557. pci_enable_wake(pdev, PCI_D3hot, 1);
  558. pci_set_power_state(pdev, PCI_D3hot);
  559. } else {
  560. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  561. pci_disable_device(pdev);
  562. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  563. }
  564. return 0;
  565. }
  566. static int sdhci_pci_resume (struct pci_dev *pdev)
  567. {
  568. struct sdhci_pci_chip *chip;
  569. struct sdhci_pci_slot *slot;
  570. int i, ret;
  571. chip = pci_get_drvdata(pdev);
  572. if (!chip)
  573. return 0;
  574. pci_set_power_state(pdev, PCI_D0);
  575. pci_restore_state(pdev);
  576. ret = pci_enable_device(pdev);
  577. if (ret)
  578. return ret;
  579. if (chip->fixes && chip->fixes->resume) {
  580. ret = chip->fixes->resume(chip);
  581. if (ret)
  582. return ret;
  583. }
  584. for (i = 0;i < chip->num_slots;i++) {
  585. slot = chip->slots[i];
  586. if (!slot)
  587. continue;
  588. ret = sdhci_resume_host(slot->host);
  589. if (ret)
  590. return ret;
  591. }
  592. return 0;
  593. }
  594. #else /* CONFIG_PM */
  595. #define sdhci_pci_suspend NULL
  596. #define sdhci_pci_resume NULL
  597. #endif /* CONFIG_PM */
  598. /*****************************************************************************\
  599. * *
  600. * Device probing/removal *
  601. * *
  602. \*****************************************************************************/
  603. static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
  604. struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
  605. {
  606. struct sdhci_pci_slot *slot;
  607. struct sdhci_host *host;
  608. resource_size_t addr;
  609. int ret;
  610. if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
  611. dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
  612. return ERR_PTR(-ENODEV);
  613. }
  614. if (pci_resource_len(pdev, bar) != 0x100) {
  615. dev_err(&pdev->dev, "Invalid iomem size. You may "
  616. "experience problems.\n");
  617. }
  618. if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  619. dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
  620. return ERR_PTR(-ENODEV);
  621. }
  622. if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
  623. dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
  624. return ERR_PTR(-ENODEV);
  625. }
  626. host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
  627. if (IS_ERR(host)) {
  628. dev_err(&pdev->dev, "cannot allocate host\n");
  629. return ERR_CAST(host);
  630. }
  631. slot = sdhci_priv(host);
  632. slot->chip = chip;
  633. slot->host = host;
  634. slot->pci_bar = bar;
  635. host->hw_name = "PCI";
  636. host->ops = &sdhci_pci_ops;
  637. host->quirks = chip->quirks;
  638. host->irq = pdev->irq;
  639. ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
  640. if (ret) {
  641. dev_err(&pdev->dev, "cannot request region\n");
  642. goto free;
  643. }
  644. addr = pci_resource_start(pdev, bar);
  645. host->ioaddr = pci_ioremap_bar(pdev, bar);
  646. if (!host->ioaddr) {
  647. dev_err(&pdev->dev, "failed to remap registers\n");
  648. goto release;
  649. }
  650. if (chip->fixes && chip->fixes->probe_slot) {
  651. ret = chip->fixes->probe_slot(slot);
  652. if (ret)
  653. goto unmap;
  654. }
  655. host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
  656. ret = sdhci_add_host(host);
  657. if (ret)
  658. goto remove;
  659. return slot;
  660. remove:
  661. if (chip->fixes && chip->fixes->remove_slot)
  662. chip->fixes->remove_slot(slot, 0);
  663. unmap:
  664. iounmap(host->ioaddr);
  665. release:
  666. pci_release_region(pdev, bar);
  667. free:
  668. sdhci_free_host(host);
  669. return ERR_PTR(ret);
  670. }
  671. static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
  672. {
  673. int dead;
  674. u32 scratch;
  675. dead = 0;
  676. scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
  677. if (scratch == (u32)-1)
  678. dead = 1;
  679. sdhci_remove_host(slot->host, dead);
  680. if (slot->chip->fixes && slot->chip->fixes->remove_slot)
  681. slot->chip->fixes->remove_slot(slot, dead);
  682. pci_release_region(slot->chip->pdev, slot->pci_bar);
  683. sdhci_free_host(slot->host);
  684. }
  685. static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
  686. const struct pci_device_id *ent)
  687. {
  688. struct sdhci_pci_chip *chip;
  689. struct sdhci_pci_slot *slot;
  690. u8 slots, rev, first_bar;
  691. int ret, i;
  692. BUG_ON(pdev == NULL);
  693. BUG_ON(ent == NULL);
  694. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
  695. dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
  696. (int)pdev->vendor, (int)pdev->device, (int)rev);
  697. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
  698. if (ret)
  699. return ret;
  700. slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
  701. dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
  702. if (slots == 0)
  703. return -ENODEV;
  704. BUG_ON(slots > MAX_SLOTS);
  705. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
  706. if (ret)
  707. return ret;
  708. first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
  709. if (first_bar > 5) {
  710. dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
  711. return -ENODEV;
  712. }
  713. ret = pci_enable_device(pdev);
  714. if (ret)
  715. return ret;
  716. chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
  717. if (!chip) {
  718. ret = -ENOMEM;
  719. goto err;
  720. }
  721. chip->pdev = pdev;
  722. chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
  723. if (chip->fixes)
  724. chip->quirks = chip->fixes->quirks;
  725. chip->num_slots = slots;
  726. pci_set_drvdata(pdev, chip);
  727. if (chip->fixes && chip->fixes->probe) {
  728. ret = chip->fixes->probe(chip);
  729. if (ret)
  730. goto free;
  731. }
  732. slots = chip->num_slots; /* Quirk may have changed this */
  733. for (i = 0;i < slots;i++) {
  734. slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
  735. if (IS_ERR(slot)) {
  736. for (i--;i >= 0;i--)
  737. sdhci_pci_remove_slot(chip->slots[i]);
  738. ret = PTR_ERR(slot);
  739. goto free;
  740. }
  741. chip->slots[i] = slot;
  742. }
  743. return 0;
  744. free:
  745. pci_set_drvdata(pdev, NULL);
  746. kfree(chip);
  747. err:
  748. pci_disable_device(pdev);
  749. return ret;
  750. }
  751. static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
  752. {
  753. int i;
  754. struct sdhci_pci_chip *chip;
  755. chip = pci_get_drvdata(pdev);
  756. if (chip) {
  757. for (i = 0;i < chip->num_slots; i++)
  758. sdhci_pci_remove_slot(chip->slots[i]);
  759. pci_set_drvdata(pdev, NULL);
  760. kfree(chip);
  761. }
  762. pci_disable_device(pdev);
  763. }
  764. static struct pci_driver sdhci_driver = {
  765. .name = "sdhci-pci",
  766. .id_table = pci_ids,
  767. .probe = sdhci_pci_probe,
  768. .remove = __devexit_p(sdhci_pci_remove),
  769. .suspend = sdhci_pci_suspend,
  770. .resume = sdhci_pci_resume,
  771. };
  772. /*****************************************************************************\
  773. * *
  774. * Driver init/exit *
  775. * *
  776. \*****************************************************************************/
  777. static int __init sdhci_drv_init(void)
  778. {
  779. return pci_register_driver(&sdhci_driver);
  780. }
  781. static void __exit sdhci_drv_exit(void)
  782. {
  783. pci_unregister_driver(&sdhci_driver);
  784. }
  785. module_init(sdhci_drv_init);
  786. module_exit(sdhci_drv_exit);
  787. MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
  788. MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
  789. MODULE_LICENSE("GPL");