nouveau_pm.c 13 KB

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  1. /*
  2. * Copyright 2010 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include "drmP.h"
  25. #include "nouveau_drv.h"
  26. #include "nouveau_pm.h"
  27. #include <linux/hwmon.h>
  28. #include <linux/hwmon-sysfs.h>
  29. static int
  30. nouveau_pm_clock_set(struct drm_device *dev, struct nouveau_pm_level *perflvl,
  31. u8 id, u32 khz)
  32. {
  33. struct drm_nouveau_private *dev_priv = dev->dev_private;
  34. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  35. void *pre_state;
  36. if (khz == 0)
  37. return 0;
  38. pre_state = pm->clock_pre(dev, perflvl, id, khz);
  39. if (IS_ERR(pre_state))
  40. return PTR_ERR(pre_state);
  41. if (pre_state)
  42. pm->clock_set(dev, pre_state);
  43. return 0;
  44. }
  45. static int
  46. nouveau_pm_perflvl_set(struct drm_device *dev, struct nouveau_pm_level *perflvl)
  47. {
  48. struct drm_nouveau_private *dev_priv = dev->dev_private;
  49. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  50. int ret;
  51. if (perflvl == pm->cur)
  52. return 0;
  53. if (pm->voltage.supported && pm->voltage_set && perflvl->voltage) {
  54. ret = pm->voltage_set(dev, perflvl->voltage);
  55. if (ret) {
  56. NV_ERROR(dev, "voltage_set %d failed: %d\n",
  57. perflvl->voltage, ret);
  58. }
  59. }
  60. nouveau_pm_clock_set(dev, perflvl, PLL_CORE, perflvl->core);
  61. nouveau_pm_clock_set(dev, perflvl, PLL_SHADER, perflvl->shader);
  62. nouveau_pm_clock_set(dev, perflvl, PLL_MEMORY, perflvl->memory);
  63. nouveau_pm_clock_set(dev, perflvl, PLL_UNK05, perflvl->unk05);
  64. pm->cur = perflvl;
  65. return 0;
  66. }
  67. static int
  68. nouveau_pm_profile_set(struct drm_device *dev, const char *profile)
  69. {
  70. struct drm_nouveau_private *dev_priv = dev->dev_private;
  71. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  72. struct nouveau_pm_level *perflvl = NULL;
  73. /* safety precaution, for now */
  74. if (nouveau_perflvl_wr != 7777)
  75. return -EPERM;
  76. if (!pm->clock_set)
  77. return -EINVAL;
  78. if (!strncmp(profile, "boot", 4))
  79. perflvl = &pm->boot;
  80. else {
  81. int pl = simple_strtol(profile, NULL, 10);
  82. int i;
  83. for (i = 0; i < pm->nr_perflvl; i++) {
  84. if (pm->perflvl[i].id == pl) {
  85. perflvl = &pm->perflvl[i];
  86. break;
  87. }
  88. }
  89. if (!perflvl)
  90. return -EINVAL;
  91. }
  92. NV_INFO(dev, "setting performance level: %s\n", profile);
  93. return nouveau_pm_perflvl_set(dev, perflvl);
  94. }
  95. static int
  96. nouveau_pm_perflvl_get(struct drm_device *dev, struct nouveau_pm_level *perflvl)
  97. {
  98. struct drm_nouveau_private *dev_priv = dev->dev_private;
  99. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  100. int ret;
  101. if (!pm->clock_get)
  102. return -EINVAL;
  103. memset(perflvl, 0, sizeof(*perflvl));
  104. ret = pm->clock_get(dev, PLL_CORE);
  105. if (ret > 0)
  106. perflvl->core = ret;
  107. ret = pm->clock_get(dev, PLL_MEMORY);
  108. if (ret > 0)
  109. perflvl->memory = ret;
  110. ret = pm->clock_get(dev, PLL_SHADER);
  111. if (ret > 0)
  112. perflvl->shader = ret;
  113. ret = pm->clock_get(dev, PLL_UNK05);
  114. if (ret > 0)
  115. perflvl->unk05 = ret;
  116. if (pm->voltage.supported && pm->voltage_get) {
  117. ret = pm->voltage_get(dev);
  118. if (ret > 0)
  119. perflvl->voltage = ret;
  120. }
  121. return 0;
  122. }
  123. static void
  124. nouveau_pm_perflvl_info(struct nouveau_pm_level *perflvl, char *ptr, int len)
  125. {
  126. char c[16], s[16], v[16], f[16];
  127. c[0] = '\0';
  128. if (perflvl->core)
  129. snprintf(c, sizeof(c), " core %dMHz", perflvl->core / 1000);
  130. s[0] = '\0';
  131. if (perflvl->shader)
  132. snprintf(s, sizeof(s), " shader %dMHz", perflvl->shader / 1000);
  133. v[0] = '\0';
  134. if (perflvl->voltage)
  135. snprintf(v, sizeof(v), " voltage %dmV", perflvl->voltage * 10);
  136. f[0] = '\0';
  137. if (perflvl->fanspeed)
  138. snprintf(f, sizeof(f), " fanspeed %d%%", perflvl->fanspeed);
  139. snprintf(ptr, len, "memory %dMHz%s%s%s%s\n", perflvl->memory / 1000,
  140. c, s, v, f);
  141. }
  142. static ssize_t
  143. nouveau_pm_get_perflvl_info(struct device *d,
  144. struct device_attribute *a, char *buf)
  145. {
  146. struct nouveau_pm_level *perflvl = (struct nouveau_pm_level *)a;
  147. char *ptr = buf;
  148. int len = PAGE_SIZE;
  149. snprintf(ptr, len, "%d: ", perflvl->id);
  150. ptr += strlen(buf);
  151. len -= strlen(buf);
  152. nouveau_pm_perflvl_info(perflvl, ptr, len);
  153. return strlen(buf);
  154. }
  155. static ssize_t
  156. nouveau_pm_get_perflvl(struct device *d, struct device_attribute *a, char *buf)
  157. {
  158. struct drm_device *dev = pci_get_drvdata(to_pci_dev(d));
  159. struct drm_nouveau_private *dev_priv = dev->dev_private;
  160. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  161. struct nouveau_pm_level cur;
  162. int len = PAGE_SIZE, ret;
  163. char *ptr = buf;
  164. if (!pm->cur)
  165. snprintf(ptr, len, "setting: boot\n");
  166. else if (pm->cur == &pm->boot)
  167. snprintf(ptr, len, "setting: boot\nc: ");
  168. else
  169. snprintf(ptr, len, "setting: static %d\nc: ", pm->cur->id);
  170. ptr += strlen(buf);
  171. len -= strlen(buf);
  172. ret = nouveau_pm_perflvl_get(dev, &cur);
  173. if (ret == 0)
  174. nouveau_pm_perflvl_info(&cur, ptr, len);
  175. return strlen(buf);
  176. }
  177. static ssize_t
  178. nouveau_pm_set_perflvl(struct device *d, struct device_attribute *a,
  179. const char *buf, size_t count)
  180. {
  181. struct drm_device *dev = pci_get_drvdata(to_pci_dev(d));
  182. int ret;
  183. ret = nouveau_pm_profile_set(dev, buf);
  184. if (ret)
  185. return ret;
  186. return strlen(buf);
  187. }
  188. static DEVICE_ATTR(performance_level, S_IRUGO | S_IWUSR,
  189. nouveau_pm_get_perflvl, nouveau_pm_set_perflvl);
  190. static int
  191. nouveau_sysfs_init(struct drm_device *dev)
  192. {
  193. struct drm_nouveau_private *dev_priv = dev->dev_private;
  194. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  195. struct device *d = &dev->pdev->dev;
  196. int ret, i;
  197. ret = device_create_file(d, &dev_attr_performance_level);
  198. if (ret)
  199. return ret;
  200. for (i = 0; i < pm->nr_perflvl; i++) {
  201. struct nouveau_pm_level *perflvl = &pm->perflvl[i];
  202. perflvl->dev_attr.attr.name = perflvl->name;
  203. perflvl->dev_attr.attr.mode = S_IRUGO;
  204. perflvl->dev_attr.show = nouveau_pm_get_perflvl_info;
  205. perflvl->dev_attr.store = NULL;
  206. sysfs_attr_init(&perflvl->dev_attr.attr);
  207. ret = device_create_file(d, &perflvl->dev_attr);
  208. if (ret) {
  209. NV_ERROR(dev, "failed pervlvl %d sysfs: %d\n",
  210. perflvl->id, i);
  211. perflvl->dev_attr.attr.name = NULL;
  212. nouveau_pm_fini(dev);
  213. return ret;
  214. }
  215. }
  216. return 0;
  217. }
  218. static void
  219. nouveau_sysfs_fini(struct drm_device *dev)
  220. {
  221. struct drm_nouveau_private *dev_priv = dev->dev_private;
  222. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  223. struct device *d = &dev->pdev->dev;
  224. int i;
  225. device_remove_file(d, &dev_attr_performance_level);
  226. for (i = 0; i < pm->nr_perflvl; i++) {
  227. struct nouveau_pm_level *pl = &pm->perflvl[i];
  228. if (!pl->dev_attr.attr.name)
  229. break;
  230. device_remove_file(d, &pl->dev_attr);
  231. }
  232. }
  233. static ssize_t
  234. nouveau_hwmon_show_temp(struct device *d, struct device_attribute *a, char *buf)
  235. {
  236. struct drm_device *dev = dev_get_drvdata(d);
  237. struct drm_nouveau_private *dev_priv = dev->dev_private;
  238. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  239. return snprintf(buf, PAGE_SIZE, "%d\n", pm->temp_get(dev)*1000);
  240. }
  241. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, nouveau_hwmon_show_temp,
  242. NULL, 0);
  243. static ssize_t
  244. nouveau_hwmon_max_temp(struct device *d, struct device_attribute *a, char *buf)
  245. {
  246. struct drm_device *dev = dev_get_drvdata(d);
  247. struct drm_nouveau_private *dev_priv = dev->dev_private;
  248. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  249. struct nouveau_pm_threshold_temp *temp = &pm->threshold_temp;
  250. return snprintf(buf, PAGE_SIZE, "%d\n", temp->down_clock*1000);
  251. }
  252. static ssize_t
  253. nouveau_hwmon_set_max_temp(struct device *d, struct device_attribute *a,
  254. const char *buf, size_t count)
  255. {
  256. struct drm_device *dev = dev_get_drvdata(d);
  257. struct drm_nouveau_private *dev_priv = dev->dev_private;
  258. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  259. struct nouveau_pm_threshold_temp *temp = &pm->threshold_temp;
  260. long value;
  261. if (strict_strtol(buf, 10, &value) == -EINVAL)
  262. return count;
  263. temp->down_clock = value/1000;
  264. nouveau_temp_safety_checks(dev);
  265. return count;
  266. }
  267. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, nouveau_hwmon_max_temp,
  268. nouveau_hwmon_set_max_temp,
  269. 0);
  270. static ssize_t
  271. nouveau_hwmon_critical_temp(struct device *d, struct device_attribute *a,
  272. char *buf)
  273. {
  274. struct drm_device *dev = dev_get_drvdata(d);
  275. struct drm_nouveau_private *dev_priv = dev->dev_private;
  276. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  277. struct nouveau_pm_threshold_temp *temp = &pm->threshold_temp;
  278. return snprintf(buf, PAGE_SIZE, "%d\n", temp->critical*1000);
  279. }
  280. static ssize_t
  281. nouveau_hwmon_set_critical_temp(struct device *d, struct device_attribute *a,
  282. const char *buf,
  283. size_t count)
  284. {
  285. struct drm_device *dev = dev_get_drvdata(d);
  286. struct drm_nouveau_private *dev_priv = dev->dev_private;
  287. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  288. struct nouveau_pm_threshold_temp *temp = &pm->threshold_temp;
  289. long value;
  290. if (strict_strtol(buf, 10, &value) == -EINVAL)
  291. return count;
  292. temp->critical = value/1000;
  293. nouveau_temp_safety_checks(dev);
  294. return count;
  295. }
  296. static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO | S_IWUSR,
  297. nouveau_hwmon_critical_temp,
  298. nouveau_hwmon_set_critical_temp,
  299. 0);
  300. static ssize_t nouveau_hwmon_show_name(struct device *dev,
  301. struct device_attribute *attr,
  302. char *buf)
  303. {
  304. return sprintf(buf, "nouveau\n");
  305. }
  306. static SENSOR_DEVICE_ATTR(name, S_IRUGO, nouveau_hwmon_show_name, NULL, 0);
  307. static ssize_t nouveau_hwmon_show_update_rate(struct device *dev,
  308. struct device_attribute *attr,
  309. char *buf)
  310. {
  311. return sprintf(buf, "1000\n");
  312. }
  313. static SENSOR_DEVICE_ATTR(update_rate, S_IRUGO,
  314. nouveau_hwmon_show_update_rate,
  315. NULL, 0);
  316. static struct attribute *hwmon_attributes[] = {
  317. &sensor_dev_attr_temp1_input.dev_attr.attr,
  318. &sensor_dev_attr_temp1_max.dev_attr.attr,
  319. &sensor_dev_attr_temp1_crit.dev_attr.attr,
  320. &sensor_dev_attr_name.dev_attr.attr,
  321. &sensor_dev_attr_update_rate.dev_attr.attr,
  322. NULL
  323. };
  324. static const struct attribute_group hwmon_attrgroup = {
  325. .attrs = hwmon_attributes,
  326. };
  327. static int
  328. nouveau_hwmon_init(struct drm_device *dev)
  329. {
  330. struct drm_nouveau_private *dev_priv = dev->dev_private;
  331. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  332. struct device *hwmon_dev;
  333. int ret;
  334. if (!pm->temp_get)
  335. return -ENODEV;
  336. hwmon_dev = hwmon_device_register(&dev->pdev->dev);
  337. if (IS_ERR(hwmon_dev)) {
  338. ret = PTR_ERR(hwmon_dev);
  339. NV_ERROR(dev,
  340. "Unable to register hwmon device: %d\n", ret);
  341. return ret;
  342. }
  343. dev_set_drvdata(hwmon_dev, dev);
  344. ret = sysfs_create_group(&hwmon_dev->kobj,
  345. &hwmon_attrgroup);
  346. if (ret) {
  347. NV_ERROR(dev,
  348. "Unable to create hwmon sysfs file: %d\n", ret);
  349. hwmon_device_unregister(hwmon_dev);
  350. return ret;
  351. }
  352. pm->hwmon = hwmon_dev;
  353. return 0;
  354. }
  355. static void
  356. nouveau_hwmon_fini(struct drm_device *dev)
  357. {
  358. struct drm_nouveau_private *dev_priv = dev->dev_private;
  359. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  360. if (pm->hwmon) {
  361. sysfs_remove_group(&pm->hwmon->kobj, &hwmon_attrgroup);
  362. hwmon_device_unregister(pm->hwmon);
  363. }
  364. }
  365. int
  366. nouveau_pm_init(struct drm_device *dev)
  367. {
  368. struct drm_nouveau_private *dev_priv = dev->dev_private;
  369. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  370. char info[256];
  371. int ret, i;
  372. nouveau_volt_init(dev);
  373. nouveau_perf_init(dev);
  374. nouveau_temp_init(dev);
  375. nouveau_mem_timing_init(dev);
  376. NV_INFO(dev, "%d available performance level(s)\n", pm->nr_perflvl);
  377. for (i = 0; i < pm->nr_perflvl; i++) {
  378. nouveau_pm_perflvl_info(&pm->perflvl[i], info, sizeof(info));
  379. NV_INFO(dev, "%d: %s", pm->perflvl[i].id, info);
  380. }
  381. /* determine current ("boot") performance level */
  382. ret = nouveau_pm_perflvl_get(dev, &pm->boot);
  383. if (ret == 0) {
  384. pm->cur = &pm->boot;
  385. nouveau_pm_perflvl_info(&pm->boot, info, sizeof(info));
  386. NV_INFO(dev, "c: %s", info);
  387. }
  388. /* switch performance levels now if requested */
  389. if (nouveau_perflvl != NULL) {
  390. ret = nouveau_pm_profile_set(dev, nouveau_perflvl);
  391. if (ret) {
  392. NV_ERROR(dev, "error setting perflvl \"%s\": %d\n",
  393. nouveau_perflvl, ret);
  394. }
  395. }
  396. nouveau_sysfs_init(dev);
  397. nouveau_hwmon_init(dev);
  398. return 0;
  399. }
  400. void
  401. nouveau_pm_fini(struct drm_device *dev)
  402. {
  403. struct drm_nouveau_private *dev_priv = dev->dev_private;
  404. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  405. if (pm->cur != &pm->boot)
  406. nouveau_pm_perflvl_set(dev, &pm->boot);
  407. nouveau_mem_timing_fini(dev);
  408. nouveau_temp_fini(dev);
  409. nouveau_perf_fini(dev);
  410. nouveau_volt_fini(dev);
  411. nouveau_hwmon_fini(dev);
  412. nouveau_sysfs_fini(dev);
  413. }
  414. void
  415. nouveau_pm_resume(struct drm_device *dev)
  416. {
  417. struct drm_nouveau_private *dev_priv = dev->dev_private;
  418. struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
  419. struct nouveau_pm_level *perflvl;
  420. if (pm->cur == &pm->boot)
  421. return;
  422. perflvl = pm->cur;
  423. pm->cur = &pm->boot;
  424. nouveau_pm_perflvl_set(dev, perflvl);
  425. }