setup.c 14 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #undef DEBUG
  18. #include <linux/cpu.h>
  19. #include <linux/errno.h>
  20. #include <linux/sched.h>
  21. #include <linux/kernel.h>
  22. #include <linux/mm.h>
  23. #include <linux/stddef.h>
  24. #include <linux/unistd.h>
  25. #include <linux/slab.h>
  26. #include <linux/user.h>
  27. #include <linux/a.out.h>
  28. #include <linux/tty.h>
  29. #include <linux/major.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/reboot.h>
  32. #include <linux/init.h>
  33. #include <linux/ioport.h>
  34. #include <linux/console.h>
  35. #include <linux/pci.h>
  36. #include <linux/utsname.h>
  37. #include <linux/adb.h>
  38. #include <linux/module.h>
  39. #include <linux/delay.h>
  40. #include <linux/irq.h>
  41. #include <linux/seq_file.h>
  42. #include <linux/root_dev.h>
  43. #include <asm/mmu.h>
  44. #include <asm/processor.h>
  45. #include <asm/io.h>
  46. #include <asm/pgtable.h>
  47. #include <asm/prom.h>
  48. #include <asm/rtas.h>
  49. #include <asm/pci-bridge.h>
  50. #include <asm/iommu.h>
  51. #include <asm/dma.h>
  52. #include <asm/machdep.h>
  53. #include <asm/irq.h>
  54. #include <asm/kexec.h>
  55. #include <asm/time.h>
  56. #include <asm/nvram.h>
  57. #include "xics.h"
  58. #include <asm/pmc.h>
  59. #include <asm/mpic.h>
  60. #include <asm/ppc-pci.h>
  61. #include <asm/i8259.h>
  62. #include <asm/udbg.h>
  63. #include <asm/smp.h>
  64. #include "plpar_wrappers.h"
  65. #include "ras.h"
  66. #include "firmware.h"
  67. #ifdef DEBUG
  68. #define DBG(fmt...) udbg_printf(fmt)
  69. #else
  70. #define DBG(fmt...)
  71. #endif
  72. extern void find_udbg_vterm(void);
  73. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  74. static void pseries_shared_idle_sleep(void);
  75. static void pseries_dedicated_idle_sleep(void);
  76. struct mpic *pSeries_mpic;
  77. static void pSeries_show_cpuinfo(struct seq_file *m)
  78. {
  79. struct device_node *root;
  80. const char *model = "";
  81. root = of_find_node_by_path("/");
  82. if (root)
  83. model = get_property(root, "model", NULL);
  84. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  85. of_node_put(root);
  86. }
  87. /* Initialize firmware assisted non-maskable interrupts if
  88. * the firmware supports this feature.
  89. */
  90. static void __init fwnmi_init(void)
  91. {
  92. unsigned long system_reset_addr, machine_check_addr;
  93. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  94. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  95. return;
  96. /* If the kernel's not linked at zero we point the firmware at low
  97. * addresses anyway, and use a trampoline to get to the real code. */
  98. system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
  99. machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
  100. if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
  101. machine_check_addr))
  102. fwnmi_active = 1;
  103. }
  104. void pSeries_8259_cascade(unsigned int irq, struct irq_desc *desc,
  105. struct pt_regs *regs)
  106. {
  107. unsigned int max = 100;
  108. while(max--) {
  109. int cascade_irq = i8259_irq(regs);
  110. if (max == 99)
  111. desc->chip->eoi(irq);
  112. if (cascade_irq < 0)
  113. break;
  114. generic_handle_irq(cascade_irq, regs);
  115. };
  116. }
  117. static void __init pSeries_init_mpic(void)
  118. {
  119. unsigned int *addrp;
  120. struct device_node *np;
  121. unsigned long intack = 0;
  122. /* All ISUs are setup, complete initialization */
  123. mpic_init(pSeries_mpic);
  124. /* Check what kind of cascade ACK we have */
  125. if (!(np = of_find_node_by_name(NULL, "pci"))
  126. || !(addrp = (unsigned int *)
  127. get_property(np, "8259-interrupt-acknowledge", NULL)))
  128. printk(KERN_ERR "Cannot find pci to get ack address\n");
  129. else
  130. intack = addrp[prom_n_addr_cells(np)-1];
  131. of_node_put(np);
  132. /* Setup the legacy interrupts & controller */
  133. i8259_init(intack, 0);
  134. /* Hook cascade to mpic */
  135. set_irq_chained_handler(NUM_ISA_INTERRUPTS, pSeries_8259_cascade);
  136. }
  137. static void __init pSeries_setup_mpic(void)
  138. {
  139. unsigned int *opprop;
  140. unsigned long openpic_addr = 0;
  141. unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
  142. struct device_node *root;
  143. int irq_count;
  144. /* Find the Open PIC if present */
  145. root = of_find_node_by_path("/");
  146. opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
  147. if (opprop != 0) {
  148. int n = prom_n_addr_cells(root);
  149. for (openpic_addr = 0; n > 0; --n)
  150. openpic_addr = (openpic_addr << 32) + *opprop++;
  151. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  152. }
  153. of_node_put(root);
  154. BUG_ON(openpic_addr == 0);
  155. /* Get the sense values from OF */
  156. prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
  157. /* Setup the openpic driver */
  158. irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
  159. pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
  160. 16, 16, irq_count, /* isu size, irq offset, irq count */
  161. NR_IRQS - 4, /* ipi offset */
  162. senses, irq_count, /* sense & sense size */
  163. " MPIC ");
  164. }
  165. static void pseries_lpar_enable_pmcs(void)
  166. {
  167. unsigned long set, reset;
  168. power4_enable_pmcs();
  169. set = 1UL << 63;
  170. reset = 0;
  171. plpar_hcall_norets(H_PERFMON, set, reset);
  172. /* instruct hypervisor to maintain PMCs */
  173. if (firmware_has_feature(FW_FEATURE_SPLPAR))
  174. get_lppaca()->pmcregs_in_use = 1;
  175. }
  176. static void __init pSeries_setup_arch(void)
  177. {
  178. /* Fixup ppc_md depending on the type of interrupt controller */
  179. if (ppc64_interrupt_controller == IC_OPEN_PIC) {
  180. ppc_md.init_IRQ = pSeries_init_mpic;
  181. ppc_md.get_irq = mpic_get_irq;
  182. /* Allocate the mpic now, so that find_and_init_phbs() can
  183. * fill the ISUs */
  184. pSeries_setup_mpic();
  185. } else
  186. ppc_md.init_IRQ = xics_init_IRQ;
  187. #ifdef CONFIG_SMP
  188. smp_init_pSeries();
  189. #endif
  190. /* openpic global configuration register (64-bit format). */
  191. /* openpic Interrupt Source Unit pointer (64-bit format). */
  192. /* python0 facility area (mmio) (64-bit format) REAL address. */
  193. /* init to some ~sane value until calibrate_delay() runs */
  194. loops_per_jiffy = 50000000;
  195. if (ROOT_DEV == 0) {
  196. printk("No ramdisk, default root is /dev/sda2\n");
  197. ROOT_DEV = Root_SDA2;
  198. }
  199. fwnmi_init();
  200. /* Find and initialize PCI host bridges */
  201. init_pci_config_tokens();
  202. find_and_init_phbs();
  203. eeh_init();
  204. pSeries_nvram_init();
  205. /* Choose an idle loop */
  206. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  207. vpa_init(boot_cpuid);
  208. if (get_lppaca()->shared_proc) {
  209. printk(KERN_DEBUG "Using shared processor idle loop\n");
  210. ppc_md.power_save = pseries_shared_idle_sleep;
  211. } else {
  212. printk(KERN_DEBUG "Using dedicated idle loop\n");
  213. ppc_md.power_save = pseries_dedicated_idle_sleep;
  214. }
  215. } else {
  216. printk(KERN_DEBUG "Using default idle loop\n");
  217. }
  218. if (firmware_has_feature(FW_FEATURE_LPAR))
  219. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  220. else
  221. ppc_md.enable_pmcs = power4_enable_pmcs;
  222. }
  223. static int __init pSeries_init_panel(void)
  224. {
  225. /* Manually leave the kernel version on the panel. */
  226. ppc_md.progress("Linux ppc64\n", 0);
  227. ppc_md.progress(system_utsname.release, 0);
  228. return 0;
  229. }
  230. arch_initcall(pSeries_init_panel);
  231. static void __init pSeries_discover_pic(void)
  232. {
  233. struct device_node *np;
  234. char *typep;
  235. /*
  236. * Setup interrupt mapping options that are needed for finish_device_tree
  237. * to properly parse the OF interrupt tree & do the virtual irq mapping
  238. */
  239. __irq_offset_value = NUM_ISA_INTERRUPTS;
  240. ppc64_interrupt_controller = IC_INVALID;
  241. for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
  242. typep = (char *)get_property(np, "compatible", NULL);
  243. if (strstr(typep, "open-pic")) {
  244. ppc64_interrupt_controller = IC_OPEN_PIC;
  245. break;
  246. } else if (strstr(typep, "ppc-xicp")) {
  247. ppc64_interrupt_controller = IC_PPC_XIC;
  248. break;
  249. }
  250. }
  251. if (ppc64_interrupt_controller == IC_INVALID)
  252. printk("pSeries_discover_pic: failed to recognize"
  253. " interrupt-controller\n");
  254. }
  255. static void pSeries_mach_cpu_die(void)
  256. {
  257. local_irq_disable();
  258. idle_task_exit();
  259. xics_teardown_cpu(0);
  260. rtas_stop_self();
  261. /* Should never get here... */
  262. BUG();
  263. for(;;);
  264. }
  265. static int pseries_set_dabr(unsigned long dabr)
  266. {
  267. return plpar_hcall_norets(H_SET_DABR, dabr);
  268. }
  269. static int pseries_set_xdabr(unsigned long dabr)
  270. {
  271. /* We want to catch accesses from kernel and userspace */
  272. return plpar_hcall_norets(H_SET_XDABR, dabr,
  273. H_DABRX_KERNEL | H_DABRX_USER);
  274. }
  275. /*
  276. * Early initialization. Relocation is on but do not reference unbolted pages
  277. */
  278. static void __init pSeries_init_early(void)
  279. {
  280. DBG(" -> pSeries_init_early()\n");
  281. fw_feature_init();
  282. if (firmware_has_feature(FW_FEATURE_LPAR))
  283. find_udbg_vterm();
  284. if (firmware_has_feature(FW_FEATURE_DABR))
  285. ppc_md.set_dabr = pseries_set_dabr;
  286. else if (firmware_has_feature(FW_FEATURE_XDABR))
  287. ppc_md.set_dabr = pseries_set_xdabr;
  288. iommu_init_early_pSeries();
  289. pSeries_discover_pic();
  290. DBG(" <- pSeries_init_early()\n");
  291. }
  292. static int pSeries_check_legacy_ioport(unsigned int baseport)
  293. {
  294. struct device_node *np;
  295. #define I8042_DATA_REG 0x60
  296. #define FDC_BASE 0x3f0
  297. switch(baseport) {
  298. case I8042_DATA_REG:
  299. np = of_find_node_by_type(NULL, "8042");
  300. if (np == NULL)
  301. return -ENODEV;
  302. of_node_put(np);
  303. break;
  304. case FDC_BASE:
  305. np = of_find_node_by_type(NULL, "fdc");
  306. if (np == NULL)
  307. return -ENODEV;
  308. of_node_put(np);
  309. break;
  310. }
  311. return 0;
  312. }
  313. /*
  314. * Called very early, MMU is off, device-tree isn't unflattened
  315. */
  316. static int __init pSeries_probe_hypertas(unsigned long node,
  317. const char *uname, int depth,
  318. void *data)
  319. {
  320. if (depth != 1 ||
  321. (strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0))
  322. return 0;
  323. if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL)
  324. powerpc_firmware_features |= FW_FEATURE_LPAR;
  325. if (firmware_has_feature(FW_FEATURE_LPAR))
  326. hpte_init_lpar();
  327. else
  328. hpte_init_native();
  329. return 1;
  330. }
  331. static int __init pSeries_probe(void)
  332. {
  333. unsigned long root = of_get_flat_dt_root();
  334. char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(),
  335. "device_type", NULL);
  336. if (dtype == NULL)
  337. return 0;
  338. if (strcmp(dtype, "chrp"))
  339. return 0;
  340. /* Cell blades firmware claims to be chrp while it's not. Until this
  341. * is fixed, we need to avoid those here.
  342. */
  343. if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
  344. of_flat_dt_is_compatible(root, "IBM,CBEA"))
  345. return 0;
  346. DBG("pSeries detected, looking for LPAR capability...\n");
  347. /* Now try to figure out if we are running on LPAR */
  348. of_scan_flat_dt(pSeries_probe_hypertas, NULL);
  349. DBG("Machine is%s LPAR !\n",
  350. (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
  351. return 1;
  352. }
  353. DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
  354. static void pseries_dedicated_idle_sleep(void)
  355. {
  356. unsigned int cpu = smp_processor_id();
  357. unsigned long start_snooze;
  358. unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
  359. /*
  360. * Indicate to the HV that we are idle. Now would be
  361. * a good time to find other work to dispatch.
  362. */
  363. get_lppaca()->idle = 1;
  364. /*
  365. * We come in with interrupts disabled, and need_resched()
  366. * has been checked recently. If we should poll for a little
  367. * while, do so.
  368. */
  369. if (*smt_snooze_delay) {
  370. start_snooze = get_tb() +
  371. *smt_snooze_delay * tb_ticks_per_usec;
  372. local_irq_enable();
  373. set_thread_flag(TIF_POLLING_NRFLAG);
  374. while (get_tb() < start_snooze) {
  375. if (need_resched() || cpu_is_offline(cpu))
  376. goto out;
  377. ppc64_runlatch_off();
  378. HMT_low();
  379. HMT_very_low();
  380. }
  381. HMT_medium();
  382. clear_thread_flag(TIF_POLLING_NRFLAG);
  383. smp_mb();
  384. local_irq_disable();
  385. if (need_resched() || cpu_is_offline(cpu))
  386. goto out;
  387. }
  388. /*
  389. * Cede if the other thread is not idle, so that it can
  390. * go single-threaded. If the other thread is idle,
  391. * we ask the hypervisor if it has pending work it
  392. * wants to do and cede if it does. Otherwise we keep
  393. * polling in order to reduce interrupt latency.
  394. *
  395. * Doing the cede when the other thread is active will
  396. * result in this thread going dormant, meaning the other
  397. * thread gets to run in single-threaded (ST) mode, which
  398. * is slightly faster than SMT mode with this thread at
  399. * very low priority. The cede enables interrupts, which
  400. * doesn't matter here.
  401. */
  402. if (!lppaca[cpu ^ 1].idle || poll_pending() == H_PENDING)
  403. cede_processor();
  404. out:
  405. HMT_medium();
  406. get_lppaca()->idle = 0;
  407. }
  408. static void pseries_shared_idle_sleep(void)
  409. {
  410. /*
  411. * Indicate to the HV that we are idle. Now would be
  412. * a good time to find other work to dispatch.
  413. */
  414. get_lppaca()->idle = 1;
  415. /*
  416. * Yield the processor to the hypervisor. We return if
  417. * an external interrupt occurs (which are driven prior
  418. * to returning here) or if a prod occurs from another
  419. * processor. When returning here, external interrupts
  420. * are enabled.
  421. */
  422. cede_processor();
  423. get_lppaca()->idle = 0;
  424. }
  425. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  426. {
  427. if (firmware_has_feature(FW_FEATURE_LPAR))
  428. return PCI_PROBE_DEVTREE;
  429. return PCI_PROBE_NORMAL;
  430. }
  431. #ifdef CONFIG_KEXEC
  432. static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
  433. {
  434. /* Don't risk a hypervisor call if we're crashing */
  435. if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
  436. unsigned long vpa = __pa(get_lppaca());
  437. if (unregister_vpa(hard_smp_processor_id(), vpa)) {
  438. printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
  439. "failed\n", smp_processor_id(),
  440. hard_smp_processor_id());
  441. }
  442. }
  443. if (ppc64_interrupt_controller == IC_OPEN_PIC)
  444. mpic_teardown_this_cpu(secondary);
  445. else
  446. xics_teardown_cpu(secondary);
  447. }
  448. #endif
  449. define_machine(pseries) {
  450. .name = "pSeries",
  451. .probe = pSeries_probe,
  452. .setup_arch = pSeries_setup_arch,
  453. .init_early = pSeries_init_early,
  454. .show_cpuinfo = pSeries_show_cpuinfo,
  455. .log_error = pSeries_log_error,
  456. .pcibios_fixup = pSeries_final_fixup,
  457. .pci_probe_mode = pSeries_pci_probe_mode,
  458. .irq_bus_setup = pSeries_irq_bus_setup,
  459. .restart = rtas_restart,
  460. .power_off = rtas_power_off,
  461. .halt = rtas_halt,
  462. .panic = rtas_os_term,
  463. .cpu_die = pSeries_mach_cpu_die,
  464. .get_boot_time = rtas_get_boot_time,
  465. .get_rtc_time = rtas_get_rtc_time,
  466. .set_rtc_time = rtas_set_rtc_time,
  467. .calibrate_decr = generic_calibrate_decr,
  468. .progress = rtas_progress,
  469. .check_legacy_ioport = pSeries_check_legacy_ioport,
  470. .system_reset_exception = pSeries_system_reset_exception,
  471. .machine_check_exception = pSeries_machine_check_exception,
  472. #ifdef CONFIG_KEXEC
  473. .kexec_cpu_down = pseries_kexec_cpu_down,
  474. .machine_kexec = default_machine_kexec,
  475. .machine_kexec_prepare = default_machine_kexec_prepare,
  476. .machine_crash_shutdown = default_machine_crash_shutdown,
  477. #endif
  478. };