spider-pic.c 6.4 KB

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  1. /*
  2. * External Interrupt Controller on Spider South Bridge
  3. *
  4. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  5. *
  6. * Author: Arnd Bergmann <arndb@de.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <asm/pgtable.h>
  25. #include <asm/prom.h>
  26. #include <asm/io.h>
  27. #include "interrupt.h"
  28. /* register layout taken from Spider spec, table 7.4-4 */
  29. enum {
  30. TIR_DEN = 0x004, /* Detection Enable Register */
  31. TIR_MSK = 0x084, /* Mask Level Register */
  32. TIR_EDC = 0x0c0, /* Edge Detection Clear Register */
  33. TIR_PNDA = 0x100, /* Pending Register A */
  34. TIR_PNDB = 0x104, /* Pending Register B */
  35. TIR_CS = 0x144, /* Current Status Register */
  36. TIR_LCSA = 0x150, /* Level Current Status Register A */
  37. TIR_LCSB = 0x154, /* Level Current Status Register B */
  38. TIR_LCSC = 0x158, /* Level Current Status Register C */
  39. TIR_LCSD = 0x15c, /* Level Current Status Register D */
  40. TIR_CFGA = 0x200, /* Setting Register A0 */
  41. TIR_CFGB = 0x204, /* Setting Register B0 */
  42. /* 0x208 ... 0x3ff Setting Register An/Bn */
  43. TIR_PPNDA = 0x400, /* Packet Pending Register A */
  44. TIR_PPNDB = 0x404, /* Packet Pending Register B */
  45. TIR_PIERA = 0x408, /* Packet Output Error Register A */
  46. TIR_PIERB = 0x40c, /* Packet Output Error Register B */
  47. TIR_PIEN = 0x444, /* Packet Output Enable Register */
  48. TIR_PIPND = 0x454, /* Packet Output Pending Register */
  49. TIRDID = 0x484, /* Spider Device ID Register */
  50. REISTIM = 0x500, /* Reissue Command Timeout Time Setting */
  51. REISTIMEN = 0x504, /* Reissue Command Timeout Setting */
  52. REISWAITEN = 0x508, /* Reissue Wait Control*/
  53. };
  54. static void __iomem *spider_pics[4];
  55. static void __iomem *spider_get_pic(int irq)
  56. {
  57. int node = irq / IIC_NODE_STRIDE;
  58. irq %= IIC_NODE_STRIDE;
  59. if (irq >= IIC_EXT_OFFSET &&
  60. irq < IIC_EXT_OFFSET + IIC_NUM_EXT &&
  61. spider_pics)
  62. return spider_pics[node];
  63. return NULL;
  64. }
  65. static int spider_get_nr(unsigned int irq)
  66. {
  67. return (irq % IIC_NODE_STRIDE) - IIC_EXT_OFFSET;
  68. }
  69. static void __iomem *spider_get_irq_config(int irq)
  70. {
  71. void __iomem *pic;
  72. pic = spider_get_pic(irq);
  73. return pic + TIR_CFGA + 8 * spider_get_nr(irq);
  74. }
  75. static void spider_unmask_irq(unsigned int irq)
  76. {
  77. int nodeid = (irq / IIC_NODE_STRIDE) * 0x10;
  78. void __iomem *cfg = spider_get_irq_config(irq);
  79. irq = spider_get_nr(irq);
  80. /* FIXME: Most of that is configuration and has nothing to do with enabling/disable,
  81. * besides, it's also partially bogus.
  82. */
  83. out_be32(cfg, (in_be32(cfg) & ~0xf0)| 0x3107000eu | nodeid);
  84. out_be32(cfg + 4, in_be32(cfg + 4) | 0x00020000u | irq);
  85. }
  86. static void spider_mask_irq(unsigned int irq)
  87. {
  88. void __iomem *cfg = spider_get_irq_config(irq);
  89. irq = spider_get_nr(irq);
  90. out_be32(cfg, in_be32(cfg) & ~0x30000000u);
  91. }
  92. static void spider_ack_irq(unsigned int irq)
  93. {
  94. /* Should reset edge detection logic but we don't configure any edge interrupt
  95. * at the moment.
  96. */
  97. }
  98. static struct irq_chip spider_pic = {
  99. .typename = " SPIDER ",
  100. .unmask = spider_unmask_irq,
  101. .mask = spider_mask_irq,
  102. .ack = spider_ack_irq,
  103. };
  104. static int spider_get_irq(int node)
  105. {
  106. unsigned long cs;
  107. void __iomem *regs = spider_pics[node];
  108. cs = in_be32(regs + TIR_CS) >> 24;
  109. if (cs == 63)
  110. return -1;
  111. else
  112. return cs;
  113. }
  114. static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc,
  115. struct pt_regs *regs)
  116. {
  117. int node = (int)(long)desc->handler_data;
  118. int cascade_irq;
  119. cascade_irq = spider_get_irq(node);
  120. generic_handle_irq(cascade_irq, regs);
  121. desc->chip->eoi(irq);
  122. }
  123. /* hardcoded part to be compatible with older firmware */
  124. static void __init spider_init_one(int node, unsigned long addr)
  125. {
  126. int n, irq;
  127. spider_pics[node] = ioremap(addr, 0x800);
  128. if (spider_pics[node] == NULL)
  129. panic("spider_pic: can't map registers !");
  130. printk(KERN_INFO "spider_pic: mapped for node %d, addr: 0x%lx mapped to %p\n",
  131. node, addr, spider_pics[node]);
  132. for (n = 0; n < IIC_NUM_EXT; n++) {
  133. if (n == IIC_EXT_CASCADE)
  134. continue;
  135. irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
  136. set_irq_chip_and_handler(irq, &spider_pic, handle_level_irq);
  137. get_irq_desc(irq)->status |= IRQ_LEVEL;
  138. }
  139. /* do not mask any interrupts because of level */
  140. out_be32(spider_pics[node] + TIR_MSK, 0x0);
  141. /* disable edge detection clear */
  142. /* out_be32(spider_pics[node] + TIR_EDC, 0x0); */
  143. /* enable interrupt packets to be output */
  144. out_be32(spider_pics[node] + TIR_PIEN,
  145. in_be32(spider_pics[node] + TIR_PIEN) | 0x1);
  146. /* Hook up cascade */
  147. irq = IIC_EXT_CASCADE + node * IIC_NODE_STRIDE;
  148. set_irq_data(irq, (void *)(long)node);
  149. set_irq_chained_handler(irq, spider_irq_cascade);
  150. /* Enable the interrupt detection enable bit. Do this last! */
  151. out_be32(spider_pics[node] + TIR_DEN,
  152. in_be32(spider_pics[node] + TIR_DEN) | 0x1);
  153. }
  154. void __init spider_init_IRQ(void)
  155. {
  156. unsigned long *spider_reg;
  157. struct device_node *dn;
  158. char *compatible;
  159. int node = 0;
  160. /* XXX node numbers are totally bogus. We _hope_ we get the device nodes in the right
  161. * order here but that's definitely not guaranteed, we need to get the node from the
  162. * device tree instead. There is currently no proper property for it (but our whole
  163. * device-tree is bogus anyway) so all we can do is pray or maybe test the address
  164. * and deduce the node-id
  165. */
  166. for (dn = NULL; (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
  167. compatible = (char *)get_property(dn, "compatible", NULL);
  168. if (!compatible)
  169. continue;
  170. if (strstr(compatible, "CBEA,platform-spider-pic"))
  171. spider_reg = (unsigned long *)get_property(dn, "reg", NULL);
  172. else if (strstr(compatible, "sti,platform-spider-pic") && (node < 2)) {
  173. static long hard_coded_pics[] = { 0x24000008000, 0x34000008000 };
  174. spider_reg = &hard_coded_pics[node];
  175. } else
  176. continue;
  177. if (spider_reg == NULL)
  178. printk(KERN_ERR "spider_pic: No address for node %d\n", node);
  179. spider_init_one(node, *spider_reg);
  180. node++;
  181. }
  182. }