smu.c 30 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrupts off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/smp_lock.h>
  21. #include <linux/types.h>
  22. #include <linux/kernel.h>
  23. #include <linux/device.h>
  24. #include <linux/dmapool.h>
  25. #include <linux/bootmem.h>
  26. #include <linux/vmalloc.h>
  27. #include <linux/highmem.h>
  28. #include <linux/jiffies.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/rtc.h>
  31. #include <linux/completion.h>
  32. #include <linux/miscdevice.h>
  33. #include <linux/delay.h>
  34. #include <linux/sysdev.h>
  35. #include <linux/poll.h>
  36. #include <linux/mutex.h>
  37. #include <asm/byteorder.h>
  38. #include <asm/io.h>
  39. #include <asm/prom.h>
  40. #include <asm/machdep.h>
  41. #include <asm/pmac_feature.h>
  42. #include <asm/smu.h>
  43. #include <asm/sections.h>
  44. #include <asm/abs_addr.h>
  45. #include <asm/uaccess.h>
  46. #include <asm/of_device.h>
  47. #include <asm/of_platform.h>
  48. #define VERSION "0.7"
  49. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  50. #undef DEBUG_SMU
  51. #ifdef DEBUG_SMU
  52. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  53. #else
  54. #define DPRINTK(fmt, args...) do { } while (0)
  55. #endif
  56. /*
  57. * This is the command buffer passed to the SMU hardware
  58. */
  59. #define SMU_MAX_DATA 254
  60. struct smu_cmd_buf {
  61. u8 cmd;
  62. u8 length;
  63. u8 data[SMU_MAX_DATA];
  64. };
  65. struct smu_device {
  66. spinlock_t lock;
  67. struct device_node *of_node;
  68. struct of_device *of_dev;
  69. int doorbell; /* doorbell gpio */
  70. u32 __iomem *db_buf; /* doorbell buffer */
  71. struct device_node *db_node;
  72. unsigned int db_irq;
  73. int msg;
  74. struct device_node *msg_node;
  75. unsigned int msg_irq;
  76. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  77. u32 cmd_buf_abs; /* command buffer absolute */
  78. struct list_head cmd_list;
  79. struct smu_cmd *cmd_cur; /* pending command */
  80. int broken_nap;
  81. struct list_head cmd_i2c_list;
  82. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  83. struct timer_list i2c_timer;
  84. };
  85. /*
  86. * I don't think there will ever be more than one SMU, so
  87. * for now, just hard code that
  88. */
  89. static struct smu_device *smu;
  90. static DEFINE_MUTEX(smu_part_access);
  91. static int smu_irq_inited;
  92. static void smu_i2c_retry(unsigned long data);
  93. /*
  94. * SMU driver low level stuff
  95. */
  96. static void smu_start_cmd(void)
  97. {
  98. unsigned long faddr, fend;
  99. struct smu_cmd *cmd;
  100. if (list_empty(&smu->cmd_list))
  101. return;
  102. /* Fetch first command in queue */
  103. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  104. smu->cmd_cur = cmd;
  105. list_del(&cmd->link);
  106. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  107. cmd->data_len);
  108. DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n",
  109. ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
  110. ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3],
  111. ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5],
  112. ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]);
  113. /* Fill the SMU command buffer */
  114. smu->cmd_buf->cmd = cmd->cmd;
  115. smu->cmd_buf->length = cmd->data_len;
  116. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  117. /* Flush command and data to RAM */
  118. faddr = (unsigned long)smu->cmd_buf;
  119. fend = faddr + smu->cmd_buf->length + 2;
  120. flush_inval_dcache_range(faddr, fend);
  121. /* We also disable NAP mode for the duration of the command
  122. * on U3 based machines.
  123. * This is slightly racy as it can be written back to 1 by a sysctl
  124. * but that never happens in practice. There seem to be an issue with
  125. * U3 based machines such as the iMac G5 where napping for the
  126. * whole duration of the command prevents the SMU from fetching it
  127. * from memory. This might be related to the strange i2c based
  128. * mechanism the SMU uses to access memory.
  129. */
  130. if (smu->broken_nap)
  131. powersave_nap = 0;
  132. /* This isn't exactly a DMA mapping here, I suspect
  133. * the SMU is actually communicating with us via i2c to the
  134. * northbridge or the CPU to access RAM.
  135. */
  136. writel(smu->cmd_buf_abs, smu->db_buf);
  137. /* Ring the SMU doorbell */
  138. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  139. }
  140. static irqreturn_t smu_db_intr(int irq, void *arg)
  141. {
  142. unsigned long flags;
  143. struct smu_cmd *cmd;
  144. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  145. void *misc = NULL;
  146. u8 gpio;
  147. int rc = 0;
  148. /* SMU completed the command, well, we hope, let's make sure
  149. * of it
  150. */
  151. spin_lock_irqsave(&smu->lock, flags);
  152. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  153. if ((gpio & 7) != 7) {
  154. spin_unlock_irqrestore(&smu->lock, flags);
  155. return IRQ_HANDLED;
  156. }
  157. cmd = smu->cmd_cur;
  158. smu->cmd_cur = NULL;
  159. if (cmd == NULL)
  160. goto bail;
  161. if (rc == 0) {
  162. unsigned long faddr;
  163. int reply_len;
  164. u8 ack;
  165. /* CPU might have brought back the cache line, so we need
  166. * to flush again before peeking at the SMU response. We
  167. * flush the entire buffer for now as we haven't read the
  168. * reply length (it's only 2 cache lines anyway)
  169. */
  170. faddr = (unsigned long)smu->cmd_buf;
  171. flush_inval_dcache_range(faddr, faddr + 256);
  172. /* Now check ack */
  173. ack = (~cmd->cmd) & 0xff;
  174. if (ack != smu->cmd_buf->cmd) {
  175. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  176. ack, smu->cmd_buf->cmd);
  177. rc = -EIO;
  178. }
  179. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  180. DPRINTK("SMU: reply len: %d\n", reply_len);
  181. if (reply_len > cmd->reply_len) {
  182. printk(KERN_WARNING "SMU: reply buffer too small,"
  183. "got %d bytes for a %d bytes buffer\n",
  184. reply_len, cmd->reply_len);
  185. reply_len = cmd->reply_len;
  186. }
  187. cmd->reply_len = reply_len;
  188. if (cmd->reply_buf && reply_len)
  189. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  190. }
  191. /* Now complete the command. Write status last in order as we lost
  192. * ownership of the command structure as soon as it's no longer -1
  193. */
  194. done = cmd->done;
  195. misc = cmd->misc;
  196. mb();
  197. cmd->status = rc;
  198. /* Re-enable NAP mode */
  199. if (smu->broken_nap)
  200. powersave_nap = 1;
  201. bail:
  202. /* Start next command if any */
  203. smu_start_cmd();
  204. spin_unlock_irqrestore(&smu->lock, flags);
  205. /* Call command completion handler if any */
  206. if (done)
  207. done(cmd, misc);
  208. /* It's an edge interrupt, nothing to do */
  209. return IRQ_HANDLED;
  210. }
  211. static irqreturn_t smu_msg_intr(int irq, void *arg)
  212. {
  213. /* I don't quite know what to do with this one, we seem to never
  214. * receive it, so I suspect we have to arm it someway in the SMU
  215. * to start getting events that way.
  216. */
  217. printk(KERN_INFO "SMU: message interrupt !\n");
  218. /* It's an edge interrupt, nothing to do */
  219. return IRQ_HANDLED;
  220. }
  221. /*
  222. * Queued command management.
  223. *
  224. */
  225. int smu_queue_cmd(struct smu_cmd *cmd)
  226. {
  227. unsigned long flags;
  228. if (smu == NULL)
  229. return -ENODEV;
  230. if (cmd->data_len > SMU_MAX_DATA ||
  231. cmd->reply_len > SMU_MAX_DATA)
  232. return -EINVAL;
  233. cmd->status = 1;
  234. spin_lock_irqsave(&smu->lock, flags);
  235. list_add_tail(&cmd->link, &smu->cmd_list);
  236. if (smu->cmd_cur == NULL)
  237. smu_start_cmd();
  238. spin_unlock_irqrestore(&smu->lock, flags);
  239. /* Workaround for early calls when irq isn't available */
  240. if (!smu_irq_inited || smu->db_irq == NO_IRQ)
  241. smu_spinwait_cmd(cmd);
  242. return 0;
  243. }
  244. EXPORT_SYMBOL(smu_queue_cmd);
  245. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  246. unsigned int data_len,
  247. void (*done)(struct smu_cmd *cmd, void *misc),
  248. void *misc, ...)
  249. {
  250. struct smu_cmd *cmd = &scmd->cmd;
  251. va_list list;
  252. int i;
  253. if (data_len > sizeof(scmd->buffer))
  254. return -EINVAL;
  255. memset(scmd, 0, sizeof(*scmd));
  256. cmd->cmd = command;
  257. cmd->data_len = data_len;
  258. cmd->data_buf = scmd->buffer;
  259. cmd->reply_len = sizeof(scmd->buffer);
  260. cmd->reply_buf = scmd->buffer;
  261. cmd->done = done;
  262. cmd->misc = misc;
  263. va_start(list, misc);
  264. for (i = 0; i < data_len; ++i)
  265. scmd->buffer[i] = (u8)va_arg(list, int);
  266. va_end(list);
  267. return smu_queue_cmd(cmd);
  268. }
  269. EXPORT_SYMBOL(smu_queue_simple);
  270. void smu_poll(void)
  271. {
  272. u8 gpio;
  273. if (smu == NULL)
  274. return;
  275. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  276. if ((gpio & 7) == 7)
  277. smu_db_intr(smu->db_irq, smu);
  278. }
  279. EXPORT_SYMBOL(smu_poll);
  280. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  281. {
  282. struct completion *comp = misc;
  283. complete(comp);
  284. }
  285. EXPORT_SYMBOL(smu_done_complete);
  286. void smu_spinwait_cmd(struct smu_cmd *cmd)
  287. {
  288. while(cmd->status == 1)
  289. smu_poll();
  290. }
  291. EXPORT_SYMBOL(smu_spinwait_cmd);
  292. /* RTC low level commands */
  293. static inline int bcd2hex (int n)
  294. {
  295. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  296. }
  297. static inline int hex2bcd (int n)
  298. {
  299. return ((n / 10) << 4) + (n % 10);
  300. }
  301. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  302. struct rtc_time *time)
  303. {
  304. cmd_buf->cmd = 0x8e;
  305. cmd_buf->length = 8;
  306. cmd_buf->data[0] = 0x80;
  307. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  308. cmd_buf->data[2] = hex2bcd(time->tm_min);
  309. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  310. cmd_buf->data[4] = time->tm_wday;
  311. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  312. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  313. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  314. }
  315. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  316. {
  317. struct smu_simple_cmd cmd;
  318. int rc;
  319. if (smu == NULL)
  320. return -ENODEV;
  321. memset(time, 0, sizeof(struct rtc_time));
  322. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  323. SMU_CMD_RTC_GET_DATETIME);
  324. if (rc)
  325. return rc;
  326. smu_spinwait_simple(&cmd);
  327. time->tm_sec = bcd2hex(cmd.buffer[0]);
  328. time->tm_min = bcd2hex(cmd.buffer[1]);
  329. time->tm_hour = bcd2hex(cmd.buffer[2]);
  330. time->tm_wday = bcd2hex(cmd.buffer[3]);
  331. time->tm_mday = bcd2hex(cmd.buffer[4]);
  332. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  333. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  334. return 0;
  335. }
  336. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  337. {
  338. struct smu_simple_cmd cmd;
  339. int rc;
  340. if (smu == NULL)
  341. return -ENODEV;
  342. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  343. SMU_CMD_RTC_SET_DATETIME,
  344. hex2bcd(time->tm_sec),
  345. hex2bcd(time->tm_min),
  346. hex2bcd(time->tm_hour),
  347. time->tm_wday,
  348. hex2bcd(time->tm_mday),
  349. hex2bcd(time->tm_mon) + 1,
  350. hex2bcd(time->tm_year - 100));
  351. if (rc)
  352. return rc;
  353. smu_spinwait_simple(&cmd);
  354. return 0;
  355. }
  356. void smu_shutdown(void)
  357. {
  358. struct smu_simple_cmd cmd;
  359. if (smu == NULL)
  360. return;
  361. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  362. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  363. return;
  364. smu_spinwait_simple(&cmd);
  365. for (;;)
  366. ;
  367. }
  368. void smu_restart(void)
  369. {
  370. struct smu_simple_cmd cmd;
  371. if (smu == NULL)
  372. return;
  373. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  374. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  375. return;
  376. smu_spinwait_simple(&cmd);
  377. for (;;)
  378. ;
  379. }
  380. int smu_present(void)
  381. {
  382. return smu != NULL;
  383. }
  384. EXPORT_SYMBOL(smu_present);
  385. int __init smu_init (void)
  386. {
  387. struct device_node *np;
  388. const u32 *data;
  389. np = of_find_node_by_type(NULL, "smu");
  390. if (np == NULL)
  391. return -ENODEV;
  392. printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
  393. if (smu_cmdbuf_abs == 0) {
  394. printk(KERN_ERR "SMU: Command buffer not allocated !\n");
  395. return -EINVAL;
  396. }
  397. smu = alloc_bootmem(sizeof(struct smu_device));
  398. if (smu == NULL)
  399. return -ENOMEM;
  400. memset(smu, 0, sizeof(*smu));
  401. spin_lock_init(&smu->lock);
  402. INIT_LIST_HEAD(&smu->cmd_list);
  403. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  404. smu->of_node = np;
  405. smu->db_irq = NO_IRQ;
  406. smu->msg_irq = NO_IRQ;
  407. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  408. * 32 bits value safely
  409. */
  410. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  411. smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs);
  412. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  413. if (smu->db_node == NULL) {
  414. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  415. goto fail;
  416. }
  417. data = of_get_property(smu->db_node, "reg", NULL);
  418. if (data == NULL) {
  419. of_node_put(smu->db_node);
  420. smu->db_node = NULL;
  421. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  422. goto fail;
  423. }
  424. /* Current setup has one doorbell GPIO that does both doorbell
  425. * and ack. GPIOs are at 0x50, best would be to find that out
  426. * in the device-tree though.
  427. */
  428. smu->doorbell = *data;
  429. if (smu->doorbell < 0x50)
  430. smu->doorbell += 0x50;
  431. /* Now look for the smu-interrupt GPIO */
  432. do {
  433. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  434. if (smu->msg_node == NULL)
  435. break;
  436. data = of_get_property(smu->msg_node, "reg", NULL);
  437. if (data == NULL) {
  438. of_node_put(smu->msg_node);
  439. smu->msg_node = NULL;
  440. break;
  441. }
  442. smu->msg = *data;
  443. if (smu->msg < 0x50)
  444. smu->msg += 0x50;
  445. } while(0);
  446. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  447. * device-tree entry giving the address. Best would probably to use
  448. * an offset for K2 base though, but let's do it that way for now.
  449. */
  450. smu->db_buf = ioremap(0x8000860c, 0x1000);
  451. if (smu->db_buf == NULL) {
  452. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  453. goto fail;
  454. }
  455. /* U3 has an issue with NAP mode when issuing SMU commands */
  456. smu->broken_nap = pmac_get_uninorth_variant() < 4;
  457. if (smu->broken_nap)
  458. printk(KERN_INFO "SMU: using NAP mode workaround\n");
  459. sys_ctrler = SYS_CTRLER_SMU;
  460. return 0;
  461. fail:
  462. smu = NULL;
  463. return -ENXIO;
  464. }
  465. static int smu_late_init(void)
  466. {
  467. if (!smu)
  468. return 0;
  469. init_timer(&smu->i2c_timer);
  470. smu->i2c_timer.function = smu_i2c_retry;
  471. smu->i2c_timer.data = (unsigned long)smu;
  472. if (smu->db_node) {
  473. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  474. if (smu->db_irq == NO_IRQ)
  475. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  476. smu->db_node->full_name);
  477. }
  478. if (smu->msg_node) {
  479. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  480. if (smu->msg_irq == NO_IRQ)
  481. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  482. smu->msg_node->full_name);
  483. }
  484. /*
  485. * Try to request the interrupts
  486. */
  487. if (smu->db_irq != NO_IRQ) {
  488. if (request_irq(smu->db_irq, smu_db_intr,
  489. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  490. printk(KERN_WARNING "SMU: can't "
  491. "request interrupt %d\n",
  492. smu->db_irq);
  493. smu->db_irq = NO_IRQ;
  494. }
  495. }
  496. if (smu->msg_irq != NO_IRQ) {
  497. if (request_irq(smu->msg_irq, smu_msg_intr,
  498. IRQF_SHARED, "SMU message", smu) < 0) {
  499. printk(KERN_WARNING "SMU: can't "
  500. "request interrupt %d\n",
  501. smu->msg_irq);
  502. smu->msg_irq = NO_IRQ;
  503. }
  504. }
  505. smu_irq_inited = 1;
  506. return 0;
  507. }
  508. /* This has to be before arch_initcall as the low i2c stuff relies on the
  509. * above having been done before we reach arch_initcalls
  510. */
  511. core_initcall(smu_late_init);
  512. /*
  513. * sysfs visibility
  514. */
  515. static void smu_expose_childs(struct work_struct *unused)
  516. {
  517. struct device_node *np;
  518. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
  519. if (of_device_is_compatible(np, "smu-sensors"))
  520. of_platform_device_create(np, "smu-sensors",
  521. &smu->of_dev->dev);
  522. }
  523. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
  524. static int smu_platform_probe(struct of_device* dev,
  525. const struct of_device_id *match)
  526. {
  527. if (!smu)
  528. return -ENODEV;
  529. smu->of_dev = dev;
  530. /*
  531. * Ok, we are matched, now expose all i2c busses. We have to defer
  532. * that unfortunately or it would deadlock inside the device model
  533. */
  534. schedule_work(&smu_expose_childs_work);
  535. return 0;
  536. }
  537. static struct of_device_id smu_platform_match[] =
  538. {
  539. {
  540. .type = "smu",
  541. },
  542. {},
  543. };
  544. static struct of_platform_driver smu_of_platform_driver =
  545. {
  546. .name = "smu",
  547. .match_table = smu_platform_match,
  548. .probe = smu_platform_probe,
  549. };
  550. static int __init smu_init_sysfs(void)
  551. {
  552. /*
  553. * Due to sysfs bogosity, a sysdev is not a real device, so
  554. * we should in fact create both if we want sysdev semantics
  555. * for power management.
  556. * For now, we don't power manage machines with an SMU chip,
  557. * I'm a bit too far from figuring out how that works with those
  558. * new chipsets, but that will come back and bite us
  559. */
  560. of_register_platform_driver(&smu_of_platform_driver);
  561. return 0;
  562. }
  563. device_initcall(smu_init_sysfs);
  564. struct of_device *smu_get_ofdev(void)
  565. {
  566. if (!smu)
  567. return NULL;
  568. return smu->of_dev;
  569. }
  570. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  571. /*
  572. * i2c interface
  573. */
  574. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  575. {
  576. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  577. void *misc = cmd->misc;
  578. unsigned long flags;
  579. /* Check for read case */
  580. if (!fail && cmd->read) {
  581. if (cmd->pdata[0] < 1)
  582. fail = 1;
  583. else
  584. memcpy(cmd->info.data, &cmd->pdata[1],
  585. cmd->info.datalen);
  586. }
  587. DPRINTK("SMU: completing, success: %d\n", !fail);
  588. /* Update status and mark no pending i2c command with lock
  589. * held so nobody comes in while we dequeue an eventual
  590. * pending next i2c command
  591. */
  592. spin_lock_irqsave(&smu->lock, flags);
  593. smu->cmd_i2c_cur = NULL;
  594. wmb();
  595. cmd->status = fail ? -EIO : 0;
  596. /* Is there another i2c command waiting ? */
  597. if (!list_empty(&smu->cmd_i2c_list)) {
  598. struct smu_i2c_cmd *newcmd;
  599. /* Fetch it, new current, remove from list */
  600. newcmd = list_entry(smu->cmd_i2c_list.next,
  601. struct smu_i2c_cmd, link);
  602. smu->cmd_i2c_cur = newcmd;
  603. list_del(&cmd->link);
  604. /* Queue with low level smu */
  605. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  606. if (smu->cmd_cur == NULL)
  607. smu_start_cmd();
  608. }
  609. spin_unlock_irqrestore(&smu->lock, flags);
  610. /* Call command completion handler if any */
  611. if (done)
  612. done(cmd, misc);
  613. }
  614. static void smu_i2c_retry(unsigned long data)
  615. {
  616. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  617. DPRINTK("SMU: i2c failure, requeuing...\n");
  618. /* requeue command simply by resetting reply_len */
  619. cmd->pdata[0] = 0xff;
  620. cmd->scmd.reply_len = sizeof(cmd->pdata);
  621. smu_queue_cmd(&cmd->scmd);
  622. }
  623. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  624. {
  625. struct smu_i2c_cmd *cmd = misc;
  626. int fail = 0;
  627. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  628. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  629. /* Check for possible status */
  630. if (scmd->status < 0)
  631. fail = 1;
  632. else if (cmd->read) {
  633. if (cmd->stage == 0)
  634. fail = cmd->pdata[0] != 0;
  635. else
  636. fail = cmd->pdata[0] >= 0x80;
  637. } else {
  638. fail = cmd->pdata[0] != 0;
  639. }
  640. /* Handle failures by requeuing command, after 5ms interval
  641. */
  642. if (fail && --cmd->retries > 0) {
  643. DPRINTK("SMU: i2c failure, starting timer...\n");
  644. BUG_ON(cmd != smu->cmd_i2c_cur);
  645. if (!smu_irq_inited) {
  646. mdelay(5);
  647. smu_i2c_retry(0);
  648. return;
  649. }
  650. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  651. return;
  652. }
  653. /* If failure or stage 1, command is complete */
  654. if (fail || cmd->stage != 0) {
  655. smu_i2c_complete_command(cmd, fail);
  656. return;
  657. }
  658. DPRINTK("SMU: going to stage 1\n");
  659. /* Ok, initial command complete, now poll status */
  660. scmd->reply_buf = cmd->pdata;
  661. scmd->reply_len = sizeof(cmd->pdata);
  662. scmd->data_buf = cmd->pdata;
  663. scmd->data_len = 1;
  664. cmd->pdata[0] = 0;
  665. cmd->stage = 1;
  666. cmd->retries = 20;
  667. smu_queue_cmd(scmd);
  668. }
  669. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  670. {
  671. unsigned long flags;
  672. if (smu == NULL)
  673. return -ENODEV;
  674. /* Fill most fields of scmd */
  675. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  676. cmd->scmd.done = smu_i2c_low_completion;
  677. cmd->scmd.misc = cmd;
  678. cmd->scmd.reply_buf = cmd->pdata;
  679. cmd->scmd.reply_len = sizeof(cmd->pdata);
  680. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  681. cmd->scmd.status = 1;
  682. cmd->stage = 0;
  683. cmd->pdata[0] = 0xff;
  684. cmd->retries = 20;
  685. cmd->status = 1;
  686. /* Check transfer type, sanitize some "info" fields
  687. * based on transfer type and do more checking
  688. */
  689. cmd->info.caddr = cmd->info.devaddr;
  690. cmd->read = cmd->info.devaddr & 0x01;
  691. switch(cmd->info.type) {
  692. case SMU_I2C_TRANSFER_SIMPLE:
  693. memset(&cmd->info.sublen, 0, 4);
  694. break;
  695. case SMU_I2C_TRANSFER_COMBINED:
  696. cmd->info.devaddr &= 0xfe;
  697. case SMU_I2C_TRANSFER_STDSUB:
  698. if (cmd->info.sublen > 3)
  699. return -EINVAL;
  700. break;
  701. default:
  702. return -EINVAL;
  703. }
  704. /* Finish setting up command based on transfer direction
  705. */
  706. if (cmd->read) {
  707. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  708. return -EINVAL;
  709. memset(cmd->info.data, 0xff, cmd->info.datalen);
  710. cmd->scmd.data_len = 9;
  711. } else {
  712. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  713. return -EINVAL;
  714. cmd->scmd.data_len = 9 + cmd->info.datalen;
  715. }
  716. DPRINTK("SMU: i2c enqueuing command\n");
  717. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  718. cmd->read ? "read" : "write", cmd->info.datalen,
  719. cmd->info.bus, cmd->info.caddr,
  720. cmd->info.subaddr[0], cmd->info.type);
  721. /* Enqueue command in i2c list, and if empty, enqueue also in
  722. * main command list
  723. */
  724. spin_lock_irqsave(&smu->lock, flags);
  725. if (smu->cmd_i2c_cur == NULL) {
  726. smu->cmd_i2c_cur = cmd;
  727. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  728. if (smu->cmd_cur == NULL)
  729. smu_start_cmd();
  730. } else
  731. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  732. spin_unlock_irqrestore(&smu->lock, flags);
  733. return 0;
  734. }
  735. /*
  736. * Handling of "partitions"
  737. */
  738. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  739. {
  740. DECLARE_COMPLETION_ONSTACK(comp);
  741. unsigned int chunk;
  742. struct smu_cmd cmd;
  743. int rc;
  744. u8 params[8];
  745. /* We currently use a chunk size of 0xe. We could check the
  746. * SMU firmware version and use bigger sizes though
  747. */
  748. chunk = 0xe;
  749. while (len) {
  750. unsigned int clen = min(len, chunk);
  751. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  752. cmd.data_len = 7;
  753. cmd.data_buf = params;
  754. cmd.reply_len = chunk;
  755. cmd.reply_buf = dest;
  756. cmd.done = smu_done_complete;
  757. cmd.misc = &comp;
  758. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  759. params[1] = 0x4;
  760. *((u32 *)&params[2]) = addr;
  761. params[6] = clen;
  762. rc = smu_queue_cmd(&cmd);
  763. if (rc)
  764. return rc;
  765. wait_for_completion(&comp);
  766. if (cmd.status != 0)
  767. return rc;
  768. if (cmd.reply_len != clen) {
  769. printk(KERN_DEBUG "SMU: short read in "
  770. "smu_read_datablock, got: %d, want: %d\n",
  771. cmd.reply_len, clen);
  772. return -EIO;
  773. }
  774. len -= clen;
  775. addr += clen;
  776. dest += clen;
  777. }
  778. return 0;
  779. }
  780. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  781. {
  782. DECLARE_COMPLETION_ONSTACK(comp);
  783. struct smu_simple_cmd cmd;
  784. unsigned int addr, len, tlen;
  785. struct smu_sdbp_header *hdr;
  786. struct property *prop;
  787. /* First query the partition info */
  788. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  789. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  790. smu_done_complete, &comp,
  791. SMU_CMD_PARTITION_LATEST, id);
  792. wait_for_completion(&comp);
  793. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  794. cmd.cmd.status, cmd.cmd.reply_len);
  795. /* Partition doesn't exist (or other error) */
  796. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  797. return NULL;
  798. /* Fetch address and length from reply */
  799. addr = *((u16 *)cmd.buffer);
  800. len = cmd.buffer[3] << 2;
  801. /* Calucluate total length to allocate, including the 17 bytes
  802. * for "sdb-partition-XX" that we append at the end of the buffer
  803. */
  804. tlen = sizeof(struct property) + len + 18;
  805. prop = kzalloc(tlen, GFP_KERNEL);
  806. if (prop == NULL)
  807. return NULL;
  808. hdr = (struct smu_sdbp_header *)(prop + 1);
  809. prop->name = ((char *)prop) + tlen - 18;
  810. sprintf(prop->name, "sdb-partition-%02x", id);
  811. prop->length = len;
  812. prop->value = hdr;
  813. prop->next = NULL;
  814. /* Read the datablock */
  815. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  816. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  817. "partition %02x !\n", id);
  818. goto failure;
  819. }
  820. /* Got it, check a few things and create the property */
  821. if (hdr->id != id) {
  822. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  823. "%02x !\n", id, hdr->id);
  824. goto failure;
  825. }
  826. if (prom_add_property(smu->of_node, prop)) {
  827. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  828. "property !\n", id);
  829. goto failure;
  830. }
  831. return hdr;
  832. failure:
  833. kfree(prop);
  834. return NULL;
  835. }
  836. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  837. * when interruptible is 1
  838. */
  839. const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  840. unsigned int *size, int interruptible)
  841. {
  842. char pname[32];
  843. const struct smu_sdbp_header *part;
  844. if (!smu)
  845. return NULL;
  846. sprintf(pname, "sdb-partition-%02x", id);
  847. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  848. if (interruptible) {
  849. int rc;
  850. rc = mutex_lock_interruptible(&smu_part_access);
  851. if (rc)
  852. return ERR_PTR(rc);
  853. } else
  854. mutex_lock(&smu_part_access);
  855. part = of_get_property(smu->of_node, pname, size);
  856. if (part == NULL) {
  857. DPRINTK("trying to extract from SMU ...\n");
  858. part = smu_create_sdb_partition(id);
  859. if (part != NULL && size)
  860. *size = part->len << 2;
  861. }
  862. mutex_unlock(&smu_part_access);
  863. return part;
  864. }
  865. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  866. {
  867. return __smu_get_sdb_partition(id, size, 0);
  868. }
  869. EXPORT_SYMBOL(smu_get_sdb_partition);
  870. /*
  871. * Userland driver interface
  872. */
  873. static LIST_HEAD(smu_clist);
  874. static DEFINE_SPINLOCK(smu_clist_lock);
  875. enum smu_file_mode {
  876. smu_file_commands,
  877. smu_file_events,
  878. smu_file_closing
  879. };
  880. struct smu_private
  881. {
  882. struct list_head list;
  883. enum smu_file_mode mode;
  884. int busy;
  885. struct smu_cmd cmd;
  886. spinlock_t lock;
  887. wait_queue_head_t wait;
  888. u8 buffer[SMU_MAX_DATA];
  889. };
  890. static int smu_open(struct inode *inode, struct file *file)
  891. {
  892. struct smu_private *pp;
  893. unsigned long flags;
  894. pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
  895. if (pp == 0)
  896. return -ENOMEM;
  897. spin_lock_init(&pp->lock);
  898. pp->mode = smu_file_commands;
  899. init_waitqueue_head(&pp->wait);
  900. lock_kernel();
  901. spin_lock_irqsave(&smu_clist_lock, flags);
  902. list_add(&pp->list, &smu_clist);
  903. spin_unlock_irqrestore(&smu_clist_lock, flags);
  904. file->private_data = pp;
  905. unlock_kernel();
  906. return 0;
  907. }
  908. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  909. {
  910. struct smu_private *pp = misc;
  911. wake_up_all(&pp->wait);
  912. }
  913. static ssize_t smu_write(struct file *file, const char __user *buf,
  914. size_t count, loff_t *ppos)
  915. {
  916. struct smu_private *pp = file->private_data;
  917. unsigned long flags;
  918. struct smu_user_cmd_hdr hdr;
  919. int rc = 0;
  920. if (pp->busy)
  921. return -EBUSY;
  922. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  923. return -EFAULT;
  924. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  925. pp->mode = smu_file_events;
  926. return 0;
  927. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  928. const struct smu_sdbp_header *part;
  929. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  930. if (part == NULL)
  931. return -EINVAL;
  932. else if (IS_ERR(part))
  933. return PTR_ERR(part);
  934. return 0;
  935. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  936. return -EINVAL;
  937. else if (pp->mode != smu_file_commands)
  938. return -EBADFD;
  939. else if (hdr.data_len > SMU_MAX_DATA)
  940. return -EINVAL;
  941. spin_lock_irqsave(&pp->lock, flags);
  942. if (pp->busy) {
  943. spin_unlock_irqrestore(&pp->lock, flags);
  944. return -EBUSY;
  945. }
  946. pp->busy = 1;
  947. pp->cmd.status = 1;
  948. spin_unlock_irqrestore(&pp->lock, flags);
  949. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  950. pp->busy = 0;
  951. return -EFAULT;
  952. }
  953. pp->cmd.cmd = hdr.cmd;
  954. pp->cmd.data_len = hdr.data_len;
  955. pp->cmd.reply_len = SMU_MAX_DATA;
  956. pp->cmd.data_buf = pp->buffer;
  957. pp->cmd.reply_buf = pp->buffer;
  958. pp->cmd.done = smu_user_cmd_done;
  959. pp->cmd.misc = pp;
  960. rc = smu_queue_cmd(&pp->cmd);
  961. if (rc < 0)
  962. return rc;
  963. return count;
  964. }
  965. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  966. char __user *buf, size_t count)
  967. {
  968. DECLARE_WAITQUEUE(wait, current);
  969. struct smu_user_reply_hdr hdr;
  970. unsigned long flags;
  971. int size, rc = 0;
  972. if (!pp->busy)
  973. return 0;
  974. if (count < sizeof(struct smu_user_reply_hdr))
  975. return -EOVERFLOW;
  976. spin_lock_irqsave(&pp->lock, flags);
  977. if (pp->cmd.status == 1) {
  978. if (file->f_flags & O_NONBLOCK)
  979. return -EAGAIN;
  980. add_wait_queue(&pp->wait, &wait);
  981. for (;;) {
  982. set_current_state(TASK_INTERRUPTIBLE);
  983. rc = 0;
  984. if (pp->cmd.status != 1)
  985. break;
  986. rc = -ERESTARTSYS;
  987. if (signal_pending(current))
  988. break;
  989. spin_unlock_irqrestore(&pp->lock, flags);
  990. schedule();
  991. spin_lock_irqsave(&pp->lock, flags);
  992. }
  993. set_current_state(TASK_RUNNING);
  994. remove_wait_queue(&pp->wait, &wait);
  995. }
  996. spin_unlock_irqrestore(&pp->lock, flags);
  997. if (rc)
  998. return rc;
  999. if (pp->cmd.status != 0)
  1000. pp->cmd.reply_len = 0;
  1001. size = sizeof(hdr) + pp->cmd.reply_len;
  1002. if (count < size)
  1003. size = count;
  1004. rc = size;
  1005. hdr.status = pp->cmd.status;
  1006. hdr.reply_len = pp->cmd.reply_len;
  1007. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  1008. return -EFAULT;
  1009. size -= sizeof(hdr);
  1010. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  1011. return -EFAULT;
  1012. pp->busy = 0;
  1013. return rc;
  1014. }
  1015. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  1016. char __user *buf, size_t count)
  1017. {
  1018. /* Not implemented */
  1019. msleep_interruptible(1000);
  1020. return 0;
  1021. }
  1022. static ssize_t smu_read(struct file *file, char __user *buf,
  1023. size_t count, loff_t *ppos)
  1024. {
  1025. struct smu_private *pp = file->private_data;
  1026. if (pp->mode == smu_file_commands)
  1027. return smu_read_command(file, pp, buf, count);
  1028. if (pp->mode == smu_file_events)
  1029. return smu_read_events(file, pp, buf, count);
  1030. return -EBADFD;
  1031. }
  1032. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  1033. {
  1034. struct smu_private *pp = file->private_data;
  1035. unsigned int mask = 0;
  1036. unsigned long flags;
  1037. if (pp == 0)
  1038. return 0;
  1039. if (pp->mode == smu_file_commands) {
  1040. poll_wait(file, &pp->wait, wait);
  1041. spin_lock_irqsave(&pp->lock, flags);
  1042. if (pp->busy && pp->cmd.status != 1)
  1043. mask |= POLLIN;
  1044. spin_unlock_irqrestore(&pp->lock, flags);
  1045. } if (pp->mode == smu_file_events) {
  1046. /* Not yet implemented */
  1047. }
  1048. return mask;
  1049. }
  1050. static int smu_release(struct inode *inode, struct file *file)
  1051. {
  1052. struct smu_private *pp = file->private_data;
  1053. unsigned long flags;
  1054. unsigned int busy;
  1055. if (pp == 0)
  1056. return 0;
  1057. file->private_data = NULL;
  1058. /* Mark file as closing to avoid races with new request */
  1059. spin_lock_irqsave(&pp->lock, flags);
  1060. pp->mode = smu_file_closing;
  1061. busy = pp->busy;
  1062. /* Wait for any pending request to complete */
  1063. if (busy && pp->cmd.status == 1) {
  1064. DECLARE_WAITQUEUE(wait, current);
  1065. add_wait_queue(&pp->wait, &wait);
  1066. for (;;) {
  1067. set_current_state(TASK_UNINTERRUPTIBLE);
  1068. if (pp->cmd.status != 1)
  1069. break;
  1070. spin_unlock_irqrestore(&pp->lock, flags);
  1071. schedule();
  1072. spin_lock_irqsave(&pp->lock, flags);
  1073. }
  1074. set_current_state(TASK_RUNNING);
  1075. remove_wait_queue(&pp->wait, &wait);
  1076. }
  1077. spin_unlock_irqrestore(&pp->lock, flags);
  1078. spin_lock_irqsave(&smu_clist_lock, flags);
  1079. list_del(&pp->list);
  1080. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1081. kfree(pp);
  1082. return 0;
  1083. }
  1084. static const struct file_operations smu_device_fops = {
  1085. .llseek = no_llseek,
  1086. .read = smu_read,
  1087. .write = smu_write,
  1088. .poll = smu_fpoll,
  1089. .open = smu_open,
  1090. .release = smu_release,
  1091. };
  1092. static struct miscdevice pmu_device = {
  1093. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1094. };
  1095. static int smu_device_init(void)
  1096. {
  1097. if (!smu)
  1098. return -ENODEV;
  1099. if (misc_register(&pmu_device) < 0)
  1100. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1101. return 0;
  1102. }
  1103. device_initcall(smu_device_init);