recv.c 24 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "ath9k.h"
  17. static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
  18. struct ieee80211_hdr *hdr)
  19. {
  20. struct ieee80211_hw *hw = sc->pri_wiphy->hw;
  21. int i;
  22. spin_lock_bh(&sc->wiphy_lock);
  23. for (i = 0; i < sc->num_sec_wiphy; i++) {
  24. struct ath_wiphy *aphy = sc->sec_wiphy[i];
  25. if (aphy == NULL)
  26. continue;
  27. if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
  28. == 0) {
  29. hw = aphy->hw;
  30. break;
  31. }
  32. }
  33. spin_unlock_bh(&sc->wiphy_lock);
  34. return hw;
  35. }
  36. /*
  37. * Setup and link descriptors.
  38. *
  39. * 11N: we can no longer afford to self link the last descriptor.
  40. * MAC acknowledges BA status as long as it copies frames to host
  41. * buffer (or rx fifo). This can incorrectly acknowledge packets
  42. * to a sender if last desc is self-linked.
  43. */
  44. static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  45. {
  46. struct ath_hw *ah = sc->sc_ah;
  47. struct ath_desc *ds;
  48. struct sk_buff *skb;
  49. ATH_RXBUF_RESET(bf);
  50. ds = bf->bf_desc;
  51. ds->ds_link = 0; /* link to null */
  52. ds->ds_data = bf->bf_buf_addr;
  53. /* virtual addr of the beginning of the buffer. */
  54. skb = bf->bf_mpdu;
  55. BUG_ON(skb == NULL);
  56. ds->ds_vdata = skb->data;
  57. /* setup rx descriptors. The rx.bufsize here tells the harware
  58. * how much data it can DMA to us and that we are prepared
  59. * to process */
  60. ath9k_hw_setuprxdesc(ah, ds,
  61. sc->rx.bufsize,
  62. 0);
  63. if (sc->rx.rxlink == NULL)
  64. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  65. else
  66. *sc->rx.rxlink = bf->bf_daddr;
  67. sc->rx.rxlink = &ds->ds_link;
  68. ath9k_hw_rxena(ah);
  69. }
  70. static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
  71. {
  72. /* XXX block beacon interrupts */
  73. ath9k_hw_setantenna(sc->sc_ah, antenna);
  74. sc->rx.defant = antenna;
  75. sc->rx.rxotherant = 0;
  76. }
  77. /*
  78. * Extend 15-bit time stamp from rx descriptor to
  79. * a full 64-bit TSF using the current h/w TSF.
  80. */
  81. static u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp)
  82. {
  83. u64 tsf;
  84. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  85. if ((tsf & 0x7fff) < rstamp)
  86. tsf -= 0x8000;
  87. return (tsf & ~0x7fff) | rstamp;
  88. }
  89. /*
  90. * For Decrypt or Demic errors, we only mark packet status here and always push
  91. * up the frame up to let mac80211 handle the actual error case, be it no
  92. * decryption key or real decryption error. This let us keep statistics there.
  93. */
  94. static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds,
  95. struct ieee80211_rx_status *rx_status, bool *decrypt_error,
  96. struct ath_softc *sc)
  97. {
  98. struct ieee80211_hdr *hdr;
  99. u8 ratecode;
  100. __le16 fc;
  101. struct ieee80211_hw *hw;
  102. struct ieee80211_sta *sta;
  103. struct ath_node *an;
  104. int last_rssi = ATH_RSSI_DUMMY_MARKER;
  105. hdr = (struct ieee80211_hdr *)skb->data;
  106. fc = hdr->frame_control;
  107. memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
  108. hw = ath_get_virt_hw(sc, hdr);
  109. if (ds->ds_rxstat.rs_more) {
  110. /*
  111. * Frame spans multiple descriptors; this cannot happen yet
  112. * as we don't support jumbograms. If not in monitor mode,
  113. * discard the frame. Enable this if you want to see
  114. * error frames in Monitor mode.
  115. */
  116. if (sc->sc_ah->opmode != NL80211_IFTYPE_MONITOR)
  117. goto rx_next;
  118. } else if (ds->ds_rxstat.rs_status != 0) {
  119. if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
  120. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  121. if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY)
  122. goto rx_next;
  123. if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT) {
  124. *decrypt_error = true;
  125. } else if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC) {
  126. if (ieee80211_is_ctl(fc))
  127. /*
  128. * Sometimes, we get invalid
  129. * MIC failures on valid control frames.
  130. * Remove these mic errors.
  131. */
  132. ds->ds_rxstat.rs_status &= ~ATH9K_RXERR_MIC;
  133. else
  134. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  135. }
  136. /*
  137. * Reject error frames with the exception of
  138. * decryption and MIC failures. For monitor mode,
  139. * we also ignore the CRC error.
  140. */
  141. if (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR) {
  142. if (ds->ds_rxstat.rs_status &
  143. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
  144. ATH9K_RXERR_CRC))
  145. goto rx_next;
  146. } else {
  147. if (ds->ds_rxstat.rs_status &
  148. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
  149. goto rx_next;
  150. }
  151. }
  152. }
  153. ratecode = ds->ds_rxstat.rs_rate;
  154. if (ratecode & 0x80) {
  155. /* HT rate */
  156. rx_status->flag |= RX_FLAG_HT;
  157. if (ds->ds_rxstat.rs_flags & ATH9K_RX_2040)
  158. rx_status->flag |= RX_FLAG_40MHZ;
  159. if (ds->ds_rxstat.rs_flags & ATH9K_RX_GI)
  160. rx_status->flag |= RX_FLAG_SHORT_GI;
  161. rx_status->rate_idx = ratecode & 0x7f;
  162. } else {
  163. int i = 0, cur_band, n_rates;
  164. cur_band = hw->conf.channel->band;
  165. n_rates = sc->sbands[cur_band].n_bitrates;
  166. for (i = 0; i < n_rates; i++) {
  167. if (sc->sbands[cur_band].bitrates[i].hw_value ==
  168. ratecode) {
  169. rx_status->rate_idx = i;
  170. break;
  171. }
  172. if (sc->sbands[cur_band].bitrates[i].hw_value_short ==
  173. ratecode) {
  174. rx_status->rate_idx = i;
  175. rx_status->flag |= RX_FLAG_SHORTPRE;
  176. break;
  177. }
  178. }
  179. }
  180. rcu_read_lock();
  181. /* XXX: use ieee80211_find_sta! */
  182. sta = ieee80211_find_sta_by_hw(sc->hw, hdr->addr2);
  183. if (sta) {
  184. an = (struct ath_node *) sta->drv_priv;
  185. if (ds->ds_rxstat.rs_rssi != ATH9K_RSSI_BAD &&
  186. !ds->ds_rxstat.rs_moreaggr)
  187. ATH_RSSI_LPF(an->last_rssi, ds->ds_rxstat.rs_rssi);
  188. last_rssi = an->last_rssi;
  189. }
  190. rcu_read_unlock();
  191. if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
  192. ds->ds_rxstat.rs_rssi = ATH_EP_RND(last_rssi,
  193. ATH_RSSI_EP_MULTIPLIER);
  194. if (ds->ds_rxstat.rs_rssi < 0)
  195. ds->ds_rxstat.rs_rssi = 0;
  196. else if (ds->ds_rxstat.rs_rssi > 127)
  197. ds->ds_rxstat.rs_rssi = 127;
  198. /* Update Beacon RSSI, this is used by ANI. */
  199. if (ieee80211_is_beacon(fc))
  200. sc->sc_ah->stats.avgbrssi = ds->ds_rxstat.rs_rssi;
  201. rx_status->mactime = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp);
  202. rx_status->band = hw->conf.channel->band;
  203. rx_status->freq = hw->conf.channel->center_freq;
  204. rx_status->noise = sc->ani.noise_floor;
  205. rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + ds->ds_rxstat.rs_rssi;
  206. rx_status->antenna = ds->ds_rxstat.rs_antenna;
  207. /*
  208. * Theory for reporting quality:
  209. *
  210. * At a hardware RSSI of 45 you will be able to use MCS 7 reliably.
  211. * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
  212. * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
  213. *
  214. * MCS 7 is the highets MCS index usable by a 1-stream device.
  215. * MCS 15 is the highest MCS index usable by a 2-stream device.
  216. *
  217. * All ath9k devices are either 1-stream or 2-stream.
  218. *
  219. * How many bars you see is derived from the qual reporting.
  220. *
  221. * A more elaborate scheme can be used here but it requires tables
  222. * of SNR/throughput for each possible mode used. For the MCS table
  223. * you can refer to the wireless wiki:
  224. *
  225. * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
  226. *
  227. */
  228. if (conf_is_ht(&hw->conf))
  229. rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 45;
  230. else
  231. rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 35;
  232. /* rssi can be more than 45 though, anything above that
  233. * should be considered at 100% */
  234. if (rx_status->qual > 100)
  235. rx_status->qual = 100;
  236. rx_status->flag |= RX_FLAG_TSFT;
  237. return 1;
  238. rx_next:
  239. return 0;
  240. }
  241. static void ath_opmode_init(struct ath_softc *sc)
  242. {
  243. struct ath_hw *ah = sc->sc_ah;
  244. struct ath_common *common = ath9k_hw_common(ah);
  245. u32 rfilt, mfilt[2];
  246. /* configure rx filter */
  247. rfilt = ath_calcrxfilter(sc);
  248. ath9k_hw_setrxfilter(ah, rfilt);
  249. /* configure bssid mask */
  250. if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  251. ath_hw_setbssidmask(common);
  252. /* configure operational mode */
  253. ath9k_hw_setopmode(ah);
  254. /* Handle any link-level address change. */
  255. ath9k_hw_setmac(ah, common->macaddr);
  256. /* calculate and install multicast filter */
  257. mfilt[0] = mfilt[1] = ~0;
  258. ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
  259. }
  260. int ath_rx_init(struct ath_softc *sc, int nbufs)
  261. {
  262. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  263. struct sk_buff *skb;
  264. struct ath_buf *bf;
  265. int error = 0;
  266. spin_lock_init(&sc->rx.rxflushlock);
  267. sc->sc_flags &= ~SC_OP_RXFLUSH;
  268. spin_lock_init(&sc->rx.rxbuflock);
  269. sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
  270. min(common->cachelsz, (u16)64));
  271. ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
  272. common->cachelsz, sc->rx.bufsize);
  273. /* Initialize rx descriptors */
  274. error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
  275. "rx", nbufs, 1);
  276. if (error != 0) {
  277. ath_print(common, ATH_DBG_FATAL,
  278. "failed to allocate rx descriptors: %d\n", error);
  279. goto err;
  280. }
  281. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  282. skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_KERNEL);
  283. if (skb == NULL) {
  284. error = -ENOMEM;
  285. goto err;
  286. }
  287. bf->bf_mpdu = skb;
  288. bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
  289. sc->rx.bufsize,
  290. DMA_FROM_DEVICE);
  291. if (unlikely(dma_mapping_error(sc->dev,
  292. bf->bf_buf_addr))) {
  293. dev_kfree_skb_any(skb);
  294. bf->bf_mpdu = NULL;
  295. ath_print(common, ATH_DBG_FATAL,
  296. "dma_mapping_error() on RX init\n");
  297. error = -ENOMEM;
  298. goto err;
  299. }
  300. bf->bf_dmacontext = bf->bf_buf_addr;
  301. }
  302. sc->rx.rxlink = NULL;
  303. err:
  304. if (error)
  305. ath_rx_cleanup(sc);
  306. return error;
  307. }
  308. void ath_rx_cleanup(struct ath_softc *sc)
  309. {
  310. struct sk_buff *skb;
  311. struct ath_buf *bf;
  312. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  313. skb = bf->bf_mpdu;
  314. if (skb) {
  315. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  316. sc->rx.bufsize, DMA_FROM_DEVICE);
  317. dev_kfree_skb(skb);
  318. }
  319. }
  320. if (sc->rx.rxdma.dd_desc_len != 0)
  321. ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
  322. }
  323. /*
  324. * Calculate the receive filter according to the
  325. * operating mode and state:
  326. *
  327. * o always accept unicast, broadcast, and multicast traffic
  328. * o maintain current state of phy error reception (the hal
  329. * may enable phy error frames for noise immunity work)
  330. * o probe request frames are accepted only when operating in
  331. * hostap, adhoc, or monitor modes
  332. * o enable promiscuous mode according to the interface state
  333. * o accept beacons:
  334. * - when operating in adhoc mode so the 802.11 layer creates
  335. * node table entries for peers,
  336. * - when operating in station mode for collecting rssi data when
  337. * the station is otherwise quiet, or
  338. * - when operating as a repeater so we see repeater-sta beacons
  339. * - when scanning
  340. */
  341. u32 ath_calcrxfilter(struct ath_softc *sc)
  342. {
  343. #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
  344. u32 rfilt;
  345. rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
  346. | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
  347. | ATH9K_RX_FILTER_MCAST;
  348. /* If not a STA, enable processing of Probe Requests */
  349. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  350. rfilt |= ATH9K_RX_FILTER_PROBEREQ;
  351. /*
  352. * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
  353. * mode interface or when in monitor mode. AP mode does not need this
  354. * since it receives all in-BSS frames anyway.
  355. */
  356. if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
  357. (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
  358. (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
  359. rfilt |= ATH9K_RX_FILTER_PROM;
  360. if (sc->rx.rxfilter & FIF_CONTROL)
  361. rfilt |= ATH9K_RX_FILTER_CONTROL;
  362. if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
  363. !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
  364. rfilt |= ATH9K_RX_FILTER_MYBEACON;
  365. else
  366. rfilt |= ATH9K_RX_FILTER_BEACON;
  367. if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
  368. AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
  369. (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
  370. (sc->rx.rxfilter & FIF_PSPOLL))
  371. rfilt |= ATH9K_RX_FILTER_PSPOLL;
  372. if (conf_is_ht(&sc->hw->conf))
  373. rfilt |= ATH9K_RX_FILTER_COMP_BAR;
  374. if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
  375. /* TODO: only needed if more than one BSSID is in use in
  376. * station/adhoc mode */
  377. /* The following may also be needed for other older chips */
  378. if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
  379. rfilt |= ATH9K_RX_FILTER_PROM;
  380. rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
  381. }
  382. return rfilt;
  383. #undef RX_FILTER_PRESERVE
  384. }
  385. int ath_startrecv(struct ath_softc *sc)
  386. {
  387. struct ath_hw *ah = sc->sc_ah;
  388. struct ath_buf *bf, *tbf;
  389. spin_lock_bh(&sc->rx.rxbuflock);
  390. if (list_empty(&sc->rx.rxbuf))
  391. goto start_recv;
  392. sc->rx.rxlink = NULL;
  393. list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
  394. ath_rx_buf_link(sc, bf);
  395. }
  396. /* We could have deleted elements so the list may be empty now */
  397. if (list_empty(&sc->rx.rxbuf))
  398. goto start_recv;
  399. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  400. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  401. ath9k_hw_rxena(ah);
  402. start_recv:
  403. spin_unlock_bh(&sc->rx.rxbuflock);
  404. ath_opmode_init(sc);
  405. ath9k_hw_startpcureceive(ah);
  406. return 0;
  407. }
  408. bool ath_stoprecv(struct ath_softc *sc)
  409. {
  410. struct ath_hw *ah = sc->sc_ah;
  411. bool stopped;
  412. ath9k_hw_stoppcurecv(ah);
  413. ath9k_hw_setrxfilter(ah, 0);
  414. stopped = ath9k_hw_stopdmarecv(ah);
  415. sc->rx.rxlink = NULL;
  416. return stopped;
  417. }
  418. void ath_flushrecv(struct ath_softc *sc)
  419. {
  420. spin_lock_bh(&sc->rx.rxflushlock);
  421. sc->sc_flags |= SC_OP_RXFLUSH;
  422. ath_rx_tasklet(sc, 1);
  423. sc->sc_flags &= ~SC_OP_RXFLUSH;
  424. spin_unlock_bh(&sc->rx.rxflushlock);
  425. }
  426. static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
  427. {
  428. /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
  429. struct ieee80211_mgmt *mgmt;
  430. u8 *pos, *end, id, elen;
  431. struct ieee80211_tim_ie *tim;
  432. mgmt = (struct ieee80211_mgmt *)skb->data;
  433. pos = mgmt->u.beacon.variable;
  434. end = skb->data + skb->len;
  435. while (pos + 2 < end) {
  436. id = *pos++;
  437. elen = *pos++;
  438. if (pos + elen > end)
  439. break;
  440. if (id == WLAN_EID_TIM) {
  441. if (elen < sizeof(*tim))
  442. break;
  443. tim = (struct ieee80211_tim_ie *) pos;
  444. if (tim->dtim_count != 0)
  445. break;
  446. return tim->bitmap_ctrl & 0x01;
  447. }
  448. pos += elen;
  449. }
  450. return false;
  451. }
  452. static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
  453. {
  454. struct ieee80211_mgmt *mgmt;
  455. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  456. if (skb->len < 24 + 8 + 2 + 2)
  457. return;
  458. mgmt = (struct ieee80211_mgmt *)skb->data;
  459. if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
  460. return; /* not from our current AP */
  461. sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
  462. if (sc->sc_flags & SC_OP_BEACON_SYNC) {
  463. sc->sc_flags &= ~SC_OP_BEACON_SYNC;
  464. ath_print(common, ATH_DBG_PS,
  465. "Reconfigure Beacon timers based on "
  466. "timestamp from the AP\n");
  467. ath_beacon_config(sc, NULL);
  468. }
  469. if (ath_beacon_dtim_pending_cab(skb)) {
  470. /*
  471. * Remain awake waiting for buffered broadcast/multicast
  472. * frames. If the last broadcast/multicast frame is not
  473. * received properly, the next beacon frame will work as
  474. * a backup trigger for returning into NETWORK SLEEP state,
  475. * so we are waiting for it as well.
  476. */
  477. ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
  478. "buffered broadcast/multicast frame(s)\n");
  479. sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
  480. return;
  481. }
  482. if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
  483. /*
  484. * This can happen if a broadcast frame is dropped or the AP
  485. * fails to send a frame indicating that all CAB frames have
  486. * been delivered.
  487. */
  488. sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
  489. ath_print(common, ATH_DBG_PS,
  490. "PS wait for CAB frames timed out\n");
  491. }
  492. }
  493. static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
  494. {
  495. struct ieee80211_hdr *hdr;
  496. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  497. hdr = (struct ieee80211_hdr *)skb->data;
  498. /* Process Beacon and CAB receive in PS state */
  499. if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
  500. ieee80211_is_beacon(hdr->frame_control))
  501. ath_rx_ps_beacon(sc, skb);
  502. else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
  503. (ieee80211_is_data(hdr->frame_control) ||
  504. ieee80211_is_action(hdr->frame_control)) &&
  505. is_multicast_ether_addr(hdr->addr1) &&
  506. !ieee80211_has_moredata(hdr->frame_control)) {
  507. /*
  508. * No more broadcast/multicast frames to be received at this
  509. * point.
  510. */
  511. sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
  512. ath_print(common, ATH_DBG_PS,
  513. "All PS CAB frames received, back to sleep\n");
  514. } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
  515. !is_multicast_ether_addr(hdr->addr1) &&
  516. !ieee80211_has_morefrags(hdr->frame_control)) {
  517. sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
  518. ath_print(common, ATH_DBG_PS,
  519. "Going back to sleep after having received "
  520. "PS-Poll data (0x%x)\n",
  521. sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
  522. SC_OP_WAIT_FOR_CAB |
  523. SC_OP_WAIT_FOR_PSPOLL_DATA |
  524. SC_OP_WAIT_FOR_TX_ACK));
  525. }
  526. }
  527. static void ath_rx_send_to_mac80211(struct ath_softc *sc, struct sk_buff *skb,
  528. struct ieee80211_rx_status *rx_status)
  529. {
  530. struct ieee80211_hdr *hdr;
  531. hdr = (struct ieee80211_hdr *)skb->data;
  532. /* Send the frame to mac80211 */
  533. if (is_multicast_ether_addr(hdr->addr1)) {
  534. int i;
  535. /*
  536. * Deliver broadcast/multicast frames to all suitable
  537. * virtual wiphys.
  538. */
  539. /* TODO: filter based on channel configuration */
  540. for (i = 0; i < sc->num_sec_wiphy; i++) {
  541. struct ath_wiphy *aphy = sc->sec_wiphy[i];
  542. struct sk_buff *nskb;
  543. if (aphy == NULL)
  544. continue;
  545. nskb = skb_copy(skb, GFP_ATOMIC);
  546. if (nskb) {
  547. memcpy(IEEE80211_SKB_RXCB(nskb), rx_status,
  548. sizeof(*rx_status));
  549. ieee80211_rx(aphy->hw, nskb);
  550. }
  551. }
  552. memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
  553. ieee80211_rx(sc->hw, skb);
  554. } else {
  555. /* Deliver unicast frames based on receiver address */
  556. memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
  557. ieee80211_rx(ath_get_virt_hw(sc, hdr), skb);
  558. }
  559. }
  560. int ath_rx_tasklet(struct ath_softc *sc, int flush)
  561. {
  562. #define PA2DESC(_sc, _pa) \
  563. ((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \
  564. ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
  565. struct ath_buf *bf;
  566. struct ath_desc *ds;
  567. struct sk_buff *skb = NULL, *requeue_skb;
  568. struct ieee80211_rx_status rx_status;
  569. struct ath_hw *ah = sc->sc_ah;
  570. struct ath_common *common = ath9k_hw_common(ah);
  571. struct ieee80211_hdr *hdr;
  572. int hdrlen, padsize, retval;
  573. bool decrypt_error = false;
  574. u8 keyix;
  575. __le16 fc;
  576. spin_lock_bh(&sc->rx.rxbuflock);
  577. do {
  578. /* If handling rx interrupt and flush is in progress => exit */
  579. if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
  580. break;
  581. if (list_empty(&sc->rx.rxbuf)) {
  582. sc->rx.rxlink = NULL;
  583. break;
  584. }
  585. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  586. ds = bf->bf_desc;
  587. /*
  588. * Must provide the virtual address of the current
  589. * descriptor, the physical address, and the virtual
  590. * address of the next descriptor in the h/w chain.
  591. * This allows the HAL to look ahead to see if the
  592. * hardware is done with a descriptor by checking the
  593. * done bit in the following descriptor and the address
  594. * of the current descriptor the DMA engine is working
  595. * on. All this is necessary because of our use of
  596. * a self-linked list to avoid rx overruns.
  597. */
  598. retval = ath9k_hw_rxprocdesc(ah, ds,
  599. bf->bf_daddr,
  600. PA2DESC(sc, ds->ds_link),
  601. 0);
  602. if (retval == -EINPROGRESS) {
  603. struct ath_buf *tbf;
  604. struct ath_desc *tds;
  605. if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
  606. sc->rx.rxlink = NULL;
  607. break;
  608. }
  609. tbf = list_entry(bf->list.next, struct ath_buf, list);
  610. /*
  611. * On some hardware the descriptor status words could
  612. * get corrupted, including the done bit. Because of
  613. * this, check if the next descriptor's done bit is
  614. * set or not.
  615. *
  616. * If the next descriptor's done bit is set, the current
  617. * descriptor has been corrupted. Force s/w to discard
  618. * this descriptor and continue...
  619. */
  620. tds = tbf->bf_desc;
  621. retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
  622. PA2DESC(sc, tds->ds_link), 0);
  623. if (retval == -EINPROGRESS) {
  624. break;
  625. }
  626. }
  627. skb = bf->bf_mpdu;
  628. if (!skb)
  629. continue;
  630. /*
  631. * Synchronize the DMA transfer with CPU before
  632. * 1. accessing the frame
  633. * 2. requeueing the same buffer to h/w
  634. */
  635. dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
  636. sc->rx.bufsize,
  637. DMA_FROM_DEVICE);
  638. /*
  639. * If we're asked to flush receive queue, directly
  640. * chain it back at the queue without processing it.
  641. */
  642. if (flush)
  643. goto requeue;
  644. if (!ds->ds_rxstat.rs_datalen)
  645. goto requeue;
  646. /* The status portion of the descriptor could get corrupted. */
  647. if (sc->rx.bufsize < ds->ds_rxstat.rs_datalen)
  648. goto requeue;
  649. if (!ath_rx_prepare(skb, ds, &rx_status, &decrypt_error, sc))
  650. goto requeue;
  651. /* Ensure we always have an skb to requeue once we are done
  652. * processing the current buffer's skb */
  653. requeue_skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_ATOMIC);
  654. /* If there is no memory we ignore the current RX'd frame,
  655. * tell hardware it can give us a new frame using the old
  656. * skb and put it at the tail of the sc->rx.rxbuf list for
  657. * processing. */
  658. if (!requeue_skb)
  659. goto requeue;
  660. /* Unmap the frame */
  661. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  662. sc->rx.bufsize,
  663. DMA_FROM_DEVICE);
  664. skb_put(skb, ds->ds_rxstat.rs_datalen);
  665. /* see if any padding is done by the hw and remove it */
  666. hdr = (struct ieee80211_hdr *)skb->data;
  667. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  668. fc = hdr->frame_control;
  669. /* The MAC header is padded to have 32-bit boundary if the
  670. * packet payload is non-zero. The general calculation for
  671. * padsize would take into account odd header lengths:
  672. * padsize = (4 - hdrlen % 4) % 4; However, since only
  673. * even-length headers are used, padding can only be 0 or 2
  674. * bytes and we can optimize this a bit. In addition, we must
  675. * not try to remove padding from short control frames that do
  676. * not have payload. */
  677. padsize = hdrlen & 3;
  678. if (padsize && hdrlen >= 24) {
  679. memmove(skb->data + padsize, skb->data, hdrlen);
  680. skb_pull(skb, padsize);
  681. }
  682. keyix = ds->ds_rxstat.rs_keyix;
  683. if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
  684. rx_status.flag |= RX_FLAG_DECRYPTED;
  685. } else if (ieee80211_has_protected(fc)
  686. && !decrypt_error && skb->len >= hdrlen + 4) {
  687. keyix = skb->data[hdrlen + 3] >> 6;
  688. if (test_bit(keyix, sc->keymap))
  689. rx_status.flag |= RX_FLAG_DECRYPTED;
  690. }
  691. if (ah->sw_mgmt_crypto &&
  692. (rx_status.flag & RX_FLAG_DECRYPTED) &&
  693. ieee80211_is_mgmt(fc)) {
  694. /* Use software decrypt for management frames. */
  695. rx_status.flag &= ~RX_FLAG_DECRYPTED;
  696. }
  697. /* We will now give hardware our shiny new allocated skb */
  698. bf->bf_mpdu = requeue_skb;
  699. bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
  700. sc->rx.bufsize,
  701. DMA_FROM_DEVICE);
  702. if (unlikely(dma_mapping_error(sc->dev,
  703. bf->bf_buf_addr))) {
  704. dev_kfree_skb_any(requeue_skb);
  705. bf->bf_mpdu = NULL;
  706. ath_print(common, ATH_DBG_FATAL,
  707. "dma_mapping_error() on RX\n");
  708. ath_rx_send_to_mac80211(sc, skb, &rx_status);
  709. break;
  710. }
  711. bf->bf_dmacontext = bf->bf_buf_addr;
  712. /*
  713. * change the default rx antenna if rx diversity chooses the
  714. * other antenna 3 times in a row.
  715. */
  716. if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
  717. if (++sc->rx.rxotherant >= 3)
  718. ath_setdefantenna(sc, ds->ds_rxstat.rs_antenna);
  719. } else {
  720. sc->rx.rxotherant = 0;
  721. }
  722. if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
  723. SC_OP_WAIT_FOR_CAB |
  724. SC_OP_WAIT_FOR_PSPOLL_DATA)))
  725. ath_rx_ps(sc, skb);
  726. ath_rx_send_to_mac80211(sc, skb, &rx_status);
  727. requeue:
  728. list_move_tail(&bf->list, &sc->rx.rxbuf);
  729. ath_rx_buf_link(sc, bf);
  730. } while (1);
  731. spin_unlock_bh(&sc->rx.rxbuflock);
  732. return 0;
  733. #undef PA2DESC
  734. }