3945-mac.c 106 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "common.h"
  50. #include "3945.h"
  51. #include "iwl-spectrum.h"
  52. /*
  53. * module name, copyright, version, etc.
  54. */
  55. #define DRV_DESCRIPTION \
  56. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  57. #ifdef CONFIG_IWLEGACY_DEBUG
  58. #define VD "d"
  59. #else
  60. #define VD
  61. #endif
  62. /*
  63. * add "s" to indicate spectrum measurement included.
  64. * we add it here to be consistent with previous releases in which
  65. * this was configurable.
  66. */
  67. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  68. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  69. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. /* module parameters */
  75. struct il_mod_params il3945_mod_params = {
  76. .sw_crypto = 1,
  77. .restart_fw = 1,
  78. .disable_hw_scan = 1,
  79. /* the rest are 0 by default */
  80. };
  81. /**
  82. * il3945_get_antenna_flags - Get antenna flags for RXON command
  83. * @il: eeprom and antenna fields are used to determine antenna flags
  84. *
  85. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  86. * il3945_mod_params.antenna specifies the antenna diversity mode:
  87. *
  88. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  89. * IL_ANTENNA_MAIN - Force MAIN antenna
  90. * IL_ANTENNA_AUX - Force AUX antenna
  91. */
  92. __le32
  93. il3945_get_antenna_flags(const struct il_priv *il)
  94. {
  95. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  96. switch (il3945_mod_params.antenna) {
  97. case IL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IL_ERR("Bad antenna selector value (0x%x)\n",
  110. il3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int
  114. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  115. struct ieee80211_key_conf *keyconf, u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == il->ctx.bcast_sta_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&il->sta_lock, flags);
  128. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  129. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  131. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  132. if ((il->stations[sta_id].sta.key.
  133. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  134. il->stations[sta_id].sta.key.key_offset =
  135. il_get_free_ucode_key_idx(il);
  136. /* else, we are overriding an existing key => no need to allocated room
  137. * in uCode. */
  138. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  139. "no space for a new key");
  140. il->stations[sta_id].sta.key.key_flags = key_flags;
  141. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  142. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  143. D_INFO("hwcrypto: modify ucode station key info\n");
  144. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  145. spin_unlock_irqrestore(&il->sta_lock, flags);
  146. return ret;
  147. }
  148. static int
  149. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  150. struct ieee80211_key_conf *keyconf, u8 sta_id)
  151. {
  152. return -EOPNOTSUPP;
  153. }
  154. static int
  155. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf, u8 sta_id)
  157. {
  158. return -EOPNOTSUPP;
  159. }
  160. static int
  161. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  162. {
  163. unsigned long flags;
  164. struct il_addsta_cmd sta_cmd;
  165. spin_lock_irqsave(&il->sta_lock, flags);
  166. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  167. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  168. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  169. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  170. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  171. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  172. sizeof(struct il_addsta_cmd));
  173. spin_unlock_irqrestore(&il->sta_lock, flags);
  174. D_INFO("hwcrypto: clear ucode station key info\n");
  175. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  176. }
  177. static int
  178. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  179. u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->cipher) {
  184. case WLAN_CIPHER_SUITE_CCMP:
  185. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  186. break;
  187. case WLAN_CIPHER_SUITE_TKIP:
  188. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_WEP40:
  191. case WLAN_CIPHER_SUITE_WEP104:
  192. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  193. break;
  194. default:
  195. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  196. ret = -EINVAL;
  197. }
  198. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  200. return ret;
  201. }
  202. static int
  203. il3945_remove_static_key(struct il_priv *il)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int
  209. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  210. {
  211. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  212. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  213. return -EOPNOTSUPP;
  214. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  215. return -EINVAL;
  216. }
  217. static void
  218. il3945_clear_free_frames(struct il_priv *il)
  219. {
  220. struct list_head *element;
  221. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  222. while (!list_empty(&il->free_frames)) {
  223. element = il->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct il3945_frame, list));
  226. il->frames_count--;
  227. }
  228. if (il->frames_count) {
  229. IL_WARN("%d frames still in use. Did we lose one?\n",
  230. il->frames_count);
  231. il->frames_count = 0;
  232. }
  233. }
  234. static struct il3945_frame *
  235. il3945_get_free_frame(struct il_priv *il)
  236. {
  237. struct il3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&il->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IL_ERR("Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. il->frames_count++;
  246. return frame;
  247. }
  248. element = il->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct il3945_frame, list);
  251. }
  252. static void
  253. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  254. {
  255. memset(frame, 0, sizeof(*frame));
  256. list_add(&frame->list, &il->free_frames);
  257. }
  258. unsigned int
  259. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  260. int left)
  261. {
  262. if (!il_is_associated(il) || !il->beacon_skb)
  263. return 0;
  264. if (il->beacon_skb->len > left)
  265. return 0;
  266. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  267. return il->beacon_skb->len;
  268. }
  269. static int
  270. il3945_send_beacon_cmd(struct il_priv *il)
  271. {
  272. struct il3945_frame *frame;
  273. unsigned int frame_size;
  274. int rc;
  275. u8 rate;
  276. frame = il3945_get_free_frame(il);
  277. if (!frame) {
  278. IL_ERR("Could not obtain free frame buffer for beacon "
  279. "command.\n");
  280. return -ENOMEM;
  281. }
  282. rate = il_get_lowest_plcp(il, &il->ctx);
  283. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  284. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  285. il3945_free_frame(il, frame);
  286. return rc;
  287. }
  288. static void
  289. il3945_unset_hw_params(struct il_priv *il)
  290. {
  291. if (il->_3945.shared_virt)
  292. dma_free_coherent(&il->pci_dev->dev,
  293. sizeof(struct il3945_shared),
  294. il->_3945.shared_virt, il->_3945.shared_phys);
  295. }
  296. static void
  297. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  298. struct il_device_cmd *cmd,
  299. struct sk_buff *skb_frag, int sta_id)
  300. {
  301. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  302. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  303. tx_cmd->sec_ctl = 0;
  304. switch (keyinfo->cipher) {
  305. case WLAN_CIPHER_SUITE_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. D_TX("tx_cmd with AES hwcrypto\n");
  309. break;
  310. case WLAN_CIPHER_SUITE_TKIP:
  311. break;
  312. case WLAN_CIPHER_SUITE_WEP104:
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. /* fall through */
  315. case WLAN_CIPHER_SUITE_WEP40:
  316. tx_cmd->sec_ctl |=
  317. TX_CMD_SEC_WEP | (info->control.hw_key->
  318. hw_key_idx & TX_CMD_SEC_MSK) <<
  319. TX_CMD_SEC_SHIFT;
  320. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  321. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  322. info->control.hw_key->hw_key_idx);
  323. break;
  324. default:
  325. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  326. break;
  327. }
  328. }
  329. /*
  330. * handle build C_TX command notification.
  331. */
  332. static void
  333. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  334. struct ieee80211_tx_info *info,
  335. struct ieee80211_hdr *hdr, u8 std_id)
  336. {
  337. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  338. __le32 tx_flags = tx_cmd->tx_flags;
  339. __le16 fc = hdr->frame_control;
  340. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  341. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  342. tx_flags |= TX_CMD_FLG_ACK_MSK;
  343. if (ieee80211_is_mgmt(fc))
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. if (ieee80211_is_probe_resp(fc) &&
  346. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  347. tx_flags |= TX_CMD_FLG_TSF_MSK;
  348. } else {
  349. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  350. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  351. }
  352. tx_cmd->sta_id = std_id;
  353. if (ieee80211_has_morefrags(fc))
  354. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  355. if (ieee80211_is_data_qos(fc)) {
  356. u8 *qc = ieee80211_get_qos_ctl(hdr);
  357. tx_cmd->tid_tspec = qc[0] & 0xf;
  358. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  359. } else {
  360. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  361. }
  362. il_tx_cmd_protection(il, info, fc, &tx_flags);
  363. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  364. if (ieee80211_is_mgmt(fc)) {
  365. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  367. else
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  369. } else {
  370. tx_cmd->timeout.pm_frame_timeout = 0;
  371. }
  372. tx_cmd->driver_txop = 0;
  373. tx_cmd->tx_flags = tx_flags;
  374. tx_cmd->next_frame_len = 0;
  375. }
  376. /*
  377. * start C_TX command process
  378. */
  379. static int
  380. il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
  381. {
  382. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  383. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  384. struct il3945_tx_cmd *tx_cmd;
  385. struct il_tx_queue *txq = NULL;
  386. struct il_queue *q = NULL;
  387. struct il_device_cmd *out_cmd;
  388. struct il_cmd_meta *out_meta;
  389. dma_addr_t phys_addr;
  390. dma_addr_t txcmd_phys;
  391. int txq_id = skb_get_queue_mapping(skb);
  392. u16 len, idx, hdr_len;
  393. u8 id;
  394. u8 unicast;
  395. u8 sta_id;
  396. u8 tid = 0;
  397. __le16 fc;
  398. u8 wait_write_ptr = 0;
  399. unsigned long flags;
  400. spin_lock_irqsave(&il->lock, flags);
  401. if (il_is_rfkill(il)) {
  402. D_DROP("Dropping - RF KILL\n");
  403. goto drop_unlock;
  404. }
  405. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  406. IL_INVALID_RATE) {
  407. IL_ERR("ERROR: No TX rate available.\n");
  408. goto drop_unlock;
  409. }
  410. unicast = !is_multicast_ether_addr(hdr->addr1);
  411. id = 0;
  412. fc = hdr->frame_control;
  413. #ifdef CONFIG_IWLEGACY_DEBUG
  414. if (ieee80211_is_auth(fc))
  415. D_TX("Sending AUTH frame\n");
  416. else if (ieee80211_is_assoc_req(fc))
  417. D_TX("Sending ASSOC frame\n");
  418. else if (ieee80211_is_reassoc_req(fc))
  419. D_TX("Sending REASSOC frame\n");
  420. #endif
  421. spin_unlock_irqrestore(&il->lock, flags);
  422. hdr_len = ieee80211_hdrlen(fc);
  423. /* Find idx into station table for destination station */
  424. sta_id = il_sta_id_or_broadcast(il, &il->ctx, info->control.sta);
  425. if (sta_id == IL_INVALID_STATION) {
  426. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  427. goto drop;
  428. }
  429. D_RATE("station Id %d\n", sta_id);
  430. if (ieee80211_is_data_qos(fc)) {
  431. u8 *qc = ieee80211_get_qos_ctl(hdr);
  432. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  433. if (unlikely(tid >= MAX_TID_COUNT))
  434. goto drop;
  435. }
  436. /* Descriptor for chosen Tx queue */
  437. txq = &il->txq[txq_id];
  438. q = &txq->q;
  439. if ((il_queue_space(q) < q->high_mark))
  440. goto drop;
  441. spin_lock_irqsave(&il->lock, flags);
  442. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  443. /* Set up driver data for this TFD */
  444. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
  445. txq->txb[q->write_ptr].skb = skb;
  446. txq->txb[q->write_ptr].ctx = &il->ctx;
  447. /* Init first empty entry in queue's array of Tx/cmd buffers */
  448. out_cmd = txq->cmd[idx];
  449. out_meta = &txq->meta[idx];
  450. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  451. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  452. memset(tx_cmd, 0, sizeof(*tx_cmd));
  453. /*
  454. * Set up the Tx-command (not MAC!) header.
  455. * Store the chosen Tx queue and TFD idx within the sequence field;
  456. * after Tx, uCode's Tx response will return this value so driver can
  457. * locate the frame within the tx queue and do post-tx processing.
  458. */
  459. out_cmd->hdr.cmd = C_TX;
  460. out_cmd->hdr.sequence =
  461. cpu_to_le16((u16)
  462. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  463. /* Copy MAC header from skb into command buffer */
  464. memcpy(tx_cmd->hdr, hdr, hdr_len);
  465. if (info->control.hw_key)
  466. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  467. /* TODO need this for burst mode later on */
  468. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  469. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  470. /* Total # bytes to be transmitted */
  471. len = (u16) skb->len;
  472. tx_cmd->len = cpu_to_le16(len);
  473. il_dbg_log_tx_data_frame(il, len, hdr);
  474. il_update_stats(il, true, fc, len);
  475. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  476. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  477. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  478. txq->need_update = 1;
  479. } else {
  480. wait_write_ptr = 1;
  481. txq->need_update = 0;
  482. }
  483. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  484. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  485. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  486. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  487. ieee80211_hdrlen(fc));
  488. /*
  489. * Use the first empty entry in this queue's command buffer array
  490. * to contain the Tx command and MAC header concatenated together
  491. * (payload data will be in another buffer).
  492. * Size of this varies, due to varying MAC header length.
  493. * If end is not dword aligned, we'll have 2 extra bytes at the end
  494. * of the MAC header (device reads on dword boundaries).
  495. * We'll tell device about this padding later.
  496. */
  497. len =
  498. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  499. hdr_len;
  500. len = (len + 3) & ~3;
  501. /* Physical address of this Tx command's header (not MAC header!),
  502. * within command buffer array. */
  503. txcmd_phys =
  504. pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE);
  505. /* we do not map meta data ... so we can safely access address to
  506. * provide to unmap command*/
  507. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  508. dma_unmap_len_set(out_meta, len, len);
  509. /* Add buffer containing Tx command and MAC(!) header to TFD's
  510. * first entry */
  511. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1,
  512. 0);
  513. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  514. * if any (802.11 null frames have no payload). */
  515. len = skb->len - hdr_len;
  516. if (len) {
  517. phys_addr =
  518. pci_map_single(il->pci_dev, skb->data + hdr_len, len,
  519. PCI_DMA_TODEVICE);
  520. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr,
  521. len, 0, U32_PAD(len));
  522. }
  523. /* Tell device the write idx *just past* this latest filled TFD */
  524. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  525. il_txq_update_write_ptr(il, txq);
  526. spin_unlock_irqrestore(&il->lock, flags);
  527. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  528. if (wait_write_ptr) {
  529. spin_lock_irqsave(&il->lock, flags);
  530. txq->need_update = 1;
  531. il_txq_update_write_ptr(il, txq);
  532. spin_unlock_irqrestore(&il->lock, flags);
  533. }
  534. il_stop_queue(il, txq);
  535. }
  536. return 0;
  537. drop_unlock:
  538. spin_unlock_irqrestore(&il->lock, flags);
  539. drop:
  540. return -1;
  541. }
  542. static int
  543. il3945_get_measurement(struct il_priv *il,
  544. struct ieee80211_measurement_params *params, u8 type)
  545. {
  546. struct il_spectrum_cmd spectrum;
  547. struct il_rx_pkt *pkt;
  548. struct il_host_cmd cmd = {
  549. .id = C_SPECTRUM_MEASUREMENT,
  550. .data = (void *)&spectrum,
  551. .flags = CMD_WANT_SKB,
  552. };
  553. u32 add_time = le64_to_cpu(params->start_time);
  554. int rc;
  555. int spectrum_resp_status;
  556. int duration = le16_to_cpu(params->duration);
  557. if (il_is_associated(il))
  558. add_time =
  559. il_usecs_to_beacons(il,
  560. le64_to_cpu(params->start_time) -
  561. il->_3945.last_tsf,
  562. le16_to_cpu(il->timing.beacon_interval));
  563. memset(&spectrum, 0, sizeof(spectrum));
  564. spectrum.channel_count = cpu_to_le16(1);
  565. spectrum.flags =
  566. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  567. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  568. cmd.len = sizeof(spectrum);
  569. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  570. if (il_is_associated(il))
  571. spectrum.start_time =
  572. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  573. le16_to_cpu(il->timing.beacon_interval));
  574. else
  575. spectrum.start_time = 0;
  576. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  577. spectrum.channels[0].channel = params->channel;
  578. spectrum.channels[0].type = type;
  579. if (il->active.flags & RXON_FLG_BAND_24G_MSK)
  580. spectrum.flags |=
  581. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  582. RXON_FLG_TGG_PROTECT_MSK;
  583. rc = il_send_cmd_sync(il, &cmd);
  584. if (rc)
  585. return rc;
  586. pkt = (struct il_rx_pkt *)cmd.reply_page;
  587. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  588. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  589. rc = -EIO;
  590. }
  591. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  592. switch (spectrum_resp_status) {
  593. case 0: /* Command will be handled */
  594. if (pkt->u.spectrum.id != 0xff) {
  595. D_INFO("Replaced existing measurement: %d\n",
  596. pkt->u.spectrum.id);
  597. il->measurement_status &= ~MEASUREMENT_READY;
  598. }
  599. il->measurement_status |= MEASUREMENT_ACTIVE;
  600. rc = 0;
  601. break;
  602. case 1: /* Command will not be handled */
  603. rc = -EAGAIN;
  604. break;
  605. }
  606. il_free_pages(il, cmd.reply_page);
  607. return rc;
  608. }
  609. static void
  610. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  611. {
  612. struct il_rx_pkt *pkt = rxb_addr(rxb);
  613. struct il_alive_resp *palive;
  614. struct delayed_work *pwork;
  615. palive = &pkt->u.alive_frame;
  616. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  617. palive->is_valid, palive->ver_type, palive->ver_subtype);
  618. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  619. D_INFO("Initialization Alive received.\n");
  620. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  621. sizeof(struct il_alive_resp));
  622. pwork = &il->init_alive_start;
  623. } else {
  624. D_INFO("Runtime Alive received.\n");
  625. memcpy(&il->card_alive, &pkt->u.alive_frame,
  626. sizeof(struct il_alive_resp));
  627. pwork = &il->alive_start;
  628. il3945_disable_events(il);
  629. }
  630. /* We delay the ALIVE response by 5ms to
  631. * give the HW RF Kill time to activate... */
  632. if (palive->is_valid == UCODE_VALID_OK)
  633. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  634. else
  635. IL_WARN("uCode did not respond OK.\n");
  636. }
  637. static void
  638. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  639. {
  640. #ifdef CONFIG_IWLEGACY_DEBUG
  641. struct il_rx_pkt *pkt = rxb_addr(rxb);
  642. #endif
  643. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  644. }
  645. static void
  646. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  647. {
  648. struct il_rx_pkt *pkt = rxb_addr(rxb);
  649. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  650. #ifdef CONFIG_IWLEGACY_DEBUG
  651. u8 rate = beacon->beacon_notify_hdr.rate;
  652. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  653. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  654. beacon->beacon_notify_hdr.failure_frame,
  655. le32_to_cpu(beacon->ibss_mgr_status),
  656. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  657. #endif
  658. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  659. }
  660. /* Handle notification from uCode that card's power state is changing
  661. * due to software, hardware, or critical temperature RFKILL */
  662. static void
  663. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  664. {
  665. struct il_rx_pkt *pkt = rxb_addr(rxb);
  666. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  667. unsigned long status = il->status;
  668. IL_WARN("Card state received: HW:%s SW:%s\n",
  669. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  670. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  671. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  672. if (flags & HW_CARD_DISABLED)
  673. set_bit(S_RF_KILL_HW, &il->status);
  674. else
  675. clear_bit(S_RF_KILL_HW, &il->status);
  676. il_scan_cancel(il);
  677. if ((test_bit(S_RF_KILL_HW, &status) !=
  678. test_bit(S_RF_KILL_HW, &il->status)))
  679. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  680. test_bit(S_RF_KILL_HW, &il->status));
  681. else
  682. wake_up(&il->wait_command_queue);
  683. }
  684. /**
  685. * il3945_setup_handlers - Initialize Rx handler callbacks
  686. *
  687. * Setup the RX handlers for each of the reply types sent from the uCode
  688. * to the host.
  689. *
  690. * This function chains into the hardware specific files for them to setup
  691. * any hardware specific handlers as well.
  692. */
  693. static void
  694. il3945_setup_handlers(struct il_priv *il)
  695. {
  696. il->handlers[N_ALIVE] = il3945_hdl_alive;
  697. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  698. il->handlers[N_ERROR] = il_hdl_error;
  699. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  700. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  701. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  702. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  703. il->handlers[N_BEACON] = il3945_hdl_beacon;
  704. /*
  705. * The same handler is used for both the REPLY to a discrete
  706. * stats request from the host as well as for the periodic
  707. * stats notifications (after received beacons) from the uCode.
  708. */
  709. il->handlers[C_STATS] = il3945_hdl_c_stats;
  710. il->handlers[N_STATS] = il3945_hdl_stats;
  711. il_setup_rx_scan_handlers(il);
  712. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  713. /* Set up hardware specific Rx handlers */
  714. il3945_hw_handler_setup(il);
  715. }
  716. /************************** RX-FUNCTIONS ****************************/
  717. /*
  718. * Rx theory of operation
  719. *
  720. * The host allocates 32 DMA target addresses and passes the host address
  721. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  722. * 0 to 31
  723. *
  724. * Rx Queue Indexes
  725. * The host/firmware share two idx registers for managing the Rx buffers.
  726. *
  727. * The READ idx maps to the first position that the firmware may be writing
  728. * to -- the driver can read up to (but not including) this position and get
  729. * good data.
  730. * The READ idx is managed by the firmware once the card is enabled.
  731. *
  732. * The WRITE idx maps to the last position the driver has read from -- the
  733. * position preceding WRITE is the last slot the firmware can place a packet.
  734. *
  735. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  736. * WRITE = READ.
  737. *
  738. * During initialization, the host sets up the READ queue position to the first
  739. * IDX position, and WRITE to the last (READ - 1 wrapped)
  740. *
  741. * When the firmware places a packet in a buffer, it will advance the READ idx
  742. * and fire the RX interrupt. The driver can then query the READ idx and
  743. * process as many packets as possible, moving the WRITE idx forward as it
  744. * resets the Rx queue buffers with new memory.
  745. *
  746. * The management in the driver is as follows:
  747. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  748. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  749. * to replenish the iwl->rxq->rx_free.
  750. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  751. * iwl->rxq is replenished and the READ IDX is updated (updating the
  752. * 'processed' and 'read' driver idxes as well)
  753. * + A received packet is processed and handed to the kernel network stack,
  754. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  755. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  756. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  757. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  758. * were enough free buffers and RX_STALLED is set it is cleared.
  759. *
  760. *
  761. * Driver sequence:
  762. *
  763. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  764. * il3945_rx_queue_restock
  765. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  766. * queue, updates firmware pointers, and updates
  767. * the WRITE idx. If insufficient rx_free buffers
  768. * are available, schedules il3945_rx_replenish
  769. *
  770. * -- enable interrupts --
  771. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  772. * READ IDX, detaching the SKB from the pool.
  773. * Moves the packet buffer from queue to rx_used.
  774. * Calls il3945_rx_queue_restock to refill any empty
  775. * slots.
  776. * ...
  777. *
  778. */
  779. /**
  780. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  781. */
  782. static inline __le32
  783. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  784. {
  785. return cpu_to_le32((u32) dma_addr);
  786. }
  787. /**
  788. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  789. *
  790. * If there are slots in the RX queue that need to be restocked,
  791. * and we have free pre-allocated buffers, fill the ranks as much
  792. * as we can, pulling from rx_free.
  793. *
  794. * This moves the 'write' idx forward to catch up with 'processed', and
  795. * also updates the memory address in the firmware to reference the new
  796. * target buffer.
  797. */
  798. static void
  799. il3945_rx_queue_restock(struct il_priv *il)
  800. {
  801. struct il_rx_queue *rxq = &il->rxq;
  802. struct list_head *element;
  803. struct il_rx_buf *rxb;
  804. unsigned long flags;
  805. int write;
  806. spin_lock_irqsave(&rxq->lock, flags);
  807. write = rxq->write & ~0x7;
  808. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  809. /* Get next free Rx buffer, remove from free list */
  810. element = rxq->rx_free.next;
  811. rxb = list_entry(element, struct il_rx_buf, list);
  812. list_del(element);
  813. /* Point to Rx buffer via next RBD in circular buffer */
  814. rxq->bd[rxq->write] =
  815. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  816. rxq->queue[rxq->write] = rxb;
  817. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  818. rxq->free_count--;
  819. }
  820. spin_unlock_irqrestore(&rxq->lock, flags);
  821. /* If the pre-allocated buffer pool is dropping low, schedule to
  822. * refill it */
  823. if (rxq->free_count <= RX_LOW_WATERMARK)
  824. queue_work(il->workqueue, &il->rx_replenish);
  825. /* If we've added more space for the firmware to place data, tell it.
  826. * Increment device's write pointer in multiples of 8. */
  827. if (rxq->write_actual != (rxq->write & ~0x7) ||
  828. abs(rxq->write - rxq->read) > 7) {
  829. spin_lock_irqsave(&rxq->lock, flags);
  830. rxq->need_update = 1;
  831. spin_unlock_irqrestore(&rxq->lock, flags);
  832. il_rx_queue_update_write_ptr(il, rxq);
  833. }
  834. }
  835. /**
  836. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  837. *
  838. * When moving to rx_free an SKB is allocated for the slot.
  839. *
  840. * Also restock the Rx queue via il3945_rx_queue_restock.
  841. * This is called as a scheduled work item (except for during initialization)
  842. */
  843. static void
  844. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  845. {
  846. struct il_rx_queue *rxq = &il->rxq;
  847. struct list_head *element;
  848. struct il_rx_buf *rxb;
  849. struct page *page;
  850. unsigned long flags;
  851. gfp_t gfp_mask = priority;
  852. while (1) {
  853. spin_lock_irqsave(&rxq->lock, flags);
  854. if (list_empty(&rxq->rx_used)) {
  855. spin_unlock_irqrestore(&rxq->lock, flags);
  856. return;
  857. }
  858. spin_unlock_irqrestore(&rxq->lock, flags);
  859. if (rxq->free_count > RX_LOW_WATERMARK)
  860. gfp_mask |= __GFP_NOWARN;
  861. if (il->hw_params.rx_page_order > 0)
  862. gfp_mask |= __GFP_COMP;
  863. /* Alloc a new receive buffer */
  864. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  865. if (!page) {
  866. if (net_ratelimit())
  867. D_INFO("Failed to allocate SKB buffer.\n");
  868. if (rxq->free_count <= RX_LOW_WATERMARK &&
  869. net_ratelimit())
  870. IL_ERR("Failed to allocate SKB buffer with %0x."
  871. "Only %u free buffers remaining.\n",
  872. priority, rxq->free_count);
  873. /* We don't reschedule replenish work here -- we will
  874. * call the restock method and if it still needs
  875. * more buffers it will schedule replenish */
  876. break;
  877. }
  878. spin_lock_irqsave(&rxq->lock, flags);
  879. if (list_empty(&rxq->rx_used)) {
  880. spin_unlock_irqrestore(&rxq->lock, flags);
  881. __free_pages(page, il->hw_params.rx_page_order);
  882. return;
  883. }
  884. element = rxq->rx_used.next;
  885. rxb = list_entry(element, struct il_rx_buf, list);
  886. list_del(element);
  887. spin_unlock_irqrestore(&rxq->lock, flags);
  888. rxb->page = page;
  889. /* Get physical address of RB/SKB */
  890. rxb->page_dma =
  891. pci_map_page(il->pci_dev, page, 0,
  892. PAGE_SIZE << il->hw_params.rx_page_order,
  893. PCI_DMA_FROMDEVICE);
  894. spin_lock_irqsave(&rxq->lock, flags);
  895. list_add_tail(&rxb->list, &rxq->rx_free);
  896. rxq->free_count++;
  897. il->alloc_rxb_page++;
  898. spin_unlock_irqrestore(&rxq->lock, flags);
  899. }
  900. }
  901. void
  902. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  903. {
  904. unsigned long flags;
  905. int i;
  906. spin_lock_irqsave(&rxq->lock, flags);
  907. INIT_LIST_HEAD(&rxq->rx_free);
  908. INIT_LIST_HEAD(&rxq->rx_used);
  909. /* Fill the rx_used queue with _all_ of the Rx buffers */
  910. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  911. /* In the reset function, these buffers may have been allocated
  912. * to an SKB, so we need to unmap and free potential storage */
  913. if (rxq->pool[i].page != NULL) {
  914. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  915. PAGE_SIZE << il->hw_params.rx_page_order,
  916. PCI_DMA_FROMDEVICE);
  917. __il_free_pages(il, rxq->pool[i].page);
  918. rxq->pool[i].page = NULL;
  919. }
  920. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  921. }
  922. /* Set us so that we have processed and used all buffers, but have
  923. * not restocked the Rx queue with fresh buffers */
  924. rxq->read = rxq->write = 0;
  925. rxq->write_actual = 0;
  926. rxq->free_count = 0;
  927. spin_unlock_irqrestore(&rxq->lock, flags);
  928. }
  929. void
  930. il3945_rx_replenish(void *data)
  931. {
  932. struct il_priv *il = data;
  933. unsigned long flags;
  934. il3945_rx_allocate(il, GFP_KERNEL);
  935. spin_lock_irqsave(&il->lock, flags);
  936. il3945_rx_queue_restock(il);
  937. spin_unlock_irqrestore(&il->lock, flags);
  938. }
  939. static void
  940. il3945_rx_replenish_now(struct il_priv *il)
  941. {
  942. il3945_rx_allocate(il, GFP_ATOMIC);
  943. il3945_rx_queue_restock(il);
  944. }
  945. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  946. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  947. * This free routine walks the list of POOL entries and if SKB is set to
  948. * non NULL it is unmapped and freed
  949. */
  950. static void
  951. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  952. {
  953. int i;
  954. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  955. if (rxq->pool[i].page != NULL) {
  956. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  957. PAGE_SIZE << il->hw_params.rx_page_order,
  958. PCI_DMA_FROMDEVICE);
  959. __il_free_pages(il, rxq->pool[i].page);
  960. rxq->pool[i].page = NULL;
  961. }
  962. }
  963. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  964. rxq->bd_dma);
  965. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  966. rxq->rb_stts, rxq->rb_stts_dma);
  967. rxq->bd = NULL;
  968. rxq->rb_stts = NULL;
  969. }
  970. /* Convert linear signal-to-noise ratio into dB */
  971. static u8 ratio2dB[100] = {
  972. /* 0 1 2 3 4 5 6 7 8 9 */
  973. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  974. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  975. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  976. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  977. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  978. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  979. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  980. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  981. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  982. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  983. };
  984. /* Calculates a relative dB value from a ratio of linear
  985. * (i.e. not dB) signal levels.
  986. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  987. int
  988. il3945_calc_db_from_ratio(int sig_ratio)
  989. {
  990. /* 1000:1 or higher just report as 60 dB */
  991. if (sig_ratio >= 1000)
  992. return 60;
  993. /* 100:1 or higher, divide by 10 and use table,
  994. * add 20 dB to make up for divide by 10 */
  995. if (sig_ratio >= 100)
  996. return 20 + (int)ratio2dB[sig_ratio / 10];
  997. /* We shouldn't see this */
  998. if (sig_ratio < 1)
  999. return 0;
  1000. /* Use table for ratios 1:1 - 99:1 */
  1001. return (int)ratio2dB[sig_ratio];
  1002. }
  1003. /**
  1004. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1005. *
  1006. * Uses the il->handlers callback function array to invoke
  1007. * the appropriate handlers, including command responses,
  1008. * frame-received notifications, and other notifications.
  1009. */
  1010. static void
  1011. il3945_rx_handle(struct il_priv *il)
  1012. {
  1013. struct il_rx_buf *rxb;
  1014. struct il_rx_pkt *pkt;
  1015. struct il_rx_queue *rxq = &il->rxq;
  1016. u32 r, i;
  1017. int reclaim;
  1018. unsigned long flags;
  1019. u8 fill_rx = 0;
  1020. u32 count = 8;
  1021. int total_empty = 0;
  1022. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1023. * buffer that the driver may process (last buffer filled by ucode). */
  1024. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1025. i = rxq->read;
  1026. /* calculate total frames need to be restock after handling RX */
  1027. total_empty = r - rxq->write_actual;
  1028. if (total_empty < 0)
  1029. total_empty += RX_QUEUE_SIZE;
  1030. if (total_empty > (RX_QUEUE_SIZE / 2))
  1031. fill_rx = 1;
  1032. /* Rx interrupt, but nothing sent from uCode */
  1033. if (i == r)
  1034. D_RX("r = %d, i = %d\n", r, i);
  1035. while (i != r) {
  1036. int len;
  1037. rxb = rxq->queue[i];
  1038. /* If an RXB doesn't have a Rx queue slot associated with it,
  1039. * then a bug has been introduced in the queue refilling
  1040. * routines -- catch it here */
  1041. BUG_ON(rxb == NULL);
  1042. rxq->queue[i] = NULL;
  1043. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1044. PAGE_SIZE << il->hw_params.rx_page_order,
  1045. PCI_DMA_FROMDEVICE);
  1046. pkt = rxb_addr(rxb);
  1047. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1048. len += sizeof(u32); /* account for status word */
  1049. /* Reclaim a command buffer only if this packet is a response
  1050. * to a (driver-originated) command.
  1051. * If the packet (e.g. Rx frame) originated from uCode,
  1052. * there is no command buffer to reclaim.
  1053. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1054. * but apparently a few don't get set; catch them here. */
  1055. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1056. pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX;
  1057. /* Based on type of command response or notification,
  1058. * handle those that need handling via function in
  1059. * handlers table. See il3945_setup_handlers() */
  1060. if (il->handlers[pkt->hdr.cmd]) {
  1061. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1062. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1063. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1064. il->handlers[pkt->hdr.cmd] (il, rxb);
  1065. } else {
  1066. /* No handling needed */
  1067. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1068. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1069. }
  1070. /*
  1071. * XXX: After here, we should always check rxb->page
  1072. * against NULL before touching it or its virtual
  1073. * memory (pkt). Because some handler might have
  1074. * already taken or freed the pages.
  1075. */
  1076. if (reclaim) {
  1077. /* Invoke any callbacks, transfer the buffer to caller,
  1078. * and fire off the (possibly) blocking il_send_cmd()
  1079. * as we reclaim the driver command queue */
  1080. if (rxb->page)
  1081. il_tx_cmd_complete(il, rxb);
  1082. else
  1083. IL_WARN("Claim null rxb?\n");
  1084. }
  1085. /* Reuse the page if possible. For notification packets and
  1086. * SKBs that fail to Rx correctly, add them back into the
  1087. * rx_free list for reuse later. */
  1088. spin_lock_irqsave(&rxq->lock, flags);
  1089. if (rxb->page != NULL) {
  1090. rxb->page_dma =
  1091. pci_map_page(il->pci_dev, rxb->page, 0,
  1092. PAGE_SIZE << il->hw_params.
  1093. rx_page_order, PCI_DMA_FROMDEVICE);
  1094. list_add_tail(&rxb->list, &rxq->rx_free);
  1095. rxq->free_count++;
  1096. } else
  1097. list_add_tail(&rxb->list, &rxq->rx_used);
  1098. spin_unlock_irqrestore(&rxq->lock, flags);
  1099. i = (i + 1) & RX_QUEUE_MASK;
  1100. /* If there are a lot of unused frames,
  1101. * restock the Rx queue so ucode won't assert. */
  1102. if (fill_rx) {
  1103. count++;
  1104. if (count >= 8) {
  1105. rxq->read = i;
  1106. il3945_rx_replenish_now(il);
  1107. count = 0;
  1108. }
  1109. }
  1110. }
  1111. /* Backtrack one entry */
  1112. rxq->read = i;
  1113. if (fill_rx)
  1114. il3945_rx_replenish_now(il);
  1115. else
  1116. il3945_rx_queue_restock(il);
  1117. }
  1118. /* call this function to flush any scheduled tasklet */
  1119. static inline void
  1120. il3945_synchronize_irq(struct il_priv *il)
  1121. {
  1122. /* wait to make sure we flush pending tasklet */
  1123. synchronize_irq(il->pci_dev->irq);
  1124. tasklet_kill(&il->irq_tasklet);
  1125. }
  1126. static const char *
  1127. il3945_desc_lookup(int i)
  1128. {
  1129. switch (i) {
  1130. case 1:
  1131. return "FAIL";
  1132. case 2:
  1133. return "BAD_PARAM";
  1134. case 3:
  1135. return "BAD_CHECKSUM";
  1136. case 4:
  1137. return "NMI_INTERRUPT";
  1138. case 5:
  1139. return "SYSASSERT";
  1140. case 6:
  1141. return "FATAL_ERROR";
  1142. }
  1143. return "UNKNOWN";
  1144. }
  1145. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1146. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1147. void
  1148. il3945_dump_nic_error_log(struct il_priv *il)
  1149. {
  1150. u32 i;
  1151. u32 desc, time, count, base, data1;
  1152. u32 blink1, blink2, ilink1, ilink2;
  1153. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1154. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1155. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1156. return;
  1157. }
  1158. count = il_read_targ_mem(il, base);
  1159. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1160. IL_ERR("Start IWL Error Log Dump:\n");
  1161. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1162. }
  1163. IL_ERR("Desc Time asrtPC blink2 "
  1164. "ilink1 nmiPC Line\n");
  1165. for (i = ERROR_START_OFFSET;
  1166. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1167. i += ERROR_ELEM_SIZE) {
  1168. desc = il_read_targ_mem(il, base + i);
  1169. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1170. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1171. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1172. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1173. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1174. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1175. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1176. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1177. ilink1, ilink2, data1);
  1178. }
  1179. }
  1180. static void
  1181. il3945_irq_tasklet(struct il_priv *il)
  1182. {
  1183. u32 inta, handled = 0;
  1184. u32 inta_fh;
  1185. unsigned long flags;
  1186. #ifdef CONFIG_IWLEGACY_DEBUG
  1187. u32 inta_mask;
  1188. #endif
  1189. spin_lock_irqsave(&il->lock, flags);
  1190. /* Ack/clear/reset pending uCode interrupts.
  1191. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1192. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1193. inta = _il_rd(il, CSR_INT);
  1194. _il_wr(il, CSR_INT, inta);
  1195. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1196. * Any new interrupts that happen after this, either while we're
  1197. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1198. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1199. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1200. #ifdef CONFIG_IWLEGACY_DEBUG
  1201. if (il_get_debug_level(il) & IL_DL_ISR) {
  1202. /* just for debug */
  1203. inta_mask = _il_rd(il, CSR_INT_MASK);
  1204. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1205. inta_mask, inta_fh);
  1206. }
  1207. #endif
  1208. spin_unlock_irqrestore(&il->lock, flags);
  1209. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1210. * atomic, make sure that inta covers all the interrupts that
  1211. * we've discovered, even if FH interrupt came in just after
  1212. * reading CSR_INT. */
  1213. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1214. inta |= CSR_INT_BIT_FH_RX;
  1215. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1216. inta |= CSR_INT_BIT_FH_TX;
  1217. /* Now service all interrupt bits discovered above. */
  1218. if (inta & CSR_INT_BIT_HW_ERR) {
  1219. IL_ERR("Hardware error detected. Restarting.\n");
  1220. /* Tell the device to stop sending interrupts */
  1221. il_disable_interrupts(il);
  1222. il->isr_stats.hw++;
  1223. il_irq_handle_error(il);
  1224. handled |= CSR_INT_BIT_HW_ERR;
  1225. return;
  1226. }
  1227. #ifdef CONFIG_IWLEGACY_DEBUG
  1228. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1229. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1230. if (inta & CSR_INT_BIT_SCD) {
  1231. D_ISR("Scheduler finished to transmit "
  1232. "the frame/frames.\n");
  1233. il->isr_stats.sch++;
  1234. }
  1235. /* Alive notification via Rx interrupt will do the real work */
  1236. if (inta & CSR_INT_BIT_ALIVE) {
  1237. D_ISR("Alive interrupt\n");
  1238. il->isr_stats.alive++;
  1239. }
  1240. }
  1241. #endif
  1242. /* Safely ignore these bits for debug checks below */
  1243. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1244. /* Error detected by uCode */
  1245. if (inta & CSR_INT_BIT_SW_ERR) {
  1246. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1247. inta);
  1248. il->isr_stats.sw++;
  1249. il_irq_handle_error(il);
  1250. handled |= CSR_INT_BIT_SW_ERR;
  1251. }
  1252. /* uCode wakes up after power-down sleep */
  1253. if (inta & CSR_INT_BIT_WAKEUP) {
  1254. D_ISR("Wakeup interrupt\n");
  1255. il_rx_queue_update_write_ptr(il, &il->rxq);
  1256. il_txq_update_write_ptr(il, &il->txq[0]);
  1257. il_txq_update_write_ptr(il, &il->txq[1]);
  1258. il_txq_update_write_ptr(il, &il->txq[2]);
  1259. il_txq_update_write_ptr(il, &il->txq[3]);
  1260. il_txq_update_write_ptr(il, &il->txq[4]);
  1261. il_txq_update_write_ptr(il, &il->txq[5]);
  1262. il->isr_stats.wakeup++;
  1263. handled |= CSR_INT_BIT_WAKEUP;
  1264. }
  1265. /* All uCode command responses, including Tx command responses,
  1266. * Rx "responses" (frame-received notification), and other
  1267. * notifications from uCode come through here*/
  1268. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1269. il3945_rx_handle(il);
  1270. il->isr_stats.rx++;
  1271. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1272. }
  1273. if (inta & CSR_INT_BIT_FH_TX) {
  1274. D_ISR("Tx interrupt\n");
  1275. il->isr_stats.tx++;
  1276. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1277. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1278. handled |= CSR_INT_BIT_FH_TX;
  1279. }
  1280. if (inta & ~handled) {
  1281. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1282. il->isr_stats.unhandled++;
  1283. }
  1284. if (inta & ~il->inta_mask) {
  1285. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1286. inta & ~il->inta_mask);
  1287. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1288. }
  1289. /* Re-enable all interrupts */
  1290. /* only Re-enable if disabled by irq */
  1291. if (test_bit(S_INT_ENABLED, &il->status))
  1292. il_enable_interrupts(il);
  1293. #ifdef CONFIG_IWLEGACY_DEBUG
  1294. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1295. inta = _il_rd(il, CSR_INT);
  1296. inta_mask = _il_rd(il, CSR_INT_MASK);
  1297. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1298. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1299. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1300. }
  1301. #endif
  1302. }
  1303. static int
  1304. il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
  1305. u8 is_active, u8 n_probes,
  1306. struct il3945_scan_channel *scan_ch,
  1307. struct ieee80211_vif *vif)
  1308. {
  1309. struct ieee80211_channel *chan;
  1310. const struct ieee80211_supported_band *sband;
  1311. const struct il_channel_info *ch_info;
  1312. u16 passive_dwell = 0;
  1313. u16 active_dwell = 0;
  1314. int added, i;
  1315. sband = il_get_hw_mode(il, band);
  1316. if (!sband)
  1317. return 0;
  1318. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1319. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1320. if (passive_dwell <= active_dwell)
  1321. passive_dwell = active_dwell + 1;
  1322. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1323. chan = il->scan_request->channels[i];
  1324. if (chan->band != band)
  1325. continue;
  1326. scan_ch->channel = chan->hw_value;
  1327. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1328. if (!il_is_channel_valid(ch_info)) {
  1329. D_SCAN("Channel %d is INVALID for this band.\n",
  1330. scan_ch->channel);
  1331. continue;
  1332. }
  1333. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1334. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1335. /* If passive , set up for auto-switch
  1336. * and use long active_dwell time.
  1337. */
  1338. if (!is_active || il_is_channel_passive(ch_info) ||
  1339. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1340. scan_ch->type = 0; /* passive */
  1341. if (IL_UCODE_API(il->ucode_ver) == 1)
  1342. scan_ch->active_dwell =
  1343. cpu_to_le16(passive_dwell - 1);
  1344. } else {
  1345. scan_ch->type = 1; /* active */
  1346. }
  1347. /* Set direct probe bits. These may be used both for active
  1348. * scan channels (probes gets sent right away),
  1349. * or for passive channels (probes get se sent only after
  1350. * hearing clear Rx packet).*/
  1351. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1352. if (n_probes)
  1353. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1354. } else {
  1355. /* uCode v1 does not allow setting direct probe bits on
  1356. * passive channel. */
  1357. if ((scan_ch->type & 1) && n_probes)
  1358. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1359. }
  1360. /* Set txpower levels to defaults */
  1361. scan_ch->tpc.dsp_atten = 110;
  1362. /* scan_pwr_info->tpc.dsp_atten; */
  1363. /*scan_pwr_info->tpc.tx_gain; */
  1364. if (band == IEEE80211_BAND_5GHZ)
  1365. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1366. else {
  1367. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1368. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1369. * power level:
  1370. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1371. */
  1372. }
  1373. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1374. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1375. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1376. scan_ch++;
  1377. added++;
  1378. }
  1379. D_SCAN("total channels to scan %d\n", added);
  1380. return added;
  1381. }
  1382. static void
  1383. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1384. {
  1385. int i;
  1386. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1387. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1388. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1389. rates[i].hw_value_short = i;
  1390. rates[i].flags = 0;
  1391. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1392. /*
  1393. * If CCK != 1M then set short preamble rate flag.
  1394. */
  1395. rates[i].flags |=
  1396. (il3945_rates[i].plcp ==
  1397. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1398. }
  1399. }
  1400. }
  1401. /******************************************************************************
  1402. *
  1403. * uCode download functions
  1404. *
  1405. ******************************************************************************/
  1406. static void
  1407. il3945_dealloc_ucode_pci(struct il_priv *il)
  1408. {
  1409. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1410. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1411. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1412. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1413. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1414. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1415. }
  1416. /**
  1417. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1418. * looking at all data.
  1419. */
  1420. static int
  1421. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1422. {
  1423. u32 val;
  1424. u32 save_len = len;
  1425. int rc = 0;
  1426. u32 errcnt;
  1427. D_INFO("ucode inst image size is %u\n", len);
  1428. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1429. errcnt = 0;
  1430. for (; len > 0; len -= sizeof(u32), image++) {
  1431. /* read data comes through single port, auto-incr addr */
  1432. /* NOTE: Use the debugless read so we don't flood kernel log
  1433. * if IL_DL_IO is set */
  1434. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1435. if (val != le32_to_cpu(*image)) {
  1436. IL_ERR("uCode INST section is invalid at "
  1437. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1438. save_len - len, val, le32_to_cpu(*image));
  1439. rc = -EIO;
  1440. errcnt++;
  1441. if (errcnt >= 20)
  1442. break;
  1443. }
  1444. }
  1445. if (!errcnt)
  1446. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1447. return rc;
  1448. }
  1449. /**
  1450. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1451. * using sample data 100 bytes apart. If these sample points are good,
  1452. * it's a pretty good bet that everything between them is good, too.
  1453. */
  1454. static int
  1455. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1456. {
  1457. u32 val;
  1458. int rc = 0;
  1459. u32 errcnt = 0;
  1460. u32 i;
  1461. D_INFO("ucode inst image size is %u\n", len);
  1462. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1463. /* read data comes through single port, auto-incr addr */
  1464. /* NOTE: Use the debugless read so we don't flood kernel log
  1465. * if IL_DL_IO is set */
  1466. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1467. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1468. if (val != le32_to_cpu(*image)) {
  1469. #if 0 /* Enable this if you want to see details */
  1470. IL_ERR("uCode INST section is invalid at "
  1471. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1472. *image);
  1473. #endif
  1474. rc = -EIO;
  1475. errcnt++;
  1476. if (errcnt >= 3)
  1477. break;
  1478. }
  1479. }
  1480. return rc;
  1481. }
  1482. /**
  1483. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1484. * and verify its contents
  1485. */
  1486. static int
  1487. il3945_verify_ucode(struct il_priv *il)
  1488. {
  1489. __le32 *image;
  1490. u32 len;
  1491. int rc = 0;
  1492. /* Try bootstrap */
  1493. image = (__le32 *) il->ucode_boot.v_addr;
  1494. len = il->ucode_boot.len;
  1495. rc = il3945_verify_inst_sparse(il, image, len);
  1496. if (rc == 0) {
  1497. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1498. return 0;
  1499. }
  1500. /* Try initialize */
  1501. image = (__le32 *) il->ucode_init.v_addr;
  1502. len = il->ucode_init.len;
  1503. rc = il3945_verify_inst_sparse(il, image, len);
  1504. if (rc == 0) {
  1505. D_INFO("Initialize uCode is good in inst SRAM\n");
  1506. return 0;
  1507. }
  1508. /* Try runtime/protocol */
  1509. image = (__le32 *) il->ucode_code.v_addr;
  1510. len = il->ucode_code.len;
  1511. rc = il3945_verify_inst_sparse(il, image, len);
  1512. if (rc == 0) {
  1513. D_INFO("Runtime uCode is good in inst SRAM\n");
  1514. return 0;
  1515. }
  1516. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1517. /* Since nothing seems to match, show first several data entries in
  1518. * instruction SRAM, so maybe visual inspection will give a clue.
  1519. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1520. image = (__le32 *) il->ucode_boot.v_addr;
  1521. len = il->ucode_boot.len;
  1522. rc = il3945_verify_inst_full(il, image, len);
  1523. return rc;
  1524. }
  1525. static void
  1526. il3945_nic_start(struct il_priv *il)
  1527. {
  1528. /* Remove all resets to allow NIC to operate */
  1529. _il_wr(il, CSR_RESET, 0);
  1530. }
  1531. #define IL3945_UCODE_GET(item) \
  1532. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1533. { \
  1534. return le32_to_cpu(ucode->v1.item); \
  1535. }
  1536. static u32
  1537. il3945_ucode_get_header_size(u32 api_ver)
  1538. {
  1539. return 24;
  1540. }
  1541. static u8 *
  1542. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1543. {
  1544. return (u8 *) ucode->v1.data;
  1545. }
  1546. IL3945_UCODE_GET(inst_size);
  1547. IL3945_UCODE_GET(data_size);
  1548. IL3945_UCODE_GET(init_size);
  1549. IL3945_UCODE_GET(init_data_size);
  1550. IL3945_UCODE_GET(boot_size);
  1551. /**
  1552. * il3945_read_ucode - Read uCode images from disk file.
  1553. *
  1554. * Copy into buffers for card to fetch via bus-mastering
  1555. */
  1556. static int
  1557. il3945_read_ucode(struct il_priv *il)
  1558. {
  1559. const struct il_ucode_header *ucode;
  1560. int ret = -EINVAL, idx;
  1561. const struct firmware *ucode_raw;
  1562. /* firmware file name contains uCode/driver compatibility version */
  1563. const char *name_pre = il->cfg->fw_name_pre;
  1564. const unsigned int api_max = il->cfg->ucode_api_max;
  1565. const unsigned int api_min = il->cfg->ucode_api_min;
  1566. char buf[25];
  1567. u8 *src;
  1568. size_t len;
  1569. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1570. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1571. * request_firmware() is synchronous, file is in memory on return. */
  1572. for (idx = api_max; idx >= api_min; idx--) {
  1573. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1574. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1575. if (ret < 0) {
  1576. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1577. if (ret == -ENOENT)
  1578. continue;
  1579. else
  1580. goto error;
  1581. } else {
  1582. if (idx < api_max)
  1583. IL_ERR("Loaded firmware %s, "
  1584. "which is deprecated. "
  1585. " Please use API v%u instead.\n", buf,
  1586. api_max);
  1587. D_INFO("Got firmware '%s' file "
  1588. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1589. break;
  1590. }
  1591. }
  1592. if (ret < 0)
  1593. goto error;
  1594. /* Make sure that we got at least our header! */
  1595. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1596. IL_ERR("File size way too small!\n");
  1597. ret = -EINVAL;
  1598. goto err_release;
  1599. }
  1600. /* Data from ucode file: header followed by uCode images */
  1601. ucode = (struct il_ucode_header *)ucode_raw->data;
  1602. il->ucode_ver = le32_to_cpu(ucode->ver);
  1603. api_ver = IL_UCODE_API(il->ucode_ver);
  1604. inst_size = il3945_ucode_get_inst_size(ucode);
  1605. data_size = il3945_ucode_get_data_size(ucode);
  1606. init_size = il3945_ucode_get_init_size(ucode);
  1607. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1608. boot_size = il3945_ucode_get_boot_size(ucode);
  1609. src = il3945_ucode_get_data(ucode);
  1610. /* api_ver should match the api version forming part of the
  1611. * firmware filename ... but we don't check for that and only rely
  1612. * on the API version read from firmware header from here on forward */
  1613. if (api_ver < api_min || api_ver > api_max) {
  1614. IL_ERR("Driver unable to support your firmware API. "
  1615. "Driver supports v%u, firmware is v%u.\n", api_max,
  1616. api_ver);
  1617. il->ucode_ver = 0;
  1618. ret = -EINVAL;
  1619. goto err_release;
  1620. }
  1621. if (api_ver != api_max)
  1622. IL_ERR("Firmware has old API version. Expected %u, "
  1623. "got %u. New firmware can be obtained "
  1624. "from http://www.intellinuxwireless.org.\n", api_max,
  1625. api_ver);
  1626. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1627. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1628. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1629. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1630. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1631. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1632. IL_UCODE_SERIAL(il->ucode_ver));
  1633. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1634. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1635. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1636. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1637. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1638. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1639. /* Verify size of file vs. image size info in file's header */
  1640. if (ucode_raw->size !=
  1641. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1642. init_size + init_data_size + boot_size) {
  1643. D_INFO("uCode file size %zd does not match expected size\n",
  1644. ucode_raw->size);
  1645. ret = -EINVAL;
  1646. goto err_release;
  1647. }
  1648. /* Verify that uCode images will fit in card's SRAM */
  1649. if (inst_size > IL39_MAX_INST_SIZE) {
  1650. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1651. ret = -EINVAL;
  1652. goto err_release;
  1653. }
  1654. if (data_size > IL39_MAX_DATA_SIZE) {
  1655. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1656. ret = -EINVAL;
  1657. goto err_release;
  1658. }
  1659. if (init_size > IL39_MAX_INST_SIZE) {
  1660. D_INFO("uCode init instr len %d too large to fit in\n",
  1661. init_size);
  1662. ret = -EINVAL;
  1663. goto err_release;
  1664. }
  1665. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1666. D_INFO("uCode init data len %d too large to fit in\n",
  1667. init_data_size);
  1668. ret = -EINVAL;
  1669. goto err_release;
  1670. }
  1671. if (boot_size > IL39_MAX_BSM_SIZE) {
  1672. D_INFO("uCode boot instr len %d too large to fit in\n",
  1673. boot_size);
  1674. ret = -EINVAL;
  1675. goto err_release;
  1676. }
  1677. /* Allocate ucode buffers for card's bus-master loading ... */
  1678. /* Runtime instructions and 2 copies of data:
  1679. * 1) unmodified from disk
  1680. * 2) backup cache for save/restore during power-downs */
  1681. il->ucode_code.len = inst_size;
  1682. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1683. il->ucode_data.len = data_size;
  1684. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1685. il->ucode_data_backup.len = data_size;
  1686. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1687. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1688. !il->ucode_data_backup.v_addr)
  1689. goto err_pci_alloc;
  1690. /* Initialization instructions and data */
  1691. if (init_size && init_data_size) {
  1692. il->ucode_init.len = init_size;
  1693. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1694. il->ucode_init_data.len = init_data_size;
  1695. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1696. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1697. goto err_pci_alloc;
  1698. }
  1699. /* Bootstrap (instructions only, no data) */
  1700. if (boot_size) {
  1701. il->ucode_boot.len = boot_size;
  1702. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1703. if (!il->ucode_boot.v_addr)
  1704. goto err_pci_alloc;
  1705. }
  1706. /* Copy images into buffers for card's bus-master reads ... */
  1707. /* Runtime instructions (first block of data in file) */
  1708. len = inst_size;
  1709. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1710. memcpy(il->ucode_code.v_addr, src, len);
  1711. src += len;
  1712. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1713. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1714. /* Runtime data (2nd block)
  1715. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1716. len = data_size;
  1717. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1718. memcpy(il->ucode_data.v_addr, src, len);
  1719. memcpy(il->ucode_data_backup.v_addr, src, len);
  1720. src += len;
  1721. /* Initialization instructions (3rd block) */
  1722. if (init_size) {
  1723. len = init_size;
  1724. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1725. memcpy(il->ucode_init.v_addr, src, len);
  1726. src += len;
  1727. }
  1728. /* Initialization data (4th block) */
  1729. if (init_data_size) {
  1730. len = init_data_size;
  1731. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1732. memcpy(il->ucode_init_data.v_addr, src, len);
  1733. src += len;
  1734. }
  1735. /* Bootstrap instructions (5th block) */
  1736. len = boot_size;
  1737. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1738. memcpy(il->ucode_boot.v_addr, src, len);
  1739. /* We have our copies now, allow OS release its copies */
  1740. release_firmware(ucode_raw);
  1741. return 0;
  1742. err_pci_alloc:
  1743. IL_ERR("failed to allocate pci memory\n");
  1744. ret = -ENOMEM;
  1745. il3945_dealloc_ucode_pci(il);
  1746. err_release:
  1747. release_firmware(ucode_raw);
  1748. error:
  1749. return ret;
  1750. }
  1751. /**
  1752. * il3945_set_ucode_ptrs - Set uCode address location
  1753. *
  1754. * Tell initialization uCode where to find runtime uCode.
  1755. *
  1756. * BSM registers initially contain pointers to initialization uCode.
  1757. * We need to replace them to load runtime uCode inst and data,
  1758. * and to save runtime data when powering down.
  1759. */
  1760. static int
  1761. il3945_set_ucode_ptrs(struct il_priv *il)
  1762. {
  1763. dma_addr_t pinst;
  1764. dma_addr_t pdata;
  1765. /* bits 31:0 for 3945 */
  1766. pinst = il->ucode_code.p_addr;
  1767. pdata = il->ucode_data_backup.p_addr;
  1768. /* Tell bootstrap uCode where to find image to load */
  1769. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1770. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1771. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1772. /* Inst byte count must be last to set up, bit 31 signals uCode
  1773. * that all new ptr/size info is in place */
  1774. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1775. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1776. D_INFO("Runtime uCode pointers are set.\n");
  1777. return 0;
  1778. }
  1779. /**
  1780. * il3945_init_alive_start - Called after N_ALIVE notification received
  1781. *
  1782. * Called after N_ALIVE notification received from "initialize" uCode.
  1783. *
  1784. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1785. */
  1786. static void
  1787. il3945_init_alive_start(struct il_priv *il)
  1788. {
  1789. /* Check alive response for "valid" sign from uCode */
  1790. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1791. /* We had an error bringing up the hardware, so take it
  1792. * all the way back down so we can try again */
  1793. D_INFO("Initialize Alive failed.\n");
  1794. goto restart;
  1795. }
  1796. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1797. * This is a paranoid check, because we would not have gotten the
  1798. * "initialize" alive if code weren't properly loaded. */
  1799. if (il3945_verify_ucode(il)) {
  1800. /* Runtime instruction load was bad;
  1801. * take it all the way back down so we can try again */
  1802. D_INFO("Bad \"initialize\" uCode load.\n");
  1803. goto restart;
  1804. }
  1805. /* Send pointers to protocol/runtime uCode image ... init code will
  1806. * load and launch runtime uCode, which will send us another "Alive"
  1807. * notification. */
  1808. D_INFO("Initialization Alive received.\n");
  1809. if (il3945_set_ucode_ptrs(il)) {
  1810. /* Runtime instruction load won't happen;
  1811. * take it all the way back down so we can try again */
  1812. D_INFO("Couldn't set up uCode pointers.\n");
  1813. goto restart;
  1814. }
  1815. return;
  1816. restart:
  1817. queue_work(il->workqueue, &il->restart);
  1818. }
  1819. /**
  1820. * il3945_alive_start - called after N_ALIVE notification received
  1821. * from protocol/runtime uCode (initialization uCode's
  1822. * Alive gets handled by il3945_init_alive_start()).
  1823. */
  1824. static void
  1825. il3945_alive_start(struct il_priv *il)
  1826. {
  1827. int thermal_spin = 0;
  1828. u32 rfkill;
  1829. D_INFO("Runtime Alive received.\n");
  1830. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1831. /* We had an error bringing up the hardware, so take it
  1832. * all the way back down so we can try again */
  1833. D_INFO("Alive failed.\n");
  1834. goto restart;
  1835. }
  1836. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1837. * This is a paranoid check, because we would not have gotten the
  1838. * "runtime" alive if code weren't properly loaded. */
  1839. if (il3945_verify_ucode(il)) {
  1840. /* Runtime instruction load was bad;
  1841. * take it all the way back down so we can try again */
  1842. D_INFO("Bad runtime uCode load.\n");
  1843. goto restart;
  1844. }
  1845. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1846. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1847. if (rfkill & 0x1) {
  1848. clear_bit(S_RF_KILL_HW, &il->status);
  1849. /* if RFKILL is not on, then wait for thermal
  1850. * sensor in adapter to kick in */
  1851. while (il3945_hw_get_temperature(il) == 0) {
  1852. thermal_spin++;
  1853. udelay(10);
  1854. }
  1855. if (thermal_spin)
  1856. D_INFO("Thermal calibration took %dus\n",
  1857. thermal_spin * 10);
  1858. } else
  1859. set_bit(S_RF_KILL_HW, &il->status);
  1860. /* After the ALIVE response, we can send commands to 3945 uCode */
  1861. set_bit(S_ALIVE, &il->status);
  1862. /* Enable watchdog to monitor the driver tx queues */
  1863. il_setup_watchdog(il);
  1864. if (il_is_rfkill(il))
  1865. return;
  1866. ieee80211_wake_queues(il->hw);
  1867. il->active_rate = RATES_MASK_3945;
  1868. il_power_update_mode(il, true);
  1869. if (il_is_associated(il)) {
  1870. struct il3945_rxon_cmd *active_rxon =
  1871. (struct il3945_rxon_cmd *)(&il->active);
  1872. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1873. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1874. } else {
  1875. /* Initialize our rx_config data */
  1876. il_connection_init_rx_config(il, &il->ctx);
  1877. }
  1878. /* Configure Bluetooth device coexistence support */
  1879. il_send_bt_config(il);
  1880. set_bit(S_READY, &il->status);
  1881. /* Configure the adapter for unassociated operation */
  1882. il3945_commit_rxon(il, &il->ctx);
  1883. il3945_reg_txpower_periodic(il);
  1884. D_INFO("ALIVE processing complete.\n");
  1885. wake_up(&il->wait_command_queue);
  1886. return;
  1887. restart:
  1888. queue_work(il->workqueue, &il->restart);
  1889. }
  1890. static void il3945_cancel_deferred_work(struct il_priv *il);
  1891. static void
  1892. __il3945_down(struct il_priv *il)
  1893. {
  1894. unsigned long flags;
  1895. int exit_pending;
  1896. D_INFO(DRV_NAME " is going down\n");
  1897. il_scan_cancel_timeout(il, 200);
  1898. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1899. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1900. * to prevent rearm timer */
  1901. del_timer_sync(&il->watchdog);
  1902. /* Station information will now be cleared in device */
  1903. il_clear_ucode_stations(il, NULL);
  1904. il_dealloc_bcast_stations(il);
  1905. il_clear_driver_stations(il);
  1906. /* Unblock any waiting calls */
  1907. wake_up_all(&il->wait_command_queue);
  1908. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1909. * exiting the module */
  1910. if (!exit_pending)
  1911. clear_bit(S_EXIT_PENDING, &il->status);
  1912. /* stop and reset the on-board processor */
  1913. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1914. /* tell the device to stop sending interrupts */
  1915. spin_lock_irqsave(&il->lock, flags);
  1916. il_disable_interrupts(il);
  1917. spin_unlock_irqrestore(&il->lock, flags);
  1918. il3945_synchronize_irq(il);
  1919. if (il->mac80211_registered)
  1920. ieee80211_stop_queues(il->hw);
  1921. /* If we have not previously called il3945_init() then
  1922. * clear all bits but the RF Kill bits and return */
  1923. if (!il_is_init(il)) {
  1924. il->status =
  1925. test_bit(S_RF_KILL_HW,
  1926. &il->
  1927. status) << S_RF_KILL_HW |
  1928. test_bit(S_GEO_CONFIGURED,
  1929. &il->
  1930. status) << S_GEO_CONFIGURED |
  1931. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1932. goto exit;
  1933. }
  1934. /* ...otherwise clear out all the status bits but the RF Kill
  1935. * bit and continue taking the NIC down. */
  1936. il->status &=
  1937. test_bit(S_RF_KILL_HW,
  1938. &il->status) << S_RF_KILL_HW | test_bit(S_GEO_CONFIGURED,
  1939. &il->
  1940. status) <<
  1941. S_GEO_CONFIGURED | test_bit(S_FW_ERROR,
  1942. &il->
  1943. status) << S_FW_ERROR |
  1944. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1945. il3945_hw_txq_ctx_stop(il);
  1946. il3945_hw_rxq_stop(il);
  1947. /* Power-down device's busmaster DMA clocks */
  1948. il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1949. udelay(5);
  1950. /* Stop the device, and put it in low power state */
  1951. il_apm_stop(il);
  1952. exit:
  1953. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1954. if (il->beacon_skb)
  1955. dev_kfree_skb(il->beacon_skb);
  1956. il->beacon_skb = NULL;
  1957. /* clear out any free frames */
  1958. il3945_clear_free_frames(il);
  1959. }
  1960. static void
  1961. il3945_down(struct il_priv *il)
  1962. {
  1963. mutex_lock(&il->mutex);
  1964. __il3945_down(il);
  1965. mutex_unlock(&il->mutex);
  1966. il3945_cancel_deferred_work(il);
  1967. }
  1968. #define MAX_HW_RESTARTS 5
  1969. static int
  1970. il3945_alloc_bcast_station(struct il_priv *il)
  1971. {
  1972. struct il_rxon_context *ctx = &il->ctx;
  1973. unsigned long flags;
  1974. u8 sta_id;
  1975. spin_lock_irqsave(&il->sta_lock, flags);
  1976. sta_id = il_prep_station(il, ctx, il_bcast_addr, false, NULL);
  1977. if (sta_id == IL_INVALID_STATION) {
  1978. IL_ERR("Unable to prepare broadcast station\n");
  1979. spin_unlock_irqrestore(&il->sta_lock, flags);
  1980. return -EINVAL;
  1981. }
  1982. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1983. il->stations[sta_id].used |= IL_STA_BCAST;
  1984. spin_unlock_irqrestore(&il->sta_lock, flags);
  1985. return 0;
  1986. }
  1987. static int
  1988. __il3945_up(struct il_priv *il)
  1989. {
  1990. int rc, i;
  1991. rc = il3945_alloc_bcast_station(il);
  1992. if (rc)
  1993. return rc;
  1994. if (test_bit(S_EXIT_PENDING, &il->status)) {
  1995. IL_WARN("Exit pending; will not bring the NIC up\n");
  1996. return -EIO;
  1997. }
  1998. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  1999. IL_ERR("ucode not available for device bring up\n");
  2000. return -EIO;
  2001. }
  2002. /* If platform's RF_KILL switch is NOT set to KILL */
  2003. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2004. clear_bit(S_RF_KILL_HW, &il->status);
  2005. else {
  2006. set_bit(S_RF_KILL_HW, &il->status);
  2007. IL_WARN("Radio disabled by HW RF Kill switch\n");
  2008. return -ENODEV;
  2009. }
  2010. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2011. rc = il3945_hw_nic_init(il);
  2012. if (rc) {
  2013. IL_ERR("Unable to int nic\n");
  2014. return rc;
  2015. }
  2016. /* make sure rfkill handshake bits are cleared */
  2017. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2018. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2019. /* clear (again), then enable host interrupts */
  2020. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2021. il_enable_interrupts(il);
  2022. /* really make sure rfkill handshake bits are cleared */
  2023. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2024. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2025. /* Copy original ucode data image from disk into backup cache.
  2026. * This will be used to initialize the on-board processor's
  2027. * data SRAM for a clean start when the runtime program first loads. */
  2028. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2029. il->ucode_data.len);
  2030. /* We return success when we resume from suspend and rf_kill is on. */
  2031. if (test_bit(S_RF_KILL_HW, &il->status))
  2032. return 0;
  2033. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2034. /* load bootstrap state machine,
  2035. * load bootstrap program into processor's memory,
  2036. * prepare to load the "initialize" uCode */
  2037. rc = il->cfg->ops->lib->load_ucode(il);
  2038. if (rc) {
  2039. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2040. continue;
  2041. }
  2042. /* start card; "initialize" will load runtime ucode */
  2043. il3945_nic_start(il);
  2044. D_INFO(DRV_NAME " is coming up\n");
  2045. return 0;
  2046. }
  2047. set_bit(S_EXIT_PENDING, &il->status);
  2048. __il3945_down(il);
  2049. clear_bit(S_EXIT_PENDING, &il->status);
  2050. /* tried to restart and config the device for as long as our
  2051. * patience could withstand */
  2052. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2053. return -EIO;
  2054. }
  2055. /*****************************************************************************
  2056. *
  2057. * Workqueue callbacks
  2058. *
  2059. *****************************************************************************/
  2060. static void
  2061. il3945_bg_init_alive_start(struct work_struct *data)
  2062. {
  2063. struct il_priv *il =
  2064. container_of(data, struct il_priv, init_alive_start.work);
  2065. mutex_lock(&il->mutex);
  2066. if (test_bit(S_EXIT_PENDING, &il->status))
  2067. goto out;
  2068. il3945_init_alive_start(il);
  2069. out:
  2070. mutex_unlock(&il->mutex);
  2071. }
  2072. static void
  2073. il3945_bg_alive_start(struct work_struct *data)
  2074. {
  2075. struct il_priv *il =
  2076. container_of(data, struct il_priv, alive_start.work);
  2077. mutex_lock(&il->mutex);
  2078. if (test_bit(S_EXIT_PENDING, &il->status))
  2079. goto out;
  2080. il3945_alive_start(il);
  2081. out:
  2082. mutex_unlock(&il->mutex);
  2083. }
  2084. /*
  2085. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2086. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2087. * *is* readable even when device has been SW_RESET into low power mode
  2088. * (e.g. during RF KILL).
  2089. */
  2090. static void
  2091. il3945_rfkill_poll(struct work_struct *data)
  2092. {
  2093. struct il_priv *il =
  2094. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2095. bool old_rfkill = test_bit(S_RF_KILL_HW, &il->status);
  2096. bool new_rfkill =
  2097. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2098. if (new_rfkill != old_rfkill) {
  2099. if (new_rfkill)
  2100. set_bit(S_RF_KILL_HW, &il->status);
  2101. else
  2102. clear_bit(S_RF_KILL_HW, &il->status);
  2103. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2104. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2105. new_rfkill ? "disable radio" : "enable radio");
  2106. }
  2107. /* Keep this running, even if radio now enabled. This will be
  2108. * cancelled in mac_start() if system decides to start again */
  2109. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2110. round_jiffies_relative(2 * HZ));
  2111. }
  2112. int
  2113. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2114. {
  2115. struct il_host_cmd cmd = {
  2116. .id = C_SCAN,
  2117. .len = sizeof(struct il3945_scan_cmd),
  2118. .flags = CMD_SIZE_HUGE,
  2119. };
  2120. struct il3945_scan_cmd *scan;
  2121. u8 n_probes = 0;
  2122. enum ieee80211_band band;
  2123. bool is_active = false;
  2124. int ret;
  2125. u16 len;
  2126. lockdep_assert_held(&il->mutex);
  2127. if (!il->scan_cmd) {
  2128. il->scan_cmd =
  2129. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2130. GFP_KERNEL);
  2131. if (!il->scan_cmd) {
  2132. D_SCAN("Fail to allocate scan memory\n");
  2133. return -ENOMEM;
  2134. }
  2135. }
  2136. scan = il->scan_cmd;
  2137. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2138. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2139. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2140. if (il_is_associated(il)) {
  2141. u16 interval;
  2142. u32 extra;
  2143. u32 suspend_time = 100;
  2144. u32 scan_suspend_time = 100;
  2145. D_INFO("Scanning while associated...\n");
  2146. interval = vif->bss_conf.beacon_int;
  2147. scan->suspend_time = 0;
  2148. scan->max_out_time = cpu_to_le32(200 * 1024);
  2149. if (!interval)
  2150. interval = suspend_time;
  2151. /*
  2152. * suspend time format:
  2153. * 0-19: beacon interval in usec (time before exec.)
  2154. * 20-23: 0
  2155. * 24-31: number of beacons (suspend between channels)
  2156. */
  2157. extra = (suspend_time / interval) << 24;
  2158. scan_suspend_time =
  2159. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2160. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2161. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2162. scan_suspend_time, interval);
  2163. }
  2164. if (il->scan_request->n_ssids) {
  2165. int i, p = 0;
  2166. D_SCAN("Kicking off active scan\n");
  2167. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2168. /* always does wildcard anyway */
  2169. if (!il->scan_request->ssids[i].ssid_len)
  2170. continue;
  2171. scan->direct_scan[p].id = WLAN_EID_SSID;
  2172. scan->direct_scan[p].len =
  2173. il->scan_request->ssids[i].ssid_len;
  2174. memcpy(scan->direct_scan[p].ssid,
  2175. il->scan_request->ssids[i].ssid,
  2176. il->scan_request->ssids[i].ssid_len);
  2177. n_probes++;
  2178. p++;
  2179. }
  2180. is_active = true;
  2181. } else
  2182. D_SCAN("Kicking off passive scan.\n");
  2183. /* We don't build a direct scan probe request; the uCode will do
  2184. * that based on the direct_mask added to each channel entry */
  2185. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2186. scan->tx_cmd.sta_id = il->ctx.bcast_sta_id;
  2187. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2188. /* flags + rate selection */
  2189. switch (il->scan_band) {
  2190. case IEEE80211_BAND_2GHZ:
  2191. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2192. scan->tx_cmd.rate = RATE_1M_PLCP;
  2193. band = IEEE80211_BAND_2GHZ;
  2194. break;
  2195. case IEEE80211_BAND_5GHZ:
  2196. scan->tx_cmd.rate = RATE_6M_PLCP;
  2197. band = IEEE80211_BAND_5GHZ;
  2198. break;
  2199. default:
  2200. IL_WARN("Invalid scan band\n");
  2201. return -EIO;
  2202. }
  2203. /*
  2204. * If active scaning is requested but a certain channel is marked
  2205. * passive, we can do active scanning if we detect transmissions. For
  2206. * passive only scanning disable switching to active on any channel.
  2207. */
  2208. scan->good_CRC_th =
  2209. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2210. len =
  2211. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2212. vif->addr, il->scan_request->ie,
  2213. il->scan_request->ie_len,
  2214. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2215. scan->tx_cmd.len = cpu_to_le16(len);
  2216. /* select Rx antennas */
  2217. scan->flags |= il3945_get_antenna_flags(il);
  2218. scan->channel_count =
  2219. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2220. (void *)&scan->data[len], vif);
  2221. if (scan->channel_count == 0) {
  2222. D_SCAN("channel count %d\n", scan->channel_count);
  2223. return -EIO;
  2224. }
  2225. cmd.len +=
  2226. le16_to_cpu(scan->tx_cmd.len) +
  2227. scan->channel_count * sizeof(struct il3945_scan_channel);
  2228. cmd.data = scan;
  2229. scan->len = cpu_to_le16(cmd.len);
  2230. set_bit(S_SCAN_HW, &il->status);
  2231. ret = il_send_cmd_sync(il, &cmd);
  2232. if (ret)
  2233. clear_bit(S_SCAN_HW, &il->status);
  2234. return ret;
  2235. }
  2236. void
  2237. il3945_post_scan(struct il_priv *il)
  2238. {
  2239. struct il_rxon_context *ctx = &il->ctx;
  2240. /*
  2241. * Since setting the RXON may have been deferred while
  2242. * performing the scan, fire one off if needed
  2243. */
  2244. if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
  2245. il3945_commit_rxon(il, ctx);
  2246. }
  2247. static void
  2248. il3945_bg_restart(struct work_struct *data)
  2249. {
  2250. struct il_priv *il = container_of(data, struct il_priv, restart);
  2251. if (test_bit(S_EXIT_PENDING, &il->status))
  2252. return;
  2253. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2254. mutex_lock(&il->mutex);
  2255. il->ctx.vif = NULL;
  2256. il->is_open = 0;
  2257. mutex_unlock(&il->mutex);
  2258. il3945_down(il);
  2259. ieee80211_restart_hw(il->hw);
  2260. } else {
  2261. il3945_down(il);
  2262. mutex_lock(&il->mutex);
  2263. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2264. mutex_unlock(&il->mutex);
  2265. return;
  2266. }
  2267. __il3945_up(il);
  2268. mutex_unlock(&il->mutex);
  2269. }
  2270. }
  2271. static void
  2272. il3945_bg_rx_replenish(struct work_struct *data)
  2273. {
  2274. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2275. mutex_lock(&il->mutex);
  2276. if (test_bit(S_EXIT_PENDING, &il->status))
  2277. goto out;
  2278. il3945_rx_replenish(il);
  2279. out:
  2280. mutex_unlock(&il->mutex);
  2281. }
  2282. void
  2283. il3945_post_associate(struct il_priv *il)
  2284. {
  2285. int rc = 0;
  2286. struct ieee80211_conf *conf = NULL;
  2287. struct il_rxon_context *ctx = &il->ctx;
  2288. if (!ctx->vif || !il->is_open)
  2289. return;
  2290. D_ASSOC("Associated as %d to: %pM\n", ctx->vif->bss_conf.aid,
  2291. il->active.bssid_addr);
  2292. if (test_bit(S_EXIT_PENDING, &il->status))
  2293. return;
  2294. il_scan_cancel_timeout(il, 200);
  2295. conf = &il->hw->conf;
  2296. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2297. il3945_commit_rxon(il, ctx);
  2298. rc = il_send_rxon_timing(il, ctx);
  2299. if (rc)
  2300. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2301. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2302. il->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
  2303. D_ASSOC("assoc id %d beacon interval %d\n", ctx->vif->bss_conf.aid,
  2304. ctx->vif->bss_conf.beacon_int);
  2305. if (ctx->vif->bss_conf.use_short_preamble)
  2306. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2307. else
  2308. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2309. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2310. if (ctx->vif->bss_conf.use_short_slot)
  2311. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2312. else
  2313. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2314. }
  2315. il3945_commit_rxon(il, ctx);
  2316. switch (ctx->vif->type) {
  2317. case NL80211_IFTYPE_STATION:
  2318. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2319. break;
  2320. case NL80211_IFTYPE_ADHOC:
  2321. il3945_send_beacon_cmd(il);
  2322. break;
  2323. default:
  2324. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2325. ctx->vif->type);
  2326. break;
  2327. }
  2328. }
  2329. /*****************************************************************************
  2330. *
  2331. * mac80211 entry point functions
  2332. *
  2333. *****************************************************************************/
  2334. #define UCODE_READY_TIMEOUT (2 * HZ)
  2335. static int
  2336. il3945_mac_start(struct ieee80211_hw *hw)
  2337. {
  2338. struct il_priv *il = hw->priv;
  2339. int ret;
  2340. D_MAC80211("enter\n");
  2341. /* we should be verifying the device is ready to be opened */
  2342. mutex_lock(&il->mutex);
  2343. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2344. * ucode filename and max sizes are card-specific. */
  2345. if (!il->ucode_code.len) {
  2346. ret = il3945_read_ucode(il);
  2347. if (ret) {
  2348. IL_ERR("Could not read microcode: %d\n", ret);
  2349. mutex_unlock(&il->mutex);
  2350. goto out_release_irq;
  2351. }
  2352. }
  2353. ret = __il3945_up(il);
  2354. mutex_unlock(&il->mutex);
  2355. if (ret)
  2356. goto out_release_irq;
  2357. D_INFO("Start UP work.\n");
  2358. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2359. * mac80211 will not be run successfully. */
  2360. ret = wait_event_timeout(il->wait_command_queue,
  2361. test_bit(S_READY, &il->status),
  2362. UCODE_READY_TIMEOUT);
  2363. if (!ret) {
  2364. if (!test_bit(S_READY, &il->status)) {
  2365. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2366. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2367. ret = -ETIMEDOUT;
  2368. goto out_release_irq;
  2369. }
  2370. }
  2371. /* ucode is running and will send rfkill notifications,
  2372. * no need to poll the killswitch state anymore */
  2373. cancel_delayed_work(&il->_3945.rfkill_poll);
  2374. il->is_open = 1;
  2375. D_MAC80211("leave\n");
  2376. return 0;
  2377. out_release_irq:
  2378. il->is_open = 0;
  2379. D_MAC80211("leave - failed\n");
  2380. return ret;
  2381. }
  2382. static void
  2383. il3945_mac_stop(struct ieee80211_hw *hw)
  2384. {
  2385. struct il_priv *il = hw->priv;
  2386. D_MAC80211("enter\n");
  2387. if (!il->is_open) {
  2388. D_MAC80211("leave - skip\n");
  2389. return;
  2390. }
  2391. il->is_open = 0;
  2392. il3945_down(il);
  2393. flush_workqueue(il->workqueue);
  2394. /* start polling the killswitch state again */
  2395. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2396. round_jiffies_relative(2 * HZ));
  2397. D_MAC80211("leave\n");
  2398. }
  2399. static void
  2400. il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2401. {
  2402. struct il_priv *il = hw->priv;
  2403. D_MAC80211("enter\n");
  2404. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2405. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2406. if (il3945_tx_skb(il, skb))
  2407. dev_kfree_skb_any(skb);
  2408. D_MAC80211("leave\n");
  2409. }
  2410. void
  2411. il3945_config_ap(struct il_priv *il)
  2412. {
  2413. struct il_rxon_context *ctx = &il->ctx;
  2414. struct ieee80211_vif *vif = ctx->vif;
  2415. int rc = 0;
  2416. if (test_bit(S_EXIT_PENDING, &il->status))
  2417. return;
  2418. /* The following should be done only at AP bring up */
  2419. if (!(il_is_associated(il))) {
  2420. /* RXON - unassoc (to set timing command) */
  2421. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2422. il3945_commit_rxon(il, ctx);
  2423. /* RXON Timing */
  2424. rc = il_send_rxon_timing(il, ctx);
  2425. if (rc)
  2426. IL_WARN("C_RXON_TIMING failed - "
  2427. "Attempting to continue.\n");
  2428. il->staging.assoc_id = 0;
  2429. if (vif->bss_conf.use_short_preamble)
  2430. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2431. else
  2432. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2433. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2434. if (vif->bss_conf.use_short_slot)
  2435. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2436. else
  2437. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2438. }
  2439. /* restore RXON assoc */
  2440. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2441. il3945_commit_rxon(il, ctx);
  2442. }
  2443. il3945_send_beacon_cmd(il);
  2444. }
  2445. static int
  2446. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2447. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2448. struct ieee80211_key_conf *key)
  2449. {
  2450. struct il_priv *il = hw->priv;
  2451. int ret = 0;
  2452. u8 sta_id = IL_INVALID_STATION;
  2453. u8 static_key;
  2454. D_MAC80211("enter\n");
  2455. if (il3945_mod_params.sw_crypto) {
  2456. D_MAC80211("leave - hwcrypto disabled\n");
  2457. return -EOPNOTSUPP;
  2458. }
  2459. /*
  2460. * To support IBSS RSN, don't program group keys in IBSS, the
  2461. * hardware will then not attempt to decrypt the frames.
  2462. */
  2463. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2464. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2465. return -EOPNOTSUPP;
  2466. static_key = !il_is_associated(il);
  2467. if (!static_key) {
  2468. sta_id = il_sta_id_or_broadcast(il, &il->ctx, sta);
  2469. if (sta_id == IL_INVALID_STATION)
  2470. return -EINVAL;
  2471. }
  2472. mutex_lock(&il->mutex);
  2473. il_scan_cancel_timeout(il, 100);
  2474. switch (cmd) {
  2475. case SET_KEY:
  2476. if (static_key)
  2477. ret = il3945_set_static_key(il, key);
  2478. else
  2479. ret = il3945_set_dynamic_key(il, key, sta_id);
  2480. D_MAC80211("enable hwcrypto key\n");
  2481. break;
  2482. case DISABLE_KEY:
  2483. if (static_key)
  2484. ret = il3945_remove_static_key(il);
  2485. else
  2486. ret = il3945_clear_sta_key_info(il, sta_id);
  2487. D_MAC80211("disable hwcrypto key\n");
  2488. break;
  2489. default:
  2490. ret = -EINVAL;
  2491. }
  2492. mutex_unlock(&il->mutex);
  2493. D_MAC80211("leave\n");
  2494. return ret;
  2495. }
  2496. static int
  2497. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2498. struct ieee80211_sta *sta)
  2499. {
  2500. struct il_priv *il = hw->priv;
  2501. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2502. int ret;
  2503. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2504. u8 sta_id;
  2505. D_INFO("received request to add station %pM\n", sta->addr);
  2506. mutex_lock(&il->mutex);
  2507. D_INFO("proceeding to add station %pM\n", sta->addr);
  2508. sta_priv->common.sta_id = IL_INVALID_STATION;
  2509. ret =
  2510. il_add_station_common(il, &il->ctx, sta->addr, is_ap, sta, &sta_id);
  2511. if (ret) {
  2512. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2513. /* Should we return success if return code is EEXIST ? */
  2514. mutex_unlock(&il->mutex);
  2515. return ret;
  2516. }
  2517. sta_priv->common.sta_id = sta_id;
  2518. /* Initialize rate scaling */
  2519. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2520. il3945_rs_rate_init(il, sta, sta_id);
  2521. mutex_unlock(&il->mutex);
  2522. return 0;
  2523. }
  2524. static void
  2525. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2526. unsigned int *total_flags, u64 multicast)
  2527. {
  2528. struct il_priv *il = hw->priv;
  2529. __le32 filter_or = 0, filter_nand = 0;
  2530. #define CHK(test, flag) do { \
  2531. if (*total_flags & (test)) \
  2532. filter_or |= (flag); \
  2533. else \
  2534. filter_nand |= (flag); \
  2535. } while (0)
  2536. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2537. *total_flags);
  2538. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2539. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2540. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2541. #undef CHK
  2542. mutex_lock(&il->mutex);
  2543. il->staging.filter_flags &= ~filter_nand;
  2544. il->staging.filter_flags |= filter_or;
  2545. /*
  2546. * Not committing directly because hardware can perform a scan,
  2547. * but even if hw is ready, committing here breaks for some reason,
  2548. * we'll eventually commit the filter flags change anyway.
  2549. */
  2550. mutex_unlock(&il->mutex);
  2551. /*
  2552. * Receiving all multicast frames is always enabled by the
  2553. * default flags setup in il_connection_init_rx_config()
  2554. * since we currently do not support programming multicast
  2555. * filters into the device.
  2556. */
  2557. *total_flags &=
  2558. FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2559. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2560. }
  2561. /*****************************************************************************
  2562. *
  2563. * sysfs attributes
  2564. *
  2565. *****************************************************************************/
  2566. #ifdef CONFIG_IWLEGACY_DEBUG
  2567. /*
  2568. * The following adds a new attribute to the sysfs representation
  2569. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2570. * used for controlling the debug level.
  2571. *
  2572. * See the level definitions in iwl for details.
  2573. *
  2574. * The debug_level being managed using sysfs below is a per device debug
  2575. * level that is used instead of the global debug level if it (the per
  2576. * device debug level) is set.
  2577. */
  2578. static ssize_t
  2579. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2580. char *buf)
  2581. {
  2582. struct il_priv *il = dev_get_drvdata(d);
  2583. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2584. }
  2585. static ssize_t
  2586. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2587. const char *buf, size_t count)
  2588. {
  2589. struct il_priv *il = dev_get_drvdata(d);
  2590. unsigned long val;
  2591. int ret;
  2592. ret = strict_strtoul(buf, 0, &val);
  2593. if (ret)
  2594. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2595. else {
  2596. il->debug_level = val;
  2597. if (il_alloc_traffic_mem(il))
  2598. IL_ERR("Not enough memory to generate traffic log\n");
  2599. }
  2600. return strnlen(buf, count);
  2601. }
  2602. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
  2603. il3945_store_debug_level);
  2604. #endif /* CONFIG_IWLEGACY_DEBUG */
  2605. static ssize_t
  2606. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2607. char *buf)
  2608. {
  2609. struct il_priv *il = dev_get_drvdata(d);
  2610. if (!il_is_alive(il))
  2611. return -EAGAIN;
  2612. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2613. }
  2614. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2615. static ssize_t
  2616. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2617. {
  2618. struct il_priv *il = dev_get_drvdata(d);
  2619. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2620. }
  2621. static ssize_t
  2622. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2623. const char *buf, size_t count)
  2624. {
  2625. struct il_priv *il = dev_get_drvdata(d);
  2626. char *p = (char *)buf;
  2627. u32 val;
  2628. val = simple_strtoul(p, &p, 10);
  2629. if (p == buf)
  2630. IL_INFO(": %s is not in decimal form.\n", buf);
  2631. else
  2632. il3945_hw_reg_set_txpower(il, val);
  2633. return count;
  2634. }
  2635. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
  2636. il3945_store_tx_power);
  2637. static ssize_t
  2638. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2639. {
  2640. struct il_priv *il = dev_get_drvdata(d);
  2641. return sprintf(buf, "0x%04X\n", il->active.flags);
  2642. }
  2643. static ssize_t
  2644. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2645. const char *buf, size_t count)
  2646. {
  2647. struct il_priv *il = dev_get_drvdata(d);
  2648. u32 flags = simple_strtoul(buf, NULL, 0);
  2649. mutex_lock(&il->mutex);
  2650. if (le32_to_cpu(il->staging.flags) != flags) {
  2651. /* Cancel any currently running scans... */
  2652. if (il_scan_cancel_timeout(il, 100))
  2653. IL_WARN("Could not cancel scan.\n");
  2654. else {
  2655. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2656. il->staging.flags = cpu_to_le32(flags);
  2657. il3945_commit_rxon(il, &il->ctx);
  2658. }
  2659. }
  2660. mutex_unlock(&il->mutex);
  2661. return count;
  2662. }
  2663. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
  2664. il3945_store_flags);
  2665. static ssize_t
  2666. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2667. char *buf)
  2668. {
  2669. struct il_priv *il = dev_get_drvdata(d);
  2670. return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
  2671. }
  2672. static ssize_t
  2673. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2674. const char *buf, size_t count)
  2675. {
  2676. struct il_priv *il = dev_get_drvdata(d);
  2677. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2678. mutex_lock(&il->mutex);
  2679. if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
  2680. /* Cancel any currently running scans... */
  2681. if (il_scan_cancel_timeout(il, 100))
  2682. IL_WARN("Could not cancel scan.\n");
  2683. else {
  2684. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2685. filter_flags);
  2686. il->staging.filter_flags = cpu_to_le32(filter_flags);
  2687. il3945_commit_rxon(il, &il->ctx);
  2688. }
  2689. }
  2690. mutex_unlock(&il->mutex);
  2691. return count;
  2692. }
  2693. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2694. il3945_store_filter_flags);
  2695. static ssize_t
  2696. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2697. char *buf)
  2698. {
  2699. struct il_priv *il = dev_get_drvdata(d);
  2700. struct il_spectrum_notification measure_report;
  2701. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2702. u8 *data = (u8 *) &measure_report;
  2703. unsigned long flags;
  2704. spin_lock_irqsave(&il->lock, flags);
  2705. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2706. spin_unlock_irqrestore(&il->lock, flags);
  2707. return 0;
  2708. }
  2709. memcpy(&measure_report, &il->measure_report, size);
  2710. il->measurement_status = 0;
  2711. spin_unlock_irqrestore(&il->lock, flags);
  2712. while (size && PAGE_SIZE - len) {
  2713. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2714. PAGE_SIZE - len, 1);
  2715. len = strlen(buf);
  2716. if (PAGE_SIZE - len)
  2717. buf[len++] = '\n';
  2718. ofs += 16;
  2719. size -= min(size, 16U);
  2720. }
  2721. return len;
  2722. }
  2723. static ssize_t
  2724. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2725. const char *buf, size_t count)
  2726. {
  2727. struct il_priv *il = dev_get_drvdata(d);
  2728. struct ieee80211_measurement_params params = {
  2729. .channel = le16_to_cpu(il->active.channel),
  2730. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2731. .duration = cpu_to_le16(1),
  2732. };
  2733. u8 type = IL_MEASURE_BASIC;
  2734. u8 buffer[32];
  2735. u8 channel;
  2736. if (count) {
  2737. char *p = buffer;
  2738. strncpy(buffer, buf, min(sizeof(buffer), count));
  2739. channel = simple_strtoul(p, NULL, 0);
  2740. if (channel)
  2741. params.channel = channel;
  2742. p = buffer;
  2743. while (*p && *p != ' ')
  2744. p++;
  2745. if (*p)
  2746. type = simple_strtoul(p + 1, NULL, 0);
  2747. }
  2748. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2749. type, params.channel, buf);
  2750. il3945_get_measurement(il, &params, type);
  2751. return count;
  2752. }
  2753. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
  2754. il3945_store_measurement);
  2755. static ssize_t
  2756. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2757. const char *buf, size_t count)
  2758. {
  2759. struct il_priv *il = dev_get_drvdata(d);
  2760. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2761. if (il->retry_rate <= 0)
  2762. il->retry_rate = 1;
  2763. return count;
  2764. }
  2765. static ssize_t
  2766. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2767. char *buf)
  2768. {
  2769. struct il_priv *il = dev_get_drvdata(d);
  2770. return sprintf(buf, "%d", il->retry_rate);
  2771. }
  2772. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2773. il3945_store_retry_rate);
  2774. static ssize_t
  2775. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2776. {
  2777. /* all this shit doesn't belong into sysfs anyway */
  2778. return 0;
  2779. }
  2780. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2781. static ssize_t
  2782. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2783. {
  2784. struct il_priv *il = dev_get_drvdata(d);
  2785. if (!il_is_alive(il))
  2786. return -EAGAIN;
  2787. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2788. }
  2789. static ssize_t
  2790. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2791. const char *buf, size_t count)
  2792. {
  2793. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2794. int ant;
  2795. if (count == 0)
  2796. return 0;
  2797. if (sscanf(buf, "%1i", &ant) != 1) {
  2798. D_INFO("not in hex or decimal form.\n");
  2799. return count;
  2800. }
  2801. if (ant >= 0 && ant <= 2) {
  2802. D_INFO("Setting antenna select to %d.\n", ant);
  2803. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2804. } else
  2805. D_INFO("Bad antenna select value %d.\n", ant);
  2806. return count;
  2807. }
  2808. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
  2809. il3945_store_antenna);
  2810. static ssize_t
  2811. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2812. {
  2813. struct il_priv *il = dev_get_drvdata(d);
  2814. if (!il_is_alive(il))
  2815. return -EAGAIN;
  2816. return sprintf(buf, "0x%08x\n", (int)il->status);
  2817. }
  2818. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2819. static ssize_t
  2820. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2821. const char *buf, size_t count)
  2822. {
  2823. struct il_priv *il = dev_get_drvdata(d);
  2824. char *p = (char *)buf;
  2825. if (p[0] == '1')
  2826. il3945_dump_nic_error_log(il);
  2827. return strnlen(buf, count);
  2828. }
  2829. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2830. /*****************************************************************************
  2831. *
  2832. * driver setup and tear down
  2833. *
  2834. *****************************************************************************/
  2835. static void
  2836. il3945_setup_deferred_work(struct il_priv *il)
  2837. {
  2838. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2839. init_waitqueue_head(&il->wait_command_queue);
  2840. INIT_WORK(&il->restart, il3945_bg_restart);
  2841. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2842. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2843. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2844. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2845. il_setup_scan_deferred_work(il);
  2846. il3945_hw_setup_deferred_work(il);
  2847. init_timer(&il->watchdog);
  2848. il->watchdog.data = (unsigned long)il;
  2849. il->watchdog.function = il_bg_watchdog;
  2850. tasklet_init(&il->irq_tasklet,
  2851. (void (*)(unsigned long))il3945_irq_tasklet,
  2852. (unsigned long)il);
  2853. }
  2854. static void
  2855. il3945_cancel_deferred_work(struct il_priv *il)
  2856. {
  2857. il3945_hw_cancel_deferred_work(il);
  2858. cancel_delayed_work_sync(&il->init_alive_start);
  2859. cancel_delayed_work(&il->alive_start);
  2860. il_cancel_scan_deferred_work(il);
  2861. }
  2862. static struct attribute *il3945_sysfs_entries[] = {
  2863. &dev_attr_antenna.attr,
  2864. &dev_attr_channels.attr,
  2865. &dev_attr_dump_errors.attr,
  2866. &dev_attr_flags.attr,
  2867. &dev_attr_filter_flags.attr,
  2868. &dev_attr_measurement.attr,
  2869. &dev_attr_retry_rate.attr,
  2870. &dev_attr_status.attr,
  2871. &dev_attr_temperature.attr,
  2872. &dev_attr_tx_power.attr,
  2873. #ifdef CONFIG_IWLEGACY_DEBUG
  2874. &dev_attr_debug_level.attr,
  2875. #endif
  2876. NULL
  2877. };
  2878. static struct attribute_group il3945_attribute_group = {
  2879. .name = NULL, /* put in device directory */
  2880. .attrs = il3945_sysfs_entries,
  2881. };
  2882. struct ieee80211_ops il3945_hw_ops = {
  2883. .tx = il3945_mac_tx,
  2884. .start = il3945_mac_start,
  2885. .stop = il3945_mac_stop,
  2886. .add_interface = il_mac_add_interface,
  2887. .remove_interface = il_mac_remove_interface,
  2888. .change_interface = il_mac_change_interface,
  2889. .config = il_mac_config,
  2890. .configure_filter = il3945_configure_filter,
  2891. .set_key = il3945_mac_set_key,
  2892. .conf_tx = il_mac_conf_tx,
  2893. .reset_tsf = il_mac_reset_tsf,
  2894. .bss_info_changed = il_mac_bss_info_changed,
  2895. .hw_scan = il_mac_hw_scan,
  2896. .sta_add = il3945_mac_sta_add,
  2897. .sta_remove = il_mac_sta_remove,
  2898. .tx_last_beacon = il_mac_tx_last_beacon,
  2899. };
  2900. static int
  2901. il3945_init_drv(struct il_priv *il)
  2902. {
  2903. int ret;
  2904. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2905. il->retry_rate = 1;
  2906. il->beacon_skb = NULL;
  2907. spin_lock_init(&il->sta_lock);
  2908. spin_lock_init(&il->hcmd_lock);
  2909. INIT_LIST_HEAD(&il->free_frames);
  2910. mutex_init(&il->mutex);
  2911. il->ieee_channels = NULL;
  2912. il->ieee_rates = NULL;
  2913. il->band = IEEE80211_BAND_2GHZ;
  2914. il->iw_mode = NL80211_IFTYPE_STATION;
  2915. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2916. /* initialize force reset */
  2917. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2918. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2919. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2920. eeprom->version);
  2921. ret = -EINVAL;
  2922. goto err;
  2923. }
  2924. ret = il_init_channel_map(il);
  2925. if (ret) {
  2926. IL_ERR("initializing regulatory failed: %d\n", ret);
  2927. goto err;
  2928. }
  2929. /* Set up txpower settings in driver for all channels */
  2930. if (il3945_txpower_set_from_eeprom(il)) {
  2931. ret = -EIO;
  2932. goto err_free_channel_map;
  2933. }
  2934. ret = il_init_geos(il);
  2935. if (ret) {
  2936. IL_ERR("initializing geos failed: %d\n", ret);
  2937. goto err_free_channel_map;
  2938. }
  2939. il3945_init_hw_rates(il, il->ieee_rates);
  2940. return 0;
  2941. err_free_channel_map:
  2942. il_free_channel_map(il);
  2943. err:
  2944. return ret;
  2945. }
  2946. #define IL3945_MAX_PROBE_REQUEST 200
  2947. static int
  2948. il3945_setup_mac(struct il_priv *il)
  2949. {
  2950. int ret;
  2951. struct ieee80211_hw *hw = il->hw;
  2952. hw->rate_control_algorithm = "iwl-3945-rs";
  2953. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2954. hw->vif_data_size = sizeof(struct il_vif_priv);
  2955. /* Tell mac80211 our characteristics */
  2956. hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT;
  2957. hw->wiphy->interface_modes = il->ctx.interface_modes;
  2958. hw->wiphy->flags |=
  2959. WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2960. WIPHY_FLAG_IBSS_RSN;
  2961. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2962. /* we create the 802.11 header and a zero-length SSID element */
  2963. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2964. /* Default value; 4 EDCA QOS priorities */
  2965. hw->queues = 4;
  2966. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2967. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2968. &il->bands[IEEE80211_BAND_2GHZ];
  2969. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2970. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2971. &il->bands[IEEE80211_BAND_5GHZ];
  2972. il_leds_init(il);
  2973. ret = ieee80211_register_hw(il->hw);
  2974. if (ret) {
  2975. IL_ERR("Failed to register hw (error %d)\n", ret);
  2976. return ret;
  2977. }
  2978. il->mac80211_registered = 1;
  2979. return 0;
  2980. }
  2981. static int
  2982. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2983. {
  2984. int err = 0;
  2985. struct il_priv *il;
  2986. struct ieee80211_hw *hw;
  2987. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  2988. struct il3945_eeprom *eeprom;
  2989. unsigned long flags;
  2990. /***********************
  2991. * 1. Allocating HW data
  2992. * ********************/
  2993. /* mac80211 allocates memory for this device instance, including
  2994. * space for this driver's ilate structure */
  2995. hw = il_alloc_all(cfg);
  2996. if (hw == NULL) {
  2997. pr_err("Can not allocate network device\n");
  2998. err = -ENOMEM;
  2999. goto out;
  3000. }
  3001. il = hw->priv;
  3002. SET_IEEE80211_DEV(hw, &pdev->dev);
  3003. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3004. il->ctx.ctxid = 0;
  3005. il->ctx.ap_sta_id = IL_AP_ID;
  3006. il->ctx.wep_key_cmd = C_WEPKEY;
  3007. il->ctx.interface_modes =
  3008. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  3009. il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
  3010. il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
  3011. il->ctx.unused_devtype = RXON_DEV_TYPE_ESS;
  3012. /*
  3013. * Disabling hardware scan means that mac80211 will perform scans
  3014. * "the hard way", rather than using device's scan.
  3015. */
  3016. if (il3945_mod_params.disable_hw_scan) {
  3017. D_INFO("Disabling hw_scan\n");
  3018. il3945_hw_ops.hw_scan = NULL;
  3019. }
  3020. D_INFO("*** LOAD DRIVER ***\n");
  3021. il->cfg = cfg;
  3022. il->pci_dev = pdev;
  3023. il->inta_mask = CSR_INI_SET_MASK;
  3024. if (il_alloc_traffic_mem(il))
  3025. IL_ERR("Not enough memory to generate traffic log\n");
  3026. /***************************
  3027. * 2. Initializing PCI bus
  3028. * *************************/
  3029. pci_disable_link_state(pdev,
  3030. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3031. PCIE_LINK_STATE_CLKPM);
  3032. if (pci_enable_device(pdev)) {
  3033. err = -ENODEV;
  3034. goto out_ieee80211_free_hw;
  3035. }
  3036. pci_set_master(pdev);
  3037. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3038. if (!err)
  3039. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3040. if (err) {
  3041. IL_WARN("No suitable DMA available.\n");
  3042. goto out_pci_disable_device;
  3043. }
  3044. pci_set_drvdata(pdev, il);
  3045. err = pci_request_regions(pdev, DRV_NAME);
  3046. if (err)
  3047. goto out_pci_disable_device;
  3048. /***********************
  3049. * 3. Read REV Register
  3050. * ********************/
  3051. il->hw_base = pci_iomap(pdev, 0, 0);
  3052. if (!il->hw_base) {
  3053. err = -ENODEV;
  3054. goto out_pci_release_regions;
  3055. }
  3056. D_INFO("pci_resource_len = 0x%08llx\n",
  3057. (unsigned long long)pci_resource_len(pdev, 0));
  3058. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3059. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3060. * PCI Tx retries from interfering with C3 CPU state */
  3061. pci_write_config_byte(pdev, 0x41, 0x00);
  3062. /* these spin locks will be used in apm_ops.init and EEPROM access
  3063. * we should init now
  3064. */
  3065. spin_lock_init(&il->reg_lock);
  3066. spin_lock_init(&il->lock);
  3067. /*
  3068. * stop and reset the on-board processor just in case it is in a
  3069. * strange state ... like being left stranded by a primary kernel
  3070. * and this is now the kdump kernel trying to start up
  3071. */
  3072. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3073. /***********************
  3074. * 4. Read EEPROM
  3075. * ********************/
  3076. /* Read the EEPROM */
  3077. err = il_eeprom_init(il);
  3078. if (err) {
  3079. IL_ERR("Unable to init EEPROM\n");
  3080. goto out_iounmap;
  3081. }
  3082. /* MAC Address location in EEPROM same for 3945/4965 */
  3083. eeprom = (struct il3945_eeprom *)il->eeprom;
  3084. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3085. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3086. /***********************
  3087. * 5. Setup HW Constants
  3088. * ********************/
  3089. /* Device-specific setup */
  3090. if (il3945_hw_set_hw_params(il)) {
  3091. IL_ERR("failed to set hw settings\n");
  3092. goto out_eeprom_free;
  3093. }
  3094. /***********************
  3095. * 6. Setup il
  3096. * ********************/
  3097. err = il3945_init_drv(il);
  3098. if (err) {
  3099. IL_ERR("initializing driver failed\n");
  3100. goto out_unset_hw_params;
  3101. }
  3102. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3103. /***********************
  3104. * 7. Setup Services
  3105. * ********************/
  3106. spin_lock_irqsave(&il->lock, flags);
  3107. il_disable_interrupts(il);
  3108. spin_unlock_irqrestore(&il->lock, flags);
  3109. pci_enable_msi(il->pci_dev);
  3110. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3111. if (err) {
  3112. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3113. goto out_disable_msi;
  3114. }
  3115. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3116. if (err) {
  3117. IL_ERR("failed to create sysfs device attributes\n");
  3118. goto out_release_irq;
  3119. }
  3120. il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5],
  3121. &il->ctx);
  3122. il3945_setup_deferred_work(il);
  3123. il3945_setup_handlers(il);
  3124. il_power_initialize(il);
  3125. /*********************************
  3126. * 8. Setup and Register mac80211
  3127. * *******************************/
  3128. il_enable_interrupts(il);
  3129. err = il3945_setup_mac(il);
  3130. if (err)
  3131. goto out_remove_sysfs;
  3132. err = il_dbgfs_register(il, DRV_NAME);
  3133. if (err)
  3134. IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
  3135. err);
  3136. /* Start monitoring the killswitch */
  3137. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3138. return 0;
  3139. out_remove_sysfs:
  3140. destroy_workqueue(il->workqueue);
  3141. il->workqueue = NULL;
  3142. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3143. out_release_irq:
  3144. free_irq(il->pci_dev->irq, il);
  3145. out_disable_msi:
  3146. pci_disable_msi(il->pci_dev);
  3147. il_free_geos(il);
  3148. il_free_channel_map(il);
  3149. out_unset_hw_params:
  3150. il3945_unset_hw_params(il);
  3151. out_eeprom_free:
  3152. il_eeprom_free(il);
  3153. out_iounmap:
  3154. pci_iounmap(pdev, il->hw_base);
  3155. out_pci_release_regions:
  3156. pci_release_regions(pdev);
  3157. out_pci_disable_device:
  3158. pci_set_drvdata(pdev, NULL);
  3159. pci_disable_device(pdev);
  3160. out_ieee80211_free_hw:
  3161. il_free_traffic_mem(il);
  3162. ieee80211_free_hw(il->hw);
  3163. out:
  3164. return err;
  3165. }
  3166. static void __devexit
  3167. il3945_pci_remove(struct pci_dev *pdev)
  3168. {
  3169. struct il_priv *il = pci_get_drvdata(pdev);
  3170. unsigned long flags;
  3171. if (!il)
  3172. return;
  3173. D_INFO("*** UNLOAD DRIVER ***\n");
  3174. il_dbgfs_unregister(il);
  3175. set_bit(S_EXIT_PENDING, &il->status);
  3176. il_leds_exit(il);
  3177. if (il->mac80211_registered) {
  3178. ieee80211_unregister_hw(il->hw);
  3179. il->mac80211_registered = 0;
  3180. } else {
  3181. il3945_down(il);
  3182. }
  3183. /*
  3184. * Make sure device is reset to low power before unloading driver.
  3185. * This may be redundant with il_down(), but there are paths to
  3186. * run il_down() without calling apm_ops.stop(), and there are
  3187. * paths to avoid running il_down() at all before leaving driver.
  3188. * This (inexpensive) call *makes sure* device is reset.
  3189. */
  3190. il_apm_stop(il);
  3191. /* make sure we flush any pending irq or
  3192. * tasklet for the driver
  3193. */
  3194. spin_lock_irqsave(&il->lock, flags);
  3195. il_disable_interrupts(il);
  3196. spin_unlock_irqrestore(&il->lock, flags);
  3197. il3945_synchronize_irq(il);
  3198. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3199. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3200. il3945_dealloc_ucode_pci(il);
  3201. if (il->rxq.bd)
  3202. il3945_rx_queue_free(il, &il->rxq);
  3203. il3945_hw_txq_ctx_free(il);
  3204. il3945_unset_hw_params(il);
  3205. /*netif_stop_queue(dev); */
  3206. flush_workqueue(il->workqueue);
  3207. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3208. * il->workqueue... so we can't take down the workqueue
  3209. * until now... */
  3210. destroy_workqueue(il->workqueue);
  3211. il->workqueue = NULL;
  3212. il_free_traffic_mem(il);
  3213. free_irq(pdev->irq, il);
  3214. pci_disable_msi(pdev);
  3215. pci_iounmap(pdev, il->hw_base);
  3216. pci_release_regions(pdev);
  3217. pci_disable_device(pdev);
  3218. pci_set_drvdata(pdev, NULL);
  3219. il_free_channel_map(il);
  3220. il_free_geos(il);
  3221. kfree(il->scan_cmd);
  3222. if (il->beacon_skb)
  3223. dev_kfree_skb(il->beacon_skb);
  3224. ieee80211_free_hw(il->hw);
  3225. }
  3226. /*****************************************************************************
  3227. *
  3228. * driver and module entry point
  3229. *
  3230. *****************************************************************************/
  3231. static struct pci_driver il3945_driver = {
  3232. .name = DRV_NAME,
  3233. .id_table = il3945_hw_card_ids,
  3234. .probe = il3945_pci_probe,
  3235. .remove = __devexit_p(il3945_pci_remove),
  3236. .driver.pm = IL_LEGACY_PM_OPS,
  3237. };
  3238. static int __init
  3239. il3945_init(void)
  3240. {
  3241. int ret;
  3242. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3243. pr_info(DRV_COPYRIGHT "\n");
  3244. ret = il3945_rate_control_register();
  3245. if (ret) {
  3246. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3247. return ret;
  3248. }
  3249. ret = pci_register_driver(&il3945_driver);
  3250. if (ret) {
  3251. pr_err("Unable to initialize PCI module\n");
  3252. goto error_register;
  3253. }
  3254. return ret;
  3255. error_register:
  3256. il3945_rate_control_unregister();
  3257. return ret;
  3258. }
  3259. static void __exit
  3260. il3945_exit(void)
  3261. {
  3262. pci_unregister_driver(&il3945_driver);
  3263. il3945_rate_control_unregister();
  3264. }
  3265. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3266. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3267. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3268. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3269. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3270. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3271. S_IRUGO);
  3272. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3273. #ifdef CONFIG_IWLEGACY_DEBUG
  3274. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3275. MODULE_PARM_DESC(debug, "debug output mask");
  3276. #endif
  3277. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3278. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3279. module_exit(il3945_exit);
  3280. module_init(il3945_init);