qla_init.c 141 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  54. iocb->free(sp);
  55. }
  56. void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. del_timer_sync(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. }
  66. inline srb_t *
  67. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  68. unsigned long tmo)
  69. {
  70. srb_t *sp;
  71. struct qla_hw_data *ha = vha->hw;
  72. struct srb_ctx *ctx;
  73. struct srb_iocb *iocb;
  74. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  75. if (!sp)
  76. goto done;
  77. ctx = kzalloc(size, GFP_KERNEL);
  78. if (!ctx) {
  79. mempool_free(sp, ha->srb_mempool);
  80. sp = NULL;
  81. goto done;
  82. }
  83. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  84. if (!iocb) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. kfree(ctx);
  88. goto done;
  89. }
  90. memset(sp, 0, sizeof(*sp));
  91. sp->fcport = fcport;
  92. sp->ctx = ctx;
  93. ctx->u.iocb_cmd = iocb;
  94. iocb->free = qla2x00_ctx_sp_free;
  95. init_timer(&iocb->timer);
  96. if (!tmo)
  97. goto done;
  98. iocb->timer.expires = jiffies + tmo * HZ;
  99. iocb->timer.data = (unsigned long)sp;
  100. iocb->timer.function = qla2x00_ctx_sp_timeout;
  101. add_timer(&iocb->timer);
  102. done:
  103. return sp;
  104. }
  105. /* Asynchronous Login/Logout Routines -------------------------------------- */
  106. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  107. static void
  108. qla2x00_async_iocb_timeout(srb_t *sp)
  109. {
  110. fc_port_t *fcport = sp->fcport;
  111. struct srb_ctx *ctx = sp->ctx;
  112. DEBUG2(printk(KERN_WARNING
  113. "scsi(%ld:%x): Async-%s timeout.\n",
  114. fcport->vha->host_no, sp->handle, ctx->name));
  115. fcport->flags &= ~FCF_ASYNC_SENT;
  116. if (ctx->type == SRB_LOGIN_CMD)
  117. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  118. }
  119. static void
  120. qla2x00_async_login_ctx_done(srb_t *sp)
  121. {
  122. struct srb_ctx *ctx = sp->ctx;
  123. struct srb_iocb *lio = ctx->u.iocb_cmd;
  124. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  125. lio->u.logio.data);
  126. lio->free(sp);
  127. }
  128. int
  129. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  130. uint16_t *data)
  131. {
  132. struct qla_hw_data *ha = vha->hw;
  133. srb_t *sp;
  134. struct srb_ctx *ctx;
  135. struct srb_iocb *lio;
  136. int rval;
  137. rval = QLA_FUNCTION_FAILED;
  138. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  139. ELS_TMO_2_RATOV(ha) + 2);
  140. if (!sp)
  141. goto done;
  142. ctx = sp->ctx;
  143. ctx->type = SRB_LOGIN_CMD;
  144. ctx->name = "login";
  145. lio = ctx->u.iocb_cmd;
  146. lio->timeout = qla2x00_async_iocb_timeout;
  147. lio->done = qla2x00_async_login_ctx_done;
  148. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  149. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  150. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  151. rval = qla2x00_start_sp(sp);
  152. if (rval != QLA_SUCCESS)
  153. goto done_free_sp;
  154. DEBUG2(printk(KERN_DEBUG
  155. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  156. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  157. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  158. fcport->login_retry));
  159. return rval;
  160. done_free_sp:
  161. lio->free(sp);
  162. done:
  163. return rval;
  164. }
  165. static void
  166. qla2x00_async_logout_ctx_done(srb_t *sp)
  167. {
  168. struct srb_ctx *ctx = sp->ctx;
  169. struct srb_iocb *lio = ctx->u.iocb_cmd;
  170. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  171. lio->u.logio.data);
  172. lio->free(sp);
  173. }
  174. int
  175. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  176. {
  177. struct qla_hw_data *ha = vha->hw;
  178. srb_t *sp;
  179. struct srb_ctx *ctx;
  180. struct srb_iocb *lio;
  181. int rval;
  182. rval = QLA_FUNCTION_FAILED;
  183. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  184. ELS_TMO_2_RATOV(ha) + 2);
  185. if (!sp)
  186. goto done;
  187. ctx = sp->ctx;
  188. ctx->type = SRB_LOGOUT_CMD;
  189. ctx->name = "logout";
  190. lio = ctx->u.iocb_cmd;
  191. lio->timeout = qla2x00_async_iocb_timeout;
  192. lio->done = qla2x00_async_logout_ctx_done;
  193. rval = qla2x00_start_sp(sp);
  194. if (rval != QLA_SUCCESS)
  195. goto done_free_sp;
  196. DEBUG2(printk(KERN_DEBUG
  197. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  198. fcport->vha->host_no, sp->handle, fcport->loop_id,
  199. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  200. return rval;
  201. done_free_sp:
  202. lio->free(sp);
  203. done:
  204. return rval;
  205. }
  206. static void
  207. qla2x00_async_adisc_ctx_done(srb_t *sp)
  208. {
  209. struct srb_ctx *ctx = sp->ctx;
  210. struct srb_iocb *lio = ctx->u.iocb_cmd;
  211. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  212. lio->u.logio.data);
  213. lio->free(sp);
  214. }
  215. int
  216. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  217. uint16_t *data)
  218. {
  219. struct qla_hw_data *ha = vha->hw;
  220. srb_t *sp;
  221. struct srb_ctx *ctx;
  222. struct srb_iocb *lio;
  223. int rval;
  224. rval = QLA_FUNCTION_FAILED;
  225. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  226. ELS_TMO_2_RATOV(ha) + 2);
  227. if (!sp)
  228. goto done;
  229. ctx = sp->ctx;
  230. ctx->type = SRB_ADISC_CMD;
  231. ctx->name = "adisc";
  232. lio = ctx->u.iocb_cmd;
  233. lio->timeout = qla2x00_async_iocb_timeout;
  234. lio->done = qla2x00_async_adisc_ctx_done;
  235. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  236. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  237. rval = qla2x00_start_sp(sp);
  238. if (rval != QLA_SUCCESS)
  239. goto done_free_sp;
  240. DEBUG2(printk(KERN_DEBUG
  241. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  242. fcport->vha->host_no, sp->handle, fcport->loop_id,
  243. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  244. return rval;
  245. done_free_sp:
  246. lio->free(sp);
  247. done:
  248. return rval;
  249. }
  250. static void
  251. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  252. {
  253. struct srb_ctx *ctx = sp->ctx;
  254. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  255. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  256. iocb->free(sp);
  257. }
  258. int
  259. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  260. uint32_t tag)
  261. {
  262. struct scsi_qla_host *vha = fcport->vha;
  263. struct qla_hw_data *ha = vha->hw;
  264. srb_t *sp;
  265. struct srb_ctx *ctx;
  266. struct srb_iocb *tcf;
  267. int rval;
  268. rval = QLA_FUNCTION_FAILED;
  269. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  270. ELS_TMO_2_RATOV(ha) + 2);
  271. if (!sp)
  272. goto done;
  273. ctx = sp->ctx;
  274. ctx->type = SRB_TM_CMD;
  275. ctx->name = "tmf";
  276. tcf = ctx->u.iocb_cmd;
  277. tcf->u.tmf.flags = flags;
  278. tcf->u.tmf.lun = lun;
  279. tcf->u.tmf.data = tag;
  280. tcf->timeout = qla2x00_async_iocb_timeout;
  281. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  282. rval = qla2x00_start_sp(sp);
  283. if (rval != QLA_SUCCESS)
  284. goto done_free_sp;
  285. DEBUG2(printk(KERN_DEBUG
  286. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  287. fcport->vha->host_no, sp->handle, fcport->loop_id,
  288. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  289. return rval;
  290. done_free_sp:
  291. tcf->free(sp);
  292. done:
  293. return rval;
  294. }
  295. static void
  296. qla2x00_async_marker_ctx_done(srb_t *sp)
  297. {
  298. struct srb_ctx *ctx = sp->ctx;
  299. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  300. qla2x00_async_marker_done(sp->fcport->vha, sp->fcport, iocb);
  301. iocb->free(sp);
  302. }
  303. int
  304. qla2x00_async_marker(fc_port_t *fcport, uint16_t lun, uint8_t modif)
  305. {
  306. struct scsi_qla_host *vha = fcport->vha;
  307. srb_t *sp;
  308. struct srb_ctx *ctx;
  309. struct srb_iocb *mrk;
  310. int rval;
  311. rval = QLA_FUNCTION_FAILED;
  312. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 0);
  313. if (!sp)
  314. goto done;
  315. ctx = sp->ctx;
  316. ctx->type = SRB_MARKER_CMD;
  317. ctx->name = "marker";
  318. mrk = ctx->u.iocb_cmd;
  319. mrk->u.marker.lun = lun;
  320. mrk->u.marker.modif = modif;
  321. mrk->timeout = qla2x00_async_iocb_timeout;
  322. mrk->done = qla2x00_async_marker_ctx_done;
  323. rval = qla2x00_start_sp(sp);
  324. if (rval != QLA_SUCCESS)
  325. goto done_free_sp;
  326. DEBUG2(printk(KERN_DEBUG
  327. "scsi(%ld:%x): Async-marker - loop-id=%x "
  328. "portid=%02x%02x%02x.\n",
  329. fcport->vha->host_no, sp->handle, fcport->loop_id,
  330. fcport->d_id.b.domain, fcport->d_id.b.area,
  331. fcport->d_id.b.al_pa));
  332. return rval;
  333. done_free_sp:
  334. mrk->free(sp);
  335. done:
  336. return rval;
  337. }
  338. void
  339. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  340. uint16_t *data)
  341. {
  342. int rval;
  343. switch (data[0]) {
  344. case MBS_COMMAND_COMPLETE:
  345. if (fcport->flags & FCF_FCP2_DEVICE) {
  346. fcport->flags |= FCF_ASYNC_SENT;
  347. qla2x00_post_async_adisc_work(vha, fcport, data);
  348. break;
  349. }
  350. qla2x00_update_fcport(vha, fcport);
  351. break;
  352. case MBS_COMMAND_ERROR:
  353. fcport->flags &= ~FCF_ASYNC_SENT;
  354. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  355. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  356. else
  357. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  358. break;
  359. case MBS_PORT_ID_USED:
  360. fcport->loop_id = data[1];
  361. qla2x00_post_async_login_work(vha, fcport, NULL);
  362. break;
  363. case MBS_LOOP_ID_USED:
  364. fcport->loop_id++;
  365. rval = qla2x00_find_new_loop_id(vha, fcport);
  366. if (rval != QLA_SUCCESS) {
  367. fcport->flags &= ~FCF_ASYNC_SENT;
  368. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  369. break;
  370. }
  371. qla2x00_post_async_login_work(vha, fcport, NULL);
  372. break;
  373. }
  374. return;
  375. }
  376. void
  377. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  378. uint16_t *data)
  379. {
  380. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  381. return;
  382. }
  383. void
  384. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  385. uint16_t *data)
  386. {
  387. if (data[0] == MBS_COMMAND_COMPLETE) {
  388. qla2x00_update_fcport(vha, fcport);
  389. return;
  390. }
  391. /* Retry login. */
  392. fcport->flags &= ~FCF_ASYNC_SENT;
  393. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  394. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  395. else
  396. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  397. return;
  398. }
  399. void
  400. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  401. struct srb_iocb *iocb)
  402. {
  403. int rval;
  404. uint32_t flags;
  405. uint16_t lun;
  406. flags = iocb->u.tmf.flags;
  407. lun = (uint16_t)iocb->u.tmf.lun;
  408. /* Issue Marker IOCB */
  409. rval = qla2x00_async_marker(fcport, lun,
  410. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  411. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  412. DEBUG2_3_11(printk(KERN_WARNING
  413. "%s(%ld): TM IOCB failed (%x).\n",
  414. __func__, vha->host_no, rval));
  415. }
  416. return;
  417. }
  418. void
  419. qla2x00_async_marker_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  420. struct srb_iocb *iocb)
  421. {
  422. /*
  423. * Currently we dont have any specific post response processing
  424. * for this IOCB. We'll just return success or failed
  425. * depending on whether the IOCB command succeeded or failed.
  426. */
  427. if (iocb->u.tmf.data) {
  428. DEBUG2_3_11(printk(KERN_WARNING
  429. "%s(%ld): Marker IOCB failed (%x).\n",
  430. __func__, vha->host_no, iocb->u.tmf.data));
  431. }
  432. return;
  433. }
  434. /****************************************************************************/
  435. /* QLogic ISP2x00 Hardware Support Functions. */
  436. /****************************************************************************/
  437. /*
  438. * qla2x00_initialize_adapter
  439. * Initialize board.
  440. *
  441. * Input:
  442. * ha = adapter block pointer.
  443. *
  444. * Returns:
  445. * 0 = success
  446. */
  447. int
  448. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  449. {
  450. int rval;
  451. struct qla_hw_data *ha = vha->hw;
  452. struct req_que *req = ha->req_q_map[0];
  453. /* Clear adapter flags. */
  454. vha->flags.online = 0;
  455. ha->flags.chip_reset_done = 0;
  456. vha->flags.reset_active = 0;
  457. ha->flags.pci_channel_io_perm_failure = 0;
  458. ha->flags.eeh_busy = 0;
  459. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  460. atomic_set(&vha->loop_state, LOOP_DOWN);
  461. vha->device_flags = DFLG_NO_CABLE;
  462. vha->dpc_flags = 0;
  463. vha->flags.management_server_logged_in = 0;
  464. vha->marker_needed = 0;
  465. ha->isp_abort_cnt = 0;
  466. ha->beacon_blink_led = 0;
  467. set_bit(0, ha->req_qid_map);
  468. set_bit(0, ha->rsp_qid_map);
  469. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  470. rval = ha->isp_ops->pci_config(vha);
  471. if (rval) {
  472. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  473. vha->host_no));
  474. return (rval);
  475. }
  476. ha->isp_ops->reset_chip(vha);
  477. rval = qla2xxx_get_flash_info(vha);
  478. if (rval) {
  479. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  480. vha->host_no));
  481. return (rval);
  482. }
  483. ha->isp_ops->get_flash_version(vha, req->ring);
  484. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  485. ha->isp_ops->nvram_config(vha);
  486. if (ha->flags.disable_serdes) {
  487. /* Mask HBA via NVRAM settings? */
  488. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  489. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  490. vha->port_name[0], vha->port_name[1],
  491. vha->port_name[2], vha->port_name[3],
  492. vha->port_name[4], vha->port_name[5],
  493. vha->port_name[6], vha->port_name[7]);
  494. return QLA_FUNCTION_FAILED;
  495. }
  496. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  497. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  498. rval = ha->isp_ops->chip_diag(vha);
  499. if (rval)
  500. return (rval);
  501. rval = qla2x00_setup_chip(vha);
  502. if (rval)
  503. return (rval);
  504. }
  505. if (IS_QLA84XX(ha)) {
  506. ha->cs84xx = qla84xx_get_chip(vha);
  507. if (!ha->cs84xx) {
  508. qla_printk(KERN_ERR, ha,
  509. "Unable to configure ISP84XX.\n");
  510. return QLA_FUNCTION_FAILED;
  511. }
  512. }
  513. rval = qla2x00_init_rings(vha);
  514. ha->flags.chip_reset_done = 1;
  515. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  516. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  517. rval = qla84xx_init_chip(vha);
  518. if (rval != QLA_SUCCESS) {
  519. qla_printk(KERN_ERR, ha,
  520. "Unable to initialize ISP84XX.\n");
  521. qla84xx_put_chip(vha);
  522. }
  523. }
  524. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) {
  525. if (qla24xx_read_fcp_prio_cfg(vha))
  526. qla_printk(KERN_ERR, ha,
  527. "Unable to read FCP priority data.\n");
  528. }
  529. return (rval);
  530. }
  531. /**
  532. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  533. * @ha: HA context
  534. *
  535. * Returns 0 on success.
  536. */
  537. int
  538. qla2100_pci_config(scsi_qla_host_t *vha)
  539. {
  540. uint16_t w;
  541. unsigned long flags;
  542. struct qla_hw_data *ha = vha->hw;
  543. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  544. pci_set_master(ha->pdev);
  545. pci_try_set_mwi(ha->pdev);
  546. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  547. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  548. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  549. pci_disable_rom(ha->pdev);
  550. /* Get PCI bus information. */
  551. spin_lock_irqsave(&ha->hardware_lock, flags);
  552. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  553. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  554. return QLA_SUCCESS;
  555. }
  556. /**
  557. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  558. * @ha: HA context
  559. *
  560. * Returns 0 on success.
  561. */
  562. int
  563. qla2300_pci_config(scsi_qla_host_t *vha)
  564. {
  565. uint16_t w;
  566. unsigned long flags = 0;
  567. uint32_t cnt;
  568. struct qla_hw_data *ha = vha->hw;
  569. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  570. pci_set_master(ha->pdev);
  571. pci_try_set_mwi(ha->pdev);
  572. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  573. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  574. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  575. w &= ~PCI_COMMAND_INTX_DISABLE;
  576. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  577. /*
  578. * If this is a 2300 card and not 2312, reset the
  579. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  580. * the 2310 also reports itself as a 2300 so we need to get the
  581. * fb revision level -- a 6 indicates it really is a 2300 and
  582. * not a 2310.
  583. */
  584. if (IS_QLA2300(ha)) {
  585. spin_lock_irqsave(&ha->hardware_lock, flags);
  586. /* Pause RISC. */
  587. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  588. for (cnt = 0; cnt < 30000; cnt++) {
  589. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  590. break;
  591. udelay(10);
  592. }
  593. /* Select FPM registers. */
  594. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  595. RD_REG_WORD(&reg->ctrl_status);
  596. /* Get the fb rev level */
  597. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  598. if (ha->fb_rev == FPM_2300)
  599. pci_clear_mwi(ha->pdev);
  600. /* Deselect FPM registers. */
  601. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  602. RD_REG_WORD(&reg->ctrl_status);
  603. /* Release RISC module. */
  604. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  605. for (cnt = 0; cnt < 30000; cnt++) {
  606. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  607. break;
  608. udelay(10);
  609. }
  610. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  611. }
  612. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  613. pci_disable_rom(ha->pdev);
  614. /* Get PCI bus information. */
  615. spin_lock_irqsave(&ha->hardware_lock, flags);
  616. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  617. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  618. return QLA_SUCCESS;
  619. }
  620. /**
  621. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  622. * @ha: HA context
  623. *
  624. * Returns 0 on success.
  625. */
  626. int
  627. qla24xx_pci_config(scsi_qla_host_t *vha)
  628. {
  629. uint16_t w;
  630. unsigned long flags = 0;
  631. struct qla_hw_data *ha = vha->hw;
  632. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  633. pci_set_master(ha->pdev);
  634. pci_try_set_mwi(ha->pdev);
  635. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  636. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  637. w &= ~PCI_COMMAND_INTX_DISABLE;
  638. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  639. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  640. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  641. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  642. pcix_set_mmrbc(ha->pdev, 2048);
  643. /* PCIe -- adjust Maximum Read Request Size (2048). */
  644. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  645. pcie_set_readrq(ha->pdev, 2048);
  646. pci_disable_rom(ha->pdev);
  647. ha->chip_revision = ha->pdev->revision;
  648. /* Get PCI bus information. */
  649. spin_lock_irqsave(&ha->hardware_lock, flags);
  650. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  651. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  652. return QLA_SUCCESS;
  653. }
  654. /**
  655. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  656. * @ha: HA context
  657. *
  658. * Returns 0 on success.
  659. */
  660. int
  661. qla25xx_pci_config(scsi_qla_host_t *vha)
  662. {
  663. uint16_t w;
  664. struct qla_hw_data *ha = vha->hw;
  665. pci_set_master(ha->pdev);
  666. pci_try_set_mwi(ha->pdev);
  667. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  668. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  669. w &= ~PCI_COMMAND_INTX_DISABLE;
  670. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  671. /* PCIe -- adjust Maximum Read Request Size (2048). */
  672. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  673. pcie_set_readrq(ha->pdev, 2048);
  674. pci_disable_rom(ha->pdev);
  675. ha->chip_revision = ha->pdev->revision;
  676. return QLA_SUCCESS;
  677. }
  678. /**
  679. * qla2x00_isp_firmware() - Choose firmware image.
  680. * @ha: HA context
  681. *
  682. * Returns 0 on success.
  683. */
  684. static int
  685. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  686. {
  687. int rval;
  688. uint16_t loop_id, topo, sw_cap;
  689. uint8_t domain, area, al_pa;
  690. struct qla_hw_data *ha = vha->hw;
  691. /* Assume loading risc code */
  692. rval = QLA_FUNCTION_FAILED;
  693. if (ha->flags.disable_risc_code_load) {
  694. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  695. vha->host_no));
  696. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  697. /* Verify checksum of loaded RISC code. */
  698. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  699. if (rval == QLA_SUCCESS) {
  700. /* And, verify we are not in ROM code. */
  701. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  702. &area, &domain, &topo, &sw_cap);
  703. }
  704. }
  705. if (rval) {
  706. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  707. vha->host_no));
  708. }
  709. return (rval);
  710. }
  711. /**
  712. * qla2x00_reset_chip() - Reset ISP chip.
  713. * @ha: HA context
  714. *
  715. * Returns 0 on success.
  716. */
  717. void
  718. qla2x00_reset_chip(scsi_qla_host_t *vha)
  719. {
  720. unsigned long flags = 0;
  721. struct qla_hw_data *ha = vha->hw;
  722. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  723. uint32_t cnt;
  724. uint16_t cmd;
  725. if (unlikely(pci_channel_offline(ha->pdev)))
  726. return;
  727. ha->isp_ops->disable_intrs(ha);
  728. spin_lock_irqsave(&ha->hardware_lock, flags);
  729. /* Turn off master enable */
  730. cmd = 0;
  731. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  732. cmd &= ~PCI_COMMAND_MASTER;
  733. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  734. if (!IS_QLA2100(ha)) {
  735. /* Pause RISC. */
  736. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  737. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  738. for (cnt = 0; cnt < 30000; cnt++) {
  739. if ((RD_REG_WORD(&reg->hccr) &
  740. HCCR_RISC_PAUSE) != 0)
  741. break;
  742. udelay(100);
  743. }
  744. } else {
  745. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  746. udelay(10);
  747. }
  748. /* Select FPM registers. */
  749. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  750. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  751. /* FPM Soft Reset. */
  752. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  753. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  754. /* Toggle Fpm Reset. */
  755. if (!IS_QLA2200(ha)) {
  756. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  757. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  758. }
  759. /* Select frame buffer registers. */
  760. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  761. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  762. /* Reset frame buffer FIFOs. */
  763. if (IS_QLA2200(ha)) {
  764. WRT_FB_CMD_REG(ha, reg, 0xa000);
  765. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  766. } else {
  767. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  768. /* Read back fb_cmd until zero or 3 seconds max */
  769. for (cnt = 0; cnt < 3000; cnt++) {
  770. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  771. break;
  772. udelay(100);
  773. }
  774. }
  775. /* Select RISC module registers. */
  776. WRT_REG_WORD(&reg->ctrl_status, 0);
  777. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  778. /* Reset RISC processor. */
  779. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  780. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  781. /* Release RISC processor. */
  782. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  783. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  784. }
  785. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  786. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  787. /* Reset ISP chip. */
  788. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  789. /* Wait for RISC to recover from reset. */
  790. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  791. /*
  792. * It is necessary to for a delay here since the card doesn't
  793. * respond to PCI reads during a reset. On some architectures
  794. * this will result in an MCA.
  795. */
  796. udelay(20);
  797. for (cnt = 30000; cnt; cnt--) {
  798. if ((RD_REG_WORD(&reg->ctrl_status) &
  799. CSR_ISP_SOFT_RESET) == 0)
  800. break;
  801. udelay(100);
  802. }
  803. } else
  804. udelay(10);
  805. /* Reset RISC processor. */
  806. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  807. WRT_REG_WORD(&reg->semaphore, 0);
  808. /* Release RISC processor. */
  809. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  810. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  811. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  812. for (cnt = 0; cnt < 30000; cnt++) {
  813. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  814. break;
  815. udelay(100);
  816. }
  817. } else
  818. udelay(100);
  819. /* Turn on master enable */
  820. cmd |= PCI_COMMAND_MASTER;
  821. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  822. /* Disable RISC pause on FPM parity error. */
  823. if (!IS_QLA2100(ha)) {
  824. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  825. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  826. }
  827. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  828. }
  829. /**
  830. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  831. * @ha: HA context
  832. *
  833. * Returns 0 on success.
  834. */
  835. static inline void
  836. qla24xx_reset_risc(scsi_qla_host_t *vha)
  837. {
  838. unsigned long flags = 0;
  839. struct qla_hw_data *ha = vha->hw;
  840. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  841. uint32_t cnt, d2;
  842. uint16_t wd;
  843. spin_lock_irqsave(&ha->hardware_lock, flags);
  844. /* Reset RISC. */
  845. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  846. for (cnt = 0; cnt < 30000; cnt++) {
  847. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  848. break;
  849. udelay(10);
  850. }
  851. WRT_REG_DWORD(&reg->ctrl_status,
  852. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  853. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  854. udelay(100);
  855. /* Wait for firmware to complete NVRAM accesses. */
  856. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  857. for (cnt = 10000 ; cnt && d2; cnt--) {
  858. udelay(5);
  859. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  860. barrier();
  861. }
  862. /* Wait for soft-reset to complete. */
  863. d2 = RD_REG_DWORD(&reg->ctrl_status);
  864. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  865. udelay(5);
  866. d2 = RD_REG_DWORD(&reg->ctrl_status);
  867. barrier();
  868. }
  869. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  870. RD_REG_DWORD(&reg->hccr);
  871. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  872. RD_REG_DWORD(&reg->hccr);
  873. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  874. RD_REG_DWORD(&reg->hccr);
  875. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  876. for (cnt = 6000000 ; cnt && d2; cnt--) {
  877. udelay(5);
  878. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  879. barrier();
  880. }
  881. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  882. if (IS_NOPOLLING_TYPE(ha))
  883. ha->isp_ops->enable_intrs(ha);
  884. }
  885. /**
  886. * qla24xx_reset_chip() - Reset ISP24xx chip.
  887. * @ha: HA context
  888. *
  889. * Returns 0 on success.
  890. */
  891. void
  892. qla24xx_reset_chip(scsi_qla_host_t *vha)
  893. {
  894. struct qla_hw_data *ha = vha->hw;
  895. if (pci_channel_offline(ha->pdev) &&
  896. ha->flags.pci_channel_io_perm_failure) {
  897. return;
  898. }
  899. ha->isp_ops->disable_intrs(ha);
  900. /* Perform RISC reset. */
  901. qla24xx_reset_risc(vha);
  902. }
  903. /**
  904. * qla2x00_chip_diag() - Test chip for proper operation.
  905. * @ha: HA context
  906. *
  907. * Returns 0 on success.
  908. */
  909. int
  910. qla2x00_chip_diag(scsi_qla_host_t *vha)
  911. {
  912. int rval;
  913. struct qla_hw_data *ha = vha->hw;
  914. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  915. unsigned long flags = 0;
  916. uint16_t data;
  917. uint32_t cnt;
  918. uint16_t mb[5];
  919. struct req_que *req = ha->req_q_map[0];
  920. /* Assume a failed state */
  921. rval = QLA_FUNCTION_FAILED;
  922. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  923. vha->host_no, (u_long)&reg->flash_address));
  924. spin_lock_irqsave(&ha->hardware_lock, flags);
  925. /* Reset ISP chip. */
  926. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  927. /*
  928. * We need to have a delay here since the card will not respond while
  929. * in reset causing an MCA on some architectures.
  930. */
  931. udelay(20);
  932. data = qla2x00_debounce_register(&reg->ctrl_status);
  933. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  934. udelay(5);
  935. data = RD_REG_WORD(&reg->ctrl_status);
  936. barrier();
  937. }
  938. if (!cnt)
  939. goto chip_diag_failed;
  940. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  941. vha->host_no));
  942. /* Reset RISC processor. */
  943. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  944. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  945. /* Workaround for QLA2312 PCI parity error */
  946. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  947. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  948. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  949. udelay(5);
  950. data = RD_MAILBOX_REG(ha, reg, 0);
  951. barrier();
  952. }
  953. } else
  954. udelay(10);
  955. if (!cnt)
  956. goto chip_diag_failed;
  957. /* Check product ID of chip */
  958. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  959. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  960. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  961. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  962. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  963. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  964. mb[3] != PROD_ID_3) {
  965. qla_printk(KERN_WARNING, ha,
  966. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  967. goto chip_diag_failed;
  968. }
  969. ha->product_id[0] = mb[1];
  970. ha->product_id[1] = mb[2];
  971. ha->product_id[2] = mb[3];
  972. ha->product_id[3] = mb[4];
  973. /* Adjust fw RISC transfer size */
  974. if (req->length > 1024)
  975. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  976. else
  977. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  978. req->length;
  979. if (IS_QLA2200(ha) &&
  980. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  981. /* Limit firmware transfer size with a 2200A */
  982. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  983. vha->host_no));
  984. ha->device_type |= DT_ISP2200A;
  985. ha->fw_transfer_size = 128;
  986. }
  987. /* Wrap Incoming Mailboxes Test. */
  988. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  989. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  990. rval = qla2x00_mbx_reg_test(vha);
  991. if (rval) {
  992. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  993. vha->host_no));
  994. qla_printk(KERN_WARNING, ha,
  995. "Failed mailbox send register test\n");
  996. }
  997. else {
  998. /* Flag a successful rval */
  999. rval = QLA_SUCCESS;
  1000. }
  1001. spin_lock_irqsave(&ha->hardware_lock, flags);
  1002. chip_diag_failed:
  1003. if (rval)
  1004. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  1005. "****\n", vha->host_no));
  1006. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1007. return (rval);
  1008. }
  1009. /**
  1010. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  1011. * @ha: HA context
  1012. *
  1013. * Returns 0 on success.
  1014. */
  1015. int
  1016. qla24xx_chip_diag(scsi_qla_host_t *vha)
  1017. {
  1018. int rval;
  1019. struct qla_hw_data *ha = vha->hw;
  1020. struct req_que *req = ha->req_q_map[0];
  1021. if (IS_QLA82XX(ha))
  1022. return QLA_SUCCESS;
  1023. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  1024. rval = qla2x00_mbx_reg_test(vha);
  1025. if (rval) {
  1026. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1027. vha->host_no));
  1028. qla_printk(KERN_WARNING, ha,
  1029. "Failed mailbox send register test\n");
  1030. } else {
  1031. /* Flag a successful rval */
  1032. rval = QLA_SUCCESS;
  1033. }
  1034. return rval;
  1035. }
  1036. void
  1037. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1038. {
  1039. int rval;
  1040. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1041. eft_size, fce_size, mq_size;
  1042. dma_addr_t tc_dma;
  1043. void *tc;
  1044. struct qla_hw_data *ha = vha->hw;
  1045. struct req_que *req = ha->req_q_map[0];
  1046. struct rsp_que *rsp = ha->rsp_q_map[0];
  1047. if (ha->fw_dump) {
  1048. qla_printk(KERN_WARNING, ha,
  1049. "Firmware dump previously allocated.\n");
  1050. return;
  1051. }
  1052. ha->fw_dumped = 0;
  1053. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1054. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1055. fixed_size = sizeof(struct qla2100_fw_dump);
  1056. } else if (IS_QLA23XX(ha)) {
  1057. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1058. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1059. sizeof(uint16_t);
  1060. } else if (IS_FWI2_CAPABLE(ha)) {
  1061. if (IS_QLA81XX(ha))
  1062. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1063. else if (IS_QLA25XX(ha))
  1064. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1065. else
  1066. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1067. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1068. sizeof(uint32_t);
  1069. if (ha->mqenable)
  1070. mq_size = sizeof(struct qla2xxx_mq_chain);
  1071. /* Allocate memory for Fibre Channel Event Buffer. */
  1072. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1073. goto try_eft;
  1074. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1075. GFP_KERNEL);
  1076. if (!tc) {
  1077. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1078. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1079. goto try_eft;
  1080. }
  1081. memset(tc, 0, FCE_SIZE);
  1082. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1083. ha->fce_mb, &ha->fce_bufs);
  1084. if (rval) {
  1085. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1086. "FCE (%d).\n", rval);
  1087. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1088. tc_dma);
  1089. ha->flags.fce_enabled = 0;
  1090. goto try_eft;
  1091. }
  1092. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1093. FCE_SIZE / 1024);
  1094. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1095. ha->flags.fce_enabled = 1;
  1096. ha->fce_dma = tc_dma;
  1097. ha->fce = tc;
  1098. try_eft:
  1099. /* Allocate memory for Extended Trace Buffer. */
  1100. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1101. GFP_KERNEL);
  1102. if (!tc) {
  1103. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1104. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1105. goto cont_alloc;
  1106. }
  1107. memset(tc, 0, EFT_SIZE);
  1108. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1109. if (rval) {
  1110. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1111. "EFT (%d).\n", rval);
  1112. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1113. tc_dma);
  1114. goto cont_alloc;
  1115. }
  1116. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1117. EFT_SIZE / 1024);
  1118. eft_size = EFT_SIZE;
  1119. ha->eft_dma = tc_dma;
  1120. ha->eft = tc;
  1121. }
  1122. cont_alloc:
  1123. req_q_size = req->length * sizeof(request_t);
  1124. rsp_q_size = rsp->length * sizeof(response_t);
  1125. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1126. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1127. ha->chain_offset = dump_size;
  1128. dump_size += mq_size + fce_size;
  1129. ha->fw_dump = vmalloc(dump_size);
  1130. if (!ha->fw_dump) {
  1131. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1132. "firmware dump!!!\n", dump_size / 1024);
  1133. if (ha->eft) {
  1134. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1135. ha->eft_dma);
  1136. ha->eft = NULL;
  1137. ha->eft_dma = 0;
  1138. }
  1139. return;
  1140. }
  1141. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1142. dump_size / 1024);
  1143. ha->fw_dump_len = dump_size;
  1144. ha->fw_dump->signature[0] = 'Q';
  1145. ha->fw_dump->signature[1] = 'L';
  1146. ha->fw_dump->signature[2] = 'G';
  1147. ha->fw_dump->signature[3] = 'C';
  1148. ha->fw_dump->version = __constant_htonl(1);
  1149. ha->fw_dump->fixed_size = htonl(fixed_size);
  1150. ha->fw_dump->mem_size = htonl(mem_size);
  1151. ha->fw_dump->req_q_size = htonl(req_q_size);
  1152. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1153. ha->fw_dump->eft_size = htonl(eft_size);
  1154. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1155. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1156. ha->fw_dump->header_size =
  1157. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1158. }
  1159. static int
  1160. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1161. {
  1162. #define MPS_MASK 0xe0
  1163. int rval;
  1164. uint16_t dc;
  1165. uint32_t dw;
  1166. struct qla_hw_data *ha = vha->hw;
  1167. if (!IS_QLA81XX(vha->hw))
  1168. return QLA_SUCCESS;
  1169. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1170. if (rval != QLA_SUCCESS) {
  1171. DEBUG2(qla_printk(KERN_WARNING, ha,
  1172. "Sync-MPI: Unable to acquire semaphore.\n"));
  1173. goto done;
  1174. }
  1175. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1176. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1177. if (rval != QLA_SUCCESS) {
  1178. DEBUG2(qla_printk(KERN_WARNING, ha,
  1179. "Sync-MPI: Unable to read sync.\n"));
  1180. goto done_release;
  1181. }
  1182. dc &= MPS_MASK;
  1183. if (dc == (dw & MPS_MASK))
  1184. goto done_release;
  1185. dw &= ~MPS_MASK;
  1186. dw |= dc;
  1187. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1188. if (rval != QLA_SUCCESS) {
  1189. DEBUG2(qla_printk(KERN_WARNING, ha,
  1190. "Sync-MPI: Unable to gain sync.\n"));
  1191. }
  1192. done_release:
  1193. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1194. if (rval != QLA_SUCCESS) {
  1195. DEBUG2(qla_printk(KERN_WARNING, ha,
  1196. "Sync-MPI: Unable to release semaphore.\n"));
  1197. }
  1198. done:
  1199. return rval;
  1200. }
  1201. /**
  1202. * qla2x00_setup_chip() - Load and start RISC firmware.
  1203. * @ha: HA context
  1204. *
  1205. * Returns 0 on success.
  1206. */
  1207. static int
  1208. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1209. {
  1210. int rval;
  1211. uint32_t srisc_address = 0;
  1212. struct qla_hw_data *ha = vha->hw;
  1213. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1214. unsigned long flags;
  1215. uint16_t fw_major_version;
  1216. if (IS_QLA82XX(ha)) {
  1217. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1218. if (rval == QLA_SUCCESS)
  1219. goto enable_82xx_npiv;
  1220. else
  1221. goto failed;
  1222. }
  1223. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1224. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1225. spin_lock_irqsave(&ha->hardware_lock, flags);
  1226. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1227. RD_REG_WORD(&reg->hccr);
  1228. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1229. }
  1230. qla81xx_mpi_sync(vha);
  1231. /* Load firmware sequences */
  1232. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1233. if (rval == QLA_SUCCESS) {
  1234. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1235. "code.\n", vha->host_no));
  1236. rval = qla2x00_verify_checksum(vha, srisc_address);
  1237. if (rval == QLA_SUCCESS) {
  1238. /* Start firmware execution. */
  1239. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1240. "firmware.\n", vha->host_no));
  1241. rval = qla2x00_execute_fw(vha, srisc_address);
  1242. /* Retrieve firmware information. */
  1243. if (rval == QLA_SUCCESS) {
  1244. enable_82xx_npiv:
  1245. fw_major_version = ha->fw_major_version;
  1246. rval = qla2x00_get_fw_version(vha,
  1247. &ha->fw_major_version,
  1248. &ha->fw_minor_version,
  1249. &ha->fw_subminor_version,
  1250. &ha->fw_attributes, &ha->fw_memory_size,
  1251. ha->mpi_version, &ha->mpi_capabilities,
  1252. ha->phy_version);
  1253. if (rval != QLA_SUCCESS)
  1254. goto failed;
  1255. ha->flags.npiv_supported = 0;
  1256. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1257. (ha->fw_attributes & BIT_2)) {
  1258. ha->flags.npiv_supported = 1;
  1259. if ((!ha->max_npiv_vports) ||
  1260. ((ha->max_npiv_vports + 1) %
  1261. MIN_MULTI_ID_FABRIC))
  1262. ha->max_npiv_vports =
  1263. MIN_MULTI_ID_FABRIC - 1;
  1264. }
  1265. qla2x00_get_resource_cnts(vha, NULL,
  1266. &ha->fw_xcb_count, NULL, NULL,
  1267. &ha->max_npiv_vports, NULL);
  1268. if (!fw_major_version && ql2xallocfwdump) {
  1269. if (!IS_QLA82XX(ha))
  1270. qla2x00_alloc_fw_dump(vha);
  1271. }
  1272. }
  1273. } else {
  1274. DEBUG2(printk(KERN_INFO
  1275. "scsi(%ld): ISP Firmware failed checksum.\n",
  1276. vha->host_no));
  1277. }
  1278. }
  1279. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1280. /* Enable proper parity. */
  1281. spin_lock_irqsave(&ha->hardware_lock, flags);
  1282. if (IS_QLA2300(ha))
  1283. /* SRAM parity */
  1284. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1285. else
  1286. /* SRAM, Instruction RAM and GP RAM parity */
  1287. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1288. RD_REG_WORD(&reg->hccr);
  1289. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1290. }
  1291. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1292. uint32_t size;
  1293. rval = qla81xx_fac_get_sector_size(vha, &size);
  1294. if (rval == QLA_SUCCESS) {
  1295. ha->flags.fac_supported = 1;
  1296. ha->fdt_block_size = size << 2;
  1297. } else {
  1298. qla_printk(KERN_ERR, ha,
  1299. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1300. ha->fw_major_version, ha->fw_minor_version,
  1301. ha->fw_subminor_version);
  1302. }
  1303. }
  1304. failed:
  1305. if (rval) {
  1306. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1307. vha->host_no));
  1308. }
  1309. return (rval);
  1310. }
  1311. /**
  1312. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1313. * @ha: HA context
  1314. *
  1315. * Beginning of request ring has initialization control block already built
  1316. * by nvram config routine.
  1317. *
  1318. * Returns 0 on success.
  1319. */
  1320. void
  1321. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1322. {
  1323. uint16_t cnt;
  1324. response_t *pkt;
  1325. rsp->ring_ptr = rsp->ring;
  1326. rsp->ring_index = 0;
  1327. rsp->status_srb = NULL;
  1328. pkt = rsp->ring_ptr;
  1329. for (cnt = 0; cnt < rsp->length; cnt++) {
  1330. pkt->signature = RESPONSE_PROCESSED;
  1331. pkt++;
  1332. }
  1333. }
  1334. /**
  1335. * qla2x00_update_fw_options() - Read and process firmware options.
  1336. * @ha: HA context
  1337. *
  1338. * Returns 0 on success.
  1339. */
  1340. void
  1341. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1342. {
  1343. uint16_t swing, emphasis, tx_sens, rx_sens;
  1344. struct qla_hw_data *ha = vha->hw;
  1345. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1346. qla2x00_get_fw_options(vha, ha->fw_options);
  1347. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1348. return;
  1349. /* Serial Link options. */
  1350. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1351. vha->host_no));
  1352. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1353. sizeof(ha->fw_seriallink_options)));
  1354. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1355. if (ha->fw_seriallink_options[3] & BIT_2) {
  1356. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1357. /* 1G settings */
  1358. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1359. emphasis = (ha->fw_seriallink_options[2] &
  1360. (BIT_4 | BIT_3)) >> 3;
  1361. tx_sens = ha->fw_seriallink_options[0] &
  1362. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1363. rx_sens = (ha->fw_seriallink_options[0] &
  1364. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1365. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1366. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1367. if (rx_sens == 0x0)
  1368. rx_sens = 0x3;
  1369. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1370. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1371. ha->fw_options[10] |= BIT_5 |
  1372. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1373. (tx_sens & (BIT_1 | BIT_0));
  1374. /* 2G settings */
  1375. swing = (ha->fw_seriallink_options[2] &
  1376. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1377. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1378. tx_sens = ha->fw_seriallink_options[1] &
  1379. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1380. rx_sens = (ha->fw_seriallink_options[1] &
  1381. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1382. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1383. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1384. if (rx_sens == 0x0)
  1385. rx_sens = 0x3;
  1386. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1387. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1388. ha->fw_options[11] |= BIT_5 |
  1389. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1390. (tx_sens & (BIT_1 | BIT_0));
  1391. }
  1392. /* FCP2 options. */
  1393. /* Return command IOCBs without waiting for an ABTS to complete. */
  1394. ha->fw_options[3] |= BIT_13;
  1395. /* LED scheme. */
  1396. if (ha->flags.enable_led_scheme)
  1397. ha->fw_options[2] |= BIT_12;
  1398. /* Detect ISP6312. */
  1399. if (IS_QLA6312(ha))
  1400. ha->fw_options[2] |= BIT_13;
  1401. /* Update firmware options. */
  1402. qla2x00_set_fw_options(vha, ha->fw_options);
  1403. }
  1404. void
  1405. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1406. {
  1407. int rval;
  1408. struct qla_hw_data *ha = vha->hw;
  1409. if (IS_QLA82XX(ha))
  1410. return;
  1411. /* Update Serial Link options. */
  1412. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1413. return;
  1414. rval = qla2x00_set_serdes_params(vha,
  1415. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1416. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1417. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1418. if (rval != QLA_SUCCESS) {
  1419. qla_printk(KERN_WARNING, ha,
  1420. "Unable to update Serial Link options (%x).\n", rval);
  1421. }
  1422. }
  1423. void
  1424. qla2x00_config_rings(struct scsi_qla_host *vha)
  1425. {
  1426. struct qla_hw_data *ha = vha->hw;
  1427. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1428. struct req_que *req = ha->req_q_map[0];
  1429. struct rsp_que *rsp = ha->rsp_q_map[0];
  1430. /* Setup ring parameters in initialization control block. */
  1431. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1432. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1433. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1434. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1435. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1436. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1437. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1438. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1439. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1440. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1441. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1442. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1443. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1444. }
  1445. void
  1446. qla24xx_config_rings(struct scsi_qla_host *vha)
  1447. {
  1448. struct qla_hw_data *ha = vha->hw;
  1449. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1450. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1451. struct qla_msix_entry *msix;
  1452. struct init_cb_24xx *icb;
  1453. uint16_t rid = 0;
  1454. struct req_que *req = ha->req_q_map[0];
  1455. struct rsp_que *rsp = ha->rsp_q_map[0];
  1456. /* Setup ring parameters in initialization control block. */
  1457. icb = (struct init_cb_24xx *)ha->init_cb;
  1458. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1459. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1460. icb->request_q_length = cpu_to_le16(req->length);
  1461. icb->response_q_length = cpu_to_le16(rsp->length);
  1462. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1463. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1464. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1465. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1466. if (ha->mqenable) {
  1467. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1468. icb->rid = __constant_cpu_to_le16(rid);
  1469. if (ha->flags.msix_enabled) {
  1470. msix = &ha->msix_entries[1];
  1471. DEBUG2_17(printk(KERN_INFO
  1472. "Registering vector 0x%x for base que\n", msix->entry));
  1473. icb->msix = cpu_to_le16(msix->entry);
  1474. }
  1475. /* Use alternate PCI bus number */
  1476. if (MSB(rid))
  1477. icb->firmware_options_2 |=
  1478. __constant_cpu_to_le32(BIT_19);
  1479. /* Use alternate PCI devfn */
  1480. if (LSB(rid))
  1481. icb->firmware_options_2 |=
  1482. __constant_cpu_to_le32(BIT_18);
  1483. /* Use Disable MSIX Handshake mode for capable adapters */
  1484. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1485. icb->firmware_options_2 &=
  1486. __constant_cpu_to_le32(~BIT_22);
  1487. ha->flags.disable_msix_handshake = 1;
  1488. qla_printk(KERN_INFO, ha,
  1489. "MSIX Handshake Disable Mode turned on\n");
  1490. } else {
  1491. icb->firmware_options_2 |=
  1492. __constant_cpu_to_le32(BIT_22);
  1493. }
  1494. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1495. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1496. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1497. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1498. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1499. } else {
  1500. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1501. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1502. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1503. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1504. }
  1505. /* PCI posting */
  1506. RD_REG_DWORD(&ioreg->hccr);
  1507. }
  1508. /**
  1509. * qla2x00_init_rings() - Initializes firmware.
  1510. * @ha: HA context
  1511. *
  1512. * Beginning of request ring has initialization control block already built
  1513. * by nvram config routine.
  1514. *
  1515. * Returns 0 on success.
  1516. */
  1517. static int
  1518. qla2x00_init_rings(scsi_qla_host_t *vha)
  1519. {
  1520. int rval;
  1521. unsigned long flags = 0;
  1522. int cnt, que;
  1523. struct qla_hw_data *ha = vha->hw;
  1524. struct req_que *req;
  1525. struct rsp_que *rsp;
  1526. struct scsi_qla_host *vp;
  1527. struct mid_init_cb_24xx *mid_init_cb =
  1528. (struct mid_init_cb_24xx *) ha->init_cb;
  1529. spin_lock_irqsave(&ha->hardware_lock, flags);
  1530. /* Clear outstanding commands array. */
  1531. for (que = 0; que < ha->max_req_queues; que++) {
  1532. req = ha->req_q_map[que];
  1533. if (!req)
  1534. continue;
  1535. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1536. req->outstanding_cmds[cnt] = NULL;
  1537. req->current_outstanding_cmd = 1;
  1538. /* Initialize firmware. */
  1539. req->ring_ptr = req->ring;
  1540. req->ring_index = 0;
  1541. req->cnt = req->length;
  1542. }
  1543. for (que = 0; que < ha->max_rsp_queues; que++) {
  1544. rsp = ha->rsp_q_map[que];
  1545. if (!rsp)
  1546. continue;
  1547. /* Initialize response queue entries */
  1548. qla2x00_init_response_q_entries(rsp);
  1549. }
  1550. /* Clear RSCN queue. */
  1551. list_for_each_entry(vp, &ha->vp_list, list) {
  1552. vp->rscn_in_ptr = 0;
  1553. vp->rscn_out_ptr = 0;
  1554. }
  1555. ha->isp_ops->config_rings(vha);
  1556. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1557. /* Update any ISP specific firmware options before initialization. */
  1558. ha->isp_ops->update_fw_options(vha);
  1559. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1560. if (ha->flags.npiv_supported) {
  1561. if (ha->operating_mode == LOOP)
  1562. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1563. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1564. }
  1565. if (IS_FWI2_CAPABLE(ha)) {
  1566. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1567. mid_init_cb->init_cb.execution_throttle =
  1568. cpu_to_le16(ha->fw_xcb_count);
  1569. }
  1570. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1571. if (rval) {
  1572. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1573. vha->host_no));
  1574. } else {
  1575. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1576. vha->host_no));
  1577. }
  1578. return (rval);
  1579. }
  1580. /**
  1581. * qla2x00_fw_ready() - Waits for firmware ready.
  1582. * @ha: HA context
  1583. *
  1584. * Returns 0 on success.
  1585. */
  1586. static int
  1587. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1588. {
  1589. int rval;
  1590. unsigned long wtime, mtime, cs84xx_time;
  1591. uint16_t min_wait; /* Minimum wait time if loop is down */
  1592. uint16_t wait_time; /* Wait time if loop is coming ready */
  1593. uint16_t state[5];
  1594. struct qla_hw_data *ha = vha->hw;
  1595. rval = QLA_SUCCESS;
  1596. /* 20 seconds for loop down. */
  1597. min_wait = 20;
  1598. /*
  1599. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1600. * our own processing.
  1601. */
  1602. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1603. wait_time = min_wait;
  1604. }
  1605. /* Min wait time if loop down */
  1606. mtime = jiffies + (min_wait * HZ);
  1607. /* wait time before firmware ready */
  1608. wtime = jiffies + (wait_time * HZ);
  1609. /* Wait for ISP to finish LIP */
  1610. if (!vha->flags.init_done)
  1611. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1612. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1613. vha->host_no));
  1614. do {
  1615. rval = qla2x00_get_firmware_state(vha, state);
  1616. if (rval == QLA_SUCCESS) {
  1617. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1618. vha->device_flags &= ~DFLG_NO_CABLE;
  1619. }
  1620. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1621. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1622. "84xx=%x.\n", vha->host_no, state[0],
  1623. state[2]));
  1624. if ((state[2] & FSTATE_LOGGED_IN) &&
  1625. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1626. DEBUG16(printk("scsi(%ld): Sending "
  1627. "verify iocb.\n", vha->host_no));
  1628. cs84xx_time = jiffies;
  1629. rval = qla84xx_init_chip(vha);
  1630. if (rval != QLA_SUCCESS)
  1631. break;
  1632. /* Add time taken to initialize. */
  1633. cs84xx_time = jiffies - cs84xx_time;
  1634. wtime += cs84xx_time;
  1635. mtime += cs84xx_time;
  1636. DEBUG16(printk("scsi(%ld): Increasing "
  1637. "wait time by %ld. New time %ld\n",
  1638. vha->host_no, cs84xx_time, wtime));
  1639. }
  1640. } else if (state[0] == FSTATE_READY) {
  1641. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1642. vha->host_no));
  1643. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1644. &ha->login_timeout, &ha->r_a_tov);
  1645. rval = QLA_SUCCESS;
  1646. break;
  1647. }
  1648. rval = QLA_FUNCTION_FAILED;
  1649. if (atomic_read(&vha->loop_down_timer) &&
  1650. state[0] != FSTATE_READY) {
  1651. /* Loop down. Timeout on min_wait for states
  1652. * other than Wait for Login.
  1653. */
  1654. if (time_after_eq(jiffies, mtime)) {
  1655. qla_printk(KERN_INFO, ha,
  1656. "Cable is unplugged...\n");
  1657. vha->device_flags |= DFLG_NO_CABLE;
  1658. break;
  1659. }
  1660. }
  1661. } else {
  1662. /* Mailbox cmd failed. Timeout on min_wait. */
  1663. if (time_after_eq(jiffies, mtime))
  1664. break;
  1665. }
  1666. if (time_after_eq(jiffies, wtime))
  1667. break;
  1668. /* Delay for a while */
  1669. msleep(500);
  1670. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1671. vha->host_no, state[0], jiffies));
  1672. } while (1);
  1673. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1674. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1675. jiffies));
  1676. if (rval) {
  1677. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1678. vha->host_no));
  1679. }
  1680. return (rval);
  1681. }
  1682. /*
  1683. * qla2x00_configure_hba
  1684. * Setup adapter context.
  1685. *
  1686. * Input:
  1687. * ha = adapter state pointer.
  1688. *
  1689. * Returns:
  1690. * 0 = success
  1691. *
  1692. * Context:
  1693. * Kernel context.
  1694. */
  1695. static int
  1696. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1697. {
  1698. int rval;
  1699. uint16_t loop_id;
  1700. uint16_t topo;
  1701. uint16_t sw_cap;
  1702. uint8_t al_pa;
  1703. uint8_t area;
  1704. uint8_t domain;
  1705. char connect_type[22];
  1706. struct qla_hw_data *ha = vha->hw;
  1707. /* Get host addresses. */
  1708. rval = qla2x00_get_adapter_id(vha,
  1709. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1710. if (rval != QLA_SUCCESS) {
  1711. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1712. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1713. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1714. __func__, vha->host_no));
  1715. } else {
  1716. qla_printk(KERN_WARNING, ha,
  1717. "ERROR -- Unable to get host loop ID.\n");
  1718. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1719. }
  1720. return (rval);
  1721. }
  1722. if (topo == 4) {
  1723. qla_printk(KERN_INFO, ha,
  1724. "Cannot get topology - retrying.\n");
  1725. return (QLA_FUNCTION_FAILED);
  1726. }
  1727. vha->loop_id = loop_id;
  1728. /* initialize */
  1729. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1730. ha->operating_mode = LOOP;
  1731. ha->switch_cap = 0;
  1732. switch (topo) {
  1733. case 0:
  1734. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1735. vha->host_no));
  1736. ha->current_topology = ISP_CFG_NL;
  1737. strcpy(connect_type, "(Loop)");
  1738. break;
  1739. case 1:
  1740. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1741. vha->host_no));
  1742. ha->switch_cap = sw_cap;
  1743. ha->current_topology = ISP_CFG_FL;
  1744. strcpy(connect_type, "(FL_Port)");
  1745. break;
  1746. case 2:
  1747. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1748. vha->host_no));
  1749. ha->operating_mode = P2P;
  1750. ha->current_topology = ISP_CFG_N;
  1751. strcpy(connect_type, "(N_Port-to-N_Port)");
  1752. break;
  1753. case 3:
  1754. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1755. vha->host_no));
  1756. ha->switch_cap = sw_cap;
  1757. ha->operating_mode = P2P;
  1758. ha->current_topology = ISP_CFG_F;
  1759. strcpy(connect_type, "(F_Port)");
  1760. break;
  1761. default:
  1762. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1763. "Using NL.\n",
  1764. vha->host_no, topo));
  1765. ha->current_topology = ISP_CFG_NL;
  1766. strcpy(connect_type, "(Loop)");
  1767. break;
  1768. }
  1769. /* Save Host port and loop ID. */
  1770. /* byte order - Big Endian */
  1771. vha->d_id.b.domain = domain;
  1772. vha->d_id.b.area = area;
  1773. vha->d_id.b.al_pa = al_pa;
  1774. if (!vha->flags.init_done)
  1775. qla_printk(KERN_INFO, ha,
  1776. "Topology - %s, Host Loop address 0x%x\n",
  1777. connect_type, vha->loop_id);
  1778. if (rval) {
  1779. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1780. } else {
  1781. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1782. }
  1783. return(rval);
  1784. }
  1785. inline void
  1786. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1787. char *def)
  1788. {
  1789. char *st, *en;
  1790. uint16_t index;
  1791. struct qla_hw_data *ha = vha->hw;
  1792. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1793. !IS_QLA8XXX_TYPE(ha);
  1794. if (memcmp(model, BINZERO, len) != 0) {
  1795. strncpy(ha->model_number, model, len);
  1796. st = en = ha->model_number;
  1797. en += len - 1;
  1798. while (en > st) {
  1799. if (*en != 0x20 && *en != 0x00)
  1800. break;
  1801. *en-- = '\0';
  1802. }
  1803. index = (ha->pdev->subsystem_device & 0xff);
  1804. if (use_tbl &&
  1805. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1806. index < QLA_MODEL_NAMES)
  1807. strncpy(ha->model_desc,
  1808. qla2x00_model_name[index * 2 + 1],
  1809. sizeof(ha->model_desc) - 1);
  1810. } else {
  1811. index = (ha->pdev->subsystem_device & 0xff);
  1812. if (use_tbl &&
  1813. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1814. index < QLA_MODEL_NAMES) {
  1815. strcpy(ha->model_number,
  1816. qla2x00_model_name[index * 2]);
  1817. strncpy(ha->model_desc,
  1818. qla2x00_model_name[index * 2 + 1],
  1819. sizeof(ha->model_desc) - 1);
  1820. } else {
  1821. strcpy(ha->model_number, def);
  1822. }
  1823. }
  1824. if (IS_FWI2_CAPABLE(ha))
  1825. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1826. sizeof(ha->model_desc));
  1827. }
  1828. /* On sparc systems, obtain port and node WWN from firmware
  1829. * properties.
  1830. */
  1831. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1832. {
  1833. #ifdef CONFIG_SPARC
  1834. struct qla_hw_data *ha = vha->hw;
  1835. struct pci_dev *pdev = ha->pdev;
  1836. struct device_node *dp = pci_device_to_OF_node(pdev);
  1837. const u8 *val;
  1838. int len;
  1839. val = of_get_property(dp, "port-wwn", &len);
  1840. if (val && len >= WWN_SIZE)
  1841. memcpy(nv->port_name, val, WWN_SIZE);
  1842. val = of_get_property(dp, "node-wwn", &len);
  1843. if (val && len >= WWN_SIZE)
  1844. memcpy(nv->node_name, val, WWN_SIZE);
  1845. #endif
  1846. }
  1847. /*
  1848. * NVRAM configuration for ISP 2xxx
  1849. *
  1850. * Input:
  1851. * ha = adapter block pointer.
  1852. *
  1853. * Output:
  1854. * initialization control block in response_ring
  1855. * host adapters parameters in host adapter block
  1856. *
  1857. * Returns:
  1858. * 0 = success.
  1859. */
  1860. int
  1861. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1862. {
  1863. int rval;
  1864. uint8_t chksum = 0;
  1865. uint16_t cnt;
  1866. uint8_t *dptr1, *dptr2;
  1867. struct qla_hw_data *ha = vha->hw;
  1868. init_cb_t *icb = ha->init_cb;
  1869. nvram_t *nv = ha->nvram;
  1870. uint8_t *ptr = ha->nvram;
  1871. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1872. rval = QLA_SUCCESS;
  1873. /* Determine NVRAM starting address. */
  1874. ha->nvram_size = sizeof(nvram_t);
  1875. ha->nvram_base = 0;
  1876. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1877. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1878. ha->nvram_base = 0x80;
  1879. /* Get NVRAM data and calculate checksum. */
  1880. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1881. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1882. chksum += *ptr++;
  1883. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1884. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1885. /* Bad NVRAM data, set defaults parameters. */
  1886. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1887. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1888. /* Reset NVRAM data. */
  1889. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1890. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1891. nv->nvram_version);
  1892. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1893. "invalid -- WWPN) defaults.\n");
  1894. /*
  1895. * Set default initialization control block.
  1896. */
  1897. memset(nv, 0, ha->nvram_size);
  1898. nv->parameter_block_version = ICB_VERSION;
  1899. if (IS_QLA23XX(ha)) {
  1900. nv->firmware_options[0] = BIT_2 | BIT_1;
  1901. nv->firmware_options[1] = BIT_7 | BIT_5;
  1902. nv->add_firmware_options[0] = BIT_5;
  1903. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1904. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1905. nv->special_options[1] = BIT_7;
  1906. } else if (IS_QLA2200(ha)) {
  1907. nv->firmware_options[0] = BIT_2 | BIT_1;
  1908. nv->firmware_options[1] = BIT_7 | BIT_5;
  1909. nv->add_firmware_options[0] = BIT_5;
  1910. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1911. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1912. } else if (IS_QLA2100(ha)) {
  1913. nv->firmware_options[0] = BIT_3 | BIT_1;
  1914. nv->firmware_options[1] = BIT_5;
  1915. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1916. }
  1917. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1918. nv->execution_throttle = __constant_cpu_to_le16(16);
  1919. nv->retry_count = 8;
  1920. nv->retry_delay = 1;
  1921. nv->port_name[0] = 33;
  1922. nv->port_name[3] = 224;
  1923. nv->port_name[4] = 139;
  1924. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1925. nv->login_timeout = 4;
  1926. /*
  1927. * Set default host adapter parameters
  1928. */
  1929. nv->host_p[1] = BIT_2;
  1930. nv->reset_delay = 5;
  1931. nv->port_down_retry_count = 8;
  1932. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1933. nv->link_down_timeout = 60;
  1934. rval = 1;
  1935. }
  1936. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1937. /*
  1938. * The SN2 does not provide BIOS emulation which means you can't change
  1939. * potentially bogus BIOS settings. Force the use of default settings
  1940. * for link rate and frame size. Hope that the rest of the settings
  1941. * are valid.
  1942. */
  1943. if (ia64_platform_is("sn2")) {
  1944. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1945. if (IS_QLA23XX(ha))
  1946. nv->special_options[1] = BIT_7;
  1947. }
  1948. #endif
  1949. /* Reset Initialization control block */
  1950. memset(icb, 0, ha->init_cb_size);
  1951. /*
  1952. * Setup driver NVRAM options.
  1953. */
  1954. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1955. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1956. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1957. nv->firmware_options[1] &= ~BIT_4;
  1958. if (IS_QLA23XX(ha)) {
  1959. nv->firmware_options[0] |= BIT_2;
  1960. nv->firmware_options[0] &= ~BIT_3;
  1961. nv->firmware_options[0] &= ~BIT_6;
  1962. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1963. if (IS_QLA2300(ha)) {
  1964. if (ha->fb_rev == FPM_2310) {
  1965. strcpy(ha->model_number, "QLA2310");
  1966. } else {
  1967. strcpy(ha->model_number, "QLA2300");
  1968. }
  1969. } else {
  1970. qla2x00_set_model_info(vha, nv->model_number,
  1971. sizeof(nv->model_number), "QLA23xx");
  1972. }
  1973. } else if (IS_QLA2200(ha)) {
  1974. nv->firmware_options[0] |= BIT_2;
  1975. /*
  1976. * 'Point-to-point preferred, else loop' is not a safe
  1977. * connection mode setting.
  1978. */
  1979. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1980. (BIT_5 | BIT_4)) {
  1981. /* Force 'loop preferred, else point-to-point'. */
  1982. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1983. nv->add_firmware_options[0] |= BIT_5;
  1984. }
  1985. strcpy(ha->model_number, "QLA22xx");
  1986. } else /*if (IS_QLA2100(ha))*/ {
  1987. strcpy(ha->model_number, "QLA2100");
  1988. }
  1989. /*
  1990. * Copy over NVRAM RISC parameter block to initialization control block.
  1991. */
  1992. dptr1 = (uint8_t *)icb;
  1993. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1994. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1995. while (cnt--)
  1996. *dptr1++ = *dptr2++;
  1997. /* Copy 2nd half. */
  1998. dptr1 = (uint8_t *)icb->add_firmware_options;
  1999. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  2000. while (cnt--)
  2001. *dptr1++ = *dptr2++;
  2002. /* Use alternate WWN? */
  2003. if (nv->host_p[1] & BIT_7) {
  2004. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2005. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2006. }
  2007. /* Prepare nodename */
  2008. if ((icb->firmware_options[1] & BIT_6) == 0) {
  2009. /*
  2010. * Firmware will apply the following mask if the nodename was
  2011. * not provided.
  2012. */
  2013. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2014. icb->node_name[0] &= 0xF0;
  2015. }
  2016. /*
  2017. * Set host adapter parameters.
  2018. */
  2019. if (nv->host_p[0] & BIT_7)
  2020. ql2xextended_error_logging = 1;
  2021. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  2022. /* Always load RISC code on non ISP2[12]00 chips. */
  2023. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2024. ha->flags.disable_risc_code_load = 0;
  2025. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  2026. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2027. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2028. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2029. ha->flags.disable_serdes = 0;
  2030. ha->operating_mode =
  2031. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2032. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2033. sizeof(ha->fw_seriallink_options));
  2034. /* save HBA serial number */
  2035. ha->serial0 = icb->port_name[5];
  2036. ha->serial1 = icb->port_name[6];
  2037. ha->serial2 = icb->port_name[7];
  2038. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2039. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2040. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2041. ha->retry_count = nv->retry_count;
  2042. /* Set minimum login_timeout to 4 seconds. */
  2043. if (nv->login_timeout < ql2xlogintimeout)
  2044. nv->login_timeout = ql2xlogintimeout;
  2045. if (nv->login_timeout < 4)
  2046. nv->login_timeout = 4;
  2047. ha->login_timeout = nv->login_timeout;
  2048. icb->login_timeout = nv->login_timeout;
  2049. /* Set minimum RATOV to 100 tenths of a second. */
  2050. ha->r_a_tov = 100;
  2051. ha->loop_reset_delay = nv->reset_delay;
  2052. /* Link Down Timeout = 0:
  2053. *
  2054. * When Port Down timer expires we will start returning
  2055. * I/O's to OS with "DID_NO_CONNECT".
  2056. *
  2057. * Link Down Timeout != 0:
  2058. *
  2059. * The driver waits for the link to come up after link down
  2060. * before returning I/Os to OS with "DID_NO_CONNECT".
  2061. */
  2062. if (nv->link_down_timeout == 0) {
  2063. ha->loop_down_abort_time =
  2064. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2065. } else {
  2066. ha->link_down_timeout = nv->link_down_timeout;
  2067. ha->loop_down_abort_time =
  2068. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2069. }
  2070. /*
  2071. * Need enough time to try and get the port back.
  2072. */
  2073. ha->port_down_retry_count = nv->port_down_retry_count;
  2074. if (qlport_down_retry)
  2075. ha->port_down_retry_count = qlport_down_retry;
  2076. /* Set login_retry_count */
  2077. ha->login_retry_count = nv->retry_count;
  2078. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2079. ha->port_down_retry_count > 3)
  2080. ha->login_retry_count = ha->port_down_retry_count;
  2081. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2082. ha->login_retry_count = ha->port_down_retry_count;
  2083. if (ql2xloginretrycount)
  2084. ha->login_retry_count = ql2xloginretrycount;
  2085. icb->lun_enables = __constant_cpu_to_le16(0);
  2086. icb->command_resource_count = 0;
  2087. icb->immediate_notify_resource_count = 0;
  2088. icb->timeout = __constant_cpu_to_le16(0);
  2089. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2090. /* Enable RIO */
  2091. icb->firmware_options[0] &= ~BIT_3;
  2092. icb->add_firmware_options[0] &=
  2093. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2094. icb->add_firmware_options[0] |= BIT_2;
  2095. icb->response_accumulation_timer = 3;
  2096. icb->interrupt_delay_timer = 5;
  2097. vha->flags.process_response_queue = 1;
  2098. } else {
  2099. /* Enable ZIO. */
  2100. if (!vha->flags.init_done) {
  2101. ha->zio_mode = icb->add_firmware_options[0] &
  2102. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2103. ha->zio_timer = icb->interrupt_delay_timer ?
  2104. icb->interrupt_delay_timer: 2;
  2105. }
  2106. icb->add_firmware_options[0] &=
  2107. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2108. vha->flags.process_response_queue = 0;
  2109. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2110. ha->zio_mode = QLA_ZIO_MODE_6;
  2111. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2112. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2113. ha->zio_timer * 100));
  2114. qla_printk(KERN_INFO, ha,
  2115. "ZIO mode %d enabled; timer delay (%d us).\n",
  2116. ha->zio_mode, ha->zio_timer * 100);
  2117. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2118. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2119. vha->flags.process_response_queue = 1;
  2120. }
  2121. }
  2122. if (rval) {
  2123. DEBUG2_3(printk(KERN_WARNING
  2124. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2125. }
  2126. return (rval);
  2127. }
  2128. static void
  2129. qla2x00_rport_del(void *data)
  2130. {
  2131. fc_port_t *fcport = data;
  2132. struct fc_rport *rport;
  2133. spin_lock_irq(fcport->vha->host->host_lock);
  2134. rport = fcport->drport ? fcport->drport: fcport->rport;
  2135. fcport->drport = NULL;
  2136. spin_unlock_irq(fcport->vha->host->host_lock);
  2137. if (rport)
  2138. fc_remote_port_delete(rport);
  2139. }
  2140. /**
  2141. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2142. * @ha: HA context
  2143. * @flags: allocation flags
  2144. *
  2145. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2146. */
  2147. fc_port_t *
  2148. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2149. {
  2150. fc_port_t *fcport;
  2151. fcport = kzalloc(sizeof(fc_port_t), flags);
  2152. if (!fcport)
  2153. return NULL;
  2154. /* Setup fcport template structure. */
  2155. fcport->vha = vha;
  2156. fcport->vp_idx = vha->vp_idx;
  2157. fcport->port_type = FCT_UNKNOWN;
  2158. fcport->loop_id = FC_NO_LOOP_ID;
  2159. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2160. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2161. return fcport;
  2162. }
  2163. /*
  2164. * qla2x00_configure_loop
  2165. * Updates Fibre Channel Device Database with what is actually on loop.
  2166. *
  2167. * Input:
  2168. * ha = adapter block pointer.
  2169. *
  2170. * Returns:
  2171. * 0 = success.
  2172. * 1 = error.
  2173. * 2 = database was full and device was not configured.
  2174. */
  2175. static int
  2176. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2177. {
  2178. int rval;
  2179. unsigned long flags, save_flags;
  2180. struct qla_hw_data *ha = vha->hw;
  2181. rval = QLA_SUCCESS;
  2182. /* Get Initiator ID */
  2183. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2184. rval = qla2x00_configure_hba(vha);
  2185. if (rval != QLA_SUCCESS) {
  2186. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2187. vha->host_no));
  2188. return (rval);
  2189. }
  2190. }
  2191. save_flags = flags = vha->dpc_flags;
  2192. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2193. vha->host_no, flags));
  2194. /*
  2195. * If we have both an RSCN and PORT UPDATE pending then handle them
  2196. * both at the same time.
  2197. */
  2198. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2199. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2200. qla2x00_get_data_rate(vha);
  2201. /* Determine what we need to do */
  2202. if (ha->current_topology == ISP_CFG_FL &&
  2203. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2204. vha->flags.rscn_queue_overflow = 1;
  2205. set_bit(RSCN_UPDATE, &flags);
  2206. } else if (ha->current_topology == ISP_CFG_F &&
  2207. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2208. vha->flags.rscn_queue_overflow = 1;
  2209. set_bit(RSCN_UPDATE, &flags);
  2210. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2211. } else if (ha->current_topology == ISP_CFG_N) {
  2212. clear_bit(RSCN_UPDATE, &flags);
  2213. } else if (!vha->flags.online ||
  2214. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2215. vha->flags.rscn_queue_overflow = 1;
  2216. set_bit(RSCN_UPDATE, &flags);
  2217. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2218. }
  2219. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2220. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2221. rval = QLA_FUNCTION_FAILED;
  2222. else
  2223. rval = qla2x00_configure_local_loop(vha);
  2224. }
  2225. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2226. if (LOOP_TRANSITION(vha))
  2227. rval = QLA_FUNCTION_FAILED;
  2228. else
  2229. rval = qla2x00_configure_fabric(vha);
  2230. }
  2231. if (rval == QLA_SUCCESS) {
  2232. if (atomic_read(&vha->loop_down_timer) ||
  2233. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2234. rval = QLA_FUNCTION_FAILED;
  2235. } else {
  2236. atomic_set(&vha->loop_state, LOOP_READY);
  2237. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2238. }
  2239. }
  2240. if (rval) {
  2241. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2242. __func__, vha->host_no));
  2243. } else {
  2244. DEBUG3(printk("%s: exiting normally\n", __func__));
  2245. }
  2246. /* Restore state if a resync event occurred during processing */
  2247. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2248. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2249. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2250. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2251. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2252. vha->flags.rscn_queue_overflow = 1;
  2253. }
  2254. }
  2255. return (rval);
  2256. }
  2257. /*
  2258. * qla2x00_configure_local_loop
  2259. * Updates Fibre Channel Device Database with local loop devices.
  2260. *
  2261. * Input:
  2262. * ha = adapter block pointer.
  2263. *
  2264. * Returns:
  2265. * 0 = success.
  2266. */
  2267. static int
  2268. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2269. {
  2270. int rval, rval2;
  2271. int found_devs;
  2272. int found;
  2273. fc_port_t *fcport, *new_fcport;
  2274. uint16_t index;
  2275. uint16_t entries;
  2276. char *id_iter;
  2277. uint16_t loop_id;
  2278. uint8_t domain, area, al_pa;
  2279. struct qla_hw_data *ha = vha->hw;
  2280. found_devs = 0;
  2281. new_fcport = NULL;
  2282. entries = MAX_FIBRE_DEVICES;
  2283. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2284. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2285. /* Get list of logged in devices. */
  2286. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2287. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2288. &entries);
  2289. if (rval != QLA_SUCCESS)
  2290. goto cleanup_allocation;
  2291. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2292. vha->host_no, entries));
  2293. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2294. entries * sizeof(struct gid_list_info)));
  2295. /* Allocate temporary fcport for any new fcports discovered. */
  2296. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2297. if (new_fcport == NULL) {
  2298. rval = QLA_MEMORY_ALLOC_FAILED;
  2299. goto cleanup_allocation;
  2300. }
  2301. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2302. /*
  2303. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2304. */
  2305. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2306. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2307. fcport->port_type != FCT_BROADCAST &&
  2308. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2309. DEBUG(printk("scsi(%ld): Marking port lost, "
  2310. "loop_id=0x%04x\n",
  2311. vha->host_no, fcport->loop_id));
  2312. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2313. }
  2314. }
  2315. /* Add devices to port list. */
  2316. id_iter = (char *)ha->gid_list;
  2317. for (index = 0; index < entries; index++) {
  2318. domain = ((struct gid_list_info *)id_iter)->domain;
  2319. area = ((struct gid_list_info *)id_iter)->area;
  2320. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2321. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2322. loop_id = (uint16_t)
  2323. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2324. else
  2325. loop_id = le16_to_cpu(
  2326. ((struct gid_list_info *)id_iter)->loop_id);
  2327. id_iter += ha->gid_list_info_size;
  2328. /* Bypass reserved domain fields. */
  2329. if ((domain & 0xf0) == 0xf0)
  2330. continue;
  2331. /* Bypass if not same domain and area of adapter. */
  2332. if (area && domain &&
  2333. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2334. continue;
  2335. /* Bypass invalid local loop ID. */
  2336. if (loop_id > LAST_LOCAL_LOOP_ID)
  2337. continue;
  2338. /* Fill in member data. */
  2339. new_fcport->d_id.b.domain = domain;
  2340. new_fcport->d_id.b.area = area;
  2341. new_fcport->d_id.b.al_pa = al_pa;
  2342. new_fcport->loop_id = loop_id;
  2343. new_fcport->vp_idx = vha->vp_idx;
  2344. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2345. if (rval2 != QLA_SUCCESS) {
  2346. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2347. "information -- get_port_database=%x, "
  2348. "loop_id=0x%04x\n",
  2349. vha->host_no, rval2, new_fcport->loop_id));
  2350. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2351. vha->host_no));
  2352. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2353. continue;
  2354. }
  2355. /* Check for matching device in port list. */
  2356. found = 0;
  2357. fcport = NULL;
  2358. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2359. if (memcmp(new_fcport->port_name, fcport->port_name,
  2360. WWN_SIZE))
  2361. continue;
  2362. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2363. fcport->loop_id = new_fcport->loop_id;
  2364. fcport->port_type = new_fcport->port_type;
  2365. fcport->d_id.b24 = new_fcport->d_id.b24;
  2366. memcpy(fcport->node_name, new_fcport->node_name,
  2367. WWN_SIZE);
  2368. found++;
  2369. break;
  2370. }
  2371. if (!found) {
  2372. /* New device, add to fcports list. */
  2373. if (vha->vp_idx) {
  2374. new_fcport->vha = vha;
  2375. new_fcport->vp_idx = vha->vp_idx;
  2376. }
  2377. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2378. /* Allocate a new replacement fcport. */
  2379. fcport = new_fcport;
  2380. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2381. if (new_fcport == NULL) {
  2382. rval = QLA_MEMORY_ALLOC_FAILED;
  2383. goto cleanup_allocation;
  2384. }
  2385. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2386. }
  2387. /* Base iIDMA settings on HBA port speed. */
  2388. fcport->fp_speed = ha->link_data_rate;
  2389. qla2x00_update_fcport(vha, fcport);
  2390. found_devs++;
  2391. }
  2392. cleanup_allocation:
  2393. kfree(new_fcport);
  2394. if (rval != QLA_SUCCESS) {
  2395. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2396. "rval=%x\n", vha->host_no, rval));
  2397. }
  2398. return (rval);
  2399. }
  2400. static void
  2401. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2402. {
  2403. #define LS_UNKNOWN 2
  2404. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2405. char *link_speed;
  2406. int rval;
  2407. uint16_t mb[4];
  2408. struct qla_hw_data *ha = vha->hw;
  2409. if (!IS_IIDMA_CAPABLE(ha))
  2410. return;
  2411. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2412. fcport->fp_speed > ha->link_data_rate)
  2413. return;
  2414. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2415. mb);
  2416. if (rval != QLA_SUCCESS) {
  2417. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2418. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2419. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2420. fcport->port_name[2], fcport->port_name[3],
  2421. fcport->port_name[4], fcport->port_name[5],
  2422. fcport->port_name[6], fcport->port_name[7], rval,
  2423. fcport->fp_speed, mb[0], mb[1]));
  2424. } else {
  2425. link_speed = link_speeds[LS_UNKNOWN];
  2426. if (fcport->fp_speed < 5)
  2427. link_speed = link_speeds[fcport->fp_speed];
  2428. else if (fcport->fp_speed == 0x13)
  2429. link_speed = link_speeds[5];
  2430. DEBUG2(qla_printk(KERN_INFO, ha,
  2431. "iIDMA adjusted to %s GB/s on "
  2432. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2433. link_speed, fcport->port_name[0],
  2434. fcport->port_name[1], fcport->port_name[2],
  2435. fcport->port_name[3], fcport->port_name[4],
  2436. fcport->port_name[5], fcport->port_name[6],
  2437. fcport->port_name[7]));
  2438. }
  2439. }
  2440. static void
  2441. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2442. {
  2443. struct fc_rport_identifiers rport_ids;
  2444. struct fc_rport *rport;
  2445. struct qla_hw_data *ha = vha->hw;
  2446. qla2x00_rport_del(fcport);
  2447. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2448. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2449. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2450. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2451. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2452. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2453. if (!rport) {
  2454. qla_printk(KERN_WARNING, ha,
  2455. "Unable to allocate fc remote port!\n");
  2456. return;
  2457. }
  2458. spin_lock_irq(fcport->vha->host->host_lock);
  2459. *((fc_port_t **)rport->dd_data) = fcport;
  2460. spin_unlock_irq(fcport->vha->host->host_lock);
  2461. rport->supported_classes = fcport->supported_classes;
  2462. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2463. if (fcport->port_type == FCT_INITIATOR)
  2464. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2465. if (fcport->port_type == FCT_TARGET)
  2466. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2467. fc_remote_port_rolechg(rport, rport_ids.roles);
  2468. }
  2469. /*
  2470. * qla2x00_update_fcport
  2471. * Updates device on list.
  2472. *
  2473. * Input:
  2474. * ha = adapter block pointer.
  2475. * fcport = port structure pointer.
  2476. *
  2477. * Return:
  2478. * 0 - Success
  2479. * BIT_0 - error
  2480. *
  2481. * Context:
  2482. * Kernel context.
  2483. */
  2484. void
  2485. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2486. {
  2487. struct qla_hw_data *ha = vha->hw;
  2488. fcport->vha = vha;
  2489. fcport->login_retry = 0;
  2490. fcport->port_login_retry_count = ha->port_down_retry_count *
  2491. PORT_RETRY_TIME;
  2492. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2493. PORT_RETRY_TIME);
  2494. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2495. qla2x00_iidma_fcport(vha, fcport);
  2496. atomic_set(&fcport->state, FCS_ONLINE);
  2497. qla2x00_reg_remote_port(vha, fcport);
  2498. }
  2499. /*
  2500. * qla2x00_configure_fabric
  2501. * Setup SNS devices with loop ID's.
  2502. *
  2503. * Input:
  2504. * ha = adapter block pointer.
  2505. *
  2506. * Returns:
  2507. * 0 = success.
  2508. * BIT_0 = error
  2509. */
  2510. static int
  2511. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2512. {
  2513. int rval, rval2;
  2514. fc_port_t *fcport, *fcptemp;
  2515. uint16_t next_loopid;
  2516. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2517. uint16_t loop_id;
  2518. LIST_HEAD(new_fcports);
  2519. struct qla_hw_data *ha = vha->hw;
  2520. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2521. /* If FL port exists, then SNS is present */
  2522. if (IS_FWI2_CAPABLE(ha))
  2523. loop_id = NPH_F_PORT;
  2524. else
  2525. loop_id = SNS_FL_PORT;
  2526. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2527. if (rval != QLA_SUCCESS) {
  2528. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2529. "Port\n", vha->host_no));
  2530. vha->device_flags &= ~SWITCH_FOUND;
  2531. return (QLA_SUCCESS);
  2532. }
  2533. vha->device_flags |= SWITCH_FOUND;
  2534. /* Mark devices that need re-synchronization. */
  2535. rval2 = qla2x00_device_resync(vha);
  2536. if (rval2 == QLA_RSCNS_HANDLED) {
  2537. /* No point doing the scan, just continue. */
  2538. return (QLA_SUCCESS);
  2539. }
  2540. do {
  2541. /* FDMI support. */
  2542. if (ql2xfdmienable &&
  2543. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2544. qla2x00_fdmi_register(vha);
  2545. /* Ensure we are logged into the SNS. */
  2546. if (IS_FWI2_CAPABLE(ha))
  2547. loop_id = NPH_SNS;
  2548. else
  2549. loop_id = SIMPLE_NAME_SERVER;
  2550. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2551. 0xfc, mb, BIT_1 | BIT_0);
  2552. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2553. DEBUG2(qla_printk(KERN_INFO, ha,
  2554. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2555. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2556. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2557. return (QLA_SUCCESS);
  2558. }
  2559. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2560. if (qla2x00_rft_id(vha)) {
  2561. /* EMPTY */
  2562. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2563. "TYPE failed.\n", vha->host_no));
  2564. }
  2565. if (qla2x00_rff_id(vha)) {
  2566. /* EMPTY */
  2567. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2568. "Features failed.\n", vha->host_no));
  2569. }
  2570. if (qla2x00_rnn_id(vha)) {
  2571. /* EMPTY */
  2572. DEBUG2(printk("scsi(%ld): Register Node Name "
  2573. "failed.\n", vha->host_no));
  2574. } else if (qla2x00_rsnn_nn(vha)) {
  2575. /* EMPTY */
  2576. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2577. "Node Name failed.\n", vha->host_no));
  2578. }
  2579. }
  2580. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2581. if (rval != QLA_SUCCESS)
  2582. break;
  2583. /*
  2584. * Logout all previous fabric devices marked lost, except
  2585. * FCP2 devices.
  2586. */
  2587. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2588. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2589. break;
  2590. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2591. continue;
  2592. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2593. qla2x00_mark_device_lost(vha, fcport,
  2594. ql2xplogiabsentdevice, 0);
  2595. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2596. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2597. fcport->port_type != FCT_INITIATOR &&
  2598. fcport->port_type != FCT_BROADCAST) {
  2599. ha->isp_ops->fabric_logout(vha,
  2600. fcport->loop_id,
  2601. fcport->d_id.b.domain,
  2602. fcport->d_id.b.area,
  2603. fcport->d_id.b.al_pa);
  2604. fcport->loop_id = FC_NO_LOOP_ID;
  2605. }
  2606. }
  2607. }
  2608. /* Starting free loop ID. */
  2609. next_loopid = ha->min_external_loopid;
  2610. /*
  2611. * Scan through our port list and login entries that need to be
  2612. * logged in.
  2613. */
  2614. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2615. if (atomic_read(&vha->loop_down_timer) ||
  2616. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2617. break;
  2618. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2619. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2620. continue;
  2621. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2622. fcport->loop_id = next_loopid;
  2623. rval = qla2x00_find_new_loop_id(
  2624. base_vha, fcport);
  2625. if (rval != QLA_SUCCESS) {
  2626. /* Ran out of IDs to use */
  2627. break;
  2628. }
  2629. }
  2630. /* Login and update database */
  2631. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2632. }
  2633. /* Exit if out of loop IDs. */
  2634. if (rval != QLA_SUCCESS) {
  2635. break;
  2636. }
  2637. /*
  2638. * Login and add the new devices to our port list.
  2639. */
  2640. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2641. if (atomic_read(&vha->loop_down_timer) ||
  2642. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2643. break;
  2644. /* Find a new loop ID to use. */
  2645. fcport->loop_id = next_loopid;
  2646. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2647. if (rval != QLA_SUCCESS) {
  2648. /* Ran out of IDs to use */
  2649. break;
  2650. }
  2651. /* Login and update database */
  2652. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2653. if (vha->vp_idx) {
  2654. fcport->vha = vha;
  2655. fcport->vp_idx = vha->vp_idx;
  2656. }
  2657. list_move_tail(&fcport->list, &vha->vp_fcports);
  2658. }
  2659. } while (0);
  2660. /* Free all new device structures not processed. */
  2661. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2662. list_del(&fcport->list);
  2663. kfree(fcport);
  2664. }
  2665. if (rval) {
  2666. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2667. "rval=%d\n", vha->host_no, rval));
  2668. }
  2669. return (rval);
  2670. }
  2671. /*
  2672. * qla2x00_find_all_fabric_devs
  2673. *
  2674. * Input:
  2675. * ha = adapter block pointer.
  2676. * dev = database device entry pointer.
  2677. *
  2678. * Returns:
  2679. * 0 = success.
  2680. *
  2681. * Context:
  2682. * Kernel context.
  2683. */
  2684. static int
  2685. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2686. struct list_head *new_fcports)
  2687. {
  2688. int rval;
  2689. uint16_t loop_id;
  2690. fc_port_t *fcport, *new_fcport, *fcptemp;
  2691. int found;
  2692. sw_info_t *swl;
  2693. int swl_idx;
  2694. int first_dev, last_dev;
  2695. port_id_t wrap = {}, nxt_d_id;
  2696. struct qla_hw_data *ha = vha->hw;
  2697. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2698. struct scsi_qla_host *tvp;
  2699. rval = QLA_SUCCESS;
  2700. /* Try GID_PT to get device list, else GAN. */
  2701. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2702. if (!swl) {
  2703. /*EMPTY*/
  2704. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2705. "on GA_NXT\n", vha->host_no));
  2706. } else {
  2707. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2708. kfree(swl);
  2709. swl = NULL;
  2710. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2711. kfree(swl);
  2712. swl = NULL;
  2713. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2714. kfree(swl);
  2715. swl = NULL;
  2716. } else if (ql2xiidmaenable &&
  2717. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2718. qla2x00_gpsc(vha, swl);
  2719. }
  2720. }
  2721. swl_idx = 0;
  2722. /* Allocate temporary fcport for any new fcports discovered. */
  2723. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2724. if (new_fcport == NULL) {
  2725. kfree(swl);
  2726. return (QLA_MEMORY_ALLOC_FAILED);
  2727. }
  2728. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2729. /* Set start port ID scan at adapter ID. */
  2730. first_dev = 1;
  2731. last_dev = 0;
  2732. /* Starting free loop ID. */
  2733. loop_id = ha->min_external_loopid;
  2734. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2735. if (qla2x00_is_reserved_id(vha, loop_id))
  2736. continue;
  2737. if (atomic_read(&vha->loop_down_timer) ||
  2738. LOOP_TRANSITION(vha)) {
  2739. atomic_set(&vha->loop_down_timer, 0);
  2740. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2741. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2742. break;
  2743. }
  2744. if (swl != NULL) {
  2745. if (last_dev) {
  2746. wrap.b24 = new_fcport->d_id.b24;
  2747. } else {
  2748. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2749. memcpy(new_fcport->node_name,
  2750. swl[swl_idx].node_name, WWN_SIZE);
  2751. memcpy(new_fcport->port_name,
  2752. swl[swl_idx].port_name, WWN_SIZE);
  2753. memcpy(new_fcport->fabric_port_name,
  2754. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2755. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2756. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2757. last_dev = 1;
  2758. }
  2759. swl_idx++;
  2760. }
  2761. } else {
  2762. /* Send GA_NXT to the switch */
  2763. rval = qla2x00_ga_nxt(vha, new_fcport);
  2764. if (rval != QLA_SUCCESS) {
  2765. qla_printk(KERN_WARNING, ha,
  2766. "SNS scan failed -- assuming zero-entry "
  2767. "result...\n");
  2768. list_for_each_entry_safe(fcport, fcptemp,
  2769. new_fcports, list) {
  2770. list_del(&fcport->list);
  2771. kfree(fcport);
  2772. }
  2773. rval = QLA_SUCCESS;
  2774. break;
  2775. }
  2776. }
  2777. /* If wrap on switch device list, exit. */
  2778. if (first_dev) {
  2779. wrap.b24 = new_fcport->d_id.b24;
  2780. first_dev = 0;
  2781. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2782. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2783. vha->host_no, new_fcport->d_id.b.domain,
  2784. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2785. break;
  2786. }
  2787. /* Bypass if same physical adapter. */
  2788. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2789. continue;
  2790. /* Bypass virtual ports of the same host. */
  2791. found = 0;
  2792. if (ha->num_vhosts) {
  2793. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2794. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2795. found = 1;
  2796. break;
  2797. }
  2798. }
  2799. if (found)
  2800. continue;
  2801. }
  2802. /* Bypass if same domain and area of adapter. */
  2803. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2804. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2805. ISP_CFG_FL)
  2806. continue;
  2807. /* Bypass reserved domain fields. */
  2808. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2809. continue;
  2810. /* Locate matching device in database. */
  2811. found = 0;
  2812. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2813. if (memcmp(new_fcport->port_name, fcport->port_name,
  2814. WWN_SIZE))
  2815. continue;
  2816. found++;
  2817. /* Update port state. */
  2818. memcpy(fcport->fabric_port_name,
  2819. new_fcport->fabric_port_name, WWN_SIZE);
  2820. fcport->fp_speed = new_fcport->fp_speed;
  2821. /*
  2822. * If address the same and state FCS_ONLINE, nothing
  2823. * changed.
  2824. */
  2825. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2826. atomic_read(&fcport->state) == FCS_ONLINE) {
  2827. break;
  2828. }
  2829. /*
  2830. * If device was not a fabric device before.
  2831. */
  2832. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2833. fcport->d_id.b24 = new_fcport->d_id.b24;
  2834. fcport->loop_id = FC_NO_LOOP_ID;
  2835. fcport->flags |= (FCF_FABRIC_DEVICE |
  2836. FCF_LOGIN_NEEDED);
  2837. break;
  2838. }
  2839. /*
  2840. * Port ID changed or device was marked to be updated;
  2841. * Log it out if still logged in and mark it for
  2842. * relogin later.
  2843. */
  2844. fcport->d_id.b24 = new_fcport->d_id.b24;
  2845. fcport->flags |= FCF_LOGIN_NEEDED;
  2846. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2847. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2848. fcport->port_type != FCT_INITIATOR &&
  2849. fcport->port_type != FCT_BROADCAST) {
  2850. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2851. fcport->d_id.b.domain, fcport->d_id.b.area,
  2852. fcport->d_id.b.al_pa);
  2853. fcport->loop_id = FC_NO_LOOP_ID;
  2854. }
  2855. break;
  2856. }
  2857. if (found)
  2858. continue;
  2859. /* If device was not in our fcports list, then add it. */
  2860. list_add_tail(&new_fcport->list, new_fcports);
  2861. /* Allocate a new replacement fcport. */
  2862. nxt_d_id.b24 = new_fcport->d_id.b24;
  2863. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2864. if (new_fcport == NULL) {
  2865. kfree(swl);
  2866. return (QLA_MEMORY_ALLOC_FAILED);
  2867. }
  2868. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2869. new_fcport->d_id.b24 = nxt_d_id.b24;
  2870. }
  2871. kfree(swl);
  2872. kfree(new_fcport);
  2873. return (rval);
  2874. }
  2875. /*
  2876. * qla2x00_find_new_loop_id
  2877. * Scan through our port list and find a new usable loop ID.
  2878. *
  2879. * Input:
  2880. * ha: adapter state pointer.
  2881. * dev: port structure pointer.
  2882. *
  2883. * Returns:
  2884. * qla2x00 local function return status code.
  2885. *
  2886. * Context:
  2887. * Kernel context.
  2888. */
  2889. static int
  2890. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2891. {
  2892. int rval;
  2893. int found;
  2894. fc_port_t *fcport;
  2895. uint16_t first_loop_id;
  2896. struct qla_hw_data *ha = vha->hw;
  2897. struct scsi_qla_host *vp;
  2898. struct scsi_qla_host *tvp;
  2899. rval = QLA_SUCCESS;
  2900. /* Save starting loop ID. */
  2901. first_loop_id = dev->loop_id;
  2902. for (;;) {
  2903. /* Skip loop ID if already used by adapter. */
  2904. if (dev->loop_id == vha->loop_id)
  2905. dev->loop_id++;
  2906. /* Skip reserved loop IDs. */
  2907. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2908. dev->loop_id++;
  2909. /* Reset loop ID if passed the end. */
  2910. if (dev->loop_id > ha->max_loop_id) {
  2911. /* first loop ID. */
  2912. dev->loop_id = ha->min_external_loopid;
  2913. }
  2914. /* Check for loop ID being already in use. */
  2915. found = 0;
  2916. fcport = NULL;
  2917. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2918. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2919. if (fcport->loop_id == dev->loop_id &&
  2920. fcport != dev) {
  2921. /* ID possibly in use */
  2922. found++;
  2923. break;
  2924. }
  2925. }
  2926. if (found)
  2927. break;
  2928. }
  2929. /* If not in use then it is free to use. */
  2930. if (!found) {
  2931. break;
  2932. }
  2933. /* ID in use. Try next value. */
  2934. dev->loop_id++;
  2935. /* If wrap around. No free ID to use. */
  2936. if (dev->loop_id == first_loop_id) {
  2937. dev->loop_id = FC_NO_LOOP_ID;
  2938. rval = QLA_FUNCTION_FAILED;
  2939. break;
  2940. }
  2941. }
  2942. return (rval);
  2943. }
  2944. /*
  2945. * qla2x00_device_resync
  2946. * Marks devices in the database that needs resynchronization.
  2947. *
  2948. * Input:
  2949. * ha = adapter block pointer.
  2950. *
  2951. * Context:
  2952. * Kernel context.
  2953. */
  2954. static int
  2955. qla2x00_device_resync(scsi_qla_host_t *vha)
  2956. {
  2957. int rval;
  2958. uint32_t mask;
  2959. fc_port_t *fcport;
  2960. uint32_t rscn_entry;
  2961. uint8_t rscn_out_iter;
  2962. uint8_t format;
  2963. port_id_t d_id = {};
  2964. rval = QLA_RSCNS_HANDLED;
  2965. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2966. vha->flags.rscn_queue_overflow) {
  2967. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2968. format = MSB(MSW(rscn_entry));
  2969. d_id.b.domain = LSB(MSW(rscn_entry));
  2970. d_id.b.area = MSB(LSW(rscn_entry));
  2971. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2972. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2973. "[%02x/%02x%02x%02x].\n",
  2974. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2975. d_id.b.area, d_id.b.al_pa));
  2976. vha->rscn_out_ptr++;
  2977. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2978. vha->rscn_out_ptr = 0;
  2979. /* Skip duplicate entries. */
  2980. for (rscn_out_iter = vha->rscn_out_ptr;
  2981. !vha->flags.rscn_queue_overflow &&
  2982. rscn_out_iter != vha->rscn_in_ptr;
  2983. rscn_out_iter = (rscn_out_iter ==
  2984. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2985. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2986. break;
  2987. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2988. "entry found at [%d].\n", vha->host_no,
  2989. rscn_out_iter));
  2990. vha->rscn_out_ptr = rscn_out_iter;
  2991. }
  2992. /* Queue overflow, set switch default case. */
  2993. if (vha->flags.rscn_queue_overflow) {
  2994. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2995. "overflow.\n", vha->host_no));
  2996. format = 3;
  2997. vha->flags.rscn_queue_overflow = 0;
  2998. }
  2999. switch (format) {
  3000. case 0:
  3001. mask = 0xffffff;
  3002. break;
  3003. case 1:
  3004. mask = 0xffff00;
  3005. break;
  3006. case 2:
  3007. mask = 0xff0000;
  3008. break;
  3009. default:
  3010. mask = 0x0;
  3011. d_id.b24 = 0;
  3012. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3013. break;
  3014. }
  3015. rval = QLA_SUCCESS;
  3016. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3017. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3018. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3019. fcport->port_type == FCT_BROADCAST)
  3020. continue;
  3021. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3022. if (format != 3 ||
  3023. fcport->port_type != FCT_INITIATOR) {
  3024. qla2x00_mark_device_lost(vha, fcport,
  3025. 0, 0);
  3026. }
  3027. }
  3028. }
  3029. }
  3030. return (rval);
  3031. }
  3032. /*
  3033. * qla2x00_fabric_dev_login
  3034. * Login fabric target device and update FC port database.
  3035. *
  3036. * Input:
  3037. * ha: adapter state pointer.
  3038. * fcport: port structure list pointer.
  3039. * next_loopid: contains value of a new loop ID that can be used
  3040. * by the next login attempt.
  3041. *
  3042. * Returns:
  3043. * qla2x00 local function return status code.
  3044. *
  3045. * Context:
  3046. * Kernel context.
  3047. */
  3048. static int
  3049. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3050. uint16_t *next_loopid)
  3051. {
  3052. int rval;
  3053. int retry;
  3054. uint8_t opts;
  3055. struct qla_hw_data *ha = vha->hw;
  3056. rval = QLA_SUCCESS;
  3057. retry = 0;
  3058. if (IS_ALOGIO_CAPABLE(ha)) {
  3059. if (fcport->flags & FCF_ASYNC_SENT)
  3060. return rval;
  3061. fcport->flags |= FCF_ASYNC_SENT;
  3062. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3063. if (!rval)
  3064. return rval;
  3065. }
  3066. fcport->flags &= ~FCF_ASYNC_SENT;
  3067. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3068. if (rval == QLA_SUCCESS) {
  3069. /* Send an ADISC to FCP2 devices.*/
  3070. opts = 0;
  3071. if (fcport->flags & FCF_FCP2_DEVICE)
  3072. opts |= BIT_1;
  3073. rval = qla2x00_get_port_database(vha, fcport, opts);
  3074. if (rval != QLA_SUCCESS) {
  3075. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3076. fcport->d_id.b.domain, fcport->d_id.b.area,
  3077. fcport->d_id.b.al_pa);
  3078. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3079. } else {
  3080. qla2x00_update_fcport(vha, fcport);
  3081. }
  3082. }
  3083. return (rval);
  3084. }
  3085. /*
  3086. * qla2x00_fabric_login
  3087. * Issue fabric login command.
  3088. *
  3089. * Input:
  3090. * ha = adapter block pointer.
  3091. * device = pointer to FC device type structure.
  3092. *
  3093. * Returns:
  3094. * 0 - Login successfully
  3095. * 1 - Login failed
  3096. * 2 - Initiator device
  3097. * 3 - Fatal error
  3098. */
  3099. int
  3100. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3101. uint16_t *next_loopid)
  3102. {
  3103. int rval;
  3104. int retry;
  3105. uint16_t tmp_loopid;
  3106. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3107. struct qla_hw_data *ha = vha->hw;
  3108. retry = 0;
  3109. tmp_loopid = 0;
  3110. for (;;) {
  3111. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3112. "for port %02x%02x%02x.\n",
  3113. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3114. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3115. /* Login fcport on switch. */
  3116. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3117. fcport->d_id.b.domain, fcport->d_id.b.area,
  3118. fcport->d_id.b.al_pa, mb, BIT_0);
  3119. if (mb[0] == MBS_PORT_ID_USED) {
  3120. /*
  3121. * Device has another loop ID. The firmware team
  3122. * recommends the driver perform an implicit login with
  3123. * the specified ID again. The ID we just used is save
  3124. * here so we return with an ID that can be tried by
  3125. * the next login.
  3126. */
  3127. retry++;
  3128. tmp_loopid = fcport->loop_id;
  3129. fcport->loop_id = mb[1];
  3130. DEBUG(printk("Fabric Login: port in use - next "
  3131. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3132. fcport->loop_id, fcport->d_id.b.domain,
  3133. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3134. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3135. /*
  3136. * Login succeeded.
  3137. */
  3138. if (retry) {
  3139. /* A retry occurred before. */
  3140. *next_loopid = tmp_loopid;
  3141. } else {
  3142. /*
  3143. * No retry occurred before. Just increment the
  3144. * ID value for next login.
  3145. */
  3146. *next_loopid = (fcport->loop_id + 1);
  3147. }
  3148. if (mb[1] & BIT_0) {
  3149. fcport->port_type = FCT_INITIATOR;
  3150. } else {
  3151. fcport->port_type = FCT_TARGET;
  3152. if (mb[1] & BIT_1) {
  3153. fcport->flags |= FCF_FCP2_DEVICE;
  3154. }
  3155. }
  3156. if (mb[10] & BIT_0)
  3157. fcport->supported_classes |= FC_COS_CLASS2;
  3158. if (mb[10] & BIT_1)
  3159. fcport->supported_classes |= FC_COS_CLASS3;
  3160. rval = QLA_SUCCESS;
  3161. break;
  3162. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3163. /*
  3164. * Loop ID already used, try next loop ID.
  3165. */
  3166. fcport->loop_id++;
  3167. rval = qla2x00_find_new_loop_id(vha, fcport);
  3168. if (rval != QLA_SUCCESS) {
  3169. /* Ran out of loop IDs to use */
  3170. break;
  3171. }
  3172. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3173. /*
  3174. * Firmware possibly timed out during login. If NO
  3175. * retries are left to do then the device is declared
  3176. * dead.
  3177. */
  3178. *next_loopid = fcport->loop_id;
  3179. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3180. fcport->d_id.b.domain, fcport->d_id.b.area,
  3181. fcport->d_id.b.al_pa);
  3182. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3183. rval = 1;
  3184. break;
  3185. } else {
  3186. /*
  3187. * unrecoverable / not handled error
  3188. */
  3189. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3190. "loop_id=%x jiffies=%lx.\n",
  3191. __func__, vha->host_no, mb[0],
  3192. fcport->d_id.b.domain, fcport->d_id.b.area,
  3193. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3194. *next_loopid = fcport->loop_id;
  3195. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3196. fcport->d_id.b.domain, fcport->d_id.b.area,
  3197. fcport->d_id.b.al_pa);
  3198. fcport->loop_id = FC_NO_LOOP_ID;
  3199. fcport->login_retry = 0;
  3200. rval = 3;
  3201. break;
  3202. }
  3203. }
  3204. return (rval);
  3205. }
  3206. /*
  3207. * qla2x00_local_device_login
  3208. * Issue local device login command.
  3209. *
  3210. * Input:
  3211. * ha = adapter block pointer.
  3212. * loop_id = loop id of device to login to.
  3213. *
  3214. * Returns (Where's the #define!!!!):
  3215. * 0 - Login successfully
  3216. * 1 - Login failed
  3217. * 3 - Fatal error
  3218. */
  3219. int
  3220. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3221. {
  3222. int rval;
  3223. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3224. memset(mb, 0, sizeof(mb));
  3225. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3226. if (rval == QLA_SUCCESS) {
  3227. /* Interrogate mailbox registers for any errors */
  3228. if (mb[0] == MBS_COMMAND_ERROR)
  3229. rval = 1;
  3230. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3231. /* device not in PCB table */
  3232. rval = 3;
  3233. }
  3234. return (rval);
  3235. }
  3236. /*
  3237. * qla2x00_loop_resync
  3238. * Resync with fibre channel devices.
  3239. *
  3240. * Input:
  3241. * ha = adapter block pointer.
  3242. *
  3243. * Returns:
  3244. * 0 = success
  3245. */
  3246. int
  3247. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3248. {
  3249. int rval = QLA_SUCCESS;
  3250. uint32_t wait_time;
  3251. struct req_que *req;
  3252. struct rsp_que *rsp;
  3253. if (vha->hw->flags.cpu_affinity_enabled)
  3254. req = vha->hw->req_q_map[0];
  3255. else
  3256. req = vha->req;
  3257. rsp = req->rsp;
  3258. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3259. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3260. if (vha->flags.online) {
  3261. if (!(rval = qla2x00_fw_ready(vha))) {
  3262. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3263. wait_time = 256;
  3264. do {
  3265. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3266. /* Issue a marker after FW becomes ready. */
  3267. qla2x00_marker(vha, req, rsp, 0, 0,
  3268. MK_SYNC_ALL);
  3269. vha->marker_needed = 0;
  3270. /* Remap devices on Loop. */
  3271. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3272. qla2x00_configure_loop(vha);
  3273. wait_time--;
  3274. } while (!atomic_read(&vha->loop_down_timer) &&
  3275. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3276. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3277. &vha->dpc_flags)));
  3278. }
  3279. }
  3280. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3281. return (QLA_FUNCTION_FAILED);
  3282. if (rval)
  3283. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3284. return (rval);
  3285. }
  3286. void
  3287. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3288. {
  3289. fc_port_t *fcport;
  3290. struct scsi_qla_host *tvp, *vha;
  3291. /* Go with deferred removal of rport references. */
  3292. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3293. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3294. if (fcport && fcport->drport &&
  3295. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3296. qla2x00_rport_del(fcport);
  3297. }
  3298. void
  3299. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3300. {
  3301. struct qla_hw_data *ha = vha->hw;
  3302. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3303. struct scsi_qla_host *tvp;
  3304. vha->flags.online = 0;
  3305. ha->flags.chip_reset_done = 0;
  3306. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3307. ha->qla_stats.total_isp_aborts++;
  3308. qla_printk(KERN_INFO, ha,
  3309. "Performing ISP error recovery - ha= %p.\n", ha);
  3310. /* Chip reset does not apply to 82XX */
  3311. if (!IS_QLA82XX(ha))
  3312. ha->isp_ops->reset_chip(vha);
  3313. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3314. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3315. atomic_set(&vha->loop_state, LOOP_DOWN);
  3316. qla2x00_mark_all_devices_lost(vha, 0);
  3317. list_for_each_entry_safe(vp, tvp, &base_vha->hw->vp_list, list)
  3318. qla2x00_mark_all_devices_lost(vp, 0);
  3319. } else {
  3320. if (!atomic_read(&vha->loop_down_timer))
  3321. atomic_set(&vha->loop_down_timer,
  3322. LOOP_DOWN_TIME);
  3323. }
  3324. /* Make sure for ISP 82XX IO DMA is complete */
  3325. if (IS_QLA82XX(ha))
  3326. qla82xx_wait_for_pending_commands(vha);
  3327. /* Requeue all commands in outstanding command list. */
  3328. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3329. }
  3330. /*
  3331. * qla2x00_abort_isp
  3332. * Resets ISP and aborts all outstanding commands.
  3333. *
  3334. * Input:
  3335. * ha = adapter block pointer.
  3336. *
  3337. * Returns:
  3338. * 0 = success
  3339. */
  3340. int
  3341. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3342. {
  3343. int rval;
  3344. uint8_t status = 0;
  3345. struct qla_hw_data *ha = vha->hw;
  3346. struct scsi_qla_host *vp;
  3347. struct scsi_qla_host *tvp;
  3348. struct req_que *req = ha->req_q_map[0];
  3349. if (vha->flags.online) {
  3350. qla2x00_abort_isp_cleanup(vha);
  3351. if (unlikely(pci_channel_offline(ha->pdev) &&
  3352. ha->flags.pci_channel_io_perm_failure)) {
  3353. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3354. status = 0;
  3355. return status;
  3356. }
  3357. ha->isp_ops->get_flash_version(vha, req->ring);
  3358. ha->isp_ops->nvram_config(vha);
  3359. if (!qla2x00_restart_isp(vha)) {
  3360. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3361. if (!atomic_read(&vha->loop_down_timer)) {
  3362. /*
  3363. * Issue marker command only when we are going
  3364. * to start the I/O .
  3365. */
  3366. vha->marker_needed = 1;
  3367. }
  3368. vha->flags.online = 1;
  3369. ha->isp_ops->enable_intrs(ha);
  3370. ha->isp_abort_cnt = 0;
  3371. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3372. if (IS_QLA81XX(ha))
  3373. qla2x00_get_fw_version(vha,
  3374. &ha->fw_major_version,
  3375. &ha->fw_minor_version,
  3376. &ha->fw_subminor_version,
  3377. &ha->fw_attributes, &ha->fw_memory_size,
  3378. ha->mpi_version, &ha->mpi_capabilities,
  3379. ha->phy_version);
  3380. if (ha->fce) {
  3381. ha->flags.fce_enabled = 1;
  3382. memset(ha->fce, 0,
  3383. fce_calc_size(ha->fce_bufs));
  3384. rval = qla2x00_enable_fce_trace(vha,
  3385. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3386. &ha->fce_bufs);
  3387. if (rval) {
  3388. qla_printk(KERN_WARNING, ha,
  3389. "Unable to reinitialize FCE "
  3390. "(%d).\n", rval);
  3391. ha->flags.fce_enabled = 0;
  3392. }
  3393. }
  3394. if (ha->eft) {
  3395. memset(ha->eft, 0, EFT_SIZE);
  3396. rval = qla2x00_enable_eft_trace(vha,
  3397. ha->eft_dma, EFT_NUM_BUFFERS);
  3398. if (rval) {
  3399. qla_printk(KERN_WARNING, ha,
  3400. "Unable to reinitialize EFT "
  3401. "(%d).\n", rval);
  3402. }
  3403. }
  3404. } else { /* failed the ISP abort */
  3405. vha->flags.online = 1;
  3406. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3407. if (ha->isp_abort_cnt == 0) {
  3408. qla_printk(KERN_WARNING, ha,
  3409. "ISP error recovery failed - "
  3410. "board disabled\n");
  3411. /*
  3412. * The next call disables the board
  3413. * completely.
  3414. */
  3415. ha->isp_ops->reset_adapter(vha);
  3416. vha->flags.online = 0;
  3417. clear_bit(ISP_ABORT_RETRY,
  3418. &vha->dpc_flags);
  3419. status = 0;
  3420. } else { /* schedule another ISP abort */
  3421. ha->isp_abort_cnt--;
  3422. DEBUG(printk("qla%ld: ISP abort - "
  3423. "retry remaining %d\n",
  3424. vha->host_no, ha->isp_abort_cnt));
  3425. status = 1;
  3426. }
  3427. } else {
  3428. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3429. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3430. "- retrying (%d) more times\n",
  3431. vha->host_no, ha->isp_abort_cnt));
  3432. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3433. status = 1;
  3434. }
  3435. }
  3436. }
  3437. if (!status) {
  3438. DEBUG(printk(KERN_INFO
  3439. "qla2x00_abort_isp(%ld): succeeded.\n",
  3440. vha->host_no));
  3441. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3442. if (vp->vp_idx)
  3443. qla2x00_vp_abort_isp(vp);
  3444. }
  3445. } else {
  3446. qla_printk(KERN_INFO, ha,
  3447. "qla2x00_abort_isp: **** FAILED ****\n");
  3448. }
  3449. return(status);
  3450. }
  3451. /*
  3452. * qla2x00_restart_isp
  3453. * restarts the ISP after a reset
  3454. *
  3455. * Input:
  3456. * ha = adapter block pointer.
  3457. *
  3458. * Returns:
  3459. * 0 = success
  3460. */
  3461. static int
  3462. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3463. {
  3464. int status = 0;
  3465. uint32_t wait_time;
  3466. struct qla_hw_data *ha = vha->hw;
  3467. struct req_que *req = ha->req_q_map[0];
  3468. struct rsp_que *rsp = ha->rsp_q_map[0];
  3469. /* If firmware needs to be loaded */
  3470. if (qla2x00_isp_firmware(vha)) {
  3471. vha->flags.online = 0;
  3472. status = ha->isp_ops->chip_diag(vha);
  3473. if (!status)
  3474. status = qla2x00_setup_chip(vha);
  3475. }
  3476. if (!status && !(status = qla2x00_init_rings(vha))) {
  3477. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3478. ha->flags.chip_reset_done = 1;
  3479. /* Initialize the queues in use */
  3480. qla25xx_init_queues(ha);
  3481. status = qla2x00_fw_ready(vha);
  3482. if (!status) {
  3483. DEBUG(printk("%s(): Start configure loop, "
  3484. "status = %d\n", __func__, status));
  3485. /* Issue a marker after FW becomes ready. */
  3486. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3487. vha->flags.online = 1;
  3488. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3489. wait_time = 256;
  3490. do {
  3491. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3492. qla2x00_configure_loop(vha);
  3493. wait_time--;
  3494. } while (!atomic_read(&vha->loop_down_timer) &&
  3495. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3496. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3497. &vha->dpc_flags)));
  3498. }
  3499. /* if no cable then assume it's good */
  3500. if ((vha->device_flags & DFLG_NO_CABLE))
  3501. status = 0;
  3502. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3503. __func__,
  3504. status));
  3505. }
  3506. return (status);
  3507. }
  3508. static int
  3509. qla25xx_init_queues(struct qla_hw_data *ha)
  3510. {
  3511. struct rsp_que *rsp = NULL;
  3512. struct req_que *req = NULL;
  3513. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3514. int ret = -1;
  3515. int i;
  3516. for (i = 1; i < ha->max_rsp_queues; i++) {
  3517. rsp = ha->rsp_q_map[i];
  3518. if (rsp) {
  3519. rsp->options &= ~BIT_0;
  3520. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3521. if (ret != QLA_SUCCESS)
  3522. DEBUG2_17(printk(KERN_WARNING
  3523. "%s Rsp que:%d init failed\n", __func__,
  3524. rsp->id));
  3525. else
  3526. DEBUG2_17(printk(KERN_INFO
  3527. "%s Rsp que:%d inited\n", __func__,
  3528. rsp->id));
  3529. }
  3530. }
  3531. for (i = 1; i < ha->max_req_queues; i++) {
  3532. req = ha->req_q_map[i];
  3533. if (req) {
  3534. /* Clear outstanding commands array. */
  3535. req->options &= ~BIT_0;
  3536. ret = qla25xx_init_req_que(base_vha, req);
  3537. if (ret != QLA_SUCCESS)
  3538. DEBUG2_17(printk(KERN_WARNING
  3539. "%s Req que:%d init failed\n", __func__,
  3540. req->id));
  3541. else
  3542. DEBUG2_17(printk(KERN_WARNING
  3543. "%s Req que:%d inited\n", __func__,
  3544. req->id));
  3545. }
  3546. }
  3547. return ret;
  3548. }
  3549. /*
  3550. * qla2x00_reset_adapter
  3551. * Reset adapter.
  3552. *
  3553. * Input:
  3554. * ha = adapter block pointer.
  3555. */
  3556. void
  3557. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3558. {
  3559. unsigned long flags = 0;
  3560. struct qla_hw_data *ha = vha->hw;
  3561. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3562. vha->flags.online = 0;
  3563. ha->isp_ops->disable_intrs(ha);
  3564. spin_lock_irqsave(&ha->hardware_lock, flags);
  3565. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3566. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3567. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3568. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3569. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3570. }
  3571. void
  3572. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3573. {
  3574. unsigned long flags = 0;
  3575. struct qla_hw_data *ha = vha->hw;
  3576. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3577. if (IS_QLA82XX(ha))
  3578. return;
  3579. vha->flags.online = 0;
  3580. ha->isp_ops->disable_intrs(ha);
  3581. spin_lock_irqsave(&ha->hardware_lock, flags);
  3582. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3583. RD_REG_DWORD(&reg->hccr);
  3584. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3585. RD_REG_DWORD(&reg->hccr);
  3586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3587. if (IS_NOPOLLING_TYPE(ha))
  3588. ha->isp_ops->enable_intrs(ha);
  3589. }
  3590. /* On sparc systems, obtain port and node WWN from firmware
  3591. * properties.
  3592. */
  3593. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3594. struct nvram_24xx *nv)
  3595. {
  3596. #ifdef CONFIG_SPARC
  3597. struct qla_hw_data *ha = vha->hw;
  3598. struct pci_dev *pdev = ha->pdev;
  3599. struct device_node *dp = pci_device_to_OF_node(pdev);
  3600. const u8 *val;
  3601. int len;
  3602. val = of_get_property(dp, "port-wwn", &len);
  3603. if (val && len >= WWN_SIZE)
  3604. memcpy(nv->port_name, val, WWN_SIZE);
  3605. val = of_get_property(dp, "node-wwn", &len);
  3606. if (val && len >= WWN_SIZE)
  3607. memcpy(nv->node_name, val, WWN_SIZE);
  3608. #endif
  3609. }
  3610. int
  3611. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3612. {
  3613. int rval;
  3614. struct init_cb_24xx *icb;
  3615. struct nvram_24xx *nv;
  3616. uint32_t *dptr;
  3617. uint8_t *dptr1, *dptr2;
  3618. uint32_t chksum;
  3619. uint16_t cnt;
  3620. struct qla_hw_data *ha = vha->hw;
  3621. rval = QLA_SUCCESS;
  3622. icb = (struct init_cb_24xx *)ha->init_cb;
  3623. nv = ha->nvram;
  3624. /* Determine NVRAM starting address. */
  3625. if (ha->flags.port0) {
  3626. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3627. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3628. } else {
  3629. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3630. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3631. }
  3632. ha->nvram_size = sizeof(struct nvram_24xx);
  3633. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3634. if (IS_QLA82XX(ha))
  3635. ha->vpd_size = FA_VPD_SIZE_82XX;
  3636. /* Get VPD data into cache */
  3637. ha->vpd = ha->nvram + VPD_OFFSET;
  3638. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3639. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3640. /* Get NVRAM data into cache and calculate checksum. */
  3641. dptr = (uint32_t *)nv;
  3642. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3643. ha->nvram_size);
  3644. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3645. chksum += le32_to_cpu(*dptr++);
  3646. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3647. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3648. /* Bad NVRAM data, set defaults parameters. */
  3649. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3650. || nv->id[3] != ' ' ||
  3651. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3652. /* Reset NVRAM data. */
  3653. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3654. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3655. le16_to_cpu(nv->nvram_version));
  3656. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3657. "invalid -- WWPN) defaults.\n");
  3658. /*
  3659. * Set default initialization control block.
  3660. */
  3661. memset(nv, 0, ha->nvram_size);
  3662. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3663. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3664. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3665. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3666. nv->exchange_count = __constant_cpu_to_le16(0);
  3667. nv->hard_address = __constant_cpu_to_le16(124);
  3668. nv->port_name[0] = 0x21;
  3669. nv->port_name[1] = 0x00 + ha->port_no;
  3670. nv->port_name[2] = 0x00;
  3671. nv->port_name[3] = 0xe0;
  3672. nv->port_name[4] = 0x8b;
  3673. nv->port_name[5] = 0x1c;
  3674. nv->port_name[6] = 0x55;
  3675. nv->port_name[7] = 0x86;
  3676. nv->node_name[0] = 0x20;
  3677. nv->node_name[1] = 0x00;
  3678. nv->node_name[2] = 0x00;
  3679. nv->node_name[3] = 0xe0;
  3680. nv->node_name[4] = 0x8b;
  3681. nv->node_name[5] = 0x1c;
  3682. nv->node_name[6] = 0x55;
  3683. nv->node_name[7] = 0x86;
  3684. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3685. nv->login_retry_count = __constant_cpu_to_le16(8);
  3686. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3687. nv->login_timeout = __constant_cpu_to_le16(0);
  3688. nv->firmware_options_1 =
  3689. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3690. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3691. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3692. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3693. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3694. nv->efi_parameters = __constant_cpu_to_le32(0);
  3695. nv->reset_delay = 5;
  3696. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3697. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3698. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3699. rval = 1;
  3700. }
  3701. /* Reset Initialization control block */
  3702. memset(icb, 0, ha->init_cb_size);
  3703. /* Copy 1st segment. */
  3704. dptr1 = (uint8_t *)icb;
  3705. dptr2 = (uint8_t *)&nv->version;
  3706. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3707. while (cnt--)
  3708. *dptr1++ = *dptr2++;
  3709. icb->login_retry_count = nv->login_retry_count;
  3710. icb->link_down_on_nos = nv->link_down_on_nos;
  3711. /* Copy 2nd segment. */
  3712. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3713. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3714. cnt = (uint8_t *)&icb->reserved_3 -
  3715. (uint8_t *)&icb->interrupt_delay_timer;
  3716. while (cnt--)
  3717. *dptr1++ = *dptr2++;
  3718. /*
  3719. * Setup driver NVRAM options.
  3720. */
  3721. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3722. "QLA2462");
  3723. /* Use alternate WWN? */
  3724. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3725. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3726. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3727. }
  3728. /* Prepare nodename */
  3729. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3730. /*
  3731. * Firmware will apply the following mask if the nodename was
  3732. * not provided.
  3733. */
  3734. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3735. icb->node_name[0] &= 0xF0;
  3736. }
  3737. /* Set host adapter parameters. */
  3738. ha->flags.disable_risc_code_load = 0;
  3739. ha->flags.enable_lip_reset = 0;
  3740. ha->flags.enable_lip_full_login =
  3741. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3742. ha->flags.enable_target_reset =
  3743. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3744. ha->flags.enable_led_scheme = 0;
  3745. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3746. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3747. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3748. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3749. sizeof(ha->fw_seriallink_options24));
  3750. /* save HBA serial number */
  3751. ha->serial0 = icb->port_name[5];
  3752. ha->serial1 = icb->port_name[6];
  3753. ha->serial2 = icb->port_name[7];
  3754. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3755. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3756. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3757. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3758. /* Set minimum login_timeout to 4 seconds. */
  3759. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3760. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3761. if (le16_to_cpu(nv->login_timeout) < 4)
  3762. nv->login_timeout = __constant_cpu_to_le16(4);
  3763. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3764. icb->login_timeout = nv->login_timeout;
  3765. /* Set minimum RATOV to 100 tenths of a second. */
  3766. ha->r_a_tov = 100;
  3767. ha->loop_reset_delay = nv->reset_delay;
  3768. /* Link Down Timeout = 0:
  3769. *
  3770. * When Port Down timer expires we will start returning
  3771. * I/O's to OS with "DID_NO_CONNECT".
  3772. *
  3773. * Link Down Timeout != 0:
  3774. *
  3775. * The driver waits for the link to come up after link down
  3776. * before returning I/Os to OS with "DID_NO_CONNECT".
  3777. */
  3778. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3779. ha->loop_down_abort_time =
  3780. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3781. } else {
  3782. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3783. ha->loop_down_abort_time =
  3784. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3785. }
  3786. /* Need enough time to try and get the port back. */
  3787. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3788. if (qlport_down_retry)
  3789. ha->port_down_retry_count = qlport_down_retry;
  3790. /* Set login_retry_count */
  3791. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3792. if (ha->port_down_retry_count ==
  3793. le16_to_cpu(nv->port_down_retry_count) &&
  3794. ha->port_down_retry_count > 3)
  3795. ha->login_retry_count = ha->port_down_retry_count;
  3796. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3797. ha->login_retry_count = ha->port_down_retry_count;
  3798. if (ql2xloginretrycount)
  3799. ha->login_retry_count = ql2xloginretrycount;
  3800. /* Enable ZIO. */
  3801. if (!vha->flags.init_done) {
  3802. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3803. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3804. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3805. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3806. }
  3807. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3808. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3809. vha->flags.process_response_queue = 0;
  3810. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3811. ha->zio_mode = QLA_ZIO_MODE_6;
  3812. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3813. "(%d us).\n", vha->host_no, ha->zio_mode,
  3814. ha->zio_timer * 100));
  3815. qla_printk(KERN_INFO, ha,
  3816. "ZIO mode %d enabled; timer delay (%d us).\n",
  3817. ha->zio_mode, ha->zio_timer * 100);
  3818. icb->firmware_options_2 |= cpu_to_le32(
  3819. (uint32_t)ha->zio_mode);
  3820. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3821. vha->flags.process_response_queue = 1;
  3822. }
  3823. if (rval) {
  3824. DEBUG2_3(printk(KERN_WARNING
  3825. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3826. }
  3827. return (rval);
  3828. }
  3829. static int
  3830. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3831. uint32_t faddr)
  3832. {
  3833. int rval = QLA_SUCCESS;
  3834. int segments, fragment;
  3835. uint32_t *dcode, dlen;
  3836. uint32_t risc_addr;
  3837. uint32_t risc_size;
  3838. uint32_t i;
  3839. struct qla_hw_data *ha = vha->hw;
  3840. struct req_que *req = ha->req_q_map[0];
  3841. qla_printk(KERN_INFO, ha,
  3842. "FW: Loading from flash (%x)...\n", faddr);
  3843. rval = QLA_SUCCESS;
  3844. segments = FA_RISC_CODE_SEGMENTS;
  3845. dcode = (uint32_t *)req->ring;
  3846. *srisc_addr = 0;
  3847. /* Validate firmware image by checking version. */
  3848. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3849. for (i = 0; i < 4; i++)
  3850. dcode[i] = be32_to_cpu(dcode[i]);
  3851. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3852. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3853. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3854. dcode[3] == 0)) {
  3855. qla_printk(KERN_WARNING, ha,
  3856. "Unable to verify integrity of flash firmware image!\n");
  3857. qla_printk(KERN_WARNING, ha,
  3858. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3859. dcode[1], dcode[2], dcode[3]);
  3860. return QLA_FUNCTION_FAILED;
  3861. }
  3862. while (segments && rval == QLA_SUCCESS) {
  3863. /* Read segment's load information. */
  3864. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3865. risc_addr = be32_to_cpu(dcode[2]);
  3866. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3867. risc_size = be32_to_cpu(dcode[3]);
  3868. fragment = 0;
  3869. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3870. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3871. if (dlen > risc_size)
  3872. dlen = risc_size;
  3873. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3874. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3875. vha->host_no, risc_addr, dlen, faddr));
  3876. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3877. for (i = 0; i < dlen; i++)
  3878. dcode[i] = swab32(dcode[i]);
  3879. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3880. dlen);
  3881. if (rval) {
  3882. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3883. "segment %d of firmware\n", vha->host_no,
  3884. fragment));
  3885. qla_printk(KERN_WARNING, ha,
  3886. "[ERROR] Failed to load segment %d of "
  3887. "firmware\n", fragment);
  3888. break;
  3889. }
  3890. faddr += dlen;
  3891. risc_addr += dlen;
  3892. risc_size -= dlen;
  3893. fragment++;
  3894. }
  3895. /* Next segment. */
  3896. segments--;
  3897. }
  3898. return rval;
  3899. }
  3900. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3901. int
  3902. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3903. {
  3904. int rval;
  3905. int i, fragment;
  3906. uint16_t *wcode, *fwcode;
  3907. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3908. struct fw_blob *blob;
  3909. struct qla_hw_data *ha = vha->hw;
  3910. struct req_que *req = ha->req_q_map[0];
  3911. /* Load firmware blob. */
  3912. blob = qla2x00_request_firmware(vha);
  3913. if (!blob) {
  3914. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3915. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3916. "from: " QLA_FW_URL ".\n");
  3917. return QLA_FUNCTION_FAILED;
  3918. }
  3919. rval = QLA_SUCCESS;
  3920. wcode = (uint16_t *)req->ring;
  3921. *srisc_addr = 0;
  3922. fwcode = (uint16_t *)blob->fw->data;
  3923. fwclen = 0;
  3924. /* Validate firmware image by checking version. */
  3925. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3926. qla_printk(KERN_WARNING, ha,
  3927. "Unable to verify integrity of firmware image (%Zd)!\n",
  3928. blob->fw->size);
  3929. goto fail_fw_integrity;
  3930. }
  3931. for (i = 0; i < 4; i++)
  3932. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3933. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3934. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3935. wcode[2] == 0 && wcode[3] == 0)) {
  3936. qla_printk(KERN_WARNING, ha,
  3937. "Unable to verify integrity of firmware image!\n");
  3938. qla_printk(KERN_WARNING, ha,
  3939. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3940. wcode[1], wcode[2], wcode[3]);
  3941. goto fail_fw_integrity;
  3942. }
  3943. seg = blob->segs;
  3944. while (*seg && rval == QLA_SUCCESS) {
  3945. risc_addr = *seg;
  3946. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3947. risc_size = be16_to_cpu(fwcode[3]);
  3948. /* Validate firmware image size. */
  3949. fwclen += risc_size * sizeof(uint16_t);
  3950. if (blob->fw->size < fwclen) {
  3951. qla_printk(KERN_WARNING, ha,
  3952. "Unable to verify integrity of firmware image "
  3953. "(%Zd)!\n", blob->fw->size);
  3954. goto fail_fw_integrity;
  3955. }
  3956. fragment = 0;
  3957. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3958. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3959. if (wlen > risc_size)
  3960. wlen = risc_size;
  3961. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3962. "addr %x, number of words 0x%x.\n", vha->host_no,
  3963. risc_addr, wlen));
  3964. for (i = 0; i < wlen; i++)
  3965. wcode[i] = swab16(fwcode[i]);
  3966. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3967. wlen);
  3968. if (rval) {
  3969. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3970. "segment %d of firmware\n", vha->host_no,
  3971. fragment));
  3972. qla_printk(KERN_WARNING, ha,
  3973. "[ERROR] Failed to load segment %d of "
  3974. "firmware\n", fragment);
  3975. break;
  3976. }
  3977. fwcode += wlen;
  3978. risc_addr += wlen;
  3979. risc_size -= wlen;
  3980. fragment++;
  3981. }
  3982. /* Next segment. */
  3983. seg++;
  3984. }
  3985. return rval;
  3986. fail_fw_integrity:
  3987. return QLA_FUNCTION_FAILED;
  3988. }
  3989. static int
  3990. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3991. {
  3992. int rval;
  3993. int segments, fragment;
  3994. uint32_t *dcode, dlen;
  3995. uint32_t risc_addr;
  3996. uint32_t risc_size;
  3997. uint32_t i;
  3998. struct fw_blob *blob;
  3999. uint32_t *fwcode, fwclen;
  4000. struct qla_hw_data *ha = vha->hw;
  4001. struct req_que *req = ha->req_q_map[0];
  4002. /* Load firmware blob. */
  4003. blob = qla2x00_request_firmware(vha);
  4004. if (!blob) {
  4005. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4006. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4007. "from: " QLA_FW_URL ".\n");
  4008. return QLA_FUNCTION_FAILED;
  4009. }
  4010. qla_printk(KERN_INFO, ha,
  4011. "FW: Loading via request-firmware...\n");
  4012. rval = QLA_SUCCESS;
  4013. segments = FA_RISC_CODE_SEGMENTS;
  4014. dcode = (uint32_t *)req->ring;
  4015. *srisc_addr = 0;
  4016. fwcode = (uint32_t *)blob->fw->data;
  4017. fwclen = 0;
  4018. /* Validate firmware image by checking version. */
  4019. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4020. qla_printk(KERN_WARNING, ha,
  4021. "Unable to verify integrity of firmware image (%Zd)!\n",
  4022. blob->fw->size);
  4023. goto fail_fw_integrity;
  4024. }
  4025. for (i = 0; i < 4; i++)
  4026. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4027. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4028. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4029. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4030. dcode[3] == 0)) {
  4031. qla_printk(KERN_WARNING, ha,
  4032. "Unable to verify integrity of firmware image!\n");
  4033. qla_printk(KERN_WARNING, ha,
  4034. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4035. dcode[1], dcode[2], dcode[3]);
  4036. goto fail_fw_integrity;
  4037. }
  4038. while (segments && rval == QLA_SUCCESS) {
  4039. risc_addr = be32_to_cpu(fwcode[2]);
  4040. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4041. risc_size = be32_to_cpu(fwcode[3]);
  4042. /* Validate firmware image size. */
  4043. fwclen += risc_size * sizeof(uint32_t);
  4044. if (blob->fw->size < fwclen) {
  4045. qla_printk(KERN_WARNING, ha,
  4046. "Unable to verify integrity of firmware image "
  4047. "(%Zd)!\n", blob->fw->size);
  4048. goto fail_fw_integrity;
  4049. }
  4050. fragment = 0;
  4051. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4052. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4053. if (dlen > risc_size)
  4054. dlen = risc_size;
  4055. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4056. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4057. risc_addr, dlen));
  4058. for (i = 0; i < dlen; i++)
  4059. dcode[i] = swab32(fwcode[i]);
  4060. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4061. dlen);
  4062. if (rval) {
  4063. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4064. "segment %d of firmware\n", vha->host_no,
  4065. fragment));
  4066. qla_printk(KERN_WARNING, ha,
  4067. "[ERROR] Failed to load segment %d of "
  4068. "firmware\n", fragment);
  4069. break;
  4070. }
  4071. fwcode += dlen;
  4072. risc_addr += dlen;
  4073. risc_size -= dlen;
  4074. fragment++;
  4075. }
  4076. /* Next segment. */
  4077. segments--;
  4078. }
  4079. return rval;
  4080. fail_fw_integrity:
  4081. return QLA_FUNCTION_FAILED;
  4082. }
  4083. int
  4084. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4085. {
  4086. int rval;
  4087. if (ql2xfwloadbin == 1)
  4088. return qla81xx_load_risc(vha, srisc_addr);
  4089. /*
  4090. * FW Load priority:
  4091. * 1) Firmware via request-firmware interface (.bin file).
  4092. * 2) Firmware residing in flash.
  4093. */
  4094. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4095. if (rval == QLA_SUCCESS)
  4096. return rval;
  4097. return qla24xx_load_risc_flash(vha, srisc_addr,
  4098. vha->hw->flt_region_fw);
  4099. }
  4100. int
  4101. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4102. {
  4103. int rval;
  4104. struct qla_hw_data *ha = vha->hw;
  4105. if (ql2xfwloadbin == 2)
  4106. goto try_blob_fw;
  4107. /*
  4108. * FW Load priority:
  4109. * 1) Firmware residing in flash.
  4110. * 2) Firmware via request-firmware interface (.bin file).
  4111. * 3) Golden-Firmware residing in flash -- limited operation.
  4112. */
  4113. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4114. if (rval == QLA_SUCCESS)
  4115. return rval;
  4116. try_blob_fw:
  4117. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4118. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4119. return rval;
  4120. qla_printk(KERN_ERR, ha,
  4121. "FW: Attempting to fallback to golden firmware...\n");
  4122. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4123. if (rval != QLA_SUCCESS)
  4124. return rval;
  4125. qla_printk(KERN_ERR, ha,
  4126. "FW: Please update operational firmware...\n");
  4127. ha->flags.running_gold_fw = 1;
  4128. return rval;
  4129. }
  4130. void
  4131. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4132. {
  4133. int ret, retries;
  4134. struct qla_hw_data *ha = vha->hw;
  4135. if (ha->flags.pci_channel_io_perm_failure)
  4136. return;
  4137. if (!IS_FWI2_CAPABLE(ha))
  4138. return;
  4139. if (!ha->fw_major_version)
  4140. return;
  4141. ret = qla2x00_stop_firmware(vha);
  4142. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4143. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4144. ha->isp_ops->reset_chip(vha);
  4145. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4146. continue;
  4147. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4148. continue;
  4149. qla_printk(KERN_INFO, ha,
  4150. "Attempting retry of stop-firmware command...\n");
  4151. ret = qla2x00_stop_firmware(vha);
  4152. }
  4153. }
  4154. int
  4155. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4156. {
  4157. int rval = QLA_SUCCESS;
  4158. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4159. struct qla_hw_data *ha = vha->hw;
  4160. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4161. struct req_que *req;
  4162. struct rsp_que *rsp;
  4163. if (!vha->vp_idx)
  4164. return -EINVAL;
  4165. rval = qla2x00_fw_ready(base_vha);
  4166. if (ha->flags.cpu_affinity_enabled)
  4167. req = ha->req_q_map[0];
  4168. else
  4169. req = vha->req;
  4170. rsp = req->rsp;
  4171. if (rval == QLA_SUCCESS) {
  4172. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4173. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4174. }
  4175. vha->flags.management_server_logged_in = 0;
  4176. /* Login to SNS first */
  4177. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4178. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4179. DEBUG15(qla_printk(KERN_INFO, ha,
  4180. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4181. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4182. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4183. return (QLA_FUNCTION_FAILED);
  4184. }
  4185. atomic_set(&vha->loop_down_timer, 0);
  4186. atomic_set(&vha->loop_state, LOOP_UP);
  4187. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4188. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4189. rval = qla2x00_loop_resync(base_vha);
  4190. return rval;
  4191. }
  4192. /* 84XX Support **************************************************************/
  4193. static LIST_HEAD(qla_cs84xx_list);
  4194. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4195. static struct qla_chip_state_84xx *
  4196. qla84xx_get_chip(struct scsi_qla_host *vha)
  4197. {
  4198. struct qla_chip_state_84xx *cs84xx;
  4199. struct qla_hw_data *ha = vha->hw;
  4200. mutex_lock(&qla_cs84xx_mutex);
  4201. /* Find any shared 84xx chip. */
  4202. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4203. if (cs84xx->bus == ha->pdev->bus) {
  4204. kref_get(&cs84xx->kref);
  4205. goto done;
  4206. }
  4207. }
  4208. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4209. if (!cs84xx)
  4210. goto done;
  4211. kref_init(&cs84xx->kref);
  4212. spin_lock_init(&cs84xx->access_lock);
  4213. mutex_init(&cs84xx->fw_update_mutex);
  4214. cs84xx->bus = ha->pdev->bus;
  4215. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4216. done:
  4217. mutex_unlock(&qla_cs84xx_mutex);
  4218. return cs84xx;
  4219. }
  4220. static void
  4221. __qla84xx_chip_release(struct kref *kref)
  4222. {
  4223. struct qla_chip_state_84xx *cs84xx =
  4224. container_of(kref, struct qla_chip_state_84xx, kref);
  4225. mutex_lock(&qla_cs84xx_mutex);
  4226. list_del(&cs84xx->list);
  4227. mutex_unlock(&qla_cs84xx_mutex);
  4228. kfree(cs84xx);
  4229. }
  4230. void
  4231. qla84xx_put_chip(struct scsi_qla_host *vha)
  4232. {
  4233. struct qla_hw_data *ha = vha->hw;
  4234. if (ha->cs84xx)
  4235. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4236. }
  4237. static int
  4238. qla84xx_init_chip(scsi_qla_host_t *vha)
  4239. {
  4240. int rval;
  4241. uint16_t status[2];
  4242. struct qla_hw_data *ha = vha->hw;
  4243. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4244. rval = qla84xx_verify_chip(vha, status);
  4245. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4246. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4247. QLA_SUCCESS;
  4248. }
  4249. /* 81XX Support **************************************************************/
  4250. int
  4251. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4252. {
  4253. int rval;
  4254. struct init_cb_81xx *icb;
  4255. struct nvram_81xx *nv;
  4256. uint32_t *dptr;
  4257. uint8_t *dptr1, *dptr2;
  4258. uint32_t chksum;
  4259. uint16_t cnt;
  4260. struct qla_hw_data *ha = vha->hw;
  4261. rval = QLA_SUCCESS;
  4262. icb = (struct init_cb_81xx *)ha->init_cb;
  4263. nv = ha->nvram;
  4264. /* Determine NVRAM starting address. */
  4265. ha->nvram_size = sizeof(struct nvram_81xx);
  4266. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4267. /* Get VPD data into cache */
  4268. ha->vpd = ha->nvram + VPD_OFFSET;
  4269. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4270. ha->vpd_size);
  4271. /* Get NVRAM data into cache and calculate checksum. */
  4272. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4273. ha->nvram_size);
  4274. dptr = (uint32_t *)nv;
  4275. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4276. chksum += le32_to_cpu(*dptr++);
  4277. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4278. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4279. /* Bad NVRAM data, set defaults parameters. */
  4280. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4281. || nv->id[3] != ' ' ||
  4282. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4283. /* Reset NVRAM data. */
  4284. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4285. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4286. le16_to_cpu(nv->nvram_version));
  4287. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4288. "invalid -- WWPN) defaults.\n");
  4289. /*
  4290. * Set default initialization control block.
  4291. */
  4292. memset(nv, 0, ha->nvram_size);
  4293. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4294. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4295. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4296. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4297. nv->exchange_count = __constant_cpu_to_le16(0);
  4298. nv->port_name[0] = 0x21;
  4299. nv->port_name[1] = 0x00 + ha->port_no;
  4300. nv->port_name[2] = 0x00;
  4301. nv->port_name[3] = 0xe0;
  4302. nv->port_name[4] = 0x8b;
  4303. nv->port_name[5] = 0x1c;
  4304. nv->port_name[6] = 0x55;
  4305. nv->port_name[7] = 0x86;
  4306. nv->node_name[0] = 0x20;
  4307. nv->node_name[1] = 0x00;
  4308. nv->node_name[2] = 0x00;
  4309. nv->node_name[3] = 0xe0;
  4310. nv->node_name[4] = 0x8b;
  4311. nv->node_name[5] = 0x1c;
  4312. nv->node_name[6] = 0x55;
  4313. nv->node_name[7] = 0x86;
  4314. nv->login_retry_count = __constant_cpu_to_le16(8);
  4315. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4316. nv->login_timeout = __constant_cpu_to_le16(0);
  4317. nv->firmware_options_1 =
  4318. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4319. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4320. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4321. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4322. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4323. nv->efi_parameters = __constant_cpu_to_le32(0);
  4324. nv->reset_delay = 5;
  4325. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4326. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4327. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4328. nv->enode_mac[0] = 0x00;
  4329. nv->enode_mac[1] = 0x02;
  4330. nv->enode_mac[2] = 0x03;
  4331. nv->enode_mac[3] = 0x04;
  4332. nv->enode_mac[4] = 0x05;
  4333. nv->enode_mac[5] = 0x06 + ha->port_no;
  4334. rval = 1;
  4335. }
  4336. /* Reset Initialization control block */
  4337. memset(icb, 0, sizeof(struct init_cb_81xx));
  4338. /* Copy 1st segment. */
  4339. dptr1 = (uint8_t *)icb;
  4340. dptr2 = (uint8_t *)&nv->version;
  4341. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4342. while (cnt--)
  4343. *dptr1++ = *dptr2++;
  4344. icb->login_retry_count = nv->login_retry_count;
  4345. /* Copy 2nd segment. */
  4346. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4347. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4348. cnt = (uint8_t *)&icb->reserved_5 -
  4349. (uint8_t *)&icb->interrupt_delay_timer;
  4350. while (cnt--)
  4351. *dptr1++ = *dptr2++;
  4352. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4353. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4354. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4355. icb->enode_mac[0] = 0x01;
  4356. icb->enode_mac[1] = 0x02;
  4357. icb->enode_mac[2] = 0x03;
  4358. icb->enode_mac[3] = 0x04;
  4359. icb->enode_mac[4] = 0x05;
  4360. icb->enode_mac[5] = 0x06 + ha->port_no;
  4361. }
  4362. /* Use extended-initialization control block. */
  4363. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4364. /*
  4365. * Setup driver NVRAM options.
  4366. */
  4367. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4368. "QLE8XXX");
  4369. /* Use alternate WWN? */
  4370. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4371. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4372. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4373. }
  4374. /* Prepare nodename */
  4375. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4376. /*
  4377. * Firmware will apply the following mask if the nodename was
  4378. * not provided.
  4379. */
  4380. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4381. icb->node_name[0] &= 0xF0;
  4382. }
  4383. /* Set host adapter parameters. */
  4384. ha->flags.disable_risc_code_load = 0;
  4385. ha->flags.enable_lip_reset = 0;
  4386. ha->flags.enable_lip_full_login =
  4387. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4388. ha->flags.enable_target_reset =
  4389. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4390. ha->flags.enable_led_scheme = 0;
  4391. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4392. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4393. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4394. /* save HBA serial number */
  4395. ha->serial0 = icb->port_name[5];
  4396. ha->serial1 = icb->port_name[6];
  4397. ha->serial2 = icb->port_name[7];
  4398. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4399. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4400. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4401. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4402. /* Set minimum login_timeout to 4 seconds. */
  4403. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4404. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4405. if (le16_to_cpu(nv->login_timeout) < 4)
  4406. nv->login_timeout = __constant_cpu_to_le16(4);
  4407. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4408. icb->login_timeout = nv->login_timeout;
  4409. /* Set minimum RATOV to 100 tenths of a second. */
  4410. ha->r_a_tov = 100;
  4411. ha->loop_reset_delay = nv->reset_delay;
  4412. /* Link Down Timeout = 0:
  4413. *
  4414. * When Port Down timer expires we will start returning
  4415. * I/O's to OS with "DID_NO_CONNECT".
  4416. *
  4417. * Link Down Timeout != 0:
  4418. *
  4419. * The driver waits for the link to come up after link down
  4420. * before returning I/Os to OS with "DID_NO_CONNECT".
  4421. */
  4422. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4423. ha->loop_down_abort_time =
  4424. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4425. } else {
  4426. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4427. ha->loop_down_abort_time =
  4428. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4429. }
  4430. /* Need enough time to try and get the port back. */
  4431. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4432. if (qlport_down_retry)
  4433. ha->port_down_retry_count = qlport_down_retry;
  4434. /* Set login_retry_count */
  4435. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4436. if (ha->port_down_retry_count ==
  4437. le16_to_cpu(nv->port_down_retry_count) &&
  4438. ha->port_down_retry_count > 3)
  4439. ha->login_retry_count = ha->port_down_retry_count;
  4440. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4441. ha->login_retry_count = ha->port_down_retry_count;
  4442. if (ql2xloginretrycount)
  4443. ha->login_retry_count = ql2xloginretrycount;
  4444. /* Enable ZIO. */
  4445. if (!vha->flags.init_done) {
  4446. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4447. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4448. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4449. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4450. }
  4451. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4452. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4453. vha->flags.process_response_queue = 0;
  4454. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4455. ha->zio_mode = QLA_ZIO_MODE_6;
  4456. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4457. "(%d us).\n", vha->host_no, ha->zio_mode,
  4458. ha->zio_timer * 100));
  4459. qla_printk(KERN_INFO, ha,
  4460. "ZIO mode %d enabled; timer delay (%d us).\n",
  4461. ha->zio_mode, ha->zio_timer * 100);
  4462. icb->firmware_options_2 |= cpu_to_le32(
  4463. (uint32_t)ha->zio_mode);
  4464. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4465. vha->flags.process_response_queue = 1;
  4466. }
  4467. if (rval) {
  4468. DEBUG2_3(printk(KERN_WARNING
  4469. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4470. }
  4471. return (rval);
  4472. }
  4473. int
  4474. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4475. {
  4476. int status, rval;
  4477. uint32_t wait_time;
  4478. struct qla_hw_data *ha = vha->hw;
  4479. struct req_que *req = ha->req_q_map[0];
  4480. struct rsp_que *rsp = ha->rsp_q_map[0];
  4481. struct scsi_qla_host *vp;
  4482. struct scsi_qla_host *tvp;
  4483. status = qla2x00_init_rings(vha);
  4484. if (!status) {
  4485. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4486. ha->flags.chip_reset_done = 1;
  4487. status = qla2x00_fw_ready(vha);
  4488. if (!status) {
  4489. qla_printk(KERN_INFO, ha,
  4490. "%s(): Start configure loop, "
  4491. "status = %d\n", __func__, status);
  4492. /* Issue a marker after FW becomes ready. */
  4493. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4494. vha->flags.online = 1;
  4495. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4496. wait_time = 256;
  4497. do {
  4498. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4499. qla2x00_configure_loop(vha);
  4500. wait_time--;
  4501. } while (!atomic_read(&vha->loop_down_timer) &&
  4502. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4503. wait_time &&
  4504. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4505. }
  4506. /* if no cable then assume it's good */
  4507. if ((vha->device_flags & DFLG_NO_CABLE))
  4508. status = 0;
  4509. qla_printk(KERN_INFO, ha,
  4510. "%s(): Configure loop done, status = 0x%x\n",
  4511. __func__, status);
  4512. }
  4513. if (!status) {
  4514. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4515. if (!atomic_read(&vha->loop_down_timer)) {
  4516. /*
  4517. * Issue marker command only when we are going
  4518. * to start the I/O .
  4519. */
  4520. vha->marker_needed = 1;
  4521. }
  4522. vha->flags.online = 1;
  4523. ha->isp_ops->enable_intrs(ha);
  4524. ha->isp_abort_cnt = 0;
  4525. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4526. if (ha->fce) {
  4527. ha->flags.fce_enabled = 1;
  4528. memset(ha->fce, 0,
  4529. fce_calc_size(ha->fce_bufs));
  4530. rval = qla2x00_enable_fce_trace(vha,
  4531. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4532. &ha->fce_bufs);
  4533. if (rval) {
  4534. qla_printk(KERN_WARNING, ha,
  4535. "Unable to reinitialize FCE "
  4536. "(%d).\n", rval);
  4537. ha->flags.fce_enabled = 0;
  4538. }
  4539. }
  4540. if (ha->eft) {
  4541. memset(ha->eft, 0, EFT_SIZE);
  4542. rval = qla2x00_enable_eft_trace(vha,
  4543. ha->eft_dma, EFT_NUM_BUFFERS);
  4544. if (rval) {
  4545. qla_printk(KERN_WARNING, ha,
  4546. "Unable to reinitialize EFT "
  4547. "(%d).\n", rval);
  4548. }
  4549. }
  4550. }
  4551. if (!status) {
  4552. DEBUG(printk(KERN_INFO
  4553. "qla82xx_restart_isp(%ld): succeeded.\n",
  4554. vha->host_no));
  4555. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  4556. if (vp->vp_idx)
  4557. qla2x00_vp_abort_isp(vp);
  4558. }
  4559. } else {
  4560. qla_printk(KERN_INFO, ha,
  4561. "qla82xx_restart_isp: **** FAILED ****\n");
  4562. }
  4563. return status;
  4564. }
  4565. void
  4566. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4567. {
  4568. struct qla_hw_data *ha = vha->hw;
  4569. if (!ql2xetsenable)
  4570. return;
  4571. /* Enable ETS Burst. */
  4572. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4573. ha->fw_options[2] |= BIT_9;
  4574. qla2x00_set_fw_options(vha, ha->fw_options);
  4575. }
  4576. /*
  4577. * qla24xx_get_fcp_prio
  4578. * Gets the fcp cmd priority value for the logged in port.
  4579. * Looks for a match of the port descriptors within
  4580. * each of the fcp prio config entries. If a match is found,
  4581. * the tag (priority) value is returned.
  4582. *
  4583. * Input:
  4584. * ha = adapter block po
  4585. * fcport = port structure pointer.
  4586. *
  4587. * Return:
  4588. * non-zero (if found)
  4589. * 0 (if not found)
  4590. *
  4591. * Context:
  4592. * Kernel context
  4593. */
  4594. uint8_t
  4595. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4596. {
  4597. int i, entries;
  4598. uint8_t pid_match, wwn_match;
  4599. uint8_t priority;
  4600. uint32_t pid1, pid2;
  4601. uint64_t wwn1, wwn2;
  4602. struct qla_fcp_prio_entry *pri_entry;
  4603. struct qla_hw_data *ha = vha->hw;
  4604. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4605. return 0;
  4606. priority = 0;
  4607. entries = ha->fcp_prio_cfg->num_entries;
  4608. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4609. for (i = 0; i < entries; i++) {
  4610. pid_match = wwn_match = 0;
  4611. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4612. pri_entry++;
  4613. continue;
  4614. }
  4615. /* check source pid for a match */
  4616. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4617. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4618. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4619. if (pid1 == INVALID_PORT_ID)
  4620. pid_match++;
  4621. else if (pid1 == pid2)
  4622. pid_match++;
  4623. }
  4624. /* check destination pid for a match */
  4625. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4626. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4627. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4628. if (pid1 == INVALID_PORT_ID)
  4629. pid_match++;
  4630. else if (pid1 == pid2)
  4631. pid_match++;
  4632. }
  4633. /* check source WWN for a match */
  4634. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4635. wwn1 = wwn_to_u64(vha->port_name);
  4636. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4637. if (wwn2 == (uint64_t)-1)
  4638. wwn_match++;
  4639. else if (wwn1 == wwn2)
  4640. wwn_match++;
  4641. }
  4642. /* check destination WWN for a match */
  4643. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4644. wwn1 = wwn_to_u64(fcport->port_name);
  4645. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4646. if (wwn2 == (uint64_t)-1)
  4647. wwn_match++;
  4648. else if (wwn1 == wwn2)
  4649. wwn_match++;
  4650. }
  4651. if (pid_match == 2 || wwn_match == 2) {
  4652. /* Found a matching entry */
  4653. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4654. priority = pri_entry->tag;
  4655. break;
  4656. }
  4657. pri_entry++;
  4658. }
  4659. return priority;
  4660. }
  4661. /*
  4662. * qla24xx_update_fcport_fcp_prio
  4663. * Activates fcp priority for the logged in fc port
  4664. *
  4665. * Input:
  4666. * ha = adapter block pointer.
  4667. * fcp = port structure pointer.
  4668. *
  4669. * Return:
  4670. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4671. *
  4672. * Context:
  4673. * Kernel context.
  4674. */
  4675. int
  4676. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4677. {
  4678. int ret;
  4679. uint8_t priority;
  4680. uint16_t mb[5];
  4681. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4682. fcport->port_type != FCT_TARGET ||
  4683. fcport->loop_id == FC_NO_LOOP_ID)
  4684. return QLA_FUNCTION_FAILED;
  4685. priority = qla24xx_get_fcp_prio(ha, fcport);
  4686. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4687. if (ret == QLA_SUCCESS)
  4688. fcport->fcp_prio = priority;
  4689. else
  4690. DEBUG2(printk(KERN_WARNING
  4691. "scsi(%ld): Unable to activate fcp priority, "
  4692. " ret=0x%x\n", ha->host_no, ret));
  4693. return ret;
  4694. }
  4695. /*
  4696. * qla24xx_update_all_fcp_prio
  4697. * Activates fcp priority for all the logged in ports
  4698. *
  4699. * Input:
  4700. * ha = adapter block pointer.
  4701. *
  4702. * Return:
  4703. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4704. *
  4705. * Context:
  4706. * Kernel context.
  4707. */
  4708. int
  4709. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4710. {
  4711. int ret;
  4712. fc_port_t *fcport;
  4713. ret = QLA_FUNCTION_FAILED;
  4714. /* We need to set priority for all logged in ports */
  4715. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4716. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4717. return ret;
  4718. }