main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. unsigned long flags;
  100. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  101. if (--sc->ps_usecount != 0)
  102. goto unlock;
  103. spin_lock(&common->cc_lock);
  104. ath_hw_cycle_counters_update(common);
  105. spin_unlock(&common->cc_lock);
  106. if (sc->ps_idle)
  107. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA |
  112. PS_WAIT_FOR_TX_ACK)))
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  114. unlock:
  115. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  116. }
  117. static void ath_start_ani(struct ath_common *common)
  118. {
  119. struct ath_hw *ah = common->ah;
  120. unsigned long timestamp = jiffies_to_msecs(jiffies);
  121. struct ath_softc *sc = (struct ath_softc *) common->priv;
  122. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  123. return;
  124. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  125. return;
  126. common->ani.longcal_timer = timestamp;
  127. common->ani.shortcal_timer = timestamp;
  128. common->ani.checkani_timer = timestamp;
  129. mod_timer(&common->ani.timer,
  130. jiffies +
  131. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  132. }
  133. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  134. {
  135. struct ath_hw *ah = sc->sc_ah;
  136. struct ath9k_channel *chan = &ah->channels[channel];
  137. struct survey_info *survey = &sc->survey[channel];
  138. if (chan->noisefloor) {
  139. survey->filled |= SURVEY_INFO_NOISE_DBM;
  140. survey->noise = chan->noisefloor;
  141. }
  142. }
  143. /*
  144. * Updates the survey statistics and returns the busy time since last
  145. * update in %, if the measurement duration was long enough for the
  146. * result to be useful, -1 otherwise.
  147. */
  148. static int ath_update_survey_stats(struct ath_softc *sc)
  149. {
  150. struct ath_hw *ah = sc->sc_ah;
  151. struct ath_common *common = ath9k_hw_common(ah);
  152. int pos = ah->curchan - &ah->channels[0];
  153. struct survey_info *survey = &sc->survey[pos];
  154. struct ath_cycle_counters *cc = &common->cc_survey;
  155. unsigned int div = common->clockrate * 1000;
  156. int ret = 0;
  157. if (!ah->curchan)
  158. return -1;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. if (cc->cycles < div)
  172. return -1;
  173. if (cc->cycles > 0)
  174. ret = cc->rx_busy * 100 / cc->cycles;
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. return ret;
  178. }
  179. /*
  180. * Set/change channels. If the channel is really being changed, it's done
  181. * by reseting the chip. To accomplish this we must first cleanup any pending
  182. * DMA, then restart stuff.
  183. */
  184. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  185. struct ath9k_channel *hchan)
  186. {
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. sc->hw_busy_count = 0;
  197. del_timer_sync(&common->ani.timer);
  198. cancel_work_sync(&sc->paprd_work);
  199. cancel_work_sync(&sc->hw_check_work);
  200. cancel_delayed_work_sync(&sc->tx_complete_work);
  201. cancel_delayed_work_sync(&sc->hw_pll_work);
  202. ath9k_ps_wakeup(sc);
  203. spin_lock_bh(&sc->sc_pcu_lock);
  204. /*
  205. * This is only performed if the channel settings have
  206. * actually changed.
  207. *
  208. * To switch channels clear any pending DMA operations;
  209. * wait long enough for the RX fifo to drain, reset the
  210. * hardware at the new frequency, and then re-enable
  211. * the relevant bits of the h/w.
  212. */
  213. ath9k_hw_disable_interrupts(ah);
  214. stopped = ath_drain_all_txq(sc, false);
  215. if (!ath_stoprecv(sc))
  216. stopped = false;
  217. if (!ath9k_hw_check_alive(ah))
  218. stopped = false;
  219. /* XXX: do not flush receive queue here. We don't want
  220. * to flush data frames already in queue because of
  221. * changing channel. */
  222. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  223. fastcc = false;
  224. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  225. caldata = &sc->caldata;
  226. ath_dbg(common, ATH_DBG_CONFIG,
  227. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  228. sc->sc_ah->curchan->channel,
  229. channel->center_freq, conf_is_ht40(conf),
  230. fastcc);
  231. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  232. if (r) {
  233. ath_err(common,
  234. "Unable to reset channel (%u MHz), reset status %d\n",
  235. channel->center_freq, r);
  236. goto ps_restore;
  237. }
  238. if (ath_startrecv(sc) != 0) {
  239. ath_err(common, "Unable to restart recv logic\n");
  240. r = -EIO;
  241. goto ps_restore;
  242. }
  243. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  244. sc->config.txpowlimit, &sc->curtxpow);
  245. ath9k_hw_set_interrupts(ah, ah->imask);
  246. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  247. if (sc->sc_flags & SC_OP_BEACONS)
  248. ath_set_beacon(sc);
  249. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  250. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  251. ath_start_ani(common);
  252. }
  253. ps_restore:
  254. ieee80211_wake_queues(hw);
  255. spin_unlock_bh(&sc->sc_pcu_lock);
  256. ath9k_ps_restore(sc);
  257. return r;
  258. }
  259. static void ath_paprd_activate(struct ath_softc *sc)
  260. {
  261. struct ath_hw *ah = sc->sc_ah;
  262. struct ath9k_hw_cal_data *caldata = ah->caldata;
  263. struct ath_common *common = ath9k_hw_common(ah);
  264. int chain;
  265. if (!caldata || !caldata->paprd_done)
  266. return;
  267. ath9k_ps_wakeup(sc);
  268. ar9003_paprd_enable(ah, false);
  269. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  270. if (!(common->tx_chainmask & BIT(chain)))
  271. continue;
  272. ar9003_paprd_populate_single_table(ah, caldata, chain);
  273. }
  274. ar9003_paprd_enable(ah, true);
  275. ath9k_ps_restore(sc);
  276. }
  277. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  278. {
  279. struct ieee80211_hw *hw = sc->hw;
  280. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  281. struct ath_hw *ah = sc->sc_ah;
  282. struct ath_common *common = ath9k_hw_common(ah);
  283. struct ath_tx_control txctl;
  284. int time_left;
  285. memset(&txctl, 0, sizeof(txctl));
  286. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  287. memset(tx_info, 0, sizeof(*tx_info));
  288. tx_info->band = hw->conf.channel->band;
  289. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  290. tx_info->control.rates[0].idx = 0;
  291. tx_info->control.rates[0].count = 1;
  292. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  293. tx_info->control.rates[1].idx = -1;
  294. init_completion(&sc->paprd_complete);
  295. txctl.paprd = BIT(chain);
  296. if (ath_tx_start(hw, skb, &txctl) != 0) {
  297. ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
  298. dev_kfree_skb_any(skb);
  299. return false;
  300. }
  301. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  302. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  303. if (!time_left)
  304. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
  305. "Timeout waiting for paprd training on TX chain %d\n",
  306. chain);
  307. return !!time_left;
  308. }
  309. void ath_paprd_calibrate(struct work_struct *work)
  310. {
  311. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  312. struct ieee80211_hw *hw = sc->hw;
  313. struct ath_hw *ah = sc->sc_ah;
  314. struct ieee80211_hdr *hdr;
  315. struct sk_buff *skb = NULL;
  316. struct ath9k_hw_cal_data *caldata = ah->caldata;
  317. struct ath_common *common = ath9k_hw_common(ah);
  318. int ftype;
  319. int chain_ok = 0;
  320. int chain;
  321. int len = 1800;
  322. if (!caldata)
  323. return;
  324. ath9k_ps_wakeup(sc);
  325. if (ar9003_paprd_init_table(ah) < 0)
  326. goto fail_paprd;
  327. skb = alloc_skb(len, GFP_KERNEL);
  328. if (!skb)
  329. goto fail_paprd;
  330. skb_put(skb, len);
  331. memset(skb->data, 0, len);
  332. hdr = (struct ieee80211_hdr *)skb->data;
  333. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  334. hdr->frame_control = cpu_to_le16(ftype);
  335. hdr->duration_id = cpu_to_le16(10);
  336. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  337. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  338. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  339. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  340. if (!(common->tx_chainmask & BIT(chain)))
  341. continue;
  342. chain_ok = 0;
  343. ath_dbg(common, ATH_DBG_CALIBRATE,
  344. "Sending PAPRD frame for thermal measurement "
  345. "on chain %d\n", chain);
  346. if (!ath_paprd_send_frame(sc, skb, chain))
  347. goto fail_paprd;
  348. ar9003_paprd_setup_gain_table(ah, chain);
  349. ath_dbg(common, ATH_DBG_CALIBRATE,
  350. "Sending PAPRD training frame on chain %d\n", chain);
  351. if (!ath_paprd_send_frame(sc, skb, chain))
  352. goto fail_paprd;
  353. if (!ar9003_paprd_is_done(ah))
  354. break;
  355. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  356. break;
  357. chain_ok = 1;
  358. }
  359. kfree_skb(skb);
  360. if (chain_ok) {
  361. caldata->paprd_done = true;
  362. ath_paprd_activate(sc);
  363. }
  364. fail_paprd:
  365. ath9k_ps_restore(sc);
  366. }
  367. /*
  368. * This routine performs the periodic noise floor calibration function
  369. * that is used to adjust and optimize the chip performance. This
  370. * takes environmental changes (location, temperature) into account.
  371. * When the task is complete, it reschedules itself depending on the
  372. * appropriate interval that was calculated.
  373. */
  374. void ath_ani_calibrate(unsigned long data)
  375. {
  376. struct ath_softc *sc = (struct ath_softc *)data;
  377. struct ath_hw *ah = sc->sc_ah;
  378. struct ath_common *common = ath9k_hw_common(ah);
  379. bool longcal = false;
  380. bool shortcal = false;
  381. bool aniflag = false;
  382. unsigned int timestamp = jiffies_to_msecs(jiffies);
  383. u32 cal_interval, short_cal_interval, long_cal_interval;
  384. unsigned long flags;
  385. if (ah->caldata && ah->caldata->nfcal_interference)
  386. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  387. else
  388. long_cal_interval = ATH_LONG_CALINTERVAL;
  389. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  390. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  391. /* Only calibrate if awake */
  392. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  393. goto set_timer;
  394. ath9k_ps_wakeup(sc);
  395. /* Long calibration runs independently of short calibration. */
  396. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  397. longcal = true;
  398. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  399. common->ani.longcal_timer = timestamp;
  400. }
  401. /* Short calibration applies only while caldone is false */
  402. if (!common->ani.caldone) {
  403. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  404. shortcal = true;
  405. ath_dbg(common, ATH_DBG_ANI,
  406. "shortcal @%lu\n", jiffies);
  407. common->ani.shortcal_timer = timestamp;
  408. common->ani.resetcal_timer = timestamp;
  409. }
  410. } else {
  411. if ((timestamp - common->ani.resetcal_timer) >=
  412. ATH_RESTART_CALINTERVAL) {
  413. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  414. if (common->ani.caldone)
  415. common->ani.resetcal_timer = timestamp;
  416. }
  417. }
  418. /* Verify whether we must check ANI */
  419. if ((timestamp - common->ani.checkani_timer) >=
  420. ah->config.ani_poll_interval) {
  421. aniflag = true;
  422. common->ani.checkani_timer = timestamp;
  423. }
  424. /* Call ANI routine if necessary */
  425. if (aniflag) {
  426. spin_lock_irqsave(&common->cc_lock, flags);
  427. ath9k_hw_ani_monitor(ah, ah->curchan);
  428. ath_update_survey_stats(sc);
  429. spin_unlock_irqrestore(&common->cc_lock, flags);
  430. }
  431. /* Perform calibration if necessary */
  432. if (longcal || shortcal) {
  433. common->ani.caldone =
  434. ath9k_hw_calibrate(ah, ah->curchan,
  435. common->rx_chainmask, longcal);
  436. }
  437. ath9k_ps_restore(sc);
  438. set_timer:
  439. /*
  440. * Set timer interval based on previous results.
  441. * The interval must be the shortest necessary to satisfy ANI,
  442. * short calibration and long calibration.
  443. */
  444. cal_interval = ATH_LONG_CALINTERVAL;
  445. if (sc->sc_ah->config.enable_ani)
  446. cal_interval = min(cal_interval,
  447. (u32)ah->config.ani_poll_interval);
  448. if (!common->ani.caldone)
  449. cal_interval = min(cal_interval, (u32)short_cal_interval);
  450. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  451. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  452. if (!ah->caldata->paprd_done)
  453. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  454. else if (!ah->paprd_table_write_done)
  455. ath_paprd_activate(sc);
  456. }
  457. }
  458. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  459. {
  460. struct ath_node *an;
  461. struct ath_hw *ah = sc->sc_ah;
  462. an = (struct ath_node *)sta->drv_priv;
  463. #ifdef CONFIG_ATH9K_DEBUGFS
  464. spin_lock(&sc->nodes_lock);
  465. list_add(&an->list, &sc->nodes);
  466. spin_unlock(&sc->nodes_lock);
  467. an->sta = sta;
  468. #endif
  469. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  470. sc->sc_flags |= SC_OP_ENABLE_APM;
  471. if (sc->sc_flags & SC_OP_TXAGGR) {
  472. ath_tx_node_init(sc, an);
  473. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  474. sta->ht_cap.ampdu_factor);
  475. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  476. }
  477. }
  478. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  479. {
  480. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  481. #ifdef CONFIG_ATH9K_DEBUGFS
  482. spin_lock(&sc->nodes_lock);
  483. list_del(&an->list);
  484. spin_unlock(&sc->nodes_lock);
  485. an->sta = NULL;
  486. #endif
  487. if (sc->sc_flags & SC_OP_TXAGGR)
  488. ath_tx_node_cleanup(sc, an);
  489. }
  490. void ath_hw_check(struct work_struct *work)
  491. {
  492. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  493. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  494. unsigned long flags;
  495. int busy;
  496. ath9k_ps_wakeup(sc);
  497. if (ath9k_hw_check_alive(sc->sc_ah))
  498. goto out;
  499. spin_lock_irqsave(&common->cc_lock, flags);
  500. busy = ath_update_survey_stats(sc);
  501. spin_unlock_irqrestore(&common->cc_lock, flags);
  502. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  503. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  504. if (busy >= 99) {
  505. if (++sc->hw_busy_count >= 3)
  506. ath_reset(sc, true);
  507. } else if (busy >= 0)
  508. sc->hw_busy_count = 0;
  509. out:
  510. ath9k_ps_restore(sc);
  511. }
  512. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  513. {
  514. static int count;
  515. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  516. if (pll_sqsum >= 0x40000) {
  517. count++;
  518. if (count == 3) {
  519. /* Rx is hung for more than 500ms. Reset it */
  520. ath_dbg(common, ATH_DBG_RESET,
  521. "Possible RX hang, resetting");
  522. ath_reset(sc, true);
  523. count = 0;
  524. }
  525. } else
  526. count = 0;
  527. }
  528. void ath_hw_pll_work(struct work_struct *work)
  529. {
  530. struct ath_softc *sc = container_of(work, struct ath_softc,
  531. hw_pll_work.work);
  532. u32 pll_sqsum;
  533. if (AR_SREV_9485(sc->sc_ah)) {
  534. ath9k_ps_wakeup(sc);
  535. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  536. ath9k_ps_restore(sc);
  537. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  538. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  539. }
  540. }
  541. void ath9k_tasklet(unsigned long data)
  542. {
  543. struct ath_softc *sc = (struct ath_softc *)data;
  544. struct ath_hw *ah = sc->sc_ah;
  545. struct ath_common *common = ath9k_hw_common(ah);
  546. u32 status = sc->intrstatus;
  547. u32 rxmask;
  548. if ((status & ATH9K_INT_FATAL) ||
  549. (status & ATH9K_INT_BB_WATCHDOG)) {
  550. ath_reset(sc, true);
  551. return;
  552. }
  553. ath9k_ps_wakeup(sc);
  554. spin_lock(&sc->sc_pcu_lock);
  555. /*
  556. * Only run the baseband hang check if beacons stop working in AP or
  557. * IBSS mode, because it has a high false positive rate. For station
  558. * mode it should not be necessary, since the upper layers will detect
  559. * this through a beacon miss automatically and the following channel
  560. * change will trigger a hardware reset anyway
  561. */
  562. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  563. !ath9k_hw_check_alive(ah))
  564. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  565. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  566. /*
  567. * TSF sync does not look correct; remain awake to sync with
  568. * the next Beacon.
  569. */
  570. ath_dbg(common, ATH_DBG_PS,
  571. "TSFOOR - Sync with next Beacon\n");
  572. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC |
  573. PS_TSFOOR_SYNC;
  574. }
  575. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  576. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  577. ATH9K_INT_RXORN);
  578. else
  579. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  580. if (status & rxmask) {
  581. /* Check for high priority Rx first */
  582. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  583. (status & ATH9K_INT_RXHP))
  584. ath_rx_tasklet(sc, 0, true);
  585. ath_rx_tasklet(sc, 0, false);
  586. }
  587. if (status & ATH9K_INT_TX) {
  588. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  589. ath_tx_edma_tasklet(sc);
  590. else
  591. ath_tx_tasklet(sc);
  592. }
  593. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  594. if (status & ATH9K_INT_GENTIMER)
  595. ath_gen_timer_isr(sc->sc_ah);
  596. /* re-enable hardware interrupt */
  597. ath9k_hw_enable_interrupts(ah);
  598. spin_unlock(&sc->sc_pcu_lock);
  599. ath9k_ps_restore(sc);
  600. }
  601. irqreturn_t ath_isr(int irq, void *dev)
  602. {
  603. #define SCHED_INTR ( \
  604. ATH9K_INT_FATAL | \
  605. ATH9K_INT_BB_WATCHDOG | \
  606. ATH9K_INT_RXORN | \
  607. ATH9K_INT_RXEOL | \
  608. ATH9K_INT_RX | \
  609. ATH9K_INT_RXLP | \
  610. ATH9K_INT_RXHP | \
  611. ATH9K_INT_TX | \
  612. ATH9K_INT_BMISS | \
  613. ATH9K_INT_CST | \
  614. ATH9K_INT_TSFOOR | \
  615. ATH9K_INT_GENTIMER)
  616. struct ath_softc *sc = dev;
  617. struct ath_hw *ah = sc->sc_ah;
  618. struct ath_common *common = ath9k_hw_common(ah);
  619. enum ath9k_int status;
  620. bool sched = false;
  621. /*
  622. * The hardware is not ready/present, don't
  623. * touch anything. Note this can happen early
  624. * on if the IRQ is shared.
  625. */
  626. if (sc->sc_flags & SC_OP_INVALID)
  627. return IRQ_NONE;
  628. /* shared irq, not for us */
  629. if (!ath9k_hw_intrpend(ah))
  630. return IRQ_NONE;
  631. /*
  632. * Figure out the reason(s) for the interrupt. Note
  633. * that the hal returns a pseudo-ISR that may include
  634. * bits we haven't explicitly enabled so we mask the
  635. * value to insure we only process bits we requested.
  636. */
  637. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  638. status &= ah->imask; /* discard unasked-for bits */
  639. /*
  640. * If there are no status bits set, then this interrupt was not
  641. * for me (should have been caught above).
  642. */
  643. if (!status)
  644. return IRQ_NONE;
  645. /* Cache the status */
  646. sc->intrstatus = status;
  647. if (status & SCHED_INTR)
  648. sched = true;
  649. /*
  650. * If a FATAL or RXORN interrupt is received, we have to reset the
  651. * chip immediately.
  652. */
  653. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  654. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  655. goto chip_reset;
  656. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  657. (status & ATH9K_INT_BB_WATCHDOG)) {
  658. spin_lock(&common->cc_lock);
  659. ath_hw_cycle_counters_update(common);
  660. ar9003_hw_bb_watchdog_dbg_info(ah);
  661. spin_unlock(&common->cc_lock);
  662. goto chip_reset;
  663. }
  664. if (status & ATH9K_INT_SWBA)
  665. tasklet_schedule(&sc->bcon_tasklet);
  666. if (status & ATH9K_INT_TXURN)
  667. ath9k_hw_updatetxtriglevel(ah, true);
  668. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  669. if (status & ATH9K_INT_RXEOL) {
  670. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  671. ath9k_hw_set_interrupts(ah, ah->imask);
  672. }
  673. }
  674. if (status & ATH9K_INT_MIB) {
  675. /*
  676. * Disable interrupts until we service the MIB
  677. * interrupt; otherwise it will continue to
  678. * fire.
  679. */
  680. ath9k_hw_disable_interrupts(ah);
  681. /*
  682. * Let the hal handle the event. We assume
  683. * it will clear whatever condition caused
  684. * the interrupt.
  685. */
  686. spin_lock(&common->cc_lock);
  687. ath9k_hw_proc_mib_event(ah);
  688. spin_unlock(&common->cc_lock);
  689. ath9k_hw_enable_interrupts(ah);
  690. }
  691. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  692. if (status & ATH9K_INT_TIM_TIMER) {
  693. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  694. goto chip_reset;
  695. /* Clear RxAbort bit so that we can
  696. * receive frames */
  697. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  698. ath9k_hw_setrxabort(sc->sc_ah, 0);
  699. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  700. }
  701. chip_reset:
  702. ath_debug_stat_interrupt(sc, status);
  703. if (sched) {
  704. /* turn off every interrupt */
  705. ath9k_hw_disable_interrupts(ah);
  706. tasklet_schedule(&sc->intr_tq);
  707. }
  708. return IRQ_HANDLED;
  709. #undef SCHED_INTR
  710. }
  711. static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  712. {
  713. struct ath_hw *ah = sc->sc_ah;
  714. struct ath_common *common = ath9k_hw_common(ah);
  715. struct ieee80211_channel *channel = hw->conf.channel;
  716. int r;
  717. ath9k_ps_wakeup(sc);
  718. spin_lock_bh(&sc->sc_pcu_lock);
  719. ath9k_hw_configpcipowersave(ah, 0, 0);
  720. if (!ah->curchan)
  721. ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
  722. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  723. if (r) {
  724. ath_err(common,
  725. "Unable to reset channel (%u MHz), reset status %d\n",
  726. channel->center_freq, r);
  727. }
  728. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  729. sc->config.txpowlimit, &sc->curtxpow);
  730. if (ath_startrecv(sc) != 0) {
  731. ath_err(common, "Unable to restart recv logic\n");
  732. goto out;
  733. }
  734. if (sc->sc_flags & SC_OP_BEACONS)
  735. ath_set_beacon(sc); /* restart beacons */
  736. /* Re-Enable interrupts */
  737. ath9k_hw_set_interrupts(ah, ah->imask);
  738. /* Enable LED */
  739. ath9k_hw_cfg_output(ah, ah->led_pin,
  740. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  741. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  742. ieee80211_wake_queues(hw);
  743. ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
  744. out:
  745. spin_unlock_bh(&sc->sc_pcu_lock);
  746. ath9k_ps_restore(sc);
  747. }
  748. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  749. {
  750. struct ath_hw *ah = sc->sc_ah;
  751. struct ieee80211_channel *channel = hw->conf.channel;
  752. int r;
  753. ath9k_ps_wakeup(sc);
  754. cancel_delayed_work_sync(&sc->hw_pll_work);
  755. spin_lock_bh(&sc->sc_pcu_lock);
  756. ieee80211_stop_queues(hw);
  757. /*
  758. * Keep the LED on when the radio is disabled
  759. * during idle unassociated state.
  760. */
  761. if (!sc->ps_idle) {
  762. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  763. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  764. }
  765. /* Disable interrupts */
  766. ath9k_hw_disable_interrupts(ah);
  767. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  768. ath_stoprecv(sc); /* turn off frame recv */
  769. ath_flushrecv(sc); /* flush recv queue */
  770. if (!ah->curchan)
  771. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  772. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  773. if (r) {
  774. ath_err(ath9k_hw_common(sc->sc_ah),
  775. "Unable to reset channel (%u MHz), reset status %d\n",
  776. channel->center_freq, r);
  777. }
  778. ath9k_hw_phy_disable(ah);
  779. ath9k_hw_configpcipowersave(ah, 1, 1);
  780. spin_unlock_bh(&sc->sc_pcu_lock);
  781. ath9k_ps_restore(sc);
  782. }
  783. int ath_reset(struct ath_softc *sc, bool retry_tx)
  784. {
  785. struct ath_hw *ah = sc->sc_ah;
  786. struct ath_common *common = ath9k_hw_common(ah);
  787. struct ieee80211_hw *hw = sc->hw;
  788. int r;
  789. sc->hw_busy_count = 0;
  790. /* Stop ANI */
  791. del_timer_sync(&common->ani.timer);
  792. ath9k_ps_wakeup(sc);
  793. spin_lock_bh(&sc->sc_pcu_lock);
  794. ieee80211_stop_queues(hw);
  795. ath9k_hw_disable_interrupts(ah);
  796. ath_drain_all_txq(sc, retry_tx);
  797. ath_stoprecv(sc);
  798. ath_flushrecv(sc);
  799. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  800. if (r)
  801. ath_err(common,
  802. "Unable to reset hardware; reset status %d\n", r);
  803. if (ath_startrecv(sc) != 0)
  804. ath_err(common, "Unable to start recv logic\n");
  805. /*
  806. * We may be doing a reset in response to a request
  807. * that changes the channel so update any state that
  808. * might change as a result.
  809. */
  810. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  811. sc->config.txpowlimit, &sc->curtxpow);
  812. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  813. ath_set_beacon(sc); /* restart beacons */
  814. ath9k_hw_set_interrupts(ah, ah->imask);
  815. if (retry_tx) {
  816. int i;
  817. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  818. if (ATH_TXQ_SETUP(sc, i)) {
  819. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  820. ath_txq_schedule(sc, &sc->tx.txq[i]);
  821. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  822. }
  823. }
  824. }
  825. ieee80211_wake_queues(hw);
  826. spin_unlock_bh(&sc->sc_pcu_lock);
  827. /* Start ANI */
  828. ath_start_ani(common);
  829. ath9k_ps_restore(sc);
  830. return r;
  831. }
  832. /**********************/
  833. /* mac80211 callbacks */
  834. /**********************/
  835. static int ath9k_start(struct ieee80211_hw *hw)
  836. {
  837. struct ath_softc *sc = hw->priv;
  838. struct ath_hw *ah = sc->sc_ah;
  839. struct ath_common *common = ath9k_hw_common(ah);
  840. struct ieee80211_channel *curchan = hw->conf.channel;
  841. struct ath9k_channel *init_channel;
  842. int r;
  843. ath_dbg(common, ATH_DBG_CONFIG,
  844. "Starting driver with initial channel: %d MHz\n",
  845. curchan->center_freq);
  846. ath9k_ps_wakeup(sc);
  847. mutex_lock(&sc->mutex);
  848. /* setup initial channel */
  849. sc->chan_idx = curchan->hw_value;
  850. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  851. /* Reset SERDES registers */
  852. ath9k_hw_configpcipowersave(ah, 0, 0);
  853. /*
  854. * The basic interface to setting the hardware in a good
  855. * state is ``reset''. On return the hardware is known to
  856. * be powered up and with interrupts disabled. This must
  857. * be followed by initialization of the appropriate bits
  858. * and then setup of the interrupt mask.
  859. */
  860. spin_lock_bh(&sc->sc_pcu_lock);
  861. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  862. if (r) {
  863. ath_err(common,
  864. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  865. r, curchan->center_freq);
  866. spin_unlock_bh(&sc->sc_pcu_lock);
  867. goto mutex_unlock;
  868. }
  869. /*
  870. * This is needed only to setup initial state
  871. * but it's best done after a reset.
  872. */
  873. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  874. sc->config.txpowlimit, &sc->curtxpow);
  875. /*
  876. * Setup the hardware after reset:
  877. * The receive engine is set going.
  878. * Frame transmit is handled entirely
  879. * in the frame output path; there's nothing to do
  880. * here except setup the interrupt mask.
  881. */
  882. if (ath_startrecv(sc) != 0) {
  883. ath_err(common, "Unable to start recv logic\n");
  884. r = -EIO;
  885. spin_unlock_bh(&sc->sc_pcu_lock);
  886. goto mutex_unlock;
  887. }
  888. spin_unlock_bh(&sc->sc_pcu_lock);
  889. /* Setup our intr mask. */
  890. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  891. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  892. ATH9K_INT_GLOBAL;
  893. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  894. ah->imask |= ATH9K_INT_RXHP |
  895. ATH9K_INT_RXLP |
  896. ATH9K_INT_BB_WATCHDOG;
  897. else
  898. ah->imask |= ATH9K_INT_RX;
  899. ah->imask |= ATH9K_INT_GTT;
  900. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  901. ah->imask |= ATH9K_INT_CST;
  902. sc->sc_flags &= ~SC_OP_INVALID;
  903. sc->sc_ah->is_monitoring = false;
  904. /* Disable BMISS interrupt when we're not associated */
  905. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  906. ath9k_hw_set_interrupts(ah, ah->imask);
  907. ieee80211_wake_queues(hw);
  908. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  909. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  910. !ah->btcoex_hw.enabled) {
  911. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  912. AR_STOMP_LOW_WLAN_WGHT);
  913. ath9k_hw_btcoex_enable(ah);
  914. if (common->bus_ops->bt_coex_prep)
  915. common->bus_ops->bt_coex_prep(common);
  916. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  917. ath9k_btcoex_timer_resume(sc);
  918. }
  919. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  920. common->bus_ops->extn_synch_en(common);
  921. mutex_unlock:
  922. mutex_unlock(&sc->mutex);
  923. ath9k_ps_restore(sc);
  924. return r;
  925. }
  926. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  927. {
  928. struct ath_softc *sc = hw->priv;
  929. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  930. struct ath_tx_control txctl;
  931. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  932. if (sc->ps_enabled) {
  933. /*
  934. * mac80211 does not set PM field for normal data frames, so we
  935. * need to update that based on the current PS mode.
  936. */
  937. if (ieee80211_is_data(hdr->frame_control) &&
  938. !ieee80211_is_nullfunc(hdr->frame_control) &&
  939. !ieee80211_has_pm(hdr->frame_control)) {
  940. ath_dbg(common, ATH_DBG_PS,
  941. "Add PM=1 for a TX frame while in PS mode\n");
  942. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  943. }
  944. }
  945. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  946. /*
  947. * We are using PS-Poll and mac80211 can request TX while in
  948. * power save mode. Need to wake up hardware for the TX to be
  949. * completed and if needed, also for RX of buffered frames.
  950. */
  951. ath9k_ps_wakeup(sc);
  952. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  953. ath9k_hw_setrxabort(sc->sc_ah, 0);
  954. if (ieee80211_is_pspoll(hdr->frame_control)) {
  955. ath_dbg(common, ATH_DBG_PS,
  956. "Sending PS-Poll to pick a buffered frame\n");
  957. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  958. } else {
  959. ath_dbg(common, ATH_DBG_PS,
  960. "Wake up to complete TX\n");
  961. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  962. }
  963. /*
  964. * The actual restore operation will happen only after
  965. * the sc_flags bit is cleared. We are just dropping
  966. * the ps_usecount here.
  967. */
  968. ath9k_ps_restore(sc);
  969. }
  970. memset(&txctl, 0, sizeof(struct ath_tx_control));
  971. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  972. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  973. if (ath_tx_start(hw, skb, &txctl) != 0) {
  974. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  975. goto exit;
  976. }
  977. return;
  978. exit:
  979. dev_kfree_skb_any(skb);
  980. }
  981. static void ath9k_stop(struct ieee80211_hw *hw)
  982. {
  983. struct ath_softc *sc = hw->priv;
  984. struct ath_hw *ah = sc->sc_ah;
  985. struct ath_common *common = ath9k_hw_common(ah);
  986. mutex_lock(&sc->mutex);
  987. cancel_delayed_work_sync(&sc->tx_complete_work);
  988. cancel_delayed_work_sync(&sc->hw_pll_work);
  989. cancel_work_sync(&sc->paprd_work);
  990. cancel_work_sync(&sc->hw_check_work);
  991. if (sc->sc_flags & SC_OP_INVALID) {
  992. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  993. mutex_unlock(&sc->mutex);
  994. return;
  995. }
  996. /* Ensure HW is awake when we try to shut it down. */
  997. ath9k_ps_wakeup(sc);
  998. if (ah->btcoex_hw.enabled) {
  999. ath9k_hw_btcoex_disable(ah);
  1000. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1001. ath9k_btcoex_timer_pause(sc);
  1002. }
  1003. spin_lock_bh(&sc->sc_pcu_lock);
  1004. /* prevent tasklets to enable interrupts once we disable them */
  1005. ah->imask &= ~ATH9K_INT_GLOBAL;
  1006. /* make sure h/w will not generate any interrupt
  1007. * before setting the invalid flag. */
  1008. ath9k_hw_disable_interrupts(ah);
  1009. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1010. ath_drain_all_txq(sc, false);
  1011. ath_stoprecv(sc);
  1012. ath9k_hw_phy_disable(ah);
  1013. } else
  1014. sc->rx.rxlink = NULL;
  1015. if (sc->rx.frag) {
  1016. dev_kfree_skb_any(sc->rx.frag);
  1017. sc->rx.frag = NULL;
  1018. }
  1019. /* disable HAL and put h/w to sleep */
  1020. ath9k_hw_disable(ah);
  1021. ath9k_hw_configpcipowersave(ah, 1, 1);
  1022. spin_unlock_bh(&sc->sc_pcu_lock);
  1023. /* we can now sync irq and kill any running tasklets, since we already
  1024. * disabled interrupts and not holding a spin lock */
  1025. synchronize_irq(sc->irq);
  1026. tasklet_kill(&sc->intr_tq);
  1027. tasklet_kill(&sc->bcon_tasklet);
  1028. ath9k_ps_restore(sc);
  1029. sc->ps_idle = true;
  1030. ath_radio_disable(sc, hw);
  1031. sc->sc_flags |= SC_OP_INVALID;
  1032. mutex_unlock(&sc->mutex);
  1033. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1034. }
  1035. bool ath9k_uses_beacons(int type)
  1036. {
  1037. switch (type) {
  1038. case NL80211_IFTYPE_AP:
  1039. case NL80211_IFTYPE_ADHOC:
  1040. case NL80211_IFTYPE_MESH_POINT:
  1041. return true;
  1042. default:
  1043. return false;
  1044. }
  1045. }
  1046. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1047. struct ieee80211_vif *vif)
  1048. {
  1049. struct ath_vif *avp = (void *)vif->drv_priv;
  1050. ath9k_set_beaconing_status(sc, false);
  1051. ath_beacon_return(sc, avp);
  1052. ath9k_set_beaconing_status(sc, true);
  1053. sc->sc_flags &= ~SC_OP_BEACONS;
  1054. }
  1055. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1056. {
  1057. struct ath9k_vif_iter_data *iter_data = data;
  1058. int i;
  1059. if (iter_data->hw_macaddr)
  1060. for (i = 0; i < ETH_ALEN; i++)
  1061. iter_data->mask[i] &=
  1062. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1063. switch (vif->type) {
  1064. case NL80211_IFTYPE_AP:
  1065. iter_data->naps++;
  1066. break;
  1067. case NL80211_IFTYPE_STATION:
  1068. iter_data->nstations++;
  1069. break;
  1070. case NL80211_IFTYPE_ADHOC:
  1071. iter_data->nadhocs++;
  1072. break;
  1073. case NL80211_IFTYPE_MESH_POINT:
  1074. iter_data->nmeshes++;
  1075. break;
  1076. case NL80211_IFTYPE_WDS:
  1077. iter_data->nwds++;
  1078. break;
  1079. default:
  1080. iter_data->nothers++;
  1081. break;
  1082. }
  1083. }
  1084. /* Called with sc->mutex held. */
  1085. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1086. struct ieee80211_vif *vif,
  1087. struct ath9k_vif_iter_data *iter_data)
  1088. {
  1089. struct ath_softc *sc = hw->priv;
  1090. struct ath_hw *ah = sc->sc_ah;
  1091. struct ath_common *common = ath9k_hw_common(ah);
  1092. /*
  1093. * Use the hardware MAC address as reference, the hardware uses it
  1094. * together with the BSSID mask when matching addresses.
  1095. */
  1096. memset(iter_data, 0, sizeof(*iter_data));
  1097. iter_data->hw_macaddr = common->macaddr;
  1098. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1099. if (vif)
  1100. ath9k_vif_iter(iter_data, vif->addr, vif);
  1101. /* Get list of all active MAC addresses */
  1102. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1103. iter_data);
  1104. }
  1105. /* Called with sc->mutex held. */
  1106. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1107. struct ieee80211_vif *vif)
  1108. {
  1109. struct ath_softc *sc = hw->priv;
  1110. struct ath_hw *ah = sc->sc_ah;
  1111. struct ath_common *common = ath9k_hw_common(ah);
  1112. struct ath9k_vif_iter_data iter_data;
  1113. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1114. /* Set BSSID mask. */
  1115. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1116. ath_hw_setbssidmask(common);
  1117. /* Set op-mode & TSF */
  1118. if (iter_data.naps > 0) {
  1119. ath9k_hw_set_tsfadjust(ah, 1);
  1120. sc->sc_flags |= SC_OP_TSF_RESET;
  1121. ah->opmode = NL80211_IFTYPE_AP;
  1122. } else {
  1123. ath9k_hw_set_tsfadjust(ah, 0);
  1124. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1125. if (iter_data.nmeshes)
  1126. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1127. else if (iter_data.nwds)
  1128. ah->opmode = NL80211_IFTYPE_AP;
  1129. else if (iter_data.nadhocs)
  1130. ah->opmode = NL80211_IFTYPE_ADHOC;
  1131. else
  1132. ah->opmode = NL80211_IFTYPE_STATION;
  1133. }
  1134. /*
  1135. * Enable MIB interrupts when there are hardware phy counters.
  1136. */
  1137. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1138. if (ah->config.enable_ani)
  1139. ah->imask |= ATH9K_INT_MIB;
  1140. ah->imask |= ATH9K_INT_TSFOOR;
  1141. } else {
  1142. ah->imask &= ~ATH9K_INT_MIB;
  1143. ah->imask &= ~ATH9K_INT_TSFOOR;
  1144. }
  1145. ath9k_hw_set_interrupts(ah, ah->imask);
  1146. /* Set up ANI */
  1147. if (iter_data.naps > 0) {
  1148. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1149. sc->sc_flags |= SC_OP_ANI_RUN;
  1150. ath_start_ani(common);
  1151. } else {
  1152. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1153. del_timer_sync(&common->ani.timer);
  1154. }
  1155. }
  1156. /* Called with sc->mutex held, vif counts set up properly. */
  1157. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1158. struct ieee80211_vif *vif)
  1159. {
  1160. struct ath_softc *sc = hw->priv;
  1161. ath9k_calculate_summary_state(hw, vif);
  1162. if (ath9k_uses_beacons(vif->type)) {
  1163. int error;
  1164. /* This may fail because upper levels do not have beacons
  1165. * properly configured yet. That's OK, we assume it
  1166. * will be properly configured and then we will be notified
  1167. * in the info_changed method and set up beacons properly
  1168. * there.
  1169. */
  1170. ath9k_set_beaconing_status(sc, false);
  1171. error = ath_beacon_alloc(sc, vif);
  1172. if (!error)
  1173. ath_beacon_config(sc, vif);
  1174. ath9k_set_beaconing_status(sc, true);
  1175. }
  1176. }
  1177. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1178. struct ieee80211_vif *vif)
  1179. {
  1180. struct ath_softc *sc = hw->priv;
  1181. struct ath_hw *ah = sc->sc_ah;
  1182. struct ath_common *common = ath9k_hw_common(ah);
  1183. int ret = 0;
  1184. ath9k_ps_wakeup(sc);
  1185. mutex_lock(&sc->mutex);
  1186. switch (vif->type) {
  1187. case NL80211_IFTYPE_STATION:
  1188. case NL80211_IFTYPE_WDS:
  1189. case NL80211_IFTYPE_ADHOC:
  1190. case NL80211_IFTYPE_AP:
  1191. case NL80211_IFTYPE_MESH_POINT:
  1192. break;
  1193. default:
  1194. ath_err(common, "Interface type %d not yet supported\n",
  1195. vif->type);
  1196. ret = -EOPNOTSUPP;
  1197. goto out;
  1198. }
  1199. if (ath9k_uses_beacons(vif->type)) {
  1200. if (sc->nbcnvifs >= ATH_BCBUF) {
  1201. ath_err(common, "Not enough beacon buffers when adding"
  1202. " new interface of type: %i\n",
  1203. vif->type);
  1204. ret = -ENOBUFS;
  1205. goto out;
  1206. }
  1207. }
  1208. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1209. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1210. sc->nvifs > 0)) {
  1211. ath_err(common, "Cannot create ADHOC interface when other"
  1212. " interfaces already exist.\n");
  1213. ret = -EINVAL;
  1214. goto out;
  1215. }
  1216. ath_dbg(common, ATH_DBG_CONFIG,
  1217. "Attach a VIF of type: %d\n", vif->type);
  1218. sc->nvifs++;
  1219. ath9k_do_vif_add_setup(hw, vif);
  1220. out:
  1221. mutex_unlock(&sc->mutex);
  1222. ath9k_ps_restore(sc);
  1223. return ret;
  1224. }
  1225. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1226. struct ieee80211_vif *vif,
  1227. enum nl80211_iftype new_type,
  1228. bool p2p)
  1229. {
  1230. struct ath_softc *sc = hw->priv;
  1231. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1232. int ret = 0;
  1233. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1234. mutex_lock(&sc->mutex);
  1235. ath9k_ps_wakeup(sc);
  1236. /* See if new interface type is valid. */
  1237. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1238. (sc->nvifs > 1)) {
  1239. ath_err(common, "When using ADHOC, it must be the only"
  1240. " interface.\n");
  1241. ret = -EINVAL;
  1242. goto out;
  1243. }
  1244. if (ath9k_uses_beacons(new_type) &&
  1245. !ath9k_uses_beacons(vif->type)) {
  1246. if (sc->nbcnvifs >= ATH_BCBUF) {
  1247. ath_err(common, "No beacon slot available\n");
  1248. ret = -ENOBUFS;
  1249. goto out;
  1250. }
  1251. }
  1252. /* Clean up old vif stuff */
  1253. if (ath9k_uses_beacons(vif->type))
  1254. ath9k_reclaim_beacon(sc, vif);
  1255. /* Add new settings */
  1256. vif->type = new_type;
  1257. vif->p2p = p2p;
  1258. ath9k_do_vif_add_setup(hw, vif);
  1259. out:
  1260. ath9k_ps_restore(sc);
  1261. mutex_unlock(&sc->mutex);
  1262. return ret;
  1263. }
  1264. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1265. struct ieee80211_vif *vif)
  1266. {
  1267. struct ath_softc *sc = hw->priv;
  1268. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1269. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1270. ath9k_ps_wakeup(sc);
  1271. mutex_lock(&sc->mutex);
  1272. sc->nvifs--;
  1273. /* Reclaim beacon resources */
  1274. if (ath9k_uses_beacons(vif->type))
  1275. ath9k_reclaim_beacon(sc, vif);
  1276. ath9k_calculate_summary_state(hw, NULL);
  1277. mutex_unlock(&sc->mutex);
  1278. ath9k_ps_restore(sc);
  1279. }
  1280. static void ath9k_enable_ps(struct ath_softc *sc)
  1281. {
  1282. struct ath_hw *ah = sc->sc_ah;
  1283. sc->ps_enabled = true;
  1284. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1285. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1286. ah->imask |= ATH9K_INT_TIM_TIMER;
  1287. ath9k_hw_set_interrupts(ah, ah->imask);
  1288. }
  1289. ath9k_hw_setrxabort(ah, 1);
  1290. }
  1291. }
  1292. static void ath9k_disable_ps(struct ath_softc *sc)
  1293. {
  1294. struct ath_hw *ah = sc->sc_ah;
  1295. sc->ps_enabled = false;
  1296. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1297. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1298. ath9k_hw_setrxabort(ah, 0);
  1299. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1300. PS_WAIT_FOR_CAB |
  1301. PS_WAIT_FOR_PSPOLL_DATA |
  1302. PS_WAIT_FOR_TX_ACK);
  1303. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1304. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1305. ath9k_hw_set_interrupts(ah, ah->imask);
  1306. }
  1307. }
  1308. }
  1309. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1310. {
  1311. struct ath_softc *sc = hw->priv;
  1312. struct ath_hw *ah = sc->sc_ah;
  1313. struct ath_common *common = ath9k_hw_common(ah);
  1314. struct ieee80211_conf *conf = &hw->conf;
  1315. bool disable_radio = false;
  1316. mutex_lock(&sc->mutex);
  1317. /*
  1318. * Leave this as the first check because we need to turn on the
  1319. * radio if it was disabled before prior to processing the rest
  1320. * of the changes. Likewise we must only disable the radio towards
  1321. * the end.
  1322. */
  1323. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1324. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1325. if (!sc->ps_idle) {
  1326. ath_radio_enable(sc, hw);
  1327. ath_dbg(common, ATH_DBG_CONFIG,
  1328. "not-idle: enabling radio\n");
  1329. } else {
  1330. disable_radio = true;
  1331. }
  1332. }
  1333. /*
  1334. * We just prepare to enable PS. We have to wait until our AP has
  1335. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1336. * those ACKs and end up retransmitting the same null data frames.
  1337. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1338. */
  1339. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1340. unsigned long flags;
  1341. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1342. if (conf->flags & IEEE80211_CONF_PS)
  1343. ath9k_enable_ps(sc);
  1344. else
  1345. ath9k_disable_ps(sc);
  1346. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1347. }
  1348. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1349. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1350. ath_dbg(common, ATH_DBG_CONFIG,
  1351. "Monitor mode is enabled\n");
  1352. sc->sc_ah->is_monitoring = true;
  1353. } else {
  1354. ath_dbg(common, ATH_DBG_CONFIG,
  1355. "Monitor mode is disabled\n");
  1356. sc->sc_ah->is_monitoring = false;
  1357. }
  1358. }
  1359. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1360. struct ieee80211_channel *curchan = hw->conf.channel;
  1361. int pos = curchan->hw_value;
  1362. int old_pos = -1;
  1363. unsigned long flags;
  1364. if (ah->curchan)
  1365. old_pos = ah->curchan - &ah->channels[0];
  1366. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1367. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1368. else
  1369. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1370. ath_dbg(common, ATH_DBG_CONFIG,
  1371. "Set channel: %d MHz type: %d\n",
  1372. curchan->center_freq, conf->channel_type);
  1373. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1374. curchan, conf->channel_type);
  1375. /* update survey stats for the old channel before switching */
  1376. spin_lock_irqsave(&common->cc_lock, flags);
  1377. ath_update_survey_stats(sc);
  1378. spin_unlock_irqrestore(&common->cc_lock, flags);
  1379. /*
  1380. * If the operating channel changes, change the survey in-use flags
  1381. * along with it.
  1382. * Reset the survey data for the new channel, unless we're switching
  1383. * back to the operating channel from an off-channel operation.
  1384. */
  1385. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1386. sc->cur_survey != &sc->survey[pos]) {
  1387. if (sc->cur_survey)
  1388. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1389. sc->cur_survey = &sc->survey[pos];
  1390. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1391. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1392. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1393. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1394. }
  1395. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1396. ath_err(common, "Unable to set channel\n");
  1397. mutex_unlock(&sc->mutex);
  1398. return -EINVAL;
  1399. }
  1400. /*
  1401. * The most recent snapshot of channel->noisefloor for the old
  1402. * channel is only available after the hardware reset. Copy it to
  1403. * the survey stats now.
  1404. */
  1405. if (old_pos >= 0)
  1406. ath_update_survey_nf(sc, old_pos);
  1407. }
  1408. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1409. ath_dbg(common, ATH_DBG_CONFIG,
  1410. "Set power: %d\n", conf->power_level);
  1411. sc->config.txpowlimit = 2 * conf->power_level;
  1412. ath9k_ps_wakeup(sc);
  1413. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1414. sc->config.txpowlimit, &sc->curtxpow);
  1415. ath9k_ps_restore(sc);
  1416. }
  1417. if (disable_radio) {
  1418. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1419. ath_radio_disable(sc, hw);
  1420. }
  1421. mutex_unlock(&sc->mutex);
  1422. return 0;
  1423. }
  1424. #define SUPPORTED_FILTERS \
  1425. (FIF_PROMISC_IN_BSS | \
  1426. FIF_ALLMULTI | \
  1427. FIF_CONTROL | \
  1428. FIF_PSPOLL | \
  1429. FIF_OTHER_BSS | \
  1430. FIF_BCN_PRBRESP_PROMISC | \
  1431. FIF_PROBE_REQ | \
  1432. FIF_FCSFAIL)
  1433. /* FIXME: sc->sc_full_reset ? */
  1434. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1435. unsigned int changed_flags,
  1436. unsigned int *total_flags,
  1437. u64 multicast)
  1438. {
  1439. struct ath_softc *sc = hw->priv;
  1440. u32 rfilt;
  1441. changed_flags &= SUPPORTED_FILTERS;
  1442. *total_flags &= SUPPORTED_FILTERS;
  1443. sc->rx.rxfilter = *total_flags;
  1444. ath9k_ps_wakeup(sc);
  1445. rfilt = ath_calcrxfilter(sc);
  1446. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1447. ath9k_ps_restore(sc);
  1448. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1449. "Set HW RX filter: 0x%x\n", rfilt);
  1450. }
  1451. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1452. struct ieee80211_vif *vif,
  1453. struct ieee80211_sta *sta)
  1454. {
  1455. struct ath_softc *sc = hw->priv;
  1456. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1457. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1458. struct ieee80211_key_conf ps_key = { };
  1459. ath_node_attach(sc, sta);
  1460. if (vif->type != NL80211_IFTYPE_AP &&
  1461. vif->type != NL80211_IFTYPE_AP_VLAN)
  1462. return 0;
  1463. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1464. return 0;
  1465. }
  1466. static void ath9k_del_ps_key(struct ath_softc *sc,
  1467. struct ieee80211_vif *vif,
  1468. struct ieee80211_sta *sta)
  1469. {
  1470. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1471. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1472. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1473. if (!an->ps_key)
  1474. return;
  1475. ath_key_delete(common, &ps_key);
  1476. }
  1477. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1478. struct ieee80211_vif *vif,
  1479. struct ieee80211_sta *sta)
  1480. {
  1481. struct ath_softc *sc = hw->priv;
  1482. ath9k_del_ps_key(sc, vif, sta);
  1483. ath_node_detach(sc, sta);
  1484. return 0;
  1485. }
  1486. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1487. struct ieee80211_vif *vif,
  1488. enum sta_notify_cmd cmd,
  1489. struct ieee80211_sta *sta)
  1490. {
  1491. struct ath_softc *sc = hw->priv;
  1492. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1493. switch (cmd) {
  1494. case STA_NOTIFY_SLEEP:
  1495. an->sleeping = true;
  1496. if (ath_tx_aggr_sleep(sc, an))
  1497. ieee80211_sta_set_tim(sta);
  1498. break;
  1499. case STA_NOTIFY_AWAKE:
  1500. an->sleeping = false;
  1501. ath_tx_aggr_wakeup(sc, an);
  1502. break;
  1503. }
  1504. }
  1505. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1506. const struct ieee80211_tx_queue_params *params)
  1507. {
  1508. struct ath_softc *sc = hw->priv;
  1509. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1510. struct ath_txq *txq;
  1511. struct ath9k_tx_queue_info qi;
  1512. int ret = 0;
  1513. if (queue >= WME_NUM_AC)
  1514. return 0;
  1515. txq = sc->tx.txq_map[queue];
  1516. ath9k_ps_wakeup(sc);
  1517. mutex_lock(&sc->mutex);
  1518. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1519. qi.tqi_aifs = params->aifs;
  1520. qi.tqi_cwmin = params->cw_min;
  1521. qi.tqi_cwmax = params->cw_max;
  1522. qi.tqi_burstTime = params->txop;
  1523. ath_dbg(common, ATH_DBG_CONFIG,
  1524. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1525. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1526. params->cw_max, params->txop);
  1527. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1528. if (ret)
  1529. ath_err(common, "TXQ Update failed\n");
  1530. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1531. if (queue == WME_AC_BE && !ret)
  1532. ath_beaconq_config(sc);
  1533. mutex_unlock(&sc->mutex);
  1534. ath9k_ps_restore(sc);
  1535. return ret;
  1536. }
  1537. static int ath9k_set_key(struct ieee80211_hw *hw,
  1538. enum set_key_cmd cmd,
  1539. struct ieee80211_vif *vif,
  1540. struct ieee80211_sta *sta,
  1541. struct ieee80211_key_conf *key)
  1542. {
  1543. struct ath_softc *sc = hw->priv;
  1544. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1545. int ret = 0;
  1546. if (ath9k_modparam_nohwcrypt)
  1547. return -ENOSPC;
  1548. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1549. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1550. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1551. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1552. /*
  1553. * For now, disable hw crypto for the RSN IBSS group keys. This
  1554. * could be optimized in the future to use a modified key cache
  1555. * design to support per-STA RX GTK, but until that gets
  1556. * implemented, use of software crypto for group addressed
  1557. * frames is a acceptable to allow RSN IBSS to be used.
  1558. */
  1559. return -EOPNOTSUPP;
  1560. }
  1561. mutex_lock(&sc->mutex);
  1562. ath9k_ps_wakeup(sc);
  1563. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1564. switch (cmd) {
  1565. case SET_KEY:
  1566. if (sta)
  1567. ath9k_del_ps_key(sc, vif, sta);
  1568. ret = ath_key_config(common, vif, sta, key);
  1569. if (ret >= 0) {
  1570. key->hw_key_idx = ret;
  1571. /* push IV and Michael MIC generation to stack */
  1572. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1573. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1574. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1575. if (sc->sc_ah->sw_mgmt_crypto &&
  1576. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1577. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1578. ret = 0;
  1579. }
  1580. break;
  1581. case DISABLE_KEY:
  1582. ath_key_delete(common, key);
  1583. break;
  1584. default:
  1585. ret = -EINVAL;
  1586. }
  1587. ath9k_ps_restore(sc);
  1588. mutex_unlock(&sc->mutex);
  1589. return ret;
  1590. }
  1591. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1592. {
  1593. struct ath_softc *sc = data;
  1594. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1595. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1596. struct ath_vif *avp = (void *)vif->drv_priv;
  1597. /*
  1598. * Skip iteration if primary station vif's bss info
  1599. * was not changed
  1600. */
  1601. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1602. return;
  1603. if (bss_conf->assoc) {
  1604. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1605. avp->primary_sta_vif = true;
  1606. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1607. common->curaid = bss_conf->aid;
  1608. ath9k_hw_write_associd(sc->sc_ah);
  1609. ath_dbg(common, ATH_DBG_CONFIG,
  1610. "Bss Info ASSOC %d, bssid: %pM\n",
  1611. bss_conf->aid, common->curbssid);
  1612. ath_beacon_config(sc, vif);
  1613. /*
  1614. * Request a re-configuration of Beacon related timers
  1615. * on the receipt of the first Beacon frame (i.e.,
  1616. * after time sync with the AP).
  1617. */
  1618. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1619. /* Reset rssi stats */
  1620. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1621. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1622. sc->sc_flags |= SC_OP_ANI_RUN;
  1623. ath_start_ani(common);
  1624. }
  1625. }
  1626. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1627. {
  1628. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1629. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1630. struct ath_vif *avp = (void *)vif->drv_priv;
  1631. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1632. return;
  1633. /* Reconfigure bss info */
  1634. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1635. ath_dbg(common, ATH_DBG_CONFIG,
  1636. "Bss Info DISASSOC %d, bssid %pM\n",
  1637. common->curaid, common->curbssid);
  1638. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1639. avp->primary_sta_vif = false;
  1640. memset(common->curbssid, 0, ETH_ALEN);
  1641. common->curaid = 0;
  1642. }
  1643. ieee80211_iterate_active_interfaces_atomic(
  1644. sc->hw, ath9k_bss_iter, sc);
  1645. /*
  1646. * None of station vifs are associated.
  1647. * Clear bssid & aid
  1648. */
  1649. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1650. ath9k_hw_write_associd(sc->sc_ah);
  1651. /* Stop ANI */
  1652. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1653. del_timer_sync(&common->ani.timer);
  1654. }
  1655. }
  1656. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1657. struct ieee80211_vif *vif,
  1658. struct ieee80211_bss_conf *bss_conf,
  1659. u32 changed)
  1660. {
  1661. struct ath_softc *sc = hw->priv;
  1662. struct ath_hw *ah = sc->sc_ah;
  1663. struct ath_common *common = ath9k_hw_common(ah);
  1664. struct ath_vif *avp = (void *)vif->drv_priv;
  1665. int slottime;
  1666. int error;
  1667. ath9k_ps_wakeup(sc);
  1668. mutex_lock(&sc->mutex);
  1669. if (changed & BSS_CHANGED_BSSID) {
  1670. ath9k_config_bss(sc, vif);
  1671. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1672. common->curbssid, common->curaid);
  1673. }
  1674. if (changed & BSS_CHANGED_IBSS) {
  1675. /* There can be only one vif available */
  1676. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1677. common->curaid = bss_conf->aid;
  1678. ath9k_hw_write_associd(sc->sc_ah);
  1679. if (bss_conf->ibss_joined) {
  1680. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1681. sc->sc_flags |= SC_OP_ANI_RUN;
  1682. ath_start_ani(common);
  1683. } else {
  1684. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1685. del_timer_sync(&common->ani.timer);
  1686. }
  1687. }
  1688. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1689. if ((changed & BSS_CHANGED_BEACON) ||
  1690. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1691. ath9k_set_beaconing_status(sc, false);
  1692. error = ath_beacon_alloc(sc, vif);
  1693. if (!error)
  1694. ath_beacon_config(sc, vif);
  1695. ath9k_set_beaconing_status(sc, true);
  1696. }
  1697. if (changed & BSS_CHANGED_ERP_SLOT) {
  1698. if (bss_conf->use_short_slot)
  1699. slottime = 9;
  1700. else
  1701. slottime = 20;
  1702. if (vif->type == NL80211_IFTYPE_AP) {
  1703. /*
  1704. * Defer update, so that connected stations can adjust
  1705. * their settings at the same time.
  1706. * See beacon.c for more details
  1707. */
  1708. sc->beacon.slottime = slottime;
  1709. sc->beacon.updateslot = UPDATE;
  1710. } else {
  1711. ah->slottime = slottime;
  1712. ath9k_hw_init_global_settings(ah);
  1713. }
  1714. }
  1715. /* Disable transmission of beacons */
  1716. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1717. !bss_conf->enable_beacon) {
  1718. ath9k_set_beaconing_status(sc, false);
  1719. avp->is_bslot_active = false;
  1720. ath9k_set_beaconing_status(sc, true);
  1721. }
  1722. if (changed & BSS_CHANGED_BEACON_INT) {
  1723. /*
  1724. * In case of AP mode, the HW TSF has to be reset
  1725. * when the beacon interval changes.
  1726. */
  1727. if (vif->type == NL80211_IFTYPE_AP) {
  1728. sc->sc_flags |= SC_OP_TSF_RESET;
  1729. ath9k_set_beaconing_status(sc, false);
  1730. error = ath_beacon_alloc(sc, vif);
  1731. if (!error)
  1732. ath_beacon_config(sc, vif);
  1733. ath9k_set_beaconing_status(sc, true);
  1734. } else
  1735. ath_beacon_config(sc, vif);
  1736. }
  1737. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1738. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1739. bss_conf->use_short_preamble);
  1740. if (bss_conf->use_short_preamble)
  1741. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1742. else
  1743. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1744. }
  1745. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1746. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1747. bss_conf->use_cts_prot);
  1748. if (bss_conf->use_cts_prot &&
  1749. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1750. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1751. else
  1752. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1753. }
  1754. mutex_unlock(&sc->mutex);
  1755. ath9k_ps_restore(sc);
  1756. }
  1757. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1758. {
  1759. struct ath_softc *sc = hw->priv;
  1760. u64 tsf;
  1761. mutex_lock(&sc->mutex);
  1762. ath9k_ps_wakeup(sc);
  1763. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1764. ath9k_ps_restore(sc);
  1765. mutex_unlock(&sc->mutex);
  1766. return tsf;
  1767. }
  1768. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1769. {
  1770. struct ath_softc *sc = hw->priv;
  1771. mutex_lock(&sc->mutex);
  1772. ath9k_ps_wakeup(sc);
  1773. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1774. ath9k_ps_restore(sc);
  1775. mutex_unlock(&sc->mutex);
  1776. }
  1777. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1778. {
  1779. struct ath_softc *sc = hw->priv;
  1780. mutex_lock(&sc->mutex);
  1781. ath9k_ps_wakeup(sc);
  1782. ath9k_hw_reset_tsf(sc->sc_ah);
  1783. ath9k_ps_restore(sc);
  1784. mutex_unlock(&sc->mutex);
  1785. }
  1786. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1787. struct ieee80211_vif *vif,
  1788. enum ieee80211_ampdu_mlme_action action,
  1789. struct ieee80211_sta *sta,
  1790. u16 tid, u16 *ssn, u8 buf_size)
  1791. {
  1792. struct ath_softc *sc = hw->priv;
  1793. int ret = 0;
  1794. local_bh_disable();
  1795. switch (action) {
  1796. case IEEE80211_AMPDU_RX_START:
  1797. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1798. ret = -ENOTSUPP;
  1799. break;
  1800. case IEEE80211_AMPDU_RX_STOP:
  1801. break;
  1802. case IEEE80211_AMPDU_TX_START:
  1803. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1804. return -EOPNOTSUPP;
  1805. ath9k_ps_wakeup(sc);
  1806. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1807. if (!ret)
  1808. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1809. ath9k_ps_restore(sc);
  1810. break;
  1811. case IEEE80211_AMPDU_TX_STOP:
  1812. ath9k_ps_wakeup(sc);
  1813. ath_tx_aggr_stop(sc, sta, tid);
  1814. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1815. ath9k_ps_restore(sc);
  1816. break;
  1817. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1818. ath9k_ps_wakeup(sc);
  1819. ath_tx_aggr_resume(sc, sta, tid);
  1820. ath9k_ps_restore(sc);
  1821. break;
  1822. default:
  1823. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1824. }
  1825. local_bh_enable();
  1826. return ret;
  1827. }
  1828. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1829. struct survey_info *survey)
  1830. {
  1831. struct ath_softc *sc = hw->priv;
  1832. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1833. struct ieee80211_supported_band *sband;
  1834. struct ieee80211_channel *chan;
  1835. unsigned long flags;
  1836. int pos;
  1837. spin_lock_irqsave(&common->cc_lock, flags);
  1838. if (idx == 0)
  1839. ath_update_survey_stats(sc);
  1840. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1841. if (sband && idx >= sband->n_channels) {
  1842. idx -= sband->n_channels;
  1843. sband = NULL;
  1844. }
  1845. if (!sband)
  1846. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1847. if (!sband || idx >= sband->n_channels) {
  1848. spin_unlock_irqrestore(&common->cc_lock, flags);
  1849. return -ENOENT;
  1850. }
  1851. chan = &sband->channels[idx];
  1852. pos = chan->hw_value;
  1853. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1854. survey->channel = chan;
  1855. spin_unlock_irqrestore(&common->cc_lock, flags);
  1856. return 0;
  1857. }
  1858. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1859. {
  1860. struct ath_softc *sc = hw->priv;
  1861. struct ath_hw *ah = sc->sc_ah;
  1862. mutex_lock(&sc->mutex);
  1863. ah->coverage_class = coverage_class;
  1864. ath9k_hw_init_global_settings(ah);
  1865. mutex_unlock(&sc->mutex);
  1866. }
  1867. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1868. {
  1869. struct ath_softc *sc = hw->priv;
  1870. struct ath_hw *ah = sc->sc_ah;
  1871. struct ath_common *common = ath9k_hw_common(ah);
  1872. int timeout = 200; /* ms */
  1873. int i, j;
  1874. bool drain_txq;
  1875. mutex_lock(&sc->mutex);
  1876. cancel_delayed_work_sync(&sc->tx_complete_work);
  1877. if (sc->sc_flags & SC_OP_INVALID) {
  1878. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1879. mutex_unlock(&sc->mutex);
  1880. return;
  1881. }
  1882. if (drop)
  1883. timeout = 1;
  1884. for (j = 0; j < timeout; j++) {
  1885. bool npend = false;
  1886. if (j)
  1887. usleep_range(1000, 2000);
  1888. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1889. if (!ATH_TXQ_SETUP(sc, i))
  1890. continue;
  1891. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1892. if (npend)
  1893. break;
  1894. }
  1895. if (!npend)
  1896. goto out;
  1897. }
  1898. ath9k_ps_wakeup(sc);
  1899. spin_lock_bh(&sc->sc_pcu_lock);
  1900. drain_txq = ath_drain_all_txq(sc, false);
  1901. spin_unlock_bh(&sc->sc_pcu_lock);
  1902. if (!drain_txq)
  1903. ath_reset(sc, false);
  1904. ath9k_ps_restore(sc);
  1905. ieee80211_wake_queues(hw);
  1906. out:
  1907. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1908. mutex_unlock(&sc->mutex);
  1909. }
  1910. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1911. {
  1912. struct ath_softc *sc = hw->priv;
  1913. int i;
  1914. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1915. if (!ATH_TXQ_SETUP(sc, i))
  1916. continue;
  1917. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1918. return true;
  1919. }
  1920. return false;
  1921. }
  1922. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1923. {
  1924. struct ath_softc *sc = hw->priv;
  1925. struct ath_hw *ah = sc->sc_ah;
  1926. struct ieee80211_vif *vif;
  1927. struct ath_vif *avp;
  1928. struct ath_buf *bf;
  1929. struct ath_tx_status ts;
  1930. int status;
  1931. vif = sc->beacon.bslot[0];
  1932. if (!vif)
  1933. return 0;
  1934. avp = (void *)vif->drv_priv;
  1935. if (!avp->is_bslot_active)
  1936. return 0;
  1937. if (!sc->beacon.tx_processed) {
  1938. tasklet_disable(&sc->bcon_tasklet);
  1939. bf = avp->av_bcbuf;
  1940. if (!bf || !bf->bf_mpdu)
  1941. goto skip;
  1942. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1943. if (status == -EINPROGRESS)
  1944. goto skip;
  1945. sc->beacon.tx_processed = true;
  1946. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1947. skip:
  1948. tasklet_enable(&sc->bcon_tasklet);
  1949. }
  1950. return sc->beacon.tx_last;
  1951. }
  1952. struct ieee80211_ops ath9k_ops = {
  1953. .tx = ath9k_tx,
  1954. .start = ath9k_start,
  1955. .stop = ath9k_stop,
  1956. .add_interface = ath9k_add_interface,
  1957. .change_interface = ath9k_change_interface,
  1958. .remove_interface = ath9k_remove_interface,
  1959. .config = ath9k_config,
  1960. .configure_filter = ath9k_configure_filter,
  1961. .sta_add = ath9k_sta_add,
  1962. .sta_remove = ath9k_sta_remove,
  1963. .sta_notify = ath9k_sta_notify,
  1964. .conf_tx = ath9k_conf_tx,
  1965. .bss_info_changed = ath9k_bss_info_changed,
  1966. .set_key = ath9k_set_key,
  1967. .get_tsf = ath9k_get_tsf,
  1968. .set_tsf = ath9k_set_tsf,
  1969. .reset_tsf = ath9k_reset_tsf,
  1970. .ampdu_action = ath9k_ampdu_action,
  1971. .get_survey = ath9k_get_survey,
  1972. .rfkill_poll = ath9k_rfkill_poll_state,
  1973. .set_coverage_class = ath9k_set_coverage_class,
  1974. .flush = ath9k_flush,
  1975. .tx_frames_pending = ath9k_tx_frames_pending,
  1976. .tx_last_beacon = ath9k_tx_last_beacon,
  1977. };