p54common.c 42 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
  7. *
  8. * Based on the islsm (softmac prism54) driver, which is:
  9. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/firmware.h>
  17. #include <linux/etherdevice.h>
  18. #include <net/mac80211.h>
  19. #include "p54.h"
  20. #include "p54common.h"
  21. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  22. MODULE_DESCRIPTION("Softmac Prism54 common code");
  23. MODULE_LICENSE("GPL");
  24. MODULE_ALIAS("prism54common");
  25. static struct ieee80211_rate p54_bgrates[] = {
  26. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  27. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  28. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  29. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  30. { .bitrate = 60, .hw_value = 4, },
  31. { .bitrate = 90, .hw_value = 5, },
  32. { .bitrate = 120, .hw_value = 6, },
  33. { .bitrate = 180, .hw_value = 7, },
  34. { .bitrate = 240, .hw_value = 8, },
  35. { .bitrate = 360, .hw_value = 9, },
  36. { .bitrate = 480, .hw_value = 10, },
  37. { .bitrate = 540, .hw_value = 11, },
  38. };
  39. static struct ieee80211_channel p54_bgchannels[] = {
  40. { .center_freq = 2412, .hw_value = 1, },
  41. { .center_freq = 2417, .hw_value = 2, },
  42. { .center_freq = 2422, .hw_value = 3, },
  43. { .center_freq = 2427, .hw_value = 4, },
  44. { .center_freq = 2432, .hw_value = 5, },
  45. { .center_freq = 2437, .hw_value = 6, },
  46. { .center_freq = 2442, .hw_value = 7, },
  47. { .center_freq = 2447, .hw_value = 8, },
  48. { .center_freq = 2452, .hw_value = 9, },
  49. { .center_freq = 2457, .hw_value = 10, },
  50. { .center_freq = 2462, .hw_value = 11, },
  51. { .center_freq = 2467, .hw_value = 12, },
  52. { .center_freq = 2472, .hw_value = 13, },
  53. { .center_freq = 2484, .hw_value = 14, },
  54. };
  55. static struct ieee80211_supported_band band_2GHz = {
  56. .channels = p54_bgchannels,
  57. .n_channels = ARRAY_SIZE(p54_bgchannels),
  58. .bitrates = p54_bgrates,
  59. .n_bitrates = ARRAY_SIZE(p54_bgrates),
  60. };
  61. static struct ieee80211_rate p54_arates[] = {
  62. { .bitrate = 60, .hw_value = 4, },
  63. { .bitrate = 90, .hw_value = 5, },
  64. { .bitrate = 120, .hw_value = 6, },
  65. { .bitrate = 180, .hw_value = 7, },
  66. { .bitrate = 240, .hw_value = 8, },
  67. { .bitrate = 360, .hw_value = 9, },
  68. { .bitrate = 480, .hw_value = 10, },
  69. { .bitrate = 540, .hw_value = 11, },
  70. };
  71. static struct ieee80211_channel p54_achannels[] = {
  72. { .center_freq = 4920 },
  73. { .center_freq = 4940 },
  74. { .center_freq = 4960 },
  75. { .center_freq = 4980 },
  76. { .center_freq = 5040 },
  77. { .center_freq = 5060 },
  78. { .center_freq = 5080 },
  79. { .center_freq = 5170 },
  80. { .center_freq = 5180 },
  81. { .center_freq = 5190 },
  82. { .center_freq = 5200 },
  83. { .center_freq = 5210 },
  84. { .center_freq = 5220 },
  85. { .center_freq = 5230 },
  86. { .center_freq = 5240 },
  87. { .center_freq = 5260 },
  88. { .center_freq = 5280 },
  89. { .center_freq = 5300 },
  90. { .center_freq = 5320 },
  91. { .center_freq = 5500 },
  92. { .center_freq = 5520 },
  93. { .center_freq = 5540 },
  94. { .center_freq = 5560 },
  95. { .center_freq = 5580 },
  96. { .center_freq = 5600 },
  97. { .center_freq = 5620 },
  98. { .center_freq = 5640 },
  99. { .center_freq = 5660 },
  100. { .center_freq = 5680 },
  101. { .center_freq = 5700 },
  102. { .center_freq = 5745 },
  103. { .center_freq = 5765 },
  104. { .center_freq = 5785 },
  105. { .center_freq = 5805 },
  106. { .center_freq = 5825 },
  107. };
  108. static struct ieee80211_supported_band band_5GHz = {
  109. .channels = p54_achannels,
  110. .n_channels = ARRAY_SIZE(p54_achannels),
  111. .bitrates = p54_arates,
  112. .n_bitrates = ARRAY_SIZE(p54_arates),
  113. };
  114. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  115. {
  116. struct p54_common *priv = dev->priv;
  117. struct bootrec_exp_if *exp_if;
  118. struct bootrec *bootrec;
  119. u32 *data = (u32 *)fw->data;
  120. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  121. u8 *fw_version = NULL;
  122. size_t len;
  123. int i;
  124. if (priv->rx_start)
  125. return 0;
  126. while (data < end_data && *data)
  127. data++;
  128. while (data < end_data && !*data)
  129. data++;
  130. bootrec = (struct bootrec *) data;
  131. while (bootrec->data <= end_data &&
  132. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  133. u32 code = le32_to_cpu(bootrec->code);
  134. switch (code) {
  135. case BR_CODE_COMPONENT_ID:
  136. priv->fw_interface = be32_to_cpup((__be32 *)
  137. bootrec->data);
  138. switch (priv->fw_interface) {
  139. case FW_FMAC:
  140. printk(KERN_INFO "p54: FreeMAC firmware\n");
  141. break;
  142. case FW_LM20:
  143. printk(KERN_INFO "p54: LM20 firmware\n");
  144. break;
  145. case FW_LM86:
  146. printk(KERN_INFO "p54: LM86 firmware\n");
  147. break;
  148. case FW_LM87:
  149. printk(KERN_INFO "p54: LM87 firmware\n");
  150. break;
  151. default:
  152. printk(KERN_INFO "p54: unknown firmware\n");
  153. break;
  154. }
  155. break;
  156. case BR_CODE_COMPONENT_VERSION:
  157. /* 24 bytes should be enough for all firmwares */
  158. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  159. fw_version = (unsigned char*)bootrec->data;
  160. break;
  161. case BR_CODE_DESCR: {
  162. struct bootrec_desc *desc =
  163. (struct bootrec_desc *)bootrec->data;
  164. priv->rx_start = le32_to_cpu(desc->rx_start);
  165. /* FIXME add sanity checking */
  166. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  167. priv->headroom = desc->headroom;
  168. priv->tailroom = desc->tailroom;
  169. if (le32_to_cpu(bootrec->len) == 11)
  170. priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
  171. else
  172. priv->rx_mtu = (size_t)
  173. 0x620 - priv->tx_hdr_len;
  174. break;
  175. }
  176. case BR_CODE_EXPOSED_IF:
  177. exp_if = (struct bootrec_exp_if *) bootrec->data;
  178. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  179. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  180. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  181. break;
  182. case BR_CODE_DEPENDENT_IF:
  183. break;
  184. case BR_CODE_END_OF_BRA:
  185. case LEGACY_BR_CODE_END_OF_BRA:
  186. end_data = NULL;
  187. break;
  188. default:
  189. break;
  190. }
  191. bootrec = (struct bootrec *)&bootrec->data[len];
  192. }
  193. if (fw_version)
  194. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  195. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  196. if (priv->fw_var >= 0x300) {
  197. /* Firmware supports QoS, use it! */
  198. priv->tx_stats[4].limit = 3;
  199. priv->tx_stats[5].limit = 4;
  200. priv->tx_stats[6].limit = 3;
  201. priv->tx_stats[7].limit = 1;
  202. dev->queues = 4;
  203. }
  204. return 0;
  205. }
  206. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  207. static int p54_convert_rev0(struct ieee80211_hw *dev,
  208. struct pda_pa_curve_data *curve_data)
  209. {
  210. struct p54_common *priv = dev->priv;
  211. struct p54_pa_curve_data_sample *dst;
  212. struct pda_pa_curve_data_sample_rev0 *src;
  213. size_t cd_len = sizeof(*curve_data) +
  214. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  215. curve_data->channels;
  216. unsigned int i, j;
  217. void *source, *target;
  218. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  219. if (!priv->curve_data)
  220. return -ENOMEM;
  221. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  222. source = curve_data->data;
  223. target = priv->curve_data->data;
  224. for (i = 0; i < curve_data->channels; i++) {
  225. __le16 *freq = source;
  226. source += sizeof(__le16);
  227. *((__le16 *)target) = *freq;
  228. target += sizeof(__le16);
  229. for (j = 0; j < curve_data->points_per_channel; j++) {
  230. dst = target;
  231. src = source;
  232. dst->rf_power = src->rf_power;
  233. dst->pa_detector = src->pa_detector;
  234. dst->data_64qam = src->pcv;
  235. /* "invent" the points for the other modulations */
  236. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  237. dst->data_16qam = SUB(src->pcv, 12);
  238. dst->data_qpsk = SUB(dst->data_16qam, 12);
  239. dst->data_bpsk = SUB(dst->data_qpsk, 12);
  240. dst->data_barker = SUB(dst->data_bpsk, 14);
  241. #undef SUB
  242. target += sizeof(*dst);
  243. source += sizeof(*src);
  244. }
  245. }
  246. return 0;
  247. }
  248. static int p54_convert_rev1(struct ieee80211_hw *dev,
  249. struct pda_pa_curve_data *curve_data)
  250. {
  251. struct p54_common *priv = dev->priv;
  252. struct p54_pa_curve_data_sample *dst;
  253. struct pda_pa_curve_data_sample_rev1 *src;
  254. size_t cd_len = sizeof(*curve_data) +
  255. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  256. curve_data->channels;
  257. unsigned int i, j;
  258. void *source, *target;
  259. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  260. if (!priv->curve_data)
  261. return -ENOMEM;
  262. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  263. source = curve_data->data;
  264. target = priv->curve_data->data;
  265. for (i = 0; i < curve_data->channels; i++) {
  266. __le16 *freq = source;
  267. source += sizeof(__le16);
  268. *((__le16 *)target) = *freq;
  269. target += sizeof(__le16);
  270. for (j = 0; j < curve_data->points_per_channel; j++) {
  271. memcpy(target, source, sizeof(*src));
  272. target += sizeof(*dst);
  273. source += sizeof(*src);
  274. }
  275. source++;
  276. }
  277. return 0;
  278. }
  279. static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
  280. "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
  281. static int p54_init_xbow_synth(struct ieee80211_hw *dev);
  282. static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  283. {
  284. struct p54_common *priv = dev->priv;
  285. struct eeprom_pda_wrap *wrap = NULL;
  286. struct pda_entry *entry;
  287. unsigned int data_len, entry_len;
  288. void *tmp;
  289. int err;
  290. u8 *end = (u8 *)eeprom + len;
  291. u16 synth = 0;
  292. wrap = (struct eeprom_pda_wrap *) eeprom;
  293. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  294. /* verify that at least the entry length/code fits */
  295. while ((u8 *)entry <= end - sizeof(*entry)) {
  296. entry_len = le16_to_cpu(entry->len);
  297. data_len = ((entry_len - 1) << 1);
  298. /* abort if entry exceeds whole structure */
  299. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  300. break;
  301. switch (le16_to_cpu(entry->code)) {
  302. case PDR_MAC_ADDRESS:
  303. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  304. break;
  305. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  306. if (data_len < 2) {
  307. err = -EINVAL;
  308. goto err;
  309. }
  310. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  311. err = -EINVAL;
  312. goto err;
  313. }
  314. priv->output_limit = kmalloc(entry->data[1] *
  315. sizeof(*priv->output_limit), GFP_KERNEL);
  316. if (!priv->output_limit) {
  317. err = -ENOMEM;
  318. goto err;
  319. }
  320. memcpy(priv->output_limit, &entry->data[2],
  321. entry->data[1]*sizeof(*priv->output_limit));
  322. priv->output_limit_len = entry->data[1];
  323. break;
  324. case PDR_PRISM_PA_CAL_CURVE_DATA: {
  325. struct pda_pa_curve_data *curve_data =
  326. (struct pda_pa_curve_data *)entry->data;
  327. if (data_len < sizeof(*curve_data)) {
  328. err = -EINVAL;
  329. goto err;
  330. }
  331. switch (curve_data->cal_method_rev) {
  332. case 0:
  333. err = p54_convert_rev0(dev, curve_data);
  334. break;
  335. case 1:
  336. err = p54_convert_rev1(dev, curve_data);
  337. break;
  338. default:
  339. printk(KERN_ERR "p54: unknown curve data "
  340. "revision %d\n",
  341. curve_data->cal_method_rev);
  342. err = -ENODEV;
  343. break;
  344. }
  345. if (err)
  346. goto err;
  347. }
  348. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  349. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  350. if (!priv->iq_autocal) {
  351. err = -ENOMEM;
  352. goto err;
  353. }
  354. memcpy(priv->iq_autocal, entry->data, data_len);
  355. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  356. break;
  357. case PDR_INTERFACE_LIST:
  358. tmp = entry->data;
  359. while ((u8 *)tmp < entry->data + data_len) {
  360. struct bootrec_exp_if *exp_if = tmp;
  361. if (le16_to_cpu(exp_if->if_id) == 0xf)
  362. synth = le16_to_cpu(exp_if->variant);
  363. tmp += sizeof(struct bootrec_exp_if);
  364. }
  365. break;
  366. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  367. priv->version = *(u8 *)(entry->data + 1);
  368. break;
  369. case PDR_END:
  370. /* make it overrun */
  371. entry_len = len;
  372. break;
  373. default:
  374. printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
  375. le16_to_cpu(entry->code));
  376. break;
  377. }
  378. entry = (void *)entry + (entry_len + 1)*2;
  379. }
  380. if (!synth || !priv->iq_autocal || !priv->output_limit ||
  381. !priv->curve_data) {
  382. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  383. err = -EINVAL;
  384. goto err;
  385. }
  386. priv->rxhw = synth & 0x07;
  387. if (priv->rxhw == 4)
  388. p54_init_xbow_synth(dev);
  389. if (!(synth & 0x40))
  390. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  391. if (!(synth & 0x80))
  392. dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
  393. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  394. u8 perm_addr[ETH_ALEN];
  395. printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
  396. wiphy_name(dev->wiphy));
  397. random_ether_addr(perm_addr);
  398. SET_IEEE80211_PERM_ADDR(dev, perm_addr);
  399. }
  400. printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
  401. wiphy_name(dev->wiphy),
  402. dev->wiphy->perm_addr,
  403. priv->version, p54_rf_chips[priv->rxhw]);
  404. return 0;
  405. err:
  406. if (priv->iq_autocal) {
  407. kfree(priv->iq_autocal);
  408. priv->iq_autocal = NULL;
  409. }
  410. if (priv->output_limit) {
  411. kfree(priv->output_limit);
  412. priv->output_limit = NULL;
  413. }
  414. if (priv->curve_data) {
  415. kfree(priv->curve_data);
  416. priv->curve_data = NULL;
  417. }
  418. printk(KERN_ERR "p54: eeprom parse failed!\n");
  419. return err;
  420. }
  421. static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
  422. {
  423. /* TODO: get the rssi_add & rssi_mul data from the eeprom */
  424. return ((rssi * 0x83) / 64 - 400) / 4;
  425. }
  426. static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  427. {
  428. struct p54_common *priv = dev->priv;
  429. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  430. struct ieee80211_rx_status rx_status = {0};
  431. u16 freq = le16_to_cpu(hdr->freq);
  432. size_t header_len = sizeof(*hdr);
  433. u32 tsf32;
  434. if (!(hdr->magic & cpu_to_le16(0x0001))) {
  435. if (priv->filter_flags & FIF_FCSFAIL)
  436. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  437. else
  438. return 0;
  439. }
  440. rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
  441. rx_status.noise = priv->noise;
  442. /* XX correct? */
  443. rx_status.qual = (100 * hdr->rssi) / 127;
  444. rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
  445. hdr->rate : (hdr->rate - 4)) & 0xf;
  446. rx_status.freq = freq;
  447. rx_status.band = dev->conf.channel->band;
  448. rx_status.antenna = hdr->antenna;
  449. tsf32 = le32_to_cpu(hdr->tsf32);
  450. if (tsf32 < priv->tsf_low32)
  451. priv->tsf_high32++;
  452. rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
  453. priv->tsf_low32 = tsf32;
  454. rx_status.flag |= RX_FLAG_TSFT;
  455. if (hdr->magic & cpu_to_le16(0x4000))
  456. header_len += hdr->align[0];
  457. skb_pull(skb, header_len);
  458. skb_trim(skb, le16_to_cpu(hdr->len));
  459. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  460. return -1;
  461. }
  462. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  463. {
  464. struct p54_common *priv = dev->priv;
  465. int i;
  466. if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
  467. return ;
  468. for (i = 0; i < dev->queues; i++)
  469. if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
  470. ieee80211_wake_queue(dev, i);
  471. }
  472. void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
  473. {
  474. struct p54_common *priv = dev->priv;
  475. struct ieee80211_tx_info *info;
  476. struct memrecord *range;
  477. unsigned long flags;
  478. u32 freed = 0, last_addr = priv->rx_start;
  479. if (!skb || !dev)
  480. return;
  481. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  482. info = IEEE80211_SKB_CB(skb);
  483. range = (void *)info->rate_driver_data;
  484. if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
  485. struct ieee80211_tx_info *ni;
  486. struct memrecord *mr;
  487. ni = IEEE80211_SKB_CB(skb->prev);
  488. mr = (struct memrecord *)ni->rate_driver_data;
  489. last_addr = mr->end_addr;
  490. }
  491. if (skb->next != (struct sk_buff *)&priv->tx_queue) {
  492. struct ieee80211_tx_info *ni;
  493. struct memrecord *mr;
  494. ni = IEEE80211_SKB_CB(skb->next);
  495. mr = (struct memrecord *)ni->rate_driver_data;
  496. freed = mr->start_addr - last_addr;
  497. } else
  498. freed = priv->rx_end - last_addr;
  499. __skb_unlink(skb, &priv->tx_queue);
  500. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  501. kfree_skb(skb);
  502. if (freed >= priv->headroom + sizeof(struct p54_control_hdr) + 48 +
  503. IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  504. p54_wake_free_queues(dev);
  505. }
  506. EXPORT_SYMBOL_GPL(p54_free_skb);
  507. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  508. {
  509. struct p54_common *priv = dev->priv;
  510. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  511. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  512. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  513. u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
  514. struct memrecord *range = NULL;
  515. u32 freed = 0;
  516. u32 last_addr = priv->rx_start;
  517. unsigned long flags;
  518. int count, idx;
  519. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  520. while (entry != (struct sk_buff *)&priv->tx_queue) {
  521. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  522. struct p54_control_hdr *entry_hdr;
  523. struct p54_tx_control_allocdata *entry_data;
  524. int pad = 0;
  525. range = (void *)info->rate_driver_data;
  526. if (range->start_addr != addr) {
  527. last_addr = range->end_addr;
  528. entry = entry->next;
  529. continue;
  530. }
  531. if (entry->next != (struct sk_buff *)&priv->tx_queue) {
  532. struct ieee80211_tx_info *ni;
  533. struct memrecord *mr;
  534. ni = IEEE80211_SKB_CB(entry->next);
  535. mr = (struct memrecord *)ni->rate_driver_data;
  536. freed = mr->start_addr - last_addr;
  537. } else
  538. freed = priv->rx_end - last_addr;
  539. last_addr = range->end_addr;
  540. __skb_unlink(entry, &priv->tx_queue);
  541. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  542. /*
  543. * Clear manually, ieee80211_tx_info_clear_status would
  544. * clear the counts too and we need them.
  545. */
  546. memset(&info->status.ampdu_ack_len, 0,
  547. sizeof(struct ieee80211_tx_info) -
  548. offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
  549. BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
  550. status.ampdu_ack_len) != 23);
  551. entry_hdr = (struct p54_control_hdr *) entry->data;
  552. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  553. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  554. pad = entry_data->align[0];
  555. /* walk through the rates array and adjust the counts */
  556. count = payload->retries;
  557. for (idx = 0; idx < 4; idx++) {
  558. if (count >= info->status.rates[idx].count) {
  559. count -= info->status.rates[idx].count;
  560. } else if (count > 0) {
  561. info->status.rates[idx].count = count;
  562. count = 0;
  563. } else {
  564. info->status.rates[idx].idx = -1;
  565. info->status.rates[idx].count = 0;
  566. }
  567. }
  568. priv->tx_stats[entry_data->hw_queue].len--;
  569. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
  570. (!payload->status))
  571. info->flags |= IEEE80211_TX_STAT_ACK;
  572. if (payload->status & 0x02)
  573. info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
  574. info->status.ack_signal = p54_rssi_to_dbm(dev,
  575. le16_to_cpu(payload->ack_rssi));
  576. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  577. ieee80211_tx_status_irqsafe(dev, entry);
  578. goto out;
  579. }
  580. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  581. out:
  582. if (freed >= priv->headroom + sizeof(struct p54_control_hdr) + 48 +
  583. IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  584. p54_wake_free_queues(dev);
  585. }
  586. static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
  587. struct sk_buff *skb)
  588. {
  589. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  590. struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
  591. struct p54_common *priv = dev->priv;
  592. if (!priv->eeprom)
  593. return ;
  594. memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
  595. complete(&priv->eeprom_comp);
  596. }
  597. static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
  598. {
  599. struct p54_common *priv = dev->priv;
  600. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  601. struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
  602. u32 tsf32 = le32_to_cpu(stats->tsf32);
  603. if (tsf32 < priv->tsf_low32)
  604. priv->tsf_high32++;
  605. priv->tsf_low32 = tsf32;
  606. priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
  607. priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
  608. priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
  609. priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
  610. complete(&priv->stats_comp);
  611. mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
  612. }
  613. static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  614. {
  615. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  616. switch (le16_to_cpu(hdr->type)) {
  617. case P54_CONTROL_TYPE_TXDONE:
  618. p54_rx_frame_sent(dev, skb);
  619. break;
  620. case P54_CONTROL_TYPE_BBP:
  621. break;
  622. case P54_CONTROL_TYPE_STAT_READBACK:
  623. p54_rx_stats(dev, skb);
  624. break;
  625. case P54_CONTROL_TYPE_EEPROM_READBACK:
  626. p54_rx_eeprom_readback(dev, skb);
  627. break;
  628. default:
  629. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  630. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  631. break;
  632. }
  633. return 0;
  634. }
  635. /* returns zero if skb can be reused */
  636. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  637. {
  638. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  639. if (type == 0x80)
  640. return p54_rx_control(dev, skb);
  641. else
  642. return p54_rx_data(dev, skb);
  643. }
  644. EXPORT_SYMBOL_GPL(p54_rx);
  645. /*
  646. * So, the firmware is somewhat stupid and doesn't know what places in its
  647. * memory incoming data should go to. By poking around in the firmware, we
  648. * can find some unused memory to upload our packets to. However, data that we
  649. * want the card to TX needs to stay intact until the card has told us that
  650. * it is done with it. This function finds empty places we can upload to and
  651. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  652. * allocated areas.
  653. */
  654. static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  655. struct p54_control_hdr *data, u32 len)
  656. {
  657. struct p54_common *priv = dev->priv;
  658. struct sk_buff *entry = priv->tx_queue.next;
  659. struct sk_buff *target_skb = NULL;
  660. struct ieee80211_tx_info *info;
  661. struct memrecord *range;
  662. u32 last_addr = priv->rx_start;
  663. u32 largest_hole = 0;
  664. u32 target_addr = priv->rx_start;
  665. unsigned long flags;
  666. unsigned int left;
  667. len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
  668. if (!skb)
  669. return -EINVAL;
  670. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  671. left = skb_queue_len(&priv->tx_queue);
  672. while (left--) {
  673. u32 hole_size;
  674. info = IEEE80211_SKB_CB(entry);
  675. range = (void *)info->rate_driver_data;
  676. hole_size = range->start_addr - last_addr;
  677. if (!target_skb && hole_size >= len) {
  678. target_skb = entry->prev;
  679. hole_size -= len;
  680. target_addr = last_addr;
  681. }
  682. largest_hole = max(largest_hole, hole_size);
  683. last_addr = range->end_addr;
  684. entry = entry->next;
  685. }
  686. if (!target_skb && priv->rx_end - last_addr >= len) {
  687. target_skb = priv->tx_queue.prev;
  688. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  689. if (!skb_queue_empty(&priv->tx_queue)) {
  690. info = IEEE80211_SKB_CB(target_skb);
  691. range = (void *)info->rate_driver_data;
  692. target_addr = range->end_addr;
  693. }
  694. } else
  695. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  696. if (!target_skb) {
  697. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  698. ieee80211_stop_queues(dev);
  699. return -ENOMEM;
  700. }
  701. info = IEEE80211_SKB_CB(skb);
  702. range = (void *)info->rate_driver_data;
  703. range->start_addr = target_addr;
  704. range->end_addr = target_addr + len;
  705. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  706. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  707. if (largest_hole < priv->headroom + sizeof(struct p54_control_hdr) +
  708. 48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  709. ieee80211_stop_queues(dev);
  710. data->req_id = cpu_to_le32(target_addr + priv->headroom);
  711. return 0;
  712. }
  713. static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev,
  714. u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
  715. {
  716. struct p54_common *priv = dev->priv;
  717. struct p54_control_hdr *hdr;
  718. struct sk_buff *skb;
  719. skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
  720. if (!skb)
  721. return NULL;
  722. skb_reserve(skb, priv->tx_hdr_len);
  723. hdr = (struct p54_control_hdr *) skb_put(skb, sizeof(*hdr));
  724. hdr->magic1 = cpu_to_le16(hdr_flags);
  725. hdr->len = cpu_to_le16(len - sizeof(*hdr));
  726. hdr->type = cpu_to_le16(type);
  727. hdr->retry1 = hdr->retry2 = 0;
  728. if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
  729. kfree_skb(skb);
  730. return NULL;
  731. }
  732. return skb;
  733. }
  734. int p54_read_eeprom(struct ieee80211_hw *dev)
  735. {
  736. struct p54_common *priv = dev->priv;
  737. struct p54_control_hdr *hdr = NULL;
  738. struct p54_eeprom_lm86 *eeprom_hdr;
  739. struct sk_buff *skb;
  740. size_t eeprom_size = 0x2020, offset = 0, blocksize;
  741. int ret = -ENOMEM;
  742. void *eeprom = NULL;
  743. skb = p54_alloc_skb(dev, 0x8000, sizeof(*hdr) + sizeof(*eeprom_hdr) +
  744. EEPROM_READBACK_LEN,
  745. P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
  746. if (!skb)
  747. goto free;
  748. priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
  749. if (!priv->eeprom)
  750. goto free;
  751. eeprom = kzalloc(eeprom_size, GFP_KERNEL);
  752. if (!eeprom)
  753. goto free;
  754. eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
  755. sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN);
  756. while (eeprom_size) {
  757. blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
  758. eeprom_hdr->offset = cpu_to_le16(offset);
  759. eeprom_hdr->len = cpu_to_le16(blocksize);
  760. priv->tx(dev, skb, 0);
  761. if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
  762. printk(KERN_ERR "%s: device does not respond!\n",
  763. wiphy_name(dev->wiphy));
  764. ret = -EBUSY;
  765. goto free;
  766. }
  767. memcpy(eeprom + offset, priv->eeprom, blocksize);
  768. offset += blocksize;
  769. eeprom_size -= blocksize;
  770. }
  771. ret = p54_parse_eeprom(dev, eeprom, offset);
  772. free:
  773. kfree(priv->eeprom);
  774. priv->eeprom = NULL;
  775. p54_free_skb(dev, skb);
  776. kfree(eeprom);
  777. return ret;
  778. }
  779. EXPORT_SYMBOL_GPL(p54_read_eeprom);
  780. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  781. {
  782. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  783. struct ieee80211_tx_queue_stats *current_queue;
  784. struct p54_common *priv = dev->priv;
  785. struct p54_control_hdr *hdr;
  786. struct p54_tx_control_allocdata *txhdr;
  787. size_t padding, len;
  788. int i, j, ridx;
  789. u8 rate;
  790. u8 cts_rate = 0x20;
  791. u8 rc_flags;
  792. u8 calculated_tries[4];
  793. u8 nrates = 0, nremaining = 8;
  794. current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
  795. if (unlikely(current_queue->len > current_queue->limit))
  796. return NETDEV_TX_BUSY;
  797. current_queue->len++;
  798. current_queue->count++;
  799. if (current_queue->len == current_queue->limit)
  800. ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
  801. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  802. len = skb->len;
  803. txhdr = (struct p54_tx_control_allocdata *)
  804. skb_push(skb, sizeof(*txhdr) + padding);
  805. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  806. if (padding)
  807. hdr->magic1 = cpu_to_le16(0x4010);
  808. else
  809. hdr->magic1 = cpu_to_le16(0x0010);
  810. hdr->len = cpu_to_le16(len);
  811. hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
  812. hdr->retry1 = info->control.rates[0].count;
  813. /*
  814. * we register the rates in perfect order, and
  815. * RTS/CTS won't happen on 5 GHz
  816. */
  817. cts_rate = info->control.rts_cts_rate_idx;
  818. memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
  819. /* see how many rates got used */
  820. for (i = 0; i < 4; i++) {
  821. if (info->control.rates[i].idx < 0)
  822. break;
  823. nrates++;
  824. }
  825. /* limit tries to 8/nrates per rate */
  826. for (i = 0; i < nrates; i++) {
  827. /*
  828. * The magic expression here is equivalent to 8/nrates for
  829. * all values that matter, but avoids division and jumps.
  830. * Note that nrates can only take the values 1 through 4.
  831. */
  832. calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
  833. info->control.rates[i].count);
  834. nremaining -= calculated_tries[i];
  835. }
  836. /* if there are tries left, distribute from back to front */
  837. for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
  838. int tmp = info->control.rates[i].count - calculated_tries[i];
  839. if (tmp <= 0)
  840. continue;
  841. /* RC requested more tries at this rate */
  842. tmp = min_t(int, tmp, nremaining);
  843. calculated_tries[i] += tmp;
  844. nremaining -= tmp;
  845. }
  846. ridx = 0;
  847. for (i = 0; i < nrates && ridx < 8; i++) {
  848. /* we register the rates in perfect order */
  849. rate = info->control.rates[i].idx;
  850. if (info->band == IEEE80211_BAND_5GHZ)
  851. rate += 4;
  852. /* store the count we actually calculated for TX status */
  853. info->control.rates[i].count = calculated_tries[i];
  854. rc_flags = info->control.rates[i].flags;
  855. if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
  856. rate |= 0x10;
  857. cts_rate |= 0x10;
  858. }
  859. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
  860. rate |= 0x40;
  861. else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
  862. rate |= 0x20;
  863. for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
  864. txhdr->rateset[ridx] = rate;
  865. ridx++;
  866. }
  867. }
  868. hdr->retry2 = ridx;
  869. txhdr->key_type = 0;
  870. txhdr->key_len = 0;
  871. txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
  872. txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
  873. 2 : info->antenna_sel_tx - 1;
  874. txhdr->output_power = priv->output_power;
  875. txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
  876. 0 : cts_rate;
  877. if (padding)
  878. txhdr->align[0] = padding;
  879. /* modifies skb->cb and with it info, so must be last! */
  880. if (unlikely(p54_assign_address(dev, skb, hdr, skb->len))) {
  881. skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
  882. return NETDEV_TX_BUSY;
  883. }
  884. priv->tx(dev, skb, 0);
  885. return 0;
  886. }
  887. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  888. const u8 *bssid)
  889. {
  890. struct p54_common *priv = dev->priv;
  891. struct sk_buff *skb;
  892. struct p54_tx_control_filter *filter;
  893. u16 data_len = sizeof(struct p54_control_hdr) + sizeof(*filter);
  894. if (priv->fw_var < 0x500)
  895. data_len += P54_TX_CONTROL_FILTER_V1_LEN;
  896. else
  897. data_len += P54_TX_CONTROL_FILTER_V2_LEN;
  898. skb = p54_alloc_skb(dev, 0x8001, data_len, P54_CONTROL_TYPE_FILTER_SET,
  899. GFP_ATOMIC);
  900. if (!skb)
  901. return -ENOMEM;
  902. filter = (struct p54_tx_control_filter *) skb_put(skb, sizeof(*filter));
  903. filter->filter_type = priv->filter_type = cpu_to_le16(filter_type);
  904. memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
  905. if (!bssid)
  906. memset(filter->bssid, ~0, ETH_ALEN);
  907. else
  908. memcpy(filter->bssid, bssid, ETH_ALEN);
  909. filter->rx_antenna = priv->rx_antenna;
  910. if (priv->fw_var < 0x500) {
  911. filter->v1.basic_rate_mask = cpu_to_le32(0x15f);
  912. filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
  913. filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  914. filter->v1.rxhw = cpu_to_le16(priv->rxhw);
  915. filter->v1.wakeup_timer = cpu_to_le16(500);
  916. } else {
  917. filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
  918. filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  919. filter->v2.rxhw = cpu_to_le16(priv->rxhw);
  920. filter->v2.timer = cpu_to_le16(1000);
  921. }
  922. priv->tx(dev, skb, 1);
  923. return 0;
  924. }
  925. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  926. {
  927. struct p54_common *priv = dev->priv;
  928. struct sk_buff *skb;
  929. struct p54_tx_control_channel *chan;
  930. unsigned int i;
  931. size_t data_len = sizeof(struct p54_control_hdr) + sizeof(*chan);
  932. void *entry;
  933. skb = p54_alloc_skb(dev, 0x8001, data_len,
  934. P54_CONTROL_TYPE_CHANNEL_CHANGE, GFP_ATOMIC);
  935. if (!skb)
  936. return -ENOMEM;
  937. chan = (struct p54_tx_control_channel *) skb_put(skb, sizeof(*chan));
  938. memset(chan->padding1, 0, sizeof(chan->padding1));
  939. chan->flags = cpu_to_le16(0x1);
  940. chan->dwell = cpu_to_le16(0x0);
  941. for (i = 0; i < priv->iq_autocal_len; i++) {
  942. if (priv->iq_autocal[i].freq != freq)
  943. continue;
  944. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  945. sizeof(*priv->iq_autocal));
  946. break;
  947. }
  948. if (i == priv->iq_autocal_len)
  949. goto err;
  950. for (i = 0; i < priv->output_limit_len; i++) {
  951. if (priv->output_limit[i].freq != freq)
  952. continue;
  953. chan->val_barker = 0x38;
  954. chan->val_bpsk = chan->dup_bpsk =
  955. priv->output_limit[i].val_bpsk;
  956. chan->val_qpsk = chan->dup_qpsk =
  957. priv->output_limit[i].val_qpsk;
  958. chan->val_16qam = chan->dup_16qam =
  959. priv->output_limit[i].val_16qam;
  960. chan->val_64qam = chan->dup_64qam =
  961. priv->output_limit[i].val_64qam;
  962. break;
  963. }
  964. if (i == priv->output_limit_len)
  965. goto err;
  966. entry = priv->curve_data->data;
  967. for (i = 0; i < priv->curve_data->channels; i++) {
  968. if (*((__le16 *)entry) != freq) {
  969. entry += sizeof(__le16);
  970. entry += sizeof(struct p54_pa_curve_data_sample) *
  971. priv->curve_data->points_per_channel;
  972. continue;
  973. }
  974. entry += sizeof(__le16);
  975. chan->pa_points_per_curve =
  976. min(priv->curve_data->points_per_channel, (u8) 8);
  977. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  978. chan->pa_points_per_curve);
  979. break;
  980. }
  981. if (priv->fw_var < 0x500) {
  982. data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
  983. chan->v1.rssical_mul = cpu_to_le16(130);
  984. chan->v1.rssical_add = cpu_to_le16(0xfe70);
  985. } else {
  986. chan->v2.rssical_mul = cpu_to_le16(130);
  987. chan->v2.rssical_add = cpu_to_le16(0xfe70);
  988. chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
  989. }
  990. priv->tx(dev, skb, 1);
  991. return 0;
  992. err:
  993. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  994. kfree_skb(skb);
  995. return -EINVAL;
  996. }
  997. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  998. {
  999. struct p54_common *priv = dev->priv;
  1000. struct sk_buff *skb;
  1001. struct p54_tx_control_led *led;
  1002. skb = p54_alloc_skb(dev, 0x8001, sizeof(*led) +
  1003. sizeof(struct p54_control_hdr),
  1004. P54_CONTROL_TYPE_LED, GFP_ATOMIC);
  1005. if (!skb)
  1006. return -ENOMEM;
  1007. led = (struct p54_tx_control_led *)skb_put(skb, sizeof(*led));
  1008. led->mode = cpu_to_le16(mode);
  1009. led->led_permanent = cpu_to_le16(link);
  1010. led->led_temporary = cpu_to_le16(act);
  1011. led->duration = cpu_to_le16(1000);
  1012. priv->tx(dev, skb, 1);
  1013. return 0;
  1014. }
  1015. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  1016. do { \
  1017. queue.aifs = cpu_to_le16(ai_fs); \
  1018. queue.cwmin = cpu_to_le16(cw_min); \
  1019. queue.cwmax = cpu_to_le16(cw_max); \
  1020. queue.txop = cpu_to_le16(_txop); \
  1021. } while(0)
  1022. static int p54_set_edcf(struct ieee80211_hw *dev)
  1023. {
  1024. struct p54_common *priv = dev->priv;
  1025. struct sk_buff *skb;
  1026. struct p54_edcf *edcf;
  1027. skb = p54_alloc_skb(dev, 0x8001, sizeof(struct p54_control_hdr) +
  1028. sizeof(*edcf), P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC);
  1029. if (!skb)
  1030. return -ENOMEM;
  1031. edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
  1032. if (priv->use_short_slot) {
  1033. edcf->slottime = 9;
  1034. edcf->sifs = 0x10;
  1035. edcf->eofpad = 0x00;
  1036. } else {
  1037. edcf->slottime = 20;
  1038. edcf->sifs = 0x0a;
  1039. edcf->eofpad = 0x06;
  1040. }
  1041. /* (see prism54/isl_oid.h for further details) */
  1042. edcf->frameburst = cpu_to_le16(0);
  1043. edcf->round_trip_delay = cpu_to_le16(0);
  1044. memset(edcf->mapping, 0, sizeof(edcf->mapping));
  1045. memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
  1046. priv->tx(dev, skb, 1);
  1047. return 0;
  1048. }
  1049. static int p54_init_stats(struct ieee80211_hw *dev)
  1050. {
  1051. struct p54_common *priv = dev->priv;
  1052. priv->cached_stats = p54_alloc_skb(dev, 0x8000,
  1053. sizeof(struct p54_control_hdr) +
  1054. sizeof(struct p54_statistics),
  1055. P54_CONTROL_TYPE_STAT_READBACK,
  1056. GFP_KERNEL);
  1057. if (!priv->cached_stats)
  1058. return -ENOMEM;
  1059. mod_timer(&priv->stats_timer, jiffies + HZ);
  1060. return 0;
  1061. }
  1062. static int p54_start(struct ieee80211_hw *dev)
  1063. {
  1064. struct p54_common *priv = dev->priv;
  1065. int err;
  1066. err = priv->open(dev);
  1067. if (!err)
  1068. priv->mode = NL80211_IFTYPE_MONITOR;
  1069. P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
  1070. P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
  1071. P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
  1072. P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
  1073. err = p54_set_edcf(dev);
  1074. if (!err)
  1075. err = p54_init_stats(dev);
  1076. return err;
  1077. }
  1078. static void p54_stop(struct ieee80211_hw *dev)
  1079. {
  1080. struct p54_common *priv = dev->priv;
  1081. struct sk_buff *skb;
  1082. del_timer(&priv->stats_timer);
  1083. p54_free_skb(dev, priv->cached_stats);
  1084. priv->cached_stats = NULL;
  1085. while ((skb = skb_dequeue(&priv->tx_queue)))
  1086. kfree_skb(skb);
  1087. priv->stop(dev);
  1088. priv->tsf_high32 = priv->tsf_low32 = 0;
  1089. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1090. }
  1091. static int p54_add_interface(struct ieee80211_hw *dev,
  1092. struct ieee80211_if_init_conf *conf)
  1093. {
  1094. struct p54_common *priv = dev->priv;
  1095. if (priv->mode != NL80211_IFTYPE_MONITOR)
  1096. return -EOPNOTSUPP;
  1097. switch (conf->type) {
  1098. case NL80211_IFTYPE_STATION:
  1099. priv->mode = conf->type;
  1100. break;
  1101. default:
  1102. return -EOPNOTSUPP;
  1103. }
  1104. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  1105. p54_set_filter(dev, 0, NULL);
  1106. switch (conf->type) {
  1107. case NL80211_IFTYPE_STATION:
  1108. p54_set_filter(dev, 1, NULL);
  1109. break;
  1110. default:
  1111. BUG(); /* impossible */
  1112. break;
  1113. }
  1114. p54_set_leds(dev, 1, 0, 0);
  1115. return 0;
  1116. }
  1117. static void p54_remove_interface(struct ieee80211_hw *dev,
  1118. struct ieee80211_if_init_conf *conf)
  1119. {
  1120. struct p54_common *priv = dev->priv;
  1121. priv->mode = NL80211_IFTYPE_MONITOR;
  1122. memset(priv->mac_addr, 0, ETH_ALEN);
  1123. p54_set_filter(dev, 0, NULL);
  1124. }
  1125. static int p54_config(struct ieee80211_hw *dev, u32 changed)
  1126. {
  1127. int ret;
  1128. struct p54_common *priv = dev->priv;
  1129. struct ieee80211_conf *conf = &dev->conf;
  1130. mutex_lock(&priv->conf_mutex);
  1131. priv->rx_antenna = 2; /* automatic */
  1132. priv->output_power = conf->power_level << 2;
  1133. ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
  1134. if (!ret)
  1135. ret = p54_set_edcf(dev);
  1136. mutex_unlock(&priv->conf_mutex);
  1137. return ret;
  1138. }
  1139. static int p54_config_interface(struct ieee80211_hw *dev,
  1140. struct ieee80211_vif *vif,
  1141. struct ieee80211_if_conf *conf)
  1142. {
  1143. struct p54_common *priv = dev->priv;
  1144. mutex_lock(&priv->conf_mutex);
  1145. p54_set_filter(dev, 0, conf->bssid);
  1146. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  1147. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  1148. mutex_unlock(&priv->conf_mutex);
  1149. return 0;
  1150. }
  1151. static void p54_configure_filter(struct ieee80211_hw *dev,
  1152. unsigned int changed_flags,
  1153. unsigned int *total_flags,
  1154. int mc_count, struct dev_mc_list *mclist)
  1155. {
  1156. struct p54_common *priv = dev->priv;
  1157. *total_flags &= FIF_BCN_PRBRESP_PROMISC |
  1158. FIF_PROMISC_IN_BSS |
  1159. FIF_FCSFAIL;
  1160. priv->filter_flags = *total_flags;
  1161. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1162. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1163. p54_set_filter(dev, le16_to_cpu(priv->filter_type),
  1164. NULL);
  1165. else
  1166. p54_set_filter(dev, le16_to_cpu(priv->filter_type),
  1167. priv->bssid);
  1168. }
  1169. if (changed_flags & FIF_PROMISC_IN_BSS) {
  1170. if (*total_flags & FIF_PROMISC_IN_BSS)
  1171. p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
  1172. 0x8, NULL);
  1173. else
  1174. p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
  1175. ~0x8, priv->bssid);
  1176. }
  1177. }
  1178. static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
  1179. const struct ieee80211_tx_queue_params *params)
  1180. {
  1181. struct p54_common *priv = dev->priv;
  1182. if ((params) && !(queue > 4)) {
  1183. P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
  1184. params->cw_min, params->cw_max, params->txop);
  1185. } else
  1186. return -EINVAL;
  1187. return p54_set_edcf(dev);
  1188. }
  1189. static int p54_init_xbow_synth(struct ieee80211_hw *dev)
  1190. {
  1191. struct p54_common *priv = dev->priv;
  1192. struct sk_buff *skb;
  1193. struct p54_tx_control_xbow_synth *xbow;
  1194. skb = p54_alloc_skb(dev, 0x8001, sizeof(struct p54_control_hdr) +
  1195. sizeof(*xbow), P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
  1196. GFP_KERNEL);
  1197. if (!skb)
  1198. return -ENOMEM;
  1199. xbow = (struct p54_tx_control_xbow_synth *)skb_put(skb, sizeof(*xbow));
  1200. xbow->magic1 = cpu_to_le16(0x1);
  1201. xbow->magic2 = cpu_to_le16(0x2);
  1202. xbow->freq = cpu_to_le16(5390);
  1203. memset(xbow->padding, 0, sizeof(xbow->padding));
  1204. priv->tx(dev, skb, 1);
  1205. return 0;
  1206. }
  1207. static void p54_statistics_timer(unsigned long data)
  1208. {
  1209. struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
  1210. struct p54_common *priv = dev->priv;
  1211. BUG_ON(!priv->cached_stats);
  1212. priv->tx(dev, priv->cached_stats, 0);
  1213. }
  1214. static int p54_get_stats(struct ieee80211_hw *dev,
  1215. struct ieee80211_low_level_stats *stats)
  1216. {
  1217. struct p54_common *priv = dev->priv;
  1218. del_timer(&priv->stats_timer);
  1219. p54_statistics_timer((unsigned long)dev);
  1220. if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
  1221. printk(KERN_ERR "%s: device does not respond!\n",
  1222. wiphy_name(dev->wiphy));
  1223. return -EBUSY;
  1224. }
  1225. memcpy(stats, &priv->stats, sizeof(*stats));
  1226. return 0;
  1227. }
  1228. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  1229. struct ieee80211_tx_queue_stats *stats)
  1230. {
  1231. struct p54_common *priv = dev->priv;
  1232. memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
  1233. return 0;
  1234. }
  1235. static void p54_bss_info_changed(struct ieee80211_hw *dev,
  1236. struct ieee80211_vif *vif,
  1237. struct ieee80211_bss_conf *info,
  1238. u32 changed)
  1239. {
  1240. struct p54_common *priv = dev->priv;
  1241. if (changed & BSS_CHANGED_ERP_SLOT) {
  1242. priv->use_short_slot = info->use_short_slot;
  1243. p54_set_edcf(dev);
  1244. }
  1245. }
  1246. static const struct ieee80211_ops p54_ops = {
  1247. .tx = p54_tx,
  1248. .start = p54_start,
  1249. .stop = p54_stop,
  1250. .add_interface = p54_add_interface,
  1251. .remove_interface = p54_remove_interface,
  1252. .config = p54_config,
  1253. .config_interface = p54_config_interface,
  1254. .bss_info_changed = p54_bss_info_changed,
  1255. .configure_filter = p54_configure_filter,
  1256. .conf_tx = p54_conf_tx,
  1257. .get_stats = p54_get_stats,
  1258. .get_tx_stats = p54_get_tx_stats
  1259. };
  1260. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  1261. {
  1262. struct ieee80211_hw *dev;
  1263. struct p54_common *priv;
  1264. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  1265. if (!dev)
  1266. return NULL;
  1267. priv = dev->priv;
  1268. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1269. skb_queue_head_init(&priv->tx_queue);
  1270. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  1271. IEEE80211_HW_RX_INCLUDES_FCS |
  1272. IEEE80211_HW_SIGNAL_DBM |
  1273. IEEE80211_HW_NOISE_DBM;
  1274. /*
  1275. * XXX: when this driver gets support for any mode that
  1276. * requires beacons (AP, MESH, IBSS) then it must
  1277. * implement IEEE80211_TX_CTL_ASSIGN_SEQ.
  1278. */
  1279. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  1280. dev->channel_change_time = 1000; /* TODO: find actual value */
  1281. priv->tx_stats[0].limit = 1;
  1282. priv->tx_stats[1].limit = 1;
  1283. priv->tx_stats[2].limit = 1;
  1284. priv->tx_stats[3].limit = 1;
  1285. priv->tx_stats[4].limit = 5;
  1286. dev->queues = 1;
  1287. priv->noise = -94;
  1288. /*
  1289. * We support at most 8 tries no matter which rate they're at,
  1290. * we cannot support max_rates * max_rate_tries as we set it
  1291. * here, but setting it correctly to 4/2 or so would limit us
  1292. * artificially if the RC algorithm wants just two rates, so
  1293. * let's say 4/7, we'll redistribute it at TX time, see the
  1294. * comments there.
  1295. */
  1296. dev->max_rates = 4;
  1297. dev->max_rate_tries = 7;
  1298. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  1299. sizeof(struct p54_tx_control_allocdata);
  1300. mutex_init(&priv->conf_mutex);
  1301. init_completion(&priv->eeprom_comp);
  1302. init_completion(&priv->stats_comp);
  1303. setup_timer(&priv->stats_timer, p54_statistics_timer,
  1304. (unsigned long)dev);
  1305. return dev;
  1306. }
  1307. EXPORT_SYMBOL_GPL(p54_init_common);
  1308. void p54_free_common(struct ieee80211_hw *dev)
  1309. {
  1310. struct p54_common *priv = dev->priv;
  1311. del_timer(&priv->stats_timer);
  1312. kfree_skb(priv->cached_stats);
  1313. kfree(priv->iq_autocal);
  1314. kfree(priv->output_limit);
  1315. kfree(priv->curve_data);
  1316. }
  1317. EXPORT_SYMBOL_GPL(p54_free_common);
  1318. static int __init p54_init(void)
  1319. {
  1320. return 0;
  1321. }
  1322. static void __exit p54_exit(void)
  1323. {
  1324. }
  1325. module_init(p54_init);
  1326. module_exit(p54_exit);