soc-cache.c 34 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. #include <trace/events/asoc.h>
  20. static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
  21. unsigned int value, const void *data, int len)
  22. {
  23. int ret;
  24. if (!snd_soc_codec_volatile_register(codec, reg) &&
  25. reg < codec->driver->reg_cache_size &&
  26. !codec->cache_bypass) {
  27. ret = snd_soc_cache_write(codec, reg, value);
  28. if (ret < 0)
  29. return -1;
  30. }
  31. if (codec->cache_only) {
  32. codec->cache_sync = 1;
  33. return 0;
  34. }
  35. ret = codec->hw_write(codec->control_data, data, len);
  36. if (ret == len)
  37. return 0;
  38. if (ret < 0)
  39. return ret;
  40. else
  41. return -EIO;
  42. }
  43. static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
  44. {
  45. int ret;
  46. unsigned int val;
  47. if (reg >= codec->driver->reg_cache_size ||
  48. snd_soc_codec_volatile_register(codec, reg) ||
  49. codec->cache_bypass) {
  50. if (codec->cache_only)
  51. return -1;
  52. BUG_ON(!codec->hw_read);
  53. return codec->hw_read(codec, reg);
  54. }
  55. ret = snd_soc_cache_read(codec, reg, &val);
  56. if (ret < 0)
  57. return -1;
  58. return val;
  59. }
  60. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  61. unsigned int reg)
  62. {
  63. return do_hw_read(codec, reg);
  64. }
  65. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  66. unsigned int value)
  67. {
  68. u8 data[2];
  69. data[0] = (reg << 4) | ((value >> 8) & 0x000f);
  70. data[1] = value & 0x00ff;
  71. return do_hw_write(codec, reg, value, data, 2);
  72. }
  73. #if defined(CONFIG_SPI_MASTER)
  74. static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  75. int len)
  76. {
  77. struct spi_device *spi = control_data;
  78. struct spi_transfer t;
  79. struct spi_message m;
  80. u8 msg[2];
  81. if (len <= 0)
  82. return 0;
  83. msg[0] = data[1];
  84. msg[1] = data[0];
  85. spi_message_init(&m);
  86. memset(&t, 0, sizeof t);
  87. t.tx_buf = &msg[0];
  88. t.len = len;
  89. spi_message_add_tail(&t, &m);
  90. spi_sync(spi, &m);
  91. return len;
  92. }
  93. #else
  94. #define snd_soc_4_12_spi_write NULL
  95. #endif
  96. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  97. unsigned int reg)
  98. {
  99. return do_hw_read(codec, reg);
  100. }
  101. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  102. unsigned int value)
  103. {
  104. u8 data[2];
  105. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  106. data[1] = value & 0x00ff;
  107. return do_hw_write(codec, reg, value, data, 2);
  108. }
  109. #if defined(CONFIG_SPI_MASTER)
  110. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  111. int len)
  112. {
  113. struct spi_device *spi = control_data;
  114. struct spi_transfer t;
  115. struct spi_message m;
  116. u8 msg[2];
  117. if (len <= 0)
  118. return 0;
  119. msg[0] = data[0];
  120. msg[1] = data[1];
  121. spi_message_init(&m);
  122. memset(&t, 0, sizeof t);
  123. t.tx_buf = &msg[0];
  124. t.len = len;
  125. spi_message_add_tail(&t, &m);
  126. spi_sync(spi, &m);
  127. return len;
  128. }
  129. #else
  130. #define snd_soc_7_9_spi_write NULL
  131. #endif
  132. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  133. unsigned int value)
  134. {
  135. u8 data[2];
  136. reg &= 0xff;
  137. data[0] = reg;
  138. data[1] = value & 0xff;
  139. return do_hw_write(codec, reg, value, data, 2);
  140. }
  141. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  142. unsigned int reg)
  143. {
  144. return do_hw_read(codec, reg);
  145. }
  146. #if defined(CONFIG_SPI_MASTER)
  147. static int snd_soc_8_8_spi_write(void *control_data, const char *data,
  148. int len)
  149. {
  150. struct spi_device *spi = control_data;
  151. struct spi_transfer t;
  152. struct spi_message m;
  153. u8 msg[2];
  154. if (len <= 0)
  155. return 0;
  156. msg[0] = data[0];
  157. msg[1] = data[1];
  158. spi_message_init(&m);
  159. memset(&t, 0, sizeof t);
  160. t.tx_buf = &msg[0];
  161. t.len = len;
  162. spi_message_add_tail(&t, &m);
  163. spi_sync(spi, &m);
  164. return len;
  165. }
  166. #else
  167. #define snd_soc_8_8_spi_write NULL
  168. #endif
  169. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  170. unsigned int value)
  171. {
  172. u8 data[3];
  173. data[0] = reg;
  174. data[1] = (value >> 8) & 0xff;
  175. data[2] = value & 0xff;
  176. return do_hw_write(codec, reg, value, data, 3);
  177. }
  178. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  179. unsigned int reg)
  180. {
  181. return do_hw_read(codec, reg);
  182. }
  183. #if defined(CONFIG_SPI_MASTER)
  184. static int snd_soc_8_16_spi_write(void *control_data, const char *data,
  185. int len)
  186. {
  187. struct spi_device *spi = control_data;
  188. struct spi_transfer t;
  189. struct spi_message m;
  190. u8 msg[3];
  191. if (len <= 0)
  192. return 0;
  193. msg[0] = data[0];
  194. msg[1] = data[1];
  195. msg[2] = data[2];
  196. spi_message_init(&m);
  197. memset(&t, 0, sizeof t);
  198. t.tx_buf = &msg[0];
  199. t.len = len;
  200. spi_message_add_tail(&t, &m);
  201. spi_sync(spi, &m);
  202. return len;
  203. }
  204. #else
  205. #define snd_soc_8_16_spi_write NULL
  206. #endif
  207. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  208. static unsigned int do_i2c_read(struct snd_soc_codec *codec,
  209. void *reg, int reglen,
  210. void *data, int datalen)
  211. {
  212. struct i2c_msg xfer[2];
  213. int ret;
  214. struct i2c_client *client = codec->control_data;
  215. /* Write register */
  216. xfer[0].addr = client->addr;
  217. xfer[0].flags = 0;
  218. xfer[0].len = reglen;
  219. xfer[0].buf = reg;
  220. /* Read data */
  221. xfer[1].addr = client->addr;
  222. xfer[1].flags = I2C_M_RD;
  223. xfer[1].len = datalen;
  224. xfer[1].buf = data;
  225. ret = i2c_transfer(client->adapter, xfer, 2);
  226. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  227. if (ret == 2)
  228. return 0;
  229. else if (ret < 0)
  230. return ret;
  231. else
  232. return -EIO;
  233. }
  234. #endif
  235. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  236. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  237. unsigned int r)
  238. {
  239. u8 reg = r;
  240. u8 data;
  241. int ret;
  242. ret = do_i2c_read(codec, &reg, 1, &data, 1);
  243. if (ret < 0)
  244. return 0;
  245. return data;
  246. }
  247. #else
  248. #define snd_soc_8_8_read_i2c NULL
  249. #endif
  250. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  251. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  252. unsigned int r)
  253. {
  254. u8 reg = r;
  255. u16 data;
  256. int ret;
  257. ret = do_i2c_read(codec, &reg, 1, &data, 2);
  258. if (ret < 0)
  259. return 0;
  260. return (data >> 8) | ((data & 0xff) << 8);
  261. }
  262. #else
  263. #define snd_soc_8_16_read_i2c NULL
  264. #endif
  265. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  266. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  267. unsigned int r)
  268. {
  269. u16 reg = r;
  270. u8 data;
  271. int ret;
  272. ret = do_i2c_read(codec, &reg, 2, &data, 1);
  273. if (ret < 0)
  274. return 0;
  275. return data;
  276. }
  277. #else
  278. #define snd_soc_16_8_read_i2c NULL
  279. #endif
  280. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  281. unsigned int reg)
  282. {
  283. return do_hw_read(codec, reg);
  284. }
  285. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  286. unsigned int value)
  287. {
  288. u8 data[3];
  289. data[0] = (reg >> 8) & 0xff;
  290. data[1] = reg & 0xff;
  291. data[2] = value;
  292. reg &= 0xff;
  293. return do_hw_write(codec, reg, value, data, 3);
  294. }
  295. #if defined(CONFIG_SPI_MASTER)
  296. static int snd_soc_16_8_spi_write(void *control_data, const char *data,
  297. int len)
  298. {
  299. struct spi_device *spi = control_data;
  300. struct spi_transfer t;
  301. struct spi_message m;
  302. u8 msg[3];
  303. if (len <= 0)
  304. return 0;
  305. msg[0] = data[0];
  306. msg[1] = data[1];
  307. msg[2] = data[2];
  308. spi_message_init(&m);
  309. memset(&t, 0, sizeof t);
  310. t.tx_buf = &msg[0];
  311. t.len = len;
  312. spi_message_add_tail(&t, &m);
  313. spi_sync(spi, &m);
  314. return len;
  315. }
  316. #else
  317. #define snd_soc_16_8_spi_write NULL
  318. #endif
  319. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  320. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  321. unsigned int r)
  322. {
  323. u16 reg = cpu_to_be16(r);
  324. u16 data;
  325. int ret;
  326. ret = do_i2c_read(codec, &reg, 2, &data, 2);
  327. if (ret < 0)
  328. return 0;
  329. return be16_to_cpu(data);
  330. }
  331. #else
  332. #define snd_soc_16_16_read_i2c NULL
  333. #endif
  334. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  335. unsigned int reg)
  336. {
  337. return do_hw_read(codec, reg);
  338. }
  339. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  340. unsigned int value)
  341. {
  342. u8 data[4];
  343. data[0] = (reg >> 8) & 0xff;
  344. data[1] = reg & 0xff;
  345. data[2] = (value >> 8) & 0xff;
  346. data[3] = value & 0xff;
  347. return do_hw_write(codec, reg, value, data, 4);
  348. }
  349. #if defined(CONFIG_SPI_MASTER)
  350. static int snd_soc_16_16_spi_write(void *control_data, const char *data,
  351. int len)
  352. {
  353. struct spi_device *spi = control_data;
  354. struct spi_transfer t;
  355. struct spi_message m;
  356. u8 msg[4];
  357. if (len <= 0)
  358. return 0;
  359. msg[0] = data[0];
  360. msg[1] = data[1];
  361. msg[2] = data[2];
  362. msg[3] = data[3];
  363. spi_message_init(&m);
  364. memset(&t, 0, sizeof t);
  365. t.tx_buf = &msg[0];
  366. t.len = len;
  367. spi_message_add_tail(&t, &m);
  368. spi_sync(spi, &m);
  369. return len;
  370. }
  371. #else
  372. #define snd_soc_16_16_spi_write NULL
  373. #endif
  374. /* Primitive bulk write support for soc-cache. The data pointed to by `data' needs
  375. * to already be in the form the hardware expects including any leading register specific
  376. * data. Any data written through this function will not go through the cache as it
  377. * only handles writing to volatile or out of bounds registers.
  378. */
  379. static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
  380. const void *data, size_t len)
  381. {
  382. int ret;
  383. /* Ensure that the base register is volatile. Subsequently
  384. * any other register that is touched by this routine should be
  385. * volatile as well to ensure that we don't get out of sync with
  386. * the cache.
  387. */
  388. if (!snd_soc_codec_volatile_register(codec, reg)
  389. && reg < codec->driver->reg_cache_size)
  390. return -EINVAL;
  391. switch (codec->control_type) {
  392. case SND_SOC_I2C:
  393. ret = i2c_master_send(codec->control_data, data, len);
  394. break;
  395. case SND_SOC_SPI:
  396. ret = do_spi_write(codec->control_data, data, len);
  397. break;
  398. default:
  399. BUG();
  400. }
  401. if (ret == len)
  402. return 0;
  403. if (ret < 0)
  404. return ret;
  405. else
  406. return -EIO;
  407. }
  408. static struct {
  409. int addr_bits;
  410. int data_bits;
  411. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  412. int (*spi_write)(void *, const char *, int);
  413. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  414. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  415. } io_types[] = {
  416. {
  417. .addr_bits = 4, .data_bits = 12,
  418. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  419. .spi_write = snd_soc_4_12_spi_write,
  420. },
  421. {
  422. .addr_bits = 7, .data_bits = 9,
  423. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  424. .spi_write = snd_soc_7_9_spi_write,
  425. },
  426. {
  427. .addr_bits = 8, .data_bits = 8,
  428. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  429. .i2c_read = snd_soc_8_8_read_i2c,
  430. .spi_write = snd_soc_8_8_spi_write,
  431. },
  432. {
  433. .addr_bits = 8, .data_bits = 16,
  434. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  435. .i2c_read = snd_soc_8_16_read_i2c,
  436. .spi_write = snd_soc_8_16_spi_write,
  437. },
  438. {
  439. .addr_bits = 16, .data_bits = 8,
  440. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  441. .i2c_read = snd_soc_16_8_read_i2c,
  442. .spi_write = snd_soc_16_8_spi_write,
  443. },
  444. {
  445. .addr_bits = 16, .data_bits = 16,
  446. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  447. .i2c_read = snd_soc_16_16_read_i2c,
  448. .spi_write = snd_soc_16_16_spi_write,
  449. },
  450. };
  451. /**
  452. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  453. *
  454. * @codec: CODEC to configure.
  455. * @type: Type of cache.
  456. * @addr_bits: Number of bits of register address data.
  457. * @data_bits: Number of bits of data per register.
  458. * @control: Control bus used.
  459. *
  460. * Register formats are frequently shared between many I2C and SPI
  461. * devices. In order to promote code reuse the ASoC core provides
  462. * some standard implementations of CODEC read and write operations
  463. * which can be set up using this function.
  464. *
  465. * The caller is responsible for allocating and initialising the
  466. * actual cache.
  467. *
  468. * Note that at present this code cannot be used by CODECs with
  469. * volatile registers.
  470. */
  471. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  472. int addr_bits, int data_bits,
  473. enum snd_soc_control_type control)
  474. {
  475. int i;
  476. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  477. if (io_types[i].addr_bits == addr_bits &&
  478. io_types[i].data_bits == data_bits)
  479. break;
  480. if (i == ARRAY_SIZE(io_types)) {
  481. printk(KERN_ERR
  482. "No I/O functions for %d bit address %d bit data\n",
  483. addr_bits, data_bits);
  484. return -EINVAL;
  485. }
  486. codec->write = io_types[i].write;
  487. codec->read = io_types[i].read;
  488. codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
  489. switch (control) {
  490. case SND_SOC_CUSTOM:
  491. break;
  492. case SND_SOC_I2C:
  493. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  494. codec->hw_write = (hw_write_t)i2c_master_send;
  495. #endif
  496. if (io_types[i].i2c_read)
  497. codec->hw_read = io_types[i].i2c_read;
  498. codec->control_data = container_of(codec->dev,
  499. struct i2c_client,
  500. dev);
  501. break;
  502. case SND_SOC_SPI:
  503. if (io_types[i].spi_write)
  504. codec->hw_write = io_types[i].spi_write;
  505. codec->control_data = container_of(codec->dev,
  506. struct spi_device,
  507. dev);
  508. break;
  509. }
  510. return 0;
  511. }
  512. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  513. static bool snd_soc_set_cache_val(void *base, unsigned int idx,
  514. unsigned int val, unsigned int word_size)
  515. {
  516. switch (word_size) {
  517. case 1: {
  518. u8 *cache = base;
  519. if (cache[idx] == val)
  520. return true;
  521. cache[idx] = val;
  522. break;
  523. }
  524. case 2: {
  525. u16 *cache = base;
  526. if (cache[idx] == val)
  527. return true;
  528. cache[idx] = val;
  529. break;
  530. }
  531. default:
  532. BUG();
  533. }
  534. return false;
  535. }
  536. static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
  537. unsigned int word_size)
  538. {
  539. switch (word_size) {
  540. case 1: {
  541. const u8 *cache = base;
  542. return cache[idx];
  543. }
  544. case 2: {
  545. const u16 *cache = base;
  546. return cache[idx];
  547. }
  548. default:
  549. BUG();
  550. }
  551. /* unreachable */
  552. return -1;
  553. }
  554. struct snd_soc_rbtree_node {
  555. struct rb_node node;
  556. unsigned int reg;
  557. unsigned int value;
  558. unsigned int defval;
  559. } __attribute__ ((packed));
  560. struct snd_soc_rbtree_ctx {
  561. struct rb_root root;
  562. };
  563. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  564. struct rb_root *root, unsigned int reg)
  565. {
  566. struct rb_node *node;
  567. struct snd_soc_rbtree_node *rbnode;
  568. node = root->rb_node;
  569. while (node) {
  570. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  571. if (rbnode->reg < reg)
  572. node = node->rb_left;
  573. else if (rbnode->reg > reg)
  574. node = node->rb_right;
  575. else
  576. return rbnode;
  577. }
  578. return NULL;
  579. }
  580. static int snd_soc_rbtree_insert(struct rb_root *root,
  581. struct snd_soc_rbtree_node *rbnode)
  582. {
  583. struct rb_node **new, *parent;
  584. struct snd_soc_rbtree_node *rbnode_tmp;
  585. parent = NULL;
  586. new = &root->rb_node;
  587. while (*new) {
  588. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  589. node);
  590. parent = *new;
  591. if (rbnode_tmp->reg < rbnode->reg)
  592. new = &((*new)->rb_left);
  593. else if (rbnode_tmp->reg > rbnode->reg)
  594. new = &((*new)->rb_right);
  595. else
  596. return 0;
  597. }
  598. /* insert the node into the rbtree */
  599. rb_link_node(&rbnode->node, parent, new);
  600. rb_insert_color(&rbnode->node, root);
  601. return 1;
  602. }
  603. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  604. {
  605. struct snd_soc_rbtree_ctx *rbtree_ctx;
  606. struct rb_node *node;
  607. struct snd_soc_rbtree_node *rbnode;
  608. unsigned int val;
  609. int ret;
  610. rbtree_ctx = codec->reg_cache;
  611. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  612. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  613. if (rbnode->value == rbnode->defval)
  614. continue;
  615. ret = snd_soc_cache_read(codec, rbnode->reg, &val);
  616. if (ret)
  617. return ret;
  618. codec->cache_bypass = 1;
  619. ret = snd_soc_write(codec, rbnode->reg, val);
  620. codec->cache_bypass = 0;
  621. if (ret)
  622. return ret;
  623. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  624. rbnode->reg, val);
  625. }
  626. return 0;
  627. }
  628. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  629. unsigned int reg, unsigned int value)
  630. {
  631. struct snd_soc_rbtree_ctx *rbtree_ctx;
  632. struct snd_soc_rbtree_node *rbnode;
  633. rbtree_ctx = codec->reg_cache;
  634. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  635. if (rbnode) {
  636. if (rbnode->value == value)
  637. return 0;
  638. rbnode->value = value;
  639. } else {
  640. /* bail out early, no need to create the rbnode yet */
  641. if (!value)
  642. return 0;
  643. /*
  644. * for uninitialized registers whose value is changed
  645. * from the default zero, create an rbnode and insert
  646. * it into the tree.
  647. */
  648. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  649. if (!rbnode)
  650. return -ENOMEM;
  651. rbnode->reg = reg;
  652. rbnode->value = value;
  653. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  654. }
  655. return 0;
  656. }
  657. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  658. unsigned int reg, unsigned int *value)
  659. {
  660. struct snd_soc_rbtree_ctx *rbtree_ctx;
  661. struct snd_soc_rbtree_node *rbnode;
  662. rbtree_ctx = codec->reg_cache;
  663. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  664. if (rbnode) {
  665. *value = rbnode->value;
  666. } else {
  667. /* uninitialized registers default to 0 */
  668. *value = 0;
  669. }
  670. return 0;
  671. }
  672. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  673. {
  674. struct rb_node *next;
  675. struct snd_soc_rbtree_ctx *rbtree_ctx;
  676. struct snd_soc_rbtree_node *rbtree_node;
  677. /* if we've already been called then just return */
  678. rbtree_ctx = codec->reg_cache;
  679. if (!rbtree_ctx)
  680. return 0;
  681. /* free up the rbtree */
  682. next = rb_first(&rbtree_ctx->root);
  683. while (next) {
  684. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  685. next = rb_next(&rbtree_node->node);
  686. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  687. kfree(rbtree_node);
  688. }
  689. /* release the resources */
  690. kfree(codec->reg_cache);
  691. codec->reg_cache = NULL;
  692. return 0;
  693. }
  694. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  695. {
  696. struct snd_soc_rbtree_node *rbtree_node;
  697. struct snd_soc_rbtree_ctx *rbtree_ctx;
  698. unsigned int val;
  699. unsigned int word_size;
  700. int i;
  701. int ret;
  702. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  703. if (!codec->reg_cache)
  704. return -ENOMEM;
  705. rbtree_ctx = codec->reg_cache;
  706. rbtree_ctx->root = RB_ROOT;
  707. if (!codec->reg_def_copy)
  708. return 0;
  709. /*
  710. * populate the rbtree with the initialized registers. All other
  711. * registers will be inserted when they are first modified.
  712. */
  713. word_size = codec->driver->reg_word_size;
  714. for (i = 0; i < codec->driver->reg_cache_size; ++i) {
  715. val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
  716. if (!val)
  717. continue;
  718. rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
  719. if (!rbtree_node) {
  720. ret = -ENOMEM;
  721. snd_soc_cache_exit(codec);
  722. break;
  723. }
  724. rbtree_node->reg = i;
  725. rbtree_node->value = val;
  726. rbtree_node->defval = val;
  727. snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
  728. }
  729. return 0;
  730. }
  731. #ifdef CONFIG_SND_SOC_CACHE_LZO
  732. struct snd_soc_lzo_ctx {
  733. void *wmem;
  734. void *dst;
  735. const void *src;
  736. size_t src_len;
  737. size_t dst_len;
  738. size_t decompressed_size;
  739. unsigned long *sync_bmp;
  740. int sync_bmp_nbits;
  741. };
  742. #define LZO_BLOCK_NUM 8
  743. static int snd_soc_lzo_block_count(void)
  744. {
  745. return LZO_BLOCK_NUM;
  746. }
  747. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  748. {
  749. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  750. if (!lzo_ctx->wmem)
  751. return -ENOMEM;
  752. return 0;
  753. }
  754. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  755. {
  756. size_t compress_size;
  757. int ret;
  758. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  759. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  760. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  761. return -EINVAL;
  762. lzo_ctx->dst_len = compress_size;
  763. return 0;
  764. }
  765. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  766. {
  767. size_t dst_len;
  768. int ret;
  769. dst_len = lzo_ctx->dst_len;
  770. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  771. lzo_ctx->dst, &dst_len);
  772. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  773. return -EINVAL;
  774. return 0;
  775. }
  776. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  777. struct snd_soc_lzo_ctx *lzo_ctx)
  778. {
  779. int ret;
  780. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  781. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  782. if (!lzo_ctx->dst) {
  783. lzo_ctx->dst_len = 0;
  784. return -ENOMEM;
  785. }
  786. ret = snd_soc_lzo_compress(lzo_ctx);
  787. if (ret < 0)
  788. return ret;
  789. return 0;
  790. }
  791. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  792. struct snd_soc_lzo_ctx *lzo_ctx)
  793. {
  794. int ret;
  795. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  796. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  797. if (!lzo_ctx->dst) {
  798. lzo_ctx->dst_len = 0;
  799. return -ENOMEM;
  800. }
  801. ret = snd_soc_lzo_decompress(lzo_ctx);
  802. if (ret < 0)
  803. return ret;
  804. return 0;
  805. }
  806. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  807. unsigned int reg)
  808. {
  809. const struct snd_soc_codec_driver *codec_drv;
  810. codec_drv = codec->driver;
  811. return (reg * codec_drv->reg_word_size) /
  812. DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  813. }
  814. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  815. unsigned int reg)
  816. {
  817. const struct snd_soc_codec_driver *codec_drv;
  818. codec_drv = codec->driver;
  819. return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
  820. codec_drv->reg_word_size);
  821. }
  822. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  823. {
  824. const struct snd_soc_codec_driver *codec_drv;
  825. codec_drv = codec->driver;
  826. return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  827. }
  828. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  829. {
  830. struct snd_soc_lzo_ctx **lzo_blocks;
  831. unsigned int val;
  832. int i;
  833. int ret;
  834. lzo_blocks = codec->reg_cache;
  835. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  836. ret = snd_soc_cache_read(codec, i, &val);
  837. if (ret)
  838. return ret;
  839. codec->cache_bypass = 1;
  840. ret = snd_soc_write(codec, i, val);
  841. codec->cache_bypass = 0;
  842. if (ret)
  843. return ret;
  844. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  845. i, val);
  846. }
  847. return 0;
  848. }
  849. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  850. unsigned int reg, unsigned int value)
  851. {
  852. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  853. int ret, blkindex, blkpos;
  854. size_t blksize, tmp_dst_len;
  855. void *tmp_dst;
  856. /* index of the compressed lzo block */
  857. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  858. /* register index within the decompressed block */
  859. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  860. /* size of the compressed block */
  861. blksize = snd_soc_lzo_get_blksize(codec);
  862. lzo_blocks = codec->reg_cache;
  863. lzo_block = lzo_blocks[blkindex];
  864. /* save the pointer and length of the compressed block */
  865. tmp_dst = lzo_block->dst;
  866. tmp_dst_len = lzo_block->dst_len;
  867. /* prepare the source to be the compressed block */
  868. lzo_block->src = lzo_block->dst;
  869. lzo_block->src_len = lzo_block->dst_len;
  870. /* decompress the block */
  871. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  872. if (ret < 0) {
  873. kfree(lzo_block->dst);
  874. goto out;
  875. }
  876. /* write the new value to the cache */
  877. if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
  878. codec->driver->reg_word_size)) {
  879. kfree(lzo_block->dst);
  880. goto out;
  881. }
  882. /* prepare the source to be the decompressed block */
  883. lzo_block->src = lzo_block->dst;
  884. lzo_block->src_len = lzo_block->dst_len;
  885. /* compress the block */
  886. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  887. if (ret < 0) {
  888. kfree(lzo_block->dst);
  889. kfree(lzo_block->src);
  890. goto out;
  891. }
  892. /* set the bit so we know we have to sync this register */
  893. set_bit(reg, lzo_block->sync_bmp);
  894. kfree(tmp_dst);
  895. kfree(lzo_block->src);
  896. return 0;
  897. out:
  898. lzo_block->dst = tmp_dst;
  899. lzo_block->dst_len = tmp_dst_len;
  900. return ret;
  901. }
  902. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  903. unsigned int reg, unsigned int *value)
  904. {
  905. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  906. int ret, blkindex, blkpos;
  907. size_t blksize, tmp_dst_len;
  908. void *tmp_dst;
  909. *value = 0;
  910. /* index of the compressed lzo block */
  911. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  912. /* register index within the decompressed block */
  913. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  914. /* size of the compressed block */
  915. blksize = snd_soc_lzo_get_blksize(codec);
  916. lzo_blocks = codec->reg_cache;
  917. lzo_block = lzo_blocks[blkindex];
  918. /* save the pointer and length of the compressed block */
  919. tmp_dst = lzo_block->dst;
  920. tmp_dst_len = lzo_block->dst_len;
  921. /* prepare the source to be the compressed block */
  922. lzo_block->src = lzo_block->dst;
  923. lzo_block->src_len = lzo_block->dst_len;
  924. /* decompress the block */
  925. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  926. if (ret >= 0)
  927. /* fetch the value from the cache */
  928. *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
  929. codec->driver->reg_word_size);
  930. kfree(lzo_block->dst);
  931. /* restore the pointer and length of the compressed block */
  932. lzo_block->dst = tmp_dst;
  933. lzo_block->dst_len = tmp_dst_len;
  934. return 0;
  935. }
  936. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  937. {
  938. struct snd_soc_lzo_ctx **lzo_blocks;
  939. int i, blkcount;
  940. lzo_blocks = codec->reg_cache;
  941. if (!lzo_blocks)
  942. return 0;
  943. blkcount = snd_soc_lzo_block_count();
  944. /*
  945. * the pointer to the bitmap used for syncing the cache
  946. * is shared amongst all lzo_blocks. Ensure it is freed
  947. * only once.
  948. */
  949. if (lzo_blocks[0])
  950. kfree(lzo_blocks[0]->sync_bmp);
  951. for (i = 0; i < blkcount; ++i) {
  952. if (lzo_blocks[i]) {
  953. kfree(lzo_blocks[i]->wmem);
  954. kfree(lzo_blocks[i]->dst);
  955. }
  956. /* each lzo_block is a pointer returned by kmalloc or NULL */
  957. kfree(lzo_blocks[i]);
  958. }
  959. kfree(lzo_blocks);
  960. codec->reg_cache = NULL;
  961. return 0;
  962. }
  963. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  964. {
  965. struct snd_soc_lzo_ctx **lzo_blocks;
  966. size_t bmp_size;
  967. const struct snd_soc_codec_driver *codec_drv;
  968. int ret, tofree, i, blksize, blkcount;
  969. const char *p, *end;
  970. unsigned long *sync_bmp;
  971. ret = 0;
  972. codec_drv = codec->driver;
  973. /*
  974. * If we have not been given a default register cache
  975. * then allocate a dummy zero-ed out region, compress it
  976. * and remember to free it afterwards.
  977. */
  978. tofree = 0;
  979. if (!codec->reg_def_copy)
  980. tofree = 1;
  981. if (!codec->reg_def_copy) {
  982. codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
  983. if (!codec->reg_def_copy)
  984. return -ENOMEM;
  985. }
  986. blkcount = snd_soc_lzo_block_count();
  987. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  988. GFP_KERNEL);
  989. if (!codec->reg_cache) {
  990. ret = -ENOMEM;
  991. goto err_tofree;
  992. }
  993. lzo_blocks = codec->reg_cache;
  994. /*
  995. * allocate a bitmap to be used when syncing the cache with
  996. * the hardware. Each time a register is modified, the corresponding
  997. * bit is set in the bitmap, so we know that we have to sync
  998. * that register.
  999. */
  1000. bmp_size = codec_drv->reg_cache_size;
  1001. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  1002. GFP_KERNEL);
  1003. if (!sync_bmp) {
  1004. ret = -ENOMEM;
  1005. goto err;
  1006. }
  1007. bitmap_zero(sync_bmp, bmp_size);
  1008. /* allocate the lzo blocks and initialize them */
  1009. for (i = 0; i < blkcount; ++i) {
  1010. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  1011. GFP_KERNEL);
  1012. if (!lzo_blocks[i]) {
  1013. kfree(sync_bmp);
  1014. ret = -ENOMEM;
  1015. goto err;
  1016. }
  1017. lzo_blocks[i]->sync_bmp = sync_bmp;
  1018. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  1019. /* alloc the working space for the compressed block */
  1020. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  1021. if (ret < 0)
  1022. goto err;
  1023. }
  1024. blksize = snd_soc_lzo_get_blksize(codec);
  1025. p = codec->reg_def_copy;
  1026. end = codec->reg_def_copy + codec->reg_size;
  1027. /* compress the register map and fill the lzo blocks */
  1028. for (i = 0; i < blkcount; ++i, p += blksize) {
  1029. lzo_blocks[i]->src = p;
  1030. if (p + blksize > end)
  1031. lzo_blocks[i]->src_len = end - p;
  1032. else
  1033. lzo_blocks[i]->src_len = blksize;
  1034. ret = snd_soc_lzo_compress_cache_block(codec,
  1035. lzo_blocks[i]);
  1036. if (ret < 0)
  1037. goto err;
  1038. lzo_blocks[i]->decompressed_size =
  1039. lzo_blocks[i]->src_len;
  1040. }
  1041. if (tofree) {
  1042. kfree(codec->reg_def_copy);
  1043. codec->reg_def_copy = NULL;
  1044. }
  1045. return 0;
  1046. err:
  1047. snd_soc_cache_exit(codec);
  1048. err_tofree:
  1049. if (tofree) {
  1050. kfree(codec->reg_def_copy);
  1051. codec->reg_def_copy = NULL;
  1052. }
  1053. return ret;
  1054. }
  1055. #endif
  1056. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  1057. {
  1058. int i;
  1059. int ret;
  1060. const struct snd_soc_codec_driver *codec_drv;
  1061. unsigned int val;
  1062. codec_drv = codec->driver;
  1063. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  1064. ret = snd_soc_cache_read(codec, i, &val);
  1065. if (ret)
  1066. return ret;
  1067. if (codec->reg_def_copy)
  1068. if (snd_soc_get_cache_val(codec->reg_def_copy,
  1069. i, codec_drv->reg_word_size) == val)
  1070. continue;
  1071. ret = snd_soc_write(codec, i, val);
  1072. if (ret)
  1073. return ret;
  1074. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  1075. i, val);
  1076. }
  1077. return 0;
  1078. }
  1079. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  1080. unsigned int reg, unsigned int value)
  1081. {
  1082. snd_soc_set_cache_val(codec->reg_cache, reg, value,
  1083. codec->driver->reg_word_size);
  1084. return 0;
  1085. }
  1086. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  1087. unsigned int reg, unsigned int *value)
  1088. {
  1089. *value = snd_soc_get_cache_val(codec->reg_cache, reg,
  1090. codec->driver->reg_word_size);
  1091. return 0;
  1092. }
  1093. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  1094. {
  1095. if (!codec->reg_cache)
  1096. return 0;
  1097. kfree(codec->reg_cache);
  1098. codec->reg_cache = NULL;
  1099. return 0;
  1100. }
  1101. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  1102. {
  1103. const struct snd_soc_codec_driver *codec_drv;
  1104. codec_drv = codec->driver;
  1105. if (codec->reg_def_copy)
  1106. codec->reg_cache = kmemdup(codec->reg_def_copy,
  1107. codec->reg_size, GFP_KERNEL);
  1108. else
  1109. codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
  1110. if (!codec->reg_cache)
  1111. return -ENOMEM;
  1112. return 0;
  1113. }
  1114. /* an array of all supported compression types */
  1115. static const struct snd_soc_cache_ops cache_types[] = {
  1116. /* Flat *must* be the first entry for fallback */
  1117. {
  1118. .id = SND_SOC_FLAT_COMPRESSION,
  1119. .name = "flat",
  1120. .init = snd_soc_flat_cache_init,
  1121. .exit = snd_soc_flat_cache_exit,
  1122. .read = snd_soc_flat_cache_read,
  1123. .write = snd_soc_flat_cache_write,
  1124. .sync = snd_soc_flat_cache_sync
  1125. },
  1126. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1127. {
  1128. .id = SND_SOC_LZO_COMPRESSION,
  1129. .name = "LZO",
  1130. .init = snd_soc_lzo_cache_init,
  1131. .exit = snd_soc_lzo_cache_exit,
  1132. .read = snd_soc_lzo_cache_read,
  1133. .write = snd_soc_lzo_cache_write,
  1134. .sync = snd_soc_lzo_cache_sync
  1135. },
  1136. #endif
  1137. {
  1138. .id = SND_SOC_RBTREE_COMPRESSION,
  1139. .name = "rbtree",
  1140. .init = snd_soc_rbtree_cache_init,
  1141. .exit = snd_soc_rbtree_cache_exit,
  1142. .read = snd_soc_rbtree_cache_read,
  1143. .write = snd_soc_rbtree_cache_write,
  1144. .sync = snd_soc_rbtree_cache_sync
  1145. }
  1146. };
  1147. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1148. {
  1149. int i;
  1150. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1151. if (cache_types[i].id == codec->compress_type)
  1152. break;
  1153. /* Fall back to flat compression */
  1154. if (i == ARRAY_SIZE(cache_types)) {
  1155. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1156. codec->compress_type);
  1157. i = 0;
  1158. }
  1159. mutex_init(&codec->cache_rw_mutex);
  1160. codec->cache_ops = &cache_types[i];
  1161. if (codec->cache_ops->init) {
  1162. if (codec->cache_ops->name)
  1163. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1164. codec->cache_ops->name, codec->name);
  1165. return codec->cache_ops->init(codec);
  1166. }
  1167. return -EINVAL;
  1168. }
  1169. /*
  1170. * NOTE: keep in mind that this function might be called
  1171. * multiple times.
  1172. */
  1173. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1174. {
  1175. if (codec->cache_ops && codec->cache_ops->exit) {
  1176. if (codec->cache_ops->name)
  1177. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1178. codec->cache_ops->name, codec->name);
  1179. return codec->cache_ops->exit(codec);
  1180. }
  1181. return -EINVAL;
  1182. }
  1183. /**
  1184. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1185. *
  1186. * @codec: CODEC to configure.
  1187. * @reg: The register index.
  1188. * @value: The value to be returned.
  1189. */
  1190. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1191. unsigned int reg, unsigned int *value)
  1192. {
  1193. int ret;
  1194. mutex_lock(&codec->cache_rw_mutex);
  1195. if (value && codec->cache_ops && codec->cache_ops->read) {
  1196. ret = codec->cache_ops->read(codec, reg, value);
  1197. mutex_unlock(&codec->cache_rw_mutex);
  1198. return ret;
  1199. }
  1200. mutex_unlock(&codec->cache_rw_mutex);
  1201. return -EINVAL;
  1202. }
  1203. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1204. /**
  1205. * snd_soc_cache_write: Set the value of a given register in the cache.
  1206. *
  1207. * @codec: CODEC to configure.
  1208. * @reg: The register index.
  1209. * @value: The new register value.
  1210. */
  1211. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1212. unsigned int reg, unsigned int value)
  1213. {
  1214. int ret;
  1215. mutex_lock(&codec->cache_rw_mutex);
  1216. if (codec->cache_ops && codec->cache_ops->write) {
  1217. ret = codec->cache_ops->write(codec, reg, value);
  1218. mutex_unlock(&codec->cache_rw_mutex);
  1219. return ret;
  1220. }
  1221. mutex_unlock(&codec->cache_rw_mutex);
  1222. return -EINVAL;
  1223. }
  1224. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1225. /**
  1226. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1227. *
  1228. * @codec: CODEC to configure.
  1229. *
  1230. * Any registers that should not be synced should be marked as
  1231. * volatile. In general drivers can choose not to use the provided
  1232. * syncing functionality if they so require.
  1233. */
  1234. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1235. {
  1236. int ret;
  1237. const char *name;
  1238. if (!codec->cache_sync) {
  1239. return 0;
  1240. }
  1241. if (!codec->cache_ops || !codec->cache_ops->sync)
  1242. return -EINVAL;
  1243. if (codec->cache_ops->name)
  1244. name = codec->cache_ops->name;
  1245. else
  1246. name = "unknown";
  1247. if (codec->cache_ops->name)
  1248. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1249. codec->cache_ops->name, codec->name);
  1250. trace_snd_soc_cache_sync(codec, name, "start");
  1251. ret = codec->cache_ops->sync(codec);
  1252. if (!ret)
  1253. codec->cache_sync = 0;
  1254. trace_snd_soc_cache_sync(codec, name, "end");
  1255. return ret;
  1256. }
  1257. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
  1258. static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
  1259. unsigned int reg)
  1260. {
  1261. const struct snd_soc_codec_driver *codec_drv;
  1262. unsigned int min, max, index;
  1263. codec_drv = codec->driver;
  1264. min = 0;
  1265. max = codec_drv->reg_access_size - 1;
  1266. do {
  1267. index = (min + max) / 2;
  1268. if (codec_drv->reg_access_default[index].reg == reg)
  1269. return index;
  1270. if (codec_drv->reg_access_default[index].reg < reg)
  1271. min = index + 1;
  1272. else
  1273. max = index;
  1274. } while (min <= max);
  1275. return -1;
  1276. }
  1277. int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
  1278. unsigned int reg)
  1279. {
  1280. int index;
  1281. if (reg >= codec->driver->reg_cache_size)
  1282. return 1;
  1283. index = snd_soc_get_reg_access_index(codec, reg);
  1284. if (index < 0)
  1285. return 0;
  1286. return codec->driver->reg_access_default[index].vol;
  1287. }
  1288. EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
  1289. int snd_soc_default_readable_register(struct snd_soc_codec *codec,
  1290. unsigned int reg)
  1291. {
  1292. int index;
  1293. if (reg >= codec->driver->reg_cache_size)
  1294. return 1;
  1295. index = snd_soc_get_reg_access_index(codec, reg);
  1296. if (index < 0)
  1297. return 0;
  1298. return codec->driver->reg_access_default[index].read;
  1299. }
  1300. EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);