resource_tracker.c 67 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies.
  4. * All rights reserved.
  5. * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * OpenIB.org BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or
  14. * without modification, are permitted provided that the following
  15. * conditions are met:
  16. *
  17. * - Redistributions of source code must retain the above
  18. * copyright notice, this list of conditions and the following
  19. * disclaimer.
  20. *
  21. * - Redistributions in binary form must reproduce the above
  22. * copyright notice, this list of conditions and the following
  23. * disclaimer in the documentation and/or other materials
  24. * provided with the distribution.
  25. *
  26. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33. * SOFTWARE.
  34. */
  35. #include <linux/sched.h>
  36. #include <linux/pci.h>
  37. #include <linux/errno.h>
  38. #include <linux/kernel.h>
  39. #include <linux/io.h>
  40. #include <linux/slab.h>
  41. #include <linux/mlx4/cmd.h>
  42. #include <linux/mlx4/qp.h>
  43. #include "mlx4.h"
  44. #include "fw.h"
  45. #define MLX4_MAC_VALID (1ull << 63)
  46. #define MLX4_MAC_MASK 0x7fffffffffffffffULL
  47. #define ETH_ALEN 6
  48. struct mac_res {
  49. struct list_head list;
  50. u64 mac;
  51. u8 port;
  52. };
  53. struct res_common {
  54. struct list_head list;
  55. u32 res_id;
  56. int owner;
  57. int state;
  58. int from_state;
  59. int to_state;
  60. int removing;
  61. };
  62. enum {
  63. RES_ANY_BUSY = 1
  64. };
  65. struct res_gid {
  66. struct list_head list;
  67. u8 gid[16];
  68. enum mlx4_protocol prot;
  69. enum mlx4_steer_type steer;
  70. };
  71. enum res_qp_states {
  72. RES_QP_BUSY = RES_ANY_BUSY,
  73. /* QP number was allocated */
  74. RES_QP_RESERVED,
  75. /* ICM memory for QP context was mapped */
  76. RES_QP_MAPPED,
  77. /* QP is in hw ownership */
  78. RES_QP_HW
  79. };
  80. struct res_qp {
  81. struct res_common com;
  82. struct res_mtt *mtt;
  83. struct res_cq *rcq;
  84. struct res_cq *scq;
  85. struct res_srq *srq;
  86. struct list_head mcg_list;
  87. spinlock_t mcg_spl;
  88. int local_qpn;
  89. };
  90. enum res_mtt_states {
  91. RES_MTT_BUSY = RES_ANY_BUSY,
  92. RES_MTT_ALLOCATED,
  93. };
  94. static inline const char *mtt_states_str(enum res_mtt_states state)
  95. {
  96. switch (state) {
  97. case RES_MTT_BUSY: return "RES_MTT_BUSY";
  98. case RES_MTT_ALLOCATED: return "RES_MTT_ALLOCATED";
  99. default: return "Unknown";
  100. }
  101. }
  102. struct res_mtt {
  103. struct res_common com;
  104. int order;
  105. atomic_t ref_count;
  106. };
  107. enum res_mpt_states {
  108. RES_MPT_BUSY = RES_ANY_BUSY,
  109. RES_MPT_RESERVED,
  110. RES_MPT_MAPPED,
  111. RES_MPT_HW,
  112. };
  113. struct res_mpt {
  114. struct res_common com;
  115. struct res_mtt *mtt;
  116. int key;
  117. };
  118. enum res_eq_states {
  119. RES_EQ_BUSY = RES_ANY_BUSY,
  120. RES_EQ_RESERVED,
  121. RES_EQ_HW,
  122. };
  123. struct res_eq {
  124. struct res_common com;
  125. struct res_mtt *mtt;
  126. };
  127. enum res_cq_states {
  128. RES_CQ_BUSY = RES_ANY_BUSY,
  129. RES_CQ_ALLOCATED,
  130. RES_CQ_HW,
  131. };
  132. struct res_cq {
  133. struct res_common com;
  134. struct res_mtt *mtt;
  135. atomic_t ref_count;
  136. };
  137. enum res_srq_states {
  138. RES_SRQ_BUSY = RES_ANY_BUSY,
  139. RES_SRQ_ALLOCATED,
  140. RES_SRQ_HW,
  141. };
  142. struct res_srq {
  143. struct res_common com;
  144. struct res_mtt *mtt;
  145. struct res_cq *cq;
  146. atomic_t ref_count;
  147. };
  148. enum res_counter_states {
  149. RES_COUNTER_BUSY = RES_ANY_BUSY,
  150. RES_COUNTER_ALLOCATED,
  151. };
  152. struct res_counter {
  153. struct res_common com;
  154. int port;
  155. };
  156. /* For Debug uses */
  157. static const char *ResourceType(enum mlx4_resource rt)
  158. {
  159. switch (rt) {
  160. case RES_QP: return "RES_QP";
  161. case RES_CQ: return "RES_CQ";
  162. case RES_SRQ: return "RES_SRQ";
  163. case RES_MPT: return "RES_MPT";
  164. case RES_MTT: return "RES_MTT";
  165. case RES_MAC: return "RES_MAC";
  166. case RES_EQ: return "RES_EQ";
  167. case RES_COUNTER: return "RES_COUNTER";
  168. default: return "Unknown resource type !!!";
  169. };
  170. }
  171. int mlx4_init_resource_tracker(struct mlx4_dev *dev)
  172. {
  173. struct mlx4_priv *priv = mlx4_priv(dev);
  174. int i;
  175. int t;
  176. priv->mfunc.master.res_tracker.slave_list =
  177. kzalloc(dev->num_slaves * sizeof(struct slave_list),
  178. GFP_KERNEL);
  179. if (!priv->mfunc.master.res_tracker.slave_list)
  180. return -ENOMEM;
  181. for (i = 0 ; i < dev->num_slaves; i++) {
  182. for (t = 0; t < MLX4_NUM_OF_RESOURCE_TYPE; ++t)
  183. INIT_LIST_HEAD(&priv->mfunc.master.res_tracker.
  184. slave_list[i].res_list[t]);
  185. mutex_init(&priv->mfunc.master.res_tracker.slave_list[i].mutex);
  186. }
  187. mlx4_dbg(dev, "Started init_resource_tracker: %ld slaves\n",
  188. dev->num_slaves);
  189. for (i = 0 ; i < MLX4_NUM_OF_RESOURCE_TYPE; i++)
  190. INIT_RADIX_TREE(&priv->mfunc.master.res_tracker.res_tree[i],
  191. GFP_ATOMIC|__GFP_NOWARN);
  192. spin_lock_init(&priv->mfunc.master.res_tracker.lock);
  193. return 0 ;
  194. }
  195. void mlx4_free_resource_tracker(struct mlx4_dev *dev,
  196. enum mlx4_res_tracker_free_type type)
  197. {
  198. struct mlx4_priv *priv = mlx4_priv(dev);
  199. int i;
  200. if (priv->mfunc.master.res_tracker.slave_list) {
  201. if (type != RES_TR_FREE_STRUCTS_ONLY)
  202. for (i = 0 ; i < dev->num_slaves; i++)
  203. if (type == RES_TR_FREE_ALL ||
  204. dev->caps.function != i)
  205. mlx4_delete_all_resources_for_slave(dev, i);
  206. if (type != RES_TR_FREE_SLAVES_ONLY) {
  207. kfree(priv->mfunc.master.res_tracker.slave_list);
  208. priv->mfunc.master.res_tracker.slave_list = NULL;
  209. }
  210. }
  211. }
  212. static void update_ud_gid(struct mlx4_dev *dev,
  213. struct mlx4_qp_context *qp_ctx, u8 slave)
  214. {
  215. u32 ts = (be32_to_cpu(qp_ctx->flags) >> 16) & 0xff;
  216. if (MLX4_QP_ST_UD == ts)
  217. qp_ctx->pri_path.mgid_index = 0x80 | slave;
  218. mlx4_dbg(dev, "slave %d, new gid index: 0x%x ",
  219. slave, qp_ctx->pri_path.mgid_index);
  220. }
  221. static int mpt_mask(struct mlx4_dev *dev)
  222. {
  223. return dev->caps.num_mpts - 1;
  224. }
  225. static void *find_res(struct mlx4_dev *dev, int res_id,
  226. enum mlx4_resource type)
  227. {
  228. struct mlx4_priv *priv = mlx4_priv(dev);
  229. return radix_tree_lookup(&priv->mfunc.master.res_tracker.res_tree[type],
  230. res_id);
  231. }
  232. static int get_res(struct mlx4_dev *dev, int slave, int res_id,
  233. enum mlx4_resource type,
  234. void *res)
  235. {
  236. struct res_common *r;
  237. int err = 0;
  238. spin_lock_irq(mlx4_tlock(dev));
  239. r = find_res(dev, res_id, type);
  240. if (!r) {
  241. err = -ENONET;
  242. goto exit;
  243. }
  244. if (r->state == RES_ANY_BUSY) {
  245. err = -EBUSY;
  246. goto exit;
  247. }
  248. if (r->owner != slave) {
  249. err = -EPERM;
  250. goto exit;
  251. }
  252. r->from_state = r->state;
  253. r->state = RES_ANY_BUSY;
  254. mlx4_dbg(dev, "res %s id 0x%x to busy\n",
  255. ResourceType(type), r->res_id);
  256. if (res)
  257. *((struct res_common **)res) = r;
  258. exit:
  259. spin_unlock_irq(mlx4_tlock(dev));
  260. return err;
  261. }
  262. int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev,
  263. enum mlx4_resource type,
  264. int res_id, int *slave)
  265. {
  266. struct res_common *r;
  267. int err = -ENOENT;
  268. int id = res_id;
  269. if (type == RES_QP)
  270. id &= 0x7fffff;
  271. spin_lock(mlx4_tlock(dev));
  272. r = find_res(dev, id, type);
  273. if (r) {
  274. *slave = r->owner;
  275. err = 0;
  276. }
  277. spin_unlock(mlx4_tlock(dev));
  278. return err;
  279. }
  280. static void put_res(struct mlx4_dev *dev, int slave, int res_id,
  281. enum mlx4_resource type)
  282. {
  283. struct res_common *r;
  284. spin_lock_irq(mlx4_tlock(dev));
  285. r = find_res(dev, res_id, type);
  286. if (r)
  287. r->state = r->from_state;
  288. spin_unlock_irq(mlx4_tlock(dev));
  289. }
  290. static struct res_common *alloc_qp_tr(int id)
  291. {
  292. struct res_qp *ret;
  293. ret = kzalloc(sizeof *ret, GFP_KERNEL);
  294. if (!ret)
  295. return NULL;
  296. ret->com.res_id = id;
  297. ret->com.state = RES_QP_RESERVED;
  298. ret->local_qpn = id;
  299. INIT_LIST_HEAD(&ret->mcg_list);
  300. spin_lock_init(&ret->mcg_spl);
  301. return &ret->com;
  302. }
  303. static struct res_common *alloc_mtt_tr(int id, int order)
  304. {
  305. struct res_mtt *ret;
  306. ret = kzalloc(sizeof *ret, GFP_KERNEL);
  307. if (!ret)
  308. return NULL;
  309. ret->com.res_id = id;
  310. ret->order = order;
  311. ret->com.state = RES_MTT_ALLOCATED;
  312. atomic_set(&ret->ref_count, 0);
  313. return &ret->com;
  314. }
  315. static struct res_common *alloc_mpt_tr(int id, int key)
  316. {
  317. struct res_mpt *ret;
  318. ret = kzalloc(sizeof *ret, GFP_KERNEL);
  319. if (!ret)
  320. return NULL;
  321. ret->com.res_id = id;
  322. ret->com.state = RES_MPT_RESERVED;
  323. ret->key = key;
  324. return &ret->com;
  325. }
  326. static struct res_common *alloc_eq_tr(int id)
  327. {
  328. struct res_eq *ret;
  329. ret = kzalloc(sizeof *ret, GFP_KERNEL);
  330. if (!ret)
  331. return NULL;
  332. ret->com.res_id = id;
  333. ret->com.state = RES_EQ_RESERVED;
  334. return &ret->com;
  335. }
  336. static struct res_common *alloc_cq_tr(int id)
  337. {
  338. struct res_cq *ret;
  339. ret = kzalloc(sizeof *ret, GFP_KERNEL);
  340. if (!ret)
  341. return NULL;
  342. ret->com.res_id = id;
  343. ret->com.state = RES_CQ_ALLOCATED;
  344. atomic_set(&ret->ref_count, 0);
  345. return &ret->com;
  346. }
  347. static struct res_common *alloc_srq_tr(int id)
  348. {
  349. struct res_srq *ret;
  350. ret = kzalloc(sizeof *ret, GFP_KERNEL);
  351. if (!ret)
  352. return NULL;
  353. ret->com.res_id = id;
  354. ret->com.state = RES_SRQ_ALLOCATED;
  355. atomic_set(&ret->ref_count, 0);
  356. return &ret->com;
  357. }
  358. static struct res_common *alloc_counter_tr(int id)
  359. {
  360. struct res_counter *ret;
  361. ret = kzalloc(sizeof *ret, GFP_KERNEL);
  362. if (!ret)
  363. return NULL;
  364. ret->com.res_id = id;
  365. ret->com.state = RES_COUNTER_ALLOCATED;
  366. return &ret->com;
  367. }
  368. static struct res_common *alloc_tr(int id, enum mlx4_resource type, int slave,
  369. int extra)
  370. {
  371. struct res_common *ret;
  372. switch (type) {
  373. case RES_QP:
  374. ret = alloc_qp_tr(id);
  375. break;
  376. case RES_MPT:
  377. ret = alloc_mpt_tr(id, extra);
  378. break;
  379. case RES_MTT:
  380. ret = alloc_mtt_tr(id, extra);
  381. break;
  382. case RES_EQ:
  383. ret = alloc_eq_tr(id);
  384. break;
  385. case RES_CQ:
  386. ret = alloc_cq_tr(id);
  387. break;
  388. case RES_SRQ:
  389. ret = alloc_srq_tr(id);
  390. break;
  391. case RES_MAC:
  392. printk(KERN_ERR "implementation missing\n");
  393. return NULL;
  394. case RES_COUNTER:
  395. ret = alloc_counter_tr(id);
  396. break;
  397. default:
  398. return NULL;
  399. }
  400. if (ret)
  401. ret->owner = slave;
  402. return ret;
  403. }
  404. static int add_res_range(struct mlx4_dev *dev, int slave, int base, int count,
  405. enum mlx4_resource type, int extra)
  406. {
  407. int i;
  408. int err;
  409. struct mlx4_priv *priv = mlx4_priv(dev);
  410. struct res_common **res_arr;
  411. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  412. struct radix_tree_root *root = &tracker->res_tree[type];
  413. res_arr = kzalloc(count * sizeof *res_arr, GFP_KERNEL);
  414. if (!res_arr)
  415. return -ENOMEM;
  416. for (i = 0; i < count; ++i) {
  417. res_arr[i] = alloc_tr(base + i, type, slave, extra);
  418. if (!res_arr[i]) {
  419. for (--i; i >= 0; --i)
  420. kfree(res_arr[i]);
  421. kfree(res_arr);
  422. return -ENOMEM;
  423. }
  424. }
  425. spin_lock_irq(mlx4_tlock(dev));
  426. for (i = 0; i < count; ++i) {
  427. if (find_res(dev, base + i, type)) {
  428. err = -EEXIST;
  429. goto undo;
  430. }
  431. err = radix_tree_insert(root, base + i, res_arr[i]);
  432. if (err)
  433. goto undo;
  434. list_add_tail(&res_arr[i]->list,
  435. &tracker->slave_list[slave].res_list[type]);
  436. }
  437. spin_unlock_irq(mlx4_tlock(dev));
  438. kfree(res_arr);
  439. return 0;
  440. undo:
  441. for (--i; i >= base; --i)
  442. radix_tree_delete(&tracker->res_tree[type], i);
  443. spin_unlock_irq(mlx4_tlock(dev));
  444. for (i = 0; i < count; ++i)
  445. kfree(res_arr[i]);
  446. kfree(res_arr);
  447. return err;
  448. }
  449. static int remove_qp_ok(struct res_qp *res)
  450. {
  451. if (res->com.state == RES_QP_BUSY)
  452. return -EBUSY;
  453. else if (res->com.state != RES_QP_RESERVED)
  454. return -EPERM;
  455. return 0;
  456. }
  457. static int remove_mtt_ok(struct res_mtt *res, int order)
  458. {
  459. if (res->com.state == RES_MTT_BUSY ||
  460. atomic_read(&res->ref_count)) {
  461. printk(KERN_DEBUG "%s-%d: state %s, ref_count %d\n",
  462. __func__, __LINE__,
  463. mtt_states_str(res->com.state),
  464. atomic_read(&res->ref_count));
  465. return -EBUSY;
  466. } else if (res->com.state != RES_MTT_ALLOCATED)
  467. return -EPERM;
  468. else if (res->order != order)
  469. return -EINVAL;
  470. return 0;
  471. }
  472. static int remove_mpt_ok(struct res_mpt *res)
  473. {
  474. if (res->com.state == RES_MPT_BUSY)
  475. return -EBUSY;
  476. else if (res->com.state != RES_MPT_RESERVED)
  477. return -EPERM;
  478. return 0;
  479. }
  480. static int remove_eq_ok(struct res_eq *res)
  481. {
  482. if (res->com.state == RES_MPT_BUSY)
  483. return -EBUSY;
  484. else if (res->com.state != RES_MPT_RESERVED)
  485. return -EPERM;
  486. return 0;
  487. }
  488. static int remove_counter_ok(struct res_counter *res)
  489. {
  490. if (res->com.state == RES_COUNTER_BUSY)
  491. return -EBUSY;
  492. else if (res->com.state != RES_COUNTER_ALLOCATED)
  493. return -EPERM;
  494. return 0;
  495. }
  496. static int remove_cq_ok(struct res_cq *res)
  497. {
  498. if (res->com.state == RES_CQ_BUSY)
  499. return -EBUSY;
  500. else if (res->com.state != RES_CQ_ALLOCATED)
  501. return -EPERM;
  502. return 0;
  503. }
  504. static int remove_srq_ok(struct res_srq *res)
  505. {
  506. if (res->com.state == RES_SRQ_BUSY)
  507. return -EBUSY;
  508. else if (res->com.state != RES_SRQ_ALLOCATED)
  509. return -EPERM;
  510. return 0;
  511. }
  512. static int remove_ok(struct res_common *res, enum mlx4_resource type, int extra)
  513. {
  514. switch (type) {
  515. case RES_QP:
  516. return remove_qp_ok((struct res_qp *)res);
  517. case RES_CQ:
  518. return remove_cq_ok((struct res_cq *)res);
  519. case RES_SRQ:
  520. return remove_srq_ok((struct res_srq *)res);
  521. case RES_MPT:
  522. return remove_mpt_ok((struct res_mpt *)res);
  523. case RES_MTT:
  524. return remove_mtt_ok((struct res_mtt *)res, extra);
  525. case RES_MAC:
  526. return -ENOSYS;
  527. case RES_EQ:
  528. return remove_eq_ok((struct res_eq *)res);
  529. case RES_COUNTER:
  530. return remove_counter_ok((struct res_counter *)res);
  531. default:
  532. return -EINVAL;
  533. }
  534. }
  535. static int rem_res_range(struct mlx4_dev *dev, int slave, int base, int count,
  536. enum mlx4_resource type, int extra)
  537. {
  538. int i;
  539. int err;
  540. struct mlx4_priv *priv = mlx4_priv(dev);
  541. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  542. struct res_common *r;
  543. spin_lock_irq(mlx4_tlock(dev));
  544. for (i = base; i < base + count; ++i) {
  545. r = radix_tree_lookup(&tracker->res_tree[type], i);
  546. if (!r) {
  547. err = -ENOENT;
  548. goto out;
  549. }
  550. if (r->owner != slave) {
  551. err = -EPERM;
  552. goto out;
  553. }
  554. err = remove_ok(r, type, extra);
  555. if (err)
  556. goto out;
  557. }
  558. for (i = base; i < base + count; ++i) {
  559. r = radix_tree_lookup(&tracker->res_tree[type], i);
  560. radix_tree_delete(&tracker->res_tree[type], i);
  561. list_del(&r->list);
  562. kfree(r);
  563. }
  564. err = 0;
  565. out:
  566. spin_unlock_irq(mlx4_tlock(dev));
  567. return err;
  568. }
  569. static int qp_res_start_move_to(struct mlx4_dev *dev, int slave, int qpn,
  570. enum res_qp_states state, struct res_qp **qp,
  571. int alloc)
  572. {
  573. struct mlx4_priv *priv = mlx4_priv(dev);
  574. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  575. struct res_qp *r;
  576. int err = 0;
  577. spin_lock_irq(mlx4_tlock(dev));
  578. r = radix_tree_lookup(&tracker->res_tree[RES_QP], qpn);
  579. if (!r)
  580. err = -ENOENT;
  581. else if (r->com.owner != slave)
  582. err = -EPERM;
  583. else {
  584. switch (state) {
  585. case RES_QP_BUSY:
  586. mlx4_dbg(dev, "%s: failed RES_QP, 0x%x\n",
  587. __func__, r->com.res_id);
  588. err = -EBUSY;
  589. break;
  590. case RES_QP_RESERVED:
  591. if (r->com.state == RES_QP_MAPPED && !alloc)
  592. break;
  593. mlx4_dbg(dev, "failed RES_QP, 0x%x\n", r->com.res_id);
  594. err = -EINVAL;
  595. break;
  596. case RES_QP_MAPPED:
  597. if ((r->com.state == RES_QP_RESERVED && alloc) ||
  598. r->com.state == RES_QP_HW)
  599. break;
  600. else {
  601. mlx4_dbg(dev, "failed RES_QP, 0x%x\n",
  602. r->com.res_id);
  603. err = -EINVAL;
  604. }
  605. break;
  606. case RES_QP_HW:
  607. if (r->com.state != RES_QP_MAPPED)
  608. err = -EINVAL;
  609. break;
  610. default:
  611. err = -EINVAL;
  612. }
  613. if (!err) {
  614. r->com.from_state = r->com.state;
  615. r->com.to_state = state;
  616. r->com.state = RES_QP_BUSY;
  617. if (qp)
  618. *qp = (struct res_qp *)r;
  619. }
  620. }
  621. spin_unlock_irq(mlx4_tlock(dev));
  622. return err;
  623. }
  624. static int mr_res_start_move_to(struct mlx4_dev *dev, int slave, int index,
  625. enum res_mpt_states state, struct res_mpt **mpt)
  626. {
  627. struct mlx4_priv *priv = mlx4_priv(dev);
  628. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  629. struct res_mpt *r;
  630. int err = 0;
  631. spin_lock_irq(mlx4_tlock(dev));
  632. r = radix_tree_lookup(&tracker->res_tree[RES_MPT], index);
  633. if (!r)
  634. err = -ENOENT;
  635. else if (r->com.owner != slave)
  636. err = -EPERM;
  637. else {
  638. switch (state) {
  639. case RES_MPT_BUSY:
  640. err = -EINVAL;
  641. break;
  642. case RES_MPT_RESERVED:
  643. if (r->com.state != RES_MPT_MAPPED)
  644. err = -EINVAL;
  645. break;
  646. case RES_MPT_MAPPED:
  647. if (r->com.state != RES_MPT_RESERVED &&
  648. r->com.state != RES_MPT_HW)
  649. err = -EINVAL;
  650. break;
  651. case RES_MPT_HW:
  652. if (r->com.state != RES_MPT_MAPPED)
  653. err = -EINVAL;
  654. break;
  655. default:
  656. err = -EINVAL;
  657. }
  658. if (!err) {
  659. r->com.from_state = r->com.state;
  660. r->com.to_state = state;
  661. r->com.state = RES_MPT_BUSY;
  662. if (mpt)
  663. *mpt = (struct res_mpt *)r;
  664. }
  665. }
  666. spin_unlock_irq(mlx4_tlock(dev));
  667. return err;
  668. }
  669. static int eq_res_start_move_to(struct mlx4_dev *dev, int slave, int index,
  670. enum res_eq_states state, struct res_eq **eq)
  671. {
  672. struct mlx4_priv *priv = mlx4_priv(dev);
  673. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  674. struct res_eq *r;
  675. int err = 0;
  676. spin_lock_irq(mlx4_tlock(dev));
  677. r = radix_tree_lookup(&tracker->res_tree[RES_EQ], index);
  678. if (!r)
  679. err = -ENOENT;
  680. else if (r->com.owner != slave)
  681. err = -EPERM;
  682. else {
  683. switch (state) {
  684. case RES_EQ_BUSY:
  685. err = -EINVAL;
  686. break;
  687. case RES_EQ_RESERVED:
  688. if (r->com.state != RES_EQ_HW)
  689. err = -EINVAL;
  690. break;
  691. case RES_EQ_HW:
  692. if (r->com.state != RES_EQ_RESERVED)
  693. err = -EINVAL;
  694. break;
  695. default:
  696. err = -EINVAL;
  697. }
  698. if (!err) {
  699. r->com.from_state = r->com.state;
  700. r->com.to_state = state;
  701. r->com.state = RES_EQ_BUSY;
  702. if (eq)
  703. *eq = r;
  704. }
  705. }
  706. spin_unlock_irq(mlx4_tlock(dev));
  707. return err;
  708. }
  709. static int cq_res_start_move_to(struct mlx4_dev *dev, int slave, int cqn,
  710. enum res_cq_states state, struct res_cq **cq)
  711. {
  712. struct mlx4_priv *priv = mlx4_priv(dev);
  713. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  714. struct res_cq *r;
  715. int err;
  716. spin_lock_irq(mlx4_tlock(dev));
  717. r = radix_tree_lookup(&tracker->res_tree[RES_CQ], cqn);
  718. if (!r)
  719. err = -ENOENT;
  720. else if (r->com.owner != slave)
  721. err = -EPERM;
  722. else {
  723. switch (state) {
  724. case RES_CQ_BUSY:
  725. err = -EBUSY;
  726. break;
  727. case RES_CQ_ALLOCATED:
  728. if (r->com.state != RES_CQ_HW)
  729. err = -EINVAL;
  730. else if (atomic_read(&r->ref_count))
  731. err = -EBUSY;
  732. else
  733. err = 0;
  734. break;
  735. case RES_CQ_HW:
  736. if (r->com.state != RES_CQ_ALLOCATED)
  737. err = -EINVAL;
  738. else
  739. err = 0;
  740. break;
  741. default:
  742. err = -EINVAL;
  743. }
  744. if (!err) {
  745. r->com.from_state = r->com.state;
  746. r->com.to_state = state;
  747. r->com.state = RES_CQ_BUSY;
  748. if (cq)
  749. *cq = r;
  750. }
  751. }
  752. spin_unlock_irq(mlx4_tlock(dev));
  753. return err;
  754. }
  755. static int srq_res_start_move_to(struct mlx4_dev *dev, int slave, int index,
  756. enum res_cq_states state, struct res_srq **srq)
  757. {
  758. struct mlx4_priv *priv = mlx4_priv(dev);
  759. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  760. struct res_srq *r;
  761. int err = 0;
  762. spin_lock_irq(mlx4_tlock(dev));
  763. r = radix_tree_lookup(&tracker->res_tree[RES_SRQ], index);
  764. if (!r)
  765. err = -ENOENT;
  766. else if (r->com.owner != slave)
  767. err = -EPERM;
  768. else {
  769. switch (state) {
  770. case RES_SRQ_BUSY:
  771. err = -EINVAL;
  772. break;
  773. case RES_SRQ_ALLOCATED:
  774. if (r->com.state != RES_SRQ_HW)
  775. err = -EINVAL;
  776. else if (atomic_read(&r->ref_count))
  777. err = -EBUSY;
  778. break;
  779. case RES_SRQ_HW:
  780. if (r->com.state != RES_SRQ_ALLOCATED)
  781. err = -EINVAL;
  782. break;
  783. default:
  784. err = -EINVAL;
  785. }
  786. if (!err) {
  787. r->com.from_state = r->com.state;
  788. r->com.to_state = state;
  789. r->com.state = RES_SRQ_BUSY;
  790. if (srq)
  791. *srq = r;
  792. }
  793. }
  794. spin_unlock_irq(mlx4_tlock(dev));
  795. return err;
  796. }
  797. static void res_abort_move(struct mlx4_dev *dev, int slave,
  798. enum mlx4_resource type, int id)
  799. {
  800. struct mlx4_priv *priv = mlx4_priv(dev);
  801. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  802. struct res_common *r;
  803. spin_lock_irq(mlx4_tlock(dev));
  804. r = radix_tree_lookup(&tracker->res_tree[type], id);
  805. if (r && (r->owner == slave))
  806. r->state = r->from_state;
  807. spin_unlock_irq(mlx4_tlock(dev));
  808. }
  809. static void res_end_move(struct mlx4_dev *dev, int slave,
  810. enum mlx4_resource type, int id)
  811. {
  812. struct mlx4_priv *priv = mlx4_priv(dev);
  813. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  814. struct res_common *r;
  815. spin_lock_irq(mlx4_tlock(dev));
  816. r = radix_tree_lookup(&tracker->res_tree[type], id);
  817. if (r && (r->owner == slave))
  818. r->state = r->to_state;
  819. spin_unlock_irq(mlx4_tlock(dev));
  820. }
  821. static int valid_reserved(struct mlx4_dev *dev, int slave, int qpn)
  822. {
  823. return mlx4_is_qp_reserved(dev, qpn);
  824. }
  825. static int qp_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  826. u64 in_param, u64 *out_param)
  827. {
  828. int err;
  829. int count;
  830. int align;
  831. int base;
  832. int qpn;
  833. switch (op) {
  834. case RES_OP_RESERVE:
  835. count = get_param_l(&in_param);
  836. align = get_param_h(&in_param);
  837. err = __mlx4_qp_reserve_range(dev, count, align, &base);
  838. if (err)
  839. return err;
  840. err = add_res_range(dev, slave, base, count, RES_QP, 0);
  841. if (err) {
  842. __mlx4_qp_release_range(dev, base, count);
  843. return err;
  844. }
  845. set_param_l(out_param, base);
  846. break;
  847. case RES_OP_MAP_ICM:
  848. qpn = get_param_l(&in_param) & 0x7fffff;
  849. if (valid_reserved(dev, slave, qpn)) {
  850. err = add_res_range(dev, slave, qpn, 1, RES_QP, 0);
  851. if (err)
  852. return err;
  853. }
  854. err = qp_res_start_move_to(dev, slave, qpn, RES_QP_MAPPED,
  855. NULL, 1);
  856. if (err)
  857. return err;
  858. if (!valid_reserved(dev, slave, qpn)) {
  859. err = __mlx4_qp_alloc_icm(dev, qpn);
  860. if (err) {
  861. res_abort_move(dev, slave, RES_QP, qpn);
  862. return err;
  863. }
  864. }
  865. res_end_move(dev, slave, RES_QP, qpn);
  866. break;
  867. default:
  868. err = -EINVAL;
  869. break;
  870. }
  871. return err;
  872. }
  873. static int mtt_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  874. u64 in_param, u64 *out_param)
  875. {
  876. int err = -EINVAL;
  877. int base;
  878. int order;
  879. if (op != RES_OP_RESERVE_AND_MAP)
  880. return err;
  881. order = get_param_l(&in_param);
  882. base = __mlx4_alloc_mtt_range(dev, order);
  883. if (base == -1)
  884. return -ENOMEM;
  885. err = add_res_range(dev, slave, base, 1, RES_MTT, order);
  886. if (err)
  887. __mlx4_free_mtt_range(dev, base, order);
  888. else
  889. set_param_l(out_param, base);
  890. return err;
  891. }
  892. static int mpt_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  893. u64 in_param, u64 *out_param)
  894. {
  895. int err = -EINVAL;
  896. int index;
  897. int id;
  898. struct res_mpt *mpt;
  899. switch (op) {
  900. case RES_OP_RESERVE:
  901. index = __mlx4_mr_reserve(dev);
  902. if (index == -1)
  903. break;
  904. id = index & mpt_mask(dev);
  905. err = add_res_range(dev, slave, id, 1, RES_MPT, index);
  906. if (err) {
  907. __mlx4_mr_release(dev, index);
  908. break;
  909. }
  910. set_param_l(out_param, index);
  911. break;
  912. case RES_OP_MAP_ICM:
  913. index = get_param_l(&in_param);
  914. id = index & mpt_mask(dev);
  915. err = mr_res_start_move_to(dev, slave, id,
  916. RES_MPT_MAPPED, &mpt);
  917. if (err)
  918. return err;
  919. err = __mlx4_mr_alloc_icm(dev, mpt->key);
  920. if (err) {
  921. res_abort_move(dev, slave, RES_MPT, id);
  922. return err;
  923. }
  924. res_end_move(dev, slave, RES_MPT, id);
  925. break;
  926. }
  927. return err;
  928. }
  929. static int cq_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  930. u64 in_param, u64 *out_param)
  931. {
  932. int cqn;
  933. int err;
  934. switch (op) {
  935. case RES_OP_RESERVE_AND_MAP:
  936. err = __mlx4_cq_alloc_icm(dev, &cqn);
  937. if (err)
  938. break;
  939. err = add_res_range(dev, slave, cqn, 1, RES_CQ, 0);
  940. if (err) {
  941. __mlx4_cq_free_icm(dev, cqn);
  942. break;
  943. }
  944. set_param_l(out_param, cqn);
  945. break;
  946. default:
  947. err = -EINVAL;
  948. }
  949. return err;
  950. }
  951. static int srq_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  952. u64 in_param, u64 *out_param)
  953. {
  954. int srqn;
  955. int err;
  956. switch (op) {
  957. case RES_OP_RESERVE_AND_MAP:
  958. err = __mlx4_srq_alloc_icm(dev, &srqn);
  959. if (err)
  960. break;
  961. err = add_res_range(dev, slave, srqn, 1, RES_SRQ, 0);
  962. if (err) {
  963. __mlx4_srq_free_icm(dev, srqn);
  964. break;
  965. }
  966. set_param_l(out_param, srqn);
  967. break;
  968. default:
  969. err = -EINVAL;
  970. }
  971. return err;
  972. }
  973. static int mac_add_to_slave(struct mlx4_dev *dev, int slave, u64 mac, int port)
  974. {
  975. struct mlx4_priv *priv = mlx4_priv(dev);
  976. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  977. struct mac_res *res;
  978. res = kzalloc(sizeof *res, GFP_KERNEL);
  979. if (!res)
  980. return -ENOMEM;
  981. res->mac = mac;
  982. res->port = (u8) port;
  983. list_add_tail(&res->list,
  984. &tracker->slave_list[slave].res_list[RES_MAC]);
  985. return 0;
  986. }
  987. static void mac_del_from_slave(struct mlx4_dev *dev, int slave, u64 mac,
  988. int port)
  989. {
  990. struct mlx4_priv *priv = mlx4_priv(dev);
  991. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  992. struct list_head *mac_list =
  993. &tracker->slave_list[slave].res_list[RES_MAC];
  994. struct mac_res *res, *tmp;
  995. list_for_each_entry_safe(res, tmp, mac_list, list) {
  996. if (res->mac == mac && res->port == (u8) port) {
  997. list_del(&res->list);
  998. kfree(res);
  999. break;
  1000. }
  1001. }
  1002. }
  1003. static void rem_slave_macs(struct mlx4_dev *dev, int slave)
  1004. {
  1005. struct mlx4_priv *priv = mlx4_priv(dev);
  1006. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  1007. struct list_head *mac_list =
  1008. &tracker->slave_list[slave].res_list[RES_MAC];
  1009. struct mac_res *res, *tmp;
  1010. list_for_each_entry_safe(res, tmp, mac_list, list) {
  1011. list_del(&res->list);
  1012. __mlx4_unregister_mac(dev, res->port, res->mac);
  1013. kfree(res);
  1014. }
  1015. }
  1016. static int mac_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1017. u64 in_param, u64 *out_param)
  1018. {
  1019. int err = -EINVAL;
  1020. int port;
  1021. u64 mac;
  1022. if (op != RES_OP_RESERVE_AND_MAP)
  1023. return err;
  1024. port = get_param_l(out_param);
  1025. mac = in_param;
  1026. err = __mlx4_register_mac(dev, port, mac);
  1027. if (err >= 0) {
  1028. set_param_l(out_param, err);
  1029. err = 0;
  1030. }
  1031. if (!err) {
  1032. err = mac_add_to_slave(dev, slave, mac, port);
  1033. if (err)
  1034. __mlx4_unregister_mac(dev, port, mac);
  1035. }
  1036. return err;
  1037. }
  1038. static int vlan_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1039. u64 in_param, u64 *out_param)
  1040. {
  1041. return 0;
  1042. }
  1043. int mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave,
  1044. struct mlx4_vhcr *vhcr,
  1045. struct mlx4_cmd_mailbox *inbox,
  1046. struct mlx4_cmd_mailbox *outbox,
  1047. struct mlx4_cmd_info *cmd)
  1048. {
  1049. int err;
  1050. int alop = vhcr->op_modifier;
  1051. switch (vhcr->in_modifier) {
  1052. case RES_QP:
  1053. err = qp_alloc_res(dev, slave, vhcr->op_modifier, alop,
  1054. vhcr->in_param, &vhcr->out_param);
  1055. break;
  1056. case RES_MTT:
  1057. err = mtt_alloc_res(dev, slave, vhcr->op_modifier, alop,
  1058. vhcr->in_param, &vhcr->out_param);
  1059. break;
  1060. case RES_MPT:
  1061. err = mpt_alloc_res(dev, slave, vhcr->op_modifier, alop,
  1062. vhcr->in_param, &vhcr->out_param);
  1063. break;
  1064. case RES_CQ:
  1065. err = cq_alloc_res(dev, slave, vhcr->op_modifier, alop,
  1066. vhcr->in_param, &vhcr->out_param);
  1067. break;
  1068. case RES_SRQ:
  1069. err = srq_alloc_res(dev, slave, vhcr->op_modifier, alop,
  1070. vhcr->in_param, &vhcr->out_param);
  1071. break;
  1072. case RES_MAC:
  1073. err = mac_alloc_res(dev, slave, vhcr->op_modifier, alop,
  1074. vhcr->in_param, &vhcr->out_param);
  1075. break;
  1076. case RES_VLAN:
  1077. err = vlan_alloc_res(dev, slave, vhcr->op_modifier, alop,
  1078. vhcr->in_param, &vhcr->out_param);
  1079. break;
  1080. default:
  1081. err = -EINVAL;
  1082. break;
  1083. }
  1084. return err;
  1085. }
  1086. static int qp_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1087. u64 in_param)
  1088. {
  1089. int err;
  1090. int count;
  1091. int base;
  1092. int qpn;
  1093. switch (op) {
  1094. case RES_OP_RESERVE:
  1095. base = get_param_l(&in_param) & 0x7fffff;
  1096. count = get_param_h(&in_param);
  1097. err = rem_res_range(dev, slave, base, count, RES_QP, 0);
  1098. if (err)
  1099. break;
  1100. __mlx4_qp_release_range(dev, base, count);
  1101. break;
  1102. case RES_OP_MAP_ICM:
  1103. qpn = get_param_l(&in_param) & 0x7fffff;
  1104. err = qp_res_start_move_to(dev, slave, qpn, RES_QP_RESERVED,
  1105. NULL, 0);
  1106. if (err)
  1107. return err;
  1108. if (!valid_reserved(dev, slave, qpn))
  1109. __mlx4_qp_free_icm(dev, qpn);
  1110. res_end_move(dev, slave, RES_QP, qpn);
  1111. if (valid_reserved(dev, slave, qpn))
  1112. err = rem_res_range(dev, slave, qpn, 1, RES_QP, 0);
  1113. break;
  1114. default:
  1115. err = -EINVAL;
  1116. break;
  1117. }
  1118. return err;
  1119. }
  1120. static int mtt_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1121. u64 in_param, u64 *out_param)
  1122. {
  1123. int err = -EINVAL;
  1124. int base;
  1125. int order;
  1126. if (op != RES_OP_RESERVE_AND_MAP)
  1127. return err;
  1128. base = get_param_l(&in_param);
  1129. order = get_param_h(&in_param);
  1130. err = rem_res_range(dev, slave, base, 1, RES_MTT, order);
  1131. if (!err)
  1132. __mlx4_free_mtt_range(dev, base, order);
  1133. return err;
  1134. }
  1135. static int mpt_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1136. u64 in_param)
  1137. {
  1138. int err = -EINVAL;
  1139. int index;
  1140. int id;
  1141. struct res_mpt *mpt;
  1142. switch (op) {
  1143. case RES_OP_RESERVE:
  1144. index = get_param_l(&in_param);
  1145. id = index & mpt_mask(dev);
  1146. err = get_res(dev, slave, id, RES_MPT, &mpt);
  1147. if (err)
  1148. break;
  1149. index = mpt->key;
  1150. put_res(dev, slave, id, RES_MPT);
  1151. err = rem_res_range(dev, slave, id, 1, RES_MPT, 0);
  1152. if (err)
  1153. break;
  1154. __mlx4_mr_release(dev, index);
  1155. break;
  1156. case RES_OP_MAP_ICM:
  1157. index = get_param_l(&in_param);
  1158. id = index & mpt_mask(dev);
  1159. err = mr_res_start_move_to(dev, slave, id,
  1160. RES_MPT_RESERVED, &mpt);
  1161. if (err)
  1162. return err;
  1163. __mlx4_mr_free_icm(dev, mpt->key);
  1164. res_end_move(dev, slave, RES_MPT, id);
  1165. return err;
  1166. break;
  1167. default:
  1168. err = -EINVAL;
  1169. break;
  1170. }
  1171. return err;
  1172. }
  1173. static int cq_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1174. u64 in_param, u64 *out_param)
  1175. {
  1176. int cqn;
  1177. int err;
  1178. switch (op) {
  1179. case RES_OP_RESERVE_AND_MAP:
  1180. cqn = get_param_l(&in_param);
  1181. err = rem_res_range(dev, slave, cqn, 1, RES_CQ, 0);
  1182. if (err)
  1183. break;
  1184. __mlx4_cq_free_icm(dev, cqn);
  1185. break;
  1186. default:
  1187. err = -EINVAL;
  1188. break;
  1189. }
  1190. return err;
  1191. }
  1192. static int srq_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1193. u64 in_param, u64 *out_param)
  1194. {
  1195. int srqn;
  1196. int err;
  1197. switch (op) {
  1198. case RES_OP_RESERVE_AND_MAP:
  1199. srqn = get_param_l(&in_param);
  1200. err = rem_res_range(dev, slave, srqn, 1, RES_SRQ, 0);
  1201. if (err)
  1202. break;
  1203. __mlx4_srq_free_icm(dev, srqn);
  1204. break;
  1205. default:
  1206. err = -EINVAL;
  1207. break;
  1208. }
  1209. return err;
  1210. }
  1211. static int mac_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1212. u64 in_param, u64 *out_param)
  1213. {
  1214. int port;
  1215. int err = 0;
  1216. switch (op) {
  1217. case RES_OP_RESERVE_AND_MAP:
  1218. port = get_param_l(out_param);
  1219. mac_del_from_slave(dev, slave, in_param, port);
  1220. __mlx4_unregister_mac(dev, port, in_param);
  1221. break;
  1222. default:
  1223. err = -EINVAL;
  1224. break;
  1225. }
  1226. return err;
  1227. }
  1228. static int vlan_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,
  1229. u64 in_param, u64 *out_param)
  1230. {
  1231. return 0;
  1232. }
  1233. int mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave,
  1234. struct mlx4_vhcr *vhcr,
  1235. struct mlx4_cmd_mailbox *inbox,
  1236. struct mlx4_cmd_mailbox *outbox,
  1237. struct mlx4_cmd_info *cmd)
  1238. {
  1239. int err = -EINVAL;
  1240. int alop = vhcr->op_modifier;
  1241. switch (vhcr->in_modifier) {
  1242. case RES_QP:
  1243. err = qp_free_res(dev, slave, vhcr->op_modifier, alop,
  1244. vhcr->in_param);
  1245. break;
  1246. case RES_MTT:
  1247. err = mtt_free_res(dev, slave, vhcr->op_modifier, alop,
  1248. vhcr->in_param, &vhcr->out_param);
  1249. break;
  1250. case RES_MPT:
  1251. err = mpt_free_res(dev, slave, vhcr->op_modifier, alop,
  1252. vhcr->in_param);
  1253. break;
  1254. case RES_CQ:
  1255. err = cq_free_res(dev, slave, vhcr->op_modifier, alop,
  1256. vhcr->in_param, &vhcr->out_param);
  1257. break;
  1258. case RES_SRQ:
  1259. err = srq_free_res(dev, slave, vhcr->op_modifier, alop,
  1260. vhcr->in_param, &vhcr->out_param);
  1261. break;
  1262. case RES_MAC:
  1263. err = mac_free_res(dev, slave, vhcr->op_modifier, alop,
  1264. vhcr->in_param, &vhcr->out_param);
  1265. break;
  1266. case RES_VLAN:
  1267. err = vlan_free_res(dev, slave, vhcr->op_modifier, alop,
  1268. vhcr->in_param, &vhcr->out_param);
  1269. break;
  1270. default:
  1271. break;
  1272. }
  1273. return err;
  1274. }
  1275. /* ugly but other choices are uglier */
  1276. static int mr_phys_mpt(struct mlx4_mpt_entry *mpt)
  1277. {
  1278. return (be32_to_cpu(mpt->flags) >> 9) & 1;
  1279. }
  1280. static int mr_get_mtt_addr(struct mlx4_mpt_entry *mpt)
  1281. {
  1282. return (int)be64_to_cpu(mpt->mtt_addr) & 0xfffffff8;
  1283. }
  1284. static int mr_get_mtt_size(struct mlx4_mpt_entry *mpt)
  1285. {
  1286. return be32_to_cpu(mpt->mtt_sz);
  1287. }
  1288. static int qp_get_mtt_addr(struct mlx4_qp_context *qpc)
  1289. {
  1290. return be32_to_cpu(qpc->mtt_base_addr_l) & 0xfffffff8;
  1291. }
  1292. static int srq_get_mtt_addr(struct mlx4_srq_context *srqc)
  1293. {
  1294. return be32_to_cpu(srqc->mtt_base_addr_l) & 0xfffffff8;
  1295. }
  1296. static int qp_get_mtt_size(struct mlx4_qp_context *qpc)
  1297. {
  1298. int page_shift = (qpc->log_page_size & 0x3f) + 12;
  1299. int log_sq_size = (qpc->sq_size_stride >> 3) & 0xf;
  1300. int log_sq_sride = qpc->sq_size_stride & 7;
  1301. int log_rq_size = (qpc->rq_size_stride >> 3) & 0xf;
  1302. int log_rq_stride = qpc->rq_size_stride & 7;
  1303. int srq = (be32_to_cpu(qpc->srqn) >> 24) & 1;
  1304. int rss = (be32_to_cpu(qpc->flags) >> 13) & 1;
  1305. int xrc = (be32_to_cpu(qpc->local_qpn) >> 23) & 1;
  1306. int sq_size;
  1307. int rq_size;
  1308. int total_pages;
  1309. int total_mem;
  1310. int page_offset = (be32_to_cpu(qpc->params2) >> 6) & 0x3f;
  1311. sq_size = 1 << (log_sq_size + log_sq_sride + 4);
  1312. rq_size = (srq|rss|xrc) ? 0 : (1 << (log_rq_size + log_rq_stride + 4));
  1313. total_mem = sq_size + rq_size;
  1314. total_pages =
  1315. roundup_pow_of_two((total_mem + (page_offset << 6)) >>
  1316. page_shift);
  1317. return total_pages;
  1318. }
  1319. static int check_mtt_range(struct mlx4_dev *dev, int slave, int start,
  1320. int size, struct res_mtt *mtt)
  1321. {
  1322. int res_start = mtt->com.res_id;
  1323. int res_size = (1 << mtt->order);
  1324. if (start < res_start || start + size > res_start + res_size)
  1325. return -EPERM;
  1326. return 0;
  1327. }
  1328. int mlx4_SW2HW_MPT_wrapper(struct mlx4_dev *dev, int slave,
  1329. struct mlx4_vhcr *vhcr,
  1330. struct mlx4_cmd_mailbox *inbox,
  1331. struct mlx4_cmd_mailbox *outbox,
  1332. struct mlx4_cmd_info *cmd)
  1333. {
  1334. int err;
  1335. int index = vhcr->in_modifier;
  1336. struct res_mtt *mtt;
  1337. struct res_mpt *mpt;
  1338. int mtt_base = mr_get_mtt_addr(inbox->buf) / dev->caps.mtt_entry_sz;
  1339. int phys;
  1340. int id;
  1341. id = index & mpt_mask(dev);
  1342. err = mr_res_start_move_to(dev, slave, id, RES_MPT_HW, &mpt);
  1343. if (err)
  1344. return err;
  1345. phys = mr_phys_mpt(inbox->buf);
  1346. if (!phys) {
  1347. err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
  1348. if (err)
  1349. goto ex_abort;
  1350. err = check_mtt_range(dev, slave, mtt_base,
  1351. mr_get_mtt_size(inbox->buf), mtt);
  1352. if (err)
  1353. goto ex_put;
  1354. mpt->mtt = mtt;
  1355. }
  1356. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1357. if (err)
  1358. goto ex_put;
  1359. if (!phys) {
  1360. atomic_inc(&mtt->ref_count);
  1361. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1362. }
  1363. res_end_move(dev, slave, RES_MPT, id);
  1364. return 0;
  1365. ex_put:
  1366. if (!phys)
  1367. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1368. ex_abort:
  1369. res_abort_move(dev, slave, RES_MPT, id);
  1370. return err;
  1371. }
  1372. int mlx4_HW2SW_MPT_wrapper(struct mlx4_dev *dev, int slave,
  1373. struct mlx4_vhcr *vhcr,
  1374. struct mlx4_cmd_mailbox *inbox,
  1375. struct mlx4_cmd_mailbox *outbox,
  1376. struct mlx4_cmd_info *cmd)
  1377. {
  1378. int err;
  1379. int index = vhcr->in_modifier;
  1380. struct res_mpt *mpt;
  1381. int id;
  1382. id = index & mpt_mask(dev);
  1383. err = mr_res_start_move_to(dev, slave, id, RES_MPT_MAPPED, &mpt);
  1384. if (err)
  1385. return err;
  1386. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1387. if (err)
  1388. goto ex_abort;
  1389. if (mpt->mtt)
  1390. atomic_dec(&mpt->mtt->ref_count);
  1391. res_end_move(dev, slave, RES_MPT, id);
  1392. return 0;
  1393. ex_abort:
  1394. res_abort_move(dev, slave, RES_MPT, id);
  1395. return err;
  1396. }
  1397. int mlx4_QUERY_MPT_wrapper(struct mlx4_dev *dev, int slave,
  1398. struct mlx4_vhcr *vhcr,
  1399. struct mlx4_cmd_mailbox *inbox,
  1400. struct mlx4_cmd_mailbox *outbox,
  1401. struct mlx4_cmd_info *cmd)
  1402. {
  1403. int err;
  1404. int index = vhcr->in_modifier;
  1405. struct res_mpt *mpt;
  1406. int id;
  1407. id = index & mpt_mask(dev);
  1408. err = get_res(dev, slave, id, RES_MPT, &mpt);
  1409. if (err)
  1410. return err;
  1411. if (mpt->com.from_state != RES_MPT_HW) {
  1412. err = -EBUSY;
  1413. goto out;
  1414. }
  1415. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1416. out:
  1417. put_res(dev, slave, id, RES_MPT);
  1418. return err;
  1419. }
  1420. static int qp_get_rcqn(struct mlx4_qp_context *qpc)
  1421. {
  1422. return be32_to_cpu(qpc->cqn_recv) & 0xffffff;
  1423. }
  1424. static int qp_get_scqn(struct mlx4_qp_context *qpc)
  1425. {
  1426. return be32_to_cpu(qpc->cqn_send) & 0xffffff;
  1427. }
  1428. static u32 qp_get_srqn(struct mlx4_qp_context *qpc)
  1429. {
  1430. return be32_to_cpu(qpc->srqn) & 0x1ffffff;
  1431. }
  1432. int mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave,
  1433. struct mlx4_vhcr *vhcr,
  1434. struct mlx4_cmd_mailbox *inbox,
  1435. struct mlx4_cmd_mailbox *outbox,
  1436. struct mlx4_cmd_info *cmd)
  1437. {
  1438. int err;
  1439. int qpn = vhcr->in_modifier & 0x7fffff;
  1440. struct res_mtt *mtt;
  1441. struct res_qp *qp;
  1442. struct mlx4_qp_context *qpc = inbox->buf + 8;
  1443. int mtt_base = qp_get_mtt_addr(qpc) / dev->caps.mtt_entry_sz;
  1444. int mtt_size = qp_get_mtt_size(qpc);
  1445. struct res_cq *rcq;
  1446. struct res_cq *scq;
  1447. int rcqn = qp_get_rcqn(qpc);
  1448. int scqn = qp_get_scqn(qpc);
  1449. u32 srqn = qp_get_srqn(qpc) & 0xffffff;
  1450. int use_srq = (qp_get_srqn(qpc) >> 24) & 1;
  1451. struct res_srq *srq;
  1452. int local_qpn = be32_to_cpu(qpc->local_qpn) & 0xffffff;
  1453. err = qp_res_start_move_to(dev, slave, qpn, RES_QP_HW, &qp, 0);
  1454. if (err)
  1455. return err;
  1456. qp->local_qpn = local_qpn;
  1457. err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
  1458. if (err)
  1459. goto ex_abort;
  1460. err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt);
  1461. if (err)
  1462. goto ex_put_mtt;
  1463. err = get_res(dev, slave, rcqn, RES_CQ, &rcq);
  1464. if (err)
  1465. goto ex_put_mtt;
  1466. if (scqn != rcqn) {
  1467. err = get_res(dev, slave, scqn, RES_CQ, &scq);
  1468. if (err)
  1469. goto ex_put_rcq;
  1470. } else
  1471. scq = rcq;
  1472. if (use_srq) {
  1473. err = get_res(dev, slave, srqn, RES_SRQ, &srq);
  1474. if (err)
  1475. goto ex_put_scq;
  1476. }
  1477. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1478. if (err)
  1479. goto ex_put_srq;
  1480. atomic_inc(&mtt->ref_count);
  1481. qp->mtt = mtt;
  1482. atomic_inc(&rcq->ref_count);
  1483. qp->rcq = rcq;
  1484. atomic_inc(&scq->ref_count);
  1485. qp->scq = scq;
  1486. if (scqn != rcqn)
  1487. put_res(dev, slave, scqn, RES_CQ);
  1488. if (use_srq) {
  1489. atomic_inc(&srq->ref_count);
  1490. put_res(dev, slave, srqn, RES_SRQ);
  1491. qp->srq = srq;
  1492. }
  1493. put_res(dev, slave, rcqn, RES_CQ);
  1494. put_res(dev, slave, mtt_base, RES_MTT);
  1495. res_end_move(dev, slave, RES_QP, qpn);
  1496. return 0;
  1497. ex_put_srq:
  1498. if (use_srq)
  1499. put_res(dev, slave, srqn, RES_SRQ);
  1500. ex_put_scq:
  1501. if (scqn != rcqn)
  1502. put_res(dev, slave, scqn, RES_CQ);
  1503. ex_put_rcq:
  1504. put_res(dev, slave, rcqn, RES_CQ);
  1505. ex_put_mtt:
  1506. put_res(dev, slave, mtt_base, RES_MTT);
  1507. ex_abort:
  1508. res_abort_move(dev, slave, RES_QP, qpn);
  1509. return err;
  1510. }
  1511. static int eq_get_mtt_addr(struct mlx4_eq_context *eqc)
  1512. {
  1513. return be32_to_cpu(eqc->mtt_base_addr_l) & 0xfffffff8;
  1514. }
  1515. static int eq_get_mtt_size(struct mlx4_eq_context *eqc)
  1516. {
  1517. int log_eq_size = eqc->log_eq_size & 0x1f;
  1518. int page_shift = (eqc->log_page_size & 0x3f) + 12;
  1519. if (log_eq_size + 5 < page_shift)
  1520. return 1;
  1521. return 1 << (log_eq_size + 5 - page_shift);
  1522. }
  1523. static int cq_get_mtt_addr(struct mlx4_cq_context *cqc)
  1524. {
  1525. return be32_to_cpu(cqc->mtt_base_addr_l) & 0xfffffff8;
  1526. }
  1527. static int cq_get_mtt_size(struct mlx4_cq_context *cqc)
  1528. {
  1529. int log_cq_size = (be32_to_cpu(cqc->logsize_usrpage) >> 24) & 0x1f;
  1530. int page_shift = (cqc->log_page_size & 0x3f) + 12;
  1531. if (log_cq_size + 5 < page_shift)
  1532. return 1;
  1533. return 1 << (log_cq_size + 5 - page_shift);
  1534. }
  1535. int mlx4_SW2HW_EQ_wrapper(struct mlx4_dev *dev, int slave,
  1536. struct mlx4_vhcr *vhcr,
  1537. struct mlx4_cmd_mailbox *inbox,
  1538. struct mlx4_cmd_mailbox *outbox,
  1539. struct mlx4_cmd_info *cmd)
  1540. {
  1541. int err;
  1542. int eqn = vhcr->in_modifier;
  1543. int res_id = (slave << 8) | eqn;
  1544. struct mlx4_eq_context *eqc = inbox->buf;
  1545. int mtt_base = eq_get_mtt_addr(eqc) / dev->caps.mtt_entry_sz;
  1546. int mtt_size = eq_get_mtt_size(eqc);
  1547. struct res_eq *eq;
  1548. struct res_mtt *mtt;
  1549. err = add_res_range(dev, slave, res_id, 1, RES_EQ, 0);
  1550. if (err)
  1551. return err;
  1552. err = eq_res_start_move_to(dev, slave, res_id, RES_EQ_HW, &eq);
  1553. if (err)
  1554. goto out_add;
  1555. err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
  1556. if (err)
  1557. goto out_move;
  1558. err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt);
  1559. if (err)
  1560. goto out_put;
  1561. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1562. if (err)
  1563. goto out_put;
  1564. atomic_inc(&mtt->ref_count);
  1565. eq->mtt = mtt;
  1566. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1567. res_end_move(dev, slave, RES_EQ, res_id);
  1568. return 0;
  1569. out_put:
  1570. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1571. out_move:
  1572. res_abort_move(dev, slave, RES_EQ, res_id);
  1573. out_add:
  1574. rem_res_range(dev, slave, res_id, 1, RES_EQ, 0);
  1575. return err;
  1576. }
  1577. static int get_containing_mtt(struct mlx4_dev *dev, int slave, int start,
  1578. int len, struct res_mtt **res)
  1579. {
  1580. struct mlx4_priv *priv = mlx4_priv(dev);
  1581. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  1582. struct res_mtt *mtt;
  1583. int err = -EINVAL;
  1584. spin_lock_irq(mlx4_tlock(dev));
  1585. list_for_each_entry(mtt, &tracker->slave_list[slave].res_list[RES_MTT],
  1586. com.list) {
  1587. if (!check_mtt_range(dev, slave, start, len, mtt)) {
  1588. *res = mtt;
  1589. mtt->com.from_state = mtt->com.state;
  1590. mtt->com.state = RES_MTT_BUSY;
  1591. err = 0;
  1592. break;
  1593. }
  1594. }
  1595. spin_unlock_irq(mlx4_tlock(dev));
  1596. return err;
  1597. }
  1598. int mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave,
  1599. struct mlx4_vhcr *vhcr,
  1600. struct mlx4_cmd_mailbox *inbox,
  1601. struct mlx4_cmd_mailbox *outbox,
  1602. struct mlx4_cmd_info *cmd)
  1603. {
  1604. struct mlx4_mtt mtt;
  1605. __be64 *page_list = inbox->buf;
  1606. u64 *pg_list = (u64 *)page_list;
  1607. int i;
  1608. struct res_mtt *rmtt = NULL;
  1609. int start = be64_to_cpu(page_list[0]);
  1610. int npages = vhcr->in_modifier;
  1611. int err;
  1612. err = get_containing_mtt(dev, slave, start, npages, &rmtt);
  1613. if (err)
  1614. return err;
  1615. /* Call the SW implementation of write_mtt:
  1616. * - Prepare a dummy mtt struct
  1617. * - Translate inbox contents to simple addresses in host endianess */
  1618. mtt.offset = 0; /* TBD this is broken but I don't handle it since
  1619. we don't really use it */
  1620. mtt.order = 0;
  1621. mtt.page_shift = 0;
  1622. for (i = 0; i < npages; ++i)
  1623. pg_list[i + 2] = (be64_to_cpu(page_list[i + 2]) & ~1ULL);
  1624. err = __mlx4_write_mtt(dev, &mtt, be64_to_cpu(page_list[0]), npages,
  1625. ((u64 *)page_list + 2));
  1626. if (rmtt)
  1627. put_res(dev, slave, rmtt->com.res_id, RES_MTT);
  1628. return err;
  1629. }
  1630. int mlx4_HW2SW_EQ_wrapper(struct mlx4_dev *dev, int slave,
  1631. struct mlx4_vhcr *vhcr,
  1632. struct mlx4_cmd_mailbox *inbox,
  1633. struct mlx4_cmd_mailbox *outbox,
  1634. struct mlx4_cmd_info *cmd)
  1635. {
  1636. int eqn = vhcr->in_modifier;
  1637. int res_id = eqn | (slave << 8);
  1638. struct res_eq *eq;
  1639. int err;
  1640. err = eq_res_start_move_to(dev, slave, res_id, RES_EQ_RESERVED, &eq);
  1641. if (err)
  1642. return err;
  1643. err = get_res(dev, slave, eq->mtt->com.res_id, RES_MTT, NULL);
  1644. if (err)
  1645. goto ex_abort;
  1646. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1647. if (err)
  1648. goto ex_put;
  1649. atomic_dec(&eq->mtt->ref_count);
  1650. put_res(dev, slave, eq->mtt->com.res_id, RES_MTT);
  1651. res_end_move(dev, slave, RES_EQ, res_id);
  1652. rem_res_range(dev, slave, res_id, 1, RES_EQ, 0);
  1653. return 0;
  1654. ex_put:
  1655. put_res(dev, slave, eq->mtt->com.res_id, RES_MTT);
  1656. ex_abort:
  1657. res_abort_move(dev, slave, RES_EQ, res_id);
  1658. return err;
  1659. }
  1660. int mlx4_GEN_EQE(struct mlx4_dev *dev, int slave, struct mlx4_eqe *eqe)
  1661. {
  1662. struct mlx4_priv *priv = mlx4_priv(dev);
  1663. struct mlx4_slave_event_eq_info *event_eq;
  1664. struct mlx4_cmd_mailbox *mailbox;
  1665. u32 in_modifier = 0;
  1666. int err;
  1667. int res_id;
  1668. struct res_eq *req;
  1669. if (!priv->mfunc.master.slave_state)
  1670. return -EINVAL;
  1671. event_eq = &priv->mfunc.master.slave_state[slave].event_eq[eqe->type];
  1672. /* Create the event only if the slave is registered */
  1673. if (event_eq->eqn < 0)
  1674. return 0;
  1675. mutex_lock(&priv->mfunc.master.gen_eqe_mutex[slave]);
  1676. res_id = (slave << 8) | event_eq->eqn;
  1677. err = get_res(dev, slave, res_id, RES_EQ, &req);
  1678. if (err)
  1679. goto unlock;
  1680. if (req->com.from_state != RES_EQ_HW) {
  1681. err = -EINVAL;
  1682. goto put;
  1683. }
  1684. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1685. if (IS_ERR(mailbox)) {
  1686. err = PTR_ERR(mailbox);
  1687. goto put;
  1688. }
  1689. if (eqe->type == MLX4_EVENT_TYPE_CMD) {
  1690. ++event_eq->token;
  1691. eqe->event.cmd.token = cpu_to_be16(event_eq->token);
  1692. }
  1693. memcpy(mailbox->buf, (u8 *) eqe, 28);
  1694. in_modifier = (slave & 0xff) | ((event_eq->eqn & 0xff) << 16);
  1695. err = mlx4_cmd(dev, mailbox->dma, in_modifier, 0,
  1696. MLX4_CMD_GEN_EQE, MLX4_CMD_TIME_CLASS_B,
  1697. MLX4_CMD_NATIVE);
  1698. put_res(dev, slave, res_id, RES_EQ);
  1699. mutex_unlock(&priv->mfunc.master.gen_eqe_mutex[slave]);
  1700. mlx4_free_cmd_mailbox(dev, mailbox);
  1701. return err;
  1702. put:
  1703. put_res(dev, slave, res_id, RES_EQ);
  1704. unlock:
  1705. mutex_unlock(&priv->mfunc.master.gen_eqe_mutex[slave]);
  1706. return err;
  1707. }
  1708. int mlx4_QUERY_EQ_wrapper(struct mlx4_dev *dev, int slave,
  1709. struct mlx4_vhcr *vhcr,
  1710. struct mlx4_cmd_mailbox *inbox,
  1711. struct mlx4_cmd_mailbox *outbox,
  1712. struct mlx4_cmd_info *cmd)
  1713. {
  1714. int eqn = vhcr->in_modifier;
  1715. int res_id = eqn | (slave << 8);
  1716. struct res_eq *eq;
  1717. int err;
  1718. err = get_res(dev, slave, res_id, RES_EQ, &eq);
  1719. if (err)
  1720. return err;
  1721. if (eq->com.from_state != RES_EQ_HW) {
  1722. err = -EINVAL;
  1723. goto ex_put;
  1724. }
  1725. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1726. ex_put:
  1727. put_res(dev, slave, res_id, RES_EQ);
  1728. return err;
  1729. }
  1730. int mlx4_SW2HW_CQ_wrapper(struct mlx4_dev *dev, int slave,
  1731. struct mlx4_vhcr *vhcr,
  1732. struct mlx4_cmd_mailbox *inbox,
  1733. struct mlx4_cmd_mailbox *outbox,
  1734. struct mlx4_cmd_info *cmd)
  1735. {
  1736. int err;
  1737. int cqn = vhcr->in_modifier;
  1738. struct mlx4_cq_context *cqc = inbox->buf;
  1739. int mtt_base = cq_get_mtt_addr(cqc) / dev->caps.mtt_entry_sz;
  1740. struct res_cq *cq;
  1741. struct res_mtt *mtt;
  1742. err = cq_res_start_move_to(dev, slave, cqn, RES_CQ_HW, &cq);
  1743. if (err)
  1744. return err;
  1745. err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
  1746. if (err)
  1747. goto out_move;
  1748. err = check_mtt_range(dev, slave, mtt_base, cq_get_mtt_size(cqc), mtt);
  1749. if (err)
  1750. goto out_put;
  1751. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1752. if (err)
  1753. goto out_put;
  1754. atomic_inc(&mtt->ref_count);
  1755. cq->mtt = mtt;
  1756. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1757. res_end_move(dev, slave, RES_CQ, cqn);
  1758. return 0;
  1759. out_put:
  1760. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1761. out_move:
  1762. res_abort_move(dev, slave, RES_CQ, cqn);
  1763. return err;
  1764. }
  1765. int mlx4_HW2SW_CQ_wrapper(struct mlx4_dev *dev, int slave,
  1766. struct mlx4_vhcr *vhcr,
  1767. struct mlx4_cmd_mailbox *inbox,
  1768. struct mlx4_cmd_mailbox *outbox,
  1769. struct mlx4_cmd_info *cmd)
  1770. {
  1771. int err;
  1772. int cqn = vhcr->in_modifier;
  1773. struct res_cq *cq;
  1774. err = cq_res_start_move_to(dev, slave, cqn, RES_CQ_ALLOCATED, &cq);
  1775. if (err)
  1776. return err;
  1777. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1778. if (err)
  1779. goto out_move;
  1780. atomic_dec(&cq->mtt->ref_count);
  1781. res_end_move(dev, slave, RES_CQ, cqn);
  1782. return 0;
  1783. out_move:
  1784. res_abort_move(dev, slave, RES_CQ, cqn);
  1785. return err;
  1786. }
  1787. int mlx4_QUERY_CQ_wrapper(struct mlx4_dev *dev, int slave,
  1788. struct mlx4_vhcr *vhcr,
  1789. struct mlx4_cmd_mailbox *inbox,
  1790. struct mlx4_cmd_mailbox *outbox,
  1791. struct mlx4_cmd_info *cmd)
  1792. {
  1793. int cqn = vhcr->in_modifier;
  1794. struct res_cq *cq;
  1795. int err;
  1796. err = get_res(dev, slave, cqn, RES_CQ, &cq);
  1797. if (err)
  1798. return err;
  1799. if (cq->com.from_state != RES_CQ_HW)
  1800. goto ex_put;
  1801. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1802. ex_put:
  1803. put_res(dev, slave, cqn, RES_CQ);
  1804. return err;
  1805. }
  1806. static int handle_resize(struct mlx4_dev *dev, int slave,
  1807. struct mlx4_vhcr *vhcr,
  1808. struct mlx4_cmd_mailbox *inbox,
  1809. struct mlx4_cmd_mailbox *outbox,
  1810. struct mlx4_cmd_info *cmd,
  1811. struct res_cq *cq)
  1812. {
  1813. int err;
  1814. struct res_mtt *orig_mtt;
  1815. struct res_mtt *mtt;
  1816. struct mlx4_cq_context *cqc = inbox->buf;
  1817. int mtt_base = cq_get_mtt_addr(cqc) / dev->caps.mtt_entry_sz;
  1818. err = get_res(dev, slave, cq->mtt->com.res_id, RES_MTT, &orig_mtt);
  1819. if (err)
  1820. return err;
  1821. if (orig_mtt != cq->mtt) {
  1822. err = -EINVAL;
  1823. goto ex_put;
  1824. }
  1825. err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
  1826. if (err)
  1827. goto ex_put;
  1828. err = check_mtt_range(dev, slave, mtt_base, cq_get_mtt_size(cqc), mtt);
  1829. if (err)
  1830. goto ex_put1;
  1831. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1832. if (err)
  1833. goto ex_put1;
  1834. atomic_dec(&orig_mtt->ref_count);
  1835. put_res(dev, slave, orig_mtt->com.res_id, RES_MTT);
  1836. atomic_inc(&mtt->ref_count);
  1837. cq->mtt = mtt;
  1838. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1839. return 0;
  1840. ex_put1:
  1841. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1842. ex_put:
  1843. put_res(dev, slave, orig_mtt->com.res_id, RES_MTT);
  1844. return err;
  1845. }
  1846. int mlx4_MODIFY_CQ_wrapper(struct mlx4_dev *dev, int slave,
  1847. struct mlx4_vhcr *vhcr,
  1848. struct mlx4_cmd_mailbox *inbox,
  1849. struct mlx4_cmd_mailbox *outbox,
  1850. struct mlx4_cmd_info *cmd)
  1851. {
  1852. int cqn = vhcr->in_modifier;
  1853. struct res_cq *cq;
  1854. int err;
  1855. err = get_res(dev, slave, cqn, RES_CQ, &cq);
  1856. if (err)
  1857. return err;
  1858. if (cq->com.from_state != RES_CQ_HW)
  1859. goto ex_put;
  1860. if (vhcr->op_modifier == 0) {
  1861. err = handle_resize(dev, slave, vhcr, inbox, outbox, cmd, cq);
  1862. goto ex_put;
  1863. }
  1864. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1865. ex_put:
  1866. put_res(dev, slave, cqn, RES_CQ);
  1867. return err;
  1868. }
  1869. static int srq_get_mtt_size(struct mlx4_srq_context *srqc)
  1870. {
  1871. int log_srq_size = (be32_to_cpu(srqc->state_logsize_srqn) >> 24) & 0xf;
  1872. int log_rq_stride = srqc->logstride & 7;
  1873. int page_shift = (srqc->log_page_size & 0x3f) + 12;
  1874. if (log_srq_size + log_rq_stride + 4 < page_shift)
  1875. return 1;
  1876. return 1 << (log_srq_size + log_rq_stride + 4 - page_shift);
  1877. }
  1878. int mlx4_SW2HW_SRQ_wrapper(struct mlx4_dev *dev, int slave,
  1879. struct mlx4_vhcr *vhcr,
  1880. struct mlx4_cmd_mailbox *inbox,
  1881. struct mlx4_cmd_mailbox *outbox,
  1882. struct mlx4_cmd_info *cmd)
  1883. {
  1884. int err;
  1885. int srqn = vhcr->in_modifier;
  1886. struct res_mtt *mtt;
  1887. struct res_srq *srq;
  1888. struct mlx4_srq_context *srqc = inbox->buf;
  1889. int mtt_base = srq_get_mtt_addr(srqc) / dev->caps.mtt_entry_sz;
  1890. if (srqn != (be32_to_cpu(srqc->state_logsize_srqn) & 0xffffff))
  1891. return -EINVAL;
  1892. err = srq_res_start_move_to(dev, slave, srqn, RES_SRQ_HW, &srq);
  1893. if (err)
  1894. return err;
  1895. err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
  1896. if (err)
  1897. goto ex_abort;
  1898. err = check_mtt_range(dev, slave, mtt_base, srq_get_mtt_size(srqc),
  1899. mtt);
  1900. if (err)
  1901. goto ex_put_mtt;
  1902. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1903. if (err)
  1904. goto ex_put_mtt;
  1905. atomic_inc(&mtt->ref_count);
  1906. srq->mtt = mtt;
  1907. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1908. res_end_move(dev, slave, RES_SRQ, srqn);
  1909. return 0;
  1910. ex_put_mtt:
  1911. put_res(dev, slave, mtt->com.res_id, RES_MTT);
  1912. ex_abort:
  1913. res_abort_move(dev, slave, RES_SRQ, srqn);
  1914. return err;
  1915. }
  1916. int mlx4_HW2SW_SRQ_wrapper(struct mlx4_dev *dev, int slave,
  1917. struct mlx4_vhcr *vhcr,
  1918. struct mlx4_cmd_mailbox *inbox,
  1919. struct mlx4_cmd_mailbox *outbox,
  1920. struct mlx4_cmd_info *cmd)
  1921. {
  1922. int err;
  1923. int srqn = vhcr->in_modifier;
  1924. struct res_srq *srq;
  1925. err = srq_res_start_move_to(dev, slave, srqn, RES_SRQ_ALLOCATED, &srq);
  1926. if (err)
  1927. return err;
  1928. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1929. if (err)
  1930. goto ex_abort;
  1931. atomic_dec(&srq->mtt->ref_count);
  1932. if (srq->cq)
  1933. atomic_dec(&srq->cq->ref_count);
  1934. res_end_move(dev, slave, RES_SRQ, srqn);
  1935. return 0;
  1936. ex_abort:
  1937. res_abort_move(dev, slave, RES_SRQ, srqn);
  1938. return err;
  1939. }
  1940. int mlx4_QUERY_SRQ_wrapper(struct mlx4_dev *dev, int slave,
  1941. struct mlx4_vhcr *vhcr,
  1942. struct mlx4_cmd_mailbox *inbox,
  1943. struct mlx4_cmd_mailbox *outbox,
  1944. struct mlx4_cmd_info *cmd)
  1945. {
  1946. int err;
  1947. int srqn = vhcr->in_modifier;
  1948. struct res_srq *srq;
  1949. err = get_res(dev, slave, srqn, RES_SRQ, &srq);
  1950. if (err)
  1951. return err;
  1952. if (srq->com.from_state != RES_SRQ_HW) {
  1953. err = -EBUSY;
  1954. goto out;
  1955. }
  1956. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1957. out:
  1958. put_res(dev, slave, srqn, RES_SRQ);
  1959. return err;
  1960. }
  1961. int mlx4_ARM_SRQ_wrapper(struct mlx4_dev *dev, int slave,
  1962. struct mlx4_vhcr *vhcr,
  1963. struct mlx4_cmd_mailbox *inbox,
  1964. struct mlx4_cmd_mailbox *outbox,
  1965. struct mlx4_cmd_info *cmd)
  1966. {
  1967. int err;
  1968. int srqn = vhcr->in_modifier;
  1969. struct res_srq *srq;
  1970. err = get_res(dev, slave, srqn, RES_SRQ, &srq);
  1971. if (err)
  1972. return err;
  1973. if (srq->com.from_state != RES_SRQ_HW) {
  1974. err = -EBUSY;
  1975. goto out;
  1976. }
  1977. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1978. out:
  1979. put_res(dev, slave, srqn, RES_SRQ);
  1980. return err;
  1981. }
  1982. int mlx4_GEN_QP_wrapper(struct mlx4_dev *dev, int slave,
  1983. struct mlx4_vhcr *vhcr,
  1984. struct mlx4_cmd_mailbox *inbox,
  1985. struct mlx4_cmd_mailbox *outbox,
  1986. struct mlx4_cmd_info *cmd)
  1987. {
  1988. int err;
  1989. int qpn = vhcr->in_modifier & 0x7fffff;
  1990. struct res_qp *qp;
  1991. err = get_res(dev, slave, qpn, RES_QP, &qp);
  1992. if (err)
  1993. return err;
  1994. if (qp->com.from_state != RES_QP_HW) {
  1995. err = -EBUSY;
  1996. goto out;
  1997. }
  1998. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  1999. out:
  2000. put_res(dev, slave, qpn, RES_QP);
  2001. return err;
  2002. }
  2003. int mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev *dev, int slave,
  2004. struct mlx4_vhcr *vhcr,
  2005. struct mlx4_cmd_mailbox *inbox,
  2006. struct mlx4_cmd_mailbox *outbox,
  2007. struct mlx4_cmd_info *cmd)
  2008. {
  2009. struct mlx4_qp_context *qpc = inbox->buf + 8;
  2010. update_ud_gid(dev, qpc, (u8)slave);
  2011. return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  2012. }
  2013. int mlx4_2RST_QP_wrapper(struct mlx4_dev *dev, int slave,
  2014. struct mlx4_vhcr *vhcr,
  2015. struct mlx4_cmd_mailbox *inbox,
  2016. struct mlx4_cmd_mailbox *outbox,
  2017. struct mlx4_cmd_info *cmd)
  2018. {
  2019. int err;
  2020. int qpn = vhcr->in_modifier & 0x7fffff;
  2021. struct res_qp *qp;
  2022. err = qp_res_start_move_to(dev, slave, qpn, RES_QP_MAPPED, &qp, 0);
  2023. if (err)
  2024. return err;
  2025. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  2026. if (err)
  2027. goto ex_abort;
  2028. atomic_dec(&qp->mtt->ref_count);
  2029. atomic_dec(&qp->rcq->ref_count);
  2030. atomic_dec(&qp->scq->ref_count);
  2031. if (qp->srq)
  2032. atomic_dec(&qp->srq->ref_count);
  2033. res_end_move(dev, slave, RES_QP, qpn);
  2034. return 0;
  2035. ex_abort:
  2036. res_abort_move(dev, slave, RES_QP, qpn);
  2037. return err;
  2038. }
  2039. static struct res_gid *find_gid(struct mlx4_dev *dev, int slave,
  2040. struct res_qp *rqp, u8 *gid)
  2041. {
  2042. struct res_gid *res;
  2043. list_for_each_entry(res, &rqp->mcg_list, list) {
  2044. if (!memcmp(res->gid, gid, 16))
  2045. return res;
  2046. }
  2047. return NULL;
  2048. }
  2049. static int add_mcg_res(struct mlx4_dev *dev, int slave, struct res_qp *rqp,
  2050. u8 *gid, enum mlx4_protocol prot,
  2051. enum mlx4_steer_type steer)
  2052. {
  2053. struct res_gid *res;
  2054. int err;
  2055. res = kzalloc(sizeof *res, GFP_KERNEL);
  2056. if (!res)
  2057. return -ENOMEM;
  2058. spin_lock_irq(&rqp->mcg_spl);
  2059. if (find_gid(dev, slave, rqp, gid)) {
  2060. kfree(res);
  2061. err = -EEXIST;
  2062. } else {
  2063. memcpy(res->gid, gid, 16);
  2064. res->prot = prot;
  2065. res->steer = steer;
  2066. list_add_tail(&res->list, &rqp->mcg_list);
  2067. err = 0;
  2068. }
  2069. spin_unlock_irq(&rqp->mcg_spl);
  2070. return err;
  2071. }
  2072. static int rem_mcg_res(struct mlx4_dev *dev, int slave, struct res_qp *rqp,
  2073. u8 *gid, enum mlx4_protocol prot,
  2074. enum mlx4_steer_type steer)
  2075. {
  2076. struct res_gid *res;
  2077. int err;
  2078. spin_lock_irq(&rqp->mcg_spl);
  2079. res = find_gid(dev, slave, rqp, gid);
  2080. if (!res || res->prot != prot || res->steer != steer)
  2081. err = -EINVAL;
  2082. else {
  2083. list_del(&res->list);
  2084. kfree(res);
  2085. err = 0;
  2086. }
  2087. spin_unlock_irq(&rqp->mcg_spl);
  2088. return err;
  2089. }
  2090. int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
  2091. struct mlx4_vhcr *vhcr,
  2092. struct mlx4_cmd_mailbox *inbox,
  2093. struct mlx4_cmd_mailbox *outbox,
  2094. struct mlx4_cmd_info *cmd)
  2095. {
  2096. struct mlx4_qp qp; /* dummy for calling attach/detach */
  2097. u8 *gid = inbox->buf;
  2098. enum mlx4_protocol prot = (vhcr->in_modifier >> 28) & 0x7;
  2099. int err;
  2100. int qpn;
  2101. struct res_qp *rqp;
  2102. int attach = vhcr->op_modifier;
  2103. int block_loopback = vhcr->in_modifier >> 31;
  2104. u8 steer_type_mask = 2;
  2105. enum mlx4_steer_type type = (gid[7] & steer_type_mask) >> 1;
  2106. qpn = vhcr->in_modifier & 0xffffff;
  2107. err = get_res(dev, slave, qpn, RES_QP, &rqp);
  2108. if (err)
  2109. return err;
  2110. qp.qpn = qpn;
  2111. if (attach) {
  2112. err = add_mcg_res(dev, slave, rqp, gid, prot, type);
  2113. if (err)
  2114. goto ex_put;
  2115. err = mlx4_qp_attach_common(dev, &qp, gid,
  2116. block_loopback, prot, type);
  2117. if (err)
  2118. goto ex_rem;
  2119. } else {
  2120. err = rem_mcg_res(dev, slave, rqp, gid, prot, type);
  2121. if (err)
  2122. goto ex_put;
  2123. err = mlx4_qp_detach_common(dev, &qp, gid, prot, type);
  2124. }
  2125. put_res(dev, slave, qpn, RES_QP);
  2126. return 0;
  2127. ex_rem:
  2128. /* ignore error return below, already in error */
  2129. (void) rem_mcg_res(dev, slave, rqp, gid, prot, type);
  2130. ex_put:
  2131. put_res(dev, slave, qpn, RES_QP);
  2132. return err;
  2133. }
  2134. enum {
  2135. BUSY_MAX_RETRIES = 10
  2136. };
  2137. int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave,
  2138. struct mlx4_vhcr *vhcr,
  2139. struct mlx4_cmd_mailbox *inbox,
  2140. struct mlx4_cmd_mailbox *outbox,
  2141. struct mlx4_cmd_info *cmd)
  2142. {
  2143. int err;
  2144. int index = vhcr->in_modifier & 0xffff;
  2145. err = get_res(dev, slave, index, RES_COUNTER, NULL);
  2146. if (err)
  2147. return err;
  2148. err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
  2149. put_res(dev, slave, index, RES_COUNTER);
  2150. return err;
  2151. }
  2152. static void detach_qp(struct mlx4_dev *dev, int slave, struct res_qp *rqp)
  2153. {
  2154. struct res_gid *rgid;
  2155. struct res_gid *tmp;
  2156. struct mlx4_qp qp; /* dummy for calling attach/detach */
  2157. list_for_each_entry_safe(rgid, tmp, &rqp->mcg_list, list) {
  2158. qp.qpn = rqp->local_qpn;
  2159. (void) mlx4_qp_detach_common(dev, &qp, rgid->gid, rgid->prot,
  2160. rgid->steer);
  2161. list_del(&rgid->list);
  2162. kfree(rgid);
  2163. }
  2164. }
  2165. static int _move_all_busy(struct mlx4_dev *dev, int slave,
  2166. enum mlx4_resource type, int print)
  2167. {
  2168. struct mlx4_priv *priv = mlx4_priv(dev);
  2169. struct mlx4_resource_tracker *tracker =
  2170. &priv->mfunc.master.res_tracker;
  2171. struct list_head *rlist = &tracker->slave_list[slave].res_list[type];
  2172. struct res_common *r;
  2173. struct res_common *tmp;
  2174. int busy;
  2175. busy = 0;
  2176. spin_lock_irq(mlx4_tlock(dev));
  2177. list_for_each_entry_safe(r, tmp, rlist, list) {
  2178. if (r->owner == slave) {
  2179. if (!r->removing) {
  2180. if (r->state == RES_ANY_BUSY) {
  2181. if (print)
  2182. mlx4_dbg(dev,
  2183. "%s id 0x%x is busy\n",
  2184. ResourceType(type),
  2185. r->res_id);
  2186. ++busy;
  2187. } else {
  2188. r->from_state = r->state;
  2189. r->state = RES_ANY_BUSY;
  2190. r->removing = 1;
  2191. }
  2192. }
  2193. }
  2194. }
  2195. spin_unlock_irq(mlx4_tlock(dev));
  2196. return busy;
  2197. }
  2198. static int move_all_busy(struct mlx4_dev *dev, int slave,
  2199. enum mlx4_resource type)
  2200. {
  2201. unsigned long begin;
  2202. int busy;
  2203. begin = jiffies;
  2204. do {
  2205. busy = _move_all_busy(dev, slave, type, 0);
  2206. if (time_after(jiffies, begin + 5 * HZ))
  2207. break;
  2208. if (busy)
  2209. cond_resched();
  2210. } while (busy);
  2211. if (busy)
  2212. busy = _move_all_busy(dev, slave, type, 1);
  2213. return busy;
  2214. }
  2215. static void rem_slave_qps(struct mlx4_dev *dev, int slave)
  2216. {
  2217. struct mlx4_priv *priv = mlx4_priv(dev);
  2218. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  2219. struct list_head *qp_list =
  2220. &tracker->slave_list[slave].res_list[RES_QP];
  2221. struct res_qp *qp;
  2222. struct res_qp *tmp;
  2223. int state;
  2224. u64 in_param;
  2225. int qpn;
  2226. int err;
  2227. err = move_all_busy(dev, slave, RES_QP);
  2228. if (err)
  2229. mlx4_warn(dev, "rem_slave_qps: Could not move all qps to busy"
  2230. "for slave %d\n", slave);
  2231. spin_lock_irq(mlx4_tlock(dev));
  2232. list_for_each_entry_safe(qp, tmp, qp_list, com.list) {
  2233. spin_unlock_irq(mlx4_tlock(dev));
  2234. if (qp->com.owner == slave) {
  2235. qpn = qp->com.res_id;
  2236. detach_qp(dev, slave, qp);
  2237. state = qp->com.from_state;
  2238. while (state != 0) {
  2239. switch (state) {
  2240. case RES_QP_RESERVED:
  2241. spin_lock_irq(mlx4_tlock(dev));
  2242. radix_tree_delete(&tracker->res_tree[RES_QP],
  2243. qp->com.res_id);
  2244. list_del(&qp->com.list);
  2245. spin_unlock_irq(mlx4_tlock(dev));
  2246. kfree(qp);
  2247. state = 0;
  2248. break;
  2249. case RES_QP_MAPPED:
  2250. if (!valid_reserved(dev, slave, qpn))
  2251. __mlx4_qp_free_icm(dev, qpn);
  2252. state = RES_QP_RESERVED;
  2253. break;
  2254. case RES_QP_HW:
  2255. in_param = slave;
  2256. err = mlx4_cmd(dev, in_param,
  2257. qp->local_qpn, 2,
  2258. MLX4_CMD_2RST_QP,
  2259. MLX4_CMD_TIME_CLASS_A,
  2260. MLX4_CMD_NATIVE);
  2261. if (err)
  2262. mlx4_dbg(dev, "rem_slave_qps: failed"
  2263. " to move slave %d qpn %d to"
  2264. " reset\n", slave,
  2265. qp->local_qpn);
  2266. atomic_dec(&qp->rcq->ref_count);
  2267. atomic_dec(&qp->scq->ref_count);
  2268. atomic_dec(&qp->mtt->ref_count);
  2269. if (qp->srq)
  2270. atomic_dec(&qp->srq->ref_count);
  2271. state = RES_QP_MAPPED;
  2272. break;
  2273. default:
  2274. state = 0;
  2275. }
  2276. }
  2277. }
  2278. spin_lock_irq(mlx4_tlock(dev));
  2279. }
  2280. spin_unlock_irq(mlx4_tlock(dev));
  2281. }
  2282. static void rem_slave_srqs(struct mlx4_dev *dev, int slave)
  2283. {
  2284. struct mlx4_priv *priv = mlx4_priv(dev);
  2285. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  2286. struct list_head *srq_list =
  2287. &tracker->slave_list[slave].res_list[RES_SRQ];
  2288. struct res_srq *srq;
  2289. struct res_srq *tmp;
  2290. int state;
  2291. u64 in_param;
  2292. LIST_HEAD(tlist);
  2293. int srqn;
  2294. int err;
  2295. err = move_all_busy(dev, slave, RES_SRQ);
  2296. if (err)
  2297. mlx4_warn(dev, "rem_slave_srqs: Could not move all srqs to "
  2298. "busy for slave %d\n", slave);
  2299. spin_lock_irq(mlx4_tlock(dev));
  2300. list_for_each_entry_safe(srq, tmp, srq_list, com.list) {
  2301. spin_unlock_irq(mlx4_tlock(dev));
  2302. if (srq->com.owner == slave) {
  2303. srqn = srq->com.res_id;
  2304. state = srq->com.from_state;
  2305. while (state != 0) {
  2306. switch (state) {
  2307. case RES_SRQ_ALLOCATED:
  2308. __mlx4_srq_free_icm(dev, srqn);
  2309. spin_lock_irq(mlx4_tlock(dev));
  2310. radix_tree_delete(&tracker->res_tree[RES_SRQ],
  2311. srqn);
  2312. list_del(&srq->com.list);
  2313. spin_unlock_irq(mlx4_tlock(dev));
  2314. kfree(srq);
  2315. state = 0;
  2316. break;
  2317. case RES_SRQ_HW:
  2318. in_param = slave;
  2319. err = mlx4_cmd(dev, in_param, srqn, 1,
  2320. MLX4_CMD_HW2SW_SRQ,
  2321. MLX4_CMD_TIME_CLASS_A,
  2322. MLX4_CMD_NATIVE);
  2323. if (err)
  2324. mlx4_dbg(dev, "rem_slave_srqs: failed"
  2325. " to move slave %d srq %d to"
  2326. " SW ownership\n",
  2327. slave, srqn);
  2328. atomic_dec(&srq->mtt->ref_count);
  2329. if (srq->cq)
  2330. atomic_dec(&srq->cq->ref_count);
  2331. state = RES_SRQ_ALLOCATED;
  2332. break;
  2333. default:
  2334. state = 0;
  2335. }
  2336. }
  2337. }
  2338. spin_lock_irq(mlx4_tlock(dev));
  2339. }
  2340. spin_unlock_irq(mlx4_tlock(dev));
  2341. }
  2342. static void rem_slave_cqs(struct mlx4_dev *dev, int slave)
  2343. {
  2344. struct mlx4_priv *priv = mlx4_priv(dev);
  2345. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  2346. struct list_head *cq_list =
  2347. &tracker->slave_list[slave].res_list[RES_CQ];
  2348. struct res_cq *cq;
  2349. struct res_cq *tmp;
  2350. int state;
  2351. u64 in_param;
  2352. LIST_HEAD(tlist);
  2353. int cqn;
  2354. int err;
  2355. err = move_all_busy(dev, slave, RES_CQ);
  2356. if (err)
  2357. mlx4_warn(dev, "rem_slave_cqs: Could not move all cqs to "
  2358. "busy for slave %d\n", slave);
  2359. spin_lock_irq(mlx4_tlock(dev));
  2360. list_for_each_entry_safe(cq, tmp, cq_list, com.list) {
  2361. spin_unlock_irq(mlx4_tlock(dev));
  2362. if (cq->com.owner == slave && !atomic_read(&cq->ref_count)) {
  2363. cqn = cq->com.res_id;
  2364. state = cq->com.from_state;
  2365. while (state != 0) {
  2366. switch (state) {
  2367. case RES_CQ_ALLOCATED:
  2368. __mlx4_cq_free_icm(dev, cqn);
  2369. spin_lock_irq(mlx4_tlock(dev));
  2370. radix_tree_delete(&tracker->res_tree[RES_CQ],
  2371. cqn);
  2372. list_del(&cq->com.list);
  2373. spin_unlock_irq(mlx4_tlock(dev));
  2374. kfree(cq);
  2375. state = 0;
  2376. break;
  2377. case RES_CQ_HW:
  2378. in_param = slave;
  2379. err = mlx4_cmd(dev, in_param, cqn, 1,
  2380. MLX4_CMD_HW2SW_CQ,
  2381. MLX4_CMD_TIME_CLASS_A,
  2382. MLX4_CMD_NATIVE);
  2383. if (err)
  2384. mlx4_dbg(dev, "rem_slave_cqs: failed"
  2385. " to move slave %d cq %d to"
  2386. " SW ownership\n",
  2387. slave, cqn);
  2388. atomic_dec(&cq->mtt->ref_count);
  2389. state = RES_CQ_ALLOCATED;
  2390. break;
  2391. default:
  2392. state = 0;
  2393. }
  2394. }
  2395. }
  2396. spin_lock_irq(mlx4_tlock(dev));
  2397. }
  2398. spin_unlock_irq(mlx4_tlock(dev));
  2399. }
  2400. static void rem_slave_mrs(struct mlx4_dev *dev, int slave)
  2401. {
  2402. struct mlx4_priv *priv = mlx4_priv(dev);
  2403. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  2404. struct list_head *mpt_list =
  2405. &tracker->slave_list[slave].res_list[RES_MPT];
  2406. struct res_mpt *mpt;
  2407. struct res_mpt *tmp;
  2408. int state;
  2409. u64 in_param;
  2410. LIST_HEAD(tlist);
  2411. int mptn;
  2412. int err;
  2413. err = move_all_busy(dev, slave, RES_MPT);
  2414. if (err)
  2415. mlx4_warn(dev, "rem_slave_mrs: Could not move all mpts to "
  2416. "busy for slave %d\n", slave);
  2417. spin_lock_irq(mlx4_tlock(dev));
  2418. list_for_each_entry_safe(mpt, tmp, mpt_list, com.list) {
  2419. spin_unlock_irq(mlx4_tlock(dev));
  2420. if (mpt->com.owner == slave) {
  2421. mptn = mpt->com.res_id;
  2422. state = mpt->com.from_state;
  2423. while (state != 0) {
  2424. switch (state) {
  2425. case RES_MPT_RESERVED:
  2426. __mlx4_mr_release(dev, mpt->key);
  2427. spin_lock_irq(mlx4_tlock(dev));
  2428. radix_tree_delete(&tracker->res_tree[RES_MPT],
  2429. mptn);
  2430. list_del(&mpt->com.list);
  2431. spin_unlock_irq(mlx4_tlock(dev));
  2432. kfree(mpt);
  2433. state = 0;
  2434. break;
  2435. case RES_MPT_MAPPED:
  2436. __mlx4_mr_free_icm(dev, mpt->key);
  2437. state = RES_MPT_RESERVED;
  2438. break;
  2439. case RES_MPT_HW:
  2440. in_param = slave;
  2441. err = mlx4_cmd(dev, in_param, mptn, 0,
  2442. MLX4_CMD_HW2SW_MPT,
  2443. MLX4_CMD_TIME_CLASS_A,
  2444. MLX4_CMD_NATIVE);
  2445. if (err)
  2446. mlx4_dbg(dev, "rem_slave_mrs: failed"
  2447. " to move slave %d mpt %d to"
  2448. " SW ownership\n",
  2449. slave, mptn);
  2450. if (mpt->mtt)
  2451. atomic_dec(&mpt->mtt->ref_count);
  2452. state = RES_MPT_MAPPED;
  2453. break;
  2454. default:
  2455. state = 0;
  2456. }
  2457. }
  2458. }
  2459. spin_lock_irq(mlx4_tlock(dev));
  2460. }
  2461. spin_unlock_irq(mlx4_tlock(dev));
  2462. }
  2463. static void rem_slave_mtts(struct mlx4_dev *dev, int slave)
  2464. {
  2465. struct mlx4_priv *priv = mlx4_priv(dev);
  2466. struct mlx4_resource_tracker *tracker =
  2467. &priv->mfunc.master.res_tracker;
  2468. struct list_head *mtt_list =
  2469. &tracker->slave_list[slave].res_list[RES_MTT];
  2470. struct res_mtt *mtt;
  2471. struct res_mtt *tmp;
  2472. int state;
  2473. LIST_HEAD(tlist);
  2474. int base;
  2475. int err;
  2476. err = move_all_busy(dev, slave, RES_MTT);
  2477. if (err)
  2478. mlx4_warn(dev, "rem_slave_mtts: Could not move all mtts to "
  2479. "busy for slave %d\n", slave);
  2480. spin_lock_irq(mlx4_tlock(dev));
  2481. list_for_each_entry_safe(mtt, tmp, mtt_list, com.list) {
  2482. spin_unlock_irq(mlx4_tlock(dev));
  2483. if (mtt->com.owner == slave) {
  2484. base = mtt->com.res_id;
  2485. state = mtt->com.from_state;
  2486. while (state != 0) {
  2487. switch (state) {
  2488. case RES_MTT_ALLOCATED:
  2489. __mlx4_free_mtt_range(dev, base,
  2490. mtt->order);
  2491. spin_lock_irq(mlx4_tlock(dev));
  2492. radix_tree_delete(&tracker->res_tree[RES_MTT],
  2493. base);
  2494. list_del(&mtt->com.list);
  2495. spin_unlock_irq(mlx4_tlock(dev));
  2496. kfree(mtt);
  2497. state = 0;
  2498. break;
  2499. default:
  2500. state = 0;
  2501. }
  2502. }
  2503. }
  2504. spin_lock_irq(mlx4_tlock(dev));
  2505. }
  2506. spin_unlock_irq(mlx4_tlock(dev));
  2507. }
  2508. static void rem_slave_eqs(struct mlx4_dev *dev, int slave)
  2509. {
  2510. struct mlx4_priv *priv = mlx4_priv(dev);
  2511. struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker;
  2512. struct list_head *eq_list =
  2513. &tracker->slave_list[slave].res_list[RES_EQ];
  2514. struct res_eq *eq;
  2515. struct res_eq *tmp;
  2516. int err;
  2517. int state;
  2518. LIST_HEAD(tlist);
  2519. int eqn;
  2520. struct mlx4_cmd_mailbox *mailbox;
  2521. err = move_all_busy(dev, slave, RES_EQ);
  2522. if (err)
  2523. mlx4_warn(dev, "rem_slave_eqs: Could not move all eqs to "
  2524. "busy for slave %d\n", slave);
  2525. spin_lock_irq(mlx4_tlock(dev));
  2526. list_for_each_entry_safe(eq, tmp, eq_list, com.list) {
  2527. spin_unlock_irq(mlx4_tlock(dev));
  2528. if (eq->com.owner == slave) {
  2529. eqn = eq->com.res_id;
  2530. state = eq->com.from_state;
  2531. while (state != 0) {
  2532. switch (state) {
  2533. case RES_EQ_RESERVED:
  2534. spin_lock_irq(mlx4_tlock(dev));
  2535. radix_tree_delete(&tracker->res_tree[RES_EQ],
  2536. eqn);
  2537. list_del(&eq->com.list);
  2538. spin_unlock_irq(mlx4_tlock(dev));
  2539. kfree(eq);
  2540. state = 0;
  2541. break;
  2542. case RES_EQ_HW:
  2543. mailbox = mlx4_alloc_cmd_mailbox(dev);
  2544. if (IS_ERR(mailbox)) {
  2545. cond_resched();
  2546. continue;
  2547. }
  2548. err = mlx4_cmd_box(dev, slave, 0,
  2549. eqn & 0xff, 0,
  2550. MLX4_CMD_HW2SW_EQ,
  2551. MLX4_CMD_TIME_CLASS_A,
  2552. MLX4_CMD_NATIVE);
  2553. mlx4_dbg(dev, "rem_slave_eqs: failed"
  2554. " to move slave %d eqs %d to"
  2555. " SW ownership\n", slave, eqn);
  2556. mlx4_free_cmd_mailbox(dev, mailbox);
  2557. if (!err) {
  2558. atomic_dec(&eq->mtt->ref_count);
  2559. state = RES_EQ_RESERVED;
  2560. }
  2561. break;
  2562. default:
  2563. state = 0;
  2564. }
  2565. }
  2566. }
  2567. spin_lock_irq(mlx4_tlock(dev));
  2568. }
  2569. spin_unlock_irq(mlx4_tlock(dev));
  2570. }
  2571. void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave)
  2572. {
  2573. struct mlx4_priv *priv = mlx4_priv(dev);
  2574. mutex_lock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex);
  2575. /*VLAN*/
  2576. rem_slave_macs(dev, slave);
  2577. rem_slave_qps(dev, slave);
  2578. rem_slave_srqs(dev, slave);
  2579. rem_slave_cqs(dev, slave);
  2580. rem_slave_mrs(dev, slave);
  2581. rem_slave_eqs(dev, slave);
  2582. rem_slave_mtts(dev, slave);
  2583. mutex_unlock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex);
  2584. }