cpupower-monitor.1 5.5 KB

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  1. .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"
  2. .SH NAME
  3. cpupower\-monitor \- Report processor frequency and idle statistics
  4. .SH SYNOPSIS
  5. .ft B
  6. .B cpupower monitor
  7. .RB "\-l"
  8. .B cpupower monitor
  9. .RB [ "\-m <mon1>," [ "<mon2>,..." ] ]
  10. .RB [ "\-i seconds" ]
  11. .br
  12. .B cpupower monitor
  13. .RB [ "\-m <mon1>," [ "<mon2>,..." ] ]
  14. .RB command
  15. .br
  16. .SH DESCRIPTION
  17. \fBcpupower-monitor \fP reports processor topology, frequency and idle power
  18. state statistics. Either \fBcommand\fP is forked and
  19. statistics are printed upon its completion, or statistics are printed periodically.
  20. \fBcpupower-monitor \fP implements independent processor sleep state and
  21. frequency counters. Some are retrieved from kernel statistics, some are
  22. directly reading out hardware registers. Use \-l to get an overview which are
  23. supported on your system.
  24. .SH Options
  25. .PP
  26. \-l
  27. .RS 4
  28. List available monitors on your system. Additional details about each monitor
  29. are shown:
  30. .RS 2
  31. .IP \(bu
  32. The name in quotation marks which can be passed to the \-m parameter.
  33. .IP \(bu
  34. The number of different counters the monitor supports in brackets.
  35. .IP \(bu
  36. The amount of time in seconds the counters might overflow, due to
  37. implementation constraints.
  38. .IP \(bu
  39. The name and a description of each counter and its processor hierarchy level
  40. coverage in square brackets:
  41. .RS 4
  42. .IP \(bu
  43. [T] \-> Thread
  44. .IP \(bu
  45. [C] \-> Core
  46. .IP \(bu
  47. [P] \-> Processor Package (Socket)
  48. .IP \(bu
  49. [M] \-> Machine/Platform wide counter
  50. .RE
  51. .RE
  52. .RE
  53. .PP
  54. \-m <mon1>,<mon2>,...
  55. .RS 4
  56. Only display specific monitors. Use the monitor string(s) provided by \-l option.
  57. .RE
  58. .PP
  59. \-i seconds
  60. .RS 4
  61. Measure intervall.
  62. .RE
  63. .PP
  64. command
  65. .RS 4
  66. Measure idle and frequency characteristics of an arbitrary command/workload.
  67. The executable \fBcommand\fP is forked and upon its exit, statistics gathered since it was
  68. forked are displayed.
  69. .RE
  70. .PP
  71. \-v
  72. .RS 4
  73. Increase verbosity if the binary was compiled with the DEBUG option set.
  74. .RE
  75. .SH MONITOR DESCRIPTIONS
  76. .SS "Idle_Stats"
  77. Shows statistics of the cpuidle kernel subsystem. Values are retrieved from
  78. /sys/devices/system/cpu/cpu*/cpuidle/state*/.
  79. The kernel updates these values every time an idle state is entered or
  80. left. Therefore there can be some inaccuracy when cores are in an idle
  81. state for some time when the measure starts or ends. In worst case it can happen
  82. that one core stayed in an idle state for the whole measure time and the idle
  83. state usage time as exported by the kernel did not get updated. In this case
  84. a state residency of 0 percent is shown while it was 100.
  85. .SS "Mperf"
  86. The name comes from the aperf/mperf (average and maximum) MSR registers used
  87. which are available on recent X86 processors. It shows the average frequency
  88. (including boost frequencies).
  89. The fact that on all recent hardware the mperf timer stops ticking in any idle
  90. state it is also used to show C0 (processor is active) and Cx (processor is in
  91. any sleep state) times. These counters do not have the inaccuracy restrictions
  92. the "Idle_Stats" counters may show.
  93. May work poorly on Linux-2.6.20 through 2.6.29, as the \fBacpi-cpufreq \fP
  94. kernel frequency driver periodically cleared aperf/mperf registers in those
  95. kernels.
  96. .SS "Nehalem" "SandyBridge"
  97. Intel Core and Package sleep state counters.
  98. Threads (hyperthreaded cores) may not be able to enter deeper core states if
  99. its sibling is utilized.
  100. Deepest package sleep states may in reality show up as machine/platform wide
  101. sleep states and can only be entered if all cores are idle. Look up Intel
  102. manuals (some are provided in the References section) for further details.
  103. .SS "Ontario" "Liano"
  104. AMD laptop and desktop processor (family 12h and 14h) sleep state counters.
  105. The registers are accessed via PCI and therefore can still be read out while
  106. cores have been offlined.
  107. There is one special counter: NBP1 (North Bridge P1).
  108. This one always returns 0 or 1, depending on whether the North Bridge P1
  109. power state got entered at least once during measure time.
  110. Being able to enter NBP1 state also depends on graphics power management.
  111. Therefore this counter can be used to verify whether the graphics' driver
  112. power management is working as expected.
  113. .SH EXAMPLES
  114. cpupower monitor -l" may show:
  115. .RS 4
  116. Monitor "Mperf" (3 states) \- Might overflow after 922000000 s
  117. ...
  118. Monitor "Idle_Stats" (3 states) \- Might overflow after 4294967295 s
  119. ...
  120. .RE
  121. cpupower monitor \-m "Idle_Stats,Mperf" scp /tmp/test /nfs/tmp
  122. Monitor the scp command, show both Mperf and Idle_Stats states counter
  123. statistics, but in exchanged order.
  124. .RE
  125. Be careful that the typical command to fully utilize one CPU by doing:
  126. cpupower monitor cat /dev/zero >/dev/null
  127. Does not work as expected, because the measured output is redirected to
  128. /dev/null. This could get workarounded by putting the line into an own, tiny
  129. shell script. Hit CTRL\-c to terminate the command and get the measure output
  130. displayed.
  131. .SH REFERENCES
  132. "BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 14h Processors"
  133. http://support.amd.com/us/Processor_TechDocs/43170.pdf
  134. "Intel® Turbo Boost Technology
  135. in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
  136. http://download.intel.com/design/processor/applnots/320354.pdf
  137. "Intel® 64 and IA-32 Architectures Software Developer's Manual
  138. Volume 3B: System Programming Guide"
  139. http://www.intel.com/products/processor/manuals
  140. .SH FILES
  141. .ta
  142. .nf
  143. /dev/cpu/*/msr
  144. /sys/devices/system/cpu/cpu*/cpuidle/state*/.
  145. .fi
  146. .SH "SEE ALSO"
  147. powertop(8), msr(4), vmstat(8)
  148. .PP
  149. .SH AUTHORS
  150. .nf
  151. Written by Thomas Renninger <trenn@suse.de>
  152. Nehalem, SandyBridge monitors and command passing
  153. based on turbostat.8 from Len Brown <len.brown@intel.com>