i2s.c 25 KB

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  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassi.brar@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <sound/soc.h>
  18. #include <sound/pcm_params.h>
  19. #include <plat/audio.h>
  20. #include "dma.h"
  21. #include "idma.h"
  22. #include "i2s.h"
  23. #include "i2s-regs.h"
  24. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  25. struct i2s_dai {
  26. /* Platform device for this DAI */
  27. struct platform_device *pdev;
  28. /* IOREMAP'd SFRs */
  29. void __iomem *addr;
  30. /* Physical base address of SFRs */
  31. u32 base;
  32. /* Rate of RCLK source clock */
  33. unsigned long rclk_srcrate;
  34. /* Frame Clock */
  35. unsigned frmclk;
  36. /*
  37. * Specifically requested RCLK,BCLK by MACHINE Driver.
  38. * 0 indicates CPU driver is free to choose any value.
  39. */
  40. unsigned rfs, bfs;
  41. /* I2S Controller's core clock */
  42. struct clk *clk;
  43. /* Clock for generating I2S signals */
  44. struct clk *op_clk;
  45. /* Array of clock names for op_clk */
  46. const char **src_clk;
  47. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  48. struct i2s_dai *pri_dai;
  49. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  50. struct i2s_dai *sec_dai;
  51. #define DAI_OPENED (1 << 0) /* Dai is opened */
  52. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  53. unsigned mode;
  54. /* Driver for this DAI */
  55. struct snd_soc_dai_driver i2s_dai_drv;
  56. /* DMA parameters */
  57. struct s3c_dma_params dma_playback;
  58. struct s3c_dma_params dma_capture;
  59. struct s3c_dma_params idma_playback;
  60. u32 quirks;
  61. u32 suspend_i2smod;
  62. u32 suspend_i2scon;
  63. u32 suspend_i2spsr;
  64. };
  65. /* Lock for cross i/f checks */
  66. static DEFINE_SPINLOCK(lock);
  67. /* If this is the 'overlay' stereo DAI */
  68. static inline bool is_secondary(struct i2s_dai *i2s)
  69. {
  70. return i2s->pri_dai ? true : false;
  71. }
  72. /* If operating in SoC-Slave mode */
  73. static inline bool is_slave(struct i2s_dai *i2s)
  74. {
  75. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  76. }
  77. /* If this interface of the controller is transmitting data */
  78. static inline bool tx_active(struct i2s_dai *i2s)
  79. {
  80. u32 active;
  81. if (!i2s)
  82. return false;
  83. active = readl(i2s->addr + I2SCON);
  84. if (is_secondary(i2s))
  85. active &= CON_TXSDMA_ACTIVE;
  86. else
  87. active &= CON_TXDMA_ACTIVE;
  88. return active ? true : false;
  89. }
  90. /* If the other interface of the controller is transmitting data */
  91. static inline bool other_tx_active(struct i2s_dai *i2s)
  92. {
  93. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  94. return tx_active(other);
  95. }
  96. /* If any interface of the controller is transmitting data */
  97. static inline bool any_tx_active(struct i2s_dai *i2s)
  98. {
  99. return tx_active(i2s) || other_tx_active(i2s);
  100. }
  101. /* If this interface of the controller is receiving data */
  102. static inline bool rx_active(struct i2s_dai *i2s)
  103. {
  104. u32 active;
  105. if (!i2s)
  106. return false;
  107. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  108. return active ? true : false;
  109. }
  110. /* If the other interface of the controller is receiving data */
  111. static inline bool other_rx_active(struct i2s_dai *i2s)
  112. {
  113. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  114. return rx_active(other);
  115. }
  116. /* If any interface of the controller is receiving data */
  117. static inline bool any_rx_active(struct i2s_dai *i2s)
  118. {
  119. return rx_active(i2s) || other_rx_active(i2s);
  120. }
  121. /* If the other DAI is transmitting or receiving data */
  122. static inline bool other_active(struct i2s_dai *i2s)
  123. {
  124. return other_rx_active(i2s) || other_tx_active(i2s);
  125. }
  126. /* If this DAI is transmitting or receiving data */
  127. static inline bool this_active(struct i2s_dai *i2s)
  128. {
  129. return tx_active(i2s) || rx_active(i2s);
  130. }
  131. /* If the controller is active anyway */
  132. static inline bool any_active(struct i2s_dai *i2s)
  133. {
  134. return this_active(i2s) || other_active(i2s);
  135. }
  136. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  137. {
  138. return snd_soc_dai_get_drvdata(dai);
  139. }
  140. static inline bool is_opened(struct i2s_dai *i2s)
  141. {
  142. if (i2s && (i2s->mode & DAI_OPENED))
  143. return true;
  144. else
  145. return false;
  146. }
  147. static inline bool is_manager(struct i2s_dai *i2s)
  148. {
  149. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  150. return true;
  151. else
  152. return false;
  153. }
  154. /* Read RCLK of I2S (in multiples of LRCLK) */
  155. static inline unsigned get_rfs(struct i2s_dai *i2s)
  156. {
  157. u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3;
  158. switch (rfs) {
  159. case 3: return 768;
  160. case 2: return 384;
  161. case 1: return 512;
  162. default: return 256;
  163. }
  164. }
  165. /* Write RCLK of I2S (in multiples of LRCLK) */
  166. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  167. {
  168. u32 mod = readl(i2s->addr + I2SMOD);
  169. mod &= ~MOD_RCLK_MASK;
  170. switch (rfs) {
  171. case 768:
  172. mod |= MOD_RCLK_768FS;
  173. break;
  174. case 512:
  175. mod |= MOD_RCLK_512FS;
  176. break;
  177. case 384:
  178. mod |= MOD_RCLK_384FS;
  179. break;
  180. default:
  181. mod |= MOD_RCLK_256FS;
  182. break;
  183. }
  184. writel(mod, i2s->addr + I2SMOD);
  185. }
  186. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  187. static inline unsigned get_bfs(struct i2s_dai *i2s)
  188. {
  189. u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3;
  190. switch (bfs) {
  191. case 3: return 24;
  192. case 2: return 16;
  193. case 1: return 48;
  194. default: return 32;
  195. }
  196. }
  197. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  198. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  199. {
  200. u32 mod = readl(i2s->addr + I2SMOD);
  201. mod &= ~MOD_BCLK_MASK;
  202. switch (bfs) {
  203. case 48:
  204. mod |= MOD_BCLK_48FS;
  205. break;
  206. case 32:
  207. mod |= MOD_BCLK_32FS;
  208. break;
  209. case 24:
  210. mod |= MOD_BCLK_24FS;
  211. break;
  212. case 16:
  213. mod |= MOD_BCLK_16FS;
  214. break;
  215. default:
  216. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  217. return;
  218. }
  219. writel(mod, i2s->addr + I2SMOD);
  220. }
  221. /* Sample-Size */
  222. static inline int get_blc(struct i2s_dai *i2s)
  223. {
  224. int blc = readl(i2s->addr + I2SMOD);
  225. blc = (blc >> 13) & 0x3;
  226. switch (blc) {
  227. case 2: return 24;
  228. case 1: return 8;
  229. default: return 16;
  230. }
  231. }
  232. /* TX Channel Control */
  233. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  234. {
  235. void __iomem *addr = i2s->addr;
  236. u32 con = readl(addr + I2SCON);
  237. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  238. if (on) {
  239. con |= CON_ACTIVE;
  240. con &= ~CON_TXCH_PAUSE;
  241. if (is_secondary(i2s)) {
  242. con |= CON_TXSDMA_ACTIVE;
  243. con &= ~CON_TXSDMA_PAUSE;
  244. } else {
  245. con |= CON_TXDMA_ACTIVE;
  246. con &= ~CON_TXDMA_PAUSE;
  247. }
  248. if (any_rx_active(i2s))
  249. mod |= MOD_TXRX;
  250. else
  251. mod |= MOD_TXONLY;
  252. } else {
  253. if (is_secondary(i2s)) {
  254. con |= CON_TXSDMA_PAUSE;
  255. con &= ~CON_TXSDMA_ACTIVE;
  256. } else {
  257. con |= CON_TXDMA_PAUSE;
  258. con &= ~CON_TXDMA_ACTIVE;
  259. }
  260. if (other_tx_active(i2s)) {
  261. writel(con, addr + I2SCON);
  262. return;
  263. }
  264. con |= CON_TXCH_PAUSE;
  265. if (any_rx_active(i2s))
  266. mod |= MOD_RXONLY;
  267. else
  268. con &= ~CON_ACTIVE;
  269. }
  270. writel(mod, addr + I2SMOD);
  271. writel(con, addr + I2SCON);
  272. }
  273. /* RX Channel Control */
  274. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  275. {
  276. void __iomem *addr = i2s->addr;
  277. u32 con = readl(addr + I2SCON);
  278. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  279. if (on) {
  280. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  281. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  282. if (any_tx_active(i2s))
  283. mod |= MOD_TXRX;
  284. else
  285. mod |= MOD_RXONLY;
  286. } else {
  287. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  288. con &= ~CON_RXDMA_ACTIVE;
  289. if (any_tx_active(i2s))
  290. mod |= MOD_TXONLY;
  291. else
  292. con &= ~CON_ACTIVE;
  293. }
  294. writel(mod, addr + I2SMOD);
  295. writel(con, addr + I2SCON);
  296. }
  297. /* Flush FIFO of an interface */
  298. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  299. {
  300. void __iomem *fic;
  301. u32 val;
  302. if (!i2s)
  303. return;
  304. if (is_secondary(i2s))
  305. fic = i2s->addr + I2SFICS;
  306. else
  307. fic = i2s->addr + I2SFIC;
  308. /* Flush the FIFO */
  309. writel(readl(fic) | flush, fic);
  310. /* Be patient */
  311. val = msecs_to_loops(1) / 1000; /* 1 usec */
  312. while (--val)
  313. cpu_relax();
  314. writel(readl(fic) & ~flush, fic);
  315. }
  316. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  317. int clk_id, unsigned int rfs, int dir)
  318. {
  319. struct i2s_dai *i2s = to_info(dai);
  320. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  321. u32 mod = readl(i2s->addr + I2SMOD);
  322. switch (clk_id) {
  323. case SAMSUNG_I2S_CDCLK:
  324. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  325. if (dir == SND_SOC_CLOCK_IN)
  326. rfs = 0;
  327. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  328. (any_active(i2s) &&
  329. (((dir == SND_SOC_CLOCK_IN)
  330. && !(mod & MOD_CDCLKCON)) ||
  331. ((dir == SND_SOC_CLOCK_OUT)
  332. && (mod & MOD_CDCLKCON))))) {
  333. dev_err(&i2s->pdev->dev,
  334. "%s:%d Other DAI busy\n", __func__, __LINE__);
  335. return -EAGAIN;
  336. }
  337. if (dir == SND_SOC_CLOCK_IN)
  338. mod |= MOD_CDCLKCON;
  339. else
  340. mod &= ~MOD_CDCLKCON;
  341. i2s->rfs = rfs;
  342. break;
  343. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  344. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  345. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  346. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  347. clk_id = 0;
  348. else
  349. clk_id = 1;
  350. if (!any_active(i2s)) {
  351. if (i2s->op_clk) {
  352. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  353. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  354. clk_disable(i2s->op_clk);
  355. clk_put(i2s->op_clk);
  356. } else {
  357. i2s->rclk_srcrate =
  358. clk_get_rate(i2s->op_clk);
  359. return 0;
  360. }
  361. }
  362. i2s->op_clk = clk_get(&i2s->pdev->dev,
  363. i2s->src_clk[clk_id]);
  364. clk_enable(i2s->op_clk);
  365. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  366. /* Over-ride the other's */
  367. if (other) {
  368. other->op_clk = i2s->op_clk;
  369. other->rclk_srcrate = i2s->rclk_srcrate;
  370. }
  371. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  372. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  373. dev_err(&i2s->pdev->dev,
  374. "%s:%d Other DAI busy\n", __func__, __LINE__);
  375. return -EAGAIN;
  376. } else {
  377. /* Call can't be on the active DAI */
  378. i2s->op_clk = other->op_clk;
  379. i2s->rclk_srcrate = other->rclk_srcrate;
  380. return 0;
  381. }
  382. if (clk_id == 0)
  383. mod &= ~MOD_IMS_SYSMUX;
  384. else
  385. mod |= MOD_IMS_SYSMUX;
  386. break;
  387. default:
  388. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  389. return -EINVAL;
  390. }
  391. writel(mod, i2s->addr + I2SMOD);
  392. return 0;
  393. }
  394. static int i2s_set_fmt(struct snd_soc_dai *dai,
  395. unsigned int fmt)
  396. {
  397. struct i2s_dai *i2s = to_info(dai);
  398. u32 mod = readl(i2s->addr + I2SMOD);
  399. u32 tmp = 0;
  400. /* Format is priority */
  401. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  402. case SND_SOC_DAIFMT_RIGHT_J:
  403. tmp |= MOD_LR_RLOW;
  404. tmp |= MOD_SDF_MSB;
  405. break;
  406. case SND_SOC_DAIFMT_LEFT_J:
  407. tmp |= MOD_LR_RLOW;
  408. tmp |= MOD_SDF_LSB;
  409. break;
  410. case SND_SOC_DAIFMT_I2S:
  411. tmp |= MOD_SDF_IIS;
  412. break;
  413. default:
  414. dev_err(&i2s->pdev->dev, "Format not supported\n");
  415. return -EINVAL;
  416. }
  417. /*
  418. * INV flag is relative to the FORMAT flag - if set it simply
  419. * flips the polarity specified by the Standard
  420. */
  421. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  422. case SND_SOC_DAIFMT_NB_NF:
  423. break;
  424. case SND_SOC_DAIFMT_NB_IF:
  425. if (tmp & MOD_LR_RLOW)
  426. tmp &= ~MOD_LR_RLOW;
  427. else
  428. tmp |= MOD_LR_RLOW;
  429. break;
  430. default:
  431. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  432. return -EINVAL;
  433. }
  434. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  435. case SND_SOC_DAIFMT_CBM_CFM:
  436. tmp |= MOD_SLAVE;
  437. break;
  438. case SND_SOC_DAIFMT_CBS_CFS:
  439. /* Set default source clock in Master mode */
  440. if (i2s->rclk_srcrate == 0)
  441. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  442. 0, SND_SOC_CLOCK_IN);
  443. break;
  444. default:
  445. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  446. return -EINVAL;
  447. }
  448. if (any_active(i2s) &&
  449. ((mod & (MOD_SDF_MASK | MOD_LR_RLOW
  450. | MOD_SLAVE)) != tmp)) {
  451. dev_err(&i2s->pdev->dev,
  452. "%s:%d Other DAI busy\n", __func__, __LINE__);
  453. return -EAGAIN;
  454. }
  455. mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE);
  456. mod |= tmp;
  457. writel(mod, i2s->addr + I2SMOD);
  458. return 0;
  459. }
  460. static int i2s_hw_params(struct snd_pcm_substream *substream,
  461. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  462. {
  463. struct i2s_dai *i2s = to_info(dai);
  464. u32 mod = readl(i2s->addr + I2SMOD);
  465. if (!is_secondary(i2s))
  466. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  467. switch (params_channels(params)) {
  468. case 6:
  469. mod |= MOD_DC2_EN;
  470. case 4:
  471. mod |= MOD_DC1_EN;
  472. break;
  473. case 2:
  474. break;
  475. default:
  476. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  477. params_channels(params));
  478. return -EINVAL;
  479. }
  480. if (is_secondary(i2s))
  481. mod &= ~MOD_BLCS_MASK;
  482. else
  483. mod &= ~MOD_BLCP_MASK;
  484. if (is_manager(i2s))
  485. mod &= ~MOD_BLC_MASK;
  486. switch (params_format(params)) {
  487. case SNDRV_PCM_FORMAT_S8:
  488. if (is_secondary(i2s))
  489. mod |= MOD_BLCS_8BIT;
  490. else
  491. mod |= MOD_BLCP_8BIT;
  492. if (is_manager(i2s))
  493. mod |= MOD_BLC_8BIT;
  494. break;
  495. case SNDRV_PCM_FORMAT_S16_LE:
  496. if (is_secondary(i2s))
  497. mod |= MOD_BLCS_16BIT;
  498. else
  499. mod |= MOD_BLCP_16BIT;
  500. if (is_manager(i2s))
  501. mod |= MOD_BLC_16BIT;
  502. break;
  503. case SNDRV_PCM_FORMAT_S24_LE:
  504. if (is_secondary(i2s))
  505. mod |= MOD_BLCS_24BIT;
  506. else
  507. mod |= MOD_BLCP_24BIT;
  508. if (is_manager(i2s))
  509. mod |= MOD_BLC_24BIT;
  510. break;
  511. default:
  512. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  513. params_format(params));
  514. return -EINVAL;
  515. }
  516. writel(mod, i2s->addr + I2SMOD);
  517. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  518. snd_soc_dai_set_dma_data(dai, substream,
  519. (void *)&i2s->dma_playback);
  520. else
  521. snd_soc_dai_set_dma_data(dai, substream,
  522. (void *)&i2s->dma_capture);
  523. i2s->frmclk = params_rate(params);
  524. return 0;
  525. }
  526. /* We set constraints on the substream acc to the version of I2S */
  527. static int i2s_startup(struct snd_pcm_substream *substream,
  528. struct snd_soc_dai *dai)
  529. {
  530. struct i2s_dai *i2s = to_info(dai);
  531. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  532. unsigned long flags;
  533. spin_lock_irqsave(&lock, flags);
  534. i2s->mode |= DAI_OPENED;
  535. if (is_manager(other))
  536. i2s->mode &= ~DAI_MANAGER;
  537. else
  538. i2s->mode |= DAI_MANAGER;
  539. /* Enforce set_sysclk in Master mode */
  540. i2s->rclk_srcrate = 0;
  541. spin_unlock_irqrestore(&lock, flags);
  542. return 0;
  543. }
  544. static void i2s_shutdown(struct snd_pcm_substream *substream,
  545. struct snd_soc_dai *dai)
  546. {
  547. struct i2s_dai *i2s = to_info(dai);
  548. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  549. unsigned long flags;
  550. spin_lock_irqsave(&lock, flags);
  551. i2s->mode &= ~DAI_OPENED;
  552. i2s->mode &= ~DAI_MANAGER;
  553. if (is_opened(other))
  554. other->mode |= DAI_MANAGER;
  555. /* Reset any constraint on RFS and BFS */
  556. i2s->rfs = 0;
  557. i2s->bfs = 0;
  558. spin_unlock_irqrestore(&lock, flags);
  559. /* Gate CDCLK by default */
  560. if (!is_opened(other))
  561. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  562. 0, SND_SOC_CLOCK_IN);
  563. }
  564. static int config_setup(struct i2s_dai *i2s)
  565. {
  566. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  567. unsigned rfs, bfs, blc;
  568. u32 psr;
  569. blc = get_blc(i2s);
  570. bfs = i2s->bfs;
  571. if (!bfs && other)
  572. bfs = other->bfs;
  573. /* Select least possible multiple(2) if no constraint set */
  574. if (!bfs)
  575. bfs = blc * 2;
  576. rfs = i2s->rfs;
  577. if (!rfs && other)
  578. rfs = other->rfs;
  579. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  580. dev_err(&i2s->pdev->dev,
  581. "%d-RFS not supported for 24-blc\n", rfs);
  582. return -EINVAL;
  583. }
  584. if (!rfs) {
  585. if (bfs == 16 || bfs == 32)
  586. rfs = 256;
  587. else
  588. rfs = 384;
  589. }
  590. /* If already setup and running */
  591. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  592. dev_err(&i2s->pdev->dev,
  593. "%s:%d Other DAI busy\n", __func__, __LINE__);
  594. return -EAGAIN;
  595. }
  596. /* Don't bother RFS, BFS & PSR in Slave mode */
  597. if (is_slave(i2s))
  598. return 0;
  599. set_bfs(i2s, bfs);
  600. set_rfs(i2s, rfs);
  601. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  602. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  603. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  604. dev_dbg(&i2s->pdev->dev,
  605. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  606. i2s->rclk_srcrate, psr, rfs, bfs);
  607. }
  608. return 0;
  609. }
  610. static int i2s_trigger(struct snd_pcm_substream *substream,
  611. int cmd, struct snd_soc_dai *dai)
  612. {
  613. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  614. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  615. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  616. unsigned long flags;
  617. switch (cmd) {
  618. case SNDRV_PCM_TRIGGER_START:
  619. case SNDRV_PCM_TRIGGER_RESUME:
  620. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  621. local_irq_save(flags);
  622. if (config_setup(i2s)) {
  623. local_irq_restore(flags);
  624. return -EINVAL;
  625. }
  626. if (capture)
  627. i2s_rxctrl(i2s, 1);
  628. else
  629. i2s_txctrl(i2s, 1);
  630. local_irq_restore(flags);
  631. break;
  632. case SNDRV_PCM_TRIGGER_STOP:
  633. case SNDRV_PCM_TRIGGER_SUSPEND:
  634. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  635. local_irq_save(flags);
  636. if (capture)
  637. i2s_rxctrl(i2s, 0);
  638. else
  639. i2s_txctrl(i2s, 0);
  640. if (capture)
  641. i2s_fifo(i2s, FIC_RXFLUSH);
  642. else
  643. i2s_fifo(i2s, FIC_TXFLUSH);
  644. local_irq_restore(flags);
  645. break;
  646. }
  647. return 0;
  648. }
  649. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  650. int div_id, int div)
  651. {
  652. struct i2s_dai *i2s = to_info(dai);
  653. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  654. switch (div_id) {
  655. case SAMSUNG_I2S_DIV_BCLK:
  656. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  657. || (other && other->bfs && (other->bfs != div))) {
  658. dev_err(&i2s->pdev->dev,
  659. "%s:%d Other DAI busy\n", __func__, __LINE__);
  660. return -EAGAIN;
  661. }
  662. i2s->bfs = div;
  663. break;
  664. default:
  665. dev_err(&i2s->pdev->dev,
  666. "Invalid clock divider(%d)\n", div_id);
  667. return -EINVAL;
  668. }
  669. return 0;
  670. }
  671. static snd_pcm_sframes_t
  672. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  673. {
  674. struct i2s_dai *i2s = to_info(dai);
  675. u32 reg = readl(i2s->addr + I2SFIC);
  676. snd_pcm_sframes_t delay;
  677. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  678. delay = FIC_RXCOUNT(reg);
  679. else if (is_secondary(i2s))
  680. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  681. else
  682. delay = FIC_TXCOUNT(reg);
  683. return delay;
  684. }
  685. #ifdef CONFIG_PM
  686. static int i2s_suspend(struct snd_soc_dai *dai)
  687. {
  688. struct i2s_dai *i2s = to_info(dai);
  689. if (dai->active) {
  690. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  691. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  692. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  693. }
  694. return 0;
  695. }
  696. static int i2s_resume(struct snd_soc_dai *dai)
  697. {
  698. struct i2s_dai *i2s = to_info(dai);
  699. if (dai->active) {
  700. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  701. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  702. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  703. }
  704. return 0;
  705. }
  706. #else
  707. #define i2s_suspend NULL
  708. #define i2s_resume NULL
  709. #endif
  710. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  711. {
  712. struct i2s_dai *i2s = to_info(dai);
  713. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  714. if (other && other->clk) /* If this is probe on secondary */
  715. goto probe_exit;
  716. i2s->addr = ioremap(i2s->base, 0x100);
  717. if (i2s->addr == NULL) {
  718. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  719. return -ENXIO;
  720. }
  721. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  722. if (IS_ERR(i2s->clk)) {
  723. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  724. iounmap(i2s->addr);
  725. return -ENOENT;
  726. }
  727. clk_enable(i2s->clk);
  728. if (other) {
  729. other->addr = i2s->addr;
  730. other->clk = i2s->clk;
  731. }
  732. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  733. writel(CON_RSTCLR, i2s->addr + I2SCON);
  734. if (i2s->quirks & QUIRK_SEC_DAI)
  735. idma_reg_addr_init((void *)i2s->addr,
  736. i2s->sec_dai->idma_playback.dma_addr);
  737. probe_exit:
  738. /* Reset any constraint on RFS and BFS */
  739. i2s->rfs = 0;
  740. i2s->bfs = 0;
  741. i2s_txctrl(i2s, 0);
  742. i2s_rxctrl(i2s, 0);
  743. i2s_fifo(i2s, FIC_TXFLUSH);
  744. i2s_fifo(other, FIC_TXFLUSH);
  745. i2s_fifo(i2s, FIC_RXFLUSH);
  746. /* Gate CDCLK by default */
  747. if (!is_opened(other))
  748. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  749. 0, SND_SOC_CLOCK_IN);
  750. return 0;
  751. }
  752. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  753. {
  754. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  755. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  756. if (!other || !other->clk) {
  757. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  758. writel(0, i2s->addr + I2SCON);
  759. clk_disable(i2s->clk);
  760. clk_put(i2s->clk);
  761. iounmap(i2s->addr);
  762. }
  763. i2s->clk = NULL;
  764. return 0;
  765. }
  766. static struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  767. .trigger = i2s_trigger,
  768. .hw_params = i2s_hw_params,
  769. .set_fmt = i2s_set_fmt,
  770. .set_clkdiv = i2s_set_clkdiv,
  771. .set_sysclk = i2s_set_sysclk,
  772. .startup = i2s_startup,
  773. .shutdown = i2s_shutdown,
  774. .delay = i2s_delay,
  775. };
  776. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  777. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  778. SNDRV_PCM_FMTBIT_S16_LE | \
  779. SNDRV_PCM_FMTBIT_S24_LE)
  780. static __devinit
  781. struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  782. {
  783. struct i2s_dai *i2s;
  784. i2s = kzalloc(sizeof(struct i2s_dai), GFP_KERNEL);
  785. if (i2s == NULL)
  786. return NULL;
  787. i2s->pdev = pdev;
  788. i2s->pri_dai = NULL;
  789. i2s->sec_dai = NULL;
  790. i2s->i2s_dai_drv.symmetric_rates = 1;
  791. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  792. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  793. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  794. i2s->i2s_dai_drv.suspend = i2s_suspend;
  795. i2s->i2s_dai_drv.resume = i2s_resume;
  796. i2s->i2s_dai_drv.playback.channels_min = 2;
  797. i2s->i2s_dai_drv.playback.channels_max = 2;
  798. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  799. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  800. if (!sec) {
  801. i2s->i2s_dai_drv.capture.channels_min = 2;
  802. i2s->i2s_dai_drv.capture.channels_max = 2;
  803. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  804. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  805. } else { /* Create a new platform_device for Secondary */
  806. i2s->pdev = platform_device_register_resndata(NULL,
  807. pdev->name, pdev->id + SAMSUNG_I2S_SECOFF,
  808. NULL, 0, NULL, 0);
  809. if (IS_ERR(i2s->pdev)) {
  810. kfree(i2s);
  811. return NULL;
  812. }
  813. }
  814. /* Pre-assign snd_soc_dai_set_drvdata */
  815. dev_set_drvdata(&i2s->pdev->dev, i2s);
  816. return i2s;
  817. }
  818. static __devinit int samsung_i2s_probe(struct platform_device *pdev)
  819. {
  820. u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan;
  821. struct i2s_dai *pri_dai, *sec_dai = NULL;
  822. struct s3c_audio_pdata *i2s_pdata;
  823. struct samsung_i2s *i2s_cfg;
  824. struct resource *res;
  825. u32 regs_base, quirks;
  826. int ret = 0;
  827. /* Call during Seconday interface registration */
  828. if (pdev->id >= SAMSUNG_I2S_SECOFF) {
  829. sec_dai = dev_get_drvdata(&pdev->dev);
  830. snd_soc_register_dai(&sec_dai->pdev->dev,
  831. &sec_dai->i2s_dai_drv);
  832. return 0;
  833. }
  834. i2s_pdata = pdev->dev.platform_data;
  835. if (i2s_pdata == NULL) {
  836. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  837. return -EINVAL;
  838. }
  839. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  840. if (!res) {
  841. dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n");
  842. return -ENXIO;
  843. }
  844. dma_pl_chan = res->start;
  845. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  846. if (!res) {
  847. dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n");
  848. return -ENXIO;
  849. }
  850. dma_cp_chan = res->start;
  851. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  852. if (res)
  853. dma_pl_sec_chan = res->start;
  854. else
  855. dma_pl_sec_chan = 0;
  856. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  857. if (!res) {
  858. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  859. return -ENXIO;
  860. }
  861. if (!request_mem_region(res->start, resource_size(res),
  862. "samsung-i2s")) {
  863. dev_err(&pdev->dev, "Unable to request SFR region\n");
  864. return -EBUSY;
  865. }
  866. regs_base = res->start;
  867. i2s_cfg = &i2s_pdata->type.i2s;
  868. quirks = i2s_cfg->quirks;
  869. pri_dai = i2s_alloc_dai(pdev, false);
  870. if (!pri_dai) {
  871. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  872. ret = -ENOMEM;
  873. goto err1;
  874. }
  875. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  876. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  877. pri_dai->dma_playback.client =
  878. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  879. pri_dai->dma_capture.client =
  880. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  881. pri_dai->dma_playback.channel = dma_pl_chan;
  882. pri_dai->dma_capture.channel = dma_cp_chan;
  883. pri_dai->src_clk = i2s_cfg->src_clk;
  884. pri_dai->dma_playback.dma_size = 4;
  885. pri_dai->dma_capture.dma_size = 4;
  886. pri_dai->base = regs_base;
  887. pri_dai->quirks = quirks;
  888. if (quirks & QUIRK_PRI_6CHAN)
  889. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  890. if (quirks & QUIRK_SEC_DAI) {
  891. sec_dai = i2s_alloc_dai(pdev, true);
  892. if (!sec_dai) {
  893. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  894. ret = -ENOMEM;
  895. goto err2;
  896. }
  897. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  898. sec_dai->dma_playback.client =
  899. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  900. /* Use iDMA always if SysDMA not provided */
  901. sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1;
  902. sec_dai->src_clk = i2s_cfg->src_clk;
  903. sec_dai->dma_playback.dma_size = 4;
  904. sec_dai->base = regs_base;
  905. sec_dai->quirks = quirks;
  906. sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr;
  907. sec_dai->pri_dai = pri_dai;
  908. pri_dai->sec_dai = sec_dai;
  909. }
  910. if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  911. dev_err(&pdev->dev, "Unable to configure gpio\n");
  912. ret = -EINVAL;
  913. goto err3;
  914. }
  915. snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv);
  916. return 0;
  917. err3:
  918. kfree(sec_dai);
  919. err2:
  920. kfree(pri_dai);
  921. err1:
  922. release_mem_region(regs_base, resource_size(res));
  923. return ret;
  924. }
  925. static __devexit int samsung_i2s_remove(struct platform_device *pdev)
  926. {
  927. struct i2s_dai *i2s, *other;
  928. i2s = dev_get_drvdata(&pdev->dev);
  929. other = i2s->pri_dai ? : i2s->sec_dai;
  930. if (other) {
  931. other->pri_dai = NULL;
  932. other->sec_dai = NULL;
  933. } else {
  934. struct resource *res;
  935. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  936. if (res)
  937. release_mem_region(res->start, resource_size(res));
  938. }
  939. i2s->pri_dai = NULL;
  940. i2s->sec_dai = NULL;
  941. kfree(i2s);
  942. snd_soc_unregister_dai(&pdev->dev);
  943. return 0;
  944. }
  945. static struct platform_driver samsung_i2s_driver = {
  946. .probe = samsung_i2s_probe,
  947. .remove = __devexit_p(samsung_i2s_remove),
  948. .driver = {
  949. .name = "samsung-i2s",
  950. .owner = THIS_MODULE,
  951. },
  952. };
  953. static int __init samsung_i2s_init(void)
  954. {
  955. return platform_driver_register(&samsung_i2s_driver);
  956. }
  957. module_init(samsung_i2s_init);
  958. static void __exit samsung_i2s_exit(void)
  959. {
  960. platform_driver_unregister(&samsung_i2s_driver);
  961. }
  962. module_exit(samsung_i2s_exit);
  963. /* Module information */
  964. MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
  965. MODULE_DESCRIPTION("Samsung I2S Interface");
  966. MODULE_ALIAS("platform:samsung-i2s");
  967. MODULE_LICENSE("GPL");