wm8737.c 19 KB

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  1. /*
  2. * wm8737.c -- WM8737 ALSA SoC Audio driver
  3. *
  4. * Copyright 2010 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/pm.h>
  17. #include <linux/i2c.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/regulator/consumer.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/slab.h>
  22. #include <linux/of_device.h>
  23. #include <sound/core.h>
  24. #include <sound/pcm.h>
  25. #include <sound/pcm_params.h>
  26. #include <sound/soc.h>
  27. #include <sound/soc-dapm.h>
  28. #include <sound/initval.h>
  29. #include <sound/tlv.h>
  30. #include "wm8737.h"
  31. #define WM8737_NUM_SUPPLIES 4
  32. static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = {
  33. "DCVDD",
  34. "DBVDD",
  35. "AVDD",
  36. "MVDD",
  37. };
  38. /* codec private data */
  39. struct wm8737_priv {
  40. enum snd_soc_control_type control_type;
  41. struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
  42. unsigned int mclk;
  43. };
  44. static const u16 wm8737_reg[WM8737_REGISTER_COUNT] = {
  45. 0x00C3, /* R0 - Left PGA volume */
  46. 0x00C3, /* R1 - Right PGA volume */
  47. 0x0007, /* R2 - AUDIO path L */
  48. 0x0007, /* R3 - AUDIO path R */
  49. 0x0000, /* R4 - 3D Enhance */
  50. 0x0000, /* R5 - ADC Control */
  51. 0x0000, /* R6 - Power Management */
  52. 0x000A, /* R7 - Audio Format */
  53. 0x0000, /* R8 - Clocking */
  54. 0x000F, /* R9 - MIC Preamp Control */
  55. 0x0003, /* R10 - Misc Bias Control */
  56. 0x0000, /* R11 - Noise Gate */
  57. 0x007C, /* R12 - ALC1 */
  58. 0x0000, /* R13 - ALC2 */
  59. 0x0032, /* R14 - ALC3 */
  60. };
  61. static int wm8737_reset(struct snd_soc_codec *codec)
  62. {
  63. return snd_soc_write(codec, WM8737_RESET, 0);
  64. }
  65. static const unsigned int micboost_tlv[] = {
  66. TLV_DB_RANGE_HEAD(4),
  67. 0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0),
  68. 1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0),
  69. 2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0),
  70. 3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0),
  71. };
  72. static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1);
  73. static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0);
  74. static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0);
  75. static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0);
  76. static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0);
  77. static const char *micbias_enum_text[] = {
  78. "25%",
  79. "50%",
  80. "75%",
  81. "100%",
  82. };
  83. static const struct soc_enum micbias_enum =
  84. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 0, 4, micbias_enum_text);
  85. static const char *low_cutoff_text[] = {
  86. "Low", "High"
  87. };
  88. static const struct soc_enum low_3d =
  89. SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 6, 2, low_cutoff_text);
  90. static const char *high_cutoff_text[] = {
  91. "High", "Low"
  92. };
  93. static const struct soc_enum high_3d =
  94. SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 5, 2, high_cutoff_text);
  95. static const char *alc_fn_text[] = {
  96. "Disabled", "Right", "Left", "Stereo"
  97. };
  98. static const struct soc_enum alc_fn =
  99. SOC_ENUM_SINGLE(WM8737_ALC1, 7, 4, alc_fn_text);
  100. static const char *alc_hold_text[] = {
  101. "0", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms",
  102. "170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s",
  103. "10.916s", "21.832s", "43.691s"
  104. };
  105. static const struct soc_enum alc_hold =
  106. SOC_ENUM_SINGLE(WM8737_ALC2, 0, 16, alc_hold_text);
  107. static const char *alc_atk_text[] = {
  108. "8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms",
  109. "1.075s", "2.15s", "4.3s", "8.6s"
  110. };
  111. static const struct soc_enum alc_atk =
  112. SOC_ENUM_SINGLE(WM8737_ALC3, 0, 11, alc_atk_text);
  113. static const char *alc_dcy_text[] = {
  114. "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s",
  115. "4.3s", "8.6s", "17.2s", "34.41s"
  116. };
  117. static const struct soc_enum alc_dcy =
  118. SOC_ENUM_SINGLE(WM8737_ALC3, 4, 11, alc_dcy_text);
  119. static const struct snd_kcontrol_new wm8737_snd_controls[] = {
  120. SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  121. 6, 3, 0, micboost_tlv),
  122. SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  123. 4, 1, 0),
  124. SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  125. 3, 1, 0),
  126. SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME,
  127. WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv),
  128. SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  129. 2, 1, 0),
  130. SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0),
  131. SOC_ENUM("Mic PGA Bias", micbias_enum),
  132. SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0),
  133. SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1),
  134. SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0),
  135. SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0),
  136. SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0),
  137. SOC_ENUM("3D Low Cut-off", low_3d),
  138. SOC_ENUM("3D High Cut-off", low_3d),
  139. SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv),
  140. SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0),
  141. SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0,
  142. ng_tlv),
  143. SOC_ENUM("ALC", alc_fn),
  144. SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv),
  145. SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv),
  146. SOC_ENUM("ALC Hold Time", alc_hold),
  147. SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0),
  148. SOC_ENUM("ALC Attack Time", alc_atk),
  149. SOC_ENUM("ALC Decay Time", alc_dcy),
  150. };
  151. static const char *linsel_text[] = {
  152. "LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC",
  153. };
  154. static const struct soc_enum linsel_enum =
  155. SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_L, 7, 4, linsel_text);
  156. static const struct snd_kcontrol_new linsel_mux =
  157. SOC_DAPM_ENUM("LINSEL", linsel_enum);
  158. static const char *rinsel_text[] = {
  159. "RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC",
  160. };
  161. static const struct soc_enum rinsel_enum =
  162. SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_R, 7, 4, rinsel_text);
  163. static const struct snd_kcontrol_new rinsel_mux =
  164. SOC_DAPM_ENUM("RINSEL", rinsel_enum);
  165. static const char *bypass_text[] = {
  166. "Direct", "Preamp"
  167. };
  168. static const struct soc_enum lbypass_enum =
  169. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 2, 2, bypass_text);
  170. static const struct snd_kcontrol_new lbypass_mux =
  171. SOC_DAPM_ENUM("Left Bypass", lbypass_enum);
  172. static const struct soc_enum rbypass_enum =
  173. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 3, 2, bypass_text);
  174. static const struct snd_kcontrol_new rbypass_mux =
  175. SOC_DAPM_ENUM("Left Bypass", rbypass_enum);
  176. static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = {
  177. SND_SOC_DAPM_INPUT("LINPUT1"),
  178. SND_SOC_DAPM_INPUT("LINPUT2"),
  179. SND_SOC_DAPM_INPUT("LINPUT3"),
  180. SND_SOC_DAPM_INPUT("RINPUT1"),
  181. SND_SOC_DAPM_INPUT("RINPUT2"),
  182. SND_SOC_DAPM_INPUT("RINPUT3"),
  183. SND_SOC_DAPM_INPUT("LACIN"),
  184. SND_SOC_DAPM_INPUT("RACIN"),
  185. SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux),
  186. SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux),
  187. SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux),
  188. SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux),
  189. SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0),
  190. SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0),
  191. SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0),
  192. SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0),
  193. SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0),
  194. };
  195. static const struct snd_soc_dapm_route intercon[] = {
  196. { "LINSEL", "LINPUT1", "LINPUT1" },
  197. { "LINSEL", "LINPUT2", "LINPUT2" },
  198. { "LINSEL", "LINPUT3", "LINPUT3" },
  199. { "LINSEL", "LINPUT1 DC", "LINPUT1" },
  200. { "RINSEL", "RINPUT1", "RINPUT1" },
  201. { "RINSEL", "RINPUT2", "RINPUT2" },
  202. { "RINSEL", "RINPUT3", "RINPUT3" },
  203. { "RINSEL", "RINPUT1 DC", "RINPUT1" },
  204. { "Left Preamp Mux", "Preamp", "LINSEL" },
  205. { "Left Preamp Mux", "Direct", "LACIN" },
  206. { "Right Preamp Mux", "Preamp", "RINSEL" },
  207. { "Right Preamp Mux", "Direct", "RACIN" },
  208. { "PGAL", NULL, "Left Preamp Mux" },
  209. { "PGAR", NULL, "Right Preamp Mux" },
  210. { "ADCL", NULL, "PGAL" },
  211. { "ADCR", NULL, "PGAR" },
  212. { "AIF", NULL, "ADCL" },
  213. { "AIF", NULL, "ADCR" },
  214. };
  215. static int wm8737_add_widgets(struct snd_soc_codec *codec)
  216. {
  217. struct snd_soc_dapm_context *dapm = &codec->dapm;
  218. snd_soc_dapm_new_controls(dapm, wm8737_dapm_widgets,
  219. ARRAY_SIZE(wm8737_dapm_widgets));
  220. snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
  221. return 0;
  222. }
  223. /* codec mclk clock divider coefficients */
  224. static const struct {
  225. u32 mclk;
  226. u32 rate;
  227. u8 usb;
  228. u8 sr;
  229. } coeff_div[] = {
  230. { 12288000, 8000, 0, 0x4 },
  231. { 12288000, 12000, 0, 0x8 },
  232. { 12288000, 16000, 0, 0xa },
  233. { 12288000, 24000, 0, 0x1c },
  234. { 12288000, 32000, 0, 0xc },
  235. { 12288000, 48000, 0, 0 },
  236. { 12288000, 96000, 0, 0xe },
  237. { 11289600, 8000, 0, 0x14 },
  238. { 11289600, 11025, 0, 0x18 },
  239. { 11289600, 22050, 0, 0x1a },
  240. { 11289600, 44100, 0, 0x10 },
  241. { 11289600, 88200, 0, 0x1e },
  242. { 18432000, 8000, 0, 0x5 },
  243. { 18432000, 12000, 0, 0x9 },
  244. { 18432000, 16000, 0, 0xb },
  245. { 18432000, 24000, 0, 0x1b },
  246. { 18432000, 32000, 0, 0xd },
  247. { 18432000, 48000, 0, 0x1 },
  248. { 18432000, 96000, 0, 0x1f },
  249. { 16934400, 8000, 0, 0x15 },
  250. { 16934400, 11025, 0, 0x19 },
  251. { 16934400, 22050, 0, 0x1b },
  252. { 16934400, 44100, 0, 0x11 },
  253. { 16934400, 88200, 0, 0x1f },
  254. { 12000000, 8000, 1, 0x4 },
  255. { 12000000, 11025, 1, 0x19 },
  256. { 12000000, 12000, 1, 0x8 },
  257. { 12000000, 16000, 1, 0xa },
  258. { 12000000, 22050, 1, 0x1b },
  259. { 12000000, 24000, 1, 0x1c },
  260. { 12000000, 32000, 1, 0xc },
  261. { 12000000, 44100, 1, 0x11 },
  262. { 12000000, 48000, 1, 0x0 },
  263. { 12000000, 88200, 1, 0x1f },
  264. { 12000000, 96000, 1, 0xe },
  265. };
  266. static int wm8737_hw_params(struct snd_pcm_substream *substream,
  267. struct snd_pcm_hw_params *params,
  268. struct snd_soc_dai *dai)
  269. {
  270. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  271. struct snd_soc_codec *codec = rtd->codec;
  272. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  273. int i;
  274. u16 clocking = 0;
  275. u16 af = 0;
  276. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  277. if (coeff_div[i].rate != params_rate(params))
  278. continue;
  279. if (coeff_div[i].mclk == wm8737->mclk)
  280. break;
  281. if (coeff_div[i].mclk == wm8737->mclk * 2) {
  282. clocking |= WM8737_CLKDIV2;
  283. break;
  284. }
  285. }
  286. if (i == ARRAY_SIZE(coeff_div)) {
  287. dev_err(codec->dev, "%dHz MCLK can't support %dHz\n",
  288. wm8737->mclk, params_rate(params));
  289. return -EINVAL;
  290. }
  291. clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT);
  292. switch (params_format(params)) {
  293. case SNDRV_PCM_FORMAT_S16_LE:
  294. break;
  295. case SNDRV_PCM_FORMAT_S20_3LE:
  296. af |= 0x8;
  297. break;
  298. case SNDRV_PCM_FORMAT_S24_LE:
  299. af |= 0x10;
  300. break;
  301. case SNDRV_PCM_FORMAT_S32_LE:
  302. af |= 0x18;
  303. break;
  304. default:
  305. return -EINVAL;
  306. }
  307. snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af);
  308. snd_soc_update_bits(codec, WM8737_CLOCKING,
  309. WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK,
  310. clocking);
  311. return 0;
  312. }
  313. static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  314. int clk_id, unsigned int freq, int dir)
  315. {
  316. struct snd_soc_codec *codec = codec_dai->codec;
  317. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  318. int i;
  319. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  320. if (freq == coeff_div[i].mclk ||
  321. freq == coeff_div[i].mclk * 2) {
  322. wm8737->mclk = freq;
  323. return 0;
  324. }
  325. }
  326. dev_err(codec->dev, "MCLK rate %dHz not supported\n", freq);
  327. return -EINVAL;
  328. }
  329. static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai,
  330. unsigned int fmt)
  331. {
  332. struct snd_soc_codec *codec = codec_dai->codec;
  333. u16 af = 0;
  334. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  335. case SND_SOC_DAIFMT_CBM_CFM:
  336. af |= WM8737_MS;
  337. break;
  338. case SND_SOC_DAIFMT_CBS_CFS:
  339. break;
  340. default:
  341. return -EINVAL;
  342. }
  343. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  344. case SND_SOC_DAIFMT_I2S:
  345. af |= 0x2;
  346. break;
  347. case SND_SOC_DAIFMT_RIGHT_J:
  348. break;
  349. case SND_SOC_DAIFMT_LEFT_J:
  350. af |= 0x1;
  351. break;
  352. case SND_SOC_DAIFMT_DSP_A:
  353. af |= 0x3;
  354. break;
  355. case SND_SOC_DAIFMT_DSP_B:
  356. af |= 0x13;
  357. break;
  358. default:
  359. return -EINVAL;
  360. }
  361. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  362. case SND_SOC_DAIFMT_NB_NF:
  363. break;
  364. case SND_SOC_DAIFMT_NB_IF:
  365. af |= WM8737_LRP;
  366. break;
  367. default:
  368. return -EINVAL;
  369. }
  370. snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT,
  371. WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af);
  372. return 0;
  373. }
  374. static int wm8737_set_bias_level(struct snd_soc_codec *codec,
  375. enum snd_soc_bias_level level)
  376. {
  377. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  378. int ret;
  379. switch (level) {
  380. case SND_SOC_BIAS_ON:
  381. break;
  382. case SND_SOC_BIAS_PREPARE:
  383. /* VMID at 2*75k */
  384. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  385. WM8737_VMIDSEL_MASK, 0);
  386. break;
  387. case SND_SOC_BIAS_STANDBY:
  388. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  389. ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
  390. wm8737->supplies);
  391. if (ret != 0) {
  392. dev_err(codec->dev,
  393. "Failed to enable supplies: %d\n",
  394. ret);
  395. return ret;
  396. }
  397. snd_soc_cache_sync(codec);
  398. /* Fast VMID ramp at 2*2.5k */
  399. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  400. WM8737_VMIDSEL_MASK, 0x4);
  401. /* Bring VMID up */
  402. snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
  403. WM8737_VMID_MASK |
  404. WM8737_VREF_MASK,
  405. WM8737_VMID_MASK |
  406. WM8737_VREF_MASK);
  407. msleep(500);
  408. }
  409. /* VMID at 2*300k */
  410. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  411. WM8737_VMIDSEL_MASK, 2);
  412. break;
  413. case SND_SOC_BIAS_OFF:
  414. snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
  415. WM8737_VMID_MASK | WM8737_VREF_MASK, 0);
  416. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies),
  417. wm8737->supplies);
  418. break;
  419. }
  420. codec->dapm.bias_level = level;
  421. return 0;
  422. }
  423. #define WM8737_RATES SNDRV_PCM_RATE_8000_96000
  424. #define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  425. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  426. static struct snd_soc_dai_ops wm8737_dai_ops = {
  427. .hw_params = wm8737_hw_params,
  428. .set_sysclk = wm8737_set_dai_sysclk,
  429. .set_fmt = wm8737_set_dai_fmt,
  430. };
  431. static struct snd_soc_dai_driver wm8737_dai = {
  432. .name = "wm8737",
  433. .capture = {
  434. .stream_name = "Capture",
  435. .channels_min = 2, /* Mono modes not yet supported */
  436. .channels_max = 2,
  437. .rates = WM8737_RATES,
  438. .formats = WM8737_FORMATS,
  439. },
  440. .ops = &wm8737_dai_ops,
  441. };
  442. #ifdef CONFIG_PM
  443. static int wm8737_suspend(struct snd_soc_codec *codec, pm_message_t state)
  444. {
  445. wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
  446. return 0;
  447. }
  448. static int wm8737_resume(struct snd_soc_codec *codec)
  449. {
  450. wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  451. return 0;
  452. }
  453. #else
  454. #define wm8737_suspend NULL
  455. #define wm8737_resume NULL
  456. #endif
  457. static int wm8737_probe(struct snd_soc_codec *codec)
  458. {
  459. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  460. int ret, i;
  461. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8737->control_type);
  462. if (ret != 0) {
  463. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  464. return ret;
  465. }
  466. for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
  467. wm8737->supplies[i].supply = wm8737_supply_names[i];
  468. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8737->supplies),
  469. wm8737->supplies);
  470. if (ret != 0) {
  471. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  472. return ret;
  473. }
  474. ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
  475. wm8737->supplies);
  476. if (ret != 0) {
  477. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  478. goto err_get;
  479. }
  480. ret = wm8737_reset(codec);
  481. if (ret < 0) {
  482. dev_err(codec->dev, "Failed to issue reset\n");
  483. goto err_enable;
  484. }
  485. snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
  486. WM8737_LVU);
  487. snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
  488. WM8737_RVU);
  489. wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  490. /* Bias level configuration will have done an extra enable */
  491. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  492. snd_soc_add_controls(codec, wm8737_snd_controls,
  493. ARRAY_SIZE(wm8737_snd_controls));
  494. wm8737_add_widgets(codec);
  495. return 0;
  496. err_enable:
  497. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  498. err_get:
  499. regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  500. return ret;
  501. }
  502. static int wm8737_remove(struct snd_soc_codec *codec)
  503. {
  504. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  505. wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
  506. regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  507. return 0;
  508. }
  509. static struct snd_soc_codec_driver soc_codec_dev_wm8737 = {
  510. .probe = wm8737_probe,
  511. .remove = wm8737_remove,
  512. .suspend = wm8737_suspend,
  513. .resume = wm8737_resume,
  514. .set_bias_level = wm8737_set_bias_level,
  515. .reg_cache_size = WM8737_REGISTER_COUNT - 1, /* Skip reset */
  516. .reg_word_size = sizeof(u16),
  517. .reg_cache_default = wm8737_reg,
  518. };
  519. static const struct of_device_id wm8737_of_match[] = {
  520. { .compatible = "wlf,wm8737", },
  521. { }
  522. };
  523. MODULE_DEVICE_TABLE(of, wm8737_of_match);
  524. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  525. static __devinit int wm8737_i2c_probe(struct i2c_client *i2c,
  526. const struct i2c_device_id *id)
  527. {
  528. struct wm8737_priv *wm8737;
  529. int ret;
  530. wm8737 = kzalloc(sizeof(struct wm8737_priv), GFP_KERNEL);
  531. if (wm8737 == NULL)
  532. return -ENOMEM;
  533. i2c_set_clientdata(i2c, wm8737);
  534. wm8737->control_type = SND_SOC_I2C;
  535. ret = snd_soc_register_codec(&i2c->dev,
  536. &soc_codec_dev_wm8737, &wm8737_dai, 1);
  537. if (ret < 0)
  538. kfree(wm8737);
  539. return ret;
  540. }
  541. static __devexit int wm8737_i2c_remove(struct i2c_client *client)
  542. {
  543. snd_soc_unregister_codec(&client->dev);
  544. kfree(i2c_get_clientdata(client));
  545. return 0;
  546. }
  547. static const struct i2c_device_id wm8737_i2c_id[] = {
  548. { "wm8737", 0 },
  549. { }
  550. };
  551. MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id);
  552. static struct i2c_driver wm8737_i2c_driver = {
  553. .driver = {
  554. .name = "wm8737",
  555. .owner = THIS_MODULE,
  556. .of_match_table = wm8737_of_match,
  557. },
  558. .probe = wm8737_i2c_probe,
  559. .remove = __devexit_p(wm8737_i2c_remove),
  560. .id_table = wm8737_i2c_id,
  561. };
  562. #endif
  563. #if defined(CONFIG_SPI_MASTER)
  564. static int __devinit wm8737_spi_probe(struct spi_device *spi)
  565. {
  566. struct wm8737_priv *wm8737;
  567. int ret;
  568. wm8737 = kzalloc(sizeof(struct wm8737_priv), GFP_KERNEL);
  569. if (wm8737 == NULL)
  570. return -ENOMEM;
  571. wm8737->control_type = SND_SOC_SPI;
  572. spi_set_drvdata(spi, wm8737);
  573. ret = snd_soc_register_codec(&spi->dev,
  574. &soc_codec_dev_wm8737, &wm8737_dai, 1);
  575. if (ret < 0)
  576. kfree(wm8737);
  577. return ret;
  578. }
  579. static int __devexit wm8737_spi_remove(struct spi_device *spi)
  580. {
  581. snd_soc_unregister_codec(&spi->dev);
  582. kfree(spi_get_drvdata(spi));
  583. return 0;
  584. }
  585. static struct spi_driver wm8737_spi_driver = {
  586. .driver = {
  587. .name = "wm8737",
  588. .owner = THIS_MODULE,
  589. .of_match_table = wm8737_of_match,
  590. },
  591. .probe = wm8737_spi_probe,
  592. .remove = __devexit_p(wm8737_spi_remove),
  593. };
  594. #endif /* CONFIG_SPI_MASTER */
  595. static int __init wm8737_modinit(void)
  596. {
  597. int ret;
  598. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  599. ret = i2c_add_driver(&wm8737_i2c_driver);
  600. if (ret != 0) {
  601. printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n",
  602. ret);
  603. }
  604. #endif
  605. #if defined(CONFIG_SPI_MASTER)
  606. ret = spi_register_driver(&wm8737_spi_driver);
  607. if (ret != 0) {
  608. printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n",
  609. ret);
  610. }
  611. #endif
  612. return 0;
  613. }
  614. module_init(wm8737_modinit);
  615. static void __exit wm8737_exit(void)
  616. {
  617. #if defined(CONFIG_SPI_MASTER)
  618. spi_unregister_driver(&wm8737_spi_driver);
  619. #endif
  620. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  621. i2c_del_driver(&wm8737_i2c_driver);
  622. #endif
  623. }
  624. module_exit(wm8737_exit);
  625. MODULE_DESCRIPTION("ASoC WM8737 driver");
  626. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  627. MODULE_LICENSE("GPL");