wm8523.c 14 KB

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  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <linux/of_device.h>
  23. #include <sound/core.h>
  24. #include <sound/pcm.h>
  25. #include <sound/pcm_params.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "wm8523.h"
  30. #define WM8523_NUM_SUPPLIES 2
  31. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  32. "AVDD",
  33. "LINEVDD",
  34. };
  35. #define WM8523_NUM_RATES 7
  36. /* codec private data */
  37. struct wm8523_priv {
  38. enum snd_soc_control_type control_type;
  39. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  40. unsigned int sysclk;
  41. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  42. struct snd_pcm_hw_constraint_list rate_constraint;
  43. };
  44. static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
  45. 0x8523, /* R0 - DEVICE_ID */
  46. 0x0001, /* R1 - REVISION */
  47. 0x0000, /* R2 - PSCTRL1 */
  48. 0x1812, /* R3 - AIF_CTRL1 */
  49. 0x0000, /* R4 - AIF_CTRL2 */
  50. 0x0001, /* R5 - DAC_CTRL3 */
  51. 0x0190, /* R6 - DAC_GAINL */
  52. 0x0190, /* R7 - DAC_GAINR */
  53. 0x0000, /* R8 - ZERO_DETECT */
  54. };
  55. static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
  56. {
  57. switch (reg) {
  58. case WM8523_DEVICE_ID:
  59. case WM8523_REVISION:
  60. return 1;
  61. default:
  62. return 0;
  63. }
  64. }
  65. static int wm8523_reset(struct snd_soc_codec *codec)
  66. {
  67. return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
  68. }
  69. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  70. static const char *wm8523_zd_count_text[] = {
  71. "1024",
  72. "2048",
  73. };
  74. static const struct soc_enum wm8523_zc_count =
  75. SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
  76. static const struct snd_kcontrol_new wm8523_controls[] = {
  77. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  78. 0, 448, 0, dac_tlv),
  79. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  80. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  81. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  82. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  83. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  84. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  85. };
  86. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  87. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  88. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  89. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  90. };
  91. static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
  92. { "LINEVOUTL", NULL, "DAC" },
  93. { "LINEVOUTR", NULL, "DAC" },
  94. };
  95. static struct {
  96. int value;
  97. int ratio;
  98. } lrclk_ratios[WM8523_NUM_RATES] = {
  99. { 1, 128 },
  100. { 2, 192 },
  101. { 3, 256 },
  102. { 4, 384 },
  103. { 5, 512 },
  104. { 6, 768 },
  105. { 7, 1152 },
  106. };
  107. static int wm8523_startup(struct snd_pcm_substream *substream,
  108. struct snd_soc_dai *dai)
  109. {
  110. struct snd_soc_codec *codec = dai->codec;
  111. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  112. /* The set of sample rates that can be supported depends on the
  113. * MCLK supplied to the CODEC - enforce this.
  114. */
  115. if (!wm8523->sysclk) {
  116. dev_err(codec->dev,
  117. "No MCLK configured, call set_sysclk() on init\n");
  118. return -EINVAL;
  119. }
  120. snd_pcm_hw_constraint_list(substream->runtime, 0,
  121. SNDRV_PCM_HW_PARAM_RATE,
  122. &wm8523->rate_constraint);
  123. return 0;
  124. }
  125. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  126. struct snd_pcm_hw_params *params,
  127. struct snd_soc_dai *dai)
  128. {
  129. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  130. struct snd_soc_codec *codec = rtd->codec;
  131. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  132. int i;
  133. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  134. u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
  135. /* Find a supported LRCLK ratio */
  136. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  137. if (wm8523->sysclk / params_rate(params) ==
  138. lrclk_ratios[i].ratio)
  139. break;
  140. }
  141. /* Should never happen, should be handled by constraints */
  142. if (i == ARRAY_SIZE(lrclk_ratios)) {
  143. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  144. wm8523->sysclk / params_rate(params));
  145. return -EINVAL;
  146. }
  147. aifctrl2 &= ~WM8523_SR_MASK;
  148. aifctrl2 |= lrclk_ratios[i].value;
  149. aifctrl1 &= ~WM8523_WL_MASK;
  150. switch (params_format(params)) {
  151. case SNDRV_PCM_FORMAT_S16_LE:
  152. break;
  153. case SNDRV_PCM_FORMAT_S20_3LE:
  154. aifctrl1 |= 0x8;
  155. break;
  156. case SNDRV_PCM_FORMAT_S24_LE:
  157. aifctrl1 |= 0x10;
  158. break;
  159. case SNDRV_PCM_FORMAT_S32_LE:
  160. aifctrl1 |= 0x18;
  161. break;
  162. }
  163. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  164. snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  165. return 0;
  166. }
  167. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  168. int clk_id, unsigned int freq, int dir)
  169. {
  170. struct snd_soc_codec *codec = codec_dai->codec;
  171. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  172. unsigned int val;
  173. int i;
  174. wm8523->sysclk = freq;
  175. wm8523->rate_constraint.count = 0;
  176. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  177. val = freq / lrclk_ratios[i].ratio;
  178. /* Check that it's a standard rate since core can't
  179. * cope with others and having the odd rates confuses
  180. * constraint matching.
  181. */
  182. switch (val) {
  183. case 8000:
  184. case 11025:
  185. case 16000:
  186. case 22050:
  187. case 32000:
  188. case 44100:
  189. case 48000:
  190. case 64000:
  191. case 88200:
  192. case 96000:
  193. case 176400:
  194. case 192000:
  195. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  196. val);
  197. wm8523->rate_constraint_list[i] = val;
  198. wm8523->rate_constraint.count++;
  199. break;
  200. default:
  201. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  202. val);
  203. }
  204. }
  205. /* Need at least one supported rate... */
  206. if (wm8523->rate_constraint.count == 0)
  207. return -EINVAL;
  208. return 0;
  209. }
  210. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  211. unsigned int fmt)
  212. {
  213. struct snd_soc_codec *codec = codec_dai->codec;
  214. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  215. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  216. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  217. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  218. case SND_SOC_DAIFMT_CBM_CFM:
  219. aifctrl1 |= WM8523_AIF_MSTR;
  220. break;
  221. case SND_SOC_DAIFMT_CBS_CFS:
  222. break;
  223. default:
  224. return -EINVAL;
  225. }
  226. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  227. case SND_SOC_DAIFMT_I2S:
  228. aifctrl1 |= 0x0002;
  229. break;
  230. case SND_SOC_DAIFMT_RIGHT_J:
  231. break;
  232. case SND_SOC_DAIFMT_LEFT_J:
  233. aifctrl1 |= 0x0001;
  234. break;
  235. case SND_SOC_DAIFMT_DSP_A:
  236. aifctrl1 |= 0x0003;
  237. break;
  238. case SND_SOC_DAIFMT_DSP_B:
  239. aifctrl1 |= 0x0023;
  240. break;
  241. default:
  242. return -EINVAL;
  243. }
  244. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  245. case SND_SOC_DAIFMT_NB_NF:
  246. break;
  247. case SND_SOC_DAIFMT_IB_IF:
  248. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  249. break;
  250. case SND_SOC_DAIFMT_IB_NF:
  251. aifctrl1 |= WM8523_BCLK_INV;
  252. break;
  253. case SND_SOC_DAIFMT_NB_IF:
  254. aifctrl1 |= WM8523_LRCLK_INV;
  255. break;
  256. default:
  257. return -EINVAL;
  258. }
  259. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  260. return 0;
  261. }
  262. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  263. enum snd_soc_bias_level level)
  264. {
  265. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  266. u16 *reg_cache = codec->reg_cache;
  267. int ret, i;
  268. switch (level) {
  269. case SND_SOC_BIAS_ON:
  270. break;
  271. case SND_SOC_BIAS_PREPARE:
  272. /* Full power on */
  273. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  274. WM8523_SYS_ENA_MASK, 3);
  275. break;
  276. case SND_SOC_BIAS_STANDBY:
  277. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  278. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  279. wm8523->supplies);
  280. if (ret != 0) {
  281. dev_err(codec->dev,
  282. "Failed to enable supplies: %d\n",
  283. ret);
  284. return ret;
  285. }
  286. /* Initial power up */
  287. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  288. WM8523_SYS_ENA_MASK, 1);
  289. /* Sync back default/cached values */
  290. for (i = WM8523_AIF_CTRL1;
  291. i < WM8523_MAX_REGISTER; i++)
  292. snd_soc_write(codec, i, reg_cache[i]);
  293. msleep(100);
  294. }
  295. /* Power up to mute */
  296. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  297. WM8523_SYS_ENA_MASK, 2);
  298. break;
  299. case SND_SOC_BIAS_OFF:
  300. /* The chip runs through the power down sequence for us. */
  301. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  302. WM8523_SYS_ENA_MASK, 0);
  303. msleep(100);
  304. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  305. wm8523->supplies);
  306. break;
  307. }
  308. codec->dapm.bias_level = level;
  309. return 0;
  310. }
  311. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  312. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  313. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  314. static struct snd_soc_dai_ops wm8523_dai_ops = {
  315. .startup = wm8523_startup,
  316. .hw_params = wm8523_hw_params,
  317. .set_sysclk = wm8523_set_dai_sysclk,
  318. .set_fmt = wm8523_set_dai_fmt,
  319. };
  320. static struct snd_soc_dai_driver wm8523_dai = {
  321. .name = "wm8523-hifi",
  322. .playback = {
  323. .stream_name = "Playback",
  324. .channels_min = 2, /* Mono modes not yet supported */
  325. .channels_max = 2,
  326. .rates = WM8523_RATES,
  327. .formats = WM8523_FORMATS,
  328. },
  329. .ops = &wm8523_dai_ops,
  330. };
  331. #ifdef CONFIG_PM
  332. static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state)
  333. {
  334. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  335. return 0;
  336. }
  337. static int wm8523_resume(struct snd_soc_codec *codec)
  338. {
  339. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  340. return 0;
  341. }
  342. #else
  343. #define wm8523_suspend NULL
  344. #define wm8523_resume NULL
  345. #endif
  346. static int wm8523_probe(struct snd_soc_codec *codec)
  347. {
  348. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  349. int ret, i;
  350. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  351. wm8523->rate_constraint.count =
  352. ARRAY_SIZE(wm8523->rate_constraint_list);
  353. ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
  354. if (ret != 0) {
  355. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  356. return ret;
  357. }
  358. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  359. wm8523->supplies[i].supply = wm8523_supply_names[i];
  360. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
  361. wm8523->supplies);
  362. if (ret != 0) {
  363. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  364. return ret;
  365. }
  366. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  367. wm8523->supplies);
  368. if (ret != 0) {
  369. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  370. goto err_get;
  371. }
  372. ret = snd_soc_read(codec, WM8523_DEVICE_ID);
  373. if (ret < 0) {
  374. dev_err(codec->dev, "Failed to read ID register\n");
  375. goto err_enable;
  376. }
  377. if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
  378. dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
  379. ret = -EINVAL;
  380. goto err_enable;
  381. }
  382. ret = snd_soc_read(codec, WM8523_REVISION);
  383. if (ret < 0) {
  384. dev_err(codec->dev, "Failed to read revision register\n");
  385. goto err_enable;
  386. }
  387. dev_info(codec->dev, "revision %c\n",
  388. (ret & WM8523_CHIP_REV_MASK) + 'A');
  389. ret = wm8523_reset(codec);
  390. if (ret < 0) {
  391. dev_err(codec->dev, "Failed to issue reset\n");
  392. goto err_enable;
  393. }
  394. /* Change some default settings - latch VU and enable ZC */
  395. snd_soc_update_bits(codec, WM8523_DAC_GAINR,
  396. WM8523_DACR_VU, WM8523_DACR_VU);
  397. snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
  398. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  399. /* Bias level configuration will have done an extra enable */
  400. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  401. return 0;
  402. err_enable:
  403. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  404. err_get:
  405. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  406. return ret;
  407. }
  408. static int wm8523_remove(struct snd_soc_codec *codec)
  409. {
  410. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  411. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  412. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  413. return 0;
  414. }
  415. static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
  416. .probe = wm8523_probe,
  417. .remove = wm8523_remove,
  418. .suspend = wm8523_suspend,
  419. .resume = wm8523_resume,
  420. .set_bias_level = wm8523_set_bias_level,
  421. .reg_cache_size = WM8523_REGISTER_COUNT,
  422. .reg_word_size = sizeof(u16),
  423. .reg_cache_default = wm8523_reg,
  424. .volatile_register = wm8523_volatile_register,
  425. .controls = wm8523_controls,
  426. .num_controls = ARRAY_SIZE(wm8523_controls),
  427. .dapm_widgets = wm8523_dapm_widgets,
  428. .num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
  429. .dapm_routes = wm8523_dapm_routes,
  430. .num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
  431. };
  432. static const struct of_device_id wm8523_of_match[] = {
  433. { .compatible = "wlf,wm8523" },
  434. { },
  435. };
  436. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  437. static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
  438. const struct i2c_device_id *id)
  439. {
  440. struct wm8523_priv *wm8523;
  441. int ret;
  442. wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
  443. if (wm8523 == NULL)
  444. return -ENOMEM;
  445. i2c_set_clientdata(i2c, wm8523);
  446. wm8523->control_type = SND_SOC_I2C;
  447. ret = snd_soc_register_codec(&i2c->dev,
  448. &soc_codec_dev_wm8523, &wm8523_dai, 1);
  449. if (ret < 0)
  450. kfree(wm8523);
  451. return ret;
  452. }
  453. static __devexit int wm8523_i2c_remove(struct i2c_client *client)
  454. {
  455. snd_soc_unregister_codec(&client->dev);
  456. kfree(i2c_get_clientdata(client));
  457. return 0;
  458. }
  459. static const struct i2c_device_id wm8523_i2c_id[] = {
  460. { "wm8523", 0 },
  461. { }
  462. };
  463. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  464. static struct i2c_driver wm8523_i2c_driver = {
  465. .driver = {
  466. .name = "wm8523",
  467. .owner = THIS_MODULE,
  468. .of_match_table = wm8523_of_match,
  469. },
  470. .probe = wm8523_i2c_probe,
  471. .remove = __devexit_p(wm8523_i2c_remove),
  472. .id_table = wm8523_i2c_id,
  473. };
  474. #endif
  475. static int __init wm8523_modinit(void)
  476. {
  477. int ret;
  478. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  479. ret = i2c_add_driver(&wm8523_i2c_driver);
  480. if (ret != 0) {
  481. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  482. ret);
  483. }
  484. #endif
  485. return 0;
  486. }
  487. module_init(wm8523_modinit);
  488. static void __exit wm8523_exit(void)
  489. {
  490. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  491. i2c_del_driver(&wm8523_i2c_driver);
  492. #endif
  493. }
  494. module_exit(wm8523_exit);
  495. MODULE_DESCRIPTION("ASoC WM8523 driver");
  496. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  497. MODULE_LICENSE("GPL");