ak4642.c 11 KB

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  1. /*
  2. * ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
  3. *
  4. * Copyright (C) 2009 Renesas Solutions Corp.
  5. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  6. *
  7. * Based on wm8731.c by Richard Purdie
  8. * Based on ak4535.c by Richard Purdie
  9. * Based on wm8753.c by Liam Girdwood
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. /* ** CAUTION **
  16. *
  17. * This is very simple driver.
  18. * It can use headphone output / stereo input only
  19. *
  20. * AK4642 is not tested.
  21. * AK4643 is tested.
  22. */
  23. #include <linux/delay.h>
  24. #include <linux/i2c.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/slab.h>
  27. #include <linux/module.h>
  28. #include <sound/soc.h>
  29. #include <sound/initval.h>
  30. #include <sound/tlv.h>
  31. #define AK4642_VERSION "0.0.1"
  32. #define PW_MGMT1 0x00
  33. #define PW_MGMT2 0x01
  34. #define SG_SL1 0x02
  35. #define SG_SL2 0x03
  36. #define MD_CTL1 0x04
  37. #define MD_CTL2 0x05
  38. #define TIMER 0x06
  39. #define ALC_CTL1 0x07
  40. #define ALC_CTL2 0x08
  41. #define L_IVC 0x09
  42. #define L_DVC 0x0a
  43. #define ALC_CTL3 0x0b
  44. #define R_IVC 0x0c
  45. #define R_DVC 0x0d
  46. #define MD_CTL3 0x0e
  47. #define MD_CTL4 0x0f
  48. #define PW_MGMT3 0x10
  49. #define DF_S 0x11
  50. #define FIL3_0 0x12
  51. #define FIL3_1 0x13
  52. #define FIL3_2 0x14
  53. #define FIL3_3 0x15
  54. #define EQ_0 0x16
  55. #define EQ_1 0x17
  56. #define EQ_2 0x18
  57. #define EQ_3 0x19
  58. #define EQ_4 0x1a
  59. #define EQ_5 0x1b
  60. #define FIL1_0 0x1c
  61. #define FIL1_1 0x1d
  62. #define FIL1_2 0x1e
  63. #define FIL1_3 0x1f
  64. #define PW_MGMT4 0x20
  65. #define MD_CTL5 0x21
  66. #define LO_MS 0x22
  67. #define HP_MS 0x23
  68. #define SPK_MS 0x24
  69. #define AK4642_CACHEREGNUM 0x25
  70. /* PW_MGMT1*/
  71. #define PMVCM (1 << 6) /* VCOM Power Management */
  72. #define PMMIN (1 << 5) /* MIN Input Power Management */
  73. #define PMDAC (1 << 2) /* DAC Power Management */
  74. #define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
  75. /* PW_MGMT2 */
  76. #define HPMTN (1 << 6)
  77. #define PMHPL (1 << 5)
  78. #define PMHPR (1 << 4)
  79. #define MS (1 << 3) /* master/slave select */
  80. #define MCKO (1 << 1)
  81. #define PMPLL (1 << 0)
  82. #define PMHP_MASK (PMHPL | PMHPR)
  83. #define PMHP PMHP_MASK
  84. /* PW_MGMT3 */
  85. #define PMADR (1 << 0) /* MIC L / ADC R Power Management */
  86. /* SG_SL1 */
  87. #define MINS (1 << 6) /* Switch from MIN to Speaker */
  88. #define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
  89. #define PMMP (1 << 2) /* MPWR pin Power Management */
  90. #define MGAIN0 (1 << 0) /* MIC amp gain*/
  91. /* TIMER */
  92. #define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
  93. #define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
  94. /* ALC_CTL1 */
  95. #define ALC (1 << 5) /* ALC Enable */
  96. #define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
  97. /* MD_CTL1 */
  98. #define PLL3 (1 << 7)
  99. #define PLL2 (1 << 6)
  100. #define PLL1 (1 << 5)
  101. #define PLL0 (1 << 4)
  102. #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0)
  103. #define BCKO_MASK (1 << 3)
  104. #define BCKO_64 BCKO_MASK
  105. #define DIF_MASK (3 << 0)
  106. #define DSP (0 << 0)
  107. #define RIGHT_J (1 << 0)
  108. #define LEFT_J (2 << 0)
  109. #define I2S (3 << 0)
  110. /* MD_CTL2 */
  111. #define FS0 (1 << 0)
  112. #define FS1 (1 << 1)
  113. #define FS2 (1 << 2)
  114. #define FS3 (1 << 5)
  115. #define FS_MASK (FS0 | FS1 | FS2 | FS3)
  116. /* MD_CTL3 */
  117. #define BST1 (1 << 3)
  118. /* MD_CTL4 */
  119. #define DACH (1 << 0)
  120. /*
  121. * Playback Volume (table 39)
  122. *
  123. * max : 0x00 : +12.0 dB
  124. * ( 0.5 dB step )
  125. * min : 0xFE : -115.0 dB
  126. * mute: 0xFF
  127. */
  128. static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);
  129. static const struct snd_kcontrol_new ak4642_snd_controls[] = {
  130. SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
  131. 0, 0xFF, 1, out_tlv),
  132. };
  133. /* codec private data */
  134. struct ak4642_priv {
  135. unsigned int sysclk;
  136. enum snd_soc_control_type control_type;
  137. };
  138. /*
  139. * ak4642 register cache
  140. */
  141. static const u8 ak4642_reg[AK4642_CACHEREGNUM] = {
  142. 0x00, 0x00, 0x01, 0x00,
  143. 0x02, 0x00, 0x00, 0x00,
  144. 0xe1, 0xe1, 0x18, 0x00,
  145. 0xe1, 0x18, 0x11, 0x08,
  146. 0x00, 0x00, 0x00, 0x00,
  147. 0x00, 0x00, 0x00, 0x00,
  148. 0x00, 0x00, 0x00, 0x00,
  149. 0x00, 0x00, 0x00, 0x00,
  150. 0x00, 0x00, 0x00, 0x00,
  151. 0x00,
  152. };
  153. static int ak4642_dai_startup(struct snd_pcm_substream *substream,
  154. struct snd_soc_dai *dai)
  155. {
  156. int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  157. struct snd_soc_codec *codec = dai->codec;
  158. if (is_play) {
  159. /*
  160. * start headphone output
  161. *
  162. * PLL, Master Mode
  163. * Audio I/F Format :MSB justified (ADC & DAC)
  164. * Bass Boost Level : Middle
  165. *
  166. * This operation came from example code of
  167. * "ASAHI KASEI AK4642" (japanese) manual p97.
  168. */
  169. snd_soc_update_bits(codec, MD_CTL4, DACH, DACH);
  170. snd_soc_update_bits(codec, MD_CTL3, BST1, BST1);
  171. snd_soc_write(codec, L_IVC, 0x91); /* volume */
  172. snd_soc_write(codec, R_IVC, 0x91); /* volume */
  173. snd_soc_update_bits(codec, PW_MGMT1, PMVCM | PMMIN | PMDAC,
  174. PMVCM | PMMIN | PMDAC);
  175. snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, PMHP);
  176. snd_soc_update_bits(codec, PW_MGMT2, HPMTN, HPMTN);
  177. } else {
  178. /*
  179. * start stereo input
  180. *
  181. * PLL Master Mode
  182. * Audio I/F Format:MSB justified (ADC & DAC)
  183. * Pre MIC AMP:+20dB
  184. * MIC Power On
  185. * ALC setting:Refer to Table 35
  186. * ALC bit=“1”
  187. *
  188. * This operation came from example code of
  189. * "ASAHI KASEI AK4642" (japanese) manual p94.
  190. */
  191. snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
  192. snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
  193. snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
  194. snd_soc_update_bits(codec, PW_MGMT1, PMVCM | PMADL,
  195. PMVCM | PMADL);
  196. snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
  197. }
  198. return 0;
  199. }
  200. static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
  201. struct snd_soc_dai *dai)
  202. {
  203. int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  204. struct snd_soc_codec *codec = dai->codec;
  205. if (is_play) {
  206. /* stop headphone output */
  207. snd_soc_update_bits(codec, PW_MGMT2, HPMTN, 0);
  208. snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, 0);
  209. snd_soc_update_bits(codec, PW_MGMT1, PMMIN | PMDAC, 0);
  210. snd_soc_update_bits(codec, MD_CTL3, BST1, 0);
  211. snd_soc_update_bits(codec, MD_CTL4, DACH, 0);
  212. } else {
  213. /* stop stereo input */
  214. snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
  215. snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
  216. snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
  217. }
  218. }
  219. static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
  220. int clk_id, unsigned int freq, int dir)
  221. {
  222. struct snd_soc_codec *codec = codec_dai->codec;
  223. u8 pll;
  224. switch (freq) {
  225. case 11289600:
  226. pll = PLL2;
  227. break;
  228. case 12288000:
  229. pll = PLL2 | PLL0;
  230. break;
  231. case 12000000:
  232. pll = PLL2 | PLL1;
  233. break;
  234. case 24000000:
  235. pll = PLL2 | PLL1 | PLL0;
  236. break;
  237. case 13500000:
  238. pll = PLL3 | PLL2;
  239. break;
  240. case 27000000:
  241. pll = PLL3 | PLL2 | PLL0;
  242. break;
  243. default:
  244. return -EINVAL;
  245. }
  246. snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
  247. return 0;
  248. }
  249. static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  250. {
  251. struct snd_soc_codec *codec = dai->codec;
  252. u8 data;
  253. u8 bcko;
  254. data = MCKO | PMPLL; /* use MCKO */
  255. bcko = 0;
  256. /* set master/slave audio interface */
  257. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  258. case SND_SOC_DAIFMT_CBM_CFM:
  259. data |= MS;
  260. bcko = BCKO_64;
  261. break;
  262. case SND_SOC_DAIFMT_CBS_CFS:
  263. break;
  264. default:
  265. return -EINVAL;
  266. }
  267. snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
  268. snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
  269. /* format type */
  270. data = 0;
  271. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  272. case SND_SOC_DAIFMT_LEFT_J:
  273. data = LEFT_J;
  274. break;
  275. case SND_SOC_DAIFMT_I2S:
  276. data = I2S;
  277. break;
  278. /* FIXME
  279. * Please add RIGHT_J / DSP support here
  280. */
  281. default:
  282. return -EINVAL;
  283. break;
  284. }
  285. snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
  286. return 0;
  287. }
  288. static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
  289. struct snd_pcm_hw_params *params,
  290. struct snd_soc_dai *dai)
  291. {
  292. struct snd_soc_codec *codec = dai->codec;
  293. u8 rate;
  294. switch (params_rate(params)) {
  295. case 7350:
  296. rate = FS2;
  297. break;
  298. case 8000:
  299. rate = 0;
  300. break;
  301. case 11025:
  302. rate = FS2 | FS0;
  303. break;
  304. case 12000:
  305. rate = FS0;
  306. break;
  307. case 14700:
  308. rate = FS2 | FS1;
  309. break;
  310. case 16000:
  311. rate = FS1;
  312. break;
  313. case 22050:
  314. rate = FS2 | FS1 | FS0;
  315. break;
  316. case 24000:
  317. rate = FS1 | FS0;
  318. break;
  319. case 29400:
  320. rate = FS3 | FS2 | FS1;
  321. break;
  322. case 32000:
  323. rate = FS3 | FS1;
  324. break;
  325. case 44100:
  326. rate = FS3 | FS2 | FS1 | FS0;
  327. break;
  328. case 48000:
  329. rate = FS3 | FS1 | FS0;
  330. break;
  331. default:
  332. return -EINVAL;
  333. break;
  334. }
  335. snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
  336. return 0;
  337. }
  338. static struct snd_soc_dai_ops ak4642_dai_ops = {
  339. .startup = ak4642_dai_startup,
  340. .shutdown = ak4642_dai_shutdown,
  341. .set_sysclk = ak4642_dai_set_sysclk,
  342. .set_fmt = ak4642_dai_set_fmt,
  343. .hw_params = ak4642_dai_hw_params,
  344. };
  345. static struct snd_soc_dai_driver ak4642_dai = {
  346. .name = "ak4642-hifi",
  347. .playback = {
  348. .stream_name = "Playback",
  349. .channels_min = 1,
  350. .channels_max = 2,
  351. .rates = SNDRV_PCM_RATE_8000_48000,
  352. .formats = SNDRV_PCM_FMTBIT_S16_LE },
  353. .capture = {
  354. .stream_name = "Capture",
  355. .channels_min = 1,
  356. .channels_max = 2,
  357. .rates = SNDRV_PCM_RATE_8000_48000,
  358. .formats = SNDRV_PCM_FMTBIT_S16_LE },
  359. .ops = &ak4642_dai_ops,
  360. .symmetric_rates = 1,
  361. };
  362. static int ak4642_resume(struct snd_soc_codec *codec)
  363. {
  364. snd_soc_cache_sync(codec);
  365. return 0;
  366. }
  367. static int ak4642_probe(struct snd_soc_codec *codec)
  368. {
  369. struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
  370. int ret;
  371. dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION);
  372. ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
  373. if (ret < 0) {
  374. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  375. return ret;
  376. }
  377. snd_soc_add_controls(codec, ak4642_snd_controls,
  378. ARRAY_SIZE(ak4642_snd_controls));
  379. return 0;
  380. }
  381. static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
  382. .probe = ak4642_probe,
  383. .resume = ak4642_resume,
  384. .reg_cache_size = ARRAY_SIZE(ak4642_reg),
  385. .reg_word_size = sizeof(u8),
  386. .reg_cache_default = ak4642_reg,
  387. };
  388. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  389. static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
  390. const struct i2c_device_id *id)
  391. {
  392. struct ak4642_priv *ak4642;
  393. int ret;
  394. ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL);
  395. if (!ak4642)
  396. return -ENOMEM;
  397. i2c_set_clientdata(i2c, ak4642);
  398. ak4642->control_type = SND_SOC_I2C;
  399. ret = snd_soc_register_codec(&i2c->dev,
  400. &soc_codec_dev_ak4642, &ak4642_dai, 1);
  401. if (ret < 0)
  402. kfree(ak4642);
  403. return ret;
  404. }
  405. static __devexit int ak4642_i2c_remove(struct i2c_client *client)
  406. {
  407. snd_soc_unregister_codec(&client->dev);
  408. kfree(i2c_get_clientdata(client));
  409. return 0;
  410. }
  411. static const struct i2c_device_id ak4642_i2c_id[] = {
  412. { "ak4642", 0 },
  413. { "ak4643", 0 },
  414. { }
  415. };
  416. MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
  417. static struct i2c_driver ak4642_i2c_driver = {
  418. .driver = {
  419. .name = "ak4642-codec",
  420. .owner = THIS_MODULE,
  421. },
  422. .probe = ak4642_i2c_probe,
  423. .remove = __devexit_p(ak4642_i2c_remove),
  424. .id_table = ak4642_i2c_id,
  425. };
  426. #endif
  427. static int __init ak4642_modinit(void)
  428. {
  429. int ret = 0;
  430. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  431. ret = i2c_add_driver(&ak4642_i2c_driver);
  432. #endif
  433. return ret;
  434. }
  435. module_init(ak4642_modinit);
  436. static void __exit ak4642_exit(void)
  437. {
  438. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  439. i2c_del_driver(&ak4642_i2c_driver);
  440. #endif
  441. }
  442. module_exit(ak4642_exit);
  443. MODULE_DESCRIPTION("Soc AK4642 driver");
  444. MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
  445. MODULE_LICENSE("GPL");