drm_mode.h 10 KB

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  1. /*
  2. * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
  3. * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
  4. * Copyright (c) 2008 Red Hat Inc.
  5. * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
  6. * Copyright (c) 2007-2008 Intel Corporation
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the "Software"),
  10. * to deal in the Software without restriction, including without limitation
  11. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12. * and/or sell copies of the Software, and to permit persons to whom the
  13. * Software is furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  24. * IN THE SOFTWARE.
  25. */
  26. #ifndef _DRM_MODE_H
  27. #define _DRM_MODE_H
  28. #define DRM_DISPLAY_INFO_LEN 32
  29. #define DRM_CONNECTOR_NAME_LEN 32
  30. #define DRM_DISPLAY_MODE_LEN 32
  31. #define DRM_PROP_NAME_LEN 32
  32. #define DRM_MODE_TYPE_BUILTIN (1<<0)
  33. #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
  34. #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
  35. #define DRM_MODE_TYPE_PREFERRED (1<<3)
  36. #define DRM_MODE_TYPE_DEFAULT (1<<4)
  37. #define DRM_MODE_TYPE_USERDEF (1<<5)
  38. #define DRM_MODE_TYPE_DRIVER (1<<6)
  39. /* Video mode flags */
  40. /* bit compatible with the xorg definitions. */
  41. #define DRM_MODE_FLAG_PHSYNC (1<<0)
  42. #define DRM_MODE_FLAG_NHSYNC (1<<1)
  43. #define DRM_MODE_FLAG_PVSYNC (1<<2)
  44. #define DRM_MODE_FLAG_NVSYNC (1<<3)
  45. #define DRM_MODE_FLAG_INTERLACE (1<<4)
  46. #define DRM_MODE_FLAG_DBLSCAN (1<<5)
  47. #define DRM_MODE_FLAG_CSYNC (1<<6)
  48. #define DRM_MODE_FLAG_PCSYNC (1<<7)
  49. #define DRM_MODE_FLAG_NCSYNC (1<<8)
  50. #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
  51. #define DRM_MODE_FLAG_BCAST (1<<10)
  52. #define DRM_MODE_FLAG_PIXMUX (1<<11)
  53. #define DRM_MODE_FLAG_DBLCLK (1<<12)
  54. #define DRM_MODE_FLAG_CLKDIV2 (1<<13)
  55. /* DPMS flags */
  56. /* bit compatible with the xorg definitions. */
  57. #define DRM_MODE_DPMS_ON 0
  58. #define DRM_MODE_DPMS_STANDBY 1
  59. #define DRM_MODE_DPMS_SUSPEND 2
  60. #define DRM_MODE_DPMS_OFF 3
  61. /* Scaling mode options */
  62. #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
  63. software can still scale) */
  64. #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
  65. #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
  66. #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
  67. /* Dithering mode options */
  68. #define DRM_MODE_DITHERING_OFF 0
  69. #define DRM_MODE_DITHERING_ON 1
  70. #define DRM_MODE_DITHERING_AUTO 2
  71. /* Dirty info options */
  72. #define DRM_MODE_DIRTY_OFF 0
  73. #define DRM_MODE_DIRTY_ON 1
  74. #define DRM_MODE_DIRTY_ANNOTATE 2
  75. struct drm_mode_modeinfo {
  76. __u32 clock;
  77. __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
  78. __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
  79. __u32 vrefresh;
  80. __u32 flags;
  81. __u32 type;
  82. char name[DRM_DISPLAY_MODE_LEN];
  83. };
  84. struct drm_mode_card_res {
  85. __u64 fb_id_ptr;
  86. __u64 crtc_id_ptr;
  87. __u64 connector_id_ptr;
  88. __u64 encoder_id_ptr;
  89. __u32 count_fbs;
  90. __u32 count_crtcs;
  91. __u32 count_connectors;
  92. __u32 count_encoders;
  93. __u32 min_width, max_width;
  94. __u32 min_height, max_height;
  95. };
  96. struct drm_mode_crtc {
  97. __u64 set_connectors_ptr;
  98. __u32 count_connectors;
  99. __u32 crtc_id; /**< Id */
  100. __u32 fb_id; /**< Id of framebuffer */
  101. __u32 x, y; /**< Position on the frameuffer */
  102. __u32 gamma_size;
  103. __u32 mode_valid;
  104. struct drm_mode_modeinfo mode;
  105. };
  106. #define DRM_MODE_ENCODER_NONE 0
  107. #define DRM_MODE_ENCODER_DAC 1
  108. #define DRM_MODE_ENCODER_TMDS 2
  109. #define DRM_MODE_ENCODER_LVDS 3
  110. #define DRM_MODE_ENCODER_TVDAC 4
  111. #define DRM_MODE_ENCODER_VIRTUAL 5
  112. struct drm_mode_get_encoder {
  113. __u32 encoder_id;
  114. __u32 encoder_type;
  115. __u32 crtc_id; /**< Id of crtc */
  116. __u32 possible_crtcs;
  117. __u32 possible_clones;
  118. };
  119. /* This is for connectors with multiple signal types. */
  120. /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
  121. #define DRM_MODE_SUBCONNECTOR_Automatic 0
  122. #define DRM_MODE_SUBCONNECTOR_Unknown 0
  123. #define DRM_MODE_SUBCONNECTOR_DVID 3
  124. #define DRM_MODE_SUBCONNECTOR_DVIA 4
  125. #define DRM_MODE_SUBCONNECTOR_Composite 5
  126. #define DRM_MODE_SUBCONNECTOR_SVIDEO 6
  127. #define DRM_MODE_SUBCONNECTOR_Component 8
  128. #define DRM_MODE_SUBCONNECTOR_SCART 9
  129. #define DRM_MODE_CONNECTOR_Unknown 0
  130. #define DRM_MODE_CONNECTOR_VGA 1
  131. #define DRM_MODE_CONNECTOR_DVII 2
  132. #define DRM_MODE_CONNECTOR_DVID 3
  133. #define DRM_MODE_CONNECTOR_DVIA 4
  134. #define DRM_MODE_CONNECTOR_Composite 5
  135. #define DRM_MODE_CONNECTOR_SVIDEO 6
  136. #define DRM_MODE_CONNECTOR_LVDS 7
  137. #define DRM_MODE_CONNECTOR_Component 8
  138. #define DRM_MODE_CONNECTOR_9PinDIN 9
  139. #define DRM_MODE_CONNECTOR_DisplayPort 10
  140. #define DRM_MODE_CONNECTOR_HDMIA 11
  141. #define DRM_MODE_CONNECTOR_HDMIB 12
  142. #define DRM_MODE_CONNECTOR_TV 13
  143. #define DRM_MODE_CONNECTOR_eDP 14
  144. #define DRM_MODE_CONNECTOR_VIRTUAL 15
  145. struct drm_mode_get_connector {
  146. __u64 encoders_ptr;
  147. __u64 modes_ptr;
  148. __u64 props_ptr;
  149. __u64 prop_values_ptr;
  150. __u32 count_modes;
  151. __u32 count_props;
  152. __u32 count_encoders;
  153. __u32 encoder_id; /**< Current Encoder */
  154. __u32 connector_id; /**< Id */
  155. __u32 connector_type;
  156. __u32 connector_type_id;
  157. __u32 connection;
  158. __u32 mm_width, mm_height; /**< HxW in millimeters */
  159. __u32 subpixel;
  160. };
  161. #define DRM_MODE_PROP_PENDING (1<<0)
  162. #define DRM_MODE_PROP_RANGE (1<<1)
  163. #define DRM_MODE_PROP_IMMUTABLE (1<<2)
  164. #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
  165. #define DRM_MODE_PROP_BLOB (1<<4)
  166. struct drm_mode_property_enum {
  167. __u64 value;
  168. char name[DRM_PROP_NAME_LEN];
  169. };
  170. struct drm_mode_get_property {
  171. __u64 values_ptr; /* values and blob lengths */
  172. __u64 enum_blob_ptr; /* enum and blob id ptrs */
  173. __u32 prop_id;
  174. __u32 flags;
  175. char name[DRM_PROP_NAME_LEN];
  176. __u32 count_values;
  177. __u32 count_enum_blobs;
  178. };
  179. struct drm_mode_connector_set_property {
  180. __u64 value;
  181. __u32 prop_id;
  182. __u32 connector_id;
  183. };
  184. struct drm_mode_get_blob {
  185. __u32 blob_id;
  186. __u32 length;
  187. __u64 data;
  188. };
  189. struct drm_mode_fb_cmd {
  190. __u32 fb_id;
  191. __u32 width, height;
  192. __u32 pitch;
  193. __u32 bpp;
  194. __u32 depth;
  195. /* driver specific handle */
  196. __u32 handle;
  197. };
  198. #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
  199. #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
  200. #define DRM_MODE_FB_DIRTY_FLAGS 0x03
  201. /*
  202. * Mark a region of a framebuffer as dirty.
  203. *
  204. * Some hardware does not automatically update display contents
  205. * as a hardware or software draw to a framebuffer. This ioctl
  206. * allows userspace to tell the kernel and the hardware what
  207. * regions of the framebuffer have changed.
  208. *
  209. * The kernel or hardware is free to update more then just the
  210. * region specified by the clip rects. The kernel or hardware
  211. * may also delay and/or coalesce several calls to dirty into a
  212. * single update.
  213. *
  214. * Userspace may annotate the updates, the annotates are a
  215. * promise made by the caller that the change is either a copy
  216. * of pixels or a fill of a single color in the region specified.
  217. *
  218. * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
  219. * the number of updated regions are half of num_clips given,
  220. * where the clip rects are paired in src and dst. The width and
  221. * height of each one of the pairs must match.
  222. *
  223. * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
  224. * promises that the region specified of the clip rects is filled
  225. * completely with a single color as given in the color argument.
  226. */
  227. struct drm_mode_fb_dirty_cmd {
  228. __u32 fb_id;
  229. __u32 flags;
  230. __u32 color;
  231. __u32 num_clips;
  232. __u64 clips_ptr;
  233. };
  234. struct drm_mode_mode_cmd {
  235. __u32 connector_id;
  236. struct drm_mode_modeinfo mode;
  237. };
  238. #define DRM_MODE_CURSOR_BO (1<<0)
  239. #define DRM_MODE_CURSOR_MOVE (1<<1)
  240. /*
  241. * depending on the value in flags different members are used.
  242. *
  243. * CURSOR_BO uses
  244. * crtc
  245. * width
  246. * height
  247. * handle - if 0 turns the cursor of
  248. *
  249. * CURSOR_MOVE uses
  250. * crtc
  251. * x
  252. * y
  253. */
  254. struct drm_mode_cursor {
  255. __u32 flags;
  256. __u32 crtc_id;
  257. __s32 x;
  258. __s32 y;
  259. __u32 width;
  260. __u32 height;
  261. /* driver specific handle */
  262. __u32 handle;
  263. };
  264. struct drm_mode_crtc_lut {
  265. __u32 crtc_id;
  266. __u32 gamma_size;
  267. /* pointers to arrays */
  268. __u64 red;
  269. __u64 green;
  270. __u64 blue;
  271. };
  272. #define DRM_MODE_PAGE_FLIP_EVENT 0x01
  273. #define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
  274. /*
  275. * Request a page flip on the specified crtc.
  276. *
  277. * This ioctl will ask KMS to schedule a page flip for the specified
  278. * crtc. Once any pending rendering targeting the specified fb (as of
  279. * ioctl time) has completed, the crtc will be reprogrammed to display
  280. * that fb after the next vertical refresh. The ioctl returns
  281. * immediately, but subsequent rendering to the current fb will block
  282. * in the execbuffer ioctl until the page flip happens. If a page
  283. * flip is already pending as the ioctl is called, EBUSY will be
  284. * returned.
  285. *
  286. * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
  287. * request that drm sends back a vblank event (see drm.h: struct
  288. * drm_event_vblank) when the page flip is done. The user_data field
  289. * passed in with this ioctl will be returned as the user_data field
  290. * in the vblank event struct.
  291. *
  292. * The reserved field must be zero until we figure out something
  293. * clever to use it for.
  294. */
  295. struct drm_mode_crtc_page_flip {
  296. __u32 crtc_id;
  297. __u32 fb_id;
  298. __u32 flags;
  299. __u32 reserved;
  300. __u64 user_data;
  301. };
  302. /* create a dumb scanout buffer */
  303. struct drm_mode_create_dumb {
  304. uint32_t height;
  305. uint32_t width;
  306. uint32_t bpp;
  307. uint32_t flags;
  308. /* handle, pitch, size will be returned */
  309. uint32_t handle;
  310. uint32_t pitch;
  311. uint64_t size;
  312. };
  313. /* set up for mmap of a dumb scanout buffer */
  314. struct drm_mode_map_dumb {
  315. /** Handle for the object being mapped. */
  316. __u32 handle;
  317. __u32 pad;
  318. /**
  319. * Fake offset to use for subsequent mmap call
  320. *
  321. * This is a fixed-size type for 32/64 compatibility.
  322. */
  323. __u64 offset;
  324. };
  325. struct drm_mode_destroy_dumb {
  326. uint32_t handle;
  327. };
  328. #endif