events.c 40 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_MUTEX(irq_mapping_update_lock);
  54. static LIST_HEAD(xen_irq_list_head);
  55. /* IRQ <-> VIRQ mapping. */
  56. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  57. /* IRQ <-> IPI mapping */
  58. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  59. /* Interrupt types. */
  60. enum xen_irq_type {
  61. IRQT_UNBOUND = 0,
  62. IRQT_PIRQ,
  63. IRQT_VIRQ,
  64. IRQT_IPI,
  65. IRQT_EVTCHN
  66. };
  67. /*
  68. * Packed IRQ information:
  69. * type - enum xen_irq_type
  70. * event channel - irq->event channel mapping
  71. * cpu - cpu this event channel is bound to
  72. * index - type-specific information:
  73. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  74. * guest, or GSI (real passthrough IRQ) of the device.
  75. * VIRQ - virq number
  76. * IPI - IPI vector
  77. * EVTCHN -
  78. */
  79. struct irq_info {
  80. struct list_head list;
  81. enum xen_irq_type type; /* type */
  82. unsigned irq;
  83. unsigned short evtchn; /* event channel */
  84. unsigned short cpu; /* cpu bound */
  85. union {
  86. unsigned short virq;
  87. enum ipi_vector ipi;
  88. struct {
  89. unsigned short pirq;
  90. unsigned short gsi;
  91. unsigned char vector;
  92. unsigned char flags;
  93. uint16_t domid;
  94. } pirq;
  95. } u;
  96. };
  97. #define PIRQ_NEEDS_EOI (1 << 0)
  98. #define PIRQ_SHAREABLE (1 << 1)
  99. static int *evtchn_to_irq;
  100. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  101. cpu_evtchn_mask);
  102. /* Xen will never allocate port zero for any purpose. */
  103. #define VALID_EVTCHN(chn) ((chn) != 0)
  104. static struct irq_chip xen_dynamic_chip;
  105. static struct irq_chip xen_percpu_chip;
  106. static struct irq_chip xen_pirq_chip;
  107. static void enable_dynirq(struct irq_data *data);
  108. static void disable_dynirq(struct irq_data *data);
  109. /* Get info for IRQ */
  110. static struct irq_info *info_for_irq(unsigned irq)
  111. {
  112. return irq_get_handler_data(irq);
  113. }
  114. /* Constructors for packed IRQ information. */
  115. static void xen_irq_info_common_init(struct irq_info *info,
  116. unsigned irq,
  117. enum xen_irq_type type,
  118. unsigned short evtchn,
  119. unsigned short cpu)
  120. {
  121. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  122. info->type = type;
  123. info->irq = irq;
  124. info->evtchn = evtchn;
  125. info->cpu = cpu;
  126. evtchn_to_irq[evtchn] = irq;
  127. }
  128. static void xen_irq_info_evtchn_init(unsigned irq,
  129. unsigned short evtchn)
  130. {
  131. struct irq_info *info = info_for_irq(irq);
  132. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  133. }
  134. static void xen_irq_info_ipi_init(unsigned cpu,
  135. unsigned irq,
  136. unsigned short evtchn,
  137. enum ipi_vector ipi)
  138. {
  139. struct irq_info *info = info_for_irq(irq);
  140. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  141. info->u.ipi = ipi;
  142. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  143. }
  144. static void xen_irq_info_virq_init(unsigned cpu,
  145. unsigned irq,
  146. unsigned short evtchn,
  147. unsigned short virq)
  148. {
  149. struct irq_info *info = info_for_irq(irq);
  150. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  151. info->u.virq = virq;
  152. per_cpu(virq_to_irq, cpu)[virq] = irq;
  153. }
  154. static void xen_irq_info_pirq_init(unsigned irq,
  155. unsigned short evtchn,
  156. unsigned short pirq,
  157. unsigned short gsi,
  158. unsigned short vector,
  159. uint16_t domid,
  160. unsigned char flags)
  161. {
  162. struct irq_info *info = info_for_irq(irq);
  163. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  164. info->u.pirq.pirq = pirq;
  165. info->u.pirq.gsi = gsi;
  166. info->u.pirq.vector = vector;
  167. info->u.pirq.domid = domid;
  168. info->u.pirq.flags = flags;
  169. }
  170. /*
  171. * Accessors for packed IRQ information.
  172. */
  173. static unsigned int evtchn_from_irq(unsigned irq)
  174. {
  175. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  176. return 0;
  177. return info_for_irq(irq)->evtchn;
  178. }
  179. unsigned irq_from_evtchn(unsigned int evtchn)
  180. {
  181. return evtchn_to_irq[evtchn];
  182. }
  183. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  184. static enum ipi_vector ipi_from_irq(unsigned irq)
  185. {
  186. struct irq_info *info = info_for_irq(irq);
  187. BUG_ON(info == NULL);
  188. BUG_ON(info->type != IRQT_IPI);
  189. return info->u.ipi;
  190. }
  191. static unsigned virq_from_irq(unsigned irq)
  192. {
  193. struct irq_info *info = info_for_irq(irq);
  194. BUG_ON(info == NULL);
  195. BUG_ON(info->type != IRQT_VIRQ);
  196. return info->u.virq;
  197. }
  198. static unsigned pirq_from_irq(unsigned irq)
  199. {
  200. struct irq_info *info = info_for_irq(irq);
  201. BUG_ON(info == NULL);
  202. BUG_ON(info->type != IRQT_PIRQ);
  203. return info->u.pirq.pirq;
  204. }
  205. static enum xen_irq_type type_from_irq(unsigned irq)
  206. {
  207. return info_for_irq(irq)->type;
  208. }
  209. static unsigned cpu_from_irq(unsigned irq)
  210. {
  211. return info_for_irq(irq)->cpu;
  212. }
  213. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  214. {
  215. int irq = evtchn_to_irq[evtchn];
  216. unsigned ret = 0;
  217. if (irq != -1)
  218. ret = cpu_from_irq(irq);
  219. return ret;
  220. }
  221. static bool pirq_needs_eoi(unsigned irq)
  222. {
  223. struct irq_info *info = info_for_irq(irq);
  224. BUG_ON(info->type != IRQT_PIRQ);
  225. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  226. }
  227. static inline unsigned long active_evtchns(unsigned int cpu,
  228. struct shared_info *sh,
  229. unsigned int idx)
  230. {
  231. return sh->evtchn_pending[idx] &
  232. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  233. ~sh->evtchn_mask[idx];
  234. }
  235. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  236. {
  237. int irq = evtchn_to_irq[chn];
  238. BUG_ON(irq == -1);
  239. #ifdef CONFIG_SMP
  240. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  241. #endif
  242. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  243. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  244. info_for_irq(irq)->cpu = cpu;
  245. }
  246. static void init_evtchn_cpu_bindings(void)
  247. {
  248. int i;
  249. #ifdef CONFIG_SMP
  250. struct irq_info *info;
  251. /* By default all event channels notify CPU#0. */
  252. list_for_each_entry(info, &xen_irq_list_head, list) {
  253. struct irq_desc *desc = irq_to_desc(info->irq);
  254. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  255. }
  256. #endif
  257. for_each_possible_cpu(i)
  258. memset(per_cpu(cpu_evtchn_mask, i),
  259. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  260. }
  261. static inline void clear_evtchn(int port)
  262. {
  263. struct shared_info *s = HYPERVISOR_shared_info;
  264. sync_clear_bit(port, &s->evtchn_pending[0]);
  265. }
  266. static inline void set_evtchn(int port)
  267. {
  268. struct shared_info *s = HYPERVISOR_shared_info;
  269. sync_set_bit(port, &s->evtchn_pending[0]);
  270. }
  271. static inline int test_evtchn(int port)
  272. {
  273. struct shared_info *s = HYPERVISOR_shared_info;
  274. return sync_test_bit(port, &s->evtchn_pending[0]);
  275. }
  276. /**
  277. * notify_remote_via_irq - send event to remote end of event channel via irq
  278. * @irq: irq of event channel to send event to
  279. *
  280. * Unlike notify_remote_via_evtchn(), this is safe to use across
  281. * save/restore. Notifications on a broken connection are silently
  282. * dropped.
  283. */
  284. void notify_remote_via_irq(int irq)
  285. {
  286. int evtchn = evtchn_from_irq(irq);
  287. if (VALID_EVTCHN(evtchn))
  288. notify_remote_via_evtchn(evtchn);
  289. }
  290. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  291. static void mask_evtchn(int port)
  292. {
  293. struct shared_info *s = HYPERVISOR_shared_info;
  294. sync_set_bit(port, &s->evtchn_mask[0]);
  295. }
  296. static void unmask_evtchn(int port)
  297. {
  298. struct shared_info *s = HYPERVISOR_shared_info;
  299. unsigned int cpu = get_cpu();
  300. BUG_ON(!irqs_disabled());
  301. /* Slow path (hypercall) if this is a non-local port. */
  302. if (unlikely(cpu != cpu_from_evtchn(port))) {
  303. struct evtchn_unmask unmask = { .port = port };
  304. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  305. } else {
  306. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  307. sync_clear_bit(port, &s->evtchn_mask[0]);
  308. /*
  309. * The following is basically the equivalent of
  310. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  311. * the interrupt edge' if the channel is masked.
  312. */
  313. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  314. !sync_test_and_set_bit(port / BITS_PER_LONG,
  315. &vcpu_info->evtchn_pending_sel))
  316. vcpu_info->evtchn_upcall_pending = 1;
  317. }
  318. put_cpu();
  319. }
  320. static void xen_irq_init(unsigned irq)
  321. {
  322. struct irq_info *info;
  323. #ifdef CONFIG_SMP
  324. struct irq_desc *desc = irq_to_desc(irq);
  325. /* By default all event channels notify CPU#0. */
  326. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  327. #endif
  328. info = kzalloc(sizeof(*info), GFP_KERNEL);
  329. if (info == NULL)
  330. panic("Unable to allocate metadata for IRQ%d\n", irq);
  331. info->type = IRQT_UNBOUND;
  332. irq_set_handler_data(irq, info);
  333. list_add_tail(&info->list, &xen_irq_list_head);
  334. }
  335. static int __must_check xen_allocate_irq_dynamic(void)
  336. {
  337. int first = 0;
  338. int irq;
  339. #ifdef CONFIG_X86_IO_APIC
  340. /*
  341. * For an HVM guest or domain 0 which see "real" (emulated or
  342. * actual respectively) GSIs we allocate dynamic IRQs
  343. * e.g. those corresponding to event channels or MSIs
  344. * etc. from the range above those "real" GSIs to avoid
  345. * collisions.
  346. */
  347. if (xen_initial_domain() || xen_hvm_domain())
  348. first = get_nr_irqs_gsi();
  349. #endif
  350. irq = irq_alloc_desc_from(first, -1);
  351. if (irq >= 0)
  352. xen_irq_init(irq);
  353. return irq;
  354. }
  355. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  356. {
  357. int irq;
  358. /*
  359. * A PV guest has no concept of a GSI (since it has no ACPI
  360. * nor access to/knowledge of the physical APICs). Therefore
  361. * all IRQs are dynamically allocated from the entire IRQ
  362. * space.
  363. */
  364. if (xen_pv_domain() && !xen_initial_domain())
  365. return xen_allocate_irq_dynamic();
  366. /* Legacy IRQ descriptors are already allocated by the arch. */
  367. if (gsi < NR_IRQS_LEGACY)
  368. irq = gsi;
  369. else
  370. irq = irq_alloc_desc_at(gsi, -1);
  371. xen_irq_init(irq);
  372. return irq;
  373. }
  374. static void xen_free_irq(unsigned irq)
  375. {
  376. struct irq_info *info = irq_get_handler_data(irq);
  377. list_del(&info->list);
  378. irq_set_handler_data(irq, NULL);
  379. kfree(info);
  380. /* Legacy IRQ descriptors are managed by the arch. */
  381. if (irq < NR_IRQS_LEGACY)
  382. return;
  383. irq_free_desc(irq);
  384. }
  385. static void pirq_query_unmask(int irq)
  386. {
  387. struct physdev_irq_status_query irq_status;
  388. struct irq_info *info = info_for_irq(irq);
  389. BUG_ON(info->type != IRQT_PIRQ);
  390. irq_status.irq = pirq_from_irq(irq);
  391. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  392. irq_status.flags = 0;
  393. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  394. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  395. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  396. }
  397. static bool probing_irq(int irq)
  398. {
  399. struct irq_desc *desc = irq_to_desc(irq);
  400. return desc && desc->action == NULL;
  401. }
  402. static void eoi_pirq(struct irq_data *data)
  403. {
  404. int evtchn = evtchn_from_irq(data->irq);
  405. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  406. int rc = 0;
  407. irq_move_irq(data);
  408. if (VALID_EVTCHN(evtchn))
  409. clear_evtchn(evtchn);
  410. if (pirq_needs_eoi(data->irq)) {
  411. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  412. WARN_ON(rc);
  413. }
  414. }
  415. static void mask_ack_pirq(struct irq_data *data)
  416. {
  417. disable_dynirq(data);
  418. eoi_pirq(data);
  419. }
  420. static unsigned int __startup_pirq(unsigned int irq)
  421. {
  422. struct evtchn_bind_pirq bind_pirq;
  423. struct irq_info *info = info_for_irq(irq);
  424. int evtchn = evtchn_from_irq(irq);
  425. int rc;
  426. BUG_ON(info->type != IRQT_PIRQ);
  427. if (VALID_EVTCHN(evtchn))
  428. goto out;
  429. bind_pirq.pirq = pirq_from_irq(irq);
  430. /* NB. We are happy to share unless we are probing. */
  431. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  432. BIND_PIRQ__WILL_SHARE : 0;
  433. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  434. if (rc != 0) {
  435. if (!probing_irq(irq))
  436. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  437. irq);
  438. return 0;
  439. }
  440. evtchn = bind_pirq.port;
  441. pirq_query_unmask(irq);
  442. evtchn_to_irq[evtchn] = irq;
  443. bind_evtchn_to_cpu(evtchn, 0);
  444. info->evtchn = evtchn;
  445. out:
  446. unmask_evtchn(evtchn);
  447. eoi_pirq(irq_get_irq_data(irq));
  448. return 0;
  449. }
  450. static unsigned int startup_pirq(struct irq_data *data)
  451. {
  452. return __startup_pirq(data->irq);
  453. }
  454. static void shutdown_pirq(struct irq_data *data)
  455. {
  456. struct evtchn_close close;
  457. unsigned int irq = data->irq;
  458. struct irq_info *info = info_for_irq(irq);
  459. int evtchn = evtchn_from_irq(irq);
  460. BUG_ON(info->type != IRQT_PIRQ);
  461. if (!VALID_EVTCHN(evtchn))
  462. return;
  463. mask_evtchn(evtchn);
  464. close.port = evtchn;
  465. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  466. BUG();
  467. bind_evtchn_to_cpu(evtchn, 0);
  468. evtchn_to_irq[evtchn] = -1;
  469. info->evtchn = 0;
  470. }
  471. static void enable_pirq(struct irq_data *data)
  472. {
  473. startup_pirq(data);
  474. }
  475. static void disable_pirq(struct irq_data *data)
  476. {
  477. disable_dynirq(data);
  478. }
  479. static int find_irq_by_gsi(unsigned gsi)
  480. {
  481. struct irq_info *info;
  482. list_for_each_entry(info, &xen_irq_list_head, list) {
  483. if (info->type != IRQT_PIRQ)
  484. continue;
  485. if (info->u.pirq.gsi == gsi)
  486. return info->irq;
  487. }
  488. return -1;
  489. }
  490. /*
  491. * Do not make any assumptions regarding the relationship between the
  492. * IRQ number returned here and the Xen pirq argument.
  493. *
  494. * Note: We don't assign an event channel until the irq actually started
  495. * up. Return an existing irq if we've already got one for the gsi.
  496. *
  497. * Shareable implies level triggered, not shareable implies edge
  498. * triggered here.
  499. */
  500. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  501. unsigned pirq, int shareable, char *name)
  502. {
  503. int irq = -1;
  504. struct physdev_irq irq_op;
  505. mutex_lock(&irq_mapping_update_lock);
  506. irq = find_irq_by_gsi(gsi);
  507. if (irq != -1) {
  508. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  509. irq, gsi);
  510. goto out; /* XXX need refcount? */
  511. }
  512. irq = xen_allocate_irq_gsi(gsi);
  513. if (irq < 0)
  514. goto out;
  515. irq_op.irq = irq;
  516. irq_op.vector = 0;
  517. /* Only the privileged domain can do this. For non-priv, the pcifront
  518. * driver provides a PCI bus that does the call to do exactly
  519. * this in the priv domain. */
  520. if (xen_initial_domain() &&
  521. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  522. xen_free_irq(irq);
  523. irq = -ENOSPC;
  524. goto out;
  525. }
  526. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  527. shareable ? PIRQ_SHAREABLE : 0);
  528. pirq_query_unmask(irq);
  529. /* We try to use the handler with the appropriate semantic for the
  530. * type of interrupt: if the interrupt is an edge triggered
  531. * interrupt we use handle_edge_irq.
  532. *
  533. * On the other hand if the interrupt is level triggered we use
  534. * handle_fasteoi_irq like the native code does for this kind of
  535. * interrupts.
  536. *
  537. * Depending on the Xen version, pirq_needs_eoi might return true
  538. * not only for level triggered interrupts but for edge triggered
  539. * interrupts too. In any case Xen always honors the eoi mechanism,
  540. * not injecting any more pirqs of the same kind if the first one
  541. * hasn't received an eoi yet. Therefore using the fasteoi handler
  542. * is the right choice either way.
  543. */
  544. if (shareable)
  545. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  546. handle_fasteoi_irq, name);
  547. else
  548. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  549. handle_edge_irq, name);
  550. out:
  551. mutex_unlock(&irq_mapping_update_lock);
  552. return irq;
  553. }
  554. #ifdef CONFIG_PCI_MSI
  555. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  556. {
  557. int rc;
  558. struct physdev_get_free_pirq op_get_free_pirq;
  559. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  560. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  561. WARN_ONCE(rc == -ENOSYS,
  562. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  563. return rc ? -1 : op_get_free_pirq.pirq;
  564. }
  565. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  566. int pirq, int vector, const char *name,
  567. domid_t domid)
  568. {
  569. int irq, ret;
  570. mutex_lock(&irq_mapping_update_lock);
  571. irq = xen_allocate_irq_dynamic();
  572. if (irq < 0)
  573. goto out;
  574. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  575. name);
  576. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  577. ret = irq_set_msi_desc(irq, msidesc);
  578. if (ret < 0)
  579. goto error_irq;
  580. out:
  581. mutex_unlock(&irq_mapping_update_lock);
  582. return irq;
  583. error_irq:
  584. mutex_unlock(&irq_mapping_update_lock);
  585. xen_free_irq(irq);
  586. return ret;
  587. }
  588. #endif
  589. int xen_destroy_irq(int irq)
  590. {
  591. struct irq_desc *desc;
  592. struct physdev_unmap_pirq unmap_irq;
  593. struct irq_info *info = info_for_irq(irq);
  594. int rc = -ENOENT;
  595. mutex_lock(&irq_mapping_update_lock);
  596. desc = irq_to_desc(irq);
  597. if (!desc)
  598. goto out;
  599. if (xen_initial_domain()) {
  600. unmap_irq.pirq = info->u.pirq.pirq;
  601. unmap_irq.domid = info->u.pirq.domid;
  602. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  603. /* If another domain quits without making the pci_disable_msix
  604. * call, the Xen hypervisor takes care of freeing the PIRQs
  605. * (free_domain_pirqs).
  606. */
  607. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  608. printk(KERN_INFO "domain %d does not have %d anymore\n",
  609. info->u.pirq.domid, info->u.pirq.pirq);
  610. else if (rc) {
  611. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  612. goto out;
  613. }
  614. }
  615. xen_free_irq(irq);
  616. out:
  617. mutex_unlock(&irq_mapping_update_lock);
  618. return rc;
  619. }
  620. int xen_irq_from_pirq(unsigned pirq)
  621. {
  622. int irq;
  623. struct irq_info *info;
  624. mutex_lock(&irq_mapping_update_lock);
  625. list_for_each_entry(info, &xen_irq_list_head, list) {
  626. if (info->type != IRQT_PIRQ)
  627. continue;
  628. irq = info->irq;
  629. if (info->u.pirq.pirq == pirq)
  630. goto out;
  631. }
  632. irq = -1;
  633. out:
  634. mutex_unlock(&irq_mapping_update_lock);
  635. return irq;
  636. }
  637. int xen_pirq_from_irq(unsigned irq)
  638. {
  639. return pirq_from_irq(irq);
  640. }
  641. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  642. int bind_evtchn_to_irq(unsigned int evtchn)
  643. {
  644. int irq;
  645. mutex_lock(&irq_mapping_update_lock);
  646. irq = evtchn_to_irq[evtchn];
  647. if (irq == -1) {
  648. irq = xen_allocate_irq_dynamic();
  649. if (irq == -1)
  650. goto out;
  651. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  652. handle_edge_irq, "event");
  653. xen_irq_info_evtchn_init(irq, evtchn);
  654. }
  655. out:
  656. mutex_unlock(&irq_mapping_update_lock);
  657. return irq;
  658. }
  659. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  660. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  661. {
  662. struct evtchn_bind_ipi bind_ipi;
  663. int evtchn, irq;
  664. mutex_lock(&irq_mapping_update_lock);
  665. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  666. if (irq == -1) {
  667. irq = xen_allocate_irq_dynamic();
  668. if (irq < 0)
  669. goto out;
  670. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  671. handle_percpu_irq, "ipi");
  672. bind_ipi.vcpu = cpu;
  673. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  674. &bind_ipi) != 0)
  675. BUG();
  676. evtchn = bind_ipi.port;
  677. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  678. bind_evtchn_to_cpu(evtchn, cpu);
  679. }
  680. out:
  681. mutex_unlock(&irq_mapping_update_lock);
  682. return irq;
  683. }
  684. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  685. unsigned int remote_port)
  686. {
  687. struct evtchn_bind_interdomain bind_interdomain;
  688. int err;
  689. bind_interdomain.remote_dom = remote_domain;
  690. bind_interdomain.remote_port = remote_port;
  691. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  692. &bind_interdomain);
  693. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  694. }
  695. static int find_virq(unsigned int virq, unsigned int cpu)
  696. {
  697. struct evtchn_status status;
  698. int port, rc = -ENOENT;
  699. memset(&status, 0, sizeof(status));
  700. for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
  701. status.dom = DOMID_SELF;
  702. status.port = port;
  703. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  704. if (rc < 0)
  705. continue;
  706. if (status.status != EVTCHNSTAT_virq)
  707. continue;
  708. if (status.u.virq == virq && status.vcpu == cpu) {
  709. rc = port;
  710. break;
  711. }
  712. }
  713. return rc;
  714. }
  715. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  716. {
  717. struct evtchn_bind_virq bind_virq;
  718. int evtchn, irq, ret;
  719. mutex_lock(&irq_mapping_update_lock);
  720. irq = per_cpu(virq_to_irq, cpu)[virq];
  721. if (irq == -1) {
  722. irq = xen_allocate_irq_dynamic();
  723. if (irq == -1)
  724. goto out;
  725. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  726. handle_percpu_irq, "virq");
  727. bind_virq.virq = virq;
  728. bind_virq.vcpu = cpu;
  729. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  730. &bind_virq);
  731. if (ret == 0)
  732. evtchn = bind_virq.port;
  733. else {
  734. if (ret == -EEXIST)
  735. ret = find_virq(virq, cpu);
  736. BUG_ON(ret < 0);
  737. evtchn = ret;
  738. }
  739. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  740. bind_evtchn_to_cpu(evtchn, cpu);
  741. }
  742. out:
  743. mutex_unlock(&irq_mapping_update_lock);
  744. return irq;
  745. }
  746. static void unbind_from_irq(unsigned int irq)
  747. {
  748. struct evtchn_close close;
  749. int evtchn = evtchn_from_irq(irq);
  750. mutex_lock(&irq_mapping_update_lock);
  751. if (VALID_EVTCHN(evtchn)) {
  752. close.port = evtchn;
  753. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  754. BUG();
  755. switch (type_from_irq(irq)) {
  756. case IRQT_VIRQ:
  757. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  758. [virq_from_irq(irq)] = -1;
  759. break;
  760. case IRQT_IPI:
  761. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  762. [ipi_from_irq(irq)] = -1;
  763. break;
  764. default:
  765. break;
  766. }
  767. /* Closed ports are implicitly re-bound to VCPU0. */
  768. bind_evtchn_to_cpu(evtchn, 0);
  769. evtchn_to_irq[evtchn] = -1;
  770. }
  771. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  772. xen_free_irq(irq);
  773. mutex_unlock(&irq_mapping_update_lock);
  774. }
  775. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  776. irq_handler_t handler,
  777. unsigned long irqflags,
  778. const char *devname, void *dev_id)
  779. {
  780. int irq, retval;
  781. irq = bind_evtchn_to_irq(evtchn);
  782. if (irq < 0)
  783. return irq;
  784. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  785. if (retval != 0) {
  786. unbind_from_irq(irq);
  787. return retval;
  788. }
  789. return irq;
  790. }
  791. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  792. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  793. unsigned int remote_port,
  794. irq_handler_t handler,
  795. unsigned long irqflags,
  796. const char *devname,
  797. void *dev_id)
  798. {
  799. int irq, retval;
  800. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  801. if (irq < 0)
  802. return irq;
  803. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  804. if (retval != 0) {
  805. unbind_from_irq(irq);
  806. return retval;
  807. }
  808. return irq;
  809. }
  810. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  811. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  812. irq_handler_t handler,
  813. unsigned long irqflags, const char *devname, void *dev_id)
  814. {
  815. int irq, retval;
  816. irq = bind_virq_to_irq(virq, cpu);
  817. if (irq < 0)
  818. return irq;
  819. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  820. if (retval != 0) {
  821. unbind_from_irq(irq);
  822. return retval;
  823. }
  824. return irq;
  825. }
  826. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  827. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  828. unsigned int cpu,
  829. irq_handler_t handler,
  830. unsigned long irqflags,
  831. const char *devname,
  832. void *dev_id)
  833. {
  834. int irq, retval;
  835. irq = bind_ipi_to_irq(ipi, cpu);
  836. if (irq < 0)
  837. return irq;
  838. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  839. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  840. if (retval != 0) {
  841. unbind_from_irq(irq);
  842. return retval;
  843. }
  844. return irq;
  845. }
  846. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  847. {
  848. free_irq(irq, dev_id);
  849. unbind_from_irq(irq);
  850. }
  851. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  852. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  853. {
  854. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  855. BUG_ON(irq < 0);
  856. notify_remote_via_irq(irq);
  857. }
  858. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  859. {
  860. struct shared_info *sh = HYPERVISOR_shared_info;
  861. int cpu = smp_processor_id();
  862. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  863. int i;
  864. unsigned long flags;
  865. static DEFINE_SPINLOCK(debug_lock);
  866. struct vcpu_info *v;
  867. spin_lock_irqsave(&debug_lock, flags);
  868. printk("\nvcpu %d\n ", cpu);
  869. for_each_online_cpu(i) {
  870. int pending;
  871. v = per_cpu(xen_vcpu, i);
  872. pending = (get_irq_regs() && i == cpu)
  873. ? xen_irqs_disabled(get_irq_regs())
  874. : v->evtchn_upcall_mask;
  875. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  876. pending, v->evtchn_upcall_pending,
  877. (int)(sizeof(v->evtchn_pending_sel)*2),
  878. v->evtchn_pending_sel);
  879. }
  880. v = per_cpu(xen_vcpu, cpu);
  881. printk("\npending:\n ");
  882. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  883. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  884. sh->evtchn_pending[i],
  885. i % 8 == 0 ? "\n " : " ");
  886. printk("\nglobal mask:\n ");
  887. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  888. printk("%0*lx%s",
  889. (int)(sizeof(sh->evtchn_mask[0])*2),
  890. sh->evtchn_mask[i],
  891. i % 8 == 0 ? "\n " : " ");
  892. printk("\nglobally unmasked:\n ");
  893. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  894. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  895. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  896. i % 8 == 0 ? "\n " : " ");
  897. printk("\nlocal cpu%d mask:\n ", cpu);
  898. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  899. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  900. cpu_evtchn[i],
  901. i % 8 == 0 ? "\n " : " ");
  902. printk("\nlocally unmasked:\n ");
  903. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  904. unsigned long pending = sh->evtchn_pending[i]
  905. & ~sh->evtchn_mask[i]
  906. & cpu_evtchn[i];
  907. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  908. pending, i % 8 == 0 ? "\n " : " ");
  909. }
  910. printk("\npending list:\n");
  911. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  912. if (sync_test_bit(i, sh->evtchn_pending)) {
  913. int word_idx = i / BITS_PER_LONG;
  914. printk(" %d: event %d -> irq %d%s%s%s\n",
  915. cpu_from_evtchn(i), i,
  916. evtchn_to_irq[i],
  917. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  918. ? "" : " l2-clear",
  919. !sync_test_bit(i, sh->evtchn_mask)
  920. ? "" : " globally-masked",
  921. sync_test_bit(i, cpu_evtchn)
  922. ? "" : " locally-masked");
  923. }
  924. }
  925. spin_unlock_irqrestore(&debug_lock, flags);
  926. return IRQ_HANDLED;
  927. }
  928. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  929. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  930. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  931. /*
  932. * Mask out the i least significant bits of w
  933. */
  934. #define MASK_LSBS(w, i) (w & ((~0UL) << i))
  935. /*
  936. * Search the CPUs pending events bitmasks. For each one found, map
  937. * the event number to an irq, and feed it into do_IRQ() for
  938. * handling.
  939. *
  940. * Xen uses a two-level bitmap to speed searching. The first level is
  941. * a bitset of words which contain pending event bits. The second
  942. * level is a bitset of pending events themselves.
  943. */
  944. static void __xen_evtchn_do_upcall(void)
  945. {
  946. int start_word_idx, start_bit_idx;
  947. int word_idx, bit_idx;
  948. int i;
  949. int cpu = get_cpu();
  950. struct shared_info *s = HYPERVISOR_shared_info;
  951. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  952. unsigned count;
  953. do {
  954. unsigned long pending_words;
  955. vcpu_info->evtchn_upcall_pending = 0;
  956. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  957. goto out;
  958. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  959. /* Clear master flag /before/ clearing selector flag. */
  960. wmb();
  961. #endif
  962. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  963. start_word_idx = __this_cpu_read(current_word_idx);
  964. start_bit_idx = __this_cpu_read(current_bit_idx);
  965. word_idx = start_word_idx;
  966. for (i = 0; pending_words != 0; i++) {
  967. unsigned long pending_bits;
  968. unsigned long words;
  969. words = MASK_LSBS(pending_words, word_idx);
  970. /*
  971. * If we masked out all events, wrap to beginning.
  972. */
  973. if (words == 0) {
  974. word_idx = 0;
  975. bit_idx = 0;
  976. continue;
  977. }
  978. word_idx = __ffs(words);
  979. pending_bits = active_evtchns(cpu, s, word_idx);
  980. bit_idx = 0; /* usually scan entire word from start */
  981. if (word_idx == start_word_idx) {
  982. /* We scan the starting word in two parts */
  983. if (i == 0)
  984. /* 1st time: start in the middle */
  985. bit_idx = start_bit_idx;
  986. else
  987. /* 2nd time: mask bits done already */
  988. bit_idx &= (1UL << start_bit_idx) - 1;
  989. }
  990. do {
  991. unsigned long bits;
  992. int port, irq;
  993. struct irq_desc *desc;
  994. bits = MASK_LSBS(pending_bits, bit_idx);
  995. /* If we masked out all events, move on. */
  996. if (bits == 0)
  997. break;
  998. bit_idx = __ffs(bits);
  999. /* Process port. */
  1000. port = (word_idx * BITS_PER_LONG) + bit_idx;
  1001. irq = evtchn_to_irq[port];
  1002. if (irq != -1) {
  1003. desc = irq_to_desc(irq);
  1004. if (desc)
  1005. generic_handle_irq_desc(irq, desc);
  1006. }
  1007. bit_idx = (bit_idx + 1) % BITS_PER_LONG;
  1008. /* Next caller starts at last processed + 1 */
  1009. __this_cpu_write(current_word_idx,
  1010. bit_idx ? word_idx :
  1011. (word_idx+1) % BITS_PER_LONG);
  1012. __this_cpu_write(current_bit_idx, bit_idx);
  1013. } while (bit_idx != 0);
  1014. /* Scan start_l1i twice; all others once. */
  1015. if ((word_idx != start_word_idx) || (i != 0))
  1016. pending_words &= ~(1UL << word_idx);
  1017. word_idx = (word_idx + 1) % BITS_PER_LONG;
  1018. }
  1019. BUG_ON(!irqs_disabled());
  1020. count = __this_cpu_read(xed_nesting_count);
  1021. __this_cpu_write(xed_nesting_count, 0);
  1022. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1023. out:
  1024. put_cpu();
  1025. }
  1026. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1027. {
  1028. struct pt_regs *old_regs = set_irq_regs(regs);
  1029. exit_idle();
  1030. irq_enter();
  1031. __xen_evtchn_do_upcall();
  1032. irq_exit();
  1033. set_irq_regs(old_regs);
  1034. }
  1035. void xen_hvm_evtchn_do_upcall(void)
  1036. {
  1037. __xen_evtchn_do_upcall();
  1038. }
  1039. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1040. /* Rebind a new event channel to an existing irq. */
  1041. void rebind_evtchn_irq(int evtchn, int irq)
  1042. {
  1043. struct irq_info *info = info_for_irq(irq);
  1044. /* Make sure the irq is masked, since the new event channel
  1045. will also be masked. */
  1046. disable_irq(irq);
  1047. mutex_lock(&irq_mapping_update_lock);
  1048. /* After resume the irq<->evtchn mappings are all cleared out */
  1049. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1050. /* Expect irq to have been bound before,
  1051. so there should be a proper type */
  1052. BUG_ON(info->type == IRQT_UNBOUND);
  1053. xen_irq_info_evtchn_init(irq, evtchn);
  1054. mutex_unlock(&irq_mapping_update_lock);
  1055. /* new event channels are always bound to cpu 0 */
  1056. irq_set_affinity(irq, cpumask_of(0));
  1057. /* Unmask the event channel. */
  1058. enable_irq(irq);
  1059. }
  1060. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1061. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1062. {
  1063. struct evtchn_bind_vcpu bind_vcpu;
  1064. int evtchn = evtchn_from_irq(irq);
  1065. if (!VALID_EVTCHN(evtchn))
  1066. return -1;
  1067. /*
  1068. * Events delivered via platform PCI interrupts are always
  1069. * routed to vcpu 0 and hence cannot be rebound.
  1070. */
  1071. if (xen_hvm_domain() && !xen_have_vector_callback)
  1072. return -1;
  1073. /* Send future instances of this interrupt to other vcpu. */
  1074. bind_vcpu.port = evtchn;
  1075. bind_vcpu.vcpu = tcpu;
  1076. /*
  1077. * If this fails, it usually just indicates that we're dealing with a
  1078. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1079. * it, but don't do the xenlinux-level rebind in that case.
  1080. */
  1081. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1082. bind_evtchn_to_cpu(evtchn, tcpu);
  1083. return 0;
  1084. }
  1085. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1086. bool force)
  1087. {
  1088. unsigned tcpu = cpumask_first(dest);
  1089. return rebind_irq_to_cpu(data->irq, tcpu);
  1090. }
  1091. int resend_irq_on_evtchn(unsigned int irq)
  1092. {
  1093. int masked, evtchn = evtchn_from_irq(irq);
  1094. struct shared_info *s = HYPERVISOR_shared_info;
  1095. if (!VALID_EVTCHN(evtchn))
  1096. return 1;
  1097. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1098. sync_set_bit(evtchn, s->evtchn_pending);
  1099. if (!masked)
  1100. unmask_evtchn(evtchn);
  1101. return 1;
  1102. }
  1103. static void enable_dynirq(struct irq_data *data)
  1104. {
  1105. int evtchn = evtchn_from_irq(data->irq);
  1106. if (VALID_EVTCHN(evtchn))
  1107. unmask_evtchn(evtchn);
  1108. }
  1109. static void disable_dynirq(struct irq_data *data)
  1110. {
  1111. int evtchn = evtchn_from_irq(data->irq);
  1112. if (VALID_EVTCHN(evtchn))
  1113. mask_evtchn(evtchn);
  1114. }
  1115. static void ack_dynirq(struct irq_data *data)
  1116. {
  1117. int evtchn = evtchn_from_irq(data->irq);
  1118. irq_move_irq(data);
  1119. if (VALID_EVTCHN(evtchn))
  1120. clear_evtchn(evtchn);
  1121. }
  1122. static void mask_ack_dynirq(struct irq_data *data)
  1123. {
  1124. disable_dynirq(data);
  1125. ack_dynirq(data);
  1126. }
  1127. static int retrigger_dynirq(struct irq_data *data)
  1128. {
  1129. int evtchn = evtchn_from_irq(data->irq);
  1130. struct shared_info *sh = HYPERVISOR_shared_info;
  1131. int ret = 0;
  1132. if (VALID_EVTCHN(evtchn)) {
  1133. int masked;
  1134. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1135. sync_set_bit(evtchn, sh->evtchn_pending);
  1136. if (!masked)
  1137. unmask_evtchn(evtchn);
  1138. ret = 1;
  1139. }
  1140. return ret;
  1141. }
  1142. static void restore_pirqs(void)
  1143. {
  1144. int pirq, rc, irq, gsi;
  1145. struct physdev_map_pirq map_irq;
  1146. struct irq_info *info;
  1147. list_for_each_entry(info, &xen_irq_list_head, list) {
  1148. if (info->type != IRQT_PIRQ)
  1149. continue;
  1150. pirq = info->u.pirq.pirq;
  1151. gsi = info->u.pirq.gsi;
  1152. irq = info->irq;
  1153. /* save/restore of PT devices doesn't work, so at this point the
  1154. * only devices present are GSI based emulated devices */
  1155. if (!gsi)
  1156. continue;
  1157. map_irq.domid = DOMID_SELF;
  1158. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1159. map_irq.index = gsi;
  1160. map_irq.pirq = pirq;
  1161. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1162. if (rc) {
  1163. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1164. gsi, irq, pirq, rc);
  1165. xen_free_irq(irq);
  1166. continue;
  1167. }
  1168. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1169. __startup_pirq(irq);
  1170. }
  1171. }
  1172. static void restore_cpu_virqs(unsigned int cpu)
  1173. {
  1174. struct evtchn_bind_virq bind_virq;
  1175. int virq, irq, evtchn;
  1176. for (virq = 0; virq < NR_VIRQS; virq++) {
  1177. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1178. continue;
  1179. BUG_ON(virq_from_irq(irq) != virq);
  1180. /* Get a new binding from Xen. */
  1181. bind_virq.virq = virq;
  1182. bind_virq.vcpu = cpu;
  1183. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1184. &bind_virq) != 0)
  1185. BUG();
  1186. evtchn = bind_virq.port;
  1187. /* Record the new mapping. */
  1188. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1189. bind_evtchn_to_cpu(evtchn, cpu);
  1190. }
  1191. }
  1192. static void restore_cpu_ipis(unsigned int cpu)
  1193. {
  1194. struct evtchn_bind_ipi bind_ipi;
  1195. int ipi, irq, evtchn;
  1196. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1197. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1198. continue;
  1199. BUG_ON(ipi_from_irq(irq) != ipi);
  1200. /* Get a new binding from Xen. */
  1201. bind_ipi.vcpu = cpu;
  1202. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1203. &bind_ipi) != 0)
  1204. BUG();
  1205. evtchn = bind_ipi.port;
  1206. /* Record the new mapping. */
  1207. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1208. bind_evtchn_to_cpu(evtchn, cpu);
  1209. }
  1210. }
  1211. /* Clear an irq's pending state, in preparation for polling on it */
  1212. void xen_clear_irq_pending(int irq)
  1213. {
  1214. int evtchn = evtchn_from_irq(irq);
  1215. if (VALID_EVTCHN(evtchn))
  1216. clear_evtchn(evtchn);
  1217. }
  1218. EXPORT_SYMBOL(xen_clear_irq_pending);
  1219. void xen_set_irq_pending(int irq)
  1220. {
  1221. int evtchn = evtchn_from_irq(irq);
  1222. if (VALID_EVTCHN(evtchn))
  1223. set_evtchn(evtchn);
  1224. }
  1225. bool xen_test_irq_pending(int irq)
  1226. {
  1227. int evtchn = evtchn_from_irq(irq);
  1228. bool ret = false;
  1229. if (VALID_EVTCHN(evtchn))
  1230. ret = test_evtchn(evtchn);
  1231. return ret;
  1232. }
  1233. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1234. * the irq will be disabled so it won't deliver an interrupt. */
  1235. void xen_poll_irq_timeout(int irq, u64 timeout)
  1236. {
  1237. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1238. if (VALID_EVTCHN(evtchn)) {
  1239. struct sched_poll poll;
  1240. poll.nr_ports = 1;
  1241. poll.timeout = timeout;
  1242. set_xen_guest_handle(poll.ports, &evtchn);
  1243. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1244. BUG();
  1245. }
  1246. }
  1247. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1248. /* Poll waiting for an irq to become pending. In the usual case, the
  1249. * irq will be disabled so it won't deliver an interrupt. */
  1250. void xen_poll_irq(int irq)
  1251. {
  1252. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1253. }
  1254. /* Check whether the IRQ line is shared with other guests. */
  1255. int xen_test_irq_shared(int irq)
  1256. {
  1257. struct irq_info *info = info_for_irq(irq);
  1258. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1259. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1260. return 0;
  1261. return !(irq_status.flags & XENIRQSTAT_shared);
  1262. }
  1263. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1264. void xen_irq_resume(void)
  1265. {
  1266. unsigned int cpu, evtchn;
  1267. struct irq_info *info;
  1268. init_evtchn_cpu_bindings();
  1269. /* New event-channel space is not 'live' yet. */
  1270. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1271. mask_evtchn(evtchn);
  1272. /* No IRQ <-> event-channel mappings. */
  1273. list_for_each_entry(info, &xen_irq_list_head, list)
  1274. info->evtchn = 0; /* zap event-channel binding */
  1275. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1276. evtchn_to_irq[evtchn] = -1;
  1277. for_each_possible_cpu(cpu) {
  1278. restore_cpu_virqs(cpu);
  1279. restore_cpu_ipis(cpu);
  1280. }
  1281. restore_pirqs();
  1282. }
  1283. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1284. .name = "xen-dyn",
  1285. .irq_disable = disable_dynirq,
  1286. .irq_mask = disable_dynirq,
  1287. .irq_unmask = enable_dynirq,
  1288. .irq_ack = ack_dynirq,
  1289. .irq_mask_ack = mask_ack_dynirq,
  1290. .irq_set_affinity = set_affinity_irq,
  1291. .irq_retrigger = retrigger_dynirq,
  1292. };
  1293. static struct irq_chip xen_pirq_chip __read_mostly = {
  1294. .name = "xen-pirq",
  1295. .irq_startup = startup_pirq,
  1296. .irq_shutdown = shutdown_pirq,
  1297. .irq_enable = enable_pirq,
  1298. .irq_disable = disable_pirq,
  1299. .irq_mask = disable_dynirq,
  1300. .irq_unmask = enable_dynirq,
  1301. .irq_ack = eoi_pirq,
  1302. .irq_eoi = eoi_pirq,
  1303. .irq_mask_ack = mask_ack_pirq,
  1304. .irq_set_affinity = set_affinity_irq,
  1305. .irq_retrigger = retrigger_dynirq,
  1306. };
  1307. static struct irq_chip xen_percpu_chip __read_mostly = {
  1308. .name = "xen-percpu",
  1309. .irq_disable = disable_dynirq,
  1310. .irq_mask = disable_dynirq,
  1311. .irq_unmask = enable_dynirq,
  1312. .irq_ack = ack_dynirq,
  1313. };
  1314. int xen_set_callback_via(uint64_t via)
  1315. {
  1316. struct xen_hvm_param a;
  1317. a.domid = DOMID_SELF;
  1318. a.index = HVM_PARAM_CALLBACK_IRQ;
  1319. a.value = via;
  1320. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1321. }
  1322. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1323. #ifdef CONFIG_XEN_PVHVM
  1324. /* Vector callbacks are better than PCI interrupts to receive event
  1325. * channel notifications because we can receive vector callbacks on any
  1326. * vcpu and we don't need PCI support or APIC interactions. */
  1327. void xen_callback_vector(void)
  1328. {
  1329. int rc;
  1330. uint64_t callback_via;
  1331. if (xen_have_vector_callback) {
  1332. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1333. rc = xen_set_callback_via(callback_via);
  1334. if (rc) {
  1335. printk(KERN_ERR "Request for Xen HVM callback vector"
  1336. " failed.\n");
  1337. xen_have_vector_callback = 0;
  1338. return;
  1339. }
  1340. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1341. "enabled\n");
  1342. /* in the restore case the vector has already been allocated */
  1343. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1344. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1345. }
  1346. }
  1347. #else
  1348. void xen_callback_vector(void) {}
  1349. #endif
  1350. void __init xen_init_IRQ(void)
  1351. {
  1352. int i;
  1353. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1354. GFP_KERNEL);
  1355. BUG_ON(!evtchn_to_irq);
  1356. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1357. evtchn_to_irq[i] = -1;
  1358. init_evtchn_cpu_bindings();
  1359. /* No event channels are 'live' right now. */
  1360. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1361. mask_evtchn(i);
  1362. if (xen_hvm_domain()) {
  1363. xen_callback_vector();
  1364. native_init_IRQ();
  1365. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1366. * __acpi_register_gsi can point at the right function */
  1367. pci_xen_hvm_init();
  1368. } else {
  1369. irq_ctx_init(smp_processor_id());
  1370. if (xen_initial_domain())
  1371. pci_xen_initial_domain();
  1372. }
  1373. }