fsl-diu-fb.c 47 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * Freescale DIU Frame Buffer device driver
  5. *
  6. * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
  7. * Paul Widmer <paul.widmer@freescale.com>
  8. * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
  9. * York Sun <yorksun@freescale.com>
  10. *
  11. * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/slab.h>
  24. #include <linux/fb.h>
  25. #include <linux/init.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/vmalloc.h>
  32. #include <linux/spinlock.h>
  33. #include <sysdev/fsl_soc.h>
  34. #include <linux/fsl-diu-fb.h>
  35. #include "edid.h"
  36. #define FSL_AOI_NUM 6 /* 5 AOIs and one dummy AOI */
  37. /* 1 for plane 0, 2 for plane 1&2 each */
  38. /* HW cursor parameters */
  39. #define MAX_CURS 32
  40. /* INT_STATUS/INT_MASK field descriptions */
  41. #define INT_VSYNC 0x01 /* Vsync interrupt */
  42. #define INT_VSYNC_WB 0x02 /* Vsync interrupt for write back operation */
  43. #define INT_UNDRUN 0x04 /* Under run exception interrupt */
  44. #define INT_PARERR 0x08 /* Display parameters error interrupt */
  45. #define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */
  46. struct diu_addr {
  47. void *vaddr; /* Virtual address */
  48. dma_addr_t paddr; /* Physical address */
  49. __u32 offset;
  50. };
  51. /*
  52. * List of supported video modes
  53. *
  54. * The first entry is the default video mode. The remain entries are in
  55. * order if increasing resolution and frequency. The 320x240-60 mode is
  56. * the initial AOI for the second and third planes.
  57. */
  58. static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
  59. {
  60. .refresh = 60,
  61. .xres = 1024,
  62. .yres = 768,
  63. .pixclock = 15385,
  64. .left_margin = 160,
  65. .right_margin = 24,
  66. .upper_margin = 29,
  67. .lower_margin = 3,
  68. .hsync_len = 136,
  69. .vsync_len = 6,
  70. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  71. .vmode = FB_VMODE_NONINTERLACED
  72. },
  73. {
  74. .refresh = 60,
  75. .xres = 320,
  76. .yres = 240,
  77. .pixclock = 79440,
  78. .left_margin = 16,
  79. .right_margin = 16,
  80. .upper_margin = 16,
  81. .lower_margin = 5,
  82. .hsync_len = 48,
  83. .vsync_len = 1,
  84. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  85. .vmode = FB_VMODE_NONINTERLACED
  86. },
  87. {
  88. .refresh = 60,
  89. .xres = 640,
  90. .yres = 480,
  91. .pixclock = 39722,
  92. .left_margin = 48,
  93. .right_margin = 16,
  94. .upper_margin = 33,
  95. .lower_margin = 10,
  96. .hsync_len = 96,
  97. .vsync_len = 2,
  98. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  99. .vmode = FB_VMODE_NONINTERLACED
  100. },
  101. {
  102. .refresh = 72,
  103. .xres = 640,
  104. .yres = 480,
  105. .pixclock = 32052,
  106. .left_margin = 128,
  107. .right_margin = 24,
  108. .upper_margin = 28,
  109. .lower_margin = 9,
  110. .hsync_len = 40,
  111. .vsync_len = 3,
  112. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  113. .vmode = FB_VMODE_NONINTERLACED
  114. },
  115. {
  116. .refresh = 75,
  117. .xres = 640,
  118. .yres = 480,
  119. .pixclock = 31747,
  120. .left_margin = 120,
  121. .right_margin = 16,
  122. .upper_margin = 16,
  123. .lower_margin = 1,
  124. .hsync_len = 64,
  125. .vsync_len = 3,
  126. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  127. .vmode = FB_VMODE_NONINTERLACED
  128. },
  129. {
  130. .refresh = 90,
  131. .xres = 640,
  132. .yres = 480,
  133. .pixclock = 25057,
  134. .left_margin = 120,
  135. .right_margin = 32,
  136. .upper_margin = 14,
  137. .lower_margin = 25,
  138. .hsync_len = 40,
  139. .vsync_len = 14,
  140. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  141. .vmode = FB_VMODE_NONINTERLACED
  142. },
  143. {
  144. .refresh = 100,
  145. .xres = 640,
  146. .yres = 480,
  147. .pixclock = 22272,
  148. .left_margin = 48,
  149. .right_margin = 32,
  150. .upper_margin = 17,
  151. .lower_margin = 22,
  152. .hsync_len = 128,
  153. .vsync_len = 12,
  154. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  155. .vmode = FB_VMODE_NONINTERLACED
  156. },
  157. {
  158. .refresh = 60,
  159. .xres = 800,
  160. .yres = 480,
  161. .pixclock = 33805,
  162. .left_margin = 96,
  163. .right_margin = 24,
  164. .upper_margin = 10,
  165. .lower_margin = 3,
  166. .hsync_len = 72,
  167. .vsync_len = 7,
  168. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  169. .vmode = FB_VMODE_NONINTERLACED
  170. },
  171. {
  172. .refresh = 60,
  173. .xres = 800,
  174. .yres = 600,
  175. .pixclock = 25000,
  176. .left_margin = 88,
  177. .right_margin = 40,
  178. .upper_margin = 23,
  179. .lower_margin = 1,
  180. .hsync_len = 128,
  181. .vsync_len = 4,
  182. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  183. .vmode = FB_VMODE_NONINTERLACED
  184. },
  185. {
  186. .refresh = 60,
  187. .xres = 854,
  188. .yres = 480,
  189. .pixclock = 31518,
  190. .left_margin = 104,
  191. .right_margin = 16,
  192. .upper_margin = 13,
  193. .lower_margin = 1,
  194. .hsync_len = 88,
  195. .vsync_len = 3,
  196. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  197. .vmode = FB_VMODE_NONINTERLACED
  198. },
  199. {
  200. .refresh = 70,
  201. .xres = 1024,
  202. .yres = 768,
  203. .pixclock = 16886,
  204. .left_margin = 3,
  205. .right_margin = 3,
  206. .upper_margin = 2,
  207. .lower_margin = 2,
  208. .hsync_len = 40,
  209. .vsync_len = 18,
  210. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  211. .vmode = FB_VMODE_NONINTERLACED
  212. },
  213. {
  214. .refresh = 75,
  215. .xres = 1024,
  216. .yres = 768,
  217. .pixclock = 15009,
  218. .left_margin = 3,
  219. .right_margin = 3,
  220. .upper_margin = 2,
  221. .lower_margin = 2,
  222. .hsync_len = 80,
  223. .vsync_len = 32,
  224. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  225. .vmode = FB_VMODE_NONINTERLACED
  226. },
  227. {
  228. .refresh = 60,
  229. .xres = 1280,
  230. .yres = 480,
  231. .pixclock = 18939,
  232. .left_margin = 353,
  233. .right_margin = 47,
  234. .upper_margin = 39,
  235. .lower_margin = 4,
  236. .hsync_len = 8,
  237. .vsync_len = 2,
  238. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  239. .vmode = FB_VMODE_NONINTERLACED
  240. },
  241. {
  242. .refresh = 60,
  243. .xres = 1280,
  244. .yres = 720,
  245. .pixclock = 13426,
  246. .left_margin = 192,
  247. .right_margin = 64,
  248. .upper_margin = 22,
  249. .lower_margin = 1,
  250. .hsync_len = 136,
  251. .vsync_len = 3,
  252. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  253. .vmode = FB_VMODE_NONINTERLACED
  254. },
  255. {
  256. .refresh = 60,
  257. .xres = 1280,
  258. .yres = 1024,
  259. .pixclock = 9375,
  260. .left_margin = 38,
  261. .right_margin = 128,
  262. .upper_margin = 2,
  263. .lower_margin = 7,
  264. .hsync_len = 216,
  265. .vsync_len = 37,
  266. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  267. .vmode = FB_VMODE_NONINTERLACED
  268. },
  269. {
  270. .refresh = 70,
  271. .xres = 1280,
  272. .yres = 1024,
  273. .pixclock = 9380,
  274. .left_margin = 6,
  275. .right_margin = 6,
  276. .upper_margin = 4,
  277. .lower_margin = 4,
  278. .hsync_len = 60,
  279. .vsync_len = 94,
  280. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  281. .vmode = FB_VMODE_NONINTERLACED
  282. },
  283. {
  284. .refresh = 75,
  285. .xres = 1280,
  286. .yres = 1024,
  287. .pixclock = 9380,
  288. .left_margin = 6,
  289. .right_margin = 6,
  290. .upper_margin = 4,
  291. .lower_margin = 4,
  292. .hsync_len = 60,
  293. .vsync_len = 15,
  294. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  295. .vmode = FB_VMODE_NONINTERLACED
  296. },
  297. {
  298. .refresh = 60,
  299. .xres = 1920,
  300. .yres = 1080,
  301. .pixclock = 5787,
  302. .left_margin = 328,
  303. .right_margin = 120,
  304. .upper_margin = 34,
  305. .lower_margin = 1,
  306. .hsync_len = 208,
  307. .vsync_len = 3,
  308. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  309. .vmode = FB_VMODE_NONINTERLACED
  310. },
  311. };
  312. static char *fb_mode;
  313. static unsigned long default_bpp = 32;
  314. static enum fsl_diu_monitor_port monitor_port;
  315. static char *monitor_string;
  316. #if defined(CONFIG_NOT_COHERENT_CACHE)
  317. static u8 *coherence_data;
  318. static size_t coherence_data_size;
  319. static unsigned int d_cache_line_size;
  320. #endif
  321. static DEFINE_SPINLOCK(diu_lock);
  322. struct fsl_diu_data {
  323. struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
  324. /*FSL_AOI_NUM has one dummy AOI */
  325. struct device_attribute dev_attr;
  326. struct diu_ad *dummy_ad;
  327. void *dummy_aoi_virt;
  328. unsigned int irq;
  329. int fb_enabled;
  330. enum fsl_diu_monitor_port monitor_port;
  331. struct diu __iomem *diu_reg;
  332. spinlock_t reg_lock;
  333. struct diu_addr ad;
  334. struct diu_addr gamma;
  335. struct diu_addr pallete;
  336. struct diu_addr cursor;
  337. };
  338. enum mfb_index {
  339. PLANE0 = 0, /* Plane 0, only one AOI that fills the screen */
  340. PLANE1_AOI0, /* Plane 1, first AOI */
  341. PLANE1_AOI1, /* Plane 1, second AOI */
  342. PLANE2_AOI0, /* Plane 2, first AOI */
  343. PLANE2_AOI1, /* Plane 2, second AOI */
  344. };
  345. struct mfb_info {
  346. enum mfb_index index;
  347. char *id;
  348. int registered;
  349. unsigned long pseudo_palette[16];
  350. struct diu_ad *ad;
  351. int cursor_reset;
  352. unsigned char g_alpha;
  353. unsigned int count;
  354. int x_aoi_d; /* aoi display x offset to physical screen */
  355. int y_aoi_d; /* aoi display y offset to physical screen */
  356. struct fsl_diu_data *parent;
  357. u8 *edid_data;
  358. };
  359. static struct mfb_info mfb_template[] = {
  360. {
  361. .index = PLANE0,
  362. .id = "Panel0",
  363. .registered = 0,
  364. .count = 0,
  365. .x_aoi_d = 0,
  366. .y_aoi_d = 0,
  367. },
  368. {
  369. .index = PLANE1_AOI0,
  370. .id = "Panel1 AOI0",
  371. .registered = 0,
  372. .g_alpha = 0xff,
  373. .count = 0,
  374. .x_aoi_d = 0,
  375. .y_aoi_d = 0,
  376. },
  377. {
  378. .index = PLANE1_AOI1,
  379. .id = "Panel1 AOI1",
  380. .registered = 0,
  381. .g_alpha = 0xff,
  382. .count = 0,
  383. .x_aoi_d = 0,
  384. .y_aoi_d = 480,
  385. },
  386. {
  387. .index = PLANE2_AOI0,
  388. .id = "Panel2 AOI0",
  389. .registered = 0,
  390. .g_alpha = 0xff,
  391. .count = 0,
  392. .x_aoi_d = 640,
  393. .y_aoi_d = 0,
  394. },
  395. {
  396. .index = PLANE2_AOI1,
  397. .id = "Panel2 AOI1",
  398. .registered = 0,
  399. .g_alpha = 0xff,
  400. .count = 0,
  401. .x_aoi_d = 640,
  402. .y_aoi_d = 480,
  403. },
  404. };
  405. /**
  406. * fsl_diu_name_to_port - convert a port name to a monitor port enum
  407. *
  408. * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns
  409. * the enum fsl_diu_monitor_port that corresponds to that string.
  410. *
  411. * For compatibility with older versions, a number ("0", "1", or "2") is also
  412. * supported.
  413. *
  414. * If the string is unknown, DVI is assumed.
  415. *
  416. * If the particular port is not supported by the platform, another port
  417. * (platform-specific) is chosen instead.
  418. */
  419. static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s)
  420. {
  421. enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI;
  422. unsigned long val;
  423. if (s) {
  424. if (!strict_strtoul(s, 10, &val) && (val <= 2))
  425. port = (enum fsl_diu_monitor_port) val;
  426. else if (strncmp(s, "lvds", 4) == 0)
  427. port = FSL_DIU_PORT_LVDS;
  428. else if (strncmp(s, "dlvds", 5) == 0)
  429. port = FSL_DIU_PORT_DLVDS;
  430. }
  431. return diu_ops.valid_monitor_port(port);
  432. }
  433. /**
  434. * fsl_diu_alloc - allocate memory for the DIU
  435. * @size: number of bytes to allocate
  436. * @param: returned physical address of memory
  437. *
  438. * This function allocates a physically-contiguous block of memory.
  439. */
  440. static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
  441. {
  442. void *virt;
  443. virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
  444. if (virt)
  445. *phys = virt_to_phys(virt);
  446. return virt;
  447. }
  448. /**
  449. * fsl_diu_free - release DIU memory
  450. * @virt: pointer returned by fsl_diu_alloc()
  451. * @size: number of bytes allocated by fsl_diu_alloc()
  452. *
  453. * This function releases memory allocated by fsl_diu_alloc().
  454. */
  455. static void fsl_diu_free(void *virt, size_t size)
  456. {
  457. if (virt && size)
  458. free_pages_exact(virt, size);
  459. }
  460. /*
  461. * Workaround for failed writing desc register of planes.
  462. * Needed with MPC5121 DIU rev 2.0 silicon.
  463. */
  464. void wr_reg_wa(u32 *reg, u32 val)
  465. {
  466. do {
  467. out_be32(reg, val);
  468. } while (in_be32(reg) != val);
  469. }
  470. static void fsl_diu_enable_panel(struct fb_info *info)
  471. {
  472. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  473. struct diu_ad *ad = mfbi->ad;
  474. struct fsl_diu_data *machine_data = mfbi->parent;
  475. struct diu __iomem *hw = machine_data->diu_reg;
  476. switch (mfbi->index) {
  477. case PLANE0:
  478. if (hw->desc[0] != ad->paddr)
  479. wr_reg_wa(&hw->desc[0], ad->paddr);
  480. break;
  481. case PLANE1_AOI0:
  482. cmfbi = machine_data->fsl_diu_info[2]->par;
  483. if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
  484. if (cmfbi->count > 0) /* AOI1 open */
  485. ad->next_ad =
  486. cpu_to_le32(cmfbi->ad->paddr);
  487. else
  488. ad->next_ad = 0;
  489. wr_reg_wa(&hw->desc[1], ad->paddr);
  490. }
  491. break;
  492. case PLANE2_AOI0:
  493. cmfbi = machine_data->fsl_diu_info[4]->par;
  494. if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
  495. if (cmfbi->count > 0) /* AOI1 open */
  496. ad->next_ad =
  497. cpu_to_le32(cmfbi->ad->paddr);
  498. else
  499. ad->next_ad = 0;
  500. wr_reg_wa(&hw->desc[2], ad->paddr);
  501. }
  502. break;
  503. case PLANE1_AOI1:
  504. pmfbi = machine_data->fsl_diu_info[1]->par;
  505. ad->next_ad = 0;
  506. if (hw->desc[1] == machine_data->dummy_ad->paddr)
  507. wr_reg_wa(&hw->desc[1], ad->paddr);
  508. else /* AOI0 open */
  509. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  510. break;
  511. case PLANE2_AOI1:
  512. pmfbi = machine_data->fsl_diu_info[3]->par;
  513. ad->next_ad = 0;
  514. if (hw->desc[2] == machine_data->dummy_ad->paddr)
  515. wr_reg_wa(&hw->desc[2], ad->paddr);
  516. else /* AOI0 was open */
  517. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  518. break;
  519. }
  520. }
  521. static void fsl_diu_disable_panel(struct fb_info *info)
  522. {
  523. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  524. struct diu_ad *ad = mfbi->ad;
  525. struct fsl_diu_data *machine_data = mfbi->parent;
  526. struct diu __iomem *hw = machine_data->diu_reg;
  527. switch (mfbi->index) {
  528. case PLANE0:
  529. if (hw->desc[0] != machine_data->dummy_ad->paddr)
  530. wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
  531. break;
  532. case PLANE1_AOI0:
  533. cmfbi = machine_data->fsl_diu_info[2]->par;
  534. if (cmfbi->count > 0) /* AOI1 is open */
  535. wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
  536. /* move AOI1 to the first */
  537. else /* AOI1 was closed */
  538. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  539. /* close AOI 0 */
  540. break;
  541. case PLANE2_AOI0:
  542. cmfbi = machine_data->fsl_diu_info[4]->par;
  543. if (cmfbi->count > 0) /* AOI1 is open */
  544. wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
  545. /* move AOI1 to the first */
  546. else /* AOI1 was closed */
  547. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  548. /* close AOI 0 */
  549. break;
  550. case PLANE1_AOI1:
  551. pmfbi = machine_data->fsl_diu_info[1]->par;
  552. if (hw->desc[1] != ad->paddr) {
  553. /* AOI1 is not the first in the chain */
  554. if (pmfbi->count > 0)
  555. /* AOI0 is open, must be the first */
  556. pmfbi->ad->next_ad = 0;
  557. } else /* AOI1 is the first in the chain */
  558. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  559. /* close AOI 1 */
  560. break;
  561. case PLANE2_AOI1:
  562. pmfbi = machine_data->fsl_diu_info[3]->par;
  563. if (hw->desc[2] != ad->paddr) {
  564. /* AOI1 is not the first in the chain */
  565. if (pmfbi->count > 0)
  566. /* AOI0 is open, must be the first */
  567. pmfbi->ad->next_ad = 0;
  568. } else /* AOI1 is the first in the chain */
  569. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  570. /* close AOI 1 */
  571. break;
  572. }
  573. }
  574. static void enable_lcdc(struct fb_info *info)
  575. {
  576. struct mfb_info *mfbi = info->par;
  577. struct fsl_diu_data *machine_data = mfbi->parent;
  578. struct diu __iomem *hw = machine_data->diu_reg;
  579. if (!machine_data->fb_enabled) {
  580. out_be32(&hw->diu_mode, MFB_MODE1);
  581. machine_data->fb_enabled++;
  582. }
  583. }
  584. static void disable_lcdc(struct fb_info *info)
  585. {
  586. struct mfb_info *mfbi = info->par;
  587. struct fsl_diu_data *machine_data = mfbi->parent;
  588. struct diu __iomem *hw = machine_data->diu_reg;
  589. if (machine_data->fb_enabled) {
  590. out_be32(&hw->diu_mode, 0);
  591. machine_data->fb_enabled = 0;
  592. }
  593. }
  594. static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
  595. struct fb_info *info)
  596. {
  597. struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
  598. struct fsl_diu_data *machine_data = mfbi->parent;
  599. int available_height, upper_aoi_bottom;
  600. enum mfb_index index = mfbi->index;
  601. int lower_aoi_is_open, upper_aoi_is_open;
  602. __u32 base_plane_width, base_plane_height, upper_aoi_height;
  603. base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
  604. base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
  605. if (mfbi->x_aoi_d < 0)
  606. mfbi->x_aoi_d = 0;
  607. if (mfbi->y_aoi_d < 0)
  608. mfbi->y_aoi_d = 0;
  609. switch (index) {
  610. case PLANE0:
  611. if (mfbi->x_aoi_d != 0)
  612. mfbi->x_aoi_d = 0;
  613. if (mfbi->y_aoi_d != 0)
  614. mfbi->y_aoi_d = 0;
  615. break;
  616. case PLANE1_AOI0:
  617. case PLANE2_AOI0:
  618. lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
  619. lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
  620. if (var->xres > base_plane_width)
  621. var->xres = base_plane_width;
  622. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  623. mfbi->x_aoi_d = base_plane_width - var->xres;
  624. if (lower_aoi_is_open)
  625. available_height = lower_aoi_mfbi->y_aoi_d;
  626. else
  627. available_height = base_plane_height;
  628. if (var->yres > available_height)
  629. var->yres = available_height;
  630. if ((mfbi->y_aoi_d + var->yres) > available_height)
  631. mfbi->y_aoi_d = available_height - var->yres;
  632. break;
  633. case PLANE1_AOI1:
  634. case PLANE2_AOI1:
  635. upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
  636. upper_aoi_height =
  637. machine_data->fsl_diu_info[index-1]->var.yres;
  638. upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
  639. upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
  640. if (var->xres > base_plane_width)
  641. var->xres = base_plane_width;
  642. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  643. mfbi->x_aoi_d = base_plane_width - var->xres;
  644. if (mfbi->y_aoi_d < 0)
  645. mfbi->y_aoi_d = 0;
  646. if (upper_aoi_is_open) {
  647. if (mfbi->y_aoi_d < upper_aoi_bottom)
  648. mfbi->y_aoi_d = upper_aoi_bottom;
  649. available_height = base_plane_height
  650. - upper_aoi_bottom;
  651. } else
  652. available_height = base_plane_height;
  653. if (var->yres > available_height)
  654. var->yres = available_height;
  655. if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
  656. mfbi->y_aoi_d = base_plane_height - var->yres;
  657. break;
  658. }
  659. }
  660. /*
  661. * Checks to see if the hardware supports the state requested by var passed
  662. * in. This function does not alter the hardware state! If the var passed in
  663. * is slightly off by what the hardware can support then we alter the var
  664. * PASSED in to what we can do. If the hardware doesn't support mode change
  665. * a -EINVAL will be returned by the upper layers.
  666. */
  667. static int fsl_diu_check_var(struct fb_var_screeninfo *var,
  668. struct fb_info *info)
  669. {
  670. if (var->xres_virtual < var->xres)
  671. var->xres_virtual = var->xres;
  672. if (var->yres_virtual < var->yres)
  673. var->yres_virtual = var->yres;
  674. if (var->xoffset < 0)
  675. var->xoffset = 0;
  676. if (var->yoffset < 0)
  677. var->yoffset = 0;
  678. if (var->xoffset + info->var.xres > info->var.xres_virtual)
  679. var->xoffset = info->var.xres_virtual - info->var.xres;
  680. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  681. var->yoffset = info->var.yres_virtual - info->var.yres;
  682. if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  683. (var->bits_per_pixel != 16))
  684. var->bits_per_pixel = default_bpp;
  685. switch (var->bits_per_pixel) {
  686. case 16:
  687. var->red.length = 5;
  688. var->red.offset = 11;
  689. var->red.msb_right = 0;
  690. var->green.length = 6;
  691. var->green.offset = 5;
  692. var->green.msb_right = 0;
  693. var->blue.length = 5;
  694. var->blue.offset = 0;
  695. var->blue.msb_right = 0;
  696. var->transp.length = 0;
  697. var->transp.offset = 0;
  698. var->transp.msb_right = 0;
  699. break;
  700. case 24:
  701. var->red.length = 8;
  702. var->red.offset = 0;
  703. var->red.msb_right = 0;
  704. var->green.length = 8;
  705. var->green.offset = 8;
  706. var->green.msb_right = 0;
  707. var->blue.length = 8;
  708. var->blue.offset = 16;
  709. var->blue.msb_right = 0;
  710. var->transp.length = 0;
  711. var->transp.offset = 0;
  712. var->transp.msb_right = 0;
  713. break;
  714. case 32:
  715. var->red.length = 8;
  716. var->red.offset = 16;
  717. var->red.msb_right = 0;
  718. var->green.length = 8;
  719. var->green.offset = 8;
  720. var->green.msb_right = 0;
  721. var->blue.length = 8;
  722. var->blue.offset = 0;
  723. var->blue.msb_right = 0;
  724. var->transp.length = 8;
  725. var->transp.offset = 24;
  726. var->transp.msb_right = 0;
  727. break;
  728. }
  729. var->height = -1;
  730. var->width = -1;
  731. var->grayscale = 0;
  732. /* Copy nonstd field to/from sync for fbset usage */
  733. var->sync |= var->nonstd;
  734. var->nonstd |= var->sync;
  735. adjust_aoi_size_position(var, info);
  736. return 0;
  737. }
  738. static void set_fix(struct fb_info *info)
  739. {
  740. struct fb_fix_screeninfo *fix = &info->fix;
  741. struct fb_var_screeninfo *var = &info->var;
  742. struct mfb_info *mfbi = info->par;
  743. strncpy(fix->id, mfbi->id, sizeof(fix->id));
  744. fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  745. fix->type = FB_TYPE_PACKED_PIXELS;
  746. fix->accel = FB_ACCEL_NONE;
  747. fix->visual = FB_VISUAL_TRUECOLOR;
  748. fix->xpanstep = 1;
  749. fix->ypanstep = 1;
  750. }
  751. static void update_lcdc(struct fb_info *info)
  752. {
  753. struct fb_var_screeninfo *var = &info->var;
  754. struct mfb_info *mfbi = info->par;
  755. struct fsl_diu_data *machine_data = mfbi->parent;
  756. struct diu __iomem *hw;
  757. int i, j;
  758. char __iomem *cursor_base, *gamma_table_base;
  759. u32 temp;
  760. hw = machine_data->diu_reg;
  761. diu_ops.set_monitor_port(machine_data->monitor_port);
  762. gamma_table_base = machine_data->gamma.vaddr;
  763. cursor_base = machine_data->cursor.vaddr;
  764. /* Prep for DIU init - gamma table, cursor table */
  765. for (i = 0; i <= 2; i++)
  766. for (j = 0; j <= 255; j++)
  767. *gamma_table_base++ = j;
  768. diu_ops.set_gamma_table(machine_data->monitor_port,
  769. machine_data->gamma.vaddr);
  770. disable_lcdc(info);
  771. /* Program DIU registers */
  772. out_be32(&hw->gamma, machine_data->gamma.paddr);
  773. out_be32(&hw->cursor, machine_data->cursor.paddr);
  774. out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
  775. out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
  776. out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
  777. /* DISP SIZE */
  778. out_be32(&hw->wb_size, 0); /* WB SIZE */
  779. out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
  780. /* Horizontal and vertical configuration register */
  781. temp = var->left_margin << 22 | /* BP_H */
  782. var->hsync_len << 11 | /* PW_H */
  783. var->right_margin; /* FP_H */
  784. out_be32(&hw->hsyn_para, temp);
  785. temp = var->upper_margin << 22 | /* BP_V */
  786. var->vsync_len << 11 | /* PW_V */
  787. var->lower_margin; /* FP_V */
  788. out_be32(&hw->vsyn_para, temp);
  789. diu_ops.set_pixel_clock(var->pixclock);
  790. out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
  791. out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
  792. out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
  793. out_be32(&hw->plut, 0x01F5F666);
  794. /* Enable the DIU */
  795. enable_lcdc(info);
  796. }
  797. static int map_video_memory(struct fb_info *info)
  798. {
  799. phys_addr_t phys;
  800. u32 smem_len = info->fix.line_length * info->var.yres_virtual;
  801. info->screen_base = fsl_diu_alloc(smem_len, &phys);
  802. if (info->screen_base == NULL) {
  803. dev_err(info->dev, "unable to allocate fb memory\n");
  804. return -ENOMEM;
  805. }
  806. mutex_lock(&info->mm_lock);
  807. info->fix.smem_start = (unsigned long) phys;
  808. info->fix.smem_len = smem_len;
  809. mutex_unlock(&info->mm_lock);
  810. info->screen_size = info->fix.smem_len;
  811. return 0;
  812. }
  813. static void unmap_video_memory(struct fb_info *info)
  814. {
  815. fsl_diu_free(info->screen_base, info->fix.smem_len);
  816. mutex_lock(&info->mm_lock);
  817. info->screen_base = NULL;
  818. info->fix.smem_start = 0;
  819. info->fix.smem_len = 0;
  820. mutex_unlock(&info->mm_lock);
  821. }
  822. /*
  823. * Using the fb_var_screeninfo in fb_info we set the aoi of this
  824. * particular framebuffer. It is a light version of fsl_diu_set_par.
  825. */
  826. static int fsl_diu_set_aoi(struct fb_info *info)
  827. {
  828. struct fb_var_screeninfo *var = &info->var;
  829. struct mfb_info *mfbi = info->par;
  830. struct diu_ad *ad = mfbi->ad;
  831. /* AOI should not be greater than display size */
  832. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  833. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  834. return 0;
  835. }
  836. /*
  837. * Using the fb_var_screeninfo in fb_info we set the resolution of this
  838. * particular framebuffer. This function alters the fb_fix_screeninfo stored
  839. * in fb_info. It does not alter var in fb_info since we are using that
  840. * data. This means we depend on the data in var inside fb_info to be
  841. * supported by the hardware. fsl_diu_check_var is always called before
  842. * fsl_diu_set_par to ensure this.
  843. */
  844. static int fsl_diu_set_par(struct fb_info *info)
  845. {
  846. unsigned long len;
  847. struct fb_var_screeninfo *var = &info->var;
  848. struct mfb_info *mfbi = info->par;
  849. struct fsl_diu_data *machine_data = mfbi->parent;
  850. struct diu_ad *ad = mfbi->ad;
  851. struct diu __iomem *hw;
  852. hw = machine_data->diu_reg;
  853. set_fix(info);
  854. mfbi->cursor_reset = 1;
  855. len = info->var.yres_virtual * info->fix.line_length;
  856. /* Alloc & dealloc each time resolution/bpp change */
  857. if (len != info->fix.smem_len) {
  858. if (info->fix.smem_start)
  859. unmap_video_memory(info);
  860. /* Memory allocation for framebuffer */
  861. if (map_video_memory(info)) {
  862. dev_err(info->dev, "unable to allocate fb memory 1\n");
  863. return -ENOMEM;
  864. }
  865. }
  866. ad->pix_fmt = diu_ops.get_pixel_format(machine_data->monitor_port,
  867. var->bits_per_pixel);
  868. ad->addr = cpu_to_le32(info->fix.smem_start);
  869. ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
  870. var->xres_virtual) | mfbi->g_alpha;
  871. /* AOI should not be greater than display size */
  872. ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
  873. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  874. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  875. /* Disable chroma keying function */
  876. ad->ckmax_r = 0;
  877. ad->ckmax_g = 0;
  878. ad->ckmax_b = 0;
  879. ad->ckmin_r = 255;
  880. ad->ckmin_g = 255;
  881. ad->ckmin_b = 255;
  882. if (mfbi->index == PLANE0)
  883. update_lcdc(info);
  884. return 0;
  885. }
  886. static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
  887. {
  888. return ((val << width) + 0x7FFF - val) >> 16;
  889. }
  890. /*
  891. * Set a single color register. The values supplied have a 16 bit magnitude
  892. * which needs to be scaled in this function for the hardware. Things to take
  893. * into consideration are how many color registers, if any, are supported with
  894. * the current color visual. With truecolor mode no color palettes are
  895. * supported. Here a pseudo palette is created which we store the value in
  896. * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
  897. * color palette.
  898. */
  899. static int fsl_diu_setcolreg(unsigned int regno, unsigned int red,
  900. unsigned int green, unsigned int blue,
  901. unsigned int transp, struct fb_info *info)
  902. {
  903. int ret = 1;
  904. /*
  905. * If greyscale is true, then we convert the RGB value
  906. * to greyscale no matter what visual we are using.
  907. */
  908. if (info->var.grayscale)
  909. red = green = blue = (19595 * red + 38470 * green +
  910. 7471 * blue) >> 16;
  911. switch (info->fix.visual) {
  912. case FB_VISUAL_TRUECOLOR:
  913. /*
  914. * 16-bit True Colour. We encode the RGB value
  915. * according to the RGB bitfield information.
  916. */
  917. if (regno < 16) {
  918. u32 *pal = info->pseudo_palette;
  919. u32 v;
  920. red = CNVT_TOHW(red, info->var.red.length);
  921. green = CNVT_TOHW(green, info->var.green.length);
  922. blue = CNVT_TOHW(blue, info->var.blue.length);
  923. transp = CNVT_TOHW(transp, info->var.transp.length);
  924. v = (red << info->var.red.offset) |
  925. (green << info->var.green.offset) |
  926. (blue << info->var.blue.offset) |
  927. (transp << info->var.transp.offset);
  928. pal[regno] = v;
  929. ret = 0;
  930. }
  931. break;
  932. }
  933. return ret;
  934. }
  935. /*
  936. * Pan (or wrap, depending on the `vmode' field) the display using the
  937. * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
  938. * don't fit, return -EINVAL.
  939. */
  940. static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
  941. struct fb_info *info)
  942. {
  943. if ((info->var.xoffset == var->xoffset) &&
  944. (info->var.yoffset == var->yoffset))
  945. return 0; /* No change, do nothing */
  946. if (var->xoffset < 0 || var->yoffset < 0
  947. || var->xoffset + info->var.xres > info->var.xres_virtual
  948. || var->yoffset + info->var.yres > info->var.yres_virtual)
  949. return -EINVAL;
  950. info->var.xoffset = var->xoffset;
  951. info->var.yoffset = var->yoffset;
  952. if (var->vmode & FB_VMODE_YWRAP)
  953. info->var.vmode |= FB_VMODE_YWRAP;
  954. else
  955. info->var.vmode &= ~FB_VMODE_YWRAP;
  956. fsl_diu_set_aoi(info);
  957. return 0;
  958. }
  959. static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
  960. unsigned long arg)
  961. {
  962. struct mfb_info *mfbi = info->par;
  963. struct diu_ad *ad = mfbi->ad;
  964. struct mfb_chroma_key ck;
  965. unsigned char global_alpha;
  966. struct aoi_display_offset aoi_d;
  967. __u32 pix_fmt;
  968. void __user *buf = (void __user *)arg;
  969. if (!arg)
  970. return -EINVAL;
  971. switch (cmd) {
  972. case MFB_SET_PIXFMT_OLD:
  973. dev_warn(info->dev,
  974. "MFB_SET_PIXFMT value of 0x%08x is deprecated.\n",
  975. MFB_SET_PIXFMT_OLD);
  976. case MFB_SET_PIXFMT:
  977. if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
  978. return -EFAULT;
  979. ad->pix_fmt = pix_fmt;
  980. break;
  981. case MFB_GET_PIXFMT_OLD:
  982. dev_warn(info->dev,
  983. "MFB_GET_PIXFMT value of 0x%08x is deprecated.\n",
  984. MFB_GET_PIXFMT_OLD);
  985. case MFB_GET_PIXFMT:
  986. pix_fmt = ad->pix_fmt;
  987. if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
  988. return -EFAULT;
  989. break;
  990. case MFB_SET_AOID:
  991. if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
  992. return -EFAULT;
  993. mfbi->x_aoi_d = aoi_d.x_aoi_d;
  994. mfbi->y_aoi_d = aoi_d.y_aoi_d;
  995. fsl_diu_check_var(&info->var, info);
  996. fsl_diu_set_aoi(info);
  997. break;
  998. case MFB_GET_AOID:
  999. aoi_d.x_aoi_d = mfbi->x_aoi_d;
  1000. aoi_d.y_aoi_d = mfbi->y_aoi_d;
  1001. if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
  1002. return -EFAULT;
  1003. break;
  1004. case MFB_GET_ALPHA:
  1005. global_alpha = mfbi->g_alpha;
  1006. if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
  1007. return -EFAULT;
  1008. break;
  1009. case MFB_SET_ALPHA:
  1010. /* set panel information */
  1011. if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
  1012. return -EFAULT;
  1013. ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
  1014. (global_alpha & 0xff);
  1015. mfbi->g_alpha = global_alpha;
  1016. break;
  1017. case MFB_SET_CHROMA_KEY:
  1018. /* set panel winformation */
  1019. if (copy_from_user(&ck, buf, sizeof(ck)))
  1020. return -EFAULT;
  1021. if (ck.enable &&
  1022. (ck.red_max < ck.red_min ||
  1023. ck.green_max < ck.green_min ||
  1024. ck.blue_max < ck.blue_min))
  1025. return -EINVAL;
  1026. if (!ck.enable) {
  1027. ad->ckmax_r = 0;
  1028. ad->ckmax_g = 0;
  1029. ad->ckmax_b = 0;
  1030. ad->ckmin_r = 255;
  1031. ad->ckmin_g = 255;
  1032. ad->ckmin_b = 255;
  1033. } else {
  1034. ad->ckmax_r = ck.red_max;
  1035. ad->ckmax_g = ck.green_max;
  1036. ad->ckmax_b = ck.blue_max;
  1037. ad->ckmin_r = ck.red_min;
  1038. ad->ckmin_g = ck.green_min;
  1039. ad->ckmin_b = ck.blue_min;
  1040. }
  1041. break;
  1042. default:
  1043. dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd);
  1044. return -ENOIOCTLCMD;
  1045. }
  1046. return 0;
  1047. }
  1048. /* turn on fb if count == 1
  1049. */
  1050. static int fsl_diu_open(struct fb_info *info, int user)
  1051. {
  1052. struct mfb_info *mfbi = info->par;
  1053. int res = 0;
  1054. /* free boot splash memory on first /dev/fb0 open */
  1055. if ((mfbi->index == PLANE0) && diu_ops.release_bootmem)
  1056. diu_ops.release_bootmem();
  1057. spin_lock(&diu_lock);
  1058. mfbi->count++;
  1059. if (mfbi->count == 1) {
  1060. fsl_diu_check_var(&info->var, info);
  1061. res = fsl_diu_set_par(info);
  1062. if (res < 0)
  1063. mfbi->count--;
  1064. else
  1065. fsl_diu_enable_panel(info);
  1066. }
  1067. spin_unlock(&diu_lock);
  1068. return res;
  1069. }
  1070. /* turn off fb if count == 0
  1071. */
  1072. static int fsl_diu_release(struct fb_info *info, int user)
  1073. {
  1074. struct mfb_info *mfbi = info->par;
  1075. int res = 0;
  1076. spin_lock(&diu_lock);
  1077. mfbi->count--;
  1078. if (mfbi->count == 0)
  1079. fsl_diu_disable_panel(info);
  1080. spin_unlock(&diu_lock);
  1081. return res;
  1082. }
  1083. static struct fb_ops fsl_diu_ops = {
  1084. .owner = THIS_MODULE,
  1085. .fb_check_var = fsl_diu_check_var,
  1086. .fb_set_par = fsl_diu_set_par,
  1087. .fb_setcolreg = fsl_diu_setcolreg,
  1088. .fb_pan_display = fsl_diu_pan_display,
  1089. .fb_fillrect = cfb_fillrect,
  1090. .fb_copyarea = cfb_copyarea,
  1091. .fb_imageblit = cfb_imageblit,
  1092. .fb_ioctl = fsl_diu_ioctl,
  1093. .fb_open = fsl_diu_open,
  1094. .fb_release = fsl_diu_release,
  1095. };
  1096. static int init_fbinfo(struct fb_info *info)
  1097. {
  1098. struct mfb_info *mfbi = info->par;
  1099. info->device = NULL;
  1100. info->var.activate = FB_ACTIVATE_NOW;
  1101. info->fbops = &fsl_diu_ops;
  1102. info->flags = FBINFO_FLAG_DEFAULT;
  1103. info->pseudo_palette = &mfbi->pseudo_palette;
  1104. /* Allocate colormap */
  1105. fb_alloc_cmap(&info->cmap, 16, 0);
  1106. return 0;
  1107. }
  1108. static int __devinit install_fb(struct fb_info *info)
  1109. {
  1110. int rc;
  1111. struct mfb_info *mfbi = info->par;
  1112. const char *aoi_mode, *init_aoi_mode = "320x240";
  1113. struct fb_videomode *db = fsl_diu_mode_db;
  1114. unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
  1115. int has_default_mode = 1;
  1116. if (init_fbinfo(info))
  1117. return -EINVAL;
  1118. if (mfbi->index == PLANE0) {
  1119. if (mfbi->edid_data) {
  1120. /* Now build modedb from EDID */
  1121. fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
  1122. fb_videomode_to_modelist(info->monspecs.modedb,
  1123. info->monspecs.modedb_len,
  1124. &info->modelist);
  1125. db = info->monspecs.modedb;
  1126. dbsize = info->monspecs.modedb_len;
  1127. }
  1128. aoi_mode = fb_mode;
  1129. } else {
  1130. aoi_mode = init_aoi_mode;
  1131. }
  1132. rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, NULL,
  1133. default_bpp);
  1134. if (!rc) {
  1135. /*
  1136. * For plane 0 we continue and look into
  1137. * driver's internal modedb.
  1138. */
  1139. if ((mfbi->index == PLANE0) && mfbi->edid_data)
  1140. has_default_mode = 0;
  1141. else
  1142. return -EINVAL;
  1143. }
  1144. if (!has_default_mode) {
  1145. rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
  1146. ARRAY_SIZE(fsl_diu_mode_db), NULL, default_bpp);
  1147. if (rc)
  1148. has_default_mode = 1;
  1149. }
  1150. /* Still not found, use preferred mode from database if any */
  1151. if (!has_default_mode && info->monspecs.modedb) {
  1152. struct fb_monspecs *specs = &info->monspecs;
  1153. struct fb_videomode *modedb = &specs->modedb[0];
  1154. /*
  1155. * Get preferred timing. If not found,
  1156. * first mode in database will be used.
  1157. */
  1158. if (specs->misc & FB_MISC_1ST_DETAIL) {
  1159. int i;
  1160. for (i = 0; i < specs->modedb_len; i++) {
  1161. if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
  1162. modedb = &specs->modedb[i];
  1163. break;
  1164. }
  1165. }
  1166. }
  1167. info->var.bits_per_pixel = default_bpp;
  1168. fb_videomode_to_var(&info->var, modedb);
  1169. }
  1170. if (fsl_diu_check_var(&info->var, info)) {
  1171. dev_err(info->dev, "fsl_diu_check_var failed\n");
  1172. unmap_video_memory(info);
  1173. fb_dealloc_cmap(&info->cmap);
  1174. return -EINVAL;
  1175. }
  1176. if (register_framebuffer(info) < 0) {
  1177. dev_err(info->dev, "register_framebuffer failed\n");
  1178. unmap_video_memory(info);
  1179. fb_dealloc_cmap(&info->cmap);
  1180. return -EINVAL;
  1181. }
  1182. mfbi->registered = 1;
  1183. dev_info(info->dev, "%s registered successfully\n", mfbi->id);
  1184. return 0;
  1185. }
  1186. static void uninstall_fb(struct fb_info *info)
  1187. {
  1188. struct mfb_info *mfbi = info->par;
  1189. if (!mfbi->registered)
  1190. return;
  1191. if (mfbi->index == PLANE0)
  1192. kfree(mfbi->edid_data);
  1193. unregister_framebuffer(info);
  1194. unmap_video_memory(info);
  1195. if (&info->cmap)
  1196. fb_dealloc_cmap(&info->cmap);
  1197. mfbi->registered = 0;
  1198. }
  1199. static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
  1200. {
  1201. struct diu __iomem *hw = dev_id;
  1202. unsigned int status = in_be32(&hw->int_status);
  1203. if (status) {
  1204. /* This is the workaround for underrun */
  1205. if (status & INT_UNDRUN) {
  1206. out_be32(&hw->diu_mode, 0);
  1207. udelay(1);
  1208. out_be32(&hw->diu_mode, 1);
  1209. }
  1210. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1211. else if (status & INT_VSYNC) {
  1212. unsigned int i;
  1213. for (i = 0; i < coherence_data_size;
  1214. i += d_cache_line_size)
  1215. __asm__ __volatile__ (
  1216. "dcbz 0, %[input]"
  1217. ::[input]"r"(&coherence_data[i]));
  1218. }
  1219. #endif
  1220. return IRQ_HANDLED;
  1221. }
  1222. return IRQ_NONE;
  1223. }
  1224. static int request_irq_local(struct fsl_diu_data *machine_data)
  1225. {
  1226. struct diu __iomem *hw = machine_data->diu_reg;
  1227. u32 ints;
  1228. int ret;
  1229. /* Read to clear the status */
  1230. in_be32(&hw->int_status);
  1231. ret = request_irq(machine_data->irq, fsl_diu_isr, 0, "fsl-diu-fb", hw);
  1232. if (!ret) {
  1233. ints = INT_PARERR | INT_LS_BF_VS;
  1234. #if !defined(CONFIG_NOT_COHERENT_CACHE)
  1235. ints |= INT_VSYNC;
  1236. #endif
  1237. /* Read to clear the status */
  1238. in_be32(&hw->int_status);
  1239. out_be32(&hw->int_mask, ints);
  1240. }
  1241. return ret;
  1242. }
  1243. static void free_irq_local(struct fsl_diu_data *machine_data)
  1244. {
  1245. struct diu __iomem *hw = machine_data->diu_reg;
  1246. /* Disable all LCDC interrupt */
  1247. out_be32(&hw->int_mask, 0x1f);
  1248. free_irq(machine_data->irq, NULL);
  1249. }
  1250. #ifdef CONFIG_PM
  1251. /*
  1252. * Power management hooks. Note that we won't be called from IRQ context,
  1253. * unlike the blank functions above, so we may sleep.
  1254. */
  1255. static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state)
  1256. {
  1257. struct fsl_diu_data *machine_data;
  1258. machine_data = dev_get_drvdata(&ofdev->dev);
  1259. disable_lcdc(machine_data->fsl_diu_info[0]);
  1260. return 0;
  1261. }
  1262. static int fsl_diu_resume(struct platform_device *ofdev)
  1263. {
  1264. struct fsl_diu_data *machine_data;
  1265. machine_data = dev_get_drvdata(&ofdev->dev);
  1266. enable_lcdc(machine_data->fsl_diu_info[0]);
  1267. return 0;
  1268. }
  1269. #else
  1270. #define fsl_diu_suspend NULL
  1271. #define fsl_diu_resume NULL
  1272. #endif /* CONFIG_PM */
  1273. /* Align to 64-bit(8-byte), 32-byte, etc. */
  1274. static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1275. u32 bytes_align)
  1276. {
  1277. u32 offset;
  1278. dma_addr_t mask;
  1279. buf->vaddr =
  1280. dma_alloc_coherent(dev, size + bytes_align, &buf->paddr,
  1281. GFP_DMA | __GFP_ZERO);
  1282. if (!buf->vaddr)
  1283. return -ENOMEM;
  1284. mask = bytes_align - 1;
  1285. offset = buf->paddr & mask;
  1286. if (offset) {
  1287. buf->offset = bytes_align - offset;
  1288. buf->paddr = buf->paddr + offset;
  1289. } else
  1290. buf->offset = 0;
  1291. return 0;
  1292. }
  1293. static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1294. u32 bytes_align)
  1295. {
  1296. dma_free_coherent(dev, size + bytes_align, buf->vaddr,
  1297. buf->paddr - buf->offset);
  1298. }
  1299. static ssize_t store_monitor(struct device *device,
  1300. struct device_attribute *attr, const char *buf, size_t count)
  1301. {
  1302. enum fsl_diu_monitor_port old_monitor_port;
  1303. struct fsl_diu_data *machine_data =
  1304. container_of(attr, struct fsl_diu_data, dev_attr);
  1305. old_monitor_port = machine_data->monitor_port;
  1306. machine_data->monitor_port = fsl_diu_name_to_port(buf);
  1307. if (old_monitor_port != machine_data->monitor_port) {
  1308. /* All AOIs need adjust pixel format
  1309. * fsl_diu_set_par only change the pixsel format here
  1310. * unlikely to fail. */
  1311. fsl_diu_set_par(machine_data->fsl_diu_info[0]);
  1312. fsl_diu_set_par(machine_data->fsl_diu_info[1]);
  1313. fsl_diu_set_par(machine_data->fsl_diu_info[2]);
  1314. fsl_diu_set_par(machine_data->fsl_diu_info[3]);
  1315. fsl_diu_set_par(machine_data->fsl_diu_info[4]);
  1316. }
  1317. return count;
  1318. }
  1319. static ssize_t show_monitor(struct device *device,
  1320. struct device_attribute *attr, char *buf)
  1321. {
  1322. struct fsl_diu_data *machine_data =
  1323. container_of(attr, struct fsl_diu_data, dev_attr);
  1324. switch (machine_data->monitor_port) {
  1325. case FSL_DIU_PORT_DVI:
  1326. return sprintf(buf, "DVI\n");
  1327. case FSL_DIU_PORT_LVDS:
  1328. return sprintf(buf, "Single-link LVDS\n");
  1329. case FSL_DIU_PORT_DLVDS:
  1330. return sprintf(buf, "Dual-link LVDS\n");
  1331. }
  1332. return 0;
  1333. }
  1334. static int __devinit fsl_diu_probe(struct platform_device *pdev)
  1335. {
  1336. struct device_node *np = pdev->dev.of_node;
  1337. struct mfb_info *mfbi;
  1338. phys_addr_t dummy_ad_addr = 0;
  1339. int ret, i, error = 0;
  1340. struct fsl_diu_data *machine_data;
  1341. int diu_mode;
  1342. machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
  1343. if (!machine_data)
  1344. return -ENOMEM;
  1345. spin_lock_init(&machine_data->reg_lock);
  1346. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1347. machine_data->fsl_diu_info[i] =
  1348. framebuffer_alloc(sizeof(struct mfb_info), &pdev->dev);
  1349. if (!machine_data->fsl_diu_info[i]) {
  1350. dev_err(&pdev->dev, "cannot allocate memory\n");
  1351. ret = -ENOMEM;
  1352. goto error2;
  1353. }
  1354. mfbi = machine_data->fsl_diu_info[i]->par;
  1355. memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
  1356. mfbi->parent = machine_data;
  1357. if (mfbi->index == PLANE0) {
  1358. const u8 *prop;
  1359. int len;
  1360. /* Get EDID */
  1361. prop = of_get_property(np, "edid", &len);
  1362. if (prop && len == EDID_LENGTH)
  1363. mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
  1364. GFP_KERNEL);
  1365. }
  1366. }
  1367. machine_data->diu_reg = of_iomap(np, 0);
  1368. if (!machine_data->diu_reg) {
  1369. dev_err(&pdev->dev, "cannot map DIU registers\n");
  1370. ret = -EFAULT;
  1371. goto error2;
  1372. }
  1373. diu_mode = in_be32(&machine_data->diu_reg->diu_mode);
  1374. if (diu_mode == MFB_MODE0)
  1375. out_be32(&machine_data->diu_reg->diu_mode, 0); /* disable DIU */
  1376. /* Get the IRQ of the DIU */
  1377. machine_data->irq = irq_of_parse_and_map(np, 0);
  1378. if (!machine_data->irq) {
  1379. dev_err(&pdev->dev, "could not get DIU IRQ\n");
  1380. ret = -EINVAL;
  1381. goto error;
  1382. }
  1383. machine_data->monitor_port = monitor_port;
  1384. /* Area descriptor memory pool aligns to 64-bit boundary */
  1385. if (allocate_buf(&pdev->dev, &machine_data->ad,
  1386. sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
  1387. return -ENOMEM;
  1388. /* Get memory for Gamma Table - 32-byte aligned memory */
  1389. if (allocate_buf(&pdev->dev, &machine_data->gamma, 768, 32)) {
  1390. ret = -ENOMEM;
  1391. goto error;
  1392. }
  1393. /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
  1394. if (allocate_buf(&pdev->dev, &machine_data->cursor,
  1395. MAX_CURS * MAX_CURS * 2, 32)) {
  1396. ret = -ENOMEM;
  1397. goto error;
  1398. }
  1399. i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1400. machine_data->dummy_ad = (struct diu_ad *)((u32)machine_data->ad.vaddr +
  1401. machine_data->ad.offset) + i;
  1402. machine_data->dummy_ad->paddr = machine_data->ad.paddr +
  1403. i * sizeof(struct diu_ad);
  1404. machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
  1405. if (!machine_data->dummy_aoi_virt) {
  1406. ret = -ENOMEM;
  1407. goto error;
  1408. }
  1409. machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
  1410. machine_data->dummy_ad->pix_fmt = 0x88882317;
  1411. machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
  1412. machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
  1413. machine_data->dummy_ad->offset_xyi = 0;
  1414. machine_data->dummy_ad->offset_xyd = 0;
  1415. machine_data->dummy_ad->next_ad = 0;
  1416. /*
  1417. * Let DIU display splash screen if it was pre-initialized
  1418. * by the bootloader, set dummy area descriptor otherwise.
  1419. */
  1420. if (diu_mode == MFB_MODE0)
  1421. out_be32(&machine_data->diu_reg->desc[0],
  1422. machine_data->dummy_ad->paddr);
  1423. out_be32(&machine_data->diu_reg->desc[1], machine_data->dummy_ad->paddr);
  1424. out_be32(&machine_data->diu_reg->desc[2], machine_data->dummy_ad->paddr);
  1425. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1426. machine_data->fsl_diu_info[i]->fix.smem_start = 0;
  1427. mfbi = machine_data->fsl_diu_info[i]->par;
  1428. mfbi->ad = (struct diu_ad *)((u32)machine_data->ad.vaddr
  1429. + machine_data->ad.offset) + i;
  1430. mfbi->ad->paddr =
  1431. machine_data->ad.paddr + i * sizeof(struct diu_ad);
  1432. ret = install_fb(machine_data->fsl_diu_info[i]);
  1433. if (ret) {
  1434. dev_err(&pdev->dev, "could not register fb %d\n", i);
  1435. goto error;
  1436. }
  1437. }
  1438. if (request_irq_local(machine_data)) {
  1439. dev_err(&pdev->dev, "could not claim irq\n");
  1440. goto error;
  1441. }
  1442. sysfs_attr_init(&machine_data->dev_attr.attr);
  1443. machine_data->dev_attr.attr.name = "monitor";
  1444. machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
  1445. machine_data->dev_attr.show = show_monitor;
  1446. machine_data->dev_attr.store = store_monitor;
  1447. error = device_create_file(machine_data->fsl_diu_info[0]->dev,
  1448. &machine_data->dev_attr);
  1449. if (error) {
  1450. dev_err(&pdev->dev, "could not create sysfs file %s\n",
  1451. machine_data->dev_attr.attr.name);
  1452. }
  1453. dev_set_drvdata(&pdev->dev, machine_data);
  1454. return 0;
  1455. error:
  1456. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1457. uninstall_fb(machine_data->fsl_diu_info[i]);
  1458. if (machine_data->ad.vaddr)
  1459. free_buf(&pdev->dev, &machine_data->ad,
  1460. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1461. if (machine_data->gamma.vaddr)
  1462. free_buf(&pdev->dev, &machine_data->gamma, 768, 32);
  1463. if (machine_data->cursor.vaddr)
  1464. free_buf(&pdev->dev, &machine_data->cursor,
  1465. MAX_CURS * MAX_CURS * 2, 32);
  1466. if (machine_data->dummy_aoi_virt)
  1467. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1468. iounmap(machine_data->diu_reg);
  1469. error2:
  1470. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1471. if (machine_data->fsl_diu_info[i])
  1472. framebuffer_release(machine_data->fsl_diu_info[i]);
  1473. kfree(machine_data);
  1474. return ret;
  1475. }
  1476. static int fsl_diu_remove(struct platform_device *pdev)
  1477. {
  1478. struct fsl_diu_data *machine_data;
  1479. int i;
  1480. machine_data = dev_get_drvdata(&pdev->dev);
  1481. disable_lcdc(machine_data->fsl_diu_info[0]);
  1482. free_irq_local(machine_data);
  1483. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1484. uninstall_fb(machine_data->fsl_diu_info[i]);
  1485. if (machine_data->ad.vaddr)
  1486. free_buf(&pdev->dev, &machine_data->ad,
  1487. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1488. if (machine_data->gamma.vaddr)
  1489. free_buf(&pdev->dev, &machine_data->gamma, 768, 32);
  1490. if (machine_data->cursor.vaddr)
  1491. free_buf(&pdev->dev, &machine_data->cursor,
  1492. MAX_CURS * MAX_CURS * 2, 32);
  1493. if (machine_data->dummy_aoi_virt)
  1494. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1495. iounmap(machine_data->diu_reg);
  1496. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1497. if (machine_data->fsl_diu_info[i])
  1498. framebuffer_release(machine_data->fsl_diu_info[i]);
  1499. kfree(machine_data);
  1500. return 0;
  1501. }
  1502. #ifndef MODULE
  1503. static int __init fsl_diu_setup(char *options)
  1504. {
  1505. char *opt;
  1506. unsigned long val;
  1507. if (!options || !*options)
  1508. return 0;
  1509. while ((opt = strsep(&options, ",")) != NULL) {
  1510. if (!*opt)
  1511. continue;
  1512. if (!strncmp(opt, "monitor=", 8)) {
  1513. monitor_port = fsl_diu_name_to_port(opt + 8);
  1514. } else if (!strncmp(opt, "bpp=", 4)) {
  1515. if (!strict_strtoul(opt + 4, 10, &val))
  1516. default_bpp = val;
  1517. } else
  1518. fb_mode = opt;
  1519. }
  1520. return 0;
  1521. }
  1522. #endif
  1523. static struct of_device_id fsl_diu_match[] = {
  1524. #ifdef CONFIG_PPC_MPC512x
  1525. {
  1526. .compatible = "fsl,mpc5121-diu",
  1527. },
  1528. #endif
  1529. {
  1530. .compatible = "fsl,diu",
  1531. },
  1532. {}
  1533. };
  1534. MODULE_DEVICE_TABLE(of, fsl_diu_match);
  1535. static struct platform_driver fsl_diu_driver = {
  1536. .driver = {
  1537. .name = "fsl-diu-fb",
  1538. .owner = THIS_MODULE,
  1539. .of_match_table = fsl_diu_match,
  1540. },
  1541. .probe = fsl_diu_probe,
  1542. .remove = fsl_diu_remove,
  1543. .suspend = fsl_diu_suspend,
  1544. .resume = fsl_diu_resume,
  1545. };
  1546. static int __init fsl_diu_init(void)
  1547. {
  1548. #ifdef CONFIG_NOT_COHERENT_CACHE
  1549. struct device_node *np;
  1550. const u32 *prop;
  1551. #endif
  1552. int ret;
  1553. #ifndef MODULE
  1554. char *option;
  1555. /*
  1556. * For kernel boot options (in 'video=xxxfb:<options>' format)
  1557. */
  1558. if (fb_get_options("fslfb", &option))
  1559. return -ENODEV;
  1560. fsl_diu_setup(option);
  1561. #else
  1562. monitor_port = fsl_diu_name_to_port(monitor_string);
  1563. #endif
  1564. pr_info("Freescale Display Interface Unit (DIU) framebuffer driver\n");
  1565. #ifdef CONFIG_NOT_COHERENT_CACHE
  1566. np = of_find_node_by_type(NULL, "cpu");
  1567. if (!np) {
  1568. pr_err("fsl-diu-fb: can't find 'cpu' device node\n");
  1569. return -ENODEV;
  1570. }
  1571. prop = of_get_property(np, "d-cache-size", NULL);
  1572. if (prop == NULL) {
  1573. pr_err("fsl-diu-fb: missing 'd-cache-size' property' "
  1574. "in 'cpu' node\n");
  1575. of_node_put(np);
  1576. return -ENODEV;
  1577. }
  1578. /*
  1579. * Freescale PLRU requires 13/8 times the cache size to do a proper
  1580. * displacement flush
  1581. */
  1582. coherence_data_size = be32_to_cpup(prop) * 13;
  1583. coherence_data_size /= 8;
  1584. prop = of_get_property(np, "d-cache-line-size", NULL);
  1585. if (prop == NULL) {
  1586. pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' "
  1587. "in 'cpu' node\n");
  1588. of_node_put(np);
  1589. return -ENODEV;
  1590. }
  1591. d_cache_line_size = be32_to_cpup(prop);
  1592. of_node_put(np);
  1593. coherence_data = vmalloc(coherence_data_size);
  1594. if (!coherence_data)
  1595. return -ENOMEM;
  1596. #endif
  1597. ret = platform_driver_register(&fsl_diu_driver);
  1598. if (ret) {
  1599. pr_err("fsl-diu-fb: failed to register platform driver\n");
  1600. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1601. vfree(coherence_data);
  1602. #endif
  1603. }
  1604. return ret;
  1605. }
  1606. static void __exit fsl_diu_exit(void)
  1607. {
  1608. platform_driver_unregister(&fsl_diu_driver);
  1609. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1610. vfree(coherence_data);
  1611. #endif
  1612. }
  1613. module_init(fsl_diu_init);
  1614. module_exit(fsl_diu_exit);
  1615. MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
  1616. MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
  1617. MODULE_LICENSE("GPL");
  1618. module_param_named(mode, fb_mode, charp, 0);
  1619. MODULE_PARM_DESC(mode,
  1620. "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
  1621. module_param_named(bpp, default_bpp, ulong, 0);
  1622. MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified in 'mode'");
  1623. module_param_named(monitor, monitor_string, charp, 0);
  1624. MODULE_PARM_DESC(monitor, "Specify the monitor port "
  1625. "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform");