fsl_qe_udc.c 66 KB

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  1. /*
  2. * driver/usb/gadget/fsl_qe_udc.c
  3. *
  4. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  5. *
  6. * Xie Xiaobo <X.Xie@freescale.com>
  7. * Li Yang <leoli@freescale.com>
  8. * Based on bareboard code from Shlomi Gridish.
  9. *
  10. * Description:
  11. * Freescle QE/CPM USB Pheripheral Controller Driver
  12. * The controller can be found on MPC8360, MPC8272, and etc.
  13. * MPC8360 Rev 1.1 may need QE mircocode update
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #undef USB_TRACE
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/ioport.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/err.h>
  28. #include <linux/slab.h>
  29. #include <linux/list.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/io.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/of_address.h>
  34. #include <linux/of_platform.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/usb/ch9.h>
  37. #include <linux/usb/gadget.h>
  38. #include <linux/usb/otg.h>
  39. #include <asm/qe.h>
  40. #include <asm/cpm.h>
  41. #include <asm/dma.h>
  42. #include <asm/reg.h>
  43. #include "fsl_qe_udc.h"
  44. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  45. #define DRIVER_AUTHOR "Xie XiaoBo"
  46. #define DRIVER_VERSION "1.0"
  47. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  48. static const char driver_name[] = "fsl_qe_udc";
  49. static const char driver_desc[] = DRIVER_DESC;
  50. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  51. static const char *const ep_name[] = {
  52. "ep0-control", /* everyone has ep0 */
  53. /* 3 configurable endpoints */
  54. "ep1",
  55. "ep2",
  56. "ep3",
  57. };
  58. static struct usb_endpoint_descriptor qe_ep0_desc = {
  59. .bLength = USB_DT_ENDPOINT_SIZE,
  60. .bDescriptorType = USB_DT_ENDPOINT,
  61. .bEndpointAddress = 0,
  62. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  63. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  64. };
  65. /* it is initialized in probe() */
  66. static struct qe_udc *udc_controller;
  67. /********************************************************************
  68. * Internal Used Function Start
  69. ********************************************************************/
  70. /*-----------------------------------------------------------------
  71. * done() - retire a request; caller blocked irqs
  72. *--------------------------------------------------------------*/
  73. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  74. {
  75. struct qe_udc *udc = ep->udc;
  76. unsigned char stopped = ep->stopped;
  77. /* the req->queue pointer is used by ep_queue() func, in which
  78. * the request will be added into a udc_ep->queue 'd tail
  79. * so here the req will be dropped from the ep->queue
  80. */
  81. list_del_init(&req->queue);
  82. /* req.status should be set as -EINPROGRESS in ep_queue() */
  83. if (req->req.status == -EINPROGRESS)
  84. req->req.status = status;
  85. else
  86. status = req->req.status;
  87. if (req->mapped) {
  88. dma_unmap_single(udc->gadget.dev.parent,
  89. req->req.dma, req->req.length,
  90. ep_is_in(ep)
  91. ? DMA_TO_DEVICE
  92. : DMA_FROM_DEVICE);
  93. req->req.dma = DMA_ADDR_INVALID;
  94. req->mapped = 0;
  95. } else
  96. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  97. req->req.dma, req->req.length,
  98. ep_is_in(ep)
  99. ? DMA_TO_DEVICE
  100. : DMA_FROM_DEVICE);
  101. if (status && (status != -ESHUTDOWN))
  102. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  103. ep->ep.name, &req->req, status,
  104. req->req.actual, req->req.length);
  105. /* don't modify queue heads during completion callback */
  106. ep->stopped = 1;
  107. spin_unlock(&udc->lock);
  108. /* this complete() should a func implemented by gadget layer,
  109. * eg fsg->bulk_in_complete() */
  110. if (req->req.complete)
  111. req->req.complete(&ep->ep, &req->req);
  112. spin_lock(&udc->lock);
  113. ep->stopped = stopped;
  114. }
  115. /*-----------------------------------------------------------------
  116. * nuke(): delete all requests related to this ep
  117. *--------------------------------------------------------------*/
  118. static void nuke(struct qe_ep *ep, int status)
  119. {
  120. /* Whether this eq has request linked */
  121. while (!list_empty(&ep->queue)) {
  122. struct qe_req *req = NULL;
  123. req = list_entry(ep->queue.next, struct qe_req, queue);
  124. done(ep, req, status);
  125. }
  126. }
  127. /*---------------------------------------------------------------------------*
  128. * USB and Endpoint manipulate process, include parameter and register *
  129. *---------------------------------------------------------------------------*/
  130. /* @value: 1--set stall 0--clean stall */
  131. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  132. {
  133. u16 tem_usep;
  134. u8 epnum = ep->epnum;
  135. struct qe_udc *udc = ep->udc;
  136. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  137. tem_usep = tem_usep & ~USB_RHS_MASK;
  138. if (value == 1)
  139. tem_usep |= USB_RHS_STALL;
  140. else if (ep->dir == USB_DIR_IN)
  141. tem_usep |= USB_RHS_IGNORE_OUT;
  142. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  143. return 0;
  144. }
  145. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  146. {
  147. u16 tem_usep;
  148. u8 epnum = ep->epnum;
  149. struct qe_udc *udc = ep->udc;
  150. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  151. tem_usep = tem_usep & ~USB_THS_MASK;
  152. if (value == 1)
  153. tem_usep |= USB_THS_STALL;
  154. else if (ep->dir == USB_DIR_OUT)
  155. tem_usep |= USB_THS_IGNORE_IN;
  156. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  157. return 0;
  158. }
  159. static int qe_ep0_stall(struct qe_udc *udc)
  160. {
  161. qe_eptx_stall_change(&udc->eps[0], 1);
  162. qe_eprx_stall_change(&udc->eps[0], 1);
  163. udc_controller->ep0_state = WAIT_FOR_SETUP;
  164. udc_controller->ep0_dir = 0;
  165. return 0;
  166. }
  167. static int qe_eprx_nack(struct qe_ep *ep)
  168. {
  169. u8 epnum = ep->epnum;
  170. struct qe_udc *udc = ep->udc;
  171. if (ep->state == EP_STATE_IDLE) {
  172. /* Set the ep's nack */
  173. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  174. USB_RHS_MASK, USB_RHS_NACK);
  175. /* Mask Rx and Busy interrupts */
  176. clrbits16(&udc->usb_regs->usb_usbmr,
  177. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  178. ep->state = EP_STATE_NACK;
  179. }
  180. return 0;
  181. }
  182. static int qe_eprx_normal(struct qe_ep *ep)
  183. {
  184. struct qe_udc *udc = ep->udc;
  185. if (ep->state == EP_STATE_NACK) {
  186. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  187. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  188. /* Unmask RX interrupts */
  189. out_be16(&udc->usb_regs->usb_usber,
  190. USB_E_BSY_MASK | USB_E_RXB_MASK);
  191. setbits16(&udc->usb_regs->usb_usbmr,
  192. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  193. ep->state = EP_STATE_IDLE;
  194. ep->has_data = 0;
  195. }
  196. return 0;
  197. }
  198. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  199. {
  200. if (ep->udc->soc_type == PORT_CPM)
  201. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  202. CPM_USB_STOP_TX_OPCODE);
  203. else
  204. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  205. ep->epnum, 0);
  206. return 0;
  207. }
  208. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  209. {
  210. if (ep->udc->soc_type == PORT_CPM)
  211. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  212. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  213. else
  214. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  215. ep->epnum, 0);
  216. return 0;
  217. }
  218. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  219. {
  220. struct qe_udc *udc = ep->udc;
  221. int i;
  222. i = (int)ep->epnum;
  223. qe_ep_cmd_stoptx(ep);
  224. out_8(&udc->usb_regs->usb_uscom,
  225. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  226. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  227. out_be32(&udc->ep_param[i]->tstate, 0);
  228. out_be16(&udc->ep_param[i]->tbcnt, 0);
  229. ep->c_txbd = ep->txbase;
  230. ep->n_txbd = ep->txbase;
  231. qe_ep_cmd_restarttx(ep);
  232. return 0;
  233. }
  234. static int qe_ep_filltxfifo(struct qe_ep *ep)
  235. {
  236. struct qe_udc *udc = ep->udc;
  237. out_8(&udc->usb_regs->usb_uscom,
  238. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  239. return 0;
  240. }
  241. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  242. {
  243. struct qe_ep *ep;
  244. u32 bdring_len;
  245. struct qe_bd __iomem *bd;
  246. int i;
  247. ep = &udc->eps[pipe_num];
  248. if (ep->dir == USB_DIR_OUT)
  249. bdring_len = USB_BDRING_LEN_RX;
  250. else
  251. bdring_len = USB_BDRING_LEN;
  252. bd = ep->rxbase;
  253. for (i = 0; i < (bdring_len - 1); i++) {
  254. out_be32((u32 __iomem *)bd, R_E | R_I);
  255. bd++;
  256. }
  257. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  258. bd = ep->txbase;
  259. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  260. out_be32(&bd->buf, 0);
  261. out_be32((u32 __iomem *)bd, 0);
  262. bd++;
  263. }
  264. out_be32((u32 __iomem *)bd, T_W);
  265. return 0;
  266. }
  267. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  268. {
  269. struct qe_ep *ep;
  270. u16 tmpusep;
  271. ep = &udc->eps[pipe_num];
  272. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  273. tmpusep &= ~USB_RTHS_MASK;
  274. switch (ep->dir) {
  275. case USB_DIR_BOTH:
  276. qe_ep_flushtxfifo(ep);
  277. break;
  278. case USB_DIR_OUT:
  279. tmpusep |= USB_THS_IGNORE_IN;
  280. break;
  281. case USB_DIR_IN:
  282. qe_ep_flushtxfifo(ep);
  283. tmpusep |= USB_RHS_IGNORE_OUT;
  284. break;
  285. default:
  286. break;
  287. }
  288. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  289. qe_epbds_reset(udc, pipe_num);
  290. return 0;
  291. }
  292. static int qe_ep_toggledata01(struct qe_ep *ep)
  293. {
  294. ep->data01 ^= 0x1;
  295. return 0;
  296. }
  297. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  298. {
  299. struct qe_ep *ep = &udc->eps[pipe_num];
  300. unsigned long tmp_addr = 0;
  301. struct usb_ep_para __iomem *epparam;
  302. int i;
  303. struct qe_bd __iomem *bd;
  304. int bdring_len;
  305. if (ep->dir == USB_DIR_OUT)
  306. bdring_len = USB_BDRING_LEN_RX;
  307. else
  308. bdring_len = USB_BDRING_LEN;
  309. epparam = udc->ep_param[pipe_num];
  310. /* alloc multi-ram for BD rings and set the ep parameters */
  311. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  312. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  313. if (IS_ERR_VALUE(tmp_addr))
  314. return -ENOMEM;
  315. out_be16(&epparam->rbase, (u16)tmp_addr);
  316. out_be16(&epparam->tbase, (u16)(tmp_addr +
  317. (sizeof(struct qe_bd) * bdring_len)));
  318. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  319. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  320. ep->rxbase = cpm_muram_addr(tmp_addr);
  321. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  322. * bdring_len));
  323. ep->n_rxbd = ep->rxbase;
  324. ep->e_rxbd = ep->rxbase;
  325. ep->n_txbd = ep->txbase;
  326. ep->c_txbd = ep->txbase;
  327. ep->data01 = 0; /* data0 */
  328. /* Init TX and RX bds */
  329. bd = ep->rxbase;
  330. for (i = 0; i < bdring_len - 1; i++) {
  331. out_be32(&bd->buf, 0);
  332. out_be32((u32 __iomem *)bd, 0);
  333. bd++;
  334. }
  335. out_be32(&bd->buf, 0);
  336. out_be32((u32 __iomem *)bd, R_W);
  337. bd = ep->txbase;
  338. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  339. out_be32(&bd->buf, 0);
  340. out_be32((u32 __iomem *)bd, 0);
  341. bd++;
  342. }
  343. out_be32(&bd->buf, 0);
  344. out_be32((u32 __iomem *)bd, T_W);
  345. return 0;
  346. }
  347. static int qe_ep_rxbd_update(struct qe_ep *ep)
  348. {
  349. unsigned int size;
  350. int i;
  351. unsigned int tmp;
  352. struct qe_bd __iomem *bd;
  353. unsigned int bdring_len;
  354. if (ep->rxbase == NULL)
  355. return -EINVAL;
  356. bd = ep->rxbase;
  357. ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
  358. if (ep->rxframe == NULL) {
  359. dev_err(ep->udc->dev, "malloc rxframe failed\n");
  360. return -ENOMEM;
  361. }
  362. qe_frame_init(ep->rxframe);
  363. if (ep->dir == USB_DIR_OUT)
  364. bdring_len = USB_BDRING_LEN_RX;
  365. else
  366. bdring_len = USB_BDRING_LEN;
  367. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  368. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  369. if (ep->rxbuffer == NULL) {
  370. dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
  371. size);
  372. kfree(ep->rxframe);
  373. return -ENOMEM;
  374. }
  375. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  376. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  377. ep->rxbuf_d = dma_map_single(udc_controller->gadget.dev.parent,
  378. ep->rxbuffer,
  379. size,
  380. DMA_FROM_DEVICE);
  381. ep->rxbufmap = 1;
  382. } else {
  383. dma_sync_single_for_device(udc_controller->gadget.dev.parent,
  384. ep->rxbuf_d, size,
  385. DMA_FROM_DEVICE);
  386. ep->rxbufmap = 0;
  387. }
  388. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  389. tmp = ep->rxbuf_d;
  390. tmp = (u32)(((tmp >> 2) << 2) + 4);
  391. for (i = 0; i < bdring_len - 1; i++) {
  392. out_be32(&bd->buf, tmp);
  393. out_be32((u32 __iomem *)bd, (R_E | R_I));
  394. tmp = tmp + size;
  395. bd++;
  396. }
  397. out_be32(&bd->buf, tmp);
  398. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  399. return 0;
  400. }
  401. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  402. {
  403. struct qe_ep *ep = &udc->eps[pipe_num];
  404. struct usb_ep_para __iomem *epparam;
  405. u16 usep, logepnum;
  406. u16 tmp;
  407. u8 rtfcr = 0;
  408. epparam = udc->ep_param[pipe_num];
  409. usep = 0;
  410. logepnum = (ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  411. usep |= (logepnum << USB_EPNUM_SHIFT);
  412. switch (ep->desc->bmAttributes & 0x03) {
  413. case USB_ENDPOINT_XFER_BULK:
  414. usep |= USB_TRANS_BULK;
  415. break;
  416. case USB_ENDPOINT_XFER_ISOC:
  417. usep |= USB_TRANS_ISO;
  418. break;
  419. case USB_ENDPOINT_XFER_INT:
  420. usep |= USB_TRANS_INT;
  421. break;
  422. default:
  423. usep |= USB_TRANS_CTR;
  424. break;
  425. }
  426. switch (ep->dir) {
  427. case USB_DIR_OUT:
  428. usep |= USB_THS_IGNORE_IN;
  429. break;
  430. case USB_DIR_IN:
  431. usep |= USB_RHS_IGNORE_OUT;
  432. break;
  433. default:
  434. break;
  435. }
  436. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  437. rtfcr = 0x30;
  438. out_8(&epparam->rbmr, rtfcr);
  439. out_8(&epparam->tbmr, rtfcr);
  440. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  441. /* MRBLR must be divisble by 4 */
  442. tmp = (u16)(((tmp >> 2) << 2) + 4);
  443. out_be16(&epparam->mrblr, tmp);
  444. return 0;
  445. }
  446. static int qe_ep_init(struct qe_udc *udc,
  447. unsigned char pipe_num,
  448. const struct usb_endpoint_descriptor *desc)
  449. {
  450. struct qe_ep *ep = &udc->eps[pipe_num];
  451. unsigned long flags;
  452. int reval = 0;
  453. u16 max = 0;
  454. max = usb_endpoint_maxp(desc);
  455. /* check the max package size validate for this endpoint */
  456. /* Refer to USB2.0 spec table 9-13,
  457. */
  458. if (pipe_num != 0) {
  459. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  460. case USB_ENDPOINT_XFER_BULK:
  461. if (strstr(ep->ep.name, "-iso")
  462. || strstr(ep->ep.name, "-int"))
  463. goto en_done;
  464. switch (udc->gadget.speed) {
  465. case USB_SPEED_HIGH:
  466. if ((max == 128) || (max == 256) || (max == 512))
  467. break;
  468. default:
  469. switch (max) {
  470. case 4:
  471. case 8:
  472. case 16:
  473. case 32:
  474. case 64:
  475. break;
  476. default:
  477. case USB_SPEED_LOW:
  478. goto en_done;
  479. }
  480. }
  481. break;
  482. case USB_ENDPOINT_XFER_INT:
  483. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  484. goto en_done;
  485. switch (udc->gadget.speed) {
  486. case USB_SPEED_HIGH:
  487. if (max <= 1024)
  488. break;
  489. case USB_SPEED_FULL:
  490. if (max <= 64)
  491. break;
  492. default:
  493. if (max <= 8)
  494. break;
  495. goto en_done;
  496. }
  497. break;
  498. case USB_ENDPOINT_XFER_ISOC:
  499. if (strstr(ep->ep.name, "-bulk")
  500. || strstr(ep->ep.name, "-int"))
  501. goto en_done;
  502. switch (udc->gadget.speed) {
  503. case USB_SPEED_HIGH:
  504. if (max <= 1024)
  505. break;
  506. case USB_SPEED_FULL:
  507. if (max <= 1023)
  508. break;
  509. default:
  510. goto en_done;
  511. }
  512. break;
  513. case USB_ENDPOINT_XFER_CONTROL:
  514. if (strstr(ep->ep.name, "-iso")
  515. || strstr(ep->ep.name, "-int"))
  516. goto en_done;
  517. switch (udc->gadget.speed) {
  518. case USB_SPEED_HIGH:
  519. case USB_SPEED_FULL:
  520. switch (max) {
  521. case 1:
  522. case 2:
  523. case 4:
  524. case 8:
  525. case 16:
  526. case 32:
  527. case 64:
  528. break;
  529. default:
  530. goto en_done;
  531. }
  532. case USB_SPEED_LOW:
  533. switch (max) {
  534. case 1:
  535. case 2:
  536. case 4:
  537. case 8:
  538. break;
  539. default:
  540. goto en_done;
  541. }
  542. default:
  543. goto en_done;
  544. }
  545. break;
  546. default:
  547. goto en_done;
  548. }
  549. } /* if ep0*/
  550. spin_lock_irqsave(&udc->lock, flags);
  551. /* initialize ep structure */
  552. ep->ep.maxpacket = max;
  553. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  554. ep->desc = desc;
  555. ep->stopped = 0;
  556. ep->init = 1;
  557. if (pipe_num == 0) {
  558. ep->dir = USB_DIR_BOTH;
  559. udc->ep0_dir = USB_DIR_OUT;
  560. udc->ep0_state = WAIT_FOR_SETUP;
  561. } else {
  562. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  563. case USB_DIR_OUT:
  564. ep->dir = USB_DIR_OUT;
  565. break;
  566. case USB_DIR_IN:
  567. ep->dir = USB_DIR_IN;
  568. default:
  569. break;
  570. }
  571. }
  572. /* hardware special operation */
  573. qe_ep_bd_init(udc, pipe_num);
  574. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  575. reval = qe_ep_rxbd_update(ep);
  576. if (reval)
  577. goto en_done1;
  578. }
  579. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  580. ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
  581. if (ep->txframe == NULL) {
  582. dev_err(udc->dev, "malloc txframe failed\n");
  583. goto en_done2;
  584. }
  585. qe_frame_init(ep->txframe);
  586. }
  587. qe_ep_register_init(udc, pipe_num);
  588. /* Now HW will be NAKing transfers to that EP,
  589. * until a buffer is queued to it. */
  590. spin_unlock_irqrestore(&udc->lock, flags);
  591. return 0;
  592. en_done2:
  593. kfree(ep->rxbuffer);
  594. kfree(ep->rxframe);
  595. en_done1:
  596. spin_unlock_irqrestore(&udc->lock, flags);
  597. en_done:
  598. dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
  599. return -ENODEV;
  600. }
  601. static inline void qe_usb_enable(void)
  602. {
  603. setbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
  604. }
  605. static inline void qe_usb_disable(void)
  606. {
  607. clrbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
  608. }
  609. /*----------------------------------------------------------------------------*
  610. * USB and EP basic manipulate function end *
  611. *----------------------------------------------------------------------------*/
  612. /******************************************************************************
  613. UDC transmit and receive process
  614. ******************************************************************************/
  615. static void recycle_one_rxbd(struct qe_ep *ep)
  616. {
  617. u32 bdstatus;
  618. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  619. bdstatus = R_I | R_E | (bdstatus & R_W);
  620. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  621. if (bdstatus & R_W)
  622. ep->e_rxbd = ep->rxbase;
  623. else
  624. ep->e_rxbd++;
  625. }
  626. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  627. {
  628. u32 bdstatus;
  629. struct qe_bd __iomem *bd, *nextbd;
  630. unsigned char stop = 0;
  631. nextbd = ep->n_rxbd;
  632. bd = ep->e_rxbd;
  633. bdstatus = in_be32((u32 __iomem *)bd);
  634. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  635. bdstatus = R_E | R_I | (bdstatus & R_W);
  636. out_be32((u32 __iomem *)bd, bdstatus);
  637. if (bdstatus & R_W)
  638. bd = ep->rxbase;
  639. else
  640. bd++;
  641. bdstatus = in_be32((u32 __iomem *)bd);
  642. if (stopatnext && (bd == nextbd))
  643. stop = 1;
  644. }
  645. ep->e_rxbd = bd;
  646. }
  647. static void ep_recycle_rxbds(struct qe_ep *ep)
  648. {
  649. struct qe_bd __iomem *bd = ep->n_rxbd;
  650. u32 bdstatus;
  651. u8 epnum = ep->epnum;
  652. struct qe_udc *udc = ep->udc;
  653. bdstatus = in_be32((u32 __iomem *)bd);
  654. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  655. bd = ep->rxbase +
  656. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  657. in_be16(&udc->ep_param[epnum]->rbase))
  658. >> 3);
  659. bdstatus = in_be32((u32 __iomem *)bd);
  660. if (bdstatus & R_W)
  661. bd = ep->rxbase;
  662. else
  663. bd++;
  664. ep->e_rxbd = bd;
  665. recycle_rxbds(ep, 0);
  666. ep->e_rxbd = ep->n_rxbd;
  667. } else
  668. recycle_rxbds(ep, 1);
  669. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  670. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  671. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  672. qe_eprx_normal(ep);
  673. ep->localnack = 0;
  674. }
  675. static void setup_received_handle(struct qe_udc *udc,
  676. struct usb_ctrlrequest *setup);
  677. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  678. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  679. /* when BD PID is setup, handle the packet */
  680. static int ep0_setup_handle(struct qe_udc *udc)
  681. {
  682. struct qe_ep *ep = &udc->eps[0];
  683. struct qe_frame *pframe;
  684. unsigned int fsize;
  685. u8 *cp;
  686. pframe = ep->rxframe;
  687. if ((frame_get_info(pframe) & PID_SETUP)
  688. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  689. fsize = frame_get_length(pframe);
  690. if (unlikely(fsize != 8))
  691. return -EINVAL;
  692. cp = (u8 *)&udc->local_setup_buff;
  693. memcpy(cp, pframe->data, fsize);
  694. ep->data01 = 1;
  695. /* handle the usb command base on the usb_ctrlrequest */
  696. setup_received_handle(udc, &udc->local_setup_buff);
  697. return 0;
  698. }
  699. return -EINVAL;
  700. }
  701. static int qe_ep0_rx(struct qe_udc *udc)
  702. {
  703. struct qe_ep *ep = &udc->eps[0];
  704. struct qe_frame *pframe;
  705. struct qe_bd __iomem *bd;
  706. u32 bdstatus, length;
  707. u32 vaddr;
  708. pframe = ep->rxframe;
  709. if (ep->dir == USB_DIR_IN) {
  710. dev_err(udc->dev, "ep0 not a control endpoint\n");
  711. return -EINVAL;
  712. }
  713. bd = ep->n_rxbd;
  714. bdstatus = in_be32((u32 __iomem *)bd);
  715. length = bdstatus & BD_LENGTH_MASK;
  716. while (!(bdstatus & R_E) && length) {
  717. if ((bdstatus & R_F) && (bdstatus & R_L)
  718. && !(bdstatus & R_ERROR)) {
  719. if (length == USB_CRC_SIZE) {
  720. udc->ep0_state = WAIT_FOR_SETUP;
  721. dev_vdbg(udc->dev,
  722. "receive a ZLP in status phase\n");
  723. } else {
  724. qe_frame_clean(pframe);
  725. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  726. frame_set_data(pframe, (u8 *)vaddr);
  727. frame_set_length(pframe,
  728. (length - USB_CRC_SIZE));
  729. frame_set_status(pframe, FRAME_OK);
  730. switch (bdstatus & R_PID) {
  731. case R_PID_SETUP:
  732. frame_set_info(pframe, PID_SETUP);
  733. break;
  734. case R_PID_DATA1:
  735. frame_set_info(pframe, PID_DATA1);
  736. break;
  737. default:
  738. frame_set_info(pframe, PID_DATA0);
  739. break;
  740. }
  741. if ((bdstatus & R_PID) == R_PID_SETUP)
  742. ep0_setup_handle(udc);
  743. else
  744. qe_ep_rxframe_handle(ep);
  745. }
  746. } else {
  747. dev_err(udc->dev, "The receive frame with error!\n");
  748. }
  749. /* note: don't clear the rxbd's buffer address */
  750. recycle_one_rxbd(ep);
  751. /* Get next BD */
  752. if (bdstatus & R_W)
  753. bd = ep->rxbase;
  754. else
  755. bd++;
  756. bdstatus = in_be32((u32 __iomem *)bd);
  757. length = bdstatus & BD_LENGTH_MASK;
  758. }
  759. ep->n_rxbd = bd;
  760. return 0;
  761. }
  762. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  763. {
  764. struct qe_frame *pframe;
  765. u8 framepid = 0;
  766. unsigned int fsize;
  767. u8 *cp;
  768. struct qe_req *req;
  769. pframe = ep->rxframe;
  770. if (frame_get_info(pframe) & PID_DATA1)
  771. framepid = 0x1;
  772. if (framepid != ep->data01) {
  773. dev_err(ep->udc->dev, "the data01 error!\n");
  774. return -EIO;
  775. }
  776. fsize = frame_get_length(pframe);
  777. if (list_empty(&ep->queue)) {
  778. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  779. } else {
  780. req = list_entry(ep->queue.next, struct qe_req, queue);
  781. cp = (u8 *)(req->req.buf) + req->req.actual;
  782. if (cp) {
  783. memcpy(cp, pframe->data, fsize);
  784. req->req.actual += fsize;
  785. if ((fsize < ep->ep.maxpacket) ||
  786. (req->req.actual >= req->req.length)) {
  787. if (ep->epnum == 0)
  788. ep0_req_complete(ep->udc, req);
  789. else
  790. done(ep, req, 0);
  791. if (list_empty(&ep->queue) && ep->epnum != 0)
  792. qe_eprx_nack(ep);
  793. }
  794. }
  795. }
  796. qe_ep_toggledata01(ep);
  797. return 0;
  798. }
  799. static void ep_rx_tasklet(unsigned long data)
  800. {
  801. struct qe_udc *udc = (struct qe_udc *)data;
  802. struct qe_ep *ep;
  803. struct qe_frame *pframe;
  804. struct qe_bd __iomem *bd;
  805. unsigned long flags;
  806. u32 bdstatus, length;
  807. u32 vaddr, i;
  808. spin_lock_irqsave(&udc->lock, flags);
  809. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  810. ep = &udc->eps[i];
  811. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  812. dev_dbg(udc->dev,
  813. "This is a transmit ep or disable tasklet!\n");
  814. continue;
  815. }
  816. pframe = ep->rxframe;
  817. bd = ep->n_rxbd;
  818. bdstatus = in_be32((u32 __iomem *)bd);
  819. length = bdstatus & BD_LENGTH_MASK;
  820. while (!(bdstatus & R_E) && length) {
  821. if (list_empty(&ep->queue)) {
  822. qe_eprx_nack(ep);
  823. dev_dbg(udc->dev,
  824. "The rxep have noreq %d\n",
  825. ep->has_data);
  826. break;
  827. }
  828. if ((bdstatus & R_F) && (bdstatus & R_L)
  829. && !(bdstatus & R_ERROR)) {
  830. qe_frame_clean(pframe);
  831. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  832. frame_set_data(pframe, (u8 *)vaddr);
  833. frame_set_length(pframe,
  834. (length - USB_CRC_SIZE));
  835. frame_set_status(pframe, FRAME_OK);
  836. switch (bdstatus & R_PID) {
  837. case R_PID_DATA1:
  838. frame_set_info(pframe, PID_DATA1);
  839. break;
  840. case R_PID_SETUP:
  841. frame_set_info(pframe, PID_SETUP);
  842. break;
  843. default:
  844. frame_set_info(pframe, PID_DATA0);
  845. break;
  846. }
  847. /* handle the rx frame */
  848. qe_ep_rxframe_handle(ep);
  849. } else {
  850. dev_err(udc->dev,
  851. "error in received frame\n");
  852. }
  853. /* note: don't clear the rxbd's buffer address */
  854. /*clear the length */
  855. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  856. ep->has_data--;
  857. if (!(ep->localnack))
  858. recycle_one_rxbd(ep);
  859. /* Get next BD */
  860. if (bdstatus & R_W)
  861. bd = ep->rxbase;
  862. else
  863. bd++;
  864. bdstatus = in_be32((u32 __iomem *)bd);
  865. length = bdstatus & BD_LENGTH_MASK;
  866. }
  867. ep->n_rxbd = bd;
  868. if (ep->localnack)
  869. ep_recycle_rxbds(ep);
  870. ep->enable_tasklet = 0;
  871. } /* for i=1 */
  872. spin_unlock_irqrestore(&udc->lock, flags);
  873. }
  874. static int qe_ep_rx(struct qe_ep *ep)
  875. {
  876. struct qe_udc *udc;
  877. struct qe_frame *pframe;
  878. struct qe_bd __iomem *bd;
  879. u16 swoffs, ucoffs, emptybds;
  880. udc = ep->udc;
  881. pframe = ep->rxframe;
  882. if (ep->dir == USB_DIR_IN) {
  883. dev_err(udc->dev, "transmit ep in rx function\n");
  884. return -EINVAL;
  885. }
  886. bd = ep->n_rxbd;
  887. swoffs = (u16)(bd - ep->rxbase);
  888. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  889. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  890. if (swoffs < ucoffs)
  891. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  892. else
  893. emptybds = swoffs - ucoffs;
  894. if (emptybds < MIN_EMPTY_BDS) {
  895. qe_eprx_nack(ep);
  896. ep->localnack = 1;
  897. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  898. }
  899. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  900. if (list_empty(&ep->queue)) {
  901. qe_eprx_nack(ep);
  902. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  903. ep->has_data);
  904. return 0;
  905. }
  906. tasklet_schedule(&udc->rx_tasklet);
  907. ep->enable_tasklet = 1;
  908. return 0;
  909. }
  910. /* send data from a frame, no matter what tx_req */
  911. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  912. {
  913. struct qe_udc *udc = ep->udc;
  914. struct qe_bd __iomem *bd;
  915. u16 saveusbmr;
  916. u32 bdstatus, pidmask;
  917. u32 paddr;
  918. if (ep->dir == USB_DIR_OUT) {
  919. dev_err(udc->dev, "receive ep passed to tx function\n");
  920. return -EINVAL;
  921. }
  922. /* Disable the Tx interrupt */
  923. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  924. out_be16(&udc->usb_regs->usb_usbmr,
  925. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  926. bd = ep->n_txbd;
  927. bdstatus = in_be32((u32 __iomem *)bd);
  928. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  929. if (frame_get_length(frame) == 0) {
  930. frame_set_data(frame, udc->nullbuf);
  931. frame_set_length(frame, 2);
  932. frame->info |= (ZLP | NO_CRC);
  933. dev_vdbg(udc->dev, "the frame size = 0\n");
  934. }
  935. paddr = virt_to_phys((void *)frame->data);
  936. out_be32(&bd->buf, paddr);
  937. bdstatus = (bdstatus&T_W);
  938. if (!(frame_get_info(frame) & NO_CRC))
  939. bdstatus |= T_R | T_I | T_L | T_TC
  940. | frame_get_length(frame);
  941. else
  942. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  943. /* if the packet is a ZLP in status phase */
  944. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  945. ep->data01 = 0x1;
  946. if (ep->data01) {
  947. pidmask = T_PID_DATA1;
  948. frame->info |= PID_DATA1;
  949. } else {
  950. pidmask = T_PID_DATA0;
  951. frame->info |= PID_DATA0;
  952. }
  953. bdstatus |= T_CNF;
  954. bdstatus |= pidmask;
  955. out_be32((u32 __iomem *)bd, bdstatus);
  956. qe_ep_filltxfifo(ep);
  957. /* enable the TX interrupt */
  958. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  959. qe_ep_toggledata01(ep);
  960. if (bdstatus & T_W)
  961. ep->n_txbd = ep->txbase;
  962. else
  963. ep->n_txbd++;
  964. return 0;
  965. } else {
  966. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  967. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  968. return -EBUSY;
  969. }
  970. }
  971. /* when a bd was transmitted, the function can
  972. * handle the tx_req, not include ep0 */
  973. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  974. {
  975. if (ep->tx_req != NULL) {
  976. struct qe_req *req = ep->tx_req;
  977. unsigned zlp = 0, last_len = 0;
  978. last_len = min_t(unsigned, req->req.length - ep->sent,
  979. ep->ep.maxpacket);
  980. if (!restart) {
  981. int asent = ep->last;
  982. ep->sent += asent;
  983. ep->last -= asent;
  984. } else {
  985. ep->last = 0;
  986. }
  987. /* zlp needed when req->re.zero is set */
  988. if (req->req.zero) {
  989. if (last_len == 0 ||
  990. (req->req.length % ep->ep.maxpacket) != 0)
  991. zlp = 0;
  992. else
  993. zlp = 1;
  994. } else
  995. zlp = 0;
  996. /* a request already were transmitted completely */
  997. if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
  998. done(ep, ep->tx_req, 0);
  999. ep->tx_req = NULL;
  1000. ep->last = 0;
  1001. ep->sent = 0;
  1002. }
  1003. }
  1004. /* we should gain a new tx_req fot this endpoint */
  1005. if (ep->tx_req == NULL) {
  1006. if (!list_empty(&ep->queue)) {
  1007. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  1008. queue);
  1009. ep->last = 0;
  1010. ep->sent = 0;
  1011. }
  1012. }
  1013. return 0;
  1014. }
  1015. /* give a frame and a tx_req, send some data */
  1016. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1017. {
  1018. unsigned int size;
  1019. u8 *buf;
  1020. qe_frame_clean(frame);
  1021. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1022. ep->ep.maxpacket);
  1023. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1024. if (buf && size) {
  1025. ep->last = size;
  1026. ep->tx_req->req.actual += size;
  1027. frame_set_data(frame, buf);
  1028. frame_set_length(frame, size);
  1029. frame_set_status(frame, FRAME_OK);
  1030. frame_set_info(frame, 0);
  1031. return qe_ep_tx(ep, frame);
  1032. }
  1033. return -EIO;
  1034. }
  1035. /* give a frame struct,send a ZLP */
  1036. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1037. {
  1038. struct qe_udc *udc = ep->udc;
  1039. if (frame == NULL)
  1040. return -ENODEV;
  1041. qe_frame_clean(frame);
  1042. frame_set_data(frame, (u8 *)udc->nullbuf);
  1043. frame_set_length(frame, 2);
  1044. frame_set_status(frame, FRAME_OK);
  1045. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1046. return qe_ep_tx(ep, frame);
  1047. }
  1048. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1049. {
  1050. struct qe_req *req = ep->tx_req;
  1051. int reval;
  1052. if (req == NULL)
  1053. return -ENODEV;
  1054. if ((req->req.length - ep->sent) > 0)
  1055. reval = qe_usb_senddata(ep, frame);
  1056. else
  1057. reval = sendnulldata(ep, frame, 0);
  1058. return reval;
  1059. }
  1060. /* if direction is DIR_IN, the status is Device->Host
  1061. * if direction is DIR_OUT, the status transaction is Device<-Host
  1062. * in status phase, udc create a request and gain status */
  1063. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1064. {
  1065. struct qe_ep *ep = &udc->eps[0];
  1066. if (direction == USB_DIR_IN) {
  1067. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1068. udc->ep0_dir = USB_DIR_IN;
  1069. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1070. } else {
  1071. udc->ep0_dir = USB_DIR_OUT;
  1072. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1073. }
  1074. return 0;
  1075. }
  1076. /* a request complete in ep0, whether gadget request or udc request */
  1077. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1078. {
  1079. struct qe_ep *ep = &udc->eps[0];
  1080. /* because usb and ep's status already been set in ch9setaddress() */
  1081. switch (udc->ep0_state) {
  1082. case DATA_STATE_XMIT:
  1083. done(ep, req, 0);
  1084. /* receive status phase */
  1085. if (ep0_prime_status(udc, USB_DIR_OUT))
  1086. qe_ep0_stall(udc);
  1087. break;
  1088. case DATA_STATE_NEED_ZLP:
  1089. done(ep, req, 0);
  1090. udc->ep0_state = WAIT_FOR_SETUP;
  1091. break;
  1092. case DATA_STATE_RECV:
  1093. done(ep, req, 0);
  1094. /* send status phase */
  1095. if (ep0_prime_status(udc, USB_DIR_IN))
  1096. qe_ep0_stall(udc);
  1097. break;
  1098. case WAIT_FOR_OUT_STATUS:
  1099. done(ep, req, 0);
  1100. udc->ep0_state = WAIT_FOR_SETUP;
  1101. break;
  1102. case WAIT_FOR_SETUP:
  1103. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1104. break;
  1105. default:
  1106. qe_ep0_stall(udc);
  1107. break;
  1108. }
  1109. }
  1110. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1111. {
  1112. struct qe_req *tx_req = NULL;
  1113. struct qe_frame *frame = ep->txframe;
  1114. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1115. if (!restart)
  1116. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1117. else
  1118. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1119. return 0;
  1120. }
  1121. tx_req = ep->tx_req;
  1122. if (tx_req != NULL) {
  1123. if (!restart) {
  1124. int asent = ep->last;
  1125. ep->sent += asent;
  1126. ep->last -= asent;
  1127. } else {
  1128. ep->last = 0;
  1129. }
  1130. /* a request already were transmitted completely */
  1131. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1132. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1133. ep0_req_complete(ep->udc, ep->tx_req);
  1134. ep->tx_req = NULL;
  1135. ep->last = 0;
  1136. ep->sent = 0;
  1137. }
  1138. } else {
  1139. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1140. }
  1141. return 0;
  1142. }
  1143. static int ep0_txframe_handle(struct qe_ep *ep)
  1144. {
  1145. /* if have error, transmit again */
  1146. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1147. qe_ep_flushtxfifo(ep);
  1148. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1149. if (frame_get_info(ep->txframe) & PID_DATA0)
  1150. ep->data01 = 0;
  1151. else
  1152. ep->data01 = 1;
  1153. ep0_txcomplete(ep, 1);
  1154. } else
  1155. ep0_txcomplete(ep, 0);
  1156. frame_create_tx(ep, ep->txframe);
  1157. return 0;
  1158. }
  1159. static int qe_ep0_txconf(struct qe_ep *ep)
  1160. {
  1161. struct qe_bd __iomem *bd;
  1162. struct qe_frame *pframe;
  1163. u32 bdstatus;
  1164. bd = ep->c_txbd;
  1165. bdstatus = in_be32((u32 __iomem *)bd);
  1166. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1167. pframe = ep->txframe;
  1168. /* clear and recycle the BD */
  1169. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1170. out_be32(&bd->buf, 0);
  1171. if (bdstatus & T_W)
  1172. ep->c_txbd = ep->txbase;
  1173. else
  1174. ep->c_txbd++;
  1175. if (ep->c_txbd == ep->n_txbd) {
  1176. if (bdstatus & DEVICE_T_ERROR) {
  1177. frame_set_status(pframe, FRAME_ERROR);
  1178. if (bdstatus & T_TO)
  1179. pframe->status |= TX_ER_TIMEOUT;
  1180. if (bdstatus & T_UN)
  1181. pframe->status |= TX_ER_UNDERUN;
  1182. }
  1183. ep0_txframe_handle(ep);
  1184. }
  1185. bd = ep->c_txbd;
  1186. bdstatus = in_be32((u32 __iomem *)bd);
  1187. }
  1188. return 0;
  1189. }
  1190. static int ep_txframe_handle(struct qe_ep *ep)
  1191. {
  1192. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1193. qe_ep_flushtxfifo(ep);
  1194. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1195. if (frame_get_info(ep->txframe) & PID_DATA0)
  1196. ep->data01 = 0;
  1197. else
  1198. ep->data01 = 1;
  1199. txcomplete(ep, 1);
  1200. } else
  1201. txcomplete(ep, 0);
  1202. frame_create_tx(ep, ep->txframe); /* send the data */
  1203. return 0;
  1204. }
  1205. /* confirm the already trainsmited bd */
  1206. static int qe_ep_txconf(struct qe_ep *ep)
  1207. {
  1208. struct qe_bd __iomem *bd;
  1209. struct qe_frame *pframe = NULL;
  1210. u32 bdstatus;
  1211. unsigned char breakonrxinterrupt = 0;
  1212. bd = ep->c_txbd;
  1213. bdstatus = in_be32((u32 __iomem *)bd);
  1214. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1215. pframe = ep->txframe;
  1216. if (bdstatus & DEVICE_T_ERROR) {
  1217. frame_set_status(pframe, FRAME_ERROR);
  1218. if (bdstatus & T_TO)
  1219. pframe->status |= TX_ER_TIMEOUT;
  1220. if (bdstatus & T_UN)
  1221. pframe->status |= TX_ER_UNDERUN;
  1222. }
  1223. /* clear and recycle the BD */
  1224. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1225. out_be32(&bd->buf, 0);
  1226. if (bdstatus & T_W)
  1227. ep->c_txbd = ep->txbase;
  1228. else
  1229. ep->c_txbd++;
  1230. /* handle the tx frame */
  1231. ep_txframe_handle(ep);
  1232. bd = ep->c_txbd;
  1233. bdstatus = in_be32((u32 __iomem *)bd);
  1234. }
  1235. if (breakonrxinterrupt)
  1236. return -EIO;
  1237. else
  1238. return 0;
  1239. }
  1240. /* Add a request in queue, and try to transmit a packet */
  1241. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1242. {
  1243. int reval = 0;
  1244. if (ep->tx_req == NULL) {
  1245. ep->sent = 0;
  1246. ep->last = 0;
  1247. txcomplete(ep, 0); /* can gain a new tx_req */
  1248. reval = frame_create_tx(ep, ep->txframe);
  1249. }
  1250. return reval;
  1251. }
  1252. /* Maybe this is a good ideal */
  1253. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1254. {
  1255. struct qe_udc *udc = ep->udc;
  1256. struct qe_frame *pframe = NULL;
  1257. struct qe_bd __iomem *bd;
  1258. u32 bdstatus, length;
  1259. u32 vaddr, fsize;
  1260. u8 *cp;
  1261. u8 finish_req = 0;
  1262. u8 framepid;
  1263. if (list_empty(&ep->queue)) {
  1264. dev_vdbg(udc->dev, "the req already finish!\n");
  1265. return 0;
  1266. }
  1267. pframe = ep->rxframe;
  1268. bd = ep->n_rxbd;
  1269. bdstatus = in_be32((u32 __iomem *)bd);
  1270. length = bdstatus & BD_LENGTH_MASK;
  1271. while (!(bdstatus & R_E) && length) {
  1272. if (finish_req)
  1273. break;
  1274. if ((bdstatus & R_F) && (bdstatus & R_L)
  1275. && !(bdstatus & R_ERROR)) {
  1276. qe_frame_clean(pframe);
  1277. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1278. frame_set_data(pframe, (u8 *)vaddr);
  1279. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1280. frame_set_status(pframe, FRAME_OK);
  1281. switch (bdstatus & R_PID) {
  1282. case R_PID_DATA1:
  1283. frame_set_info(pframe, PID_DATA1); break;
  1284. default:
  1285. frame_set_info(pframe, PID_DATA0); break;
  1286. }
  1287. /* handle the rx frame */
  1288. if (frame_get_info(pframe) & PID_DATA1)
  1289. framepid = 0x1;
  1290. else
  1291. framepid = 0;
  1292. if (framepid != ep->data01) {
  1293. dev_vdbg(udc->dev, "the data01 error!\n");
  1294. } else {
  1295. fsize = frame_get_length(pframe);
  1296. cp = (u8 *)(req->req.buf) + req->req.actual;
  1297. if (cp) {
  1298. memcpy(cp, pframe->data, fsize);
  1299. req->req.actual += fsize;
  1300. if ((fsize < ep->ep.maxpacket)
  1301. || (req->req.actual >=
  1302. req->req.length)) {
  1303. finish_req = 1;
  1304. done(ep, req, 0);
  1305. if (list_empty(&ep->queue))
  1306. qe_eprx_nack(ep);
  1307. }
  1308. }
  1309. qe_ep_toggledata01(ep);
  1310. }
  1311. } else {
  1312. dev_err(udc->dev, "The receive frame with error!\n");
  1313. }
  1314. /* note: don't clear the rxbd's buffer address *
  1315. * only Clear the length */
  1316. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1317. ep->has_data--;
  1318. /* Get next BD */
  1319. if (bdstatus & R_W)
  1320. bd = ep->rxbase;
  1321. else
  1322. bd++;
  1323. bdstatus = in_be32((u32 __iomem *)bd);
  1324. length = bdstatus & BD_LENGTH_MASK;
  1325. }
  1326. ep->n_rxbd = bd;
  1327. ep_recycle_rxbds(ep);
  1328. return 0;
  1329. }
  1330. /* only add the request in queue */
  1331. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1332. {
  1333. if (ep->state == EP_STATE_NACK) {
  1334. if (ep->has_data <= 0) {
  1335. /* Enable rx and unmask rx interrupt */
  1336. qe_eprx_normal(ep);
  1337. } else {
  1338. /* Copy the exist BD data */
  1339. ep_req_rx(ep, req);
  1340. }
  1341. }
  1342. return 0;
  1343. }
  1344. /********************************************************************
  1345. Internal Used Function End
  1346. ********************************************************************/
  1347. /*-----------------------------------------------------------------------
  1348. Endpoint Management Functions For Gadget
  1349. -----------------------------------------------------------------------*/
  1350. static int qe_ep_enable(struct usb_ep *_ep,
  1351. const struct usb_endpoint_descriptor *desc)
  1352. {
  1353. struct qe_udc *udc;
  1354. struct qe_ep *ep;
  1355. int retval = 0;
  1356. unsigned char epnum;
  1357. ep = container_of(_ep, struct qe_ep, ep);
  1358. /* catch various bogus parameters */
  1359. if (!_ep || !desc || ep->desc || _ep->name == ep_name[0] ||
  1360. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1361. return -EINVAL;
  1362. udc = ep->udc;
  1363. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1364. return -ESHUTDOWN;
  1365. epnum = (u8)desc->bEndpointAddress & 0xF;
  1366. retval = qe_ep_init(udc, epnum, desc);
  1367. if (retval != 0) {
  1368. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1369. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1370. return -EINVAL;
  1371. }
  1372. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1373. return 0;
  1374. }
  1375. static int qe_ep_disable(struct usb_ep *_ep)
  1376. {
  1377. struct qe_udc *udc;
  1378. struct qe_ep *ep;
  1379. unsigned long flags;
  1380. unsigned int size;
  1381. ep = container_of(_ep, struct qe_ep, ep);
  1382. udc = ep->udc;
  1383. if (!_ep || !ep->desc) {
  1384. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1385. return -EINVAL;
  1386. }
  1387. spin_lock_irqsave(&udc->lock, flags);
  1388. /* Nuke all pending requests (does flush) */
  1389. nuke(ep, -ESHUTDOWN);
  1390. ep->desc = NULL;
  1391. ep->stopped = 1;
  1392. ep->tx_req = NULL;
  1393. qe_ep_reset(udc, ep->epnum);
  1394. spin_unlock_irqrestore(&udc->lock, flags);
  1395. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1396. if (ep->dir == USB_DIR_OUT)
  1397. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1398. (USB_BDRING_LEN_RX + 1);
  1399. else
  1400. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1401. (USB_BDRING_LEN + 1);
  1402. if (ep->dir != USB_DIR_IN) {
  1403. kfree(ep->rxframe);
  1404. if (ep->rxbufmap) {
  1405. dma_unmap_single(udc_controller->gadget.dev.parent,
  1406. ep->rxbuf_d, size,
  1407. DMA_FROM_DEVICE);
  1408. ep->rxbuf_d = DMA_ADDR_INVALID;
  1409. } else {
  1410. dma_sync_single_for_cpu(
  1411. udc_controller->gadget.dev.parent,
  1412. ep->rxbuf_d, size,
  1413. DMA_FROM_DEVICE);
  1414. }
  1415. kfree(ep->rxbuffer);
  1416. }
  1417. if (ep->dir != USB_DIR_OUT)
  1418. kfree(ep->txframe);
  1419. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1420. return 0;
  1421. }
  1422. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1423. {
  1424. struct qe_req *req;
  1425. req = kzalloc(sizeof(*req), gfp_flags);
  1426. if (!req)
  1427. return NULL;
  1428. req->req.dma = DMA_ADDR_INVALID;
  1429. INIT_LIST_HEAD(&req->queue);
  1430. return &req->req;
  1431. }
  1432. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1433. {
  1434. struct qe_req *req;
  1435. req = container_of(_req, struct qe_req, req);
  1436. if (_req)
  1437. kfree(req);
  1438. }
  1439. static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
  1440. {
  1441. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1442. struct qe_req *req = container_of(_req, struct qe_req, req);
  1443. struct qe_udc *udc;
  1444. int reval;
  1445. udc = ep->udc;
  1446. /* catch various bogus parameters */
  1447. if (!_req || !req->req.complete || !req->req.buf
  1448. || !list_empty(&req->queue)) {
  1449. dev_dbg(udc->dev, "bad params\n");
  1450. return -EINVAL;
  1451. }
  1452. if (!_ep || (!ep->desc && ep_index(ep))) {
  1453. dev_dbg(udc->dev, "bad ep\n");
  1454. return -EINVAL;
  1455. }
  1456. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1457. return -ESHUTDOWN;
  1458. req->ep = ep;
  1459. /* map virtual address to hardware */
  1460. if (req->req.dma == DMA_ADDR_INVALID) {
  1461. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1462. req->req.buf,
  1463. req->req.length,
  1464. ep_is_in(ep)
  1465. ? DMA_TO_DEVICE :
  1466. DMA_FROM_DEVICE);
  1467. req->mapped = 1;
  1468. } else {
  1469. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1470. req->req.dma, req->req.length,
  1471. ep_is_in(ep)
  1472. ? DMA_TO_DEVICE :
  1473. DMA_FROM_DEVICE);
  1474. req->mapped = 0;
  1475. }
  1476. req->req.status = -EINPROGRESS;
  1477. req->req.actual = 0;
  1478. list_add_tail(&req->queue, &ep->queue);
  1479. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1480. ep->name, req->req.length);
  1481. /* push the request to device */
  1482. if (ep_is_in(ep))
  1483. reval = ep_req_send(ep, req);
  1484. /* EP0 */
  1485. if (ep_index(ep) == 0 && req->req.length > 0) {
  1486. if (ep_is_in(ep))
  1487. udc->ep0_state = DATA_STATE_XMIT;
  1488. else
  1489. udc->ep0_state = DATA_STATE_RECV;
  1490. }
  1491. if (ep->dir == USB_DIR_OUT)
  1492. reval = ep_req_receive(ep, req);
  1493. return 0;
  1494. }
  1495. /* queues (submits) an I/O request to an endpoint */
  1496. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1497. gfp_t gfp_flags)
  1498. {
  1499. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1500. struct qe_udc *udc = ep->udc;
  1501. unsigned long flags;
  1502. int ret;
  1503. spin_lock_irqsave(&udc->lock, flags);
  1504. ret = __qe_ep_queue(_ep, _req);
  1505. spin_unlock_irqrestore(&udc->lock, flags);
  1506. return ret;
  1507. }
  1508. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1509. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1510. {
  1511. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1512. struct qe_req *req;
  1513. unsigned long flags;
  1514. if (!_ep || !_req)
  1515. return -EINVAL;
  1516. spin_lock_irqsave(&ep->udc->lock, flags);
  1517. /* make sure it's actually queued on this endpoint */
  1518. list_for_each_entry(req, &ep->queue, queue) {
  1519. if (&req->req == _req)
  1520. break;
  1521. }
  1522. if (&req->req != _req) {
  1523. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1524. return -EINVAL;
  1525. }
  1526. done(ep, req, -ECONNRESET);
  1527. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1528. return 0;
  1529. }
  1530. /*-----------------------------------------------------------------
  1531. * modify the endpoint halt feature
  1532. * @ep: the non-isochronous endpoint being stalled
  1533. * @value: 1--set halt 0--clear halt
  1534. * Returns zero, or a negative error code.
  1535. *----------------------------------------------------------------*/
  1536. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1537. {
  1538. struct qe_ep *ep;
  1539. unsigned long flags;
  1540. int status = -EOPNOTSUPP;
  1541. struct qe_udc *udc;
  1542. ep = container_of(_ep, struct qe_ep, ep);
  1543. if (!_ep || !ep->desc) {
  1544. status = -EINVAL;
  1545. goto out;
  1546. }
  1547. udc = ep->udc;
  1548. /* Attempt to halt IN ep will fail if any transfer requests
  1549. * are still queue */
  1550. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1551. status = -EAGAIN;
  1552. goto out;
  1553. }
  1554. status = 0;
  1555. spin_lock_irqsave(&ep->udc->lock, flags);
  1556. qe_eptx_stall_change(ep, value);
  1557. qe_eprx_stall_change(ep, value);
  1558. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1559. if (ep->epnum == 0) {
  1560. udc->ep0_state = WAIT_FOR_SETUP;
  1561. udc->ep0_dir = 0;
  1562. }
  1563. /* set data toggle to DATA0 on clear halt */
  1564. if (value == 0)
  1565. ep->data01 = 0;
  1566. out:
  1567. dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
  1568. value ? "set" : "clear", status);
  1569. return status;
  1570. }
  1571. static struct usb_ep_ops qe_ep_ops = {
  1572. .enable = qe_ep_enable,
  1573. .disable = qe_ep_disable,
  1574. .alloc_request = qe_alloc_request,
  1575. .free_request = qe_free_request,
  1576. .queue = qe_ep_queue,
  1577. .dequeue = qe_ep_dequeue,
  1578. .set_halt = qe_ep_set_halt,
  1579. };
  1580. /*------------------------------------------------------------------------
  1581. Gadget Driver Layer Operations
  1582. ------------------------------------------------------------------------*/
  1583. /* Get the current frame number */
  1584. static int qe_get_frame(struct usb_gadget *gadget)
  1585. {
  1586. u16 tmp;
  1587. tmp = in_be16(&udc_controller->usb_param->frame_n);
  1588. if (tmp & 0x8000)
  1589. tmp = tmp & 0x07ff;
  1590. else
  1591. tmp = -EINVAL;
  1592. return (int)tmp;
  1593. }
  1594. /* Tries to wake up the host connected to this gadget
  1595. *
  1596. * Return : 0-success
  1597. * Negative-this feature not enabled by host or not supported by device hw
  1598. */
  1599. static int qe_wakeup(struct usb_gadget *gadget)
  1600. {
  1601. return -ENOTSUPP;
  1602. }
  1603. /* Notify controller that VBUS is powered, Called by whatever
  1604. detects VBUS sessions */
  1605. static int qe_vbus_session(struct usb_gadget *gadget, int is_active)
  1606. {
  1607. return -ENOTSUPP;
  1608. }
  1609. /* constrain controller's VBUS power usage
  1610. * This call is used by gadget drivers during SET_CONFIGURATION calls,
  1611. * reporting how much power the device may consume. For example, this
  1612. * could affect how quickly batteries are recharged.
  1613. *
  1614. * Returns zero on success, else negative errno.
  1615. */
  1616. static int qe_vbus_draw(struct usb_gadget *gadget, unsigned mA)
  1617. {
  1618. return -ENOTSUPP;
  1619. }
  1620. /* Change Data+ pullup status
  1621. * this func is used by usb_gadget_connect/disconnect
  1622. */
  1623. static int qe_pullup(struct usb_gadget *gadget, int is_on)
  1624. {
  1625. return -ENOTSUPP;
  1626. }
  1627. static int fsl_qe_start(struct usb_gadget_driver *driver,
  1628. int (*bind)(struct usb_gadget *));
  1629. static int fsl_qe_stop(struct usb_gadget_driver *driver);
  1630. /* defined in usb_gadget.h */
  1631. static struct usb_gadget_ops qe_gadget_ops = {
  1632. .get_frame = qe_get_frame,
  1633. .wakeup = qe_wakeup,
  1634. /* .set_selfpowered = qe_set_selfpowered,*/ /* always selfpowered */
  1635. .vbus_session = qe_vbus_session,
  1636. .vbus_draw = qe_vbus_draw,
  1637. .pullup = qe_pullup,
  1638. .start = fsl_qe_start,
  1639. .stop = fsl_qe_stop,
  1640. };
  1641. /*-------------------------------------------------------------------------
  1642. USB ep0 Setup process in BUS Enumeration
  1643. -------------------------------------------------------------------------*/
  1644. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1645. {
  1646. struct qe_ep *ep = &udc->eps[pipe];
  1647. nuke(ep, -ECONNRESET);
  1648. ep->tx_req = NULL;
  1649. return 0;
  1650. }
  1651. static int reset_queues(struct qe_udc *udc)
  1652. {
  1653. u8 pipe;
  1654. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1655. udc_reset_ep_queue(udc, pipe);
  1656. /* report disconnect; the driver is already quiesced */
  1657. spin_unlock(&udc->lock);
  1658. udc->driver->disconnect(&udc->gadget);
  1659. spin_lock(&udc->lock);
  1660. return 0;
  1661. }
  1662. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1663. u16 length)
  1664. {
  1665. /* Save the new address to device struct */
  1666. udc->device_address = (u8) value;
  1667. /* Update usb state */
  1668. udc->usb_state = USB_STATE_ADDRESS;
  1669. /* Status phase , send a ZLP */
  1670. if (ep0_prime_status(udc, USB_DIR_IN))
  1671. qe_ep0_stall(udc);
  1672. }
  1673. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1674. {
  1675. struct qe_req *req = container_of(_req, struct qe_req, req);
  1676. req->req.buf = NULL;
  1677. kfree(req);
  1678. }
  1679. static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
  1680. u16 index, u16 length)
  1681. {
  1682. u16 usb_status = 0;
  1683. struct qe_req *req;
  1684. struct qe_ep *ep;
  1685. int status = 0;
  1686. ep = &udc->eps[0];
  1687. if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  1688. /* Get device status */
  1689. usb_status = 1 << USB_DEVICE_SELF_POWERED;
  1690. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
  1691. /* Get interface status */
  1692. /* We don't have interface information in udc driver */
  1693. usb_status = 0;
  1694. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
  1695. /* Get endpoint status */
  1696. int pipe = index & USB_ENDPOINT_NUMBER_MASK;
  1697. struct qe_ep *target_ep = &udc->eps[pipe];
  1698. u16 usep;
  1699. /* stall if endpoint doesn't exist */
  1700. if (!target_ep->desc)
  1701. goto stall;
  1702. usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
  1703. if (index & USB_DIR_IN) {
  1704. if (target_ep->dir != USB_DIR_IN)
  1705. goto stall;
  1706. if ((usep & USB_THS_MASK) == USB_THS_STALL)
  1707. usb_status = 1 << USB_ENDPOINT_HALT;
  1708. } else {
  1709. if (target_ep->dir != USB_DIR_OUT)
  1710. goto stall;
  1711. if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
  1712. usb_status = 1 << USB_ENDPOINT_HALT;
  1713. }
  1714. }
  1715. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1716. struct qe_req, req);
  1717. req->req.length = 2;
  1718. req->req.buf = udc->statusbuf;
  1719. *(u16 *)req->req.buf = cpu_to_le16(usb_status);
  1720. req->req.status = -EINPROGRESS;
  1721. req->req.actual = 0;
  1722. req->req.complete = ownercomplete;
  1723. udc->ep0_dir = USB_DIR_IN;
  1724. /* data phase */
  1725. status = __qe_ep_queue(&ep->ep, &req->req);
  1726. if (status == 0)
  1727. return;
  1728. stall:
  1729. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1730. qe_ep0_stall(udc);
  1731. }
  1732. /* only handle the setup request, suppose the device in normal status */
  1733. static void setup_received_handle(struct qe_udc *udc,
  1734. struct usb_ctrlrequest *setup)
  1735. {
  1736. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1737. u16 wValue = le16_to_cpu(setup->wValue);
  1738. u16 wIndex = le16_to_cpu(setup->wIndex);
  1739. u16 wLength = le16_to_cpu(setup->wLength);
  1740. /* clear the previous request in the ep0 */
  1741. udc_reset_ep_queue(udc, 0);
  1742. if (setup->bRequestType & USB_DIR_IN)
  1743. udc->ep0_dir = USB_DIR_IN;
  1744. else
  1745. udc->ep0_dir = USB_DIR_OUT;
  1746. switch (setup->bRequest) {
  1747. case USB_REQ_GET_STATUS:
  1748. /* Data+Status phase form udc */
  1749. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1750. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1751. break;
  1752. ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
  1753. wLength);
  1754. return;
  1755. case USB_REQ_SET_ADDRESS:
  1756. /* Status phase from udc */
  1757. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1758. USB_RECIP_DEVICE))
  1759. break;
  1760. ch9setaddress(udc, wValue, wIndex, wLength);
  1761. return;
  1762. case USB_REQ_CLEAR_FEATURE:
  1763. case USB_REQ_SET_FEATURE:
  1764. /* Requests with no data phase, status phase from udc */
  1765. if ((setup->bRequestType & USB_TYPE_MASK)
  1766. != USB_TYPE_STANDARD)
  1767. break;
  1768. if ((setup->bRequestType & USB_RECIP_MASK)
  1769. == USB_RECIP_ENDPOINT) {
  1770. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1771. struct qe_ep *ep;
  1772. if (wValue != 0 || wLength != 0
  1773. || pipe > USB_MAX_ENDPOINTS)
  1774. break;
  1775. ep = &udc->eps[pipe];
  1776. spin_unlock(&udc->lock);
  1777. qe_ep_set_halt(&ep->ep,
  1778. (setup->bRequest == USB_REQ_SET_FEATURE)
  1779. ? 1 : 0);
  1780. spin_lock(&udc->lock);
  1781. }
  1782. ep0_prime_status(udc, USB_DIR_IN);
  1783. return;
  1784. default:
  1785. break;
  1786. }
  1787. if (wLength) {
  1788. /* Data phase from gadget, status phase from udc */
  1789. if (setup->bRequestType & USB_DIR_IN) {
  1790. udc->ep0_state = DATA_STATE_XMIT;
  1791. udc->ep0_dir = USB_DIR_IN;
  1792. } else {
  1793. udc->ep0_state = DATA_STATE_RECV;
  1794. udc->ep0_dir = USB_DIR_OUT;
  1795. }
  1796. spin_unlock(&udc->lock);
  1797. if (udc->driver->setup(&udc->gadget,
  1798. &udc->local_setup_buff) < 0)
  1799. qe_ep0_stall(udc);
  1800. spin_lock(&udc->lock);
  1801. } else {
  1802. /* No data phase, IN status from gadget */
  1803. udc->ep0_dir = USB_DIR_IN;
  1804. spin_unlock(&udc->lock);
  1805. if (udc->driver->setup(&udc->gadget,
  1806. &udc->local_setup_buff) < 0)
  1807. qe_ep0_stall(udc);
  1808. spin_lock(&udc->lock);
  1809. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1810. }
  1811. }
  1812. /*-------------------------------------------------------------------------
  1813. USB Interrupt handlers
  1814. -------------------------------------------------------------------------*/
  1815. static void suspend_irq(struct qe_udc *udc)
  1816. {
  1817. udc->resume_state = udc->usb_state;
  1818. udc->usb_state = USB_STATE_SUSPENDED;
  1819. /* report suspend to the driver ,serial.c not support this*/
  1820. if (udc->driver->suspend)
  1821. udc->driver->suspend(&udc->gadget);
  1822. }
  1823. static void resume_irq(struct qe_udc *udc)
  1824. {
  1825. udc->usb_state = udc->resume_state;
  1826. udc->resume_state = 0;
  1827. /* report resume to the driver , serial.c not support this*/
  1828. if (udc->driver->resume)
  1829. udc->driver->resume(&udc->gadget);
  1830. }
  1831. static void idle_irq(struct qe_udc *udc)
  1832. {
  1833. u8 usbs;
  1834. usbs = in_8(&udc->usb_regs->usb_usbs);
  1835. if (usbs & USB_IDLE_STATUS_MASK) {
  1836. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1837. suspend_irq(udc);
  1838. } else {
  1839. if (udc->usb_state == USB_STATE_SUSPENDED)
  1840. resume_irq(udc);
  1841. }
  1842. }
  1843. static int reset_irq(struct qe_udc *udc)
  1844. {
  1845. unsigned char i;
  1846. if (udc->usb_state == USB_STATE_DEFAULT)
  1847. return 0;
  1848. qe_usb_disable();
  1849. out_8(&udc->usb_regs->usb_usadr, 0);
  1850. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1851. if (udc->eps[i].init)
  1852. qe_ep_reset(udc, i);
  1853. }
  1854. reset_queues(udc);
  1855. udc->usb_state = USB_STATE_DEFAULT;
  1856. udc->ep0_state = WAIT_FOR_SETUP;
  1857. udc->ep0_dir = USB_DIR_OUT;
  1858. qe_usb_enable();
  1859. return 0;
  1860. }
  1861. static int bsy_irq(struct qe_udc *udc)
  1862. {
  1863. return 0;
  1864. }
  1865. static int txe_irq(struct qe_udc *udc)
  1866. {
  1867. return 0;
  1868. }
  1869. /* ep0 tx interrupt also in here */
  1870. static int tx_irq(struct qe_udc *udc)
  1871. {
  1872. struct qe_ep *ep;
  1873. struct qe_bd __iomem *bd;
  1874. int i, res = 0;
  1875. if ((udc->usb_state == USB_STATE_ADDRESS)
  1876. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1877. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1878. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1879. ep = &udc->eps[i];
  1880. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1881. bd = ep->c_txbd;
  1882. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1883. && (in_be32(&bd->buf))) {
  1884. /* confirm the transmitted bd */
  1885. if (ep->epnum == 0)
  1886. res = qe_ep0_txconf(ep);
  1887. else
  1888. res = qe_ep_txconf(ep);
  1889. }
  1890. }
  1891. }
  1892. return res;
  1893. }
  1894. /* setup packect's rx is handle in the function too */
  1895. static void rx_irq(struct qe_udc *udc)
  1896. {
  1897. struct qe_ep *ep;
  1898. struct qe_bd __iomem *bd;
  1899. int i;
  1900. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1901. ep = &udc->eps[i];
  1902. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1903. bd = ep->n_rxbd;
  1904. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1905. && (in_be32(&bd->buf))) {
  1906. if (ep->epnum == 0) {
  1907. qe_ep0_rx(udc);
  1908. } else {
  1909. /*non-setup package receive*/
  1910. qe_ep_rx(ep);
  1911. }
  1912. }
  1913. }
  1914. }
  1915. }
  1916. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1917. {
  1918. struct qe_udc *udc = (struct qe_udc *)_udc;
  1919. u16 irq_src;
  1920. irqreturn_t status = IRQ_NONE;
  1921. unsigned long flags;
  1922. spin_lock_irqsave(&udc->lock, flags);
  1923. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1924. in_be16(&udc->usb_regs->usb_usbmr);
  1925. /* Clear notification bits */
  1926. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1927. /* USB Interrupt */
  1928. if (irq_src & USB_E_IDLE_MASK) {
  1929. idle_irq(udc);
  1930. irq_src &= ~USB_E_IDLE_MASK;
  1931. status = IRQ_HANDLED;
  1932. }
  1933. if (irq_src & USB_E_TXB_MASK) {
  1934. tx_irq(udc);
  1935. irq_src &= ~USB_E_TXB_MASK;
  1936. status = IRQ_HANDLED;
  1937. }
  1938. if (irq_src & USB_E_RXB_MASK) {
  1939. rx_irq(udc);
  1940. irq_src &= ~USB_E_RXB_MASK;
  1941. status = IRQ_HANDLED;
  1942. }
  1943. if (irq_src & USB_E_RESET_MASK) {
  1944. reset_irq(udc);
  1945. irq_src &= ~USB_E_RESET_MASK;
  1946. status = IRQ_HANDLED;
  1947. }
  1948. if (irq_src & USB_E_BSY_MASK) {
  1949. bsy_irq(udc);
  1950. irq_src &= ~USB_E_BSY_MASK;
  1951. status = IRQ_HANDLED;
  1952. }
  1953. if (irq_src & USB_E_TXE_MASK) {
  1954. txe_irq(udc);
  1955. irq_src &= ~USB_E_TXE_MASK;
  1956. status = IRQ_HANDLED;
  1957. }
  1958. spin_unlock_irqrestore(&udc->lock, flags);
  1959. return status;
  1960. }
  1961. /*-------------------------------------------------------------------------
  1962. Gadget driver probe and unregister.
  1963. --------------------------------------------------------------------------*/
  1964. static int fsl_qe_start(struct usb_gadget_driver *driver,
  1965. int (*bind)(struct usb_gadget *))
  1966. {
  1967. int retval;
  1968. unsigned long flags = 0;
  1969. /* standard operations */
  1970. if (!udc_controller)
  1971. return -ENODEV;
  1972. if (!driver || (driver->speed != USB_SPEED_FULL
  1973. && driver->speed != USB_SPEED_HIGH)
  1974. || !bind || !driver->disconnect || !driver->setup)
  1975. return -EINVAL;
  1976. if (udc_controller->driver)
  1977. return -EBUSY;
  1978. /* lock is needed but whether should use this lock or another */
  1979. spin_lock_irqsave(&udc_controller->lock, flags);
  1980. driver->driver.bus = NULL;
  1981. /* hook up the driver */
  1982. udc_controller->driver = driver;
  1983. udc_controller->gadget.dev.driver = &driver->driver;
  1984. udc_controller->gadget.speed = (enum usb_device_speed)(driver->speed);
  1985. spin_unlock_irqrestore(&udc_controller->lock, flags);
  1986. retval = bind(&udc_controller->gadget);
  1987. if (retval) {
  1988. dev_err(udc_controller->dev, "bind to %s --> %d",
  1989. driver->driver.name, retval);
  1990. udc_controller->gadget.dev.driver = NULL;
  1991. udc_controller->driver = NULL;
  1992. return retval;
  1993. }
  1994. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1995. qe_usb_enable();
  1996. out_be16(&udc_controller->usb_regs->usb_usber, 0xffff);
  1997. out_be16(&udc_controller->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1998. udc_controller->usb_state = USB_STATE_ATTACHED;
  1999. udc_controller->ep0_state = WAIT_FOR_SETUP;
  2000. udc_controller->ep0_dir = USB_DIR_OUT;
  2001. dev_info(udc_controller->dev, "%s bind to driver %s \n",
  2002. udc_controller->gadget.name, driver->driver.name);
  2003. return 0;
  2004. }
  2005. static int fsl_qe_stop(struct usb_gadget_driver *driver)
  2006. {
  2007. struct qe_ep *loop_ep;
  2008. unsigned long flags;
  2009. if (!udc_controller)
  2010. return -ENODEV;
  2011. if (!driver || driver != udc_controller->driver)
  2012. return -EINVAL;
  2013. /* stop usb controller, disable intr */
  2014. qe_usb_disable();
  2015. /* in fact, no needed */
  2016. udc_controller->usb_state = USB_STATE_ATTACHED;
  2017. udc_controller->ep0_state = WAIT_FOR_SETUP;
  2018. udc_controller->ep0_dir = 0;
  2019. /* stand operation */
  2020. spin_lock_irqsave(&udc_controller->lock, flags);
  2021. udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
  2022. nuke(&udc_controller->eps[0], -ESHUTDOWN);
  2023. list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
  2024. ep.ep_list)
  2025. nuke(loop_ep, -ESHUTDOWN);
  2026. spin_unlock_irqrestore(&udc_controller->lock, flags);
  2027. /* report disconnect; the controller is already quiesced */
  2028. driver->disconnect(&udc_controller->gadget);
  2029. /* unbind gadget and unhook driver. */
  2030. driver->unbind(&udc_controller->gadget);
  2031. udc_controller->gadget.dev.driver = NULL;
  2032. udc_controller->driver = NULL;
  2033. dev_info(udc_controller->dev, "unregistered gadget driver '%s'\r\n",
  2034. driver->driver.name);
  2035. return 0;
  2036. }
  2037. /* udc structure's alloc and setup, include ep-param alloc */
  2038. static struct qe_udc __devinit *qe_udc_config(struct platform_device *ofdev)
  2039. {
  2040. struct qe_udc *udc;
  2041. struct device_node *np = ofdev->dev.of_node;
  2042. unsigned int tmp_addr = 0;
  2043. struct usb_device_para __iomem *usbpram;
  2044. unsigned int i;
  2045. u64 size;
  2046. u32 offset;
  2047. udc = kzalloc(sizeof(*udc), GFP_KERNEL);
  2048. if (udc == NULL) {
  2049. dev_err(&ofdev->dev, "malloc udc failed\n");
  2050. goto cleanup;
  2051. }
  2052. udc->dev = &ofdev->dev;
  2053. /* get default address of usb parameter in MURAM from device tree */
  2054. offset = *of_get_address(np, 1, &size, NULL);
  2055. udc->usb_param = cpm_muram_addr(offset);
  2056. memset_io(udc->usb_param, 0, size);
  2057. usbpram = udc->usb_param;
  2058. out_be16(&usbpram->frame_n, 0);
  2059. out_be32(&usbpram->rstate, 0);
  2060. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  2061. sizeof(struct usb_ep_para)),
  2062. USB_EP_PARA_ALIGNMENT);
  2063. if (IS_ERR_VALUE(tmp_addr))
  2064. goto cleanup;
  2065. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  2066. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  2067. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  2068. tmp_addr += 32;
  2069. }
  2070. memset_io(udc->ep_param[0], 0,
  2071. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  2072. udc->resume_state = USB_STATE_NOTATTACHED;
  2073. udc->usb_state = USB_STATE_POWERED;
  2074. udc->ep0_dir = 0;
  2075. spin_lock_init(&udc->lock);
  2076. return udc;
  2077. cleanup:
  2078. kfree(udc);
  2079. return NULL;
  2080. }
  2081. /* USB Controller register init */
  2082. static int __devinit qe_udc_reg_init(struct qe_udc *udc)
  2083. {
  2084. struct usb_ctlr __iomem *qe_usbregs;
  2085. qe_usbregs = udc->usb_regs;
  2086. /* Spec says that we must enable the USB controller to change mode. */
  2087. out_8(&qe_usbregs->usb_usmod, 0x01);
  2088. /* Mode changed, now disable it, since muram isn't initialized yet. */
  2089. out_8(&qe_usbregs->usb_usmod, 0x00);
  2090. /* Initialize the rest. */
  2091. out_be16(&qe_usbregs->usb_usbmr, 0);
  2092. out_8(&qe_usbregs->usb_uscom, 0);
  2093. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2094. return 0;
  2095. }
  2096. static int __devinit qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2097. {
  2098. struct qe_ep *ep = &udc->eps[pipe_num];
  2099. ep->udc = udc;
  2100. strcpy(ep->name, ep_name[pipe_num]);
  2101. ep->ep.name = ep_name[pipe_num];
  2102. ep->ep.ops = &qe_ep_ops;
  2103. ep->stopped = 1;
  2104. ep->ep.maxpacket = (unsigned short) ~0;
  2105. ep->desc = NULL;
  2106. ep->dir = 0xff;
  2107. ep->epnum = (u8)pipe_num;
  2108. ep->sent = 0;
  2109. ep->last = 0;
  2110. ep->init = 0;
  2111. ep->rxframe = NULL;
  2112. ep->txframe = NULL;
  2113. ep->tx_req = NULL;
  2114. ep->state = EP_STATE_IDLE;
  2115. ep->has_data = 0;
  2116. /* the queue lists any req for this ep */
  2117. INIT_LIST_HEAD(&ep->queue);
  2118. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2119. if (pipe_num != 0)
  2120. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2121. ep->gadget = &udc->gadget;
  2122. return 0;
  2123. }
  2124. /*-----------------------------------------------------------------------
  2125. * UDC device Driver operation functions *
  2126. *----------------------------------------------------------------------*/
  2127. static void qe_udc_release(struct device *dev)
  2128. {
  2129. int i = 0;
  2130. complete(udc_controller->done);
  2131. cpm_muram_free(cpm_muram_offset(udc_controller->ep_param[0]));
  2132. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2133. udc_controller->ep_param[i] = NULL;
  2134. kfree(udc_controller);
  2135. udc_controller = NULL;
  2136. }
  2137. /* Driver probe functions */
  2138. static const struct of_device_id qe_udc_match[];
  2139. static int __devinit qe_udc_probe(struct platform_device *ofdev)
  2140. {
  2141. const struct of_device_id *match;
  2142. struct device_node *np = ofdev->dev.of_node;
  2143. struct qe_ep *ep;
  2144. unsigned int ret = 0;
  2145. unsigned int i;
  2146. const void *prop;
  2147. match = of_match_device(qe_udc_match, &ofdev->dev);
  2148. if (!match)
  2149. return -EINVAL;
  2150. prop = of_get_property(np, "mode", NULL);
  2151. if (!prop || strcmp(prop, "peripheral"))
  2152. return -ENODEV;
  2153. /* Initialize the udc structure including QH member and other member */
  2154. udc_controller = qe_udc_config(ofdev);
  2155. if (!udc_controller) {
  2156. dev_err(&ofdev->dev, "failed to initialize\n");
  2157. return -ENOMEM;
  2158. }
  2159. udc_controller->soc_type = (unsigned long)match->data;
  2160. udc_controller->usb_regs = of_iomap(np, 0);
  2161. if (!udc_controller->usb_regs) {
  2162. ret = -ENOMEM;
  2163. goto err1;
  2164. }
  2165. /* initialize usb hw reg except for regs for EP,
  2166. * leave usbintr reg untouched*/
  2167. qe_udc_reg_init(udc_controller);
  2168. /* here comes the stand operations for probe
  2169. * set the qe_udc->gadget.xxx */
  2170. udc_controller->gadget.ops = &qe_gadget_ops;
  2171. /* gadget.ep0 is a pointer */
  2172. udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
  2173. INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
  2174. /* modify in register gadget process */
  2175. udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
  2176. /* name: Identifies the controller hardware type. */
  2177. udc_controller->gadget.name = driver_name;
  2178. device_initialize(&udc_controller->gadget.dev);
  2179. dev_set_name(&udc_controller->gadget.dev, "gadget");
  2180. udc_controller->gadget.dev.release = qe_udc_release;
  2181. udc_controller->gadget.dev.parent = &ofdev->dev;
  2182. /* initialize qe_ep struct */
  2183. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2184. /* because the ep type isn't decide here so
  2185. * qe_ep_init() should be called in ep_enable() */
  2186. /* setup the qe_ep struct and link ep.ep.list
  2187. * into gadget.ep_list */
  2188. qe_ep_config(udc_controller, (unsigned char)i);
  2189. }
  2190. /* ep0 initialization in here */
  2191. ret = qe_ep_init(udc_controller, 0, &qe_ep0_desc);
  2192. if (ret)
  2193. goto err2;
  2194. /* create a buf for ZLP send, need to remain zeroed */
  2195. udc_controller->nullbuf = kzalloc(256, GFP_KERNEL);
  2196. if (udc_controller->nullbuf == NULL) {
  2197. dev_err(udc_controller->dev, "cannot alloc nullbuf\n");
  2198. ret = -ENOMEM;
  2199. goto err3;
  2200. }
  2201. /* buffer for data of get_status request */
  2202. udc_controller->statusbuf = kzalloc(2, GFP_KERNEL);
  2203. if (udc_controller->statusbuf == NULL) {
  2204. ret = -ENOMEM;
  2205. goto err4;
  2206. }
  2207. udc_controller->nullp = virt_to_phys((void *)udc_controller->nullbuf);
  2208. if (udc_controller->nullp == DMA_ADDR_INVALID) {
  2209. udc_controller->nullp = dma_map_single(
  2210. udc_controller->gadget.dev.parent,
  2211. udc_controller->nullbuf,
  2212. 256,
  2213. DMA_TO_DEVICE);
  2214. udc_controller->nullmap = 1;
  2215. } else {
  2216. dma_sync_single_for_device(udc_controller->gadget.dev.parent,
  2217. udc_controller->nullp, 256,
  2218. DMA_TO_DEVICE);
  2219. }
  2220. tasklet_init(&udc_controller->rx_tasklet, ep_rx_tasklet,
  2221. (unsigned long)udc_controller);
  2222. /* request irq and disable DR */
  2223. udc_controller->usb_irq = irq_of_parse_and_map(np, 0);
  2224. if (!udc_controller->usb_irq) {
  2225. ret = -EINVAL;
  2226. goto err_noirq;
  2227. }
  2228. ret = request_irq(udc_controller->usb_irq, qe_udc_irq, 0,
  2229. driver_name, udc_controller);
  2230. if (ret) {
  2231. dev_err(udc_controller->dev, "cannot request irq %d err %d \n",
  2232. udc_controller->usb_irq, ret);
  2233. goto err5;
  2234. }
  2235. ret = device_add(&udc_controller->gadget.dev);
  2236. if (ret)
  2237. goto err6;
  2238. ret = usb_add_gadget_udc(&ofdev->dev, &udc_controller->gadget);
  2239. if (ret)
  2240. goto err7;
  2241. dev_info(udc_controller->dev,
  2242. "%s USB controller initialized as device\n",
  2243. (udc_controller->soc_type == PORT_QE) ? "QE" : "CPM");
  2244. return 0;
  2245. err7:
  2246. device_unregister(&udc_controller->gadget.dev);
  2247. err6:
  2248. free_irq(udc_controller->usb_irq, udc_controller);
  2249. err5:
  2250. irq_dispose_mapping(udc_controller->usb_irq);
  2251. err_noirq:
  2252. if (udc_controller->nullmap) {
  2253. dma_unmap_single(udc_controller->gadget.dev.parent,
  2254. udc_controller->nullp, 256,
  2255. DMA_TO_DEVICE);
  2256. udc_controller->nullp = DMA_ADDR_INVALID;
  2257. } else {
  2258. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2259. udc_controller->nullp, 256,
  2260. DMA_TO_DEVICE);
  2261. }
  2262. kfree(udc_controller->statusbuf);
  2263. err4:
  2264. kfree(udc_controller->nullbuf);
  2265. err3:
  2266. ep = &udc_controller->eps[0];
  2267. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2268. kfree(ep->rxframe);
  2269. kfree(ep->rxbuffer);
  2270. kfree(ep->txframe);
  2271. err2:
  2272. iounmap(udc_controller->usb_regs);
  2273. err1:
  2274. kfree(udc_controller);
  2275. udc_controller = NULL;
  2276. return ret;
  2277. }
  2278. #ifdef CONFIG_PM
  2279. static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
  2280. {
  2281. return -ENOTSUPP;
  2282. }
  2283. static int qe_udc_resume(struct platform_device *dev)
  2284. {
  2285. return -ENOTSUPP;
  2286. }
  2287. #endif
  2288. static int __devexit qe_udc_remove(struct platform_device *ofdev)
  2289. {
  2290. struct qe_ep *ep;
  2291. unsigned int size;
  2292. DECLARE_COMPLETION(done);
  2293. if (!udc_controller)
  2294. return -ENODEV;
  2295. usb_del_gadget_udc(&udc_controller->gadget);
  2296. udc_controller->done = &done;
  2297. tasklet_disable(&udc_controller->rx_tasklet);
  2298. if (udc_controller->nullmap) {
  2299. dma_unmap_single(udc_controller->gadget.dev.parent,
  2300. udc_controller->nullp, 256,
  2301. DMA_TO_DEVICE);
  2302. udc_controller->nullp = DMA_ADDR_INVALID;
  2303. } else {
  2304. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2305. udc_controller->nullp, 256,
  2306. DMA_TO_DEVICE);
  2307. }
  2308. kfree(udc_controller->statusbuf);
  2309. kfree(udc_controller->nullbuf);
  2310. ep = &udc_controller->eps[0];
  2311. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2312. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2313. kfree(ep->rxframe);
  2314. if (ep->rxbufmap) {
  2315. dma_unmap_single(udc_controller->gadget.dev.parent,
  2316. ep->rxbuf_d, size,
  2317. DMA_FROM_DEVICE);
  2318. ep->rxbuf_d = DMA_ADDR_INVALID;
  2319. } else {
  2320. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2321. ep->rxbuf_d, size,
  2322. DMA_FROM_DEVICE);
  2323. }
  2324. kfree(ep->rxbuffer);
  2325. kfree(ep->txframe);
  2326. free_irq(udc_controller->usb_irq, udc_controller);
  2327. irq_dispose_mapping(udc_controller->usb_irq);
  2328. tasklet_kill(&udc_controller->rx_tasklet);
  2329. iounmap(udc_controller->usb_regs);
  2330. device_unregister(&udc_controller->gadget.dev);
  2331. /* wait for release() of gadget.dev to free udc */
  2332. wait_for_completion(&done);
  2333. return 0;
  2334. }
  2335. /*-------------------------------------------------------------------------*/
  2336. static const struct of_device_id qe_udc_match[] __devinitconst = {
  2337. {
  2338. .compatible = "fsl,mpc8323-qe-usb",
  2339. .data = (void *)PORT_QE,
  2340. },
  2341. {
  2342. .compatible = "fsl,mpc8360-qe-usb",
  2343. .data = (void *)PORT_QE,
  2344. },
  2345. {
  2346. .compatible = "fsl,mpc8272-cpm-usb",
  2347. .data = (void *)PORT_CPM,
  2348. },
  2349. {},
  2350. };
  2351. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2352. static struct platform_driver udc_driver = {
  2353. .driver = {
  2354. .name = (char *)driver_name,
  2355. .owner = THIS_MODULE,
  2356. .of_match_table = qe_udc_match,
  2357. },
  2358. .probe = qe_udc_probe,
  2359. .remove = __devexit_p(qe_udc_remove),
  2360. #ifdef CONFIG_PM
  2361. .suspend = qe_udc_suspend,
  2362. .resume = qe_udc_resume,
  2363. #endif
  2364. };
  2365. static int __init qe_udc_init(void)
  2366. {
  2367. printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc,
  2368. DRIVER_VERSION);
  2369. return platform_driver_register(&udc_driver);
  2370. }
  2371. static void __exit qe_udc_exit(void)
  2372. {
  2373. platform_driver_unregister(&udc_driver);
  2374. }
  2375. module_init(qe_udc_init);
  2376. module_exit(qe_udc_exit);
  2377. MODULE_DESCRIPTION(DRIVER_DESC);
  2378. MODULE_AUTHOR(DRIVER_AUTHOR);
  2379. MODULE_LICENSE("GPL");