dz.c 23 KB

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  1. /*
  2. * dz.c: Serial port driver for DECstations equipped
  3. * with the DZ chipset.
  4. *
  5. * Copyright (C) 1998 Olivier A. D. Lebaillif
  6. *
  7. * Email: olivier.lebaillif@ifrsys.com
  8. *
  9. * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
  10. *
  11. * [31-AUG-98] triemer
  12. * Changed IRQ to use Harald's dec internals interrupts.h
  13. * removed base_addr code - moving address assignment to setup.c
  14. * Changed name of dz_init to rs_init to be consistent with tc code
  15. * [13-NOV-98] triemer fixed code to receive characters
  16. * after patches by harald to irq code.
  17. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  18. * field from "current" - somewhere between 2.1.121 and 2.1.131
  19. Qua Jun 27 15:02:26 BRT 2001
  20. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  21. *
  22. * Parts (C) 1999 David Airlie, airlied@linux.ie
  23. * [07-SEP-99] Bugfixes
  24. *
  25. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  26. * Converted to new serial core
  27. */
  28. #undef DEBUG_DZ
  29. #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/bitops.h>
  33. #include <linux/compiler.h>
  34. #include <linux/console.h>
  35. #include <linux/delay.h>
  36. #include <linux/errno.h>
  37. #include <linux/init.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/ioport.h>
  40. #include <linux/kernel.h>
  41. #include <linux/major.h>
  42. #include <linux/module.h>
  43. #include <linux/serial.h>
  44. #include <linux/serial_core.h>
  45. #include <linux/sysrq.h>
  46. #include <linux/tty.h>
  47. #include <linux/tty_flip.h>
  48. #include <linux/atomic.h>
  49. #include <asm/bootinfo.h>
  50. #include <asm/io.h>
  51. #include <asm/system.h>
  52. #include <asm/dec/interrupts.h>
  53. #include <asm/dec/kn01.h>
  54. #include <asm/dec/kn02.h>
  55. #include <asm/dec/machtype.h>
  56. #include <asm/dec/prom.h>
  57. #include <asm/dec/system.h>
  58. #include "dz.h"
  59. MODULE_DESCRIPTION("DECstation DZ serial driver");
  60. MODULE_LICENSE("GPL");
  61. static char dz_name[] __initdata = "DECstation DZ serial driver version ";
  62. static char dz_version[] __initdata = "1.04";
  63. struct dz_port {
  64. struct dz_mux *mux;
  65. struct uart_port port;
  66. unsigned int cflag;
  67. };
  68. struct dz_mux {
  69. struct dz_port dport[DZ_NB_PORT];
  70. atomic_t map_guard;
  71. atomic_t irq_guard;
  72. int initialised;
  73. };
  74. static struct dz_mux dz_mux;
  75. static inline struct dz_port *to_dport(struct uart_port *uport)
  76. {
  77. return container_of(uport, struct dz_port, port);
  78. }
  79. /*
  80. * ------------------------------------------------------------
  81. * dz_in () and dz_out ()
  82. *
  83. * These routines are used to access the registers of the DZ
  84. * chip, hiding relocation differences between implementation.
  85. * ------------------------------------------------------------
  86. */
  87. static u16 dz_in(struct dz_port *dport, unsigned offset)
  88. {
  89. void __iomem *addr = dport->port.membase + offset;
  90. return readw(addr);
  91. }
  92. static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
  93. {
  94. void __iomem *addr = dport->port.membase + offset;
  95. writew(value, addr);
  96. }
  97. /*
  98. * ------------------------------------------------------------
  99. * rs_stop () and rs_start ()
  100. *
  101. * These routines are called before setting or resetting
  102. * tty->stopped. They enable or disable transmitter interrupts,
  103. * as necessary.
  104. * ------------------------------------------------------------
  105. */
  106. static void dz_stop_tx(struct uart_port *uport)
  107. {
  108. struct dz_port *dport = to_dport(uport);
  109. u16 tmp, mask = 1 << dport->port.line;
  110. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  111. tmp &= ~mask; /* clear the TX flag */
  112. dz_out(dport, DZ_TCR, tmp);
  113. }
  114. static void dz_start_tx(struct uart_port *uport)
  115. {
  116. struct dz_port *dport = to_dport(uport);
  117. u16 tmp, mask = 1 << dport->port.line;
  118. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  119. tmp |= mask; /* set the TX flag */
  120. dz_out(dport, DZ_TCR, tmp);
  121. }
  122. static void dz_stop_rx(struct uart_port *uport)
  123. {
  124. struct dz_port *dport = to_dport(uport);
  125. dport->cflag &= ~DZ_RXENAB;
  126. dz_out(dport, DZ_LPR, dport->cflag);
  127. }
  128. static void dz_enable_ms(struct uart_port *uport)
  129. {
  130. /* nothing to do */
  131. }
  132. /*
  133. * ------------------------------------------------------------
  134. *
  135. * Here start the interrupt handling routines. All of the following
  136. * subroutines are declared as inline and are folded into
  137. * dz_interrupt. They were separated out for readability's sake.
  138. *
  139. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  140. * runs with interrupts turned off. People who may want to modify
  141. * dz_interrupt() should try to keep the interrupt handler as fast as
  142. * possible. After you are done making modifications, it is not a bad
  143. * idea to do:
  144. *
  145. * make drivers/serial/dz.s
  146. *
  147. * and look at the resulting assemble code in dz.s.
  148. *
  149. * ------------------------------------------------------------
  150. */
  151. /*
  152. * ------------------------------------------------------------
  153. * receive_char ()
  154. *
  155. * This routine deals with inputs from any lines.
  156. * ------------------------------------------------------------
  157. */
  158. static inline void dz_receive_chars(struct dz_mux *mux)
  159. {
  160. struct uart_port *uport;
  161. struct dz_port *dport = &mux->dport[0];
  162. struct tty_struct *tty = NULL;
  163. struct uart_icount *icount;
  164. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  165. unsigned char ch, flag;
  166. u16 status;
  167. int i;
  168. while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
  169. dport = &mux->dport[LINE(status)];
  170. uport = &dport->port;
  171. tty = uport->state->port.tty; /* point to the proper dev */
  172. ch = UCHAR(status); /* grab the char */
  173. flag = TTY_NORMAL;
  174. icount = &uport->icount;
  175. icount->rx++;
  176. if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
  177. /*
  178. * There is no separate BREAK status bit, so treat
  179. * null characters with framing errors as BREAKs;
  180. * normally, otherwise. For this move the Framing
  181. * Error bit to a simulated BREAK bit.
  182. */
  183. if (!ch) {
  184. status |= (status & DZ_FERR) >>
  185. (ffs(DZ_FERR) - ffs(DZ_BREAK));
  186. status &= ~DZ_FERR;
  187. }
  188. /* Handle SysRq/SAK & keep track of the statistics. */
  189. if (status & DZ_BREAK) {
  190. icount->brk++;
  191. if (uart_handle_break(uport))
  192. continue;
  193. } else if (status & DZ_FERR)
  194. icount->frame++;
  195. else if (status & DZ_PERR)
  196. icount->parity++;
  197. if (status & DZ_OERR)
  198. icount->overrun++;
  199. status &= uport->read_status_mask;
  200. if (status & DZ_BREAK)
  201. flag = TTY_BREAK;
  202. else if (status & DZ_FERR)
  203. flag = TTY_FRAME;
  204. else if (status & DZ_PERR)
  205. flag = TTY_PARITY;
  206. }
  207. if (uart_handle_sysrq_char(uport, ch))
  208. continue;
  209. uart_insert_char(uport, status, DZ_OERR, ch, flag);
  210. lines_rx[LINE(status)] = 1;
  211. }
  212. for (i = 0; i < DZ_NB_PORT; i++)
  213. if (lines_rx[i])
  214. tty_flip_buffer_push(mux->dport[i].port.state->port.tty);
  215. }
  216. /*
  217. * ------------------------------------------------------------
  218. * transmit_char ()
  219. *
  220. * This routine deals with outputs to any lines.
  221. * ------------------------------------------------------------
  222. */
  223. static inline void dz_transmit_chars(struct dz_mux *mux)
  224. {
  225. struct dz_port *dport = &mux->dport[0];
  226. struct circ_buf *xmit;
  227. unsigned char tmp;
  228. u16 status;
  229. status = dz_in(dport, DZ_CSR);
  230. dport = &mux->dport[LINE(status)];
  231. xmit = &dport->port.state->xmit;
  232. if (dport->port.x_char) { /* XON/XOFF chars */
  233. dz_out(dport, DZ_TDR, dport->port.x_char);
  234. dport->port.icount.tx++;
  235. dport->port.x_char = 0;
  236. return;
  237. }
  238. /* If nothing to do or stopped or hardware stopped. */
  239. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  240. spin_lock(&dport->port.lock);
  241. dz_stop_tx(&dport->port);
  242. spin_unlock(&dport->port.lock);
  243. return;
  244. }
  245. /*
  246. * If something to do... (remember the dz has no output fifo,
  247. * so we go one char at a time) :-<
  248. */
  249. tmp = xmit->buf[xmit->tail];
  250. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  251. dz_out(dport, DZ_TDR, tmp);
  252. dport->port.icount.tx++;
  253. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  254. uart_write_wakeup(&dport->port);
  255. /* Are we are done. */
  256. if (uart_circ_empty(xmit)) {
  257. spin_lock(&dport->port.lock);
  258. dz_stop_tx(&dport->port);
  259. spin_unlock(&dport->port.lock);
  260. }
  261. }
  262. /*
  263. * ------------------------------------------------------------
  264. * check_modem_status()
  265. *
  266. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  267. * DS 5000/200: Valid for the MODEM and PRINTER line.
  268. * ------------------------------------------------------------
  269. */
  270. static inline void check_modem_status(struct dz_port *dport)
  271. {
  272. /*
  273. * FIXME:
  274. * 1. No status change interrupt; use a timer.
  275. * 2. Handle the 3100/5000 as appropriate. --macro
  276. */
  277. u16 status;
  278. /* If not the modem line just return. */
  279. if (dport->port.line != DZ_MODEM)
  280. return;
  281. status = dz_in(dport, DZ_MSR);
  282. /* it's easy, since DSR2 is the only bit in the register */
  283. if (status)
  284. dport->port.icount.dsr++;
  285. }
  286. /*
  287. * ------------------------------------------------------------
  288. * dz_interrupt ()
  289. *
  290. * this is the main interrupt routine for the DZ chip.
  291. * It deals with the multiple ports.
  292. * ------------------------------------------------------------
  293. */
  294. static irqreturn_t dz_interrupt(int irq, void *dev_id)
  295. {
  296. struct dz_mux *mux = dev_id;
  297. struct dz_port *dport = &mux->dport[0];
  298. u16 status;
  299. /* get the reason why we just got an irq */
  300. status = dz_in(dport, DZ_CSR);
  301. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  302. dz_receive_chars(mux);
  303. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  304. dz_transmit_chars(mux);
  305. return IRQ_HANDLED;
  306. }
  307. /*
  308. * -------------------------------------------------------------------
  309. * Here ends the DZ interrupt routines.
  310. * -------------------------------------------------------------------
  311. */
  312. static unsigned int dz_get_mctrl(struct uart_port *uport)
  313. {
  314. /*
  315. * FIXME: Handle the 3100/5000 as appropriate. --macro
  316. */
  317. struct dz_port *dport = to_dport(uport);
  318. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  319. if (dport->port.line == DZ_MODEM) {
  320. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  321. mctrl &= ~TIOCM_DSR;
  322. }
  323. return mctrl;
  324. }
  325. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  326. {
  327. /*
  328. * FIXME: Handle the 3100/5000 as appropriate. --macro
  329. */
  330. struct dz_port *dport = to_dport(uport);
  331. u16 tmp;
  332. if (dport->port.line == DZ_MODEM) {
  333. tmp = dz_in(dport, DZ_TCR);
  334. if (mctrl & TIOCM_DTR)
  335. tmp &= ~DZ_MODEM_DTR;
  336. else
  337. tmp |= DZ_MODEM_DTR;
  338. dz_out(dport, DZ_TCR, tmp);
  339. }
  340. }
  341. /*
  342. * -------------------------------------------------------------------
  343. * startup ()
  344. *
  345. * various initialization tasks
  346. * -------------------------------------------------------------------
  347. */
  348. static int dz_startup(struct uart_port *uport)
  349. {
  350. struct dz_port *dport = to_dport(uport);
  351. struct dz_mux *mux = dport->mux;
  352. unsigned long flags;
  353. int irq_guard;
  354. int ret;
  355. u16 tmp;
  356. irq_guard = atomic_add_return(1, &mux->irq_guard);
  357. if (irq_guard != 1)
  358. return 0;
  359. ret = request_irq(dport->port.irq, dz_interrupt,
  360. IRQF_SHARED, "dz", mux);
  361. if (ret) {
  362. atomic_add(-1, &mux->irq_guard);
  363. printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
  364. return ret;
  365. }
  366. spin_lock_irqsave(&dport->port.lock, flags);
  367. /* Enable interrupts. */
  368. tmp = dz_in(dport, DZ_CSR);
  369. tmp |= DZ_RIE | DZ_TIE;
  370. dz_out(dport, DZ_CSR, tmp);
  371. spin_unlock_irqrestore(&dport->port.lock, flags);
  372. return 0;
  373. }
  374. /*
  375. * -------------------------------------------------------------------
  376. * shutdown ()
  377. *
  378. * This routine will shutdown a serial port; interrupts are disabled, and
  379. * DTR is dropped if the hangup on close termio flag is on.
  380. * -------------------------------------------------------------------
  381. */
  382. static void dz_shutdown(struct uart_port *uport)
  383. {
  384. struct dz_port *dport = to_dport(uport);
  385. struct dz_mux *mux = dport->mux;
  386. unsigned long flags;
  387. int irq_guard;
  388. u16 tmp;
  389. spin_lock_irqsave(&dport->port.lock, flags);
  390. dz_stop_tx(&dport->port);
  391. spin_unlock_irqrestore(&dport->port.lock, flags);
  392. irq_guard = atomic_add_return(-1, &mux->irq_guard);
  393. if (!irq_guard) {
  394. /* Disable interrupts. */
  395. tmp = dz_in(dport, DZ_CSR);
  396. tmp &= ~(DZ_RIE | DZ_TIE);
  397. dz_out(dport, DZ_CSR, tmp);
  398. free_irq(dport->port.irq, mux);
  399. }
  400. }
  401. /*
  402. * -------------------------------------------------------------------
  403. * dz_tx_empty() -- get the transmitter empty status
  404. *
  405. * Purpose: Let user call ioctl() to get info when the UART physically
  406. * is emptied. On bus types like RS485, the transmitter must
  407. * release the bus after transmitting. This must be done when
  408. * the transmit shift register is empty, not be done when the
  409. * transmit holding register is empty. This functionality
  410. * allows an RS485 driver to be written in user space.
  411. * -------------------------------------------------------------------
  412. */
  413. static unsigned int dz_tx_empty(struct uart_port *uport)
  414. {
  415. struct dz_port *dport = to_dport(uport);
  416. unsigned short tmp, mask = 1 << dport->port.line;
  417. tmp = dz_in(dport, DZ_TCR);
  418. tmp &= mask;
  419. return tmp ? 0 : TIOCSER_TEMT;
  420. }
  421. static void dz_break_ctl(struct uart_port *uport, int break_state)
  422. {
  423. /*
  424. * FIXME: Can't access BREAK bits in TDR easily;
  425. * reuse the code for polled TX. --macro
  426. */
  427. struct dz_port *dport = to_dport(uport);
  428. unsigned long flags;
  429. unsigned short tmp, mask = 1 << dport->port.line;
  430. spin_lock_irqsave(&uport->lock, flags);
  431. tmp = dz_in(dport, DZ_TCR);
  432. if (break_state)
  433. tmp |= mask;
  434. else
  435. tmp &= ~mask;
  436. dz_out(dport, DZ_TCR, tmp);
  437. spin_unlock_irqrestore(&uport->lock, flags);
  438. }
  439. static int dz_encode_baud_rate(unsigned int baud)
  440. {
  441. switch (baud) {
  442. case 50:
  443. return DZ_B50;
  444. case 75:
  445. return DZ_B75;
  446. case 110:
  447. return DZ_B110;
  448. case 134:
  449. return DZ_B134;
  450. case 150:
  451. return DZ_B150;
  452. case 300:
  453. return DZ_B300;
  454. case 600:
  455. return DZ_B600;
  456. case 1200:
  457. return DZ_B1200;
  458. case 1800:
  459. return DZ_B1800;
  460. case 2000:
  461. return DZ_B2000;
  462. case 2400:
  463. return DZ_B2400;
  464. case 3600:
  465. return DZ_B3600;
  466. case 4800:
  467. return DZ_B4800;
  468. case 7200:
  469. return DZ_B7200;
  470. case 9600:
  471. return DZ_B9600;
  472. default:
  473. return -1;
  474. }
  475. }
  476. static void dz_reset(struct dz_port *dport)
  477. {
  478. struct dz_mux *mux = dport->mux;
  479. if (mux->initialised)
  480. return;
  481. dz_out(dport, DZ_CSR, DZ_CLR);
  482. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  483. iob();
  484. /* Enable scanning. */
  485. dz_out(dport, DZ_CSR, DZ_MSE);
  486. mux->initialised = 1;
  487. }
  488. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  489. struct ktermios *old_termios)
  490. {
  491. struct dz_port *dport = to_dport(uport);
  492. unsigned long flags;
  493. unsigned int cflag, baud;
  494. int bflag;
  495. cflag = dport->port.line;
  496. switch (termios->c_cflag & CSIZE) {
  497. case CS5:
  498. cflag |= DZ_CS5;
  499. break;
  500. case CS6:
  501. cflag |= DZ_CS6;
  502. break;
  503. case CS7:
  504. cflag |= DZ_CS7;
  505. break;
  506. case CS8:
  507. default:
  508. cflag |= DZ_CS8;
  509. }
  510. if (termios->c_cflag & CSTOPB)
  511. cflag |= DZ_CSTOPB;
  512. if (termios->c_cflag & PARENB)
  513. cflag |= DZ_PARENB;
  514. if (termios->c_cflag & PARODD)
  515. cflag |= DZ_PARODD;
  516. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  517. bflag = dz_encode_baud_rate(baud);
  518. if (bflag < 0) { /* Try to keep unchanged. */
  519. baud = uart_get_baud_rate(uport, old_termios, NULL, 50, 9600);
  520. bflag = dz_encode_baud_rate(baud);
  521. if (bflag < 0) { /* Resort to 9600. */
  522. baud = 9600;
  523. bflag = DZ_B9600;
  524. }
  525. tty_termios_encode_baud_rate(termios, baud, baud);
  526. }
  527. cflag |= bflag;
  528. if (termios->c_cflag & CREAD)
  529. cflag |= DZ_RXENAB;
  530. spin_lock_irqsave(&dport->port.lock, flags);
  531. uart_update_timeout(uport, termios->c_cflag, baud);
  532. dz_out(dport, DZ_LPR, cflag);
  533. dport->cflag = cflag;
  534. /* setup accept flag */
  535. dport->port.read_status_mask = DZ_OERR;
  536. if (termios->c_iflag & INPCK)
  537. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  538. if (termios->c_iflag & (BRKINT | PARMRK))
  539. dport->port.read_status_mask |= DZ_BREAK;
  540. /* characters to ignore */
  541. uport->ignore_status_mask = 0;
  542. if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
  543. dport->port.ignore_status_mask |= DZ_OERR;
  544. if (termios->c_iflag & IGNPAR)
  545. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  546. if (termios->c_iflag & IGNBRK)
  547. dport->port.ignore_status_mask |= DZ_BREAK;
  548. spin_unlock_irqrestore(&dport->port.lock, flags);
  549. }
  550. /*
  551. * Hack alert!
  552. * Required solely so that the initial PROM-based console
  553. * works undisturbed in parallel with this one.
  554. */
  555. static void dz_pm(struct uart_port *uport, unsigned int state,
  556. unsigned int oldstate)
  557. {
  558. struct dz_port *dport = to_dport(uport);
  559. unsigned long flags;
  560. spin_lock_irqsave(&dport->port.lock, flags);
  561. if (state < 3)
  562. dz_start_tx(&dport->port);
  563. else
  564. dz_stop_tx(&dport->port);
  565. spin_unlock_irqrestore(&dport->port.lock, flags);
  566. }
  567. static const char *dz_type(struct uart_port *uport)
  568. {
  569. return "DZ";
  570. }
  571. static void dz_release_port(struct uart_port *uport)
  572. {
  573. struct dz_mux *mux = to_dport(uport)->mux;
  574. int map_guard;
  575. iounmap(uport->membase);
  576. uport->membase = NULL;
  577. map_guard = atomic_add_return(-1, &mux->map_guard);
  578. if (!map_guard)
  579. release_mem_region(uport->mapbase, dec_kn_slot_size);
  580. }
  581. static int dz_map_port(struct uart_port *uport)
  582. {
  583. if (!uport->membase)
  584. uport->membase = ioremap_nocache(uport->mapbase,
  585. dec_kn_slot_size);
  586. if (!uport->membase) {
  587. printk(KERN_ERR "dz: Cannot map MMIO\n");
  588. return -ENOMEM;
  589. }
  590. return 0;
  591. }
  592. static int dz_request_port(struct uart_port *uport)
  593. {
  594. struct dz_mux *mux = to_dport(uport)->mux;
  595. int map_guard;
  596. int ret;
  597. map_guard = atomic_add_return(1, &mux->map_guard);
  598. if (map_guard == 1) {
  599. if (!request_mem_region(uport->mapbase, dec_kn_slot_size,
  600. "dz")) {
  601. atomic_add(-1, &mux->map_guard);
  602. printk(KERN_ERR
  603. "dz: Unable to reserve MMIO resource\n");
  604. return -EBUSY;
  605. }
  606. }
  607. ret = dz_map_port(uport);
  608. if (ret) {
  609. map_guard = atomic_add_return(-1, &mux->map_guard);
  610. if (!map_guard)
  611. release_mem_region(uport->mapbase, dec_kn_slot_size);
  612. return ret;
  613. }
  614. return 0;
  615. }
  616. static void dz_config_port(struct uart_port *uport, int flags)
  617. {
  618. struct dz_port *dport = to_dport(uport);
  619. if (flags & UART_CONFIG_TYPE) {
  620. if (dz_request_port(uport))
  621. return;
  622. uport->type = PORT_DZ;
  623. dz_reset(dport);
  624. }
  625. }
  626. /*
  627. * Verify the new serial_struct (for TIOCSSERIAL).
  628. */
  629. static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
  630. {
  631. int ret = 0;
  632. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  633. ret = -EINVAL;
  634. if (ser->irq != uport->irq)
  635. ret = -EINVAL;
  636. return ret;
  637. }
  638. static struct uart_ops dz_ops = {
  639. .tx_empty = dz_tx_empty,
  640. .get_mctrl = dz_get_mctrl,
  641. .set_mctrl = dz_set_mctrl,
  642. .stop_tx = dz_stop_tx,
  643. .start_tx = dz_start_tx,
  644. .stop_rx = dz_stop_rx,
  645. .enable_ms = dz_enable_ms,
  646. .break_ctl = dz_break_ctl,
  647. .startup = dz_startup,
  648. .shutdown = dz_shutdown,
  649. .set_termios = dz_set_termios,
  650. .pm = dz_pm,
  651. .type = dz_type,
  652. .release_port = dz_release_port,
  653. .request_port = dz_request_port,
  654. .config_port = dz_config_port,
  655. .verify_port = dz_verify_port,
  656. };
  657. static void __init dz_init_ports(void)
  658. {
  659. static int first = 1;
  660. unsigned long base;
  661. int line;
  662. if (!first)
  663. return;
  664. first = 0;
  665. if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100)
  666. base = dec_kn_slot_base + KN01_DZ11;
  667. else
  668. base = dec_kn_slot_base + KN02_DZ11;
  669. for (line = 0; line < DZ_NB_PORT; line++) {
  670. struct dz_port *dport = &dz_mux.dport[line];
  671. struct uart_port *uport = &dport->port;
  672. dport->mux = &dz_mux;
  673. uport->irq = dec_interrupt[DEC_IRQ_DZ11];
  674. uport->fifosize = 1;
  675. uport->iotype = UPIO_MEM;
  676. uport->flags = UPF_BOOT_AUTOCONF;
  677. uport->ops = &dz_ops;
  678. uport->line = line;
  679. uport->mapbase = base;
  680. }
  681. }
  682. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  683. /*
  684. * -------------------------------------------------------------------
  685. * dz_console_putchar() -- transmit a character
  686. *
  687. * Polled transmission. This is tricky. We need to mask transmit
  688. * interrupts so that they do not interfere, enable the transmitter
  689. * for the line requested and then wait till the transmit scanner
  690. * requests data for this line. But it may request data for another
  691. * line first, in which case we have to disable its transmitter and
  692. * repeat waiting till our line pops up. Only then the character may
  693. * be transmitted. Finally, the state of the transmitter mask is
  694. * restored. Welcome to the world of PDP-11!
  695. * -------------------------------------------------------------------
  696. */
  697. static void dz_console_putchar(struct uart_port *uport, int ch)
  698. {
  699. struct dz_port *dport = to_dport(uport);
  700. unsigned long flags;
  701. unsigned short csr, tcr, trdy, mask;
  702. int loops = 10000;
  703. spin_lock_irqsave(&dport->port.lock, flags);
  704. csr = dz_in(dport, DZ_CSR);
  705. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  706. tcr = dz_in(dport, DZ_TCR);
  707. tcr |= 1 << dport->port.line;
  708. mask = tcr;
  709. dz_out(dport, DZ_TCR, mask);
  710. iob();
  711. spin_unlock_irqrestore(&dport->port.lock, flags);
  712. do {
  713. trdy = dz_in(dport, DZ_CSR);
  714. if (!(trdy & DZ_TRDY))
  715. continue;
  716. trdy = (trdy & DZ_TLINE) >> 8;
  717. if (trdy == dport->port.line)
  718. break;
  719. mask &= ~(1 << trdy);
  720. dz_out(dport, DZ_TCR, mask);
  721. iob();
  722. udelay(2);
  723. } while (--loops);
  724. if (loops) /* Cannot send otherwise. */
  725. dz_out(dport, DZ_TDR, ch);
  726. dz_out(dport, DZ_TCR, tcr);
  727. dz_out(dport, DZ_CSR, csr);
  728. }
  729. /*
  730. * -------------------------------------------------------------------
  731. * dz_console_print ()
  732. *
  733. * dz_console_print is registered for printk.
  734. * The console must be locked when we get here.
  735. * -------------------------------------------------------------------
  736. */
  737. static void dz_console_print(struct console *co,
  738. const char *str,
  739. unsigned int count)
  740. {
  741. struct dz_port *dport = &dz_mux.dport[co->index];
  742. #ifdef DEBUG_DZ
  743. prom_printf((char *) str);
  744. #endif
  745. uart_console_write(&dport->port, str, count, dz_console_putchar);
  746. }
  747. static int __init dz_console_setup(struct console *co, char *options)
  748. {
  749. struct dz_port *dport = &dz_mux.dport[co->index];
  750. struct uart_port *uport = &dport->port;
  751. int baud = 9600;
  752. int bits = 8;
  753. int parity = 'n';
  754. int flow = 'n';
  755. int ret;
  756. ret = dz_map_port(uport);
  757. if (ret)
  758. return ret;
  759. spin_lock_init(&dport->port.lock); /* For dz_pm(). */
  760. dz_reset(dport);
  761. dz_pm(uport, 0, -1);
  762. if (options)
  763. uart_parse_options(options, &baud, &parity, &bits, &flow);
  764. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  765. }
  766. static struct uart_driver dz_reg;
  767. static struct console dz_console = {
  768. .name = "ttyS",
  769. .write = dz_console_print,
  770. .device = uart_console_device,
  771. .setup = dz_console_setup,
  772. .flags = CON_PRINTBUFFER,
  773. .index = -1,
  774. .data = &dz_reg,
  775. };
  776. static int __init dz_serial_console_init(void)
  777. {
  778. if (!IOASIC) {
  779. dz_init_ports();
  780. register_console(&dz_console);
  781. return 0;
  782. } else
  783. return -ENXIO;
  784. }
  785. console_initcall(dz_serial_console_init);
  786. #define SERIAL_DZ_CONSOLE &dz_console
  787. #else
  788. #define SERIAL_DZ_CONSOLE NULL
  789. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  790. static struct uart_driver dz_reg = {
  791. .owner = THIS_MODULE,
  792. .driver_name = "serial",
  793. .dev_name = "ttyS",
  794. .major = TTY_MAJOR,
  795. .minor = 64,
  796. .nr = DZ_NB_PORT,
  797. .cons = SERIAL_DZ_CONSOLE,
  798. };
  799. static int __init dz_init(void)
  800. {
  801. int ret, i;
  802. if (IOASIC)
  803. return -ENXIO;
  804. printk("%s%s\n", dz_name, dz_version);
  805. dz_init_ports();
  806. ret = uart_register_driver(&dz_reg);
  807. if (ret)
  808. return ret;
  809. for (i = 0; i < DZ_NB_PORT; i++)
  810. uart_add_one_port(&dz_reg, &dz_mux.dport[i].port);
  811. return 0;
  812. }
  813. module_init(dz_init);